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| author | Michal Simek <michal.simek@xilinx.com> | 2018-07-24 16:27:00 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-08-06 08:44:35 +0200 |
| commit | 2570e12960486cdf2b1e0e3fb8f6100116ccf65e (patch) | |
| tree | 33b669e4ccb3a107ece3eaeb97244b5609a16d21 | |
| parent | 58f449676ac29938ea2970e240a2defe99240a8e (diff) | |
| download | u-boot-2570e12960486cdf2b1e0e3fb8f6100116ccf65e.tar.gz | |
arm64: zynqmp: Add support for Avnet Ultra96
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
and point to origin internal board name.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | MAINTAINERS | 1 | ||||
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/avnet-ultra96-rev1.dts | 19 | ||||
| l--------- | board/xilinx/zynqmp/avnet-ultra96-rev1 | 1 | ||||
| -rw-r--r-- | configs/avnet_ultra96_rev1_defconfig | 92 |
5 files changed, 114 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 1bd583c975..58b61ac058 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -317,6 +317,7 @@ F: drivers/usb/host/ehci-zynq.c F: drivers/watchdog/cdns_wdt.c F: include/zynqmppl.h F: tools/zynqmp* +N: ultra96 N: zynqmp ARM ZYNQMP R5 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 797e5756a3..ebfa227262 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -152,6 +152,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zybo.dtb \ zynq-zybo-z7.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ + avnet-ultra96-rev1.dtb \ zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc1.dtb \ zynqmp-mini-nand.dtb \ diff --git a/arch/arm/dts/avnet-ultra96-rev1.dts b/arch/arm/dts/avnet-ultra96-rev1.dts new file mode 100644 index 0000000000..88aa06fa78 --- /dev/null +++ b/arch/arm/dts/avnet-ultra96-rev1.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Avnet Ultra96 rev1 + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ + +/dts-v1/; + +#include "zynqmp-zcu100-revC.dts" + +/ { + model = "Avnet Ultra96 Rev1"; + compatible = "avnet,ultra96-rev1", "avnet,ultra96", + "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", + "xlnx,zynqmp"; +}; diff --git a/board/xilinx/zynqmp/avnet-ultra96-rev1 b/board/xilinx/zynqmp/avnet-ultra96-rev1 new file mode 120000 index 0000000000..f2beed309a --- /dev/null +++ b/board/xilinx/zynqmp/avnet-ultra96-rev1 @@ -0,0 +1 @@ +zynqmp-zcu100-revC
\ No newline at end of file diff --git a/configs/avnet_ultra96_rev1_defconfig b/configs/avnet_ultra96_rev1_defconfig new file mode 100644 index 0000000000..0b5281a250 --- /dev/null +++ b/configs/avnet_ultra96_rev1_defconfig @@ -0,0 +1,92 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu100" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_ZYNQ_SDHCI_MAX_FREQ=15000000 +CONFIG_ZYNQMP_USB=y +CONFIG_DEFAULT_DEVICE_TREE="avnet-ultra96-rev1" +CONFIG_DEBUG_UART=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_ATF=y +CONFIG_SYS_PROMPT="ZynqMP> " +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TIME=y +CONFIG_MP=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y +CONFIG_DM_GPIO=y +CONFIG_XILINX_GPIO=y +CONFIG_SYS_I2C_ZYNQ=y +CONFIG_ZYNQ_I2C1=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_ZYNQ_SPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_XHCI_ZYNQMP=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_WDT=y +CONFIG_WDT_CDNS=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |