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authorKever Yang <kever.yang@rock-chips.com>2020-02-19 09:46:05 +0800
committerKever Yang <kever.yang@rock-chips.com>2020-03-26 22:58:46 +0800
commit4aa33690fc9a225e7e35b5870e4c7378aae46e67 (patch)
tree0c89f3a9297c7adc8a20ab195c085541fa2dc2cf
parent0aadc0786e4a249cddd37efd8875f09e645be4cd (diff)
downloadu-boot-4aa33690fc9a225e7e35b5870e4c7378aae46e67.tar.gz
rockchip: elgin-rv1108: Use syscon API to get grf base
Use syscon API to get grf base instead of get from dts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
-rw-r--r--board/elgin/elgin_rv1108/elgin_rv1108.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c
index 607667ac63..06df25a326 100644
--- a/board/elgin/elgin_rv1108/elgin_rv1108.c
+++ b/board/elgin/elgin_rv1108/elgin_rv1108.c
@@ -5,8 +5,9 @@
*/
#include <common.h>
+#include <syscon.h>
#include <asm/io.h>
-#include <fdtdec.h>
+#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/gpio.h>
@@ -15,7 +16,6 @@ DECLARE_GLOBAL_DATA_PTR;
int mach_cpu_init(void)
{
- int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT = 6,
@@ -35,8 +35,7 @@ int mach_cpu_init(void)
GPIO2D1_UART2_SIN_M0,
};
- node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
- grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
/* Elgin board use UART2 m0 for debug*/
rk_clrsetreg(&grf->gpio2d_iomux,