diff options
| author | Tom Rini <trini@konsulko.com> | 2021-06-28 16:22:13 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-06-28 16:22:13 -0400 |
| commit | 6d0453d88915feeece6e55748a2476d8509e5fad (patch) | |
| tree | f4564a64f771cb071a74787f11471250fdbdf47b | |
| parent | 67edf2553f15e5148efca213af3f41cef3410680 (diff) | |
| parent | 3ef4572110a43acdd7d401b0cb184c6ebd6eaa17 (diff) | |
| download | u-boot-6d0453d88915feeece6e55748a2476d8509e5fad.tar.gz | |
Merge tag 'v2021.07-rc5' into next
Prepare v2021.07-rc5
# gpg: Signature made Mon 28 Jun 2021 03:39:36 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
# Conflicts:
# configs/am64x_evm_r5_defconfig
1245 files changed, 10273 insertions, 2858 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 35ab7f30b2..221e600806 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -16,7 +16,7 @@ jobs: vmImage: $(windows_vm) steps: - powershell: | - (New-Object Net.WebClient).DownloadFile("https://github.com/msys2/msys2-installer/releases/download/2020-07-20/msys2-base-x86_64-20200720.sfx.exe", "sfx.exe") + (New-Object Net.WebClient).DownloadFile("https://github.com/msys2/msys2-installer/releases/download/2021-06-04/msys2-base-x86_64-20210604.sfx.exe", "sfx.exe") displayName: 'Install MSYS2' - script: | sfx.exe -y -o%CD:~0,2%\ diff --git a/MAINTAINERS b/MAINTAINERS index effcf5469d..4be95cc845 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -882,6 +882,7 @@ F: arch/mips/dts/mrvl,cn73xx.dtsi MMC M: Peng Fan <peng.fan@nxp.com> +M: Jaehoon Chung <jh80.chung@samsung.com> S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-mmc.git F: drivers/mmc/ @@ -913,12 +914,32 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-nios.git F: arch/nios2/ +NVMe +M: Bin Meng <bmeng.cn@gmail.com> +S: Maintained +F: drivers/nvme/ +F: cmd/nvme.c +F: include/nvme.h +F: doc/develop/driver-model/nvme.rst + ONENAND #M: Lukasz Majewski <l.majewski@majess.pl> S: Orphaned (Since 2017-01) T: git https://source.denx.de/u-boot/custodians/u-boot-onenand.git F: drivers/mtd/onenand/ +OUT4-IMX6ULL-NANO BOARD +M: Oleh Kravchenko <oleg@kaa.org.ua> +S: Maintained +T: git https://github.com/Oleh-Kravchenko/u-boot-out4.git +F: arch/arm/dts/ev-imx280-nano-x-mb.dts +F: arch/arm/dts/o4-imx-nano.dts +F: arch/arm/dts/o4-imx6ull-nano.dtsi +F: board/out4 +F: configs/ev-imx280-nano-x-mb_defconfig +F: configs/o4-imx6ull-nano_defconfig +F: include/configs/o4-imx6ull-nano.h + PATMAN M: Simon Glass <sjg@chromium.org> S: Maintained @@ -3,7 +3,7 @@ VERSION = 2021 PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = -rc4 +EXTRAVERSION = -rc5 NAME = # *DOCUMENTATION* @@ -2279,7 +2279,7 @@ endif $(build)=$(build-dir) $(@:.ko=.o) $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost -quiet_cmd_genenv = GENENV $@ +quiet_cmd_genenv = GENENV $@ cmd_genenv = $(OBJCOPY) --dump-section .rodata.default_environment=$@ env/common.o; \ sed --in-place -e 's/\x00/\x0A/g' $@ diff --git a/arch/arc/include/asm/global_data.h b/arch/arc/include/asm/global_data.h index 8f9c83d3c2..e35a26f1eb 100644 --- a/arch/arc/include/asm/global_data.h +++ b/arch/arc/include/asm/global_data.h @@ -6,8 +6,6 @@ #ifndef __ASM_ARC_GLOBAL_DATA_H #define __ASM_ARC_GLOBAL_DATA_H -#include <config.h> - #ifndef __ASSEMBLY__ /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 31d687ea01..0448787b8b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1491,6 +1491,24 @@ config TARGET_PG_WCOM_SELI8 SELI8 is a QorIQ LS1021a based service unit card used in XMC20 and FOX615 product families. +config TARGET_PG_WCOM_EXPU1 + bool "Support Hitachi-Powergrids EXPU1 service unit card" + select ARCH_LS1021A + select ARCH_SUPPORT_PSCI + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + select CPU_V7A + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT + select SYS_FSL_DDR + select FSL_DDR_INTERACTIVE + select VENDOR_KM + imply SCSI + help + Support for Hitachi-Powergrids EXPU1 service unit card. + EXPU1 is a QorIQ LS1021a based service unit card used + in XMC20 and FOX615 product families. + config TARGET_LS1021ATSN bool "Support ls1021atsn" select ARCH_LS1021A @@ -2008,6 +2026,7 @@ source "board/hisilicon/poplar/Kconfig" source "board/isee/igep003x/Kconfig" source "board/kontron/sl28/Kconfig" source "board/myir/mys_6ulx/Kconfig" +source "board/seeed/npi_imx6ull/Kconfig" source "board/spear/spear300/Kconfig" source "board/spear/spear310/Kconfig" source "board/spear/spear320/Kconfig" diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9d1ba4c771..9c58f69dbd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -223,7 +223,9 @@ config ARCH_LX2162A select SYS_FSL_DDR_VER_50 select SYS_FSL_EC1 select SYS_FSL_EC2 - select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_ERRATUM_A050204 + select SYS_FSL_ERRATUM_A011334 + select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND select SYS_FSL_HAS_RGMII select SYS_FSL_HAS_SEC select SYS_FSL_HAS_CCN508 @@ -253,7 +255,9 @@ config ARCH_LX2160A select SYS_FSL_DDR_VER_50 select SYS_FSL_EC1 select SYS_FSL_EC2 - select SYS_FSL_ERRATUM_A050106 + select SYS_FSL_ERRATUM_A050204 + select SYS_FSL_ERRATUM_A011334 + select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND select SYS_FSL_HAS_RGMII select SYS_FSL_HAS_SEC select SYS_FSL_HAS_CCN508 @@ -371,8 +375,8 @@ config SYS_FSL_ERRATUM_A009008 config SYS_FSL_ERRATUM_A009798 bool "Workaround for USB PHY erratum A009798" -config SYS_FSL_ERRATUM_A050106 - bool "Workaround for USB PHY erratum A050106" +config SYS_FSL_ERRATUM_A050204 + bool "Workaround for USB PHY erratum A050204" help USB3.0 Receiver needs to enable fixed equalization for each of PHY instances in an SOC. This is similar diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 270a72e550..d0103fc881 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1063,7 +1063,7 @@ int cpu_eth_init(struct bd_info *bis) return error; } -static inline int check_psci(void) +int check_psci(void) { unsigned int psci_ver; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.h b/arch/arm/cpu/armv8/fsl-layerscape/cpu.h index dca5fd0f7d..45da95831e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.h +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.h @@ -6,3 +6,4 @@ int fsl_qoriq_core_to_cluster(unsigned int core); u32 initiator_type(u32 cluster, int init_id); u32 cpu_mask(void); +int check_psci(void); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 7f29aa4725..f1624ff30a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ #include <common.h> @@ -478,6 +478,151 @@ static bool crypto_is_disabled(unsigned int svr) return false; } +#ifdef CONFIG_FSL_PFE +void pfe_set_firmware_in_fdt(void *blob, int pfenode, void *pfw, char *pename, + unsigned int len) +{ + int rc, fwnode; + unsigned int phandle; + char subnode_str[32], prop_str[32], phandle_str[32], s[64]; + + sprintf(subnode_str, "pfe-%s-firmware", pename); + sprintf(prop_str, "fsl,pfe-%s-firmware", pename); + sprintf(phandle_str, "fsl,%s-firmware", pename); + + /*Add PE FW to fdt.*/ + /* Increase the size of the fdt to make room for the node. */ + rc = fdt_increase_size(blob, len); + if (rc < 0) { + printf("Unable to make room for %s firmware: %s\n", pename, + fdt_strerror(rc)); + return; + } + + /* Create the firmware node. */ + fwnode = fdt_add_subnode(blob, pfenode, subnode_str); + if (fwnode < 0) { + fdt_get_path(blob, pfenode, s, sizeof(s)); + printf("Could not add firmware node to %s: %s\n", s, + fdt_strerror(fwnode)); + return; + } + + rc = fdt_setprop_string(blob, fwnode, "compatible", prop_str); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + rc = fdt_setprop_u32(blob, fwnode, "length", len); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add compatible property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + /*create phandle and set the property*/ + phandle = fdt_create_phandle(blob, fwnode); + if (!phandle) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add phandle property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } + + rc = fdt_setprop(blob, fwnode, phandle_str, pfw, len); + if (rc < 0) { + fdt_get_path(blob, fwnode, s, sizeof(s)); + printf("Could not add firmware property to node %s: %s\n", s, + fdt_strerror(rc)); + return; + } +} + +void fdt_fixup_pfe_firmware(void *blob) +{ + int pfenode; + unsigned int len_class = 0, len_tmu = 0, len_util = 0; + const char *p; + void *pclassfw, *ptmufw, *putilfw; + + /* The first PFE we find, will contain the actual firmware. */ + pfenode = fdt_node_offset_by_compatible(blob, -1, "fsl,pfe"); + if (pfenode < 0) + /* Exit silently if there are no PFE devices */ + return; + + /* If we already have a firmware node, then also exit silently. */ + if (fdt_node_offset_by_compatible(blob, -1, + "fsl,pfe-class-firmware") > 0) + return; + + /* If the environment variable is not set, then exit silently */ + p = env_get("class_elf_firmware"); + if (!p) + return; + + pclassfw = (void *)simple_strtoul(p, NULL, 16); + if (!pclassfw) + return; + + p = env_get("class_elf_size"); + if (!p) + return; + len_class = simple_strtoul(p, NULL, 16); + + /* If the environment variable is not set, then exit silently */ + p = env_get("tmu_elf_firmware"); + if (!p) + return; + + ptmufw = (void *)simple_strtoul(p, NULL, 16); + if (!ptmufw) + return; + + p = env_get("tmu_elf_size"); + if (!p) + return; + len_tmu = simple_strtoul(p, NULL, 16); + + if (len_class == 0 || len_tmu == 0) { + printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n", + len_class, len_tmu); + return; + } + + /*Add CLASS FW to fdt.*/ + pfe_set_firmware_in_fdt(blob, pfenode, pclassfw, "class", len_class); + + /*Add TMU FW to fdt.*/ + pfe_set_firmware_in_fdt(blob, pfenode, ptmufw, "tmu", len_tmu); + + /* Util PE firmware is handled separately as it is not a usual case*/ + p = env_get("util_elf_firmware"); + if (!p) + return; + + putilfw = (void *)simple_strtoul(p, NULL, 16); + if (!putilfw) + return; + + p = env_get("util_elf_size"); + if (!p) + return; + len_util = simple_strtoul(p, NULL, 16); + + if (len_util) { + printf("PFE Util PE firmware is not added to FDT.\n"); + return; + } + + pfe_set_firmware_in_fdt(blob, pfenode, putilfw, "util", len_util); +} +#endif + void ft_cpu_setup(void *blob, struct bd_info *bd) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -534,6 +679,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_firmware(blob); #endif +#ifdef CONFIG_FSL_PFE + fdt_fixup_pfe_firmware(blob); +#endif #ifndef CONFIG_ARCH_LS1012A fsl_fdt_disable_usb(blob); #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c index 5ac545f9df..730d7663d0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c @@ -10,10 +10,12 @@ #include <asm/cache.h> #include <asm/global_data.h> #include <asm/io.h> +#include <asm/ptrace.h> #include <asm/system.h> #include <asm/arch/mp.h> #include <asm/arch/soc.h> #include <linux/delay.h> +#include <linux/psci.h> #include "cpu.h" #include <asm/arch-fsl-layerscape/soc.h> #include <efi_loader.h> @@ -301,24 +303,41 @@ int cpu_release(u32 nr, int argc, char *const argv[]) u64 *table = get_spin_tbl_addr(); int pos; - pos = core_to_pos(nr); - if (pos <= 0) - return -1; - - table += pos * WORDS_PER_SPIN_TABLE_ENTRY; boot_addr = simple_strtoull(argv[0], NULL, 16); - table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX] = boot_addr; - flush_dcache_range((unsigned long)table, + + if (check_psci()) { + /* SPIN Table is used */ + pos = core_to_pos(nr); + if (pos <= 0) + return -1; + + table += pos * WORDS_PER_SPIN_TABLE_ENTRY; + table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX] = boot_addr; + flush_dcache_range((unsigned long)table, (unsigned long)table + SPIN_TABLE_ELEM_SIZE); - asm volatile("dsb st"); + asm volatile("dsb st"); - /* - * The secondary CPUs polling the spin-table above for a non-zero - * value. To save power "wfe" is called. Thus call "sev" here to - * wake the CPUs and let them check the spin-table again (see - * slave_cpu loop in lowlevel.S) - */ - asm volatile("sev"); + /* + * The secondary CPUs polling the spin-table above for a non-zero + * value. To save power "wfe" is called. Thus call "sev" here to + * wake the CPUs and let them check the spin-table again (see + * slave_cpu loop in lowlevel.S) + */ + asm volatile("sev"); + } else { + /* Use PSCI to kick the core */ + struct pt_regs regs; + + printf("begin to kick cpu core #%d to address %llx\n", + nr, boot_addr); + regs.regs[0] = PSCI_0_2_FN64_CPU_ON; + regs.regs[1] = nr; + regs.regs[2] = boot_addr; + regs.regs[3] = 0; + smc_call(®s); + if (regs.regs[0]) + return -1; + } return 0; } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 7553b5bce2..c3cd6c7ac7 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #include <common.h> @@ -218,7 +218,7 @@ static void erratum_a009007(void) } #if defined(CONFIG_FSL_LSCH3) -static void erratum_a050106(void) +static void erratum_a050204(void) { #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; @@ -378,7 +378,7 @@ void fsl_lsch3_early_init_f(void) erratum_a009798(); erratum_a008997(); erratum_a009007(); - erratum_a050106(); + erratum_a050204(); #ifdef CONFIG_CHAIN_OF_TRUST /* In case of Secure Boot, the IBR configures the SMMU * to allow only Secure transactions. diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9918e46633..f6fc9de4e2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -414,6 +414,7 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \ ls1021a-iot-duart.dtb ls1021a-tsn.dtb dtb-$(CONFIG_TARGET_PG_WCOM_SELI8) += ls1021a-pg-wcom-seli8.dtb +dtb-$(CONFIG_TARGET_PG_WCOM_EXPU1) += ls1021a-pg-wcom-expu1.dtb dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls2080a-qds-42-x.dtb \ @@ -813,6 +814,7 @@ dtb-$(CONFIG_MX6ULL) += \ imx6ull-14x14-evk.dtb \ imx6ull-colibri.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ + imx6ull-seeed-npi-imx6ull-dev-board.dtb \ imx6ull-phytec-segin-ff-rdk-emmc.dtb \ imx6ull-dart-6ul.dtb \ imx6ull-somlabs-visionsom.dtb \ @@ -822,6 +824,12 @@ dtb-$(CONFIG_ARCH_MX6) += \ imx6-apalis.dtb \ imx6-colibri.dtb +dtb-$(CONFIG_O4_IMX_NANO) += \ + o4-imx-nano.dtb + +dtb-$(CONFIG_EV_IMX280_NANO_X_MB) += \ + ev-imx280-nano-x-mb.dtb + dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7d-sdb-qspi.dtb \ imx7-cm.dtb \ @@ -830,8 +838,8 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7s-warp.dtb \ imx7d-meerkat96.dtb \ imx7d-pico-pi.dtb \ - imx7d-pico-hobbit.dtb - + imx7d-pico-hobbit.dtb \ + imx7d-smegw01.dtb dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \ imx7ulp-evk.dtb @@ -839,6 +847,7 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-com.dtb \ dtb-$(CONFIG_ARCH_IMX8) += \ fsl-imx8qm-apalis.dtb \ fsl-imx8qm-mek.dtb \ + imx8qm-cgtqmx8.dtb \ imx8qm-rom7720-a1.dtb \ fsl-imx8qxp-ai_ml.dtb \ fsl-imx8qxp-colibri.dtb \ diff --git a/arch/arm/dts/armada-3720-turris-mox.dts b/arch/arm/dts/armada-3720-turris-mox.dts index 8e0ebf508d..f47ced05c5 100644 --- a/arch/arm/dts/armada-3720-turris-mox.dts +++ b/arch/arm/dts/armada-3720-turris-mox.dts @@ -11,6 +11,8 @@ /dts-v1/; #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> #include "armada-372x.dtsi" / { @@ -34,6 +36,28 @@ reg = <0x00000000 0x00000000 0x00000000 0x20000000>; }; + leds { + compatible = "gpio-leds"; + + led { + gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_ACTIVITY; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + compatible = "gpio-keys"; + label = "reset"; + linux,code = <KEY_RESTART>; + gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + reg_usb3_vbus: usb3_vbus@0 { compatible = "regulator-fixed"; regulator-name = "usb3-vbus"; @@ -140,6 +164,37 @@ reg = <0>; spi-max-frequency = <20000000>; m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "secure-firmware"; + reg = <0x0 0x20000>; + }; + + partition@20000 { + label = "a53-firmware"; + reg = <0x20000 0x160000>; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x10000>; + }; + + partition@190000 { + label = "Rescue system"; + reg = <0x190000 0x660000>; + }; + + partition@7f0000 { + label = "dtb"; + reg = <0x7f0000 0x10000>; + }; + }; }; moxtet@1 { diff --git a/arch/arm/dts/ev-imx280-nano-x-mb.dts b/arch/arm/dts/ev-imx280-nano-x-mb.dts new file mode 100644 index 0000000000..7aec076af3 --- /dev/null +++ b/arch/arm/dts/ev-imx280-nano-x-mb.dts @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +/dts-v1/; + +#include "o4-imx6ull-nano.dtsi" + +/ { + model = "EV-iMX280-NANO-X-MB"; + compatible = "evodbg,ev-imx280-nano-x-mb", + "out4,o4-imx6ull-nano", + "fsl,imx6ull"; + + aliases { + mmc1 = &usdhc1; + }; + + chosen { + stdout-path = &uart1; + }; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 + >; + }; + + pinctrl_mdio: mdiogrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; +}; + +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usdhc1 { + bus-width = <4>; + no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-names = "default"; + status = "okay"; + wakeup-source; +}; + +&fec1 { + phy-handle = <&phy0>; + phy-mode = "rmii"; + phy-reset-duration = <250>; + phy-reset-post-delay = <100>; + phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_fec1 &pinctrl_mdio>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy0_irq>; + pinctrl-names = "default"; + reg = <0>; + }; + }; +}; + +&usbotg1 { + dr_mode = "otg"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts index fe708bdbfa..33d85ed83a 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts @@ -41,8 +41,9 @@ qca,clk-out-frequency = <125000000>; qca,clk-out-strength = <AR803X_STRENGTH_FULL>; + qca,keep-pll-enabled; - vddio-supply = <&vddh>; + vddio-supply = <&vddio>; vddio: vddio-regulator { regulator-name = "VDDIO"; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts index 33b16303ad..b95e082b70 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts @@ -32,8 +32,9 @@ qca,clk-out-frequency = <125000000>; qca,clk-out-strength = <AR803X_STRENGTH_FULL>; + qca,keep-pll-enabled; - vddio-supply = <&vddh>; + vddio-supply = <&vddio>; vddio: vddio-regulator { regulator-name = "VDDIO"; diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index 3432fca352..82a8c0a0cd 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -15,12 +15,12 @@ compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; aliases { spi0 = &fspi; - eth0 = &enetc0; - eth1 = &enetc2; - eth2 = &mscc_felix_port0; - eth3 = &mscc_felix_port1; - eth4 = &mscc_felix_port2; - eth5 = &mscc_felix_port3; + ethernet0 = &enetc0; + ethernet1 = &enetc2; + ethernet2 = &mscc_felix_port0; + ethernet3 = &mscc_felix_port1; + ethernet4 = &mscc_felix_port2; + ethernet5 = &mscc_felix_port3; }; }; diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi index 60f5a4ee43..d1e4a8567f 100644 --- a/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi @@ -5,7 +5,7 @@ * Some assumptions are made: * * mezzanine card M8 is connected to IO SLOT1 (25g-aui for DPMAC 3,4,5,6) * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -56,3 +56,9 @@ reg = <0x3>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi index 8e11b0680a..e9a743b3a2 100644 --- a/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi @@ -6,7 +6,7 @@ * * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4) * * mezzanine card M13/M8 is connected to IO SLOT6 (25g-aui for DPMAC 5,6) * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -59,3 +59,9 @@ reg = <0x1>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi index faf4285eab..d9ad1c6a4b 100644 --- a/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi +++ b/arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi @@ -6,7 +6,7 @@ * * Mezzanine card M8 is connected to IO SLOT1 * (xlaui4 for DPMAC 1) * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -24,3 +24,9 @@ reg = <0x0>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/fsl-lx2162a-qds.dts b/arch/arm/dts/fsl-lx2162a-qds.dts index 341610ccf4..0ca30df862 100644 --- a/arch/arm/dts/fsl-lx2162a-qds.dts +++ b/arch/arm/dts/fsl-lx2162a-qds.dts @@ -2,7 +2,7 @@ /* * NXP LX2162AQDS device tree source * - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * */ @@ -135,3 +135,9 @@ reg = <2>; }; }; + +&esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; +}; diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi index 2a21c6731e..7e28463084 100644 --- a/arch/arm/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi @@ -129,6 +129,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi index 6eedf8d40d..f1d9ba1fac 100644 --- a/arch/arm/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi @@ -195,6 +195,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi index 9deec7e352..172a45ba17 100644 --- a/arch/arm/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi @@ -188,6 +188,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; @@ -597,6 +599,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi index a30ba4848e..e09fad6068 100644 --- a/arch/arm/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi @@ -225,6 +225,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; @@ -675,6 +677,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi index 0786b0d546..bfe65fd3c0 100644 --- a/arch/arm/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/dts/imx6qdl-gw560x.dtsi @@ -279,6 +279,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5903.dtsi b/arch/arm/dts/imx6qdl-gw5903.dtsi index 78f9ec90b7..6ebf6aef2f 100644 --- a/arch/arm/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/dts/imx6qdl-gw5903.dtsi @@ -223,6 +223,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi index 5b7bd56932..9adbd728dc 100644 --- a/arch/arm/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi @@ -200,6 +200,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; fixed-link { diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi index c8b29246b7..58f73a141e 100644 --- a/arch/arm/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/dts/imx6qdl-gw5907.dtsi @@ -131,6 +131,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5910.dtsi b/arch/arm/dts/imx6qdl-gw5910.dtsi index 248e077a56..446c1043a7 100644 --- a/arch/arm/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/dts/imx6qdl-gw5910.dtsi @@ -146,6 +146,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-gw5912.dtsi b/arch/arm/dts/imx6qdl-gw5912.dtsi index 7593872c07..88234a6f13 100644 --- a/arch/arm/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/dts/imx6qdl-gw5912.dtsi @@ -141,6 +141,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; @@ -426,6 +429,7 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; }; diff --git a/arch/arm/dts/imx6qdl-gw5913.dtsi b/arch/arm/dts/imx6qdl-gw5913.dtsi index 9fae4cccd7..f4c2b2189f 100644 --- a/arch/arm/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/dts/imx6qdl-gw5913.dtsi @@ -121,6 +121,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; }; diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts new file mode 100644 index 0000000000..ce03ddfd21 --- /dev/null +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +/dts-v1/; +#include "imx6ull.dtsi" +#include "imx6ull-seeed-npi-imx6ull.dtsi" +#include "imx6ull-seeed-npi-imx6ull-u-boot.dtsi" + +/ { + model = "Seeed NPi iMX6ULL Dev Board with NAND"; + compatible = "seeed,imx6ull-seeed-npi-imx6ull", "fsl,imx6ull"; +}; + +&gpmi { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi new file mode 100644 index 0000000000..054e1aa94b --- /dev/null +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +&pinctrl_uart1 { + u-boot,dm-pre-reloc; +}; + +&gpmi { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&usdhc1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&usdhc2 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi b/arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi new file mode 100644 index 0000000000..b019474dba --- /dev/null +++ b/arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pwm/pwm.h> + +/ { + model = "Seeed NPi-iMX6ULL Dev Board"; + compatible = "fsl,imx6ull"; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + + user-led { + label = "User"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpios>; + gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "disabled"; +}; + +&uart1 { + pinctrl-name = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpios>; + + pinctrl_uart1: uart1grp { + fsl,pin = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + fsl,pin = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6UL_PAD_NAND_DQS__RAWNAND_DQS 0x0b0b1 + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x0b0b1 + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x0b0b1 + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0x0b0b1 + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x0b000 + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x0b0b1 + MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0x0b0b1 + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x0b0b1 + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x0b0b1 + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x0b0b1 + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x0b0b1 + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x0b0b1 + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x0b0b1 + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x0b0b1 + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x0b0b1 + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x0b0b1 + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x0b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + >; + }; + + pinctrl_gpios: gpiosgrp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 + >; + }; +}; diff --git a/arch/arm/dts/imx7d-smegw01.dts b/arch/arm/dts/imx7d-smegw01.dts new file mode 100644 index 0000000000..aefc654ad8 --- /dev/null +++ b/arch/arm/dts/imx7d-smegw01.dts @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// +// Copyright (C) 2020 PHYTEC Messtechnik GmbH +// Author: Jens Lang <J.Lang@phytec.de> +// Copyright (C) 2021 Fabio Estevam <festevam@denx.de> + +/dts-v1/; +#include "imx7d.dtsi" + +/ { + model = "Storopack SMEGW01 board"; + compatible = "storopack,imx7d-smegw01", "fsl,imx7d"; + + aliases { + mmc0 = &usdhc1; + mmc1 = &usdhc3; + }; + + chosen { + stdout-path = &uart1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <100000000>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + no-1-8-v; + enable-sdio-wakeup; + keep-power-in-suspend; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; + assigned-clock-rates = <400000000>; + max-frequency = <200000000>; + bus-width = <8>; + fsl,tuning-step = <1>; + non-removable; + cap-sd-highspeed; + cap-mmc-highspeed; + cap-mmc-hw-reset; + mmc-hs200-1_8v; + mmc-ddr-1_8v; + sd-uhs-ddr50; + sd-uhs-sdr104; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x5 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x5 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x5 + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x5 + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x5 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x5 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x5 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x5 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x5 + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x5 + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x5 + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x5 + MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x7 + MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x7 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x74 + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x7c + >; + }; + + pinctrl_usdhc1: usdhc1 { + fsl,pins = < + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + >; + }; + + pinctrl_usdhc3: usdhc3 { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5d + MX7D_PAD_SD3_CLK__SD3_CLK 0x1d + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5d + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5d + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5d + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5d + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5d + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5d + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5d + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5d + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1d + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3_100mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5e + MX7D_PAD_SD3_CLK__SD3_CLK 0x1e + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5e + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5e + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5e + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5e + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5e + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5e + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5e + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5e + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1e + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3_200mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5f + MX7D_PAD_SD3_CLK__SD3_CLK 0x0f + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5f + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5f + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5f + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5f + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5f + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5f + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5f + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5f + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1f + >; + }; +}; + +&iomuxc_lpsr { + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 + >; + }; +}; diff --git a/arch/arm/dts/imx8qm-cgtqmx8.dts b/arch/arm/dts/imx8qm-cgtqmx8.dts new file mode 100644 index 0000000000..555c357f6f --- /dev/null +++ b/arch/arm/dts/imx8qm-cgtqmx8.dts @@ -0,0 +1,404 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP + * Copyright 2017 congatec AG + * Copyright (C) 2019 Oliver Graute <oliver.graute@kococonnector.com> + */ + +/dts-v1/; + +/* First 128KB is for PSCI ATF. */ +/memreserve/ 0x80000000 0x00020000; + +#include "fsl-imx8qm.dtsi" + +/ { + model = "Congatec QMX8 Qseven series"; + compatible = "fsl,imx8qm-qmx8", "fsl,imx8qm"; + + chosen { + bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x5a060000,115200"; + stdout-path = &lpuart0; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usdhc2_vmmc: usdhc2_vmmc { + compatible = "regulator-fixed"; + regulator-name = "sw-3p3-sd1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <3000>; + }; + + reg_usdhc3_vmmc: usdhc3_vmmc { + compatible = "regulator-fixed"; + regulator-name = "sw-3p3-sd2"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <3000>; + }; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii"; + phy-handle = <ðphy0>; + fsl,magic-packet; + fsl,rgmii_txc_dly; + fsl,rgmii_rxc_dly; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@6 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <6>; + at803x,eee-disabled; + at803x,vddio-1p8v; + }; + }; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c0>; + clock-frequency = <100000>; + status = "okay"; + + rtc_ext: m41t62@68 { + compatible = "st,m41t62"; + reg = <0x68>; + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c1>; + status = "okay"; + + wm8904: wm8904@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + + clocks = <&clk IMX8QM_AUD_MCLKOUT0>; + clock-names = "mclk"; + wlf,shared-lrclk; + /* power-domains = <&pd_mclk_out0>; */ + + assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>, + <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>, + <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>, + <&clk IMX8QM_AUD_MCLKOUT0>; + + assigned-clock-rates = <786432000>, <49152000>, <24576000>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx8qm-qmx8 { + + pinctrl_hog: hoggrp{ + fsl,pins = < + SC_P_M40_GPIO0_01_LSIO_GPIO0_IO09 0x00000021 + SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04 0x00000021 + SC_P_M40_GPIO0_00_LSIO_GPIO0_IO08 0x00000021 + SC_P_ESAI1_SCKT_LSIO_GPIO2_IO07 0x00000021 + SC_P_SPDIF0_TX_LSIO_GPIO2_IO15 0x00000021 + SC_P_FLEXCAN1_RX_LSIO_GPIO3_IO31 0x00000021 + SC_P_ESAI1_TX0_LSIO_GPIO2_IO08 0x00000021 + SC_P_FLEXCAN1_TX_LSIO_GPIO4_IO00 0x00000021 + SC_P_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 + SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 + SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 + SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 + SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 + SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 + SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 + SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 + SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 + SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 + SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 + SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 + SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 + SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 + >; + }; + + pinctrl_lpi2c0: lpi2c0grp { + fsl,pins = < + SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0xc600004c + SC_P_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0xc600004c + >; + }; + + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins = < + SC_P_GPT0_CLK_DMA_I2C1_SCL 0xc600004c + SC_P_GPT0_CAPTURE_DMA_I2C1_SDA 0xc600004c + >; + }; + + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + SC_P_UART0_RX_DMA_UART0_RX 0x06000020 + SC_P_UART0_TX_DMA_UART0_TX 0x06000020 + >; + }; + + pinctrl_lpuart1: lpuart1grp { + fsl,pins = < + SC_P_UART1_RX_DMA_UART1_RX 0x06000020 + SC_P_UART1_TX_DMA_UART1_TX 0x06000020 + SC_P_UART1_CTS_B_DMA_UART1_CTS_B 0x06000020 + SC_P_UART1_RTS_B_DMA_UART1_RTS_B 0x06000020 + >; + }; + + pinctrl_lpuart3: lpuart3grp { + fsl,pins = < + SC_P_M41_GPIO0_00_DMA_UART3_RX 0x06000020 + SC_P_M41_GPIO0_01_DMA_UART3_TX 0x06000020 + >; + }; + + pinctrl_mlb: mlbgrp { + fsl,pins = < + SC_P_MLB_SIG_CONN_MLB_SIG 0x21 + SC_P_MLB_CLK_CONN_MLB_CLK 0x21 + SC_P_MLB_DATA_CONN_MLB_DATA 0x21 + >; + }; + + pinctrl_isl29023: isl29023grp { + fsl,pins = < + SC_P_ADC_IN2_LSIO_GPIO3_IO20 0x00000021 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 + SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040 + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020 + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020 + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020 + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020 + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020 + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020 + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040 + SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040 + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020 + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020 + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020 + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020 + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020 + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020 + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040 + SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < + SC_P_USDHC1_DATA6_LSIO_GPIO5_IO21 0x00000021 + SC_P_USDHC1_DATA7_LSIO_GPIO5_IO22 0x00000021 + SC_P_USDHC1_RESET_B_LSIO_GPIO4_IO07 0x00000021 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040 + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020 + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020 + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040 + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020 + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020 + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc3_gpio: usdhc3grpgpio { + fsl,pins = < + SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x00000021 + SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000040 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000020 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000020 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000020 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000020 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000020 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000040 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000020 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000020 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000020 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000020 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000020 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000020 + >; + }; + }; +}; + +&lpuart0 { /* console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart0>; + status = "okay"; +}; + +&lpuart1 { /* Q7 connector */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart1>; + status = "okay"; +}; + +&pd_dma_lpuart0 { + debug_console; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + bus-width = <4>; + cd-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_usdhc2_vmmc>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc3_gpio>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_usdhc3_gpio>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_usdhc3_gpio>; + bus-width = <4>; + cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_usdhc3_vmmc>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + status = "okay"; +}; diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi index d32c98de9c..121665a2d2 100644 --- a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi @@ -8,6 +8,42 @@ chosen { u-boot,dm-spl; }; + + clocks { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + }; +}; + +&osc { + u-boot,dm-spl; +}; + +&clks { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&gpt1 { + u-boot,dm-spl; }; &lpuart1 { /* console */ @@ -15,6 +51,8 @@ }; &semc { + u-boot,dm-spl; + bank1: bank@0 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts index ece13601bd..2da79e5c20 100644 --- a/arch/arm/dts/imxrt1020-evk.dts +++ b/arch/arm/dts/imxrt1020-evk.dts @@ -16,9 +16,11 @@ chosen { bootargs = "root=/dev/ram"; stdout-path = "serial0:115200n8"; + tick-timer = &gpt1; }; memory { + device_type = "memory"; reg = <0x80000000 0x2000000>; }; }; @@ -186,6 +188,10 @@ }; }; +&gpt1 { + status = "okay"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc0>; diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi index 97f3cec9f3..5ba314f995 100644 --- a/arch/arm/dts/imxrt1020.dtsi +++ b/arch/arm/dts/imxrt1020.dtsi @@ -23,7 +23,6 @@ }; clocks { - u-boot,dm-spl; ckil { compatible = "fsl,imx-ckil", "fixed-clock"; #clock-cells = <0>; @@ -36,8 +35,7 @@ clock-frequency = <0>; }; - osc { - u-boot,dm-spl; + osc: osc { compatible = "fsl,imx-osc", "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; @@ -45,10 +43,7 @@ }; soc { - u-boot,dm-spl; - semc: semc@402f0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-semc"; reg = <0x402f0000 0x4000>; clocks = <&clks IMXRT1020_CLK_SEMC>; @@ -73,7 +68,6 @@ }; clks: ccm@400fc000 { - u-boot,dm-spl; compatible = "fsl,imxrt1020-ccm"; reg = <0x400fc000 0x4000>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, @@ -82,7 +76,6 @@ }; usdhc1: usdhc@402c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-usdhc"; reg = <0x402c0000 0x10000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; @@ -95,7 +88,6 @@ }; gpio1: gpio@401b8000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401b8000 0x4000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, @@ -107,7 +99,6 @@ }; gpio2: gpio@401bc000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401bc000 0x4000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, @@ -119,7 +110,6 @@ }; gpio3: gpio@401c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401c0000 0x4000>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, @@ -129,5 +119,24 @@ interrupt-controller; #interrupt-cells = <2>; }; + + gpio5: gpio@400c0000 { + compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; + reg = <0x400c0000 0x4000>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpt1: gpt1@401ec000 { + compatible = "fsl,imxrt-gpt"; + reg = <0x401ec000 0x4000>; + interrupts = <100>; + clocks = <&osc>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi index fb4f7f6f9d..3168c2df2c 100644 --- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi +++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi @@ -8,6 +8,46 @@ chosen { u-boot,dm-spl; }; + + clocks { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + }; +}; + +&osc { + u-boot,dm-spl; +}; + +&clks { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&gpt1 { + u-boot,dm-spl; }; &lpuart1 { /* console */ @@ -15,6 +55,8 @@ }; &semc { + u-boot,dm-spl; + bank1: bank@0 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts index b5e781275e..324cf7af96 100644 --- a/arch/arm/dts/imxrt1050-evk.dts +++ b/arch/arm/dts/imxrt1050-evk.dts @@ -16,9 +16,11 @@ chosen { bootargs = "root=/dev/ram"; stdout-path = "serial0:115200n8"; + tick-timer = &gpt1; }; memory { + device_type = "memory"; reg = <0x80000000 0x2000000>; }; }; @@ -187,7 +189,6 @@ }; pinctrl_lcdif: lcdifgrp { - u-boot,dm-spl; fsl,pins = < MXRT1050_IOMUXC_GPIO_B0_00_LCD_CLK 0x1b0b1 MXRT1050_IOMUXC_GPIO_B0_01_LCD_ENABLE 0x1b0b1 @@ -215,6 +216,10 @@ }; }; +&gpt1 { + status = "okay"; +}; + &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc0>; @@ -232,9 +237,6 @@ display = <&display0>; status = "okay"; - assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; - assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; - display0: display0 { bits-per-pixel = <16>; bus-width = <16>; @@ -258,3 +260,8 @@ }; }; }; + +&usbotg1 { + dr_mode = "host"; + status = "okay"; +}; diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index a9281001e5..6560a3827f 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -23,13 +23,11 @@ gpio4 = &gpio5; mmc0 = &usdhc1; serial0 = &lpuart1; + usbphy0 = &usbphy1; }; clocks { - u-boot,dm-spl; - - osc { - u-boot,dm-spl; + osc: osc { compatible = "fsl,imx-osc", "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; @@ -37,10 +35,7 @@ }; soc { - u-boot,dm-spl; - semc: semc@402f0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-semc"; reg = <0x402f0000 0x4000>; clocks = <&clks IMXRT1050_CLK_SEMC>; @@ -65,7 +60,6 @@ }; clks: ccm@400fc000 { - u-boot,dm-spl; compatible = "fsl,imxrt1050-ccm"; reg = <0x400fc000 0x4000>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, @@ -74,7 +68,6 @@ }; usdhc1: usdhc@402c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-usdhc"; reg = <0x402c0000 0x10000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; @@ -87,7 +80,6 @@ }; gpio1: gpio@401b8000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401b8000 0x4000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, @@ -99,7 +91,6 @@ }; gpio2: gpio@401bc000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401bc000 0x4000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, @@ -111,7 +102,6 @@ }; gpio3: gpio@401c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401c0000 0x4000>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, @@ -123,7 +113,6 @@ }; gpio4: gpio@401c4000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x401c4000 0x4000>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, @@ -135,7 +124,6 @@ }; gpio5: gpio@400c0000 { - u-boot,dm-spl; compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio"; reg = <0x400c0000 0x4000>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, @@ -150,8 +138,45 @@ compatible = "fsl,imxrt-lcdif"; reg = <0x402b8000 0x4000>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMXRT1050_CLK_LCDIF>; - clock-names = "per"; + clocks = <&clks IMXRT1050_CLK_LCDIF_PIX>, + <&clks IMXRT1050_CLK_LCDIF_APB>; + clock-names = "pix", "axi"; + assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>; + assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>; + status = "disabled"; + }; + + gpt1: gpt1@401ec000 { + compatible = "fsl,imxrt-gpt"; + reg = <0x401ec000 0x4000>; + interrupts = <100>; + clocks = <&osc>; + status = "disabled"; + }; + + usbphy1: usbphy@400d9000 { + compatible = "fsl,imxrt-usbphy"; + reg = <0x400d9000 0x1000>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + }; + + usbmisc: usbmisc@402e0800 { + #index-cells = <1>; + compatible = "fsl,imxrt-usbmisc"; + reg = <0x402e0800 0x200>; + clocks = <&clks IMXRT1050_CLK_USBOH3>; + }; + + usbotg1: usb@402e0000 { + compatible = "fsl,imxrt-usb", "fsl,imx27-usb"; + reg = <0x402e0000 0x200>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMXRT1050_CLK_USBOH3>; + fsl,usbphy = <&usbphy1>; + fsl,usbmisc = <&usbmisc 0>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; status = "disabled"; }; }; diff --git a/arch/arm/dts/ls1021a-pg-wcom-expu1.dts b/arch/arm/dts/ls1021a-pg-wcom-expu1.dts new file mode 100644 index 0000000000..33456b7c38 --- /dev/null +++ b/arch/arm/dts/ls1021a-pg-wcom-expu1.dts @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Hitachi ABB Power Grids EXPU1 board device tree source + * + * Copyright 2020 Hitachi ABB Power Grids + * + * Copyright 2013-2015 Freescale Semiconductor, Inc. + */ + +/dts-v1/; +#include "ls1021a.dtsi" + +/ { + model = "EXPU1 Service Unit for XMC and FOX"; + + aliases { + enet2-rgmii-debug-phy = &debug_phy; + }; + + chosen { + stdout-path = &uart0; + }; +}; + +&enet0 { + status = "okay"; + tbi-handle = <&tbi0>; + phy-connection-type = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&enet1 { + status = "okay"; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&enet2 { + phy-handle = <&debug_phy>; + phy-connection-type = "rgmii-id"; + max-speed = <100>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&dspi1 { + bus-num = <0>; + status = "okay"; + zl30343@0 { + compatible = "gen,spidev", "zarlink,zl30343"; + reg = <0>; + spi-max-frequency = <8000000>; + }; +}; + +&ifc { + #address-cells = <2>; + #size-cells = <1>; + /* NOR Flash on board */ + ranges = <0x0 0x0 0x60000000 0x04000000>; + status = "okay"; + + nor@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x4000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + label = "rcw"; + reg = <0x0 0x20000>; + read-only; + }; + partition@20000 { + label = "qe"; + reg = <0x20000 0x20000>; + }; + /* ZL30343 init data to be added here */ + partition@40000 { + label = "envred"; + reg = <0x40000 0x20000>; + }; + partition@60000 { + label = "env"; + reg = <0x60000 0x20000>; + }; + partition@100000 { + label = "u-boot"; + reg = <0x100000 0x100000>; + }; + partition@200000 { + label = "ubi0"; + reg = <0x200000 0x3E00000>; + }; + }; +}; + +&mdio0 { + debug_phy: ethernet-phy@11 { + reg = <0x11>; + }; + + tbi0: tbi-phy@0xb { + reg = <0xb>; + device_type = "tbi-phy"; + }; +}; + +&mdio1 { + tbi1: tbi-phy@0xd { + reg = <0xd>; + device_type = "tbi-phy"; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 7b99ce02b3..7ba2dd2269 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -100,7 +100,7 @@ gpio0: gpio@2300000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2300000 0x0 0x10000>; + reg = <0x2300000 0x10000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; @@ -110,7 +110,7 @@ gpio1: gpio@2310000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2310000 0x0 0x10000>; + reg = <0x2310000 0x10000>; interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; @@ -120,7 +120,7 @@ gpio2: gpio@2320000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2320000 0x0 0x10000>; + reg = <0x2320000 0x10000>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; @@ -130,7 +130,7 @@ gpio3: gpio@2330000 { compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2330000 0x0 0x10000>; + reg = <0x2330000 0x10000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm/dts/o4-imx-nano.dts b/arch/arm/dts/o4-imx-nano.dts new file mode 100644 index 0000000000..54d32f9dd4 --- /dev/null +++ b/arch/arm/dts/o4-imx-nano.dts @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +/dts-v1/; + +#include <dt-bindings/leds/common.h> + +#include "o4-imx6ull-nano.dtsi" + +/ { + model = "O4-iMX-NANO"; + compatible = "out4,o4-imx-nano", + "out4,o4-imx6ull-nano", + "fsl,imx6ull"; + + aliases { + mmc1 = &usdhc1; + }; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + + led0 { + color = <LED_COLOR_ID_RED>; + gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>; + }; + + led1{ + color = <LED_COLOR_ID_GREEN>; + gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>; + }; + + led2 { + gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_BLUE>; + }; + + led3 { + color = <LED_COLOR_ID_RED>; + gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>; + }; + + led4{ + color = <LED_COLOR_ID_GREEN>; + gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>; + }; + + led5 { + color = <LED_COLOR_ID_BLUE>; + gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>; + }; + }; + + usbotg1_vbus: reg_usbotg1_vbus { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pcf8574a 6 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb0"; + }; + + usbotg2_vbus: reg_usbotg2_vbus { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pcf8574a 7 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb1"; + }; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 + >; + }; + + pinctrl_mdio: mdiogrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_CSI_HSYNC__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_CSI_VSYNC__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b8b0 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b8b0 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020 + MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 + >; + }; +}; + +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usdhc1 { + bus-width = <4>; + no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-names = "default"; + status = "okay"; + wakeup-source; +}; + +&fec1 { + phy-handle = <&phy0>; + phy-mode = "rmii"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&fec2 { + phy-handle = <&phy1>; + phy-mode = "rmii"; + phy-reset-duration = <250>; + phy-reset-post-delay = <100>; + phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_fec2 &pinctrl_mdio>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy0_irq>; + pinctrl-names = "default"; + reg = <0>; + }; + + phy1: ethernet-phy@1 { + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy1_irq>; + pinctrl-names = "default"; + reg = <1>; + }; + }; +}; + +&usbotg1 { + dr_mode = "host"; + status = "okay"; + vbus-supply = <&usbotg1_vbus>; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; + vbus-supply = <&usbotg2_vbus>; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + pinctrl-names = "default", "gpio"; + scl-gpios = <&gpio4 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pcf8574a: gpio@38 { + compatible = "nxp,pcf8574a"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x38>; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + status = "okay"; +}; + +&uart2 { + linux,rs485-enabled-at-boot-time; + pinctrl-0 = <&pinctrl_uart2>; + pinctrl-names = "default"; + status = "okay"; + uart-has-rtscts; +}; diff --git a/arch/arm/dts/o4-imx6ull-nano.dtsi b/arch/arm/dts/o4-imx6ull-nano.dtsi new file mode 100644 index 0000000000..3fefa80eae --- /dev/null +++ b/arch/arm/dts/o4-imx6ull-nano.dtsi @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +/dts-v1/; + +#include "imx6ull.dtsi" + +/ { + model = "O4-iMX6ULL-NANO"; + compatible = "out4,o4-imx6ull-nano", "fsl,imx6ull"; + + aliases { + mmc0 = &usdhc2; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + >; + }; + + pinctrl_fec2: fec2grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + >; + }; + + pinctrl_phy0_irq: phy0grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x79 + >; + }; + + pinctrl_phy1_irq: phy1grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 + >; + }; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + non-removable; + keep-power-in-suspend; + wakeup-source; + bus-width = <8>; + status = "okay"; +}; diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index bb13e07b66..267a094e5a 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -50,6 +50,8 @@ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ #define MXC_CPU_IMX8QM 0x91 /* dummy ID */ #define MXC_CPU_IMX8QXP 0x92 /* dummy ID */ +#define MXC_CPU_IMXRT1020 0xB4 /* dummy ID */ +#define MXC_CPU_IMXRT1050 0xB6 /* dummy ID */ #define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */ #define MXC_CPU_VF610 0xF6 /* dummy ID */ @@ -57,6 +59,7 @@ #define MXC_SOC_MX7 0x70 #define MXC_SOC_IMX8M 0x80 #define MXC_SOC_IMX8 0x90 /* dummy */ +#define MXC_SOC_IMXRT 0xB0 /* dummy */ #define MXC_SOC_MX7ULP 0xE0 /* dummy */ #define CHIP_REV_1_0 0x10 diff --git a/arch/arm/include/asm/arch-imxrt/imx-regs.h b/arch/arm/include/asm/arch-imxrt/imx-regs.h index 44c95dcd11..d01e6ca2e0 100644 --- a/arch/arm/include/asm/arch-imxrt/imx-regs.h +++ b/arch/arm/include/asm/arch-imxrt/imx-regs.h @@ -23,4 +23,8 @@ #include <asm/mach-imx/regs-lcdif.h> #endif +#define USB_BASE_ADDR 0x402E0000 +#define USB_PHY0_BASE_ADDR 0x400D9000 +#define USB_PHY1_BASE_ADDR 0x400DA000 + #endif /* __ASM_ARCH_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 2aff1c467c..79432f3bbd 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -9,6 +9,8 @@ #ifndef __ASSEMBLY__ +#include <config.h> + #include <asm/types.h> #include <linux/types.h> diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index c7668ffc4d..b612189849 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -31,6 +31,7 @@ struct bd_info; #define is_mx7() (is_soc_type(MXC_SOC_MX7)) #define is_imx8m() (is_soc_type(MXC_SOC_IMX8M)) #define is_imx8() (is_soc_type(MXC_SOC_IMX8)) +#define is_imxrt() (is_soc_type(MXC_SOC_IMXRT)) #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)) #define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) @@ -78,6 +79,9 @@ struct bd_info; #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) +#define is_imxrt1020() (is_cpu_type(MXC_CPU_IMXRT1020)) +#define is_imxrt1050() (is_cpu_type(MXC_CPU_IMXRT1050)) + #ifdef CONFIG_MX6 #define IMX6_SRC_GPR10_BMODE BIT(28) #define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30) diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 9d2319c0e8..680e674fa3 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -112,6 +112,11 @@ ENTRY(_main) ldr x9, _TEXT_BASE /* x9 <- Linked value of _start */ sub x9, x9, x0 /* x9 <- Run-vs-link offset */ add lr, lr, x9 +#if defined(CONFIG_SYS_RELOC_GD_ENV_ADDR) + ldr x0, [x18, #GD_ENV_ADDR] /* x0 <- gd->env_addr */ + add x0, x0, x9 + str x0, [x18, #GD_ENV_ADDR] +#endif #endif /* Add in link-vs-relocation offset */ ldr x9, [x18, #GD_RELOC_OFF] /* x9 <- gd->reloc_off */ diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 4e76612d05..71221d8d06 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -86,6 +86,12 @@ config TARGET_IMX8QM_MEK select BOARD_LATE_INIT select IMX8QM +config TARGET_CONGA_QMX8 + bool "Support congatec conga-QMX8 board" + select BOARD_LATE_INIT + select SUPPORT_SPL + select IMX8QM + config TARGET_IMX8QM_ROM7720_A1 bool "Support i.MX8QM ROM-7720-A1" select BOARD_LATE_INIT @@ -101,6 +107,7 @@ endchoice source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" +source "board/congatec/cgtqmx8/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" source "board/toradex/apalis-imx8/Kconfig" source "board/toradex/colibri-imx8x/Kconfig" diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 65d476e037..f8e4ec0d90 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -54,7 +54,7 @@ static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(600000000U, 300, 3, 2, 0), PLL_1443X_RATE(594000000U, 99, 1, 2, 0), PLL_1443X_RATE(400000000U, 300, 9, 1, 0), - PLL_1443X_RATE(266666667U, 400, 9, 2, 0), + PLL_1443X_RATE(266000000U, 400, 9, 2, 0), PLL_1443X_RATE(167000000U, 334, 3, 4, 0), PLL_1443X_RATE(100000000U, 300, 9, 3, 0), }; @@ -72,7 +72,7 @@ static int fracpll_configure(enum pll_clocks pll, u32 freq) } if (i == ARRAY_SIZE(imx8mm_fracpll_tbl)) { - printf("No matched freq table %u\n", freq); + printf("%s: No matched freq table %u\n", __func__, freq); return -EINVAL; } @@ -148,7 +148,7 @@ void dram_enable_bypass(ulong clk_val) } if (i == ARRAY_SIZE(imx8mm_dram_bypass_tbl)) { - printf("No matched freq table %lu\n", clk_val); + printf("%s: No matched freq table %lu\n", __func__, clk_val); return; } @@ -646,7 +646,7 @@ static u32 decode_fracpll(enum clk_root_src frac_pll) pll_fdiv_ctl1 = readl(&ana_pll->video_pll1_fdiv_ctl1); break; default: - printf("Not supported\n"); + printf("Unsupported clk_root_src %d\n", frac_pll); return 0; } diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c index 8e7d15160d..ba015992ee 100644 --- a/arch/arm/mach-imx/imxrt/soc.c +++ b/arch/arm/mach-imx/imxrt/soc.c @@ -8,13 +8,14 @@ #include <init.h> #include <asm/io.h> #include <asm/armv7_mpu.h> +#include <asm/mach-imx/sys_proto.h> #include <linux/bitops.h> int arch_cpu_init(void) { int i; - struct mpu_region_config imxrt1050_region_config[] = { + struct mpu_region_config imxrt_region_config[] = { { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, STRONG_ORDER, REGION_4GB }, { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW, @@ -29,9 +30,20 @@ int arch_cpu_init(void) * the whole 4GB address space. */ disable_mpu(); - for (i = 0; i < ARRAY_SIZE(imxrt1050_region_config); i++) - mpu_config(&imxrt1050_region_config[i]); + for (i = 0; i < ARRAY_SIZE(imxrt_region_config); i++) + mpu_config(&imxrt_region_config[i]); enable_mpu(); return 0; } + +u32 get_cpu_rev(void) +{ +#if defined(CONFIG_IMXRT1020) + return MXC_CPU_IMXRT1020 << 12; +#elif defined(CONFIG_IMXRT1050) + return MXC_CPU_IMXRT1050 << 12; +#else +#error This IMXRT SoC is not supported +#endif +} diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 9450e6a683..23cab3932b 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -453,6 +453,17 @@ config TARGET_NITROGEN6X imply USB_ETHER_SMSC95XX imply USB_HOST_ETHER +config TARGET_NPI_IMX6ULL + bool "Seeed NPI-IMX6ULL" + depends on MX6ULL + select DM + select DM_ETH + select DM_MMC + select DM_GPIO + select DM_SERIAL + select DM_THERMAL + select SUPPORT_SPL + config TARGET_OPOS6ULDEV bool "Armadeus OPOS6ULDev board" depends on MX6UL @@ -619,6 +630,18 @@ config TARGET_BRPPT2 Support B&R BRPPT2 platform based on Freescale's iMX6 SoC + +config TARGET_O4_IMX6ULL_NANO + bool "O4-iMX6ULL-NANO" + depends on MX6ULL + select BOARD_LATE_INIT + select DM + select DM_THERMAL + imply CMD_DM + help + Support for www.out4.ru O4-iMX6UL-NANO platform + based on Freescale's i.MX6UL/i.MX6ULL SoC. + endchoice config SYS_SOC @@ -668,5 +691,6 @@ source "board/udoo/neo/Kconfig" source "board/wandboard/Kconfig" source "board/warp/Kconfig" source "board/BuR/brppt2/Kconfig" +source "board/out4/o4-imx6ull-nano/Kconfig" endif diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 5c6fe426ef..adedc01164 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -70,6 +70,14 @@ config TARGET_PICO_IMX7D select SUPPORT_SPL imply CMD_DM +config TARGET_SMEGW01 + bool "smegw01" + select BOARD_LATE_INIT + select DM + select DM_THERMAL + select MX7D + imply CMD_DM + config TARGET_WARP7 bool "warp7" select BOARD_LATE_INIT @@ -94,6 +102,7 @@ source "board/compulab/cl-som-imx7/Kconfig" source "board/ronetix/imx7-cm/Kconfig" source "board/freescale/mx7dsabresd/Kconfig" source "board/novtech/meerkat96/Kconfig" +source "board/storopack/smegw01/Kconfig" source "board/technexion/pico-imx7d/Kconfig" source "board/toradex/colibri_imx7/Kconfig" source "board/warp7/Kconfig" diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 3f7ec05379..c621f8a544 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -69,16 +69,19 @@ choice config TARGET_BEACON_RZG2H bool "Beacon EmbeddedWorks RZ/G2H Dev Kit" select R8A774E1 + select RZ_G2 select PINCTRL_PFC_R8A774E1 config TARGET_BEACON_RZG2M bool "Beacon EmbeddedWorks RZ/G2M Dev Kit" select R8A774A1 + select RZ_G2 select PINCTRL_PFC_R8A774A1 config TARGET_BEACON_RZG2N bool "Beacon EmbeddedWorks RZ/G2N Dev Kit" select R8A774B1 + select RZ_G2 select PINCTRL_PFC_R8A774B1 config TARGET_CONDOR diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index 3d3c48e247..a798aa0eb9 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -19,6 +19,11 @@ #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT 0 #define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT 8 +#define ZYNQMP_AMS_PS_SYSMON_BASEADDR 0XFFA50800 +#define ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS ((ZYNQMP_AMS_PS_SYSMON_BASEADDR) \ + + 0x00000114) +#define ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL 0x00003210 + #define PS_MODE0 BIT(0) #define PS_MODE1 BIT(1) #define PS_MODE2 BIT(2) diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index 188055e9d3..273e843c4a 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -7,6 +7,8 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include <config.h> + /* Architecture-specific global data */ struct arch_global_data { #ifdef CONFIG_SYS_I2C_FSL diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h index be04a18857..297481beaa 100644 --- a/arch/nds32/include/asm/global_data.h +++ b/arch/nds32/include/asm/global_data.h @@ -17,6 +17,8 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include <config.h> + /* Architecture-specific global data */ struct arch_global_data { }; diff --git a/arch/powerpc/dts/t2080rdb.dts b/arch/powerpc/dts/t2080rdb.dts index 25f8c978c6..4de814ea8d 100644 --- a/arch/powerpc/dts/t2080rdb.dts +++ b/arch/powerpc/dts/t2080rdb.dts @@ -77,10 +77,17 @@ reg = <0x0>; }; +#ifdef CONFIG_T2080RDB_REV_D + xg_aq1202_phy4: ethernet-phy@8 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x8>; + }; +#else xg_aq1202_phy4: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <0x1>; }; +#endif }; }; }; diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 192a02d347..90bf5a2aea 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -8,7 +8,7 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H -#include "config.h" +#include <config.h> #include "asm/types.h" /* Architecture-specific global data */ diff --git a/arch/powerpc/lib/traps.c b/arch/powerpc/lib/traps.c index ab8ca269a5..c7bce82a44 100644 --- a/arch/powerpc/lib/traps.c +++ b/arch/powerpc/lib/traps.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include <common.h> #include <init.h> #include <asm/global_data.h> diff --git a/arch/riscv/dts/ae350-u-boot.dtsi b/arch/riscv/dts/ae350-u-boot.dtsi new file mode 100644 index 0000000000..0d4201cfae --- /dev/null +++ b/arch/riscv/dts/ae350-u-boot.dtsi @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/ { + cpus { + u-boot,dm-spl; + CPU0: cpu@0 { + u-boot,dm-spl; + CPU0_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU1: cpu@1 { + u-boot,dm-spl; + CPU1_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU2: cpu@2 { + u-boot,dm-spl; + CPU2_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + CPU3: cpu@3 { + u-boot,dm-spl; + CPU3_intc: interrupt-controller { + u-boot,dm-spl; + }; + }; + }; + + memory@0 { + u-boot,dm-spl; + }; + + soc { + u-boot,dm-spl; + + plic1: interrupt-controller@e6400000 { + u-boot,dm-spl; + }; + + plmt0@e6000000 { + u-boot,dm-spl; + }; + }; + + serial0: serial@f0300000 { + u-boot,dm-spl; + }; + +}; diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index a0ab5e9be2..083f676333 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -1,6 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + /dts-v1/; #include "binman.dtsi" +#include "ae350-u-boot.dtsi" / { #address-cells = <1>; @@ -14,7 +17,7 @@ }; chosen { - bootargs = "console=ttyS0,38400n8 debug loglevel=7"; + bootargs = "console=ttyS0,38400n8 debug loglevel=7"; stdout-path = "uart0:38400n8"; }; @@ -133,8 +136,7 @@ plic0: interrupt-controller@e4000000 { compatible = "riscv,plic0"; - #address-cells = <1>; - #interrupt-cells = <1>; + #interrupt-cells = <2>; interrupt-controller; reg = <0xe4000000 0x2000000>; riscv,ndev=<71>; @@ -146,7 +148,6 @@ plic1: interrupt-controller@e6400000 { compatible = "riscv,plic1"; - #address-cells = <1>; #interrupt-cells = <1>; interrupt-controller; reg = <0xe6400000 0x400000>; diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts index f654f4809a..74cff9122d 100644 --- a/arch/riscv/dts/ae350_64.dts +++ b/arch/riscv/dts/ae350_64.dts @@ -1,6 +1,9 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + /dts-v1/; #include "binman.dtsi" +#include "ae350-u-boot.dtsi" / { #address-cells = <2>; @@ -14,7 +17,7 @@ }; chosen { - bootargs = "console=ttyS0,38400n8 debug loglevel=7"; + bootargs = "console=ttyS0,38400n8 debug loglevel=7"; stdout-path = "uart0:38400n8"; }; @@ -133,7 +136,6 @@ plic0: interrupt-controller@e4000000 { compatible = "riscv,plic0"; - #address-cells = <2>; #interrupt-cells = <2>; interrupt-controller; reg = <0x0 0xe4000000 0x0 0x2000000>; @@ -146,7 +148,6 @@ plic1: interrupt-controller@e6400000 { compatible = "riscv,plic1"; - #address-cells = <2>; #interrupt-cells = <2>; interrupt-controller; reg = <0x0 0xe6400000 0x0 0x400000>; diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 221a5fe324..5e113ee8c9 100644 --- a/arch/riscv/lib/andes_plic.c +++ b/arch/riscv/lib/andes_plic.c @@ -105,9 +105,11 @@ int riscv_clear_ipi(int hart) int riscv_get_ipi(int hart, int *pending) { + unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart)); + *pending = readl((void __iomem *)PENDING_REG(gd->arch.plic, gd->arch.boot_hart)); - *pending = !!(*pending & SEND_IPI_TO_HART(hart)); + *pending = !!(*pending & ipi); return 0; } diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 5ca3bc502a..8e7eaf2d15 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -14,11 +14,11 @@ aliases { console = &uart0; - eth0 = "/eth@10002000"; - eth2 = &swp_0; - eth3 = ð_3; - eth4 = &dsa_eth0; - eth5 = ð_5; + ethernet0 = "/eth@10002000"; + ethernet2 = &swp_0; + ethernet3 = ð_3; + ethernet4 = &dsa_eth0; + ethernet5 = ð_5; gpio1 = &gpio_a; gpio2 = &gpio_b; gpio3 = &gpio_c; diff --git a/arch/x86/cpu/u-boot-64.lds b/arch/x86/cpu/u-boot-64.lds index 98c7f8e9c5..ee0812aefb 100644 --- a/arch/x86/cpu/u-boot-64.lds +++ b/arch/x86/cpu/u-boot-64.lds @@ -107,4 +107,5 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + /DISCARD/ : { *(.note.gnu.property) } } diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds index 4a655bf9b5..346f60bdac 100644 --- a/arch/x86/cpu/u-boot-spl.lds +++ b/arch/x86/cpu/u-boot-spl.lds @@ -82,6 +82,7 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + /DISCARD/ : { *(.note.gnu.property) } #if defined(CONFIG_SPL_X86_16BIT_INIT) || defined(CONFIG_TPL_X86_16BIT_INIT) /* diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds index a283c290ee..22fde01e74 100644 --- a/arch/x86/cpu/u-boot.lds +++ b/arch/x86/cpu/u-boot.lds @@ -105,6 +105,7 @@ SECTIONS /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } + /DISCARD/ : { *(.note.gnu.property) } #ifdef CONFIG_X86_16BIT_INIT /* diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 15cbf92550..428cd23a19 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -10,11 +10,13 @@ #include <asm/global_data.h> #include <asm/io.h> #include <asm/gpio.h> +#include <button.h> #include <clk.h> #include <dm.h> #include <env.h> #include <fdt_support.h> #include <init.h> +#include <led.h> #include <linux/delay.h> #include <linux/libfdt.h> #include <linux/string.h> @@ -44,6 +46,8 @@ #define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0" #define PCIE_PATH "/soc/pcie@d0070000" #define SFP_PATH "/sfp" +#define LED_PATH "/leds/led" +#define BUTTON_PATH "/gpio-keys/reset" DECLARE_GLOBAL_DATA_PTR; @@ -373,6 +377,114 @@ int misc_init_r(void) return 0; } +static void mox_phy_modify(struct phy_device *phydev, int page, int reg, + u16 mask, u16 set) +{ + int val; + + val = phydev->drv->readext(phydev, MDIO_DEVAD_NONE, page, reg); + val &= ~mask; + val |= set; + phydev->drv->writeext(phydev, MDIO_DEVAD_NONE, page, reg, val); +} + +static void mox_phy_leds_start_blinking(void) +{ + struct phy_device *phydev; + struct mii_dev *bus; + + bus = miiphy_get_dev_by_name("neta@30000"); + if (!bus) { + printf("Cannot get MDIO bus device!\n"); + return; + } + + phydev = phy_find_by_mask(bus, BIT(1), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + printf("Cannot get ethernet PHY!\n"); + return; + } + + mox_phy_modify(phydev, 3, 0x12, 0x700, 0x400); + mox_phy_modify(phydev, 3, 0x10, 0xff, 0xbb); +} + +static bool read_reset_button(void) +{ + struct udevice *button, *led; + int i; + + if (device_get_global_by_ofnode(ofnode_path(BUTTON_PATH), &button)) { + printf("Cannot find reset button!\n"); + return false; + } + + if (device_get_global_by_ofnode(ofnode_path(LED_PATH), &led)) { + printf("Cannot find status LED!\n"); + return false; + } + + led_set_state(led, LEDST_ON); + + for (i = 0; i < 21; ++i) { + if (button_get_state(button) != BUTTON_ON) + return false; + if (i < 20) + mdelay(50); + } + + led_set_state(led, LEDST_OFF); + + return true; +} + +static void handle_reset_button(void) +{ + const char * const vars[1] = { "bootcmd_rescue", }; + + /* + * Ensure that bootcmd_rescue has always stock value, so that running + * run bootcmd_rescue + * always works correctly. + */ + env_set_default_vars(1, (char * const *)vars, 0); + + if (read_reset_button()) { + const char * const vars[2] = { + "bootcmd", + "distro_bootcmd", + }; + + /* + * Set the above envs to their default values, in case the user + * managed to break them. + */ + env_set_default_vars(2, (char * const *)vars, 0); + + /* Ensure bootcmd_rescue is used by distroboot */ + env_set("boot_targets", "rescue"); + + /* start blinking PHY LEDs */ + mox_phy_leds_start_blinking(); + + printf("RESET button was pressed, overwriting boot_targets!\n"); + } else { + /* + * In case the user somehow managed to save environment with + * boot_targets=rescue, reset boot_targets to default value. + * This could happen in subsequent commands if bootcmd_rescue + * failed. + */ + if (!strcmp(env_get("boot_targets"), "rescue")) { + const char * const vars[1] = { + "boot_targets", + }; + + env_set_default_vars(1, (char * const *)vars, 0); + } + } +} + static void mox_print_info(void) { int ret, board_version, ram_size; @@ -543,6 +655,8 @@ int last_stage_init(void) printf("\n"); + handle_reset_button(); + return 0; } diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index ade923f599..8b2f94f959 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -339,9 +339,17 @@ static int set_regdomain(void) static void handle_reset_button(void) { + const char * const vars[1] = { "bootcmd_rescue", }; int ret; u8 reset_status; + /* + * Ensure that bootcmd_rescue has always stock value, so that running + * run bootcmd_rescue + * always works correctly. + */ + env_set_default_vars(1, (char * const *)vars, 0); + ret = omnia_mcu_read(CMD_GET_RESET, &reset_status, 1); if (ret) { printf("omnia_mcu_read failed: %i, reset status unknown!\n", @@ -352,9 +360,8 @@ static void handle_reset_button(void) env_set_ulong("omnia_reset", reset_status); if (reset_status) { - const char * const vars[3] = { + const char * const vars[2] = { "bootcmd", - "bootcmd_rescue", "distro_bootcmd", }; @@ -362,7 +369,7 @@ static void handle_reset_button(void) * Set the above envs to their default values, in case the user * managed to break them. */ - env_set_default_vars(3, (char * const *)vars, 0); + env_set_default_vars(2, (char * const *)vars, 0); /* Ensure bootcmd_rescue is used by distroboot */ env_set("boot_targets", "rescue"); diff --git a/board/congatec/cgtqmx8/Kconfig b/board/congatec/cgtqmx8/Kconfig new file mode 100644 index 0000000000..7273039261 --- /dev/null +++ b/board/congatec/cgtqmx8/Kconfig @@ -0,0 +1,14 @@ +if TARGET_CONGA_QMX8 + +config SYS_BOARD + default "cgtqmx8" + +config SYS_VENDOR + default "congatec" + +config SYS_CONFIG_NAME + default "cgtqmx8" + +source "board/congatec/common/Kconfig" + +endif diff --git a/board/congatec/cgtqmx8/MAINTAINERS b/board/congatec/cgtqmx8/MAINTAINERS new file mode 100644 index 0000000000..53bc0f93b7 --- /dev/null +++ b/board/congatec/cgtqmx8/MAINTAINERS @@ -0,0 +1,7 @@ +i.MX8QM CGTQMX8 BOARD +M: Oliver Graute <oliver.graute@kococonnector.com> +S: Maintained +F: board/congatec/cgtqmx8/ +F: arch/arm/dts/imx8qm-cgtqmx8.dts +F: include/configs/cgtqmx8.h +F: configs/cgtqmx8_defconfig diff --git a/board/congatec/cgtqmx8/Makefile b/board/congatec/cgtqmx8/Makefile new file mode 100644 index 0000000000..4b59dbb6bc --- /dev/null +++ b/board/congatec/cgtqmx8/Makefile @@ -0,0 +1,11 @@ +# +# Copyright 2017 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += cgtqmx8.o + +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +endif diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c new file mode 100644 index 0000000000..fb0cf09138 --- /dev/null +++ b/board/congatec/cgtqmx8/cgtqmx8.c @@ -0,0 +1,460 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 congatec AG + * Copyright (C) 2019 Oliver Graute <oliver.graute@kococonnector.com> + */ +#include <common.h> +#include <errno.h> +#include <linux/libfdt.h> +#include <fsl_esdhc.h> +#include <init.h> + +#include <asm/io.h> +#include <asm/gpio.h> +#include <asm/arch/clock.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/imx8-pins.h> +#include <usb.h> +#include <asm/arch/iomux.h> +#include <asm/arch/sys_proto.h> +#include <linux/delay.h> +#include <power-domain.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define ESDHC_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define ESDHC_CLK_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define ENET_INPUT_PAD_CTRL ((SC_PAD_CONFIG_OD_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_18V_10MA << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define ENET_NORMAL_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_18V_10MA << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define FSPI_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define I2C_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ + (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ + (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ + (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) + +static iomux_cfg_t uart0_pads[] = { + SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +void board_late_mmc_env_init(void); +void init_clk_usdhc(u32 index); +int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg); + +static void setup_iomux_uart(void) +{ + imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads)); +} + +int board_early_init_f(void) +{ + /* sc_ipc_t ipcHndl = 0; */ + sc_err_t scierr = 0; + + /* When start u-boot in XEN VM, directly return */ + /* if (IS_ENABLED(CONFIG_XEN)) */ + /* return 0; */ + + /* ipcHndl = gd->arch.ipc_channel_handle; */ + + /* Power up UART0, this is very early while power domain is not working */ + scierr = sc_pm_set_resource_power_mode(-1, SC_R_UART_0, SC_PM_PW_MODE_ON); + if (scierr != SC_ERR_NONE) + return 0; + + /* Set UART0 clock root to 80 MHz */ + sc_pm_clock_rate_t rate = 80000000; + + scierr = sc_pm_set_clock_rate(-1, SC_R_UART_0, 2, &rate); + if (scierr != SC_ERR_NONE) + return 0; + + /* Enable UART0 clock root */ + scierr = sc_pm_clock_enable(-1, SC_R_UART_0, 2, true, false); + if (scierr != SC_ERR_NONE) + return 0; + + setup_iomux_uart(); + + return 0; +} + +#if IS_ENABLED(CONFIG_FSL_ESDHC_IMX) + +#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 22) +#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 12) + +static struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { + {USDHC1_BASE_ADDR, 0, 8}, + {USDHC2_BASE_ADDR, 0, 4}, + {USDHC3_BASE_ADDR, 0, 4}, +}; + +static iomux_cfg_t emmc0[] = { + SC_P_EMMC0_CLK | MUX_PAD_CTRL(ESDHC_CLK_PAD_CTRL), + SC_P_EMMC0_CMD | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA0 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA1 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA2 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA3 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA4 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA5 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA6 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_DATA7 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_RESET_B | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_EMMC0_STROBE | MUX_PAD_CTRL(ESDHC_PAD_CTRL), +}; + +static iomux_cfg_t usdhc1_sd[] = { + SC_P_USDHC1_CLK | MUX_PAD_CTRL(ESDHC_CLK_PAD_CTRL), + SC_P_USDHC1_CMD | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA0 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA1 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA2 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA3 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA6 | MUX_MODE_ALT(2) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_DATA7 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_RESET_B | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC1_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL), +}; + +static iomux_cfg_t usdhc2_sd[] = { + SC_P_USDHC2_CLK | MUX_PAD_CTRL(ESDHC_CLK_PAD_CTRL), + SC_P_USDHC2_CMD | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA0 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA1 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA2 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_DATA3 | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_RESET_B | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_WP | MUX_PAD_CTRL(ESDHC_PAD_CTRL), + SC_P_USDHC2_CD_B | MUX_MODE_ALT(3) | MUX_PAD_CTRL(ESDHC_PAD_CTRL), +}; + +int board_mmc_init(struct bd_info *bis) +{ + int i, ret; + struct power_domain pd; + + /* + * According to the board_mmc_init() the following map is done: + * (U-Boot device node) (Physical Port) + * mmc0 (onboard eMMC) USDHC1 + * mmc1 (external SD card) USDHC2 + * mmc2 (onboard µSD) USDHC3 + */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + /* onboard eMMC */ + if (!imx8_power_domain_lookup_name("conn_sdhc0", &pd)) + power_domain_on(&pd); + + imx8_iomux_setup_multiple_pads(emmc0, ARRAY_SIZE(emmc0)); + init_clk_usdhc(0); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; + case 1: + /* external SD card */ + if (!imx8_power_domain_lookup_name("conn_sdhc1", &pd)) + power_domain_on(&pd); + + imx8_iomux_setup_multiple_pads(usdhc1_sd, ARRAY_SIZE(usdhc1_sd)); + init_clk_usdhc(1); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + gpio_request(USDHC1_CD_GPIO, "sd1_cd"); + gpio_direction_input(USDHC1_CD_GPIO); + break; + case 2: + /* onboard µSD */ + if (!imx8_power_domain_lookup_name("conn_sdhc2", &pd)) + power_domain_on(&pd); + + imx8_iomux_setup_multiple_pads(usdhc2_sd, ARRAY_SIZE(usdhc2_sd)); + init_clk_usdhc(2); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + gpio_request(USDHC2_CD_GPIO, "sd2_cd"); + gpio_direction_input(USDHC2_CD_GPIO); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) than supported by the board\n", i + 1); + return 0; + } + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize mmc dev %d\n", i); + return ret; + } + } + + return 0; +} + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = 1; + break; + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; + } + + return ret; +} + +#endif /* CONFIG_FSL_ESDHC_IMX */ + +#if (IS_ENABLED(CONFIG_FEC_MXC)) + +#include <miiphy.h> + +static iomux_cfg_t pad_enet0[] = { + SC_P_ENET0_RGMII_RX_CTL | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD0 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD1 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD2 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXD3 | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_RXC | MUX_PAD_CTRL(ENET_INPUT_PAD_CTRL), + SC_P_ENET0_RGMII_TX_CTL | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD0 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD1 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD2 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXD3 | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_RGMII_TXC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_MDC | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), + SC_P_ENET0_MDIO | MUX_PAD_CTRL(ENET_NORMAL_PAD_CTRL), +}; + +static void setup_iomux_fec(void) +{ + imx8_iomux_setup_multiple_pads(pad_enet0, ARRAY_SIZE(pad_enet0)); +} + +static void enet_device_phy_reset(void) +{ + gpio_set_value(FEC0_RESET, 0); + udelay(50); + gpio_set_value(FEC0_RESET, 1); + + /* The board has a long delay for this reset to become stable */ + mdelay(200); +} + +int board_eth_init(struct bd_info *bis) +{ + setup_iomux_fec(); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); + + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +static int setup_fec(void) +{ + /* Reset ENET PHY */ + enet_device_phy_reset(); + + return 0; +} +#endif + +#ifdef CONFIG_MXC_GPIO + +#define LVDS_ENABLE IMX_GPIO_NR(1, 6) +#define BKL_ENABLE IMX_GPIO_NR(1, 7) + +static iomux_cfg_t board_gpios[] = { + SC_P_LVDS0_I2C0_SCL | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), + SC_P_LVDS0_I2C0_SDA | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), + SC_P_ESAI1_FST | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL), +}; + +static void board_gpio_init(void) +{ + imx8_iomux_setup_multiple_pads(board_gpios, ARRAY_SIZE(board_gpios)); + + /* enable LVDS */ + gpio_request(LVDS_ENABLE, "lvds_enable"); + gpio_direction_output(LVDS_ENABLE, 1); + + /* enable backlight */ + gpio_request(BKL_ENABLE, "bkl_enable"); + gpio_direction_output(BKL_ENABLE, 1); + + /* ethernet reset */ + gpio_request(FEC0_RESET, "enet0_reset"); + gpio_direction_output(FEC0_RESET, 1); +} +#endif + +int checkboard(void) +{ + puts("Board: conga-QMX8\n"); + + build_info(); + print_bootinfo(); + + return 0; +} + +int board_init(void) +{ + if (IS_ENABLED(CONFIG_XEN)) + return 0; + +#ifdef CONFIG_MXC_GPIO + board_gpio_init(); +#endif + +#if (IS_ENABLED(CONFIG_FEC_MXC)) + setup_fec(); +#endif + + return 0; +} + +void detail_board_ddr_info(void) +{ + puts("\nDDR "); +} + +/* + * Board specific reset that is system reset. + */ +void reset_cpu(ulong addr) +{ + /* TODO */ +} + +#ifdef CONFIG_OF_BOARD_SETUP +int ft_board_setup(void *blob, struct bd_info *bd) +{ + return 0; +} +#endif + +int board_mmc_get_env_dev(int devno) +{ + /* Use EMMC */ + if (IS_ENABLED(CONFIG_XEN)) + return 0; + + return devno; +} + +int mmc_map_to_kernel_blk(int dev_no) +{ + /* Use EMMC */ + if (IS_ENABLED(CONFIG_XEN)) + return 0; + + return dev_no; +} + +extern u32 _end_ofs; +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + env_set("board_name", "QMX8"); + env_set("board_rev", "iMX8QM"); +#endif + + env_set("sec_boot", "no"); +#ifdef CONFIG_AHAB_BOOT + env_set("sec_boot", "yes"); +#endif + +#ifdef CONFIG_ENV_IS_IN_MMC + board_late_mmc_env_init(); +#endif + +#ifdef IMX_LOAD_HDMI_FIMRWARE + char *end_of_uboot; + char command[256]; + + end_of_uboot = (char *)(ulong)(CONFIG_SYS_TEXT_BASE + _end_ofs + + fdt_totalsize(gd->fdt_blob)); + end_of_uboot += 9; + + /* load hdmitxfw.bin and hdmirxfw.bin*/ + memcpy(IMX_HDMI_FIRMWARE_LOAD_ADDR, end_of_uboot, + IMX_HDMITX_FIRMWARE_SIZE + IMX_HDMIRX_FIRMWARE_SIZE); + + sprintf(command, "hdp load 0x%x", IMX_HDMI_FIRMWARE_LOAD_ADDR); + run_command(command, 0); + + sprintf(command, "hdprx load 0x%x", + IMX_HDMI_FIRMWARE_LOAD_ADDR + IMX_HDMITX_FIRMWARE_SIZE); + run_command(command, 0); +#endif + + return 0; +} + +#ifdef CONFIG_FSL_FASTBOOT +#ifdef CONFIG_ANDROID_RECOVERY +int is_recovery_key_pressing(void) +{ + return 0; /*TODO*/ +} +#endif /*CONFIG_ANDROID_RECOVERY*/ +#endif /*CONFIG_FSL_FASTBOOT*/ + +/* Only Enable USB3 resources currently */ +int board_usb_init(int index, enum usb_init_type init) +{ + return 0; +} diff --git a/board/congatec/cgtqmx8/imximage.cfg b/board/congatec/cgtqmx8/imximage.cfg new file mode 100644 index 0000000000..e324c7ca37 --- /dev/null +++ b/board/congatec/cgtqmx8/imximage.cfg @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#define __ASSEMBLY__ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX8QM */ +SOC_TYPE IMX8QM +/* Append seco container image */ +APPEND mx8qm-ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add scfw image with exec attribute */ +IMAGE SCU mx8qm-val-scfw-tcm.bin +/* Add ATF image with exec attribute */ +IMAGE A35 bl31.bin 0x80000000 +/* Add U-Boot image with load attribute */ +DATA A35 u-boot-dtb.bin 0x80020000 diff --git a/board/congatec/cgtqmx8/spl.c b/board/congatec/cgtqmx8/spl.c new file mode 100644 index 0000000000..2a5d4c1bcd --- /dev/null +++ b/board/congatec/cgtqmx8/spl.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + * + */ + +#include <common.h> +#include <dm.h> +#include <init.h> +#include <log.h> +#include <spl.h> +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> +#include <dm/lists.h> + +DECLARE_GLOBAL_DATA_PTR; + +void spl_board_init(void) +{ + struct udevice *dev; + int offset; + + uclass_find_first_device(UCLASS_MISC, &dev); + + for (; dev; uclass_find_next_device(&dev)) { + if (device_probe(dev)) + continue; + } + + offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "nxp,imx8-pd"); + while (offset != -FDT_ERR_NOTFOUND) { + lists_bind_fdt(gd->dm_root, offset_to_ofnode(offset), + NULL, true); + offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset, + "nxp,imx8-pd"); + } + + uclass_find_first_device(UCLASS_POWER_DOMAIN, &dev); + + for (; dev; uclass_find_next_device(&dev)) { + if (device_probe(dev)) + continue; + } + + arch_cpu_init(); + + board_early_init_f(); + + timer_init(); + + preloader_console_init(); + + puts("Normal Boot\n"); +} + +#if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif + +void board_init_f(ulong dummy) +{ + /* Clear global data */ + memset((void *)gd, 0, sizeof(gd_t)); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + board_init_r(NULL, 0); +} diff --git a/board/congatec/common/Kconfig b/board/congatec/common/Kconfig new file mode 100644 index 0000000000..5c205bd830 --- /dev/null +++ b/board/congatec/common/Kconfig @@ -0,0 +1,48 @@ +if !ARCH_IMX8M && !ARCH_IMX8 + +config CHAIN_OF_TRUST + depends on !FIT_SIGNATURE && SECURE_BOOT + imply CMD_BLOB + imply CMD_HASH if ARM + select FSL_CAAM + select SPL_BOARD_INIT if (ARM && SPL) + select SHA_HW_ACCEL + select SHA_PROG_HW_ACCEL + select ENV_IS_NOWHERE + select CMD_EXT4 if ARM + select CMD_EXT4_WRITE if ARM + bool + default y + +config CMD_ESBC_VALIDATE + bool "Enable the 'esbc_validate' and 'esbc_halt' commands" + default y if CHAIN_OF_TRUST + help + This option enables two commands used for secure booting: + + esbc_validate - validate signature using RSA verification + esbc_halt - put the core in spin loop (Secure Boot Only) + +endif + +config VOL_MONITOR_LTC3882_READ + depends on VID + bool "Enable the LTC3882 voltage monitor read" + default n + help + This option enables LTC3882 voltage monitor read + functionality. It is used by common VID driver. + +config VOL_MONITOR_LTC3882_SET + depends on VID + bool "Enable the LTC3882 voltage monitor set" + default n + help + This option enables LTC3882 voltage monitor set + functionality. It is used by common VID driver. + +config USB_TCPC + bool "USB Typec port controller simple driver" + default n + help + Enable USB type-c port controller (TCPC) driver diff --git a/board/congatec/common/Makefile b/board/congatec/common/Makefile new file mode 100644 index 0000000000..d4ddfbf971 --- /dev/null +++ b/board/congatec/common/Makefile @@ -0,0 +1,23 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +MINIMAL= + +ifdef CONFIG_SPL_BUILD +ifdef CONFIG_SPL_INIT_MINIMAL +MINIMAL=y +endif +endif + +ifdef MINIMAL +# necessary to create built-in.o +obj- := __dummy__.o +else + +obj-y += mmc.o + +endif diff --git a/board/congatec/common/mmc.c b/board/congatec/common/mmc.c new file mode 100644 index 0000000000..bb7a3d4a9a --- /dev/null +++ b/board/congatec/common/mmc.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP + * + */ +#include <common.h> +#include <linux/errno.h> +#include <asm/io.h> +#include <env.h> +#include <command.h> +#include <stdbool.h> +#include <mmc.h> + +static int check_mmc_autodetect(void) +{ + char *autodetect_str = env_get("mmcautodetect"); + + if ((autodetect_str) && (strcmp(autodetect_str, "yes") == 0)) + return 1; + + return 0; +} + +/* This should be defined for each board */ +__weak int mmc_map_to_kernel_blk(int dev_no) +{ + return dev_no; +} + +void board_late_mmc_env_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_dev(); + + if (!check_mmc_autodetect()) + return; + + env_set_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", + mmc_map_to_kernel_blk(dev_no)); + env_set("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c index 6e8296293b..13ef101e7f 100644 --- a/board/freescale/common/vid.c +++ b/board/freescale/common/vid.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-21 NXP * Copyright 2020 Stephen Carlson <stcarlso@linux.microsoft.com> */ @@ -793,13 +793,16 @@ static int do_vdd_override(struct cmd_tbl *cmdtp, char *const argv[]) { ulong override; + int ret = 0; if (argc < 2) return CMD_RET_USAGE; - if (!strict_strtoul(argv[1], 10, &override)) - adjust_vdd(override); /* the value is checked by callee */ - else + if (!strict_strtoul(argv[1], 10, &override)) { + ret = adjust_vdd(override); + if (ret < 0) + return CMD_RET_FAILURE; + } else return CMD_RET_USAGE; return 0; } diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index 2cd651b943..6473ee0572 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -23,6 +23,7 @@ #include <fsl_mmdc.h> #include <netdev.h> #include <fsl_sec.h> +#include <net/pfe_eth/pfe/pfe_hw.h> DECLARE_GLOBAL_DATA_PTR; @@ -185,6 +186,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_PFE +void board_quiesce_devices(void) +{ + pfe_command_stop(0, NULL); +} +#endif + int ft_board_setup(void *blob, struct bd_info *bd) { arch_fixup_fdt(blob); diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c index cfe3f3360c..33a0910a19 100644 --- a/board/freescale/ls1012aqds/ls1012aqds.c +++ b/board/freescale/ls1012aqds/ls1012aqds.c @@ -32,6 +32,7 @@ #include "../common/qixis.h" #include "ls1012aqds_qixis.h" #include "ls1012aqds_pfe.h" +#include <net/pfe_eth/pfe/pfe_hw.h> DECLARE_GLOBAL_DATA_PTR; @@ -163,6 +164,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_PFE +void board_quiesce_devices(void) +{ + pfe_command_stop(0, NULL); +} +#endif + int esdhc_status_fixup(void *blob, const char *compat) { char esdhc0_path[] = "/soc/esdhc@1560000"; diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c index 41bcf6f935..62e8af48cf 100644 --- a/board/freescale/ls1012ardb/ls1012ardb.c +++ b/board/freescale/ls1012ardb/ls1012ardb.c @@ -28,6 +28,7 @@ #include <fsl_mmdc.h> #include <netdev.h> #include <fsl_sec.h> +#include <net/pfe_eth/pfe/pfe_hw.h> DECLARE_GLOBAL_DATA_PTR; @@ -186,6 +187,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_FSL_PFE +void board_quiesce_devices(void) +{ + pfe_command_stop(0, NULL); +} +#endif + #ifdef CONFIG_TARGET_LS1012ARDB int esdhc_status_fixup(void *blob, const char *compat) { diff --git a/board/freescale/p1_p2_rdb_pc/MAINTAINERS b/board/freescale/p1_p2_rdb_pc/MAINTAINERS index b737b09b09..0004d717d1 100644 --- a/board/freescale/p1_p2_rdb_pc/MAINTAINERS +++ b/board/freescale/p1_p2_rdb_pc/MAINTAINERS @@ -1,5 +1,5 @@ P1_P2_RDB_PC BOARD -#M: - +M: Priyanka Jain <priyanka.jain@nxp.com> S: Maintained F: board/freescale/p1_p2_rdb_pc/ F: include/configs/p1_p2_rdb_pc.h diff --git a/board/freescale/p2041rdb/MAINTAINERS b/board/freescale/p2041rdb/MAINTAINERS index d93cb0bebb..2121243e14 100644 --- a/board/freescale/p2041rdb/MAINTAINERS +++ b/board/freescale/p2041rdb/MAINTAINERS @@ -1,5 +1,5 @@ P2041RDB BOARD -#M: - +M: Priyanka Jain <priyanka.jain@nxp.com> S: Maintained F: board/freescale/p2041rdb/ F: include/configs/P2041RDB.h diff --git a/board/freescale/t102xrdb/MAINTAINERS b/board/freescale/t102xrdb/MAINTAINERS index ebb17b8131..471ea07d3c 100644 --- a/board/freescale/t102xrdb/MAINTAINERS +++ b/board/freescale/t102xrdb/MAINTAINERS @@ -1,6 +1,6 @@ T102XRDB BOARD -#M: Shengzhou Liu <Shengzhou.Liu@freescale.com> -S: Orphan (since 2018-05) +M: Priyanka Jain <priyanka.jain@nxp.com> +S: Maintained F: board/freescale/t102xrdb/ F: include/configs/T102xRDB.h F: configs/T1024RDB_defconfig diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig index 6f0b012bab..8249c5df96 100644 --- a/board/freescale/t208xrdb/Kconfig +++ b/board/freescale/t208xrdb/Kconfig @@ -9,6 +9,10 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "T208xRDB" +config T2080RDB_REV_D + bool "Support for T2080RDB revisions D and up" + default n + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/t208xrdb/MAINTAINERS b/board/freescale/t208xrdb/MAINTAINERS index f894f77b73..6e9b25fa04 100644 --- a/board/freescale/t208xrdb/MAINTAINERS +++ b/board/freescale/t208xrdb/MAINTAINERS @@ -8,6 +8,10 @@ F: configs/T2080RDB_NAND_defconfig F: configs/T2080RDB_SDCARD_defconfig F: configs/T2080RDB_SPIFLASH_defconfig F: configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +F: configs/T2080RDB_revD_defconfig +F: configs/T2080RDB_revD_NAND_defconfig +F: configs/T2080RDB_revD_SDCARD_defconfig +F: configs/T2080RDB_revD_SPIFLASH_defconfig T2080RDB_SECURE_BOOT BOARD M: Ruchika Gupta <ruchika.gupta@nxp.com> diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c index b0ff4b1f37..e4592eac15 100644 --- a/board/freescale/t208xrdb/eth_t208xrdb.c +++ b/board/freescale/t208xrdb/eth_t208xrdb.c @@ -26,84 +26,7 @@ #include <fsl_dtsec.h> #include <asm/fsl_serdes.h> -int board_eth_init(struct bd_info *bis) -{ -#if defined(CONFIG_FMAN_ENET) - int i, interface; - struct memac_mdio_info dtsec_mdio_info; - struct memac_mdio_info tgec_mdio_info; - struct mii_dev *dev; - ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u32 srds_s1; - - srds_s1 = in_be32(&gur->rcwsr[4]) & - FSL_CORENET2_RCWSR4_SRDS1_PRTCL; - srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT; - - dtsec_mdio_info.regs = - (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR; - - dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME; - - /* Register the 1G MDIO bus */ - fm_memac_mdio_init(bis, &dtsec_mdio_info); - - tgec_mdio_info.regs = - (struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR; - tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME; - - /* Register the 10G MDIO bus */ - fm_memac_mdio_init(bis, &tgec_mdio_info); - - /* Set the two on-board RGMII PHY address */ - fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR); - fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR); - - switch (srds_s1) { - case 0x66: - case 0x6b: - fm_info_set_phy_address(FM1_10GEC1, CORTINA_PHY_ADDR1); - fm_info_set_phy_address(FM1_10GEC2, CORTINA_PHY_ADDR2); - fm_info_set_phy_address(FM1_10GEC3, FM1_10GEC3_PHY_ADDR); - fm_info_set_phy_address(FM1_10GEC4, FM1_10GEC4_PHY_ADDR); - break; - default: - printf("SerDes1 protocol 0x%x is not supported on T208xRDB\n", - srds_s1); - break; - } - - for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) { - interface = fm_info_get_enet_if(i); - switch (interface) { - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RGMII_TXID: - case PHY_INTERFACE_MODE_RGMII_RXID: - case PHY_INTERFACE_MODE_RGMII_ID: - dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); - fm_info_set_mdio(i, dev); - break; - default: - break; - } - } - - for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) { - switch (fm_info_get_enet_if(i)) { - case PHY_INTERFACE_MODE_XGMII: - dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); - fm_info_set_mdio(i, dev); - break; - default: - break; - } - } - - cpu_eth_init(bis); -#endif /* CONFIG_FMAN_ENET */ - - return pci_eth_init(bis); -} +extern u8 get_hw_revision(void); /* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two * "fsl,dpa-ethernet" nodes that reference them. @@ -139,6 +62,39 @@ void fdt_fixup_board_fman_ethernet(void *fdt) } } +/* Update the address of the second Aquantia PHY on boards revision D and up. + * Also rename the PHY node to align with the address change. + */ +void fdt_fixup_board_phy(void *fdt) +{ + const char phy_path[] = + "/soc@ffe000000/fman@400000/mdio@fd000/ethernet-phy@1"; + int ret, offset, new_addr = AQR113C_PHY_ADDR2; + char new_name[] = "ethernet-phy@00"; + + if (get_hw_revision() == 'C') + return; + + offset = fdt_path_offset(fdt, phy_path); + if (offset < 0) { + printf("ethernet-phy@1 node not found in the dts\n"); + return; + } + + ret = fdt_setprop(fdt, offset, "reg", &new_addr, sizeof(new_addr)); + if (ret < 0) { + printf("Unable to set 'reg' for node ethernet-phy@1: %s\n", + fdt_strerror(ret)); + return; + } + + sprintf(new_name, "ethernet-phy@%x", new_addr); + ret = fdt_set_name(fdt, offset, new_name); + if (ret < 0) + printf("Unable to rename node ethernet-phy@1: %s\n", + fdt_strerror(ret)); +} + void fdt_fixup_board_enet(void *fdt) { return; diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 7ccb205c64..1f0cdee0b8 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -27,14 +27,29 @@ DECLARE_GLOBAL_DATA_PTR; +u8 get_hw_revision(void) +{ + u8 ver = CPLD_READ(hw_ver); + + switch (ver) { + default: + case 0x1: + return 'C'; + case 0x0: + return 'D'; + case 0x2: + return 'E'; + } +} + int checkboard(void) { struct cpu_type *cpu = gd->arch.cpu; static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"}; printf("Board: %sRDB, ", cpu->name); - printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ", - CPLD_READ(hw_ver), CPLD_READ(sw_ver)); + printf("Board rev: %c CPLD ver: 0x%02x, boot from ", + get_hw_revision(), CPLD_READ(sw_ver)); #ifdef CONFIG_SDCARD puts("SD/MMC\n"); @@ -136,12 +151,9 @@ int ft_board_setup(void *blob, struct bd_info *bd) fsl_fdt_fixup_dr_usb(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN -#ifndef CONFIG_DM_ETH - fdt_fixup_fman_ethernet(blob); -#else fdt_fixup_board_fman_ethernet(blob); -#endif fdt_fixup_board_enet(blob); + fdt_fixup_board_phy(blob); #endif return 0; diff --git a/board/freescale/t208xrdb/t208xrdb.h b/board/freescale/t208xrdb/t208xrdb.h index cd0a9f44da..edbc860c9d 100644 --- a/board/freescale/t208xrdb/t208xrdb.h +++ b/board/freescale/t208xrdb/t208xrdb.h @@ -10,5 +10,6 @@ void fdt_fixup_board_enet(void *blob); void pci_of_setup(void *blob, struct bd_info *bd); void fdt_fixup_board_fman_ethernet(void *blob); +void fdt_fixup_board_phy(void *blob); #endif diff --git a/board/freescale/t4rdb/MAINTAINERS b/board/freescale/t4rdb/MAINTAINERS index 4ba5c3a546..7380408aae 100644 --- a/board/freescale/t4rdb/MAINTAINERS +++ b/board/freescale/t4rdb/MAINTAINERS @@ -1,6 +1,6 @@ T4RDB BOARD -#M: Chunhe Lan <Chunhe.Lan@freescale.com> -S: Orphan (since 2018-05) +M: Priyanka Jain <priyanka.jain@nxp.com> +S: Maintained F: board/freescale/t4rdb/ F: include/configs/T4240RDB.h F: configs/T4160RDB_defconfig diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index d73850c5b9..813f7d9f56 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -11,7 +11,6 @@ #include "ventana_eeprom.h" /* GPIO's common to all baseboards */ -#define GP_PHY_RST IMX_GPIO_NR(1, 30) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8) diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 5237f2dac4..1ed9c1a39f 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,7 +31,6 @@ #include <linux/ctype.h> #include <miiphy.h> #include <mtd_node.h> -#include <netdev.h> #include <pci.h> #include <linux/delay.h> #include <linux/libfdt.h> @@ -54,42 +53,6 @@ DECLARE_GLOBAL_DATA_PTR; struct ventana_board_info ventana_info; static int board_type; -/* ENET */ -static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - /* PHY nRST */ - IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG), -}; - -static void setup_iomux_enet(int gpio) -{ - SETUP_IOMUX_PADS(enet_pads); - - /* toggle PHY_RST# */ - gpio_request(gpio, "phy_rst#"); - gpio_direction_output(gpio, 0); - mdelay(10); - gpio_set_value(gpio, 1); - mdelay(100); -} - #ifdef CONFIG_USB_EHCI_MX6 /* toggle USB_HUB_RST# for boards that have it; it is not defined in dt */ int board_ehci_hcd_init(int port) @@ -195,40 +158,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) } #endif // CONFIG_MV88E61XX_SWITCH -int board_eth_init(struct bd_info *bis) -{ -#ifdef CONFIG_FEC_MXC - struct ventana_board_info *info = &ventana_info; - - if (test_bit(EECONFIG_ETH0, info->config)) { - setup_iomux_enet(GP_PHY_RST); - cpu_eth_init(bis); - } -#endif - -#ifdef CONFIG_E1000 - e1000_initialize(bis); -#endif - -#ifdef CONFIG_CI_UDC - /* For otg ethernet*/ - usb_eth_initialize(bis); -#endif - - /* default to the first detected enet dev */ - if (!env_get("ethprime")) { - struct eth_device *dev = eth_get_dev_by_index(0); - if (dev) { - env_set("ethprime", dev->name); - printf("set ethprime to %s\n", env_get("ethprime")); - } - } - - return 0; -} - #if defined(CONFIG_VIDEO_IPUV3) - static void enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); @@ -427,7 +357,6 @@ int power_init_board(void) return 0; } -#if defined(CONFIG_CMD_PCI) int imx6_pcie_toggle_reset(void) { if (board_type < GW_UNKNOWN) { @@ -448,6 +377,7 @@ int imx6_pcie_toggle_reset(void) #define MAX_PCI_DEVS 32 struct pci_dev { pci_dev_t devfn; + struct udevice *dev; unsigned short vendor; unsigned short device; unsigned short class; @@ -458,18 +388,21 @@ struct pci_dev pci_devs[MAX_PCI_DEVS]; int pci_devno; int pci_bridgeno; -void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, - unsigned short vendor, unsigned short device, - unsigned short class) +void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) { - int i; - u32 dw; + struct pci_child_plat *pdata = dev_get_parent_plat(udev); struct pci_dev *pdev = &pci_devs[pci_devno++]; + unsigned short vendor = pdata->vendor; + unsigned short device = pdata->device; + unsigned int class = pdata->class; + pci_dev_t dev = dm_pci_get_bdf(udev); + int i; debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device); /* store array of devs for later use in device-tree fixup */ + pdev->dev = udev; pdev->devfn = dev; pdev->vendor = vendor; pdev->device = device; @@ -496,19 +429,19 @@ void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, if (vendor == PCI_VENDOR_ID_PLX && (device & 0xfff0) == 0x8600 && PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + ulong val; debug("configuring PLX 860X downstream PERST#\n"); - pci_hose_read_config_dword(hose, dev, 0x62c, &dw); - dw |= 0xaaa8; /* GPIO1-7 outputs */ - pci_hose_write_config_dword(hose, dev, 0x62c, dw); + pci_bus_read_config(bus, dev, 0x62c, &val, PCI_SIZE_32); + val |= 0xaaa8; /* GPIO1-7 outputs */ + pci_bus_write_config(bus, dev, 0x62c, val, PCI_SIZE_32); - pci_hose_read_config_dword(hose, dev, 0x644, &dw); - dw |= 0xfe; /* GPIO1-7 output high */ - pci_hose_write_config_dword(hose, dev, 0x644, dw); + pci_bus_read_config(bus, dev, 0x644, &val, PCI_SIZE_32); + val |= 0xfe; /* GPIO1-7 output high */ + pci_bus_write_config(bus, dev, 0x644, val, PCI_SIZE_32); mdelay(100); } } -#endif /* CONFIG_CMD_PCI */ #ifdef CONFIG_SERIAL_TAG /* diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index 86a667067d..3a6c63b774 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -64,6 +64,13 @@ config SYS_PAX_BASE help IFC Base Address for PAXx FPGA. +config SYS_CLIPS_BASE + hex "CLIPS IFC Base Address" + default 0x78000000 + depends on ARCH_LS1021A + help + IFC Base Address for CLIPS FPGA. + config KM_CONSOLE_TTY string "KM Console" default "ttyS0" diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 2ce7462c56..016806a2a6 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -46,12 +46,14 @@ int set_km_env(void) unsigned int pram; unsigned int varaddr; unsigned int kernelmem; - char *p; unsigned long rootfssize = 0; + char envval[16]; + char *p; pnvramaddr = CONFIG_SYS_SDRAM_BASE + gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM - CONFIG_KM_PNVRAM; - env_set_hex("pnvramaddr", pnvramaddr); + sprintf(envval, "0x%x", pnvramaddr); + env_set("pnvramaddr", envval); /* try to read rootfssize (ram image) from environment */ p = env_get("rootfssize"); @@ -64,9 +66,12 @@ int set_km_env(void) varaddr = CONFIG_SYS_SDRAM_BASE + gd->ram_size - CONFIG_KM_RESERVED_PRAM - CONFIG_KM_PHRAM; env_set_hex("varaddr", varaddr); + sprintf(envval, "0x%x", varaddr); + env_set("varaddr", envval); kernelmem = gd->ram_size - 0x400 * pram; - env_set_hex("kernelmem", kernelmem); + sprintf(envval, "0x%x", kernelmem); + env_set("kernelmem", envval); return 0; } diff --git a/board/keymile/pg-wcom-ls102xa/Kconfig b/board/keymile/pg-wcom-ls102xa/Kconfig index 15c009dbe8..f0b5ceabb6 100644 --- a/board/keymile/pg-wcom-ls102xa/Kconfig +++ b/board/keymile/pg-wcom-ls102xa/Kconfig @@ -17,3 +17,23 @@ config BOARD_SPECIFIC_OPTIONS imply FS_CRAMFS endif + +if TARGET_PG_WCOM_EXPU1 + +config SYS_BOARD + default "pg-wcom-ls102xa" + +config SYS_VENDOR + default "keymile" + +config SYS_SOC + default "ls102xa" + +config SYS_CONFIG_NAME + default "pg-wcom-expu1" + +config BOARD_SPECIFIC_OPTIONS + def_bool y + imply FS_CRAMFS + +endif diff --git a/board/keymile/pg-wcom-ls102xa/MAINTAINERS b/board/keymile/pg-wcom-ls102xa/MAINTAINERS index e1bc90a7e6..26b202316c 100644 --- a/board/keymile/pg-wcom-ls102xa/MAINTAINERS +++ b/board/keymile/pg-wcom-ls102xa/MAINTAINERS @@ -6,5 +6,8 @@ S: Maintained F: board/keymile/pg-wcom-ls102xa/ F: include/configs/km/pg-wcom-ls102xa.h F: include/configs/pg-wcom-seli8.h +F: include/configs/pg-wcom-expu1.h F: configs/pg_wcom_seli8_defconfig +F: configs/pg_wcom_expu1_defconfig F: arch/arm/dts/ls1021a-pg-wcom-seli8.dts +F: arch/arm/dts/ls1021a-pg-wcom-expu1.dts diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 6b0e9631b3..db49e8ff22 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -70,19 +70,38 @@ int board_early_init_f(void) /* QRIO Configuration */ qrio_uprstreq(UPREQ_CORE_RST); - if (IS_ENABLED(CONFIG_TARGET_PG_WCOM_SELI8)) { - qrio_prstcfg(KM_LIU_RST, PRSTCFG_POWUP_UNIT_RST); - qrio_wdmask(KM_LIU_RST, true); +#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_SELI8) + qrio_prstcfg(KM_LIU_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(KM_LIU_RST, true); - qrio_prstcfg(KM_PAXK_RST, PRSTCFG_POWUP_UNIT_RST); - qrio_wdmask(KM_PAXK_RST, true); + qrio_prstcfg(KM_PAXK_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(KM_PAXK_RST, true); +#endif - qrio_prstcfg(KM_DBG_ETH_RST, PRSTCFG_POWUP_UNIT_CORE_RST); - qrio_prst(KM_DBG_ETH_RST, false, false); - } +#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_EXPU1) + qrio_prstcfg(WCOM_TMG_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(WCOM_TMG_RST, true); + + qrio_prstcfg(WCOM_PHY_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_prst(WCOM_PHY_RST, false, false); + + qrio_prstcfg(WCOM_QSFP_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_wdmask(WCOM_QSFP_RST, true); + + qrio_prstcfg(WCOM_CLIPS_RST, PRSTCFG_POWUP_UNIT_RST); + qrio_prst(WCOM_CLIPS_RST, false, false); +#endif + qrio_prstcfg(KM_DBG_ETH_RST, PRSTCFG_POWUP_UNIT_CORE_RST); + qrio_prst(KM_DBG_ETH_RST, false, false); i2c_deblock_gpio_cfg(); + /* enable the Unit LED (red) & Boot LED (on) */ + qrio_set_leds(); + + /* enable Application Buffer */ + qrio_enable_app_buffer(); + arch_soc_init(); return 0; @@ -128,6 +147,40 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } +#if defined(CONFIG_POST) +int post_hotkeys_pressed(void) +{ + /* DIC26_SELFTEST: GPRTA0, GPA0 */ + qrio_gpio_direction_input(QRIO_GPIO_A, 0); + return qrio_get_gpio(QRIO_GPIO_A, 0); +} + +ulong post_word_load(void) +{ + /* POST word is located at the beginning of reserved physical RAM */ + void *addr = (void *)(CONFIG_SYS_SDRAM_BASE + + gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8); + return in_le32(addr); +} + +void post_word_store(ulong value) +{ + /* POST word is located at the beginning of reserved physical RAM */ + void *addr = (void *)(CONFIG_SYS_SDRAM_BASE + + gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8); + out_le32(addr, value); +} + +int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset) +{ + /* Define only 1MiB range for mem_regions at the middle of the RAM */ + /* For 1GiB range mem_regions takes approx. 4min */ + *vstart = CONFIG_SYS_SDRAM_BASE + (gd->ram_size >> 1); + *size = 1 << 20; + return 0; +} +#endif + u8 flash_read8(void *addr) { return __raw_readb(addr + 1); diff --git a/board/keymile/scripts/ramfs-common.txt b/board/keymile/scripts/ramfs-common.txt index e590a2bee6..0a4a9c80b7 100644 --- a/board/keymile/scripts/ramfs-common.txt +++ b/board/keymile/scripts/ramfs-common.txt @@ -3,7 +3,7 @@ boot_bank=-1 altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} subbootcmds=save_and_reset_once tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot -save_and_reset_once=setenv save_and_reset_once true && save && reset +save_and_reset_once=setenv save_and_reset_once true && saveenv && reset nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} configure=run set_uimage; run set_tftppath; km_setboardid && run try_import_rootfssize && saveenv && reset setrootfsaddr=setexpr value ${pnvramaddr} - ${rootfssize} && setenv rootfsaddr 0x${value} diff --git a/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg b/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg new file mode 100644 index 0000000000..c0dcfe9a0c --- /dev/null +++ b/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 +BOOT_FROM sd + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +/* Samsung K4B4G1646D-BCMA */ +DATA 4 0x020e04b4 0x000c0000 +DATA 4 0x020e04ac 0x00000000 +DATA 4 0x020e027c 0x00000030 +DATA 4 0x020e0250 0x00000030 +DATA 4 0x020e024c 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e0288 0x000c0030 +DATA 4 0x020e0270 0x00000000 +DATA 4 0x020e0260 0x00000030 +DATA 4 0x020e0264 0x00000030 +DATA 4 0x020e04a0 0x00000030 +DATA 4 0x020e0494 0x00020000 +DATA 4 0x020e0280 0x00000030 +DATA 4 0x020e0284 0x00000030 +DATA 4 0x020e04b0 0x00020000 +DATA 4 0x020e0498 0x00000030 +DATA 4 0x020e04a4 0x00000030 +DATA 4 0x020e0244 0x00000030 +DATA 4 0x020e0248 0x00000030 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x00030009 +DATA 4 0x021b083c 0x01440148 +DATA 4 0x021b0848 0x40403640 +DATA 4 0x021b0850 0x4040322a +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x1b333030 +DATA 4 0x021b000c 0x676b52f2 +DATA 4 0x021b0010 0x926d0b63 +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006b1023 +DATA 4 0x021b0040 0x0000004f +DATA 4 0x021b0000 0x84180000 +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15108030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00007800 +DATA 4 0x021b0818 0x00000227 +DATA 4 0x021b0004 0x0002552d +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 diff --git a/board/out4/o4-imx6ull-nano/Kconfig b/board/out4/o4-imx6ull-nano/Kconfig new file mode 100644 index 0000000000..e2ab80b6d4 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/Kconfig @@ -0,0 +1,64 @@ +if TARGET_O4_IMX6ULL_NANO + +config SYS_BOARD + default "o4-imx6ull-nano" + +config SYS_VENDOR + default "out4" + +config SYS_CONFIG_NAME + default "o4-imx6ull-nano" + +choice + prompt "Memory model" + default K4B4G1646D_BCMA + help + Memory type setup. + + Please choose correct memory model here. + +config K4B4G1646D_BCMA + bool "K4B4G1646D-BCMA 256Mx16 (512 MiB/chip)" + help + Samsung DDR3 SDRAM + K4B4G1646D-BCMA + +config MT41K256M16HA_125E + bool "MT41K256M16HA-125:E 256Mx16 (512 MiB/chip)" + help + Micron DDR3L SDRAM + MT41K256M16HA-125:E + +endchoice + +choice + prompt "Mainboard model" + default O4_IMX_NANO + help + Mainboard setup. + + Please choose correct main board model here. + +config O4_IMX_NANO + bool "O4-iMX-NANO" + help + A baseboard for EV-iMX280-NANO module: + https://out4.ru/products/board/18-o4-imx-nano.html + +config EV_IMX280_NANO_X_MB + bool "EV-IMX280-NANO-X-MB" + help + A simple baseboard for EV-iMX280-NANO module: + http://evodbg.net/products/mx28-eval-kits/14-ev-imx280-nano-x-mb.html + +endchoice + +config IMX_CONFIG + default "board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg" if K4B4G1646D_BCMA + default "board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg" if MT41K256M16HA_125E + +config DEFAULT_DEVICE_TREE + default "o4-imx-nano" if O4_IMX_NANO + default "ev-imx280-nano-x-mb" if EV_IMX280_NANO_X_MB + +endif diff --git a/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg b/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg new file mode 100644 index 0000000000..6f823a7272 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 +BOOT_FROM sd + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +/* Micron MT41K256M16HA-125:E */ +DATA 4 0x020e04b4 0x000c0000 +DATA 4 0x020e04ac 0x00000000 +DATA 4 0x020e027c 0x00000030 +DATA 4 0x020e0250 0x00000030 +DATA 4 0x020e024c 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e0288 0x000c0030 +DATA 4 0x020e0270 0x00000000 +DATA 4 0x020e0260 0x00000030 +DATA 4 0x020e0264 0x00000030 +DATA 4 0x020e04a0 0x00000030 +DATA 4 0x020e0494 0x00020000 +DATA 4 0x020e0280 0x00000030 +DATA 4 0x020e0284 0x00000030 +DATA 4 0x020e04b0 0x00020000 +DATA 4 0x020e0498 0x00000030 +DATA 4 0x020e04a4 0x00000030 +DATA 4 0x020e0244 0x00000030 +DATA 4 0x020e0248 0x00000030 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x0005000b +DATA 4 0x021b083c 0x01400144 +DATA 4 0x021b0848 0x4040343a +DATA 4 0x021b0850 0x4040342a +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x1b333030 +DATA 4 0x021b000c 0x676b52f2 +DATA 4 0x021b0010 0x91eb0b63 +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006b1023 +DATA 4 0x021b0040 0x0000004f +DATA 4 0x021b0000 0x84180000 +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15108030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00007800 +DATA 4 0x021b0818 0x00000227 +DATA 4 0x021b0004 0x0002552d +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 diff --git a/board/out4/o4-imx6ull-nano/Makefile b/board/out4/o4-imx6ull-nano/Makefile new file mode 100644 index 0000000000..a3f4646d9e --- /dev/null +++ b/board/out4/o4-imx6ull-nano/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +obj-y := o4-imx6ull-nano.o diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c new file mode 100644 index 0000000000..edb200e9e5 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> + +#include <asm/arch-mx6/clock.h> +#include <asm/arch/sys_proto.h> +#include <asm/global_data.h> +#include <asm/mach-imx/boot_mode.h> +#include <common.h> +#include <env.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +int board_early_init_f(void) +{ + return 0; +} + +static int setup_fec_clock(void) +{ + if (IS_ENABLED(CONFIG_FEC_MXC) && !IS_ENABLED(CONFIG_CLK_IMX6Q)) { + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + /* + * Use 50M anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(0, ENET_50MHZ); + if (ret) + return ret; + + if (!IS_ENABLED(CONFIG_EV_IMX280_NANO_X_MB)) { + /* + * Use 50M anatop loopback REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(1, ENET_50MHZ); + if (ret) + return ret; + } + + enable_enet_clk(1); + } + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return setup_fec_clock(); +} + +int board_late_init(void) +{ + if (IS_ENABLED(CONFIG_CMD_BMODE)) + add_board_boot_modes(NULL); + + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { + const char *model; + + model = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + if (model) + env_set("board_name", model); + } + + if (is_boot_from_usb()) { + env_set("bootcmd", "run bootcmd_mfg"); + env_set("bootdelay", "0"); + } + + return 0; +} diff --git a/board/seeed/npi_imx6ull/Kconfig b/board/seeed/npi_imx6ull/Kconfig new file mode 100644 index 0000000000..5e298299a3 --- /dev/null +++ b/board/seeed/npi_imx6ull/Kconfig @@ -0,0 +1,12 @@ +if TARGET_NPI_IMX6ULL + +config SYS_BOARD + default "npi_imx6ull" + +config SYS_VENDOR + default "seeed" + +config SYS_CONFIG_NAME + default "npi_imx6ull" + +endif diff --git a/board/seeed/npi_imx6ull/MAINTAINERS b/board/seeed/npi_imx6ull/MAINTAINERS new file mode 100644 index 0000000000..c6a915c79b --- /dev/null +++ b/board/seeed/npi_imx6ull/MAINTAINERS @@ -0,0 +1,9 @@ +NPI_IMX6ULL BOARD +M: Navin Sankar Velliangiri <navin@linumiz.com> +S: Maintained +F: arch/arm/dts/imx6ull-seeed-npi-imx6ull-dev-board.dts +F: arch/arm/dts/imx6ull-seeed-npi-imx6ull-u-boot.dtsi +F: arch/arm/dts/imx6ull-seeed-npi-imx6ull.dtsi +F: board/seeed/npi-imx6ull/ +F: configs/seeed_npi_imx6ull_defconfig +F: include/configs/npi_imx6ull.h diff --git a/board/seeed/npi_imx6ull/Makefile b/board/seeed/npi_imx6ull/Makefile new file mode 100644 index 0000000000..93ea413517 --- /dev/null +++ b/board/seeed/npi_imx6ull/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := npi_imx6ull.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/seeed/npi_imx6ull/README b/board/seeed/npi_imx6ull/README new file mode 100644 index 0000000000..01d218a9bc --- /dev/null +++ b/board/seeed/npi_imx6ull/README @@ -0,0 +1,61 @@ +How to use U-BOOT on SeeedStudio NPI-IMX6ULL Single Board Computer +------------------------------------------------------------------ + +- Configure and build U-Boot for NPI-IMX6ULL: + + $ export ARCH=arm + $ export CROSS_COMPILE=arm-none-linux-gnueabihf- + $ make seeed_npi_imx6ull_defconfig + $ make + +This will generate SPL and u-boot-dtb.img images. + +Boot from MMC/SD: +- The SPL and u-boot-dtb.img images need to be flashed into the micro SD card: + + $ sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + $ sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Boot mode settings: + + Boot switch position: SW1 -> 0 + SW2 -> 1 + SW3 -> 0 + SW4 -> 0 + SW5 -> 1 + SW6 -> 0 + SW7 -> 0 + SW8 -> 1 + +Boot from NAND: +- Boot the board using SD/MMC or Serial download and load the SPL into memory +either from SD/MMC or TFTP. + +Default MTD layout is 512k(spl),1m(uboot),1m(uboot-dup),-(ubi) + +Flash SPL to NAND from SD/MMC, + + $ ext4load mmc 0:2 $loadaddr SPL + $ nand erase.part spl + $ nandbcb init $loadaddr 0x0 $filesize + +Flash u-boot image to NAND from SD/MMC, + + $ ext4load mmc 0:2 $loadaddr u-boot-dtb.img + $ nand erase.part uboot + $ nand write $loadaddr uboot $filesize + +- Boot mode settings: + + Boot switch position: SW1 -> 0 + SW2 -> 1 + SW3 -> 1 + SW4 -> 0 + SW5 -> 0 + SW6 -> 1 + SW7 -> 0 + SW8 -> 0 + +- Connect the Serial cable to UART0 and the PC for the console. + +- Reset the board using reset button and U-Boot should boot from NAND. diff --git a/board/seeed/npi_imx6ull/npi_imx6ull.c b/board/seeed/npi_imx6ull/npi_imx6ull.c new file mode 100644 index 0000000000..eb9ee555c8 --- /dev/null +++ b/board/seeed/npi_imx6ull/npi_imx6ull.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +#include <init.h> +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <fsl_esdhc_imx.h> +#include <linux/bitops.h> +#include <miiphy.h> +#include <net.h> +#include <netdev.h> +#include <usb.h> +#include <usb/ehci-ci.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | \ + PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +#ifdef CONFIG_FEC_MXC + +static int setup_fec(int fec_id) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + if (fec_id == 0) { + /* + * Use 50MHz anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + } else { + /* + * Use 50MHz anatop loopbak REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + } + + ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_FEC_MXC + setup_fec(CONFIG_FEC_ENET_DEV); +#endif + + return 0; +} + +int checkboard(void) +{ + printf("Board: Seeed NPi i.MX6ULL Dev Board\n"); + + return 0; +} diff --git a/board/seeed/npi_imx6ull/spl.c b/board/seeed/npi_imx6ull/spl.c new file mode 100644 index 0000000000..4b56f52d98 --- /dev/null +++ b/board/seeed/npi_imx6ull/spl.c @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +#include <common.h> +#include <init.h> +#include <spl.h> +#include <asm/arch/clock.h> +#include <asm/io.h> +#include <asm/arch/mx6-ddr.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/sys_proto.h> +#include <fsl_esdhc_imx.h> + +/* Configuration for Micron MT41K256M16TW-107 32M x 16 x 8 -> 512MiB */ + +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds = 0x00000030, + .grp_ddrmode_ctl = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_ddrpke = 0x00000000, + .grp_ddrmode = 0x00020000, + .grp_ddr_type = 0x000c0000, +}; + +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_ras = 0x00000030, + .dram_cas = 0x00000030, + .dram_odt0 = 0x00000030, + .dram_odt1 = 0x00000030, + .dram_sdba2 = 0x00000000, + .dram_sdclk_0 = 0x00000030, + .dram_sdqs0 = 0x00000030, + .dram_sdqs1 = 0x00000030, + .dram_reset = 0x00000030, +}; + +static struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 = 0x00000000, + .p0_mpdgctrl0 = 0x41480148, + .p0_mprddlctl = 0x40403E42, + .p0_mpwrdlctl = 0x40405852, +}; + +struct mx6_ddr_sysinfo ddr_sysinfo = { + .dsize = 0, /* Bus size = 16bit */ + .cs_density = 32, + .ncs = 1, + .cs1_mirror = 0, + .rtt_wr = 1, + .rtt_nom = 1, + .walat = 1, /* Write additional latency */ + .ralat = 5, /* Read additional latency */ + .mif3_mode = 3, /* Command prediction working mode */ + .bi_on = 1, /* Bank interleaving enabled */ + .pd_fast_exit = 1, + .sde_to_rst = 0x10, + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ + .ddr_type = DDR_TYPE_DDR3, + .refsel = 1, /* Refresh cycles at 32KHz */ + .refr = 7, /* 8 refresh commands per refresh cycle */ +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed = 1600, + .density = 4, + .width = 16, + .banks = 8, + .rowaddr = 15, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0xFFFFFFFF, &ccm->CCGR0); + writel(0xFFFFFFFF, &ccm->CCGR1); + writel(0xFFFFFFFF, &ccm->CCGR2); + writel(0xFFFFFFFF, &ccm->CCGR3); + writel(0xFFFFFFFF, &ccm->CCGR4); + writel(0xFFFFFFFF, &ccm->CCGR5); + writel(0xFFFFFFFF, &ccm->CCGR6); +} + +static void spl_dram_init(void) +{ + mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); + mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); +} + +#ifdef CONFIG_FSL_ESDHC_IMX + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ + PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_UART1_RTS_B__USDHC1_CD_B | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#ifndef CONFIG_NAND_MXS +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; +#endif + +static struct fsl_esdhc_cfg usdhc_cfg[] = { + { + .esdhc_base = USDHC1_BASE_ADDR, + .max_bus_width = 4, + }, +#ifndef CONFIG_NAND_MXS + { + .esdhc_base = USDHC2_BASE_ADDR, + .max_bus_width = 8, + }, +#endif +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +int board_mmc_init(struct bd_info *bis) +{ + int i, ret; + + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + SETUP_IOMUX_PADS(usdhc1_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; +#ifndef CONFIG_NAND_MXS + case 1: + SETUP_IOMUX_PADS(usdhc2_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; +#endif + default: + printf("Warning - USDHC%d controller not supporting\n", + i + 1); + return 0; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize mmc dev %d\n", i); + return ret; + } + } + + return 0; +} + +#endif /* CONFIG_FSL_ESDHC_IMX */ + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + /* Setup AIPS and disable watchdog */ + arch_cpu_init(); + + /* Setup iomux and fec */ + board_early_init_f(); + + /* Setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + spl_dram_init(); +} diff --git a/board/storopack/smegw01/Kconfig b/board/storopack/smegw01/Kconfig new file mode 100644 index 0000000000..4503b65419 --- /dev/null +++ b/board/storopack/smegw01/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SMEGW01 + +config SYS_BOARD + default "smegw01" + +config SYS_VENDOR + default "storopack" + +config SYS_CONFIG_NAME + default "smegw01" + +endif diff --git a/board/storopack/smegw01/MAINTAINERS b/board/storopack/smegw01/MAINTAINERS new file mode 100644 index 0000000000..6acb8b9341 --- /dev/null +++ b/board/storopack/smegw01/MAINTAINERS @@ -0,0 +1,7 @@ +SMEGW01 BOARD +M: Fabio Estevam <festevam@denx.de> +S: Maintained +F: board/storopack/ +F: arch/arm/dts/imx7d-smegw01.dts +F: configs/smegw01_defconfig +F: include/configs/smegw01.h diff --git a/board/storopack/smegw01/Makefile b/board/storopack/smegw01/Makefile new file mode 100644 index 0000000000..f02e7bb8b0 --- /dev/null +++ b/board/storopack/smegw01/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) Copyright 2016 NXP Semiconductors + +obj-y := smegw01.o diff --git a/board/storopack/smegw01/imximage.cfg b/board/storopack/smegw01/imximage.cfg new file mode 100644 index 0000000000..c7fa06996c --- /dev/null +++ b/board/storopack/smegw01/imximage.cfg @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2017 PHYTEC America, LLC + * + * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +IMAGE_VERSION 2 +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* DDR initialization came from Phytec */ +DATA 4 0x30340004 0x4F400005 +DATA 4 0x30360388 0x40000000 +DATA 4 0x30360384 0x40000000 +DATA 4 0x30391000 0x00000002 +DATA 4 0x307a0000 0x01040001 +DATA 4 0x307a01a0 0x80400003 +DATA 4 0x307a01a4 0x00100020 +DATA 4 0x307a01a8 0x80100004 +DATA 4 0x307a0064 0x0040002b +DATA 4 0x307a0490 0x00000001 +DATA 4 0x307a00d0 0x00020083 +DATA 4 0x307a00d4 0x00690000 +DATA 4 0x307a00dc 0x09300004 +DATA 4 0x307a00e0 0x04080000 +DATA 4 0x307a00e4 0x00100004 +DATA 4 0x307a00f4 0x0000033f +DATA 4 0x307a0100 0x090b1109 +DATA 4 0x307a0104 0x0007020d +DATA 4 0x307a0108 0x03040407 +DATA 4 0x307a010c 0x00002006 +DATA 4 0x307a0110 0x04020205 +DATA 4 0x307a0114 0x03030202 +DATA 4 0x307a0120 0x00000802 +DATA 4 0x307a0180 0x00800020 +DATA 4 0x307a0184 0x02000100 +DATA 4 0x307a0190 0x02098204 +DATA 4 0x307a0194 0x00030303 +DATA 4 0x307a0200 0x00001f15 +DATA 4 0x307a0204 0x00080808 +DATA 4 0x307a0210 0x00000f0f +DATA 4 0x307a0214 0x07070707 +DATA 4 0x307a0218 0x0f0f0707 +DATA 4 0x307a0240 0x06000604 +DATA 4 0x307a0244 0x00000001 +DATA 4 0x30391000 0x00000000 +DATA 4 0x30790000 0x17420f40 +DATA 4 0x30790004 0x10210100 +DATA 4 0x30790010 0x00060807 +DATA 4 0x307900b0 0x1010007e +DATA 4 0x3079009c 0x00000d6e +DATA 4 0x30790020 0x0a0a0a0a +DATA 4 0x30790030 0x06060606 +DATA 4 0x30790050 0x01000010 +DATA 4 0x30790050 0x00000010 +DATA 4 0x307900c0 0x0e407304 +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e447306 +CHECK_BITS_SET 4 0x307900c4 0x1 +DATA 4 0x307900c0 0x0e447304 +DATA 4 0x307900c0 0x0e407304 +DATA 4 0x30384130 0x00000000 +DATA 4 0x30340020 0x00000178 +DATA 4 0x30384130 0x00000002 +DATA 4 0x30790018 0x0000000f +CHECK_BITS_SET 4 0x307a0004 0x1 diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c new file mode 100644 index 0000000000..e6bff80e55 --- /dev/null +++ b/board/storopack/smegw01/smegw01.c @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Fabio Estevam <festevam@denx.de> + +#include <init.h> +#include <net.h> +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx7-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/global_data.h> +#include <asm/gpio.h> +#include <asm/mach-imx/hab.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/io.h> +#include <common.h> +#include <env.h> +#include <asm/arch/crm_regs.h> +#include <asm/setup.h> +#include <asm/bootm.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \ + PAD_CTL_HYS) + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +static iomux_v3_cfg_t const wdog_pads[] = { + MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart1_pads[] = { + MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +}; + +static int setup_fec(void) +{ + struct iomuxc_gpr_base_regs *const iomuxc_gpr_regs = + (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; + int ret; + + /* Use 125M anatop REF_CLK1 for ENET1, clear gpr1[13], gpr1[17]*/ + clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], + (IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK | + IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0); + + ret = set_clk_enet(ENET_125MHZ); + if (ret) + return ret; + + return 0; +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + setup_fec(); + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int board_late_init(void) +{ + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + + imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); + + set_wdog_reset(wdog); + + /* + * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), + * since we use PMIC_PWRON to reset the board. + */ + clrsetbits_le16(&wdog->wcr, 0, 0x10); + + return 0; +} diff --git a/board/technexion/pico-imx6/README b/board/technexion/pico-imx6/README index f1e84bfe82..f497086502 100644 --- a/board/technexion/pico-imx6/README +++ b/board/technexion/pico-imx6/README @@ -20,7 +20,7 @@ If the eMMC has already a U-Boot flashed then the user can go to step 2 below in order to update U-Boot. Put pico board in USB download mode (Refer to the following link for details: -https://www.technexion.com/support/knowledgebase/boot-configuration-settings-for-pico-baseboards/). +https://developer.technexion.com/docs/pico-evaluation-kit-boot-mode-settings ) Connect a USB to serial adapter between the host PC and pico. diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index d05f0b2e12..ee4d0c85e6 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -287,6 +287,17 @@ int board_early_init_f(void) if (ret) return ret; + /* + * PS_SYSMON_ANALOG_BUS register determines mapping between SysMon + * supply sense channel to SysMon supply registers inside the IP. + * This register must be programmed to complete SysMon IP + * configuration. The default register configuration after + * power-up is incorrect. Hence, fix this by writing the + * correct value - 0x3210. + */ + writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL, + ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS); + /* Delay is required for clocks to be propagated */ udelay(1000000); #endif diff --git a/cmd/Kconfig b/cmd/Kconfig index f962bb7141..a9fb4eead2 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1346,8 +1346,11 @@ config CMD_ROCKUSB config CMD_USB_MASS_STORAGE bool "UMS usb mass storage" select USB_FUNCTION_MASS_STORAGE + depends on BLK && USB_GADGET help - USB mass storage support + Enables the command "ums" and the USB mass storage support to the + export a block device: U-Boot, the USB device, acts as a simple + external hard drive plugged on the host USB port. config CMD_PVBLOCK bool "Xen para-virtualized block device" @@ -808,7 +808,7 @@ static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag, return CMD_RET_SUCCESS; } -static int mmc_partconf_print(struct mmc *mmc) +static int mmc_partconf_print(struct mmc *mmc, const char *varname) { u8 ack, access, part; @@ -821,6 +821,9 @@ static int mmc_partconf_print(struct mmc *mmc) ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config); part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + if(varname) + env_set_hex(varname, part); + printf("EXT_CSD[179], PARTITION_CONFIG:\n" "BOOT_ACK: 0x%x\n" "BOOT_PARTITION_ENABLE: 0x%x\n" @@ -836,7 +839,7 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, struct mmc *mmc; u8 ack, part_num, access; - if (argc != 2 && argc != 5) + if (argc != 2 && argc != 3 && argc != 5) return CMD_RET_USAGE; dev = simple_strtoul(argv[1], NULL, 10); @@ -850,8 +853,8 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, return CMD_RET_FAILURE; } - if (argc == 2) - return mmc_partconf_print(mmc); + if (argc == 2 || argc == 3) + return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL); ack = simple_strtoul(argv[2], NULL, 10); part_num = simple_strtoul(argv[3], NULL, 10); @@ -1061,8 +1064,9 @@ U_BOOT_CMD( " - Set the BOOT_BUS_WIDTH field of the specified device\n" "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n" " - Change sizes of boot and RPMB partitions of specified device\n" - "mmc partconf <dev> [boot_ack boot_partition partition_access]\n" + "mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]\n" " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n" + " If showing the bits, optionally store the boot_partition field into varname\n" "mmc rst-function <dev> <value>\n" " - Change the RST_n_FUNCTION field of the specified device\n" " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c index 71c5af4c25..9a30629e26 100644 --- a/cmd/pxe_utils.c +++ b/cmd/pxe_utils.c @@ -587,6 +587,14 @@ static int label_boot(struct cmd_tbl *cmdtp, struct pxe_label *label) f2 = "-"; f3 = env_get("board"); f4 = ".dtb"; + if (!f1) { + f1 = ""; + f2 = ""; + } + if (!f3) { + f2 = ""; + f3 = ""; + } } len = strlen(label->fdtdir); diff --git a/common/autoboot.c b/common/autoboot.c index 0bb08e7a4c..c0b71af4d1 100644 --- a/common/autoboot.c +++ b/common/autoboot.c @@ -44,8 +44,8 @@ static int menukey; #define AUTOBOOT_STOP_STR_SHA256 "" #endif -#ifdef CONFIG_USE_AUTOBOOT_MENUKEY -#define AUTOBOOT_MENUKEY CONFIG_USE_AUTOBOOT_MENUKEY +#ifdef CONFIG_AUTOBOOT_USE_MENUKEY +#define AUTOBOOT_MENUKEY CONFIG_AUTOBOOT_USE_MENUKEY #else #define AUTOBOOT_MENUKEY 0 #endif @@ -282,7 +282,7 @@ static int abortboot_single_key(int bootdelay) abort = 1; /* don't auto boot */ bootdelay = 0; /* no more delay */ key = getchar();/* consume input */ - if (IS_ENABLED(CONFIG_USE_AUTOBOOT_MENUKEY)) + if (IS_ENABLED(CONFIG_AUTOBOOT_USE_MENUKEY)) menukey = key; break; } @@ -388,7 +388,7 @@ void autoboot_command(const char *s) disable_ctrlc(prev); /* restore Ctrl-C checking */ } - if (IS_ENABLED(CONFIG_USE_AUTOBOOT_MENUKEY) && + if (IS_ENABLED(CONFIG_AUTOBOOT_USE_MENUKEY) && menukey == AUTOBOOT_MENUKEY) { s = env_get("menucmd"); if (s) diff --git a/common/dlmalloc.c b/common/dlmalloc.c index cf0270a9c1..11729e8c85 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -1,3 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * This code is based on a version (aka dlmalloc) of malloc/free/realloc written + * by Doug Lea and released to the public domain, as explained at + * http://creativecommons.org/publicdomain/zero/1.0/- + * + * The original code is available at http://gee.cs.oswego.edu/pub/misc/ + * as file malloc-2.6.6.c. + */ + #include <common.h> #include <log.h> #include <asm/global_data.h> diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 6a58d3ccfc..6a9d0a4673 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 @@ -8,7 +9,6 @@ CONFIG_SYS_CLK_FREQ=912000000 CONFIG_MMC0_CD_PIN="PH1" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 21a77fd14d..798f879945 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -7,7 +8,6 @@ CONFIG_MMC0_CD_PIN="PG1" CONFIG_MMC1_CD_PIN="PG13" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 6c90176d37..568f64ee66 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUNXI_NO_PMIC=y CONFIG_CONS_INDEX=2 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 2c87b18604..401cce0c14 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -13,7 +14,6 @@ CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index f9f8f14151..014f68e4c6 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -10,7 +11,6 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 26604c0b9e..df3c99aae6 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -8,7 +9,6 @@ CONFIG_USB0_VBUS_PIN="PC17" CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index d6bd962559..b5e61aa8b5 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_MMC0_CD_PIN="PH1" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index 2b3c11681a..a6ed8b5360 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -8,7 +9,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_I2C1_ENABLE=y CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 55a0ac2410..6adee59c3a 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -9,7 +10,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_I2C1_ENABLE=y CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index cb43153981..5259997ca5 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -10,7 +11,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB0_VBUS_DET="PH5" CONFIG_SATAPWR="PC3" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 6ed414a898..010e8c2265 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -10,7 +11,6 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 5082196a8e..df7b5b4ff2 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -9,7 +10,6 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index 41f3caf054..351a454339 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PB2" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index b2b704de83..51341c0306 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:40000,le:87,ri:112,up:38,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-ainol-aw1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 23ec20108f..4972352c90 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo: CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 68fb125001..768d2300b1 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 307952d85f..cd35d05295 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 37bcb3d7bf..e0adffd120 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_SPL=y CONFIG_MACH_SUN8I_R40=y CONFIG_DRAM_CLK=576 @@ -8,7 +9,6 @@ CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH23" CONFIG_USB2_VBUS_PIN="PH23" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 43903a5ce4..50c8adca59 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_MACPWR="PH23" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index cc40c914eb..bad38a6656 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=600 @@ -8,7 +9,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index c89e40f352..5447bea0bb 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -8,7 +9,6 @@ CONFIG_USB1_VBUS_PIN="PH0" CONFIG_USB2_VBUS_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 88b0b026c5..9e2c7cc1a5 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -1,15 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_CHIP_DIP_SCAN=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y -CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_DFU_RAM=y # CONFIG_MMC is not set CONFIG_AXP_ALDO3_VOLT=3300 diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 7f10fd2b88..845a429976 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro" CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index 9d2ee64524..1cd39d498f 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 9207d6d4cd..6d5ea16575 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 209c249ee4..a6b3bd438a 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=240 @@ -15,7 +16,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_I2C_SDA="PA23" CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 124c226f85..65cf621479 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 90b2c69e5f..c66f29e5da 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cubieboard4" CONFIG_SPL=y CONFIG_MACH_SUN9I=y CONFIG_DRAM_CLK=672 @@ -11,5 +12,4 @@ CONFIG_USB0_ID_DET="PH16" CONFIG_USB1_VBUS_PIN="PH14" CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cubieboard4" CONFIG_AXP809_POWER=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 120454b899..b5a28ab539 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index dceecf8527..0929997736 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -10,7 +11,6 @@ CONFIG_USB0_ID_DET="PH19" CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PH12" CONFIG_GMAC_TX_DELAY=1 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 83716bc900..48d7f344bd 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_CLK=672 @@ -13,7 +14,6 @@ CONFIG_USB1_VBUS_PIN="PD29" CONFIG_USB2_VBUS_PIN="PL6" CONFIG_I2C0_ENABLE=y CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-cubietruck-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_PHY_REALTEK=y diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index ab59507c18..eb6a3167af 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:210,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index d2ea3fce88..773f1a9927 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo: CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index f0fdf7e272..24e8b5be1b 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=251 @@ -7,7 +8,6 @@ CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 8a28fe02d9..dcd22ac56a 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_EMR1=4 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH9" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 5fc9f63637..4f67274420 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 68545fcf7b..c7bea1ce83 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -7,7 +8,6 @@ CONFIG_MACPWR="PH23" CONFIG_MMC0_CD_PIN="PH10" CONFIG_SATAPWR="PB3" CONFIG_GMAC_TX_DELAY=4 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 04d7b64504..b50bae9bbd 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" # CONFIG_NETDEVICES is not set diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 55c2fc2f46..25e371f237 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=408 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=122 CONFIG_USB1_VBUS_PIN="PH11" CONFIG_SATAPWR="PH2" CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index cb3686d445..e278e27918 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=122 CONFIG_SATAPWR="PH2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index fe81751011..9a70d7e9dd 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 9cb4e5e4f6..3fa0f0783f 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5208EVBE=y CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE" +CONFIG_TARGET_M5208EVBE=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index 402ad7bb00..bab8ac4b78 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 -CONFIG_TARGET_M52277EVB=y CONFIG_DEFAULT_DEVICE_TREE="M52277EVB" +CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 8dc68a3f69..98c64ff31a 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M52277EVB=y CONFIG_DEFAULT_DEVICE_TREE="M52277EVB_stmicro" +CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index c52a8a6801..393bb4998b 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFC00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5235EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32" +CONFIG_TARGET_M5235EVB=y CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 6acf677ce2..59a3449798 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5235EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5235EVB" +CONFIG_TARGET_M5235EVB=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 4ce75c1434..1535aeca95 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5249EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5249EVB" +CONFIG_TARGET_M5249EVB=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_DEVICE_NULLDEV=y diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 8444063e1a..7b3bf78b8f 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_TARGET_M5253DEMO=y CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO" +CONFIG_TARGET_M5253DEMO=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index d716e52f66..0a6360d85e 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5272C3=y CONFIG_DEFAULT_DEVICE_TREE="M5272C3" +CONFIG_TARGET_M5272C3=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index d6d4c7d3e3..5547ee33e3 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5275EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5275EVB" +CONFIG_TARGET_M5275EVB=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index b7eb325a90..90a4cf819f 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5282EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5282EVB" +CONFIG_TARGET_M5282EVB=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 896337283f..950a0fb338 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 -CONFIG_TARGET_M53017EVB=y CONFIG_DEFAULT_DEVICE_TREE="M53017EVB" +CONFIG_TARGET_M53017EVB=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2" diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index c8ef0d26c4..078abb2356 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5329EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE" +CONFIG_TARGET_M5329EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 41c0d4562a..8b1325e71f 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5329EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE" +CONFIG_TARGET_M5329EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 8575859a7a..07955785e2 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_M5373EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5373EVB" +CONFIG_TARGET_M5373EVB=y CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 6bfa2b0d1d..6aa4c2fa26 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200" diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index badde21c24..7273ee02d7 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x20000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_mii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=25000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200" diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 55768ad06e..90df8f4af3 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x20000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200" diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 9862364d46..d7b0f2d9d2 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x20000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_nand_rmii_lowfreq" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BOOT,LOW_MCFCLK,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock2 rw rootfstype=jffs2 mtdparts=NAND:1M(u-boot)ro,7M(kernel)ro,-(jffs2) console=ttyS0,115200" diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index b8832eae6c..556bbefd6b 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_mii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200" diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 9edbd2db5f..19b1aa6a02 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54418TWR=y CONFIG_DEFAULT_DEVICE_TREE="M54418TWR_serial_rmii" +CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.1.1:/tftpboot/192.168.1.2 ip=192.168.1.2:192.168.1.1:192.168.1.1: 255.255.255.0::eth0:off:rw console=ttyS0,115200" diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 4829160489..a3583e5c5b 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_M54451EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54451EVB" +CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index c889340c0f..5f5e6a55f6 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54451EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54451EVB_stmicro" +CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 51e74712d5..50bdb2c0cc 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_a66" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 99e647ff73..40d025f66e 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index b01c905d29..97d5d15ad6 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_i66" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index 8879777bad..d82f091fea 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_intel" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index f18400e79b..147d87e878 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x4FE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M54455EVB=y CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_stm33" +CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig index a919bf720b..c315d91e71 100644 --- a/configs/M5475AFE_defconfig +++ b/configs/M5475AFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475AFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig index b9f4904134..f6a7adf925 100644 --- a/configs/M5475BFE_defconfig +++ b/configs/M5475BFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475BFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig index ae58535726..2ae572d9ff 100644 --- a/configs/M5475CFE_defconfig +++ b/configs/M5475CFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475CFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig index a9d085f370..4cd7d95037 100644 --- a/configs/M5475DFE_defconfig +++ b/configs/M5475DFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475DFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig index 38d31ace01..5379fcc29e 100644 --- a/configs/M5475EFE_defconfig +++ b/configs/M5475EFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475EFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig index 0a620c39f1..e54781abb8 100644 --- a/configs/M5475FFE_defconfig +++ b/configs/M5475FFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475FFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig index 05b0ba7af8..8b6f8f3e9e 100644 --- a/configs/M5475GFE_defconfig +++ b/configs/M5475GFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5475EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5475GFE" +CONFIG_TARGET_M5475EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig index 548deaf902..d98128c908 100644 --- a/configs/M5485AFE_defconfig +++ b/configs/M5485AFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485AFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig index 0d72da3b36..3b2eebe4f7 100644 --- a/configs/M5485BFE_defconfig +++ b/configs/M5485BFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485BFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig index 68908e2f43..7b9cc4bca5 100644 --- a/configs/M5485CFE_defconfig +++ b/configs/M5485CFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485CFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig index 2587200953..aee1c2100e 100644 --- a/configs/M5485DFE_defconfig +++ b/configs/M5485DFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485DFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig index a43b402238..69195387a1 100644 --- a/configs/M5485EFE_defconfig +++ b/configs/M5485EFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485EFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig index 335ad0e1e7..a9ab4770df 100644 --- a/configs/M5485FFE_defconfig +++ b/configs/M5485FFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485FFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig index 2665be9fb5..ce93b82ce0 100644 --- a/configs/M5485GFE_defconfig +++ b/configs/M5485GFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485GFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig index a0536bfae1..7feb9c4c1c 100644 --- a/configs/M5485HFE_defconfig +++ b/configs/M5485HFE_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF800000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_M5485EVB=y CONFIG_DEFAULT_DEVICE_TREE="M5485HFE" +CONFIG_TARGET_M5485EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO" CONFIG_BOOTDELAY=1 # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index cb5939e535..f2c1019649 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index eba1aa96bb..003ebd8c6b 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -2,8 +2,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFE000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_SYS_CLK_FREQ=66666667 CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb" +CONFIG_SYS_CLK_FREQ=66666667 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC837XERDB=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index ab2fe2ba65..6481f6f78c 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -8,6 +9,5 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-primo73" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index ba5dcfbe1d..e77b007292 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=360 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:768,y:1024,depth:18,pclk_khz:66000,le:56,ri:60,up:30,lo CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-primo81" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 64d4f66b34..a0aee660b4 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" CONFIG_SPL=y CONFIG_MACH_SUN4I=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SCSI_AHCI=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index ca82094c65..c6bfe381db 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=120 CONFIG_INITIAL_USB_SCAN_DELAY=2000 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index a2aa4bf8c1..dd441efb48 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_MACPWR="PH15" CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 6392d0d84a..2b9bca13d0 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 89427b0676..eb3458c9ed 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -7,7 +8,6 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_PHY_REALTEK=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index c5c93b9ada..133bb6da68 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_DRAM_ZQ=122 CONFIG_MMC0_CD_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index 823b82e71b..be6dd41754 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 15db3962fe..0944e64957 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" CONFIG_SPL=y CONFIG_MACH_SUN9I=y CONFIG_DRAM_CLK=672 @@ -11,5 +12,4 @@ CONFIG_USB0_ID_DET="PH3" CONFIG_USB1_VBUS_PIN="PH4" CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus" CONFIG_AXP809_POWER=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index 6832eaa5ef..3353d09574 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index d4dc950e9d..38efde812a 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=600 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=15291 CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index 5f629a56ab..a6f427068d 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -9,7 +10,6 @@ CONFIG_USB2_VBUS_PIN="PH22" CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 1cd3f798f3..cf0b95bec2 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 @@ -11,7 +12,6 @@ CONFIG_USB1_VBUS_PIN="PH26" CONFIG_USB2_VBUS_PIN="PH22" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 269a4453b9..002c5d6fe7 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index e44e91b1b7..b7fd55b7a4 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index bf612065d6..08d98bf473 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 5809b1cd72..3f308e41cf 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index e1e7daf62c..a17b187ea6 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 4863d60860..a937b5b2de 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 1f3f475116..b73a768c8d 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 329bd4b0e4..44d6d47d43 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index d639f459e6..e748c2209b 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index a2bc41c326..3b7e6f6102 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -2,13 +2,13 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 709e4ac196..94c66f2daa 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index e8abb67231..746ed8df8d 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb" CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 32efb87aa0..31d4618482 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index c73c9dbedd..16c6ae01e8 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index d02bd7562e..296fddaab1 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 542805798c..47488a161e 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 591c2785c3..d92fb414a1 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 6bccd7c2d0..a9ad5d07a1 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 8ec246d0f1..45b1747bab 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index c9e2f59dfb..8b26841520 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 2791eefa87..87501a1aa7 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index f97742830a..62f767595e 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 0e7be2bb9c..f8c51562a1 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 5c53a702f7..3ffa22f076 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index aca3e28da6..620b6a4b1f 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -2,12 +2,12 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 3f317fda68..d1c54bcd12 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 755674d532..d25e1ca3c8 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -5,12 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index a1abbc13bf..238a1c49e1 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="\nSBx81LIFKW" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" +CONFIG_IDENT_STRING="\nSBx81LIFKW" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 81e0907483..77a8fc6683 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="\nSBx81LIFXCAT" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat" +CONFIG_IDENT_STRING="\nSBx81LIFXCAT" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 2b84af4537..8fa8246344 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 @@ -9,7 +10,6 @@ CONFIG_MMC3_PINS="PC" CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 31329dd52e..4eb5300b04 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=552 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:66000,le:90,ri:160,up:3,lo CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index 2ce3261b40..aba95270eb 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index fbd7766cf1..d27f495f48 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_TYPE=7 @@ -14,7 +15,6 @@ CONFIG_USB0_ID_DET="PH11" CONFIG_USB1_VBUS_PIN="PD24" CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_PHY_REALTEK=y diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index ebe7c30242..bb62ae9a7a 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" CONFIG_SPL=y CONFIG_MACH_SUN9I=y CONFIG_DRAM_CLK=600 @@ -10,5 +11,4 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_VBUS_PIN="PH15" CONFIG_USB1_VBUS_PIN="PL7" CONFIG_USB3_VBUS_PIN="PL8" -CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-cx-a99" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index a298779f97..99071d742f 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index e4ad738712..31880438bc 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_FIT=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index c2cda977d9..102e4e14ad 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 473b029b81..93acf0fb0a 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index cf1f14557f..337ee7fd97 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 15b97a9f98..063d6a734f 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_FIT=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index ffd23fab6b..b395bf17aa 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -4,11 +4,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index cb5d7ff233..53b82f789f 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 1029a8ec34..aa4f094cb5 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_FIT=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 2b95637f2c..bdcdcef605 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index e47234d4d7..54056c3e19 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_FIT=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index d4431d69c7..5313355513 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_FIT=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig new file mode 100644 index 0000000000..9284616c52 --- /dev/null +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -0,0 +1,93 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_T2080RDB_REV_D=y +CONFIG_SYS_CUSTOM_LDSCRIPT=y +CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL" +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_BOOT=y +CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_MTD_RAW_NAND=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_SYS_CORTINA_FW_IN_NAND=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_NAND=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig new file mode 100644 index 0000000000..c663479588 --- /dev/null +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -0,0 +1,90 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_T2080RDB_REV_D=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD" +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_MMC_BOOT=y +CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_SYS_CORTINA_FW_IN_MMC=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_MMC=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig new file mode 100644 index 0000000000..4c6879b7a5 --- /dev/null +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -0,0 +1,92 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0x00201000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_SPL_TEXT_BASE=0xFFFD8000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_T2080RDB_REV_D=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH" +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_SPI_BOOT=y +CONFIG_SPL_FSL_PBL=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig new file mode 100644 index 0000000000..79397ab30a --- /dev/null +++ b/configs/T2080RDB_revD_defconfig @@ -0,0 +1,77 @@ +CONFIG_PPC=y +CONFIG_SYS_TEXT_BASE=0xEFF40000 +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" +CONFIG_MPC85xx=y +CONFIG_TARGET_T2080RDB=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_T2080RDB_REV_D=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_MP=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)" +# CONFIG_CMD_IRQ is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=10000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_CORTINA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FMAN_ENET=y +CONFIG_MII=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_FSL=y +CONFIG_SYS_QE_FMAN_FW_IN_NOR=y +CONFIG_DM_RTC=y +CONFIG_RTC_DS1307=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_ESPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_ADDR_MAP=y +CONFIG_SYS_NUM_ADDR_MAP=64 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 73b90c2109..f2a4bef038 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -4,12 +4,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_FIT=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index 91124a444a..954d197e55 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -18,7 +19,6 @@ CONFIG_VIDEO_LCD_RESET="PG11" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index 3872f0bef8..b001d8239e 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:210,up:22,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wexler-tab7200" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index e789619c1e..dbd6bd7bf8 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -9,7 +10,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index 42d93faa55..7433727ff2 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_MMC0_CD_PIN="PB3" CONFIG_USB1_VBUS_PIN="PG12" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP_ALDO3_VOLT=3300 diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index 2f093e062d..84302ffda8 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=408 @@ -17,7 +18,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index 3c1eca4557..6701ecce2f 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=420 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 1bba7556a9..8ec9eb3e9c 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 51398d94ed..16cef18bee 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index e8dc8161a6..34c6af6e7e 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -2,9 +2,9 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 494cb6527d..4a8da32955 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -2,10 +2,10 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_XIP=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index d23b56c9bf..9cd7848c92 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -2,9 +2,9 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index adc9d669ea..188fa08dfb 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -2,10 +2,10 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index d833b206d9..3025c13d1d 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt" CONFIG_R8A7794=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 8d0e9f8a61..7b09214597 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_BALTOS=y CONFIG_SPL_MMC_SUPPORT=y @@ -10,7 +11,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index e0d144eab9..498174a1fa 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -4,10 +4,10 @@ CONFIG_ARCH_CPU_INIT=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_AM33XX=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 -CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index edb56283df..79fb8b3f8f 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -2,9 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 24c5b34bbb..9eb4ae1932 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -5,12 +5,12 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index d412311cec..7eafb6d4bd 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_GUARDIAN=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_ENV_OFFSET_REDUND=0x540000 CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" CONFIG_DISTRO_DEFAULTS=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index b4d3575ec2..3d678fa06a 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -4,9 +4,9 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40300350 CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index f0c75cd4a4..21ef7d6a44 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -4,12 +4,12 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40301950 CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set -CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 6ebf8f859d..5b9b370d30 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x18000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_IGEP003X=y CONFIG_SPL_MMC_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033" diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index 81f211b5d5..6315d449a2 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" CONFIG_AM33XX=y CONFIG_TARGET_PDU001=y CONFIG_SPL_MMC_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" CONFIG_LOCALVERSION="-EETS-1.0.0" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index caabdf4192..1f6c7b744c 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index b1912cede4..8d963b12d2 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_ICT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index a533c3924a..6ac5485644 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_NETBOOT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index fb81579348..c2f1f579cd 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_DISTRO_DEFAULTS=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index bc0f2ddc95..3df8c97601 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SL50=y CONFIG_SPL_MMC_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x20000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 0b9bd0e475..d9e089e2aa 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_AM3517_EVM=y CONFIG_EMIF4=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x3000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 6782695689..b73fb9260d 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -5,10 +5,10 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index fb8c78d11f..546669f465 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_AM43XX=y CONFIG_ENV_OFFSET_REDUND=0x120000 -CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI,QSPI_BOOT" CONFIG_QSPI_BOOT=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 7b2cb8e8d9..ed5ce0f380 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -5,10 +5,10 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL_RTC_DDR_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index a8827e6678..b1be0272e7 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -5,9 +5,9 @@ CONFIG_ISW_ENTRY_ADDR=0x40300350 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 8c9ba774b8..0f4872993f 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_SPL_TEXT_BASE=0x403018E0 CONFIG_AM43XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -14,7 +15,6 @@ CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 6157bd1913..e21b3dff53 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y CONFIG_TARGET_AM57XX_EVM=y @@ -14,7 +15,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 3de220808e..3807732b02 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 @@ -17,7 +18,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 20da3a0d26..b0cfecdd63 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_SPL_TEXT_BASE=0x40306D50 CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -19,7 +20,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index fbce9e9674..ecbc43dbb6 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_AM642_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 3e9b5650c6..4a16cdea2e 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -10,7 +10,8 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_SPL_TEXT_BASE=0x70000000 +CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" +CONFIG_SPL_TEXT_BASE=0x70020000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -21,18 +22,17 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y -CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y @@ -117,16 +117,14 @@ CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_USB=y CONFIG_DM_USB=y -CONFIG_SPL_DM_USB=y CONFIG_DM_USB_GADGET=y CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_CDNS3=y CONFIG_USB_CDNS3_GADGET=y -CONFIG_SPL_USB_CDNS3_GADGET=y CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y CONFIG_SPL_USB_CDNS3_HOST=y -CONFIG_USB_CDNS3_TI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 7f2b825378..6f9309e171 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 164c6651fb..739ced8edb 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index b45a6d2429..e08a80ef4b 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -10,13 +10,13 @@ CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index bd051eb2ad..61c00b83a0 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -10,13 +10,13 @@ CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 33526f0cf7..e0297d4ce9 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 5c1949f79d..8f587ed815 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -13,6 +13,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index b0de49cb16..ae44b66d10 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO_DE2 is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index b66b33b0e7..a17cc21cb4 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0xFFC00000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_TARGET_AMCORE=y CONFIG_DEFAULT_DEVICE_TREE="amcore" +CONFIG_TARGET_AMCORE=y CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index a10bff8ae6..6f0cf6f063 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ap121" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y -CONFIG_DEFAULT_DEVICE_TREE="ap121" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index e685a96a17..1aae19c3bf 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ap143" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP143=y -CONFIG_DEFAULT_DEVICE_TREE="ap143" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 7eb7de6879..0f7a81730d 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ap152" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP152=y -CONFIG_DEFAULT_DEVICE_TREE="ap152" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index b03a0e2e2d..59179e2bd3 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_TARGET_APALIS_IMX8=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis" +CONFIG_TARGET_APALIS_IMX8=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/apalis-imx8x_defconfig b/configs/apalis-imx8x_defconfig index 0d225db436..fc537839b8 100644 --- a/configs/apalis-imx8x_defconfig +++ b/configs/apalis-imx8x_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_TARGET_APALIS_IMX8X=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-apalis" +CONFIG_TARGET_APALIS_IMX8X=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 7c67306a49..52287fa3ff 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_APALIS_TK1=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index e1817c39f7..ad109c444f 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6Q=y CONFIG_TARGET_APALIS_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index d23f057284..59f7c27170 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_APALIS_T30=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 4d9cb5b4f1..d0e8350894 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0xD0000 CONFIG_MX6DL=y CONFIG_TARGET_ARISTAINETOS2C=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_7" CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_7" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index dd63e8f29d..cad9c8b44d 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0xD0000 CONFIG_MX6DL=y CONFIG_TARGET_ARISTAINETOS2CCSLB=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_cslb_7" CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-aristainetos2c_cslb_7" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg" diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 1b4dd324b8..bc7af829fb 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -7,10 +7,10 @@ CONFIG_TARGET_ARNDALE=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x86200 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_IDENT_STRING=" for ARNDALE" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 0d27189195..9d20cb93e0 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_SECT_SIZE=0x8000 -CONFIG_TARGET_ASTRO_MCF5373L=y CONFIG_DEFAULT_DEVICE_TREE="astro_mcf5373l" +CONFIG_TARGET_ASTRO_MCF5373L=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion" diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 89f5f2c959..ce0a3ce35a 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index a7d0d2811b..5bb6ae68ad 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index a5eaba57bd..95a0798afa 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 2172c7908d..48780fd493 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index c1f79bc69d..8705e881e5 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 4aaae5016a..1483b6f45c 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index c41744152d..3d6e6cf6df 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index c41744152d..3d6e6cf6df 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index d7f0238c15..e716d7156e 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 0547947722..db3d0fbff1 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index a41ad60b1e..01b2c84526 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 65e8fab559..4b0135f607 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 2c292d2c7f..c37a8c4a33 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 2a5acd5f01..e7ee144023 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 25b4309d3c..00cc182f85 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 32cb46d96a..9610ddd34e 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 25232054b1..6c85767b3d 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index ecfbacde0b..28195da7e9 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 8e0db87696..a98f759d10 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index f8efca1978..cdcd67b017 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index e5c270ac12..a958162574 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index bc15efe6b9..f4c3fb864e 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 084376dfc1..161ec94695 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 44670faba0..3a66fe6075 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index c7b3012c91..47eee7d8a0 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 71a4cb4119..781d91e2ca 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -7,10 +7,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 9551aedcdc..1fa557ff83 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 596b170f91..49f6a7dd2e 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 27d5490ad4..8194c13789 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 62da9896b7..25c8a16813 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 1bb8cacfe6..b7f8903b1a 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SPI_BOOT=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index d9633051fd..d2f280c254 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index fd07ebcb8d..4fd826b8ff 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index a7722276ea..a1374208bc 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 6c0d22c2ab..dbbe2d5d66 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0" CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xff000000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -12,7 +13,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa -CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 0bfd7548b0..b613c5f8cd 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -22,7 +23,6 @@ CONFIG_DEBUG_UART_CLOCK=18432000 CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068" CONFIG_BOOTDELAY=3 diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 4a403ee8aa..ada72651e4 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -2,10 +2,10 @@ CONFIG_ARC=y CONFIG_TARGET_AXS101=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_DEBUG_UART_BASE=0xe0022000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=750000000 -CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index c04604e31b..cc6a09e902 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -2,10 +2,10 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_DEBUG_UART_BASE=0xe0022000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=100000000 -CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 3b1977613b..b35f9ec682 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=384 @@ -7,7 +8,6 @@ CONFIG_DRAM_EMR1=4 CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB2_VBUS_PIN="PH12" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 4cbd62ffad..777a249ff9 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=432 CONFIG_MACPWR="PH23" CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index e6fd502038..e7d4076b56 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry" CONFIG_SPL=y CONFIG_MACH_SUN8I_R40=y CONFIG_DRAM_CLK=576 CONFIG_MMC0_CD_PIN="PH13" CONFIG_USB1_VBUS_PIN="PH23" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index a188209252..26ced59fb0 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index c03341b1d5..fb6c945919 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-bananapi-m2-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-bananapi-m2-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index 09d0517c83..ac3f8f5ab8 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MMC0_CD_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 802f9820d0..292044d7b8 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bcm963158_ram_defconfig b/configs/bcm963158_ram_defconfig index 0be1e0981a..4eb3986c61 100644 --- a/configs/bcm963158_ram_defconfig +++ b/configs/bcm963158_ram_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_TARGET_BCM963158=y CONFIG_DEFAULT_DEVICE_TREE="bcm963158" +CONFIG_TARGET_BCM963158=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/bcm968360bg_ram_defconfig b/configs/bcm968360bg_ram_defconfig index 3f115350a9..2d759fa648 100644 --- a/configs/bcm968360bg_ram_defconfig +++ b/configs/bcm968360bg_ram_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_TARGET_BCM968360BG=y CONFIG_DEFAULT_DEVICE_TREE="bcm968360bg" +CONFIG_TARGET_BCM968360BG=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index b1f8bf5000..4415faa9fe 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6838=y -CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/bcm968580xref_ram_defconfig b/configs/bcm968580xref_ram_defconfig index 8f74a4516f..09d09eede6 100644 --- a/configs/bcm968580xref_ram_defconfig +++ b/configs/bcm968580xref_ram_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_TARGET_BCM968580XREF=y CONFIG_DEFAULT_DEVICE_TREE="bcm968580xref" +CONFIG_TARGET_BCM968580XREF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index cf18feef40..006e63fc0e 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_BEAVER=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index cb2f3e3ff1..b429c8237c 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index 771d250e9f..7a8bd56a65 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 9f5265512b..42925eabcb 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-beelink-gs1" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-beelink-gs1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_LED=y CONFIG_LED_GPIO=y diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig index 9eeb930729..6206d90900 100644 --- a/configs/beelink_x2_defconfig +++ b/configs/beelink_x2_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=567 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 76cccfa586..299206e85b 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -7,12 +7,12 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=50000000 -CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" CONFIG_DEBUG_UART=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index e6583bcfc0..20262e8be1 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x200000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x220000 CONFIG_TARGET_BK4R1=y -CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index e6f0795457..67482b1a4f 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche" CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index f11581427b..8826e1f35b 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index a1d523b6f4..8c0052d418 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index e8cedccad8..7ccc925060 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_CPU_MIPS32_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 948d527fc7..78d4b2e941 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index 0eb8efd499..332f3d9305 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_CPU_MIPS64_R2=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 500284b5d3..f543137237 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R2=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index 3e06176dca..3896d66852 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_CPU_MIPS64_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index a3aeb94487..1353a1b280 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_BOSTON=y CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_TARGET_BOSTON=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 2c73ece62a..759880246f 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -8,13 +8,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc" CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index f4827e427f..97b69c1a13 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x60000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-nand" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 37e7e3d879..b834c21026 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index 38f5cce468..1f466bea5a 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -15,6 +15,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_BRPPT2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-brppt2" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SPL=y @@ -22,7 +23,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-brppt2" # CONFIG_EXPERT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index c27dd9243e..6df2ffc831 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brsmarc1" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=600 CONFIG_TARGET_BRSMARC1=y @@ -19,7 +20,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-brsmarc1" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index c1014db629..af5d5a65b4 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-brxre1" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=1000 CONFIG_TARGET_BRXRE1=y @@ -15,7 +16,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 -CONFIG_DEFAULT_DEVICE_TREE="am335x-brxre1" # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index 1cfcbb6f1c..34ff94615b 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_OWL=y CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_MACH_S900=y CONFIG_IDENT_STRING="\nBubblegum-96" -CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index a17ac2b8f4..242f65b1ba 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_CARDHU=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index c1ff9d7f14..84c8f9ecea 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_CEI_TK1_SOM=y CONFIG_ARMV7_PSCI_0_1=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig new file mode 100644 index 0000000000..6373512ee6 --- /dev/null +++ b/configs/cgtqmx8_defconfig @@ -0,0 +1,83 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8=y +CONFIG_SYS_TEXT_BASE=0x80020000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8qm-cgtqmx8" +CONFIG_TARGET_CONGA_QMX8=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx8/imximage.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_LOG=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=0 +CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_DM=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_FAT=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_SPL_DM=y +CONFIG_SPL_CLK=y +CONFIG_CLK_IMX8=y +CONFIG_CPU=y +CONFIG_MXC_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_MISC=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x5B040000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPL_TINY_MEMSET=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 24f992d7b6..c3231032ca 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x5F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="cherryhill" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="cherryhill" CONFIG_VENDOR_INTEL=y CONFIG_TARGET_CHERRYHILL=y CONFIG_DEBUG_UART=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 656f72a914..f4b685a1d5 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard" CONFIG_AM33XX=y CONFIG_TARGET_CHILIBOARD=y CONFIG_SPL_MMC_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x22000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index c09b63b946..d652ab807d 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index a846b6470f..12cc3cc222 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index d785c9ba1a..eb0884f1f5 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3d00 CONFIG_NR_DRAM_BANKS=8 CONFIG_MAX_CPUS=8 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xde000000 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_CORAL=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 692b630174..5bb2735c41 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -13,7 +14,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index e6c6c3816b..b37292a6bf 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -5,11 +5,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_X86_RUN_64BIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK64=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 6a69938677..ad9e9dd961 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index ae55842e3b..2549c49e8b 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index c839e20dc0..ef36d08109 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 256a9f8898..6eef4ba896 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_SPL_TEXT_BASE=0xffe70000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS_TPL=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 4b460ee6a9..8f7c70a8df 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 29efd26e3a..447e4e95bc 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x83800 +CONFIG_DEFAULT_DEVICE_TREE="ci20" CONFIG_SPL_TEXT_BASE=0xf4000a00 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_ARCH_JZ47XX=y -CONFIG_DEFAULT_DEVICE_TREE="ci20" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1" diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 9af4e672d2..6e379126c6 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_TARGET_CL_SOM_IMX7=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 53c2bdbb42..4702cf2df1 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_CLEARFOG=y CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 69694b5ecd..a94dc22569 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index aefda70058..2f44157adf 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_MX6QDL=y CONFIG_TARGET_CM_FX6=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 35480098b1..101d77c9d2 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am437x-cm-t43" CONFIG_SPL_TEXT_BASE=0x40300350 CONFIG_AM43XX=y CONFIG_TARGET_CM_T43=y @@ -19,7 +20,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-cm-t43" CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 2f6f5a8aea..17739fbd50 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 -CONFIG_TARGET_COBRA5272=y CONFIG_DEFAULT_DEVICE_TREE="cobra5272" +CONFIG_TARGET_COBRA5272=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index eba334bbd0..a0816acc27 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y -CONFIG_TARGET_COLIBRI_IMX8X=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" +CONFIG_TARGET_COLIBRI_IMX8X=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg" diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 956806e437..19d70c0cf8 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6DL=y CONFIG_TARGET_COLIBRI_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6-colibri" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 24dd8526e3..7a0d69f1de 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x380000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand" CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-rawnand" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" CONFIG_BOOTDELAY=1 diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 86eb3a4e60..d076a52080 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -5,13 +5,13 @@ CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc" CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_TARGET_COLIBRI_IMX7_EMMC=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7-colibri-emmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_imx7/imximage.cfg,MX7D" diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index cacd98893b..c8f1e32b1b 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_COLIBRI_T20=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index 3707e36d94..fab035b407 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_COLIBRI_T30=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 13399ca839..722c9938f5 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -9,8 +9,8 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x180000 CONFIG_DM_GPIO=y -CONFIG_TARGET_COLIBRI_VF=y CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" +CONFIG_TARGET_COLIBRI_VF=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND" CONFIG_BOOTDELAY=1 diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index 573451ef49..5d3636e34e 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-colorfly-e708-q1" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-colorfly-e708-q1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO2_VOLT=1800 diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index bb9c0b89bd..14795197a9 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6318=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 80bafb02aa..baff4b365d 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6328=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 36dcf2cdb8..f733eb4a18 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6348=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 1c2eeeddf8..f9a921a762 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM63268=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index fda61ecd72..dcc64bb6b7 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6368=y -CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index cc271bde88..f4ee9fee61 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y CONFIG_INTERNAL_UART=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index ba0a87d532..a8d961a7c5 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 84ff12876f..799a83caa2 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -2,9 +2,9 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1120000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="coreboot" CONFIG_SPL_TEXT_BASE=0x1110000 CONFIG_PRE_CON_BUF_ADDR=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="coreboot" CONFIG_X86_RUN_64BIT=y CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 992f662acb..131de75d92 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -2,8 +2,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1110000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 -CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="coreboot" +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y CONFIG_FIT=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index bfb16d797e..d84db883d2 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 8fcb66f99f..e5163d1e0f 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_R=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index e85cdc579e..a865cbf4c6 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" +CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 8206c4cdc9..ef21e965ce 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -11,11 +11,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index a6f4884395..f924efb6e0 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index ea48ba2ebe..677e248e6b 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index 8aeb591b05..61bb79e63e 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index d0b2bc5ff6..87e64e93dd 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 507f3ca903..19cdd5bdf8 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index b958bd5a5e..703fcaceb5 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -7,9 +7,9 @@ CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 64dc593d7d..8efb94dea8 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_OWL=y +CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" CONFIG_MACH_S700=y CONFIG_IDENT_STRING="\ncubieboard7" -CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index d73a32e2b1..33e2149505 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" D2 v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" +CONFIG_IDENT_STRING=" D2 v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 42db153c7f..99cb4be8c2 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -13,12 +13,12 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_LTO=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 7e48293014..414fca5383 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -10,12 +10,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_LTO=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index fc15212122..a58605d761 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA114=y CONFIG_TARGET_DALMORE=y -CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 3cf107b20a..bb73635d92 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 6cb813a3eb..a7c8498599 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 +CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index b39e213dc5..6fa00d1a17 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 +CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_BOOTDELAY=3 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index c51c1a1d42..e1f6aff8f5 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 10a4bda12e..f2da99c5d3 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -9,8 +9,8 @@ CONFIG_TARGET_DB_XC3_24G4XG=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 -CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_DEFAULT_DEVICE_TREE="armada-xp-db-xc3-24g4xg" +CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 3889ce08ea..5318d7d612 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 -CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/siemens/capricorn/imximage.cfg" diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 934798e094..a22053396c 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -16,6 +16,7 @@ CONFIG_MX6QDL=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_DHCOMIMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -26,7 +27,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index 537ffb8449..1679c08a2c 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:480,y:272,depth:18,pclk_khz:12000,le:1,ri:43,up:1,lo:12 CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 094bca347e..53fe37ccde 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_DISPLAY5=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -27,7 +28,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 8d691746e8..2ade8c2055 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -16,6 +16,7 @@ CONFIG_TARGET_DISPLAY5=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -24,7 +25,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 493c802d52..d5d79f5297 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_TARGET_DNS325=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 -CONFIG_IDENT_STRING="\nD-Link DNS-325" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" +CONFIG_IDENT_STRING="\nD-Link DNS-325" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 0b434f46a0..4eba866533 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_DOCKSTAR=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar" +CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 30136d2f82..9d222f1ef3 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y @@ -14,7 +15,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 6be462d7d2..86ec00396d 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 @@ -17,7 +18,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 53e1adf5e6..229309c8f4 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_SPL_TEXT_BASE=0x40306D50 CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -19,7 +20,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index e3ccdea5f5..e749608a5c 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_DRACO=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 6831372243..7b7b32c0a2 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 -CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" +CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_DISTRO_DEFAULTS=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index d43fdf16b6..3a9cf0a5ef 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -3,9 +3,9 @@ CONFIG_ARCH_SNAPDRAGON=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" CONFIG_TARGET_DRAGONBOARD820C=y CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" -CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyMSM0,115200n8" diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index b4dedc9e59..8956d2f3c5 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_DREAMPLUG=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug" +CONFIG_IDENT_STRING="\nMarvell-DreamPlug" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index d852284906..b8a0bd09d4 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index 8cea37b0b1..a232b904e2 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_MMC0_CD_PIN="PH1" @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 171abbfd7c..8d83e60a59 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -4,8 +4,8 @@ CONFIG_TARGET_DURIAN=y CONFIG_SYS_TEXT_BASE=0x500000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 -# CONFIG_PSCI_RESET is not set CONFIG_DEFAULT_DEVICE_TREE="phytium-durian" +# CONFIG_PSCI_RESET is not set CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_BOOTARGS=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index 3673010b23..95f1df9a4c 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xFF000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_EB_CPU5282=y CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282" +CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400" CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index ec38b09911..a2bffaf237 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -2,8 +2,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_EB_CPU5282=y CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal" +CONFIG_TARGET_EB_CPU5282=y CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418" CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/edison_defconfig b/configs/edison_defconfig index 304a172a1b..82265484bc 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x1101000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 -CONFIG_ENV_OFFSET_REDUND=0x600000 CONFIG_DEFAULT_DEVICE_TREE="edison" +CONFIG_ENV_OFFSET_REDUND=0x600000 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_EDISON=y CONFIG_SMP=y diff --git a/configs/efi-x86_app_defconfig b/configs/efi-x86_app_defconfig index 4644e51ccb..e9ee66250c 100644 --- a/configs/efi-x86_app_defconfig +++ b/configs/efi-x86_app_defconfig @@ -1,9 +1,9 @@ CONFIG_X86=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="efi-x86_app" CONFIG_DEBUG_UART_BASE=0 CONFIG_DEBUG_UART_CLOCK=0 -CONFIG_DEFAULT_DEVICE_TREE="efi-x86_app" CONFIG_VENDOR_EFI=y CONFIG_TARGET_EFI_APP=y CONFIG_DEBUG_UART=y diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 1c3724b313..4f1d6a9198 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 -CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="efi-x86_payload" +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_EFI=y CONFIG_TARGET_EFI_PAYLOAD=y CONFIG_FIT=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index 58a9a2eab9..26cfc49490 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 -CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="efi-x86_payload" +CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_VENDOR_EFI=y CONFIG_TARGET_EFI_PAYLOAD=y CONFIG_FIT=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index db754b0939..af4f3f1d23 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -3,12 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_ROCKCHIP_RV1108=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_TARGET_ELGIN_RV1108=y CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_DEBUG_UART=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb" diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index 0e908c327b..e2d3b1397e 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-emlid-neutis-n5-devboard" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-emlid-neutis-n5-devboard" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 2b6498e89e..1948c76fee 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -4,8 +4,8 @@ CONFIG_CPU_ARCEM6=y CONFIG_TARGET_EMSDP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ENV_SIZE=0x1000 -CONFIG_SYS_CLK_FREQ=40000000 CONFIG_DEFAULT_DEVICE_TREE="emsdp" +CONFIG_SYS_CLK_FREQ=40000000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index edc997e449..a079accfae 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -6,8 +6,8 @@ CONFIG_ARCH_EXYNOS7=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 -CONFIG_IDENT_STRING=" for ESPRESSO7420" CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420" +CONFIG_IDENT_STRING=" for ESPRESSO7420" # CONFIG_AUTOBOOT is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 10534d36b1..7ae472f413 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x980000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_ETAMIN=y @@ -22,7 +23,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig new file mode 100644 index 0000000000..cc95fdb0de --- /dev/null +++ b/configs/ev-imx280-nano-x-mb_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_MX6ULL=y +CONFIG_TARGET_O4_IMX6ULL_NANO=y +CONFIG_DM_GPIO=y +CONFIG_EV_IMX280_NANO_X_MB=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 2d0a5ec293..9133419511 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -6,8 +6,8 @@ CONFIG_TARGET_EVB_AST2500=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_PRE_CON_BUF_ADDR=0x1e720000 CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb" +CONFIG_PRE_CON_BUF_ADDR=0x1e720000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 91518dbe35..f24425997d 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -9,11 +9,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SIZE_LIMIT=0x10000 CONFIG_SPL=y # CONFIG_ARMV7_NONSEC is not set -CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y # CONFIG_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index d2fdfef293..8bcf8edec5 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-evb" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y @@ -13,7 +14,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-evb" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index fce3b85594..3a5f1e7c95 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_ROCKCHIP_RK3368=y CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds" CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1c0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 0555d40f51..324528e296 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -5,13 +5,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_SPL_TEXT_BASE=0x10081000 CONFIG_ROCKCHIP_RK3036=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index f72f27f3d8..1062801642 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -3,10 +3,10 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_ROCKCHIP_RK3128=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index e708ed4909..02e19fa10c 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x61000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_SPL_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RK322X=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 @@ -11,7 +12,6 @@ CONFIG_TARGET_EVB_RK3229=y CONFIG_SPL_STACK_R_ADDR=0x60600000 CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7361a3fe65..658ddc9750 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x04000000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 9230983c88..f34f3497f4 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb" CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -11,7 +12,6 @@ CONFIG_TARGET_EVB_RK3308=y CONFIG_SPL_STACK_R_ADDR=0xc00000 CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 9cbfeb0279..fffabd605d 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_STACK_R_ADDR=0x4000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 909c68822c..21477719dc 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index c9cbf04686..be7ebd4707 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -2,10 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_ROCKCHIP_RV1108=y CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index c20b564d43..a2df9eab3c 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -2,13 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_TARGET_ROCK960_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 6487615fe0..d902ab7a9b 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-firefly" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y @@ -14,7 +15,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-firefly" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index b3c22346f4..3fa8e155e3 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index fe9fbef781..2ca2ac35e4 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index fbf8797bd9..599eeb96b4 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=432 @@ -15,7 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-ga10h-v1.1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 40fe0f150e..89e9c2c8d5 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 @@ -17,7 +18,6 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index c03123f6e4..c0795b589a 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 @@ -13,7 +14,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y -CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 98c58b5c97..a821816784 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_MEMTEST_END=0x07e00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="gazerbeam" CONFIG_IDENT_STRING=" gazerbeam 0.01" CONFIG_SYS_CLK_FREQ=33333333 -CONFIG_DEFAULT_DEVICE_TREE="gazerbeam" CONFIG_MPC83xx=y CONFIG_TARGET_GAZERBEAM=y CONFIG_SYSTEM_PLL_VCO_DIV_2=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 49c3a99de7..efd4eed61a 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 # CONFIG_GE_RTC is not set CONFIG_MX6QDL=y CONFIG_TARGET_GE_B1X5V2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index a266ffd849..b831850ec0 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_MX6Q=y CONFIG_TARGET_GE_BX50V3=y CONFIG_DM_GPIO=y -CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" +CONFIG_BOOTCOUNT_BOOTLIMIT=10 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index 4f0191cc00..55892f07f2 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_GEEKBOX=y CONFIG_DEBUG_UART_BASE=0xFF690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 1c51943d3e..8b653be1e5 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 -CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/siemens/capricorn/imximage.cfg" diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 6e3e6325e9..9285e8d4d7 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GOFLEXHOME=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xC0000 -CONFIG_IDENT_STRING="\nSeagate GoFlex Home" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet" +CONFIG_IDENT_STRING="\nSeagate GoFlex Home" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 56d08086b7..5cd4cb8c12 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose" CONFIG_R8A7793=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index b05d657f5c..d497ac8007 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_RZA1=y CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" +CONFIG_RZA1=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="ignore_loglevel" diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index 65f39d0ed1..1a5fe06bbe 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=480 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-gt90h-v4" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index a3fe98cabf..954e429a9d 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_GURUPLUG=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 -CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" +CONFIG_IDENT_STRING="\nMarvell-GuruPlug" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 97b39b6e72..68f4fe8566 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -11,6 +11,7 @@ CONFIG_MX6QDL=y CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -85,9 +86,13 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index ce40a4d85b..b6e4cba3ba 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -11,6 +11,7 @@ CONFIG_MX6QDL=y CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -89,9 +90,13 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index a4d85956a0..5d022b63ad 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -11,6 +11,7 @@ CONFIG_MX6QDL=y CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-gw54xx" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -91,9 +92,13 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 39a61719dc..29f965200e 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_CLK=480 @@ -8,7 +9,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_PIN="PL5" CONFIG_USB1_VBUS_PIN="PL6" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-allwinner-h8homlet-v2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_AXP_DLDO4_VOLT=3300 diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index bd9201b0f3..4fc0305637 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_HARMONY=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 0c88486fac..202e57344d 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_HELIOS4=y CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index a42ac96577..be71ebb6a2 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot" CONFIG_RCAR_GEN3=y CONFIG_TARGET_HIHOPE_RZG2=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index ca3b2016ad..316a0420df 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x1ac98000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 -CONFIG_IDENT_STRING="\nHikey960" CONFIG_DEFAULT_DEVICE_TREE="hi3660-hikey960" +CONFIG_IDENT_STRING="\nHikey960" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 222b79e3ad..243733618b 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=6 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 -CONFIG_IDENT_STRING="hikey" CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" +CONFIG_IDENT_STRING="hikey" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index b90bf7d25e..75a1698e64 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -4,10 +4,10 @@ CONFIG_TARGET_HSDK=y CONFIG_BOARD_HSDK_4XD=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd" CONFIG_DEBUG_UART_BASE=0xf0005000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 -CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd" CONFIG_DEBUG_UART=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index 1e51862e33..dd2cfb9264 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -3,10 +3,10 @@ CONFIG_ISA_ARCV2=y CONFIG_TARGET_HSDK=y CONFIG_SYS_TEXT_BASE=0x81000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="hsdk" CONFIG_DEBUG_UART_BASE=0xf0005000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 -CONFIG_DEFAULT_DEVICE_TREE="hsdk" CONFIG_DEBUG_UART=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 00290042f2..f08e2ad9d1 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6358=y -CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 50ef905004..6347481d88 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 CONFIG_MACPWR="PH21" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_PHY_REALTEK=y diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 0271a4012a..f8a95dbcb3 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index 1ea234a418..019c5a8f3a 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:24,pclk_khz:65000,le:159,ri:160,up:22, CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index ccd3b52dab..b2462a3e25 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index f0cb036a9f..9a90252dbd 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=456 @@ -15,7 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 57ccfe71fb..b24402c947 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_IB62X0=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 -CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0" +CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index 24079c8b8d..d33c390f25 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 @@ -11,7 +12,6 @@ CONFIG_USB1_VBUS_PIN="PG10" CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_UNZIP=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index d3aea6ead2..4b6d82fe64 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_ICONNECT=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect" +CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 8aa7fb022e..a3b97e512c 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -3,10 +3,10 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x8000 +CONFIG_DEFAULT_DEVICE_TREE="omap3-igep0020" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap3-igep0020" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig index e5717d39ef..c8e09829df 100644 --- a/configs/imgtec_xilfpga_defconfig +++ b/configs/imgtec_xilfpga_defconfig @@ -1,8 +1,8 @@ CONFIG_MIPS=y CONFIG_SYS_MALLOC_F_LEN=0x600 CONFIG_ENV_SIZE=0x4000 -CONFIG_TARGET_XILFPGA=y CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr" +CONFIG_TARGET_XILFPGA=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_BOOTDELAY=5 diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 135c38c98b..7247ed9d8c 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -10,6 +10,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="imx28-xea" CONFIG_SPL_TEXT_BASE=0x1000 CONFIG_TARGET_XEA=y CONFIG_SPL_MMC_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx28-xea" CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 06005c4288..7b20d2bba5 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index fa2adaf47d..a163f42d57 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -8,10 +8,10 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6DL_MAMOJ=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_IMX_HAB=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index f38b06dab9..bc5b9a751f 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 64c20b8523..85a29f3ee2 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -12,13 +12,13 @@ CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6Q=y CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_MX6LOGICPD=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index f1b5389470..3d931d15f3 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y @@ -18,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index a32ae6a75d..854a8121d0 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 @@ -21,7 +22,6 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index f38b06dab9..bc5b9a751f 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 34e3250f95..c48260dd27 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6Q_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 4b47e196f3..536e2366b8 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 9870612edf..1b7be3bf9e 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 2e33db21d8..a3e77687d2 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 9c4f742135..9631823262 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -11,11 +11,11 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_ENGICAM=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index 36382439b2..d7a7924d51 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_SYS_I2C_MXC_I2C4=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7-cm" CONFIG_TARGET_IMX7_CM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7-cm" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index be98fa833b..f46f45bda9 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_CL_IOT_GATE=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 6053da4075..4b60fc8f6e 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-ctouch2" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-ctouch2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index fadc6eb93c..99c01791ba 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-edimm2.2" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_ICORE_MX8MM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-icore-mx8mm-edimm2.2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 2248491ad4..6f272ef9bc 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -11,13 +11,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_BEACON=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 200bf554e0..a06c6f9794 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -11,13 +11,14 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -30,7 +31,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -40,17 +40,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_PART=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 07ddf37216..daffcc46d5 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_VENICE=y CONFIG_SPL_MMC_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-venice" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index ecd7fabbb8..ecbc8c30a5 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_IMX8MN_BEACON_2GB_LPDDR=y @@ -22,7 +23,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index 9a77f22ce2..fa3fdfa880 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -21,7 +22,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index a3e51bad82..205757da22 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_DDR4_EVK=y CONFIG_SPL_MMC_SUPPORT=y @@ -18,7 +19,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-ddr4-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -32,7 +33,6 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -45,10 +45,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 86601ebad3..469bef0e6d 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -13,13 +13,14 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mn-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -35,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -48,10 +48,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 11d62837bc..d0f390ed77 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_TARGET_IMX8MP_EVK=y CONFIG_SPL_MMC_SUPPORT=y @@ -18,7 +19,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -35,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set @@ -45,17 +45,9 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_PART=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index 1f52f9bcf2..e11122e645 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -10,12 +10,12 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-cm" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_CM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-cm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 7116a909cb..1df4192401 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index f69b4702a2..3a1b60b8a3 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_PHANBELL=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 8765c91ab9..7589967e21 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" @@ -17,7 +18,6 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-mek" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qm_mek/imximage.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index d363b1adef..7e1070fd25 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -8,12 +8,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8qm-rom7720-a1" CONFIG_TARGET_IMX8QM_ROM7720_A1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8qm-rom7720-a1" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 5c78319d56..a8e8df7fe6 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek" CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" @@ -17,7 +18,6 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-mek" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_mek/imximage.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index ad408ebef8..0dc3743f88 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -8,13 +8,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk" CONFIG_SPL_TEXT_BASE=0x20209000 CONFIG_TARGET_IMXRT1020_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set @@ -61,6 +61,7 @@ CONFIG_IMXRT_SDRAM=y CONFIG_FSL_LPUART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y +CONFIG_IMX_GPT_TIMER=y CONFIG_SHA1=y CONFIG_SHA256=y CONFIG_HEXDUMP=y diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index d03572e7db..0e426ce1ff 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk" CONFIG_SPL_TEXT_BASE=0x20209000 CONFIG_TARGET_IMXRT1050_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk" CONFIG_DISTRO_DEFAULTS=y CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set @@ -32,8 +32,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set # CONFIG_BOOTM_VXWORKS is not set +CONFIG_CMD_USB=y # CONFIG_CMD_MII is not set -# CONFIG_DOS_PARTITION is not set +# CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_OF_CONTROL=y @@ -64,6 +65,11 @@ CONFIG_IMXRT_SDRAM=y CONFIG_FSL_LPUART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y +CONFIG_IMX_GPT_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_EHCI_HCD=y CONFIG_DM_VIDEO=y CONFIG_BACKLIGHT_GPIO=y CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index e9588165bc..e2678478f2 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index 1e0e31cd30..3ade9fea82 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=552 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-inet86dz" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index 56dc0b0201..69bd0f8782 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index cbbbe8b1bc..152b8a6894 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index d59990a1fd..049830b7db 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 @@ -11,7 +12,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index 191b13caf9..1769256b7d 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_CLK=384 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:65000,le:280,ri:20,up:22,l CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-inet-q972" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 248d81b7a4..fe48f56cc5 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" IS v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" +CONFIG_IDENT_STRING=" IS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index 98cdf4730d..4d9c85aa78 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_TARGET_IOT_DEVKIT=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_ENV_SIZE=0x1000 -CONFIG_SYS_CLK_FREQ=16000000 CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" +CONFIG_SYS_CLK_FREQ=16000000 CONFIG_LOCALVERSION="-iotdk-1.0" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_PROMPT="IoTDK# " diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index b204c7a73e..b0cde842dd 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 5c51bd5ae7..4a177d2e0f 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index f2a293480f..365d662690 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 8a9b20141b..7253466e2a 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 858e179573..82b25e695a 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT_IMAGE_POST_PROCESS=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index cff45ff693..7842df9df6 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x680000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -22,7 +23,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 92450b7e70..c4b5d0cd0b 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=312 CONFIG_MACPWR="PH19" CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_MII=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 0e72166216..541381824a 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 74c45a39ac..2798d56489 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -13,11 +13,11 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index ceb2f765da..2d57976489 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -12,11 +12,11 @@ CONFIG_TARGET_K2G_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index bb7d9a292c..6745da1315 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -13,11 +13,11 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 99ed46e3d2..f23bdbf917 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -13,11 +13,11 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index ce6b492b3d..c564086704 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index e52963e86f..4c63686ef2 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 5f61df85da..1e44e2b5c1 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 241da53c4c..3251399839 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2" CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 22951a9031..c4b24fc314 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index a6fa432890..0c731d4cee 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" -CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 53a8cbf290..2df00d54ec 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 151425fbe3..e00d14c493 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood 128M16" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 22c2e0509d..490538d791 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index c091cd6cfe..1f14a9b0fe 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -7,10 +7,10 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_KM_FPGA_CONFIG=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood PCI" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 0c09e2f188..f6fb8afe5a 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -5,8 +5,8 @@ CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_IVM_BUS=2 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 CONFIG_DEFAULT_DEVICE_TREE="kmcent2" +CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index f58186e80c..a54808df60 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_KM_DEF_NETDEV="eth1" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMCOGE5NE=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 4d2c17f399..51f0f87193 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -10,10 +10,10 @@ CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids COGE5UN" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index aadcbf47ba..5138a5680c 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_KM_DEF_NETDEV="eth2" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmeter1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmeter1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMETER1=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index faaa8d1a5f..9b98034e88 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -10,10 +10,10 @@ CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index aaf8d374d3..80f74eac8c 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmopti2" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmopti2" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMOPTI2=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 8ecddbdef1..0482634ead 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmsupm5" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmsupm5" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMSUPX5=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index d8280f961b..e0b0ad61d1 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -11,10 +11,10 @@ CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_SUSE2" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 0e69925e03..d98b2eb19c 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_KM_DEF_NETDEV="eth1" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtegr1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtegr1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMTEGR1=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index c4ebac60a5..665adee38b 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtepr2" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtepr2" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_KMTEPR2=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 562259b951..ecbb4c9b8f 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch" CONFIG_R8A7791=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 98718db5c2..29a45ec54b 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x3e0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28" CONFIG_SPL_TEXT_BASE=0x18010000 CONFIG_SYS_FSL_SDHC_CLK_DIV=1 CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_ENV_OFFSET_REDUND=0x3f0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 7175438056..4a2d8afe4e 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_TARGET_KP_IMX53=y +CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_OFFSET_REDUND=0x102000 # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 5ec9c6a38d..ed72d59c18 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -13,13 +13,13 @@ CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KP_IMX6Q_TPC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 6642c84a5b..b707667274 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_SPL_TEXT_BASE=0x10081000 CONFIG_ROCKCHIP_RK3036=y CONFIG_TARGET_KYLIN_RK3036=y @@ -13,7 +14,6 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 9d318e73d7..0e7340e958 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager" CONFIG_R8A7790=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 4242dec9aa..a3afb1d81b 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index bfcd47101b..ec51f2ad38 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-ac" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 11d620bc14..4029039340 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 48b3ffe1a8..97c8a9e47b 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc-v2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 17ed47b48a..c0301a0aa0 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s905d-pc" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index df8be29751..e2faea6242 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s912-pc" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index ba261ecc24..8725fe64cd 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index ede2aa55fb..5275fdc36d 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index ec32e7db0a..9627401949 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 8b9a9519de..7f0e0be50b 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-it" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-it" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_XMC=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index 9972cfd474..25bfe52b32 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h5-cc" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h5-cc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_XMC=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index dd2524e4ec..05bc824049 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -5,13 +5,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y CONFIG_BOARD_LINKIT_SMART_7688=y -CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 58c6f00308..a1c01d3f37 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_RK3368=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 798a6e9f29..106f472ad7 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -12,11 +12,11 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6UL=y CONFIG_TARGET_LITEBOARD=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-liteboard" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-liteboard" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 7a188d2149..bc200b8cb6 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 93690462d5..94bd37ad01 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 27a73931b5..d71bd5e4bc 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index d17f1e28ed..4d056858eb 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index eea33d3dcf..82da55d0f8 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 2d0548b04e..56c978e93c 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 1a8343e67c..84775debf8 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 64200daec4..812b0ccc42 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index cafd0dc58a..066a204de8 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 7a0e80025c..8ba2541f55 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index ac03940ac9..9f958543d2 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 349e4e9597..60d42759d2 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -7,9 +7,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 20b37ffba0..dbff94cb0f 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index c8902defe5..e908a854b4 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index c460e39d0a..ddfb01dba5 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index cb65fd973a..dfdb3c0623 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_AHCI=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 93cb6bfbf2..1aac0bf408 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 344211826f..148d67b8b7 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index c6d5c1ec95..207307f206 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 47d8781a0f..19385e7bc9 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -7,11 +7,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 11d33fd827..f7318f4581 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index e08fa9caa2..9c503a0233 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 80997a7b63..a4225fcd37 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index b576806b9d..4179e56f8f 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -9,10 +9,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index bcdb96d0bb..788b87cd67 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -10,10 +10,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index e310cfee1d..23caf76463 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 34cd6fbaab..e3d9a75dc9 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -9,10 +9,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 6ffc3bd399..b8841d5b17 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -10,10 +10,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 42fd350075..5e04dca25c 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 1bafc2bb03..8f479b7cb2 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 8fb23acd88..f0951cdf3e 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index f87c9a7cbf..1de948f48c 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 5de4e07457..8a98ce9977 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 6e3318b1ed..11b46211dc 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index cd20980c98..1fe1dee7a9 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 4caabcadb8..29e47cd55a 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index fb28072638..4d6a644a02 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 5e1cfc6f31..a4d4547b44 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index bd7b2db13a..fb59209736 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -5,8 +5,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 04633bc7b7..cfba38129e 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 5c993f3a01..8eb756023c 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 1f6087ccd6..cf30623494 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index c66ec3ba53..10e1e01e81 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 44cbd76abf..5438106c95 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 7e53bc4b65..dcb9a750b0 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index f953106a3d..45f28527e5 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -4,11 +4,12 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y @@ -30,7 +31,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y -CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index ea62d7fa7e..27e4409d76 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 7e7ae34226..3177a03a79 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 8905d450da..9fd216ba54 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 6627ac2bb0..eab291a22f 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 9da564a788..5daac1f408 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -7,11 +7,11 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 6cf46ff2c9..b1152cbef1 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 165c272c41..abaec2105f 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 8e60a35858..4b1628b108 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -9,13 +9,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 7e57b53a1f..af2267b031 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 9366bc1d32..f64d0d6c2d 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 68efb1be92..dc2369422c 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 3b43fd0ae6..eb14baa726 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index a9036dd11f..3dd546f90d 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -6,9 +6,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index a6e464b5c1..73f5a53445 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_FSL_LS_PPA=y @@ -15,7 +16,6 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 3514f29bfe..3b191ecf27 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index e5a8ad15a8..0b9de84310 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -7,13 +7,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index faa08b2fed..1ac6720b0b 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -6,10 +6,10 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 53f13147fa..226ebb0311 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index c0fb4c9872..55e52c8770 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -8,8 +8,8 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 57c91c1ad8..9dc5f8dbb2 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 9abaead1c8..91903bd110 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 44d4c13632..fcb48741e3 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index dadea57078..3e8c269add 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 5229a351e1..c678fe0075 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -11,10 +11,10 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y @@ -48,6 +48,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index de3759951e..a78103c3b3 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 0e32aeb634..c29a3a606b 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 7b85bf6174..0281c681e3 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 59469d3b7e..c2bd323e12 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -10,13 +10,13 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 84fbab0f42..224cc63296 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -10,10 +10,10 @@ CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 007a80c2c6..6e7ecf95e7 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -11,10 +11,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y @@ -45,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index bfa697c9ef..f984149983 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 6f9cce5b25..9a69d143d1 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index cc0f2b16aa..bb36da157b 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xE0000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 71174de458..0b13a4c414 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -7,13 +7,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 1175aafadb..bf716f8026 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 53abd06ec6..af300af172 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 93032edc0c..a1f2f2b4db 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index ab1a9e22e0..3a995e29f8 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2081a-rdb" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 5620e8a786..f54edb6132 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y @@ -42,7 +42,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_ENV_ADDR=0x20500000 +CONFIG_ENV_ADDR=0x580500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 10c139c98e..bc88ce3418 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -6,9 +6,9 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 58fc6b2384..9551b6872f 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index eed26fa898..7dfc438b95 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 56cd02418c..9d8f3d2549 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 0385e3e787..16611dc52a 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_LSXL=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" +CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DISTRO_DEFAULTS=y CONFIG_API=y CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index d36ab37391..dae76d34cf 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_LSXL=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" +CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DISTRO_DEFAULTS=y CONFIG_API=y CONFIG_SYS_EXTRA_OPTIONS="LSXHL" diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 54d88c88d5..9935946074 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index d25d3e8b98..1d7a751209 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 1d61807c11..40d6f2a35d 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index a160cfe21e..4a747fcdbd 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -9,11 +9,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 8b69a36dd9..f7fb60e2e1 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -9,11 +9,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index fcc78c6fe5..e1619827d0 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index 42a3a3af44..e404f7a030 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index bf0ac38ff2..96f190610c 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2162a-qds" CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 0c1a307558..277be6daaf 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_TARGET_M53MENLO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo" CONFIG_SPL_TEXT_BASE=0x70008000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 @@ -18,7 +19,6 @@ CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x180000 # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo" CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/menlo/m53menlo/imximage.cfg" diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index 878dc6ee05..5ae79292da 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_MALTA=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_TARGET_MALTA=y CONFIG_CPU_MIPS64_R2=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 7dfe67355f..cd78b81212 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -2,9 +2,9 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFFBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_TARGET_MALTA=y CONFIG_BUILD_TARGET="u-boot-swap.bin" -CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_CPU_MIPS64_R2=y # CONFIG_AUTOBOOT is not set diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 304f2198ba..0e9babd4dc 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_TARGET_MALTA=y CONFIG_DEFAULT_DEVICE_TREE="mti,malta" +CONFIG_TARGET_MALTA=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 7436e4e943..77c05d7108 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -2,9 +2,9 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xBE000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_TARGET_MALTA=y CONFIG_BUILD_TARGET="u-boot-swap.bin" -CONFIG_DEFAULT_DEVICE_TREE="mti,malta" CONFIG_SYS_LITTLE_ENDIAN=y # CONFIG_AUTOBOOT is not set CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 02b13d4a09..e754108b73 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index f4a572ded6..4dfd51628b 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -10,11 +10,11 @@ CONFIG_MX6QDL=y CONFIG_TARGET_MCCMON6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index fce6f4d6e6..a2d3e44c22 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -10,12 +10,12 @@ CONFIG_MX6QDL=y CONFIG_TARGET_MCCMON6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 1d87ca820f..8d7b9ef15e 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_MEDCOM_WIDE=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig index 200a51444a..0c40546cf1 100644 --- a/configs/meerkat96_defconfig +++ b/configs/meerkat96_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" CONFIG_TARGET_MEERKAT96=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-meerkat96" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/novtech/meerkat96/imximage.cfg" CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 245763b408..3095226708 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_MICROBLAZE_GENERIC=y @@ -11,7 +12,6 @@ CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 -CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index e3c3473748..8a8c55bc88 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_VENDOR_INTEL=y CONFIG_TARGET_MINNOWMAX=y CONFIG_INTERNAL_UART=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 234ced5ab0..9a728ccaa1 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_MIQI_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 7ae37ce23f..0e4cdc4467 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" CONFIG_SPL=y CONFIG_MACH_SUN6I=y CONFIG_DRAM_ZQ=251 @@ -7,7 +8,6 @@ CONFIG_MACPWR="PA21" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" -CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index fd4299bfc2..12e053cf1a 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 3bea575043..b5e9d23cb6 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUNXI_NO_PMIC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index f811ff34ca..5fa93c148b 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" CONFIG_SPL=y CONFIG_MACH_SUN4I=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 2540272e40..8907dc2a3c 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -7,13 +7,13 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_JR2=y -CONFIG_DEFAULT_DEVICE_TREE="jr2_pcb110" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y CONFIG_FIT=y diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index d2ce2798f5..498ddd50d3 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=208333333 @@ -14,7 +15,6 @@ CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_LUTON=y CONFIG_DDRTYPE_MT47H128M8HQ=y -CONFIG_DEFAULT_DEVICE_TREE="luton_pcb091" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index 6e163502fa..0d5c13a55f 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -7,12 +7,12 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y -CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y CONFIG_FIT=y diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index f1e0ec0ccf..6d9e8276f5 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="serval_pcb106" CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVAL=y CONFIG_DDRTYPE_H5TQ1G63BFA=y -CONFIG_DEFAULT_DEVICE_TREE="serval_pcb106" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index 6c22824aac..0e982527c9 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116" CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVALT=y -CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116" CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig index 341d86838c..5e9d267f27 100644 --- a/configs/mt7620_mt7530_rfb_defconfig +++ b/configs/mt7620_mt7530_rfb_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y @@ -12,7 +13,6 @@ CONFIG_DEBUG_UART_BASE=0xb0000c00 CONFIG_DEBUG_UART_CLOCK=40000000 CONFIG_ARCH_MTMIPS=y CONFIG_BOARD_MT7620_MT7530_RFB=y -CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig index 3bea875255..82b525c4d4 100644 --- a/configs/mt7620_rfb_defconfig +++ b/configs/mt7620_rfb_defconfig @@ -5,13 +5,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xb0000c00 CONFIG_DEBUG_UART_CLOCK=40000000 CONFIG_ARCH_MTMIPS=y -CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 81a5a3b05f..6c0d4ba46d 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -4,9 +4,9 @@ CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=25000000 -CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="mt7622-rfb" diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index dd40d0846a..7085f367b4 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_TARGET_MT7623=y CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc" +CONFIG_TARGET_MT7623=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index 0a91752e2a..bd35dbac4d 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_TARGET_MT7623=y CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" +CONFIG_TARGET_MT7623=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig index 831e54e9f3..039686096c 100644 --- a/configs/mt7628_rfb_defconfig +++ b/configs/mt7628_rfb_defconfig @@ -5,13 +5,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y CONFIG_BOARD_MT7628_RFB=y -CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_FIT=y diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index cd9f7aaa06..a624e706d2 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb" CONFIG_SPL_TEXT_BASE=0x201000 CONFIG_TARGET_MT7629=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x40800000 CONFIG_SPL_PAYLOAD="u-boot-lzma.img" CONFIG_BUILD_TARGET="u-boot-mtk.bin" -CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb" CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig index c74b812bd8..4ff2cdfb2f 100644 --- a/configs/mt8183_pumpkin_defconfig +++ b/configs/mt8183_pumpkin_defconfig @@ -7,11 +7,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="mt8183-pumpkin" CONFIG_TARGET_MT8183=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=26000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="mt8183-pumpkin" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 2787f75f64..b835436735 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DM_GPIO=y -CONFIG_TARGET_MT8512=y CONFIG_DEFAULT_DEVICE_TREE="mt8512-bm1-emmc" +CONFIG_TARGET_MT8512=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb" diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 780660058d..945643ab25 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="mt8516-pumpkin" CONFIG_TARGET_MT8516=y CONFIG_DEBUG_UART_BASE=0x11005000 CONFIG_DEBUG_UART_CLOCK=26000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="mt8516-pumpkin" CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig index 5bf405e314..09075765f8 100644 --- a/configs/mt8518_ap1_emmc_defconfig +++ b/configs/mt8518_ap1_emmc_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x40008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 -CONFIG_TARGET_MT8518=y CONFIG_DEFAULT_DEVICE_TREE="mt8518-ap1-emmc" +CONFIG_TARGET_MT8518=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc.dtb" diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 1afea4b989..65cce2e63b 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -7,9 +7,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OCTEONTX2_CN913x=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 +CONFIG_DEFAULT_DEVICE_TREE="cn9130-crb-A" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="cn9130-crb-A" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index fbccc8e214..c9935da102 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 11d90692fe..b11badb52a 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -8,9 +8,9 @@ CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 2d8e8ef127..bc12b75c79 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="cn9130-db-A" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="cn9130-db-A" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 95a48b182c..157a4b7cb2 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index e9077c7ef3..68a98f0732 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 652ea64545..dd5ac76419 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-puzzle-m801" CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-8040-puzzle-m801" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 01293816ff..bfaa4a2c29 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="imx23-olinuxino" CONFIG_SPL_TEXT_BASE=0x00001000 CONFIG_TARGET_MX23_OLINUXINO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx23-olinuxino" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index 086d2bfce3..c6f3c3f912 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx23-evk" CONFIG_SPL_TEXT_BASE=0x00001000 CONFIG_TARGET_MX23EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx23-evk" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index c5843c5433..a5bda10a2e 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -6,8 +6,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_TARGET_MX51EVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx51-babbage" +# CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 883abee4f1..4d25373966 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -6,8 +6,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_MX53CX9020=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-cx9020" +# CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/beckhoff/mx53cx9020/imximage.cfg" CONFIG_BOOTDELAY=1 diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 799ffd85ea..6c68234746 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_TARGET_MX53LOCO=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-qsb" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" CONFIG_USE_PREBOOT=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index ceea322004..e34f72796c 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -6,8 +6,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2800 CONFIG_TARGET_MX53PPD=y CONFIG_DM_GPIO=y -CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd" +CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 3c90ab05dc..5252e3f46b 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xFE000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6CUBOXI=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 3e66b334e5..d9f54da3e7 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -10,8 +10,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6Q=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabrelite" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024,SABRELITE" diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 56283a1388..e1d8eb606b 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -11,13 +11,13 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6SABREAUTO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_NXP_BOARD_REVISION=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto" CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index ba44543869..6284d9daae 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -11,12 +11,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6QDL=y CONFIG_TARGET_MX6SABRESD=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 2abf48cffe..9469c35bbd 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SL=y CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index a44a7454b3..5dd0dfba26 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6SL=y CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_SPI_BOOT=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index dac3bd7fa5..99fd2186d0 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -10,13 +10,13 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SL=y CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index d9606cab7c..771d69b3f0 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -9,8 +9,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6SLL=y CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 3a4c2bac0f..d0001223a9 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6SLL=y CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" CONFIG_USE_IMXIMG_PLUGIN=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sllevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index f4278c3640..4bd1988c48 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SX=y CONFIG_TARGET_MX6SXSABREAUTO=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sabreauto" +# CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg" CONFIG_HUSH_PARSER=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index ceccb6b5b1..225b7e4b11 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_MX6SX=y CONFIG_TARGET_MX6SXSABRESD=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" # CONFIG_CMD_BMODE is not set CONFIG_NXP_BOARD_REVISION=y -CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index a4fa393042..ee80038fdc 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_14X14_EVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 02467c0314..6b8fd3b599 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6UL=y CONFIG_TARGET_MX6UL_9X9_EVK=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-9x9-evk" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-9x9-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 7ac7a2ef93..2700f98e6c 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -9,8 +9,8 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6ULL=y CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y -CONFIG_USE_IMXIMG_PLUGIN=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" +CONFIG_USE_IMXIMG_PLUGIN=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index be4d7c8aca..dffb66ea35 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_TARGET_MX7DSABRESD=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 574a8b53ea..023f2bb60e 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi" CONFIG_TARGET_MX7DSABRESD=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb-qspi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index b490f9c36b..698e138910 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-com" CONFIG_LDO_ENABLED_MODE=y CONFIG_TARGET_MX7ULP_COM=y -CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-com" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ea/mx7ulp_com/imximage.cfg" CONFIG_DEFAULT_FDT_FILE="imx7ulp-com" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index b302440ca6..c7738a6b80 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y -CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" +CONFIG_TARGET_MX7ULP_EVK=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index f2bbad92c8..05e62fc165 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y -CONFIG_TARGET_MX7ULP_EVK=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" +CONFIG_TARGET_MX7ULP_EVK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index e929216c83..f16a1b663d 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6ULL=y CONFIG_TARGET_MYS_6ULX=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval" CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-myir-mys-6ulx-eval" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 4bda66ada9..ec040a2395 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index ccdb1de12b..1c28c2cab5 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index 739506a7e7..c9833fdb85 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 7a24a25d68..2b2fcac366 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index eceb67e736..6d3afe1b63 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 73453d9df6..1bf5d1d095 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index ea46dd0b28..52996266a1 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 506f828787..351d2eb553 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 0fd6634c19..70fc257eeb 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index 9625aca346..dc2dbd6290 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index 5c659cd28b..37b7817d86 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MACPWR="PD6" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 510e4e8990..95dd56aa04 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 5f79191af0..806d95c1cc 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index 1ba4ba745c..c025519638 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SUN8I_EMAC=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index acc78fc7e1..924ff38f17 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=408 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 3e031604ee..72f062e807 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NAS220=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 -CONFIG_IDENT_STRING="\nNAS 220" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" +CONFIG_IDENT_STRING="\nNAS 220" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index c8949ccb5b..712e029fa1 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" 2Big v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" +CONFIG_IDENT_STRING=" 2Big v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 538056cfda..94eebdf099 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_ARCH_BMIPS=y CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d" +CONFIG_ARCH_BMIPS=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index 333652de12..47c44812f1 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6362=y -CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 227a27ff83..07047d9592 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" +CONFIG_IDENT_STRING=" NS v2 Lite" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index a3b2d0afe4..5fe8808530 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS Max v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" +CONFIG_IDENT_STRING=" NS Max v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 89eab9d098..5d9ea06259 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" +CONFIG_IDENT_STRING=" NS v2 Mini" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index abed503df2..df1f6982af 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -8,8 +8,8 @@ CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_IDENT_STRING=" NS v2" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" +CONFIG_IDENT_STRING=" NS v2" # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 121bc096e4..df931c752e 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6DL=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,DDR_MB=2048" diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index b655e32a70..9ea4546a75 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6DL=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,DDR_MB=1024" diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 4d78df39ef..2de5b7cb0c 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6Q=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,DDR_MB=2048" diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 0c49721586..7353081d0b 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6Q=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,DDR_MB=1024" diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 7d865de644..d885749d39 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6S=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,DDR_MB=1024" diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index c47fb5e1b4..caf05de8d9 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_MX6S=y CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y -CONFIG_CMD_HDMIDETECT=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" +CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,DDR_MB=512" diff --git a/configs/novena_defconfig b/configs/novena_defconfig index b5657590ff..dcbbf4dac0 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6Q=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KOSAGI_NOVENA=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-novena" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_ENV_OFFSET_REDUND=0x84000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-novena" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index e8faf72051..a67963a4b7 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -2,10 +2,10 @@ CONFIG_ARC=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 358ea77f7c..5852a0cd8e 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -3,10 +3,10 @@ CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 3a66b3b253..cdbcba1f25 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -3,10 +3,10 @@ CONFIG_ISA_ARCV2=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 97ede6e09d..41e3618ffe 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -4,10 +4,10 @@ CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART_BASE=0xf0000000 CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 -CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 349f918727..e3716a9004 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x81000100 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_DEBUG_UART_BASE=0x70006000 CONFIG_DEBUG_UART_CLOCK=408000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig new file mode 100644 index 0000000000..36e10c659b --- /dev/null +++ b/configs/o4-imx6ull-nano_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_MX6ULL=y +CONFIG_TARGET_O4_IMX6ULL_NANO=y +CONFIG_DM_GPIO=y +CONFIG_MT41K256M16HA_125E=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_FEC_MXC_MDIO_BASE=0x020b4000 +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 67dc0eae43..9ba115c97d 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-oceanic-5205-5inmfd" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y @@ -8,7 +9,6 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-oceanic-5205-5inmfd" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 8c489ef69d..5457ab2400 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index 7b21c12081..0c6989d4ba 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c4/hc4" -CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 6aa41e3755..f5b03a30ab 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="rk3326-odroid-go2" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_ODROID_GO2=y @@ -16,7 +17,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3326-odroid-go2" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index 8a12148fb4..065ecbcfb0 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-n2/n2_plus" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index bc71b45c0f..e0b87dfc25 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -6,8 +6,8 @@ CONFIG_ARCH_EXYNOS5=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x310000 -CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" +CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 681a955a7a..084c1ee741 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 64fe9da623..7f06249bd3 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 83122af2ab..f58112ef3f 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -4,11 +4,11 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="omap3-beagle" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_BEAGLE=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap3-beagle" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_USE_PREBOOT=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 7a263513a7..4d96505e36 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -4,11 +4,11 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_EVM=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 84f989de6b..2371fff8e5 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index c825d0df4e..19b9ff8e4b 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -7,11 +7,11 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit" CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 60a451b5ef..08dc3552c8 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="omap4-panda" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_PANDA=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap4-panda" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb" diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 3592cfd9fa..f90b281428 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -4,12 +4,12 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_OFFSET=0xE0000 +CONFIG_DEFAULT_DEVICE_TREE="omap4-sdp" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_SDP4430=y CONFIG_CMD_BAT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="omap4-sdp" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb" diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index a23058bff9..a08c7fa670 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="omap5-uevm" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y CONFIG_TARGET_OMAP5_UEVM=y @@ -8,7 +9,6 @@ CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_ARMV7_LPAE=y -CONFIG_DEFAULT_DEVICE_TREE="omap5-uevm" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 6274f31525..6f95fc4aa5 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -13,11 +13,11 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 3d83b2e800..cc69bf2b38 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" +CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 4e943b3787..6281f360f3 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" +CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 8c77f2ae1a..d05ba7ee29 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" +CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 2b83fa206f..e1b3943569 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y CONFIG_TARGET_OPOS6ULDEV=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index d34cf93c7c..9f0053914a 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index bebded4601..6f8ceb0fb7 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-2" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_USB1_VBUS_PIN="PG13" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index 82b9815205..c243a58200 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index a793c150af..75c97d6b89 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index ecb1b7a6e3..96bbd1bab6 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 151c963a46..1064b4a39d 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index 5909cd483a..55a8b003fb 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index f72ffe27b2..5a538e133f 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 995cfeaf7c..f971ed1977 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index e2067748ea..04ecf15315 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-pc-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index cbb89624c7..21f3c73ba6 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index ea24b0b688..b17f640ca3 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 @@ -7,7 +8,6 @@ CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_SATAPWR="PG11" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 8e9ef1fae0..95a82e20f3 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 0ae5c2cae9..745451c4bf 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 6075e61a7d..8c2179ba8b 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MACPWR="PD14" CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index 5af964bf10..72574a89a2 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-orangepi-zero2" CONFIG_SPL=y CONFIG_DRAM_SUN50I_H616_WRITE_LEVELING=y CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y @@ -8,7 +9,6 @@ CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y CONFIG_MACH_SUN50I_H616=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_R_I2C_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-orangepi-zero2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_PHY_REALTEK=y diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 998c95d151..332cd4739e 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 86cc42417e..9583d24c8d 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig index 92766f5426..55a251374a 100644 --- a/configs/orangepi_zero_plus2_h3_defconfig +++ b/configs/orangepi_zero_plus2_h3_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zero-plus2" CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zero-plus2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index 2c4c49006e..f3ecf35eee 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 650276e379..43dbae206c 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -7,10 +7,10 @@ CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ORIGEN=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4200 +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_SPL_TEXT_BASE=0x02021410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for ORIGEN" -CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/p200_defconfig b/configs/p200_defconfig index 0c85cdcea1..10b240b30b 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p200" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/p201_defconfig b/configs/p201_defconfig index f4b9a1a44c..612f32fb7c 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p201" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 51b84325c0..338fcdebbb 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 97232bb809..024afdb5dd 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_TEGRA210=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" +CONFIG_TEGRA210=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index af490891e2..819475fb17 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180" CONFIG_TEGRA210=y CONFIG_TARGET_P2371_2180=y -CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-2180" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 68bfb8f28c..b613e9f033 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" CONFIG_TEGRA210=y CONFIG_TARGET_P2571=y -CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 0ca1fdf381..eb74ba4ce8 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_TEGRA186=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-000" +CONFIG_TEGRA186=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index ca340f1bd7..11e0623267 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_NR_DRAM_BANKS=1026 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_TEGRA186=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-500" +CONFIG_TEGRA186=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 12c3f9bb28..7705be0995 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -5,9 +5,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" CONFIG_TEGRA210=y CONFIG_TARGET_P3450_0000=y -CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index f82dc6dc40..de340e230f 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=600 @@ -10,7 +11,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 30b4d2a852..e26445cc31 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_PAZ00=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 32f08a1741..260d3d459b 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -8,9 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_TARGET_PCM052=y -CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index b0278941ad..3f14326e46 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -14,6 +14,7 @@ CONFIG_MX6_OCRAM_256KB=y CONFIG_TARGET_PCM058=y CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-phytec-mira-rdk-nand" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-phytec-mira-rdk-nand" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 01054b0ee4..d3fbc4eca9 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=7 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_SPL_TEXT_BASE=0x02024410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pi" -CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index c6646dcd6e..d6d97a84c3 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -7,10 +7,10 @@ CONFIG_TARGET_PEACH_PIT=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" CONFIG_SPL_TEXT_BASE=0x02024410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pit" -CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig new file mode 100644 index 0000000000..27e8192ded --- /dev/null +++ b/configs/pg_wcom_expu1_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_TARGET_PG_WCOM_EXPU1=y +CONFIG_SYS_TEXT_BASE=0x60100000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_COMMON_ETH_INIT=y +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" +CONFIG_SILENT_CONSOLE=y +CONFIG_LAST_STAGE_INIT=y +CONFIG_MISC_INIT_R=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_CRAMFS=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" +CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:128k(rcw),128k(qe),128k(envred),128k(env),512k(res),1m(u-boot),-(ubi0);68000000.flash:-(ubi1)" +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_ENV_ADDR=0x60060000 +CONFIG_ENV_ADDR_REDUND=0x60040000 +CONFIG_DM=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_FSL_DDR3=y +CONFIG_SYS_I2C_MXC=y +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_CFI_DRIVER=y +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_CFI_MTD=y +CONFIG_SYS_FLASH_CFI=y +CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_PHY_GIGE=y +CONFIG_MII=y +CONFIG_TSEC_ENET=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index a61b82685c..99389d6405 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -7,14 +7,14 @@ CONFIG_KM_COMMON_ETH_INIT=y CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff -CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 -CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 8b3ad9db15..87de31d63a 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_OFFSET=0xA0000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=1000 CONFIG_TARGET_PHYCORE_AM335X_R2=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="am335x-regor-rdk.dtb" diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index cbf3b9fdc1..591ac75532 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_OFFSET=0xA0000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=1000 CONFIG_TARGET_PHYCORE_AM335X_R2=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 549a51db1e..21514fabb5 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_PHYCORE_IMX8MM=y CONFIG_SPL_MMC_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 -CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index f905c01b8f..7f21e8888e 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk" CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_TARGET_PHYCORE_IMX8MP=y CONFIG_SPL_MMC_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 -CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 2997e42828..b7a52cfa5c 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_PHYCORE_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 65239a049d..104f6a4eba 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -9,11 +9,11 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6UL=y CONFIG_TARGET_PCL063=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand" CONFIG_SPL_TEXT_BASE=0x00909000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phytec-segin-ff-rdk-nand" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index c57ca29f3b..f76eb62603 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -7,11 +7,11 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6ULL=y CONFIG_TARGET_PCL063_ULL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-phytec-segin-ff-rdk-emmc" CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-phytec-segin-ff-rdk-emmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index b31209bb17..ff15d80b4d 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x88080000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y -CONFIG_MACH_PIC32=y CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk" +CONFIG_MACH_PIC32=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 3f3c4efbdc..77208a3bce 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -12,11 +12,11 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 589811a312..a5dbcc8989 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 88fdfeca1d..49cfc097ae 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index bb0f93f8da..a3ba67fe85 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index f010981433..798eaf363a 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -10,12 +10,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6QDL=y CONFIG_TARGET_PICO_IMX6=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-pico" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-pico" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index a54b22f5a5..40e64e80dd 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-hobbit" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 7265ec01af..415b2a1522 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -8,12 +8,12 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 673e822c89..41207fbde1 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 61275e2914..9d664c07f0 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x40200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_PICO_IMX8MQ=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 589811a312..a5dbcc8989 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 06fa449e38..be161e0b71 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 345de8c8dc..4f1219f3e6 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_TARGET_PICO_IMX7D=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -14,7 +15,6 @@ CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index 048b31d73c..6209e68e2d 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y @@ -8,7 +9,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 10514b5ce2..d1c2c3c3cc 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_PINE64_DT_SELECTION=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 2fa66f3834..4e621db0c0 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_LPDDR3=y @@ -9,7 +10,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB3_VBUS_PIN="PL5" CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index c4bab29a06..f97d5e872b 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_PINEBOOK_PRO_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index 43df3f3c82..533a736999 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinebook" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y @@ -7,7 +8,6 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinebook" CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_PWM=y diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index a8c404f6b1..4b7b410da5 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_SUNXI_DRAM_DDR3_1333=y CONFIG_DRAM_CLK=504 CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" CONFIG_SPL_I2C_SUPPORT=y # CONFIG_NETDEVICES is not set CONFIG_AXP209_POWER=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 64ecef59c9..64e13d3132 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y @@ -7,6 +8,5 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index d57f8bc3bd..d55bf46753 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_PLUTUX=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index e031550420..dd5000e7db 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_PM9G45=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 34d1226686..ea33b43702 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -7,8 +7,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_POGO_E02=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x60000 -CONFIG_IDENT_STRING="\nPogo E02" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02" +CONFIG_IDENT_STRING="\nPogo E02" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index 7f81359491..17fffeb1e2 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2407pxe03" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index 36df383095..e542b71113 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-polaroid-mid2809pxe04" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index f0af88f6a2..31bfa09a5e 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 -CONFIG_IDENT_STRING="poplar" CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar" +CONFIG_IDENT_STRING="poplar" CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="poplar# " diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 03fd1a5366..697c5545fb 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_POPMETAL_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 3d4037aa74..a7f5deb270 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter" CONFIG_R8A7791=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index e1750dc693..46dc6b9481 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -12,7 +13,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 0f15936c2d..1466090cc3 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 @@ -13,7 +14,6 @@ CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 1afc146bbf..3e50d871bf 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-ctouch2" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y @@ -14,7 +15,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-ctouch2" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index 9d78eee84d..01e0b5a80a 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-edimm2.2" CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y @@ -14,7 +15,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="px30-px30-core-edimm2.2" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 8c21890ed7..2059c4e0c5 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=720 CONFIG_TARGET_PXM2=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 198cc5a298..1fc5194caf 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 @@ -13,7 +14,6 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:40,up:31,lo: CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_CONS_INDEX=2 diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index 58dd9dff60..dda1a0c51f 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=432 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index 32b6c61c0f..7925677d30 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=456 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index 3bc4eb2684..f3335f9d23 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN8I_A33=y CONFIG_DRAM_CLK=456 @@ -14,7 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index f30bd5f0a0..28ac2b3b53 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -1,8 +1,8 @@ CONFIG_RISCV=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="qemu-virt" +CONFIG_SPL=y CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index ee91ece0ec..78cfc410a3 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -1,8 +1,8 @@ CONFIG_RISCV=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="qemu-virt" +CONFIG_SPL=y CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 6e42fb7e33..3a3b81c8b8 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x40000 CONFIG_MAX_CPUS=2 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" CONFIG_X86_RUN_64BIT=y CONFIG_TARGET_QEMU_X86_64=y CONFIG_DEBUG_UART=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 6cb3e53ff7..500a454019 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_AXP152_POWER=y diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig index 4a87a9a31f..ee74e89778 100644 --- a/configs/r8a774a1_beacon_defconfig +++ b/configs/r8a774a1_beacon_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2M=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig index 2c31222525..90074f0ae8 100644 --- a/configs/r8a774b1_beacon_defconfig +++ b/configs/r8a774b1_beacon_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2N=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig index a814d6ad63..7463618fa7 100644 --- a/configs/r8a774e1_beacon_defconfig +++ b/configs/r8a774e1_beacon_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774e1-beacon-rzg2h-kit" CONFIG_RCAR_GEN3=y CONFIG_TARGET_BEACON_RZG2H=y # CONFIG_SPL is not set -CONFIG_DEFAULT_DEVICE_TREE="r8a774e1-beacon-rzg2h-kit" CONFIG_LTO=y CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 9dbe0e1d5b..2e5fb60f1a 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index dbe2912779..1b9948bcbb 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 13c19f25c8..15743c1a81 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 3175b94189..562b80b996 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 29ade173f4..0b086847e4 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_RASTABAN=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index b994e07038..efd6ca2da8 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SALVATOR_X=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 24e28abff5..a857e5bd1c 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index fc936fff66..6769cf86f5 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -10,12 +10,12 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6S=y CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-riotboard" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-riotboard" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,SPL,DDR_MB=1024" CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 2d02e294e6..77eaefcac9 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc" CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -11,7 +12,6 @@ CONFIG_TARGET_ROC_RK3308_CC=y CONFIG_SPL_STACK_R_ADDR=0xc00000 CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index aa131bf8ea..8ddde6b147 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 8aa5a15518..9db842287a 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -6,13 +6,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 927b57685d..ed6628c922 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -6,13 +6,13 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index c7e1a8d2e4..b1ea38e92b 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 9c2c9e2a78..81516e9144 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index bc4068a2d9..ce932acb8c 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_SPL_STACK_R_ADDR=0x4000000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index 3255e01512..14740dfcef 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index d1d1613f58..935f569db5 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 5bbdbc5ad8..2f1743a706 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y @@ -10,7 +11,6 @@ CONFIG_TARGET_ROCK2=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index cb79cea821..9653848cf6 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index b7ef096b59..0233e0ea52 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -2,11 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROCK960_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" diff --git a/configs/rock_defconfig b/configs/rock_defconfig index cf23a10455..9122173606 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -6,13 +6,13 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_SPL_TEXT_BASE=0x10080800 CONFIG_ROCKCHIP_RK3188=y CONFIG_TARGET_ROCK=y CONFIG_SPL_STACK_R_ADDR=0x60080000 CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index e9a01ec9d5..ae11a8f5eb 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROCKPRO64_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 0913388339..f127b783a5 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=600 CONFIG_TARGET_RUT=y @@ -20,7 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/s400_defconfig b/configs/s400_defconfig index af89fabf1f..2b55eedd5e 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400" CONFIG_MESON_AXG=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" s400" -CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index 36b8a15973..d99c30b6c3 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -8,12 +8,12 @@ CONFIG_SYS_MEMTEST_END=0xb0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x2E0200 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2" CONFIG_TARGET_NANOPI2=y CONFIG_S5P4418_ONEWIRE=y CONFIG_ROOT_DEV=1 CONFIG_BOOT_PART=1 CONFIG_ROOT_PART=2 -CONFIG_DEFAULT_DEVICE_TREE="s5p4418-nanopi2" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 72f9ce16a9..59aec970aa 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x34800000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 -CONFIG_TARGET_S5P_GONI=y CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" +CONFIG_TARGET_S5P_GONI=y CONFIG_ENV_VARS_UBOOT_CONFIG=y # CONFIG_AUTOBOOT is not set CONFIG_USE_BOOTARGS=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index efd23b405c..d29a19e741 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6338=y -CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index e5b5226324..e1fceec4bb 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 0cf940f8d7..35368f3139 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -5,11 +5,11 @@ CONFIG_TARGET_SAM9X60EK=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 57a87a67e9..1c6abdc476 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 30697ad5cd..f3bec6a1a2 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index fbc07360d8..525b7a5028 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 6be9cc1896..3eb1cdcd07 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 2467f4041f..0ddc36fbb2 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 83901980ff..1ca5e44a79 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 3cb1ff62aa..04d7e42399 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index c9e82d03b8..d4d2d0542d 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -18,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index b738e3fcab..31c5dccf29 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -7,10 +7,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 89ff40d16c..4d0d2b525f 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 1f3f728442..f4fb7e6c2a 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 8c637c4e79..9322647071 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index ea3e3b54b5..0f9a827616 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 5b6d1f4442..8897fea672 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 2893fb9482..0077217492 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -7,10 +7,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 3a3d9d2e66..ca072f481c 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -6,11 +6,11 @@ CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 1500c020ee..f4d13a5ac7 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -9,10 +9,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 162a59d94e..6d42a7ab2d 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 978b4ed19a..c0e36860b0 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 35c9f5fce9..69d1f3ec75 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index ad48f29fd5..9107eee738 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 7ae7b104d4..bf2d5164d2 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 0754ead165..01aa9d0ffa 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 05e67c7a7e..a27293e57f 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 5828f375dc..bafad6b5fb 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 5a46118ec8..4420a50782 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -20,7 +21,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 8f7858ba63..0ad8e84ea2 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 232d99883a..97fafcca4d 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -23,7 +24,6 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 337b58bc91..e076e07e11 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 1dbf5276dc..96549c23f8 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 9cd746107d..a8bb560724 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -3,9 +3,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox64" CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox64" CONFIG_SANDBOX64=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 0275ddaca1..f16e2d5d23 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -3,9 +3,9 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_PRE_CON_BUF_ADDR=0xf0000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 772230ce47..1c39a545c8 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -3,8 +3,8 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 -CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index c7fc98b556..9f415cd875 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -5,12 +5,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SANDBOX_SPL=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 87223a54d8..8bc1373ec3 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -5,12 +5,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_MEMTEST_START=0x00100000 CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 -CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SANDBOX_SPL=y CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index cf477baf94..c0bef12c3a 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig new file mode 100644 index 0000000000..71ab08fb7d --- /dev/null +++ b/configs/seeed_npi_imx6ull_defconfig @@ -0,0 +1,72 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=8 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x3c00000 +CONFIG_MX6ULL=y +CONFIG_TARGET_NPI_IMX6ULL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-seeed-npi-imx6ull-dev-board" +CONFIG_SPL_TEXT_BASE=0x908000 +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_DMA=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" +CONFIG_MTDPARTS_DEFAULT="gpmi-nand:512k(spl),1m(uboot),1m(uboot-dup),-(ubi)" +CONFIG_CMD_UBI=y +# CONFIG_ISO_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_NAND_USE_FLASH_BBT=y +CONFIG_NAND_MXS=y +CONFIG_NAND_MXS_DT=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x180000 +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_FEC_MXC=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MXC_UART=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index d40048358b..8ff99cbea0 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" sei510" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index aa2307ea29..51c7d60051 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -7,12 +7,12 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" sei610" # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 6cf07402a5..ca4ef80d18 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -3,10 +3,10 @@ CONFIG_SYS_TEXT_BASE=0x80010000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser" CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6358=y CONFIG_BOARD_SFR_NB4_SER=y -CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser" # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 90e3fff3fb..60256d19fd 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -2,11 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_SHEEP=y CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 242f97dba0..676c47af27 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -8,8 +8,8 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_SHEEVAPLUG=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 -CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug" +CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 62416a7c1d..5bf40cee08 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -3,11 +3,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_TARGET_SIFIVE_UNLEASHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 01ca2d8c23..4c26504867 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -3,10 +3,10 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 7ef4599683..10c7af1a2f 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SILINUX_EK874=y -CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTARGS=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 00b91ddd85..73440cd98c 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk" CONFIG_R8A7794=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index dc7b27742f..56ea0fe6df 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -13,10 +13,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 -CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 8e60f46a5c..a2a20cf6c4 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -10,10 +10,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5250" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 429b0638cd..04b560a8a8 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -8,10 +8,10 @@ CONFIG_NR_DRAM_BANKS=7 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_SPL_TEXT_BASE=0x02024410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5420" -CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index e12ac6a436..f9df128135 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -4,9 +4,9 @@ CONFIG_ARCH_S5PC1XX=y CONFIG_SYS_TEXT_BASE=0x34800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_TARGET_SMDKC100=y CONFIG_IDENT_STRING=" for SMDKC100" -CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)" diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 9d4cf3533e..568f95a813 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS4=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4200 +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" CONFIG_SPL_TEXT_BASE=0x02021410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDKC210/V310" -CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_SPL_FRAMEWORK is not set diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig new file mode 100644 index 0000000000..9bfaa010ae --- /dev/null +++ b/configs/smegw01_defconfig @@ -0,0 +1,63 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xC0000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01" +CONFIG_TARGET_SMEGW01=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +# CONFIG_ARMV7_VIRT is not set +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/storopack/smegw01/imximage.cfg" +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_BOUNCE_BUFFER=y +CONFIG_DFU_MMC=y +CONFIG_DM_I2C=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 76215034ac..cb7dabfaba 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for snow" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 29e3fb865e..6921575635 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -8,11 +8,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 0e5ef062a5..2dfac1db79 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -9,12 +9,12 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index af726bab69..97eb7b4630 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -8,12 +8,12 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 468775425d..17f13ff4d5 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -3,12 +3,12 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_IDENT_STRING="socfpga_arria10" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index e6e6cb24e1..b9198abbf1 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index ff7aa1df2a..fb51921006 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 70a891b003..e622bb85e6 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 35ad9a2ea7..20626c115a 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 92d9336f35..ef2ce3c4f8 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index c95d97e9ca..b99a22bd68 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -3,9 +3,9 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index c2f73b5d8d..0de70341d0 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -5,10 +5,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_IS1=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 2e7a9a21e6..435b46ff62 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index d9f4df4a18..313c5ac86b 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_SPL_LIBDISK_SUPPORT is not set # CONFIG_SPL_SPI_SUPPORT is not set CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" -CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 32f2031433..fe707d6bac 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 756388ee57..75ce57256c 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 734b5d2767..968c255ccb 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_ENV_OFFSET_REDUND=0xF0000 -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 9f2f220c3a..cd1b6f9bba 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -8,11 +8,11 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y -CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index da8bf986cd..bbbae14366 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -9,12 +9,12 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_OPTIMIZE_INLINING=y CONFIG_SPL_OPTIMIZE_INLINING=y CONFIG_BOOTDELAY=5 diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 174494c16e..09b00f5b49 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -5,10 +5,10 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y CONFIG_ENV_OFFSET_REDUND=0x110000 -CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=5 diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 6cf91e0823..a053718f83 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -4,9 +4,9 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867" CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867" CONFIG_VENDOR_ADVANTECH=y CONFIG_TARGET_SOM_DB5800_SOM_6867=y CONFIG_DEBUG_UART=y diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 6a26723394..0093076dc5 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y @@ -9,7 +10,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index a1fdf1d1f6..bbe5ab29a8 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -10,12 +10,12 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_SPL_TEXT_BASE=0x02023400 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for spring" -CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 4866460e83..f86eff94f4 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_STI=y CONFIG_SYS_TEXT_BASE=0x7D600000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 -CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260" +CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index a1721fddfd..b0dcb38b3b 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -5,9 +5,9 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco" CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_DISCOVERY=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index c668447778..b614182b4f 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_EVALUATION=y -CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index d5d6dc6278..7960618d46 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" CONFIG_STM32F4=y CONFIG_TARGET_STM32F469_DISCOVERY=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 7769026542..05d7ec2d79 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x08008000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 4150091284..40f94ac772 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x08008000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y -CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index 1712fe86c8..03c17867eb 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco" CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_DISCO=y -CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index cb7dedae34..9d78fb7fe8 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval" CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_EVAL=y -CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index 78b937f5bf..1af66c5b1b 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x90000000 CONFIG_SYS_MALLOC_F_LEN=0xF00 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="stm32h750i-art-pi" CONFIG_STM32H7=y CONFIG_TARGET_STM32H750_ART_PI=y -CONFIG_DEFAULT_DEVICE_TREE="stm32h750i-art-pi" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 24a7bdfd43..da78532d30 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index ab4819fa88..9e7a1a9d4e 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 14bdf93309..b23b051ed7 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 55f919c0fb..82dc57ad25 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 3ff46f7048..e199f2b7f9 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y @@ -17,7 +18,6 @@ CONFIG_TYPEC_STUSB160X=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index a127506a5f..17f2c8799e 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_SIZE=0x4000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y @@ -13,7 +14,6 @@ CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 40d06f4e00..cd248747d3 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_SIZE=0x4000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y @@ -11,7 +12,6 @@ CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set -CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index afbf721299..5bc5e79400 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y -CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index c46ef429b8..408d104e32 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_TARGET_STMARK2=y CONFIG_DEFAULT_DEVICE_TREE="stmark2" +CONFIG_TARGET_STMARK2=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1" diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 4d57d7147d..e8ac46fb7d 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" CONFIG_SPL_TEXT_BASE=0xe6300000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout" CONFIG_R8A7790=y @@ -23,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL_BOARD_INIT=y diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 3c5f7aac6a..a3b1d76d8b 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb" CONFIG_SPL=y CONFIG_MACH_SUN8I_A23=y CONFIG_DRAM_CLK=552 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=63351 CONFIG_USB0_VBUS_PIN="axp_drivebus" CONFIG_USB0_VBUS_DET="axp_vbus_detect" CONFIG_USB1_VBUS_PIN="PH7" -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index a02f07eeb7..f7a7716929 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 @@ -9,7 +10,6 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 276c476bae..b5ec025db9 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -5,13 +5,13 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA -CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index 9ce812ecc3..0390347415 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-tanix-tx6" CONFIG_SPL=y CONFIG_MACH_SUN50I_H6=y CONFIG_SUNXI_DRAM_H6_DDR3_1333=y CONFIG_DRAM_CLK=648 CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-tanix-tx6" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index dbd6428624..ce09450c9e 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -24,7 +25,6 @@ CONFIG_DEBUG_UART_CLOCK=18432000 CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067" CONFIG_BOOTDELAY=3 diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 47e2f571bf..99ef8a1192 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -2,8 +2,8 @@ CONFIG_ARC=y CONFIG_TARGET_TB100=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_ENV_SIZE=0x800 -CONFIG_SYS_CLK_FREQ=500000000 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100" +CONFIG_SYS_CLK_FREQ=500000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index e2e4db5c89..a1f1884bd2 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -9,9 +9,9 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6Q=y CONFIG_TARGET_TBS2910=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_PRE_CON_BUF_ADDR=0x7c000000 CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_AHCI=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index 6597f200ee..b3c2e69d6c 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-tbs-a711" CONFIG_SPL=y CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_TYPE=7 @@ -11,7 +12,6 @@ CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" CONFIG_AXP_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-tbs-a711" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 9733a09c5b..d6a072e4e5 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA30=y CONFIG_TARGET_TEC_NG=y -CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 1f5ac9ec1c..1de5c5769c 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1FFE0000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_TEC=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index a5d9fb082f..41d34745a1 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i" CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_DRAM_CLK=552 @@ -7,7 +8,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PL7" CONFIG_I2C0_ENABLE=y -CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i" CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 8c2af20c30..ffe5696e31 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -4,8 +4,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y CONFIG_INTERNAL_UART=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index bbeea8defc..ec60abbf10 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -4,8 +4,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y CONFIG_INTERNAL_UART=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index f560d2bbdd..c34fa8301f 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -4,8 +4,8 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700" +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_DFI=y CONFIG_TARGET_THEADORABLE_X86_DFI_BT700=y CONFIG_SMP=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index dbf006b190..6d32e6c5be 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 247538a5d9..84eae39310 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_DM_SPI=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_THUBAN=y @@ -21,7 +22,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index dd135ada36..97a41d8ee7 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -3,10 +3,10 @@ CONFIG_TARGET_THUNDERX_88XX=y CONFIG_SYS_TEXT_BASE=0x00500000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_DEBUG_UART_BASE=0x87e024000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" -CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index e38d409fff..0eda492f39 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1C0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_SPL_TEXT_BASE=0x40400000 CONFIG_TI816X=y CONFIG_TARGET_TI816X_EVM=y @@ -15,7 +16,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1E0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 8686a66d13..196348ac6f 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 22714833cc..3720caabde 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x800000 CONFIG_SPL_SIZE_LIMIT=0x4B000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 3681919f85..6e2c5086e5 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" -CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 301a357ec7..ebceb7b778 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" -CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 27cd9132e8..88e5f2b5b6 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -9,12 +9,12 @@ CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" -CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 1976957779..7573c8883f 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 +CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_ARCH_ATH79=y CONFIG_BOARD_TPLINK_WDR4300=y -CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 4569675ccc..82d9b95bea 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6DL=y CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b" +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 8648c7d3a2..c4f5b1c11f 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6Q=y CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_DEFAULT_DEVICE_TREE="imx6q-mba6b" +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 0c07dd0872..ab1f55bb94 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -7,8 +7,8 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MX6S=y CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mba6b" +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 6c62197dfd..23f2bbeded 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -5,10 +5,10 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFE000 CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_TRIMSLICE=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index e85394fbe8..0dbf850952 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtuge1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtuge1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_TUGE1=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 75524babbc..2c6f4938db 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -9,13 +9,15 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -23,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y +CONFIG_CMD_SHA1SUM=y CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -36,16 +39,22 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y +CONFIG_CMD_AES=y +CONFIG_CMD_HASH=y CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y # CONFIG_MVEBU_GPIO is not set CONFIG_DM_I2C=y +CONFIG_LED=y +CONFIG_LED_GPIO=y CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y @@ -86,4 +95,3 @@ CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_WDT=y CONFIG_WDT_ARMADA_37XX=y -CONFIG_SHA1=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 79662baa06..57ab384f63 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -16,12 +16,12 @@ CONFIG_ENV_OFFSET=0xF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index ff7782cc33..58a374cf65 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -2,9 +2,9 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="kmtuxa1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_DEFAULT_DEVICE_TREE="kmtuxa1" CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_TUXX1=y diff --git a/configs/u200_defconfig b/configs/u200_defconfig index b01816336e..3b31aa4a1e 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200" CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" u200" -CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 0c0757c4fa..cdf6b2274c 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -8,9 +8,9 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 -CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index a936937eae..791613ee00 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -10,12 +10,12 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6QDL=y CONFIG_TARGET_UDOO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-udoo" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6q-udoo" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 6ab3815f61..8667c752bf 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -10,13 +10,13 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SX=y CONFIG_TARGET_UDOO_NEO=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index acc6d7daf7..117b76005f 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" CONFIG_SPL_TEXT_BASE=0x00040000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index e989b84f29..d92f5f40c5 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" CONFIG_SPL_TEXT_BASE=0x00100000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 3d2a98ee3c..8eeb455e62 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" CONFIG_ARCH_UNIPHIER_V8_MULTI=y CONFIG_MICRO_SUPPORT_CARD=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" CONFIG_USE_PREBOOT=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 95bebdd4ab..91eb3a4965 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_USBARMORY=y CONFIG_DM_GPIO=y -# CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx53-usbarmory" +# CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index b1afcf1a30..595e8ecc23 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -8,11 +8,11 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x2000 CONFIG_MX6ULL=y CONFIG_TARGET_DART_6UL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 9c14cef2b9..8caaefeae9 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x80110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_TEGRA124=y CONFIG_TARGET_VENICE2=y -CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 4701f4c947..bf1965d0b5 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y -CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 8d722b63b0..d969370e25 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_VERDIN_IMX8MM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 8edd048404..92034b34f7 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -12,6 +12,7 @@ CONFIG_MX6SX=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_SOFTING_VINING_2000=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6sx-softing-vining-2000" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -19,7 +20,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEFAULT_DEVICE_TREE="imx6sx-softing-vining-2000" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig index 5780af8c64..86692bffeb 100644 --- a/configs/vocore2_defconfig +++ b/configs/vocore2_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x04e000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y @@ -12,7 +13,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ARCH_MTMIPS=y CONFIG_SOC_MT7628=y CONFIG_BOARD_VOCORE2=y -CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index e615d0e674..dd9c0d4a65 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index c6e805a9c0..d6b34454c8 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -13,13 +13,13 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_DEFAULT_DEVICE_TREE="imx6dl-wandboard-revd1" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 5452a49061..0617018f42 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 43471e754a..5bac902dd0 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -6,13 +6,13 @@ CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y -CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg" diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 04f756aacf..ffad519cd0 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y -CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index 364c16c380..7d3e7cc4d1 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -4,11 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2" CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" wetek-core2" -CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 76574c4de4..c4ee77d3f4 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -12,12 +12,12 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530" CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 85d783c07c..7f75f9bb9c 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_SIZE=0x80 CONFIG_SYS_MALLOC_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="versal-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="versal-mini" # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 8837987e35..11ba015b2b 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_SYS_MALLOC_LEN=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" # CONFIG_EXPERT is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index b07dc04060..1fcab2403b 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_SYS_MALLOC_LEN=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" # CONFIG_EXPERT is not set # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index e53ef2443e..b4c7f11505 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -7,11 +7,11 @@ CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_OFFSET=0xE00000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_CMD_FRU=y CONFIG_CMD_ZYNQ_AES=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 64989db291..b0fd861758 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 4594f8096d..725f5adb18 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index d7c64b9da5..2799c2f830 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -6,10 +6,10 @@ CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index a61507ea7a..dbe5c42ffb 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -5,8 +5,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 -# CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +# CONFIG_CMD_ZYNQMP is not set CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index cd5f6de635..e16b9f4127 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -5,8 +5,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 -# CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" +# CONFIG_CMD_ZYNQMP is not set CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 15cba60d53..5d65371498 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index f7433e994d..143c253f0e 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x10000000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART_BASE=0xff010000 CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART=y CONFIG_BOOTSTAGE=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index b0cc9d9ba8..7952d0ae06 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -13,7 +14,6 @@ CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -188,6 +188,5 @@ CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_CAPSULE_ON_DISK_EARLY=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index b36fd4a43c..2386da77ed 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -6,9 +6,9 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x100000 CONFIG_ENV_SIZE=0x190 CONFIG_SYS_MALLOC_LEN=0x8000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" # CONFIG_AUTOBOOT is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 3e614dfc86..d19170da8e 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -6,9 +6,9 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x190 CONFIG_SYS_MALLOC_LEN=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y -CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" # CONFIG_AUTOBOOT is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 7cb1d6122d..3d0f742798 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -7,13 +7,13 @@ CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_ENV_SIZE=0x190 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_SYS_MALLOC_LEN=0x1000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x0 CONFIG_DEBUG_UART_CLOCK=0 # CONFIG_ZYNQ_DDRC_INIT is not set # CONFIG_CMD_ZYNQ is not set -CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_DEBUG_UART=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" diff --git a/disk/part_dos.c b/disk/part_dos.c index 60addc6e00..9e29aa6583 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -424,7 +424,7 @@ int write_mbr_partitions(struct blk_desc *dev, } /* Update the partition table entries*/ - part_init(dev_desc); + part_init(dev); return 0; } diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst index 923649240e..b46f427f4b 100644 --- a/doc/board/AndesTech/ax25-ae350.rst +++ b/doc/board/AndesTech/ax25-ae350.rst @@ -58,15 +58,6 @@ Platform Level Interrupt Controller (PLIC) - Configurable number of targets: 1-16 - Preempted interrupt priority stack -Configurations --------------- - -CONFIG_SKIP_LOWLEVEL_INIT: - -If you want to boot this system from SPI ROM and bypass e-bios (the -other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT -in "include/configs/ax25-ae350.h". - Build and boot steps -------------------- @@ -89,12 +80,10 @@ Verification: Steps ----- -1. Define CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is loaded via gdb from ram. -2. Undefine CONFIG_SKIP_LOWLEVEL_INIT to build u-boot which is booted from spi rom. -3. Ping a server by mac driver -4. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver. -5. Burn this u-boot image to spi rom by spi driver -6. Re-boot u-boot from spi flash with power off and power on. +1. Ping a server by mac driver +2. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver +3. Burn this u-boot image to spi rom by spi driver +4. Re-boot u-boot from spi flash with power off and power on Messages of U-Boot boot on AE350 board -------------------------------------- diff --git a/doc/board/congatec/cgtqmx8.rst b/doc/board/congatec/cgtqmx8.rst new file mode 100644 index 0000000000..bccdef2f16 --- /dev/null +++ b/doc/board/congatec/cgtqmx8.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Congatec conga-QMX8 board +======================================== + +Quick Start +----------- + +- Build the ARM Trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Get imx-mkimage +- Build U-Boot +- Build imx-mkimage +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://source.codeaurora.org/external/imx/imx-atf + $ cd imx-atf/ + $ git checkout origin/imx_4.14.78_1.0.0_ga -b imx_4.14.78_1.0.0_ga + $ make PLAT=imx8qm bl31 + +Get scfw_tcm.bin and ahab-container.img +--------------------------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.1.bin + $ chmod +x imx-sc-firmware-1.1.bin + $ ./imx-sc-firmware-1.1.bin + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin + $ chmod +x firmware-imx-8.0.bin + $ ./firmware-imx-8.0.bin + +Or use this to avoid running random scripts from the internet, +but note that you must agree to the license the script displays: + +.. code-block:: bash + + $ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1 + $ tar -xf imx-sc-firmware-1.1.tar.bz2 + $ cp imx-sc-firmware-1.1/mx8qx-val-scfw-tcm.bin $(builddir) + + $ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1 + $ tar -xf firmware-imx-8.0.tar.bz2 + $ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir) + +Build U-Boot +------------ + +.. code-block:: bash + + $ export ATF_LOAD_ADDR=0x80000000 + $ export BL33_LOAD_ADDR=0x80020000 + $ make cgtqmx8_defconfig + $ make u-boot.bin + $ make flash.bin + +Flash the binary into the SD card +--------------------------------- + +Burn the flash.bin binary to SD card offset 32KB: + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync diff --git a/doc/board/congatec/index.rst b/doc/board/congatec/index.rst new file mode 100644 index 0000000000..cc57b36b2e --- /dev/null +++ b/doc/board/congatec/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Congatec +======== + +.. toctree:: + :maxdepth: 2 + + cgtqmx8.rst diff --git a/doc/board/index.rst b/doc/board/index.rst index a70d2de19d..747511f7dd 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -11,6 +11,7 @@ Board-specific doc AndesTech/index amlogic/index atmel/index + congatec/index coreboot/index emulation/index freescale/index diff --git a/doc/develop/driver-model/index.rst b/doc/develop/driver-model/index.rst index 10a76256b0..7366ef818c 100644 --- a/doc/develop/driver-model/index.rst +++ b/doc/develop/driver-model/index.rst @@ -19,6 +19,7 @@ subsystems i2c-howto livetree migration + nvme of-plat pci-info pmic-framework diff --git a/doc/README.nvme b/doc/develop/driver-model/nvme.rst index e8f9be149e..736c0a063d 100644 --- a/doc/README.nvme +++ b/doc/develop/driver-model/nvme.rst @@ -1,11 +1,13 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2017 NXP Semiconductors -# Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com> +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2017 NXP Semiconductors +.. Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com> -What is NVMe +NVMe Support ============ +What is NVMe +------------ + NVM Express (NVMe) is a register level interface that allows host software to communicate with a non-volatile memory subsystem. This interface is optimized for enterprise and client solid state drives, typically attached to the PCI @@ -48,6 +50,8 @@ identified. To list all of the NVMe hard disks, try: +.. code-block:: none + => nvme info Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN Type: Hard Disk @@ -55,10 +59,14 @@ To list all of the NVMe hard disks, try: and print out detailed information for controller and namespaces via: +.. code-block:: none + => nvme detail Raw block read/write to can be done via the 'nvme read/write' commands: +.. code-block:: none + => nvme read a0000000 0 11000 => tftp 80000000 /tftpboot/kernel.itb @@ -66,6 +74,8 @@ Raw block read/write to can be done via the 'nvme read/write' commands: Of course, file system command can be used on the NVMe hard disk as well: +.. code-block:: none + => fatls nvme 0:1 32376967 kernel.itb 22929408 100m @@ -81,4 +91,7 @@ QEMU supports NVMe emulation and we can test NVMe driver with QEMU x86 running U-Boot. Please see README.x86 for how to build u-boot.rom image for QEMU x86. Example command line to call QEMU x86 below with emulated NVMe device: -$ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom + +.. code-block:: bash + + $ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom diff --git a/doc/git-mailrc b/doc/git-mailrc index 34f936f4d8..dc7b39b32f 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -119,7 +119,7 @@ alias kerneldoc uboot, marex alias fdt uboot, sjg alias i2c uboot, hs alias kconfig uboot, masahiro -alias mmc uboot, freenix +alias mmc uboot, freenix, jaehoon alias nand uboot alias net uboot, jhersh alias phy uboot, jhersh diff --git a/doc/usage/index.rst b/doc/usage/index.rst index c1f9b6a53b..843b4371f1 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -34,12 +34,14 @@ Shell commands load loady mbr - mmc md + mmc + pinmux pstore qfw + reset sbi + scp03 size true - scp03 - reset + ums diff --git a/doc/usage/mmc.rst b/doc/usage/mmc.rst index 458c7642c0..f20efe3d70 100644 --- a/doc/usage/mmc.rst +++ b/doc/usage/mmc.rst @@ -19,7 +19,7 @@ Synopsis mmc wp mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode> mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB> - mmc partconf <dev> [boot_ack boot_partition partition_access] + mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]] mmc rst-function <dev> <value> Description @@ -92,6 +92,8 @@ The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specifi The 'mmc partconf' command shows or changes PARTITION_CONFIG field. + varname + When showing the PARTITION_CONFIG, an optional environment variable to store the current boot_partition value into. boot_ack boot acknowledge value boot_partition diff --git a/doc/usage/pinmux.rst b/doc/usage/pinmux.rst new file mode 100644 index 0000000000..9f4392cd0d --- /dev/null +++ b/doc/usage/pinmux.rst @@ -0,0 +1,95 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +pinmux command +============== + +Synopsis +-------- + +:: + + pinmux list + pinmux dev [pincontroller-name] + pinmux status [-a | pin-name] + +Description +----------- + +The pinmux command is used to show the pin-controller muxing. + +The 'pinmux list' command diplays the available pin-controller. + +The 'pinmux dev' command selects the pin-controller for next commands. + + pincontroller-name + name of the pin-controller to select + +The 'pinmux status' command displays the pin muxing information. + + \-a + display pin muxing of all pin-controllers. + pin-name + name of the pin to display + +Example +------- + +:: + + => pinmux list + | Device | Driver | Parent + | pinctrl-gpio | sandbox_pinctrl_gpio | root_driver + | pinctrl | sandbox_pinctrl | root_driver + => + => pinmux dev pinctrl + dev: pinctrl + => + => pinmux status + P0 : UART TX. + P1 : UART RX. + P2 : I2S SCK. + P3 : I2S SD. + P4 : I2S WS. + P5 : GPIO0 bias-pull-up input-disable. + P6 : GPIO1 drive-open-drain. + P7 : GPIO2 bias-pull-down input-enable. + P8 : GPIO3 bias-disable. + => + => pinmux status P0 + P0 : UART TX. + => + => pinmux status -a + -------------------------- + pinctrl-gpio: + a0 : gpio input . + a1 : gpio input . + a2 : gpio input . + a3 : gpio input . + a4 : gpio input . + a5 : gpio output . + a6 : gpio output . + a7 : gpio input . + a8 : gpio input . + a9 : gpio input . + -------------------------- + pinctrl: + P0 : UART TX. + P1 : UART RX. + P2 : I2S SCK. + P3 : I2S SD. + P4 : I2S WS. + P5 : GPIO0 bias-pull-up input-disable. + P6 : GPIO1 drive-open-drain. + P7 : GPIO2 bias-pull-down input-enable. + P8 : GPIO3 bias-disable. + +Configuration +------------- + +The pinmux command is only available if CONFIG_CMD_PINMUX=y. + +Return value +------------ + +The return value $? is set to 0 (true) if the command succeded and to 1 (false) +otherwise. diff --git a/doc/usage/ums.rst b/doc/usage/ums.rst new file mode 100644 index 0000000000..3cde5fa1f2 --- /dev/null +++ b/doc/usage/ums.rst @@ -0,0 +1,57 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +ums command +=========== + +Synopsis +-------- + +:: + + ums <dev> [<interface>] <devnum[:partnum]> + +Description +----------- + +Use the USB Mass Storage class (also known as UMS) to make accessible an U-Boot +block device (fully or with :ref:`U-Boot's partition syntax <partitions>`) +to a USB host and to enable file transfers. U-Boot, the USB device, acts as a +simple external hard drive plugged on the host USB port. + +This command "ums" stays in the USB's treatment loop until user enters Ctrl-C. + +dev + USB gadget device number + +interface + interface for accessing the block device (mmc, sata, scsi, usb, ....) + defaults is "mmc" + +devnum + device number for selected interface + +partnum + partition number or 0 to expose all partitions, defaults to 0 + +Example +------- + +:: + + => ums 0 mmc 0 + => ums 0 usb 1:2 + +Configuration +------------- + +The ums command is only available if CONFIG_CMD_USB_MASS_STORAGE=y +and depends on CONFIG_USB_USB_GADGET and CONFIG_BLK. + +Return value +------------ + +The return value $? is set to 0 (true) when the USB stack was successfully +started and interrupted, with Ctrl-C or after USB cable issue (detection +timeout or cable removal). + +If an error occurs, the return value $? is set to 1 (false). diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index 594093ee5f..3e17161002 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -255,8 +255,12 @@ static int imxrt1050_clk_probe(struct udevice *dev) imx_clk_gate2("lpuart1", "lpuart_podf", base + 0x7c, 24)); clk_dm(IMXRT1050_CLK_SEMC, imx_clk_gate2("semc", "semc_podf", base + 0x74, 4)); - clk_dm(IMXRT1050_CLK_LCDIF, - imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10)); + clk_dm(IMXRT1050_CLK_LCDIF_APB, + imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28)); + clk_dm(IMXRT1050_CLK_LCDIF_PIX, + imx_clk_gate2("lcdif_pix", "lcdif", base + 0x74, 10)); + clk_dm(IMXRT1050_CLK_USBOH3, + imx_clk_gate2("usboh3", "pll3_usb_otg", base + 0x80, 0)); struct clk *clk, *clk1; diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 8901456967..0909f502a1 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -798,6 +798,13 @@ config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND This option assumes no hotplug, and u-boot has to make all the way to to linux to use 1.8v UHS-I speed mode if has card. +config FSL_ESDHC_VS33_NOT_SUPPORT + bool "3.3V power supply not supported" + depends on FSL_ESDHC + help + For eSDHC, power supply is through peripheral circuit. 3.3V support is + common. Select this if 3.3V power supply not supported. + config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" help diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 7c8a312fa7..a949dad574 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -166,7 +166,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) if (host->fifo_mode && size) { len = 0; if (data->flags == MMC_DATA_READ && - (mask & DWMCI_INTMSK_RXDR)) { + (mask & (DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO))) { + dwmci_writel(host, DWMCI_RINTSTS, + DWMCI_INTMSK_RXDR | DWMCI_INTMSK_DTO); while (size) { ret = dwmci_fifo_ready(host, DWMCI_FIFO_EMPTY, @@ -182,8 +184,6 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) dwmci_readl(host, DWMCI_DATA); size = size > len ? (size - len) : 0; } - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_RXDR); } else if (data->flags == MMC_DATA_WRITE && (mask & DWMCI_INTMSK_TXDR)) { while (size) { diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 7501fdb71e..1d98fa65c4 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP * Andy Fleming * * Based vaguely on the pxa mmc code: @@ -795,10 +795,21 @@ static void fsl_esdhc_get_cfg_common(struct fsl_esdhc_priv *priv, u32 caps; caps = esdhc_read32(®s->hostcapblt); + + /* + * For eSDHC, power supply is through peripheral circuit. Some eSDHC + * versions have value 0 of the bit but that does not reflect the + * truth. 3.3V is common for SD/MMC, and is supported for all boards + * with eSDHC in current u-boot. So, make 3.3V is supported in + * default in code. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled + * if future board does not support 3.3V. + */ + caps |= HOSTCAPBLT_VS33; + if (IS_ENABLED(CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT)) + caps &= ~HOSTCAPBLT_VS33; + if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_ESDHC135)) caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 | HOSTCAPBLT_VS30); - if (IS_ENABLED(CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33)) - caps |= HOSTCAPBLT_VS33; if (caps & HOSTCAPBLT_VS18) cfg->voltages |= MMC_VDD_165_195; if (caps & HOSTCAPBLT_VS30) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index a4675838e5..465d935daf 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc - * Copyright 2019 NXP Semiconductors + * Copyright 2019, 2021 NXP * Andy Fleming * Yangbo Lu <yangbo.lu@nxp.com> * @@ -653,10 +653,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) clk = (pre_div << 8) | (div << 4); #ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (ret) - pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n"); + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); #else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); #endif @@ -668,7 +665,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) pr_warn("fsl_esdhc_imx: Internal clock never stabilised.\n"); #ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); #else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); #endif @@ -723,14 +720,8 @@ static void esdhc_set_strobe_dll(struct mmc *mmc) struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); struct fsl_esdhc *regs = priv->esdhc_regs; u32 val; - u32 tmp; - int ret; if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) { - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (ret) - pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n"); esdhc_write32(®s->strobe_dllctrl, ESDHC_STROBE_DLL_CTRL_RESET); /* @@ -748,7 +739,6 @@ static void esdhc_set_strobe_dll(struct mmc *mmc) pr_warn("HS400 strobe DLL status REF not lock!\n"); if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK)) pr_warn("HS400 strobe DLL status SLV not lock!\n"); - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); } } @@ -865,7 +855,7 @@ static void esdhc_stop_tuning(struct mmc *mmc) cmd.cmdarg = 0; cmd.resp_type = MMC_RSP_R1b; - dm_mmc_send_cmd(mmc->dev, &cmd, NULL); + mmc_send_cmd(mmc, &cmd, NULL); } static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) @@ -980,18 +970,14 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) #ifdef MMC_SUPPORTS_TUNING if (mmc->clk_disable) { #ifdef CONFIG_FSL_USDHC - u32 tmp; - - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); - ret = readx_poll_timeout(esdhc_read32, ®s->prsstat, tmp, tmp & PRSSTAT_SDOFF, 100); - if (ret) - pr_warn("fsl_esdhc_imx: Internal clock never gate off.\n"); + esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); #else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); #endif } else { #ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | + VENDORSPEC_CKEN); #else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); #endif @@ -1067,7 +1053,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); #else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN); #endif /* Set the initial clock speed */ @@ -1205,7 +1191,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->autoc12err, 0); esdhc_write32(®s->clktunectrlstatus, 0); #else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_FRC_SDCLK_ON); + esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | + VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN); #endif if (priv->vs18_enable) @@ -1234,11 +1221,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); #endif -/* T4240 host controller capabilities register should have VS33 bit */ -#ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 - caps = caps | ESDHC_HOSTCAPBLT_VS33; -#endif - if (caps & ESDHC_HOSTCAPBLT_VS18) voltage_caps |= MMC_VDD_165_195; if (caps & ESDHC_HOSTCAPBLT_VS30) diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index d36aae367e..579d7a1406 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -15,7 +15,7 @@ #include <linux/compat.h> #include "mmc_private.h" -int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt) +static int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt) { struct dm_mmc_ops *ops = mmc_get_ops(dev); struct mmc *mmc = mmc_get_mmc_dev(dev); @@ -31,7 +31,7 @@ int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt) return dm_mmc_get_b_max(mmc->dev, dst, blkcnt); } -int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, +static int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) { struct mmc *mmc = mmc_get_mmc_dev(dev); @@ -53,7 +53,7 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) return dm_mmc_send_cmd(mmc->dev, cmd, data); } -int dm_mmc_set_ios(struct udevice *dev) +static int dm_mmc_set_ios(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -67,7 +67,7 @@ int mmc_set_ios(struct mmc *mmc) return dm_mmc_set_ios(mmc->dev); } -int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us) +static int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -81,7 +81,7 @@ int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us) return dm_mmc_wait_dat0(mmc->dev, state, timeout_us); } -int dm_mmc_get_wp(struct udevice *dev) +static int dm_mmc_get_wp(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -95,7 +95,7 @@ int mmc_getwp(struct mmc *mmc) return dm_mmc_get_wp(mmc->dev); } -int dm_mmc_get_cd(struct udevice *dev) +static int dm_mmc_get_cd(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -110,7 +110,7 @@ int mmc_getcd(struct mmc *mmc) } #ifdef MMC_SUPPORTS_TUNING -int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) +static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -126,7 +126,7 @@ int mmc_execute_tuning(struct mmc *mmc, uint opcode) #endif #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) -int dm_mmc_set_enhanced_strobe(struct udevice *dev) +static int dm_mmc_set_enhanced_strobe(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -142,7 +142,7 @@ int mmc_set_enhanced_strobe(struct mmc *mmc) } #endif -int dm_mmc_hs400_prepare_ddr(struct udevice *dev) +static int dm_mmc_hs400_prepare_ddr(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -157,7 +157,7 @@ int mmc_hs400_prepare_ddr(struct mmc *mmc) return dm_mmc_hs400_prepare_ddr(mmc->dev); } -int dm_mmc_host_power_cycle(struct udevice *dev) +static int dm_mmc_host_power_cycle(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -171,7 +171,7 @@ int mmc_host_power_cycle(struct mmc *mmc) return dm_mmc_host_power_cycle(mmc->dev); } -int dm_mmc_deferred_probe(struct udevice *dev) +static int dm_mmc_deferred_probe(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -186,7 +186,7 @@ int mmc_deferred_probe(struct mmc *mmc) return dm_mmc_deferred_probe(mmc->dev); } -int dm_mmc_reinit(struct udevice *dev) +static int dm_mmc_reinit(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h index a0900e8cad..a6cd250d29 100644 --- a/drivers/mmc/mmc_private.h +++ b/drivers/mmc/mmc_private.h @@ -12,7 +12,6 @@ #include <mmc.h> -int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); int mmc_send_status(struct mmc *mmc, unsigned int *status); int mmc_poll_for_busy(struct mmc *mmc, int timeout); diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 48a764be82..8599f095bc 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -232,6 +232,8 @@ #define SCLK_CYCLES_SHIFT 20 +#define MIN_BUS_CLK 200000 + #define CMD_INTS_MASK \ (MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO) @@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev) else cfg->f_min = host->src_clk_freq / (4 * 4095); + if (cfg->f_min < MIN_BUS_CLK) + cfg->f_min = MIN_BUS_CLK; + if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq) cfg->f_max = host->src_clk_freq; diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c index d6d2d57214..be3d8bfb3d 100644 --- a/drivers/mmc/socfpga_dw_mmc.c +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -144,6 +144,8 @@ static int socfpga_dwmmc_of_to_plat(struct udevice *dev) "smplsel", 0); host->priv = priv; + host->fifo_mode = dev_read_bool(dev, "fifo-mode"); + return 0; } diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 382639044b..9fc28b149d 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -673,6 +673,14 @@ config SNI_AVE This driver implements support for the Socionext AVE Ethernet controller, as found on the Socionext UniPhier family. +config SNI_NETSEC + bool "Socionext NETSEC Ethernet support" + depends on DM_ETH && SYNQUACER_SPI + select PHYLIB + help + This driver implements support for the Socionext SynQuacer NETSEC + ethernet controller, as found on the Socionext SynQuacer family. + source "drivers/net/mscc_eswitch/Kconfig" config ETHER_ON_FEC1 diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a44a7d3f56..d56baa65b2 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o obj-$(CONFIG_FSL_PFE) += pfe_eth/ obj-y += qe/ obj-$(CONFIG_SNI_AVE) += sni_ave.o +obj-$(CONFIG_SNI_NETSEC) += sni_netsec.o obj-y += ti/ obj-$(CONFIG_MEDIATEK_ETH) += mtk_eth.o obj-y += mscc_eswitch/ diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index e8242ca4e1..b012bed517 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -172,8 +172,6 @@ struct eqos_mtl_regs { #define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK 0x3f #define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC BIT(7) #define EQOS_MTL_RXQ0_OPERATION_MODE_RSF BIT(5) -#define EQOS_MTL_RXQ0_OPERATION_MODE_FEP BIT(4) -#define EQOS_MTL_RXQ0_OPERATION_MODE_FUP BIT(3) #define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT 16 #define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK 0x7fff @@ -321,6 +319,7 @@ struct eqos_priv { void *rx_pkt; bool started; bool reg_access_ok; + bool clk_ck_enabled; }; /* @@ -591,12 +590,13 @@ static int eqos_start_clks_stm32(struct udevice *dev) goto err_disable_clk_rx; } - if (clk_valid(&eqos->clk_ck)) { + if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) { ret = clk_enable(&eqos->clk_ck); if (ret < 0) { pr_err("clk_enable(clk_ck) failed: %d", ret); goto err_disable_clk_tx; } + eqos->clk_ck_enabled = true; } #endif @@ -648,8 +648,6 @@ static void eqos_stop_clks_stm32(struct udevice *dev) clk_disable(&eqos->clk_tx); clk_disable(&eqos->clk_rx); clk_disable(&eqos->clk_master_bus); - if (clk_valid(&eqos->clk_ck)) - clk_disable(&eqos->clk_ck); #endif debug("%s: OK\n", __func__); @@ -1222,7 +1220,6 @@ static int eqos_start(struct udevice *dev) } /* Configure MTL */ - writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100); /* Enable Store and Forward mode for TX */ /* Program Tx operating mode */ @@ -1236,9 +1233,7 @@ static int eqos_start(struct udevice *dev) /* Enable Store and Forward mode for RX, since no jumbo frame */ setbits_le32(&eqos->mtl_regs->rxq0_operation_mode, - EQOS_MTL_RXQ0_OPERATION_MODE_RSF | - EQOS_MTL_RXQ0_OPERATION_MODE_FEP | - EQOS_MTL_RXQ0_OPERATION_MODE_FUP); + EQOS_MTL_RXQ0_OPERATION_MODE_RSF); /* Transmit/Receive queue fifo size; use all RAM for 1 queue */ val = readl(&eqos->mac_regs->hw_feature1); @@ -1314,12 +1309,6 @@ static int eqos_start(struct udevice *dev) eqos->config->config_mac << EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT); - clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0, - EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK << - EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT, - 0x2 << - EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT); - /* Multicast and Broadcast Queue Enable */ setbits_le32(&eqos->mac_regs->unused_0a4, 0x00100000); diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 694114eca7..60613b7df0 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -5673,6 +5673,10 @@ static int e1000_write_hwaddr(struct eth_device *dev) DEBUGOUT("%s: mac=%pM\n", __func__, mac); + if ((hw->eeprom.type == e1000_eeprom_invm) && + !(E1000_READ_REG(hw, EECD) & E1000_EECD_FLASH_DETECTED_I210)) + return -ENOSYS; + memset(current_mac, 0, 6); /* Read from EEPROM, not from registers, to make sure diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index 072851ba31..082154a997 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -1245,6 +1245,7 @@ struct e1000_hw { #define E1000_EECD_FLUPD 0x00080000 /* Update FLASH */ #define E1000_EECD_FLUPD_I210 0x00800000 /* Update FLASH */ #define E1000_EECD_FLUDONE_I210 0x04000000 /* Update FLASH done*/ +#define E1000_EECD_FLASH_DETECTED_I210 0x00080000 /* FLASH detected */ #define E1000_FLUDONE_ATTEMPTS 20000 #define E1000_EECD_AUPDEN 0x00100000 /* Enable Autonomous FLASH update */ #define E1000_EECD_SHADV 0x00200000 /* Shadow RAM Data Valid */ diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 0e89e663f7..7c23ccc1f0 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -288,8 +288,10 @@ static int fm_eth_rx_port_parameter_init(struct fm_eth *fm_eth) /* alloc Rx buffer from main memory */ rx_buf_pool = malloc(MAX_RXBUF_LEN * RX_BD_RING_SIZE); - if (!rx_buf_pool) + if (!rx_buf_pool) { + free(rx_bd_ring_base); return -ENOMEM; + } memset(rx_buf_pool, 0, MAX_RXBUF_LEN * RX_BD_RING_SIZE); debug("%s: rx_buf_pool = %p\n", __func__, rx_buf_pool); diff --git a/drivers/net/octeontx/smi.c b/drivers/net/octeontx/smi.c index 27f4423c6a..d70fa820c7 100644 --- a/drivers/net/octeontx/smi.c +++ b/drivers/net/octeontx/smi.c @@ -314,10 +314,12 @@ read_error: int octeontx_smi_probe(struct udevice *dev) { - int ret, subnode, cnt = 0, node = dev_ofnode(dev).of_offset; - struct mii_dev *bus; - struct octeontx_smi_priv *priv; pci_dev_t bdf = dm_pci_get_bdf(dev); + struct octeontx_smi_priv *priv; + struct mii_dev *bus; + int ret, cnt = 0; + ofnode subnode; + u64 baseaddr; debug("SMI PCI device: %x\n", bdf); if (!dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM)) { @@ -325,14 +327,12 @@ int octeontx_smi_probe(struct udevice *dev) return -1; } - node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, - "cavium,thunder-8890-mdio-nexus"); - fdt_for_each_subnode(subnode, gd->fdt_blob, node) { - ret = fdt_node_check_compatible(gd->fdt_blob, subnode, - "cavium,thunder-8890-mdio"); - if (ret) + dev_for_each_subnode(subnode, dev) { + if (!ofnode_device_is_compatible(subnode, + "cavium,thunder-8890-mdio")) + continue; + if (ofnode_read_u64(subnode, "reg", &baseaddr)) continue; - bus = mdio_alloc(); priv = malloc(sizeof(*priv)); if (!bus || !priv) { @@ -347,9 +347,7 @@ int octeontx_smi_probe(struct udevice *dev) bus->priv = priv; priv->mode = CLAUSE22; - priv->baseaddr = (void __iomem *)fdtdec_get_addr(gd->fdt_blob, - subnode, - "reg"); + priv->baseaddr = (void __iomem *)baseaddr; debug("mdio base addr %p\n", priv->baseaddr); /* use given name or generate its own unique name */ diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c index 1e69525cb7..364750f65c 100644 --- a/drivers/net/pfe_eth/pfe_cmd.c +++ b/drivers/net/pfe_eth/pfe_cmd.c @@ -418,7 +418,7 @@ static void send_dummy_pkt_to_hif(void) writel(buf, TMU_PHY_INQ_PKTINFO); } -static void pfe_command_stop(int argc, char *const argv[]) +void pfe_command_stop(int argc, char *const argv[]) { int pfe_pe_id, hif_stop_loop = 10; u32 rx_status; diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index eee70a2e73..ac86e33c55 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015-2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP + * Copyright 2017,2021 NXP */ /* @@ -262,7 +262,8 @@ int pfe_firmware_init(void) uintptr_t pfe_img_addr = 0; #endif int ret = 0; - int fw_count; + int fw_count, max_fw_count; + const char *p; ret = pfe_spi_flash_init(); if (ret) @@ -293,6 +294,61 @@ int pfe_firmware_init(void) } #endif + p = env_get("load_util"); + if (!p) { + max_fw_count = 2; + } else { + max_fw_count = simple_strtoul(p, NULL, 10); + if (max_fw_count) + max_fw_count = 3; + else + max_fw_count = 2; + } + + for (fw_count = 0; fw_count < max_fw_count; fw_count++) { + switch (fw_count) { + case 0: + pfe_firmware_name = "class_slowpath"; + break; + case 1: + pfe_firmware_name = "tmu_slowpath"; + break; + case 2: + pfe_firmware_name = "util_slowpath"; + break; + } + + if (pfe_get_fw(&raw_image_addr, &raw_image_size, + pfe_firmware_name)) { + printf("%s firmware couldn't be found in FIT image\n", + pfe_firmware_name); + break; + } + pfe_firmware = malloc(raw_image_size); + if (!pfe_firmware) + return -ENOMEM; + memcpy((void *)pfe_firmware, (void *)raw_image_addr, + raw_image_size); + + switch (fw_count) { + case 0: + env_set_addr("class_elf_firmware", pfe_firmware); + env_set_addr("class_elf_size", (void *)raw_image_size); + break; + case 1: + env_set_addr("tmu_elf_firmware", pfe_firmware); + env_set_addr("tmu_elf_size", (void *)raw_image_size); + break; + case 2: + env_set_addr("util_elf_firmware", pfe_firmware); + env_set_addr("util_elf_size", (void *)raw_image_size); + break; + } + } + + raw_image_addr = NULL; + pfe_firmware = NULL; + raw_image_size = 0; for (fw_count = 0; fw_count < 2; fw_count++) { if (fw_count == 0) pfe_firmware_name = "class"; diff --git a/drivers/net/sni_netsec.c b/drivers/net/sni_netsec.c new file mode 100644 index 0000000000..a9ebf6af9c --- /dev/null +++ b/drivers/net/sni_netsec.c @@ -0,0 +1,1134 @@ +// SPDX-License-Identifier: GPL-2.0+ +/** + * netsec.c - Socionext Synquacer Netsec driver + * Copyright 2021 Linaro Ltd. + */ + +#include <clk.h> +#include <cpu_func.h> +#include <dm.h> +#include <fdt_support.h> +#include <log.h> +#include <malloc.h> +#include <miiphy.h> +#include <net.h> +#include <regmap.h> +#include <reset.h> +#include <syscon.h> +#include <asm/cache.h> +#include <asm/global_data.h> +#include <dm/device_compat.h> +#include <linux/bitops.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/iopoll.h> +#include <spi.h> +#include <spi_flash.h> + +#define NETSEC_REG_SOFT_RST 0x104 +#define NETSEC_REG_COM_INIT 0x120 + +#define NETSEC_REG_TOP_STATUS 0x200 +#define NETSEC_IRQ_RX BIT(1) +#define NETSEC_IRQ_TX BIT(0) + +#define NETSEC_REG_TOP_INTEN 0x204 +#define NETSEC_REG_INTEN_SET 0x234 +#define NETSEC_REG_INTEN_CLR 0x238 + +#define NETSEC_REG_NRM_TX_STATUS 0x400 +#define NETSEC_REG_NRM_TX_INTEN 0x404 +#define NETSEC_REG_NRM_TX_INTEN_SET 0x428 +#define NETSEC_REG_NRM_TX_INTEN_CLR 0x42c +#define NRM_TX_ST_NTOWNR BIT(17) +#define NRM_TX_ST_TR_ERR BIT(16) +#define NRM_TX_ST_TXDONE BIT(15) +#define NRM_TX_ST_TMREXP BIT(14) + +#define NETSEC_REG_NRM_RX_STATUS 0x440 +#define NETSEC_REG_NRM_RX_INTEN 0x444 +#define NETSEC_REG_NRM_RX_INTEN_SET 0x468 +#define NETSEC_REG_NRM_RX_INTEN_CLR 0x46c +#define NRM_RX_ST_RC_ERR BIT(16) +#define NRM_RX_ST_PKTCNT BIT(15) +#define NRM_RX_ST_TMREXP BIT(14) + +#define NETSEC_REG_PKT_CMD_BUF 0xd0 + +#define NETSEC_REG_CLK_EN 0x100 + +#define NETSEC_REG_PKT_CTRL 0x140 + +#define NETSEC_REG_DMA_TMR_CTRL 0x20c +#define NETSEC_REG_F_TAIKI_MC_VER 0x22c +#define NETSEC_REG_F_TAIKI_VER 0x230 +#define NETSEC_REG_DMA_HM_CTRL 0x214 +#define NETSEC_REG_DMA_MH_CTRL 0x220 +#define NETSEC_REG_ADDR_DIS_CORE 0x218 +#define NETSEC_REG_DMAC_HM_CMD_BUF 0x210 +#define NETSEC_REG_DMAC_MH_CMD_BUF 0x21c + +#define NETSEC_REG_NRM_TX_PKTCNT 0x410 + +#define NETSEC_REG_NRM_TX_DONE_PKTCNT 0x414 +#define NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT 0x418 + +#define NETSEC_REG_NRM_TX_TMR 0x41c + +#define NETSEC_REG_NRM_RX_PKTCNT 0x454 +#define NETSEC_REG_NRM_RX_RXINT_PKTCNT 0x458 +#define NETSEC_REG_NRM_TX_TXINT_TMR 0x420 +#define NETSEC_REG_NRM_RX_RXINT_TMR 0x460 + +#define NETSEC_REG_NRM_RX_TMR 0x45c + +#define NETSEC_REG_NRM_TX_DESC_START_UP 0x434 +#define NETSEC_REG_NRM_TX_DESC_START_LW 0x408 +#define NETSEC_REG_NRM_RX_DESC_START_UP 0x474 +#define NETSEC_REG_NRM_RX_DESC_START_LW 0x448 + +#define NETSEC_REG_NRM_TX_CONFIG 0x430 +#define NETSEC_REG_NRM_RX_CONFIG 0x470 + +#define MAC_REG_STATUS 0x1024 +#define MAC_REG_DATA 0x11c0 +#define MAC_REG_CMD 0x11c4 +#define MAC_REG_FLOW_TH 0x11cc +#define MAC_REG_INTF_SEL 0x11d4 +#define MAC_REG_DESC_INIT 0x11fc +#define MAC_REG_DESC_SOFT_RST 0x1204 +#define NETSEC_REG_MODE_TRANS_COMP_STATUS 0x500 + +#define GMAC_REG_MCR 0x0000 +#define GMAC_REG_MFFR 0x0004 +#define GMAC_REG_GAR 0x0010 +#define GMAC_REG_GDR 0x0014 +#define GMAC_REG_FCR 0x0018 +#define GMAC_REG_BMR 0x1000 +#define GMAC_REG_RDLAR 0x100c +#define GMAC_REG_TDLAR 0x1010 +#define GMAC_REG_OMR 0x1018 + +#define MHZ(n) ((n) * 1000 * 1000) + +#define NETSEC_TX_SHIFT_OWN_FIELD 31 +#define NETSEC_TX_SHIFT_LD_FIELD 30 +#define NETSEC_TX_SHIFT_DRID_FIELD 24 +#define NETSEC_TX_SHIFT_PT_FIELD 21 +#define NETSEC_TX_SHIFT_TDRID_FIELD 16 +#define NETSEC_TX_SHIFT_CC_FIELD 15 +#define NETSEC_TX_SHIFT_FS_FIELD 9 +#define NETSEC_TX_LAST 8 +#define NETSEC_TX_SHIFT_CO 7 +#define NETSEC_TX_SHIFT_SO 6 +#define NETSEC_TX_SHIFT_TRS_FIELD 4 + +#define NETSEC_RX_PKT_OWN_FIELD 31 +#define NETSEC_RX_PKT_LD_FIELD 30 +#define NETSEC_RX_PKT_SDRID_FIELD 24 +#define NETSEC_RX_PKT_FR_FIELD 23 +#define NETSEC_RX_PKT_ER_FIELD 21 +#define NETSEC_RX_PKT_ERR_FIELD 16 +#define NETSEC_RX_PKT_TDRID_FIELD 12 +#define NETSEC_RX_PKT_FS_FIELD 9 +#define NETSEC_RX_PKT_LS_FIELD 8 +#define NETSEC_RX_PKT_CO_FIELD 6 + +#define NETSEC_RX_PKT_ERR_MASK 3 + +#define NETSEC_MAX_TX_PKT_LEN 1518 +#define NETSEC_MAX_TX_JUMBO_PKT_LEN 9018 + +#define NETSEC_RING_GMAC 15 +#define NETSEC_RING_MAX 2 + +#define NETSEC_TCP_SEG_LEN_MAX 1460 +#define NETSEC_TCP_JUMBO_SEG_LEN_MAX 8960 + +#define NETSEC_RX_CKSUM_NOTAVAIL 0 +#define NETSEC_RX_CKSUM_OK 1 +#define NETSEC_RX_CKSUM_NG 2 + +#define NETSEC_TOP_IRQ_REG_ME_START BIT(20) +#define NETSEC_IRQ_TRANSITION_COMPLETE BIT(4) + +#define NETSEC_MODE_TRANS_COMP_IRQ_N2T BIT(20) +#define NETSEC_MODE_TRANS_COMP_IRQ_T2N BIT(19) + +#define NETSEC_INT_PKTCNT_MAX 2047 + +#define NETSEC_FLOW_START_TH_MAX 95 +#define NETSEC_FLOW_STOP_TH_MAX 95 +#define NETSEC_FLOW_PAUSE_TIME_MIN 5 + +#define NETSEC_CLK_EN_REG_DOM_ALL 0x3f + +#define NETSEC_PKT_CTRL_REG_MODE_NRM BIT(28) +#define NETSEC_PKT_CTRL_REG_EN_JUMBO BIT(27) +#define NETSEC_PKT_CTRL_REG_LOG_CHKSUM_ER BIT(3) +#define NETSEC_PKT_CTRL_REG_LOG_HD_INCOMPLETE BIT(2) +#define NETSEC_PKT_CTRL_REG_LOG_HD_ER BIT(1) +#define NETSEC_PKT_CTRL_REG_DRP_NO_MATCH BIT(0) + +#define NETSEC_CLK_EN_REG_DOM_G BIT(5) +#define NETSEC_CLK_EN_REG_DOM_C BIT(1) +#define NETSEC_CLK_EN_REG_DOM_D BIT(0) + +#define NETSEC_COM_INIT_REG_DB BIT(2) +#define NETSEC_COM_INIT_REG_CLS BIT(1) +#define NETSEC_COM_INIT_REG_ALL (NETSEC_COM_INIT_REG_CLS | \ + NETSEC_COM_INIT_REG_DB) + +#define NETSEC_SOFT_RST_REG_RESET 0 +#define NETSEC_SOFT_RST_REG_RUN BIT(31) + +#define NETSEC_DMA_CTRL_REG_STOP 1 +#define MH_CTRL__MODE_TRANS BIT(20) + +#define NETSEC_GMAC_CMD_ST_READ 0 +#define NETSEC_GMAC_CMD_ST_WRITE BIT(28) +#define NETSEC_GMAC_CMD_ST_BUSY BIT(31) + +#define NETSEC_GMAC_BMR_REG_COMMON 0x00412080 +#define NETSEC_GMAC_BMR_REG_RESET 0x00020181 +#define NETSEC_GMAC_BMR_REG_SWR 0x00000001 + +#define NETSEC_GMAC_OMR_REG_ST BIT(13) +#define NETSEC_GMAC_OMR_REG_SR BIT(1) + +#define NETSEC_GMAC_MCR_REG_IBN BIT(30) +#define NETSEC_GMAC_MCR_REG_CST BIT(25) +#define NETSEC_GMAC_MCR_REG_JE BIT(20) +#define NETSEC_MCR_PS BIT(15) +#define NETSEC_GMAC_MCR_REG_FES BIT(14) +#define NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON 0x0000280c +#define NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON 0x0001a00c + +#define NETSEC_FCR_RFE BIT(2) +#define NETSEC_FCR_TFE BIT(1) + +#define NETSEC_GMAC_GAR_REG_GW BIT(1) +#define NETSEC_GMAC_GAR_REG_GB BIT(0) + +#define NETSEC_GMAC_GAR_REG_SHIFT_PA 11 +#define NETSEC_GMAC_GAR_REG_SHIFT_GR 6 +#define GMAC_REG_SHIFT_CR_GAR 2 + +#define NETSEC_GMAC_GAR_REG_CR_25_35_MHZ 2 +#define NETSEC_GMAC_GAR_REG_CR_35_60_MHZ 3 +#define NETSEC_GMAC_GAR_REG_CR_60_100_MHZ 0 +#define NETSEC_GMAC_GAR_REG_CR_100_150_MHZ 1 +#define NETSEC_GMAC_GAR_REG_CR_150_250_MHZ 4 +#define NETSEC_GMAC_GAR_REG_CR_250_300_MHZ 5 + +#define NETSEC_GMAC_RDLAR_REG_COMMON 0x18000 +#define NETSEC_GMAC_TDLAR_REG_COMMON 0x1c000 + +#define NETSEC_REG_NETSEC_VER_F_TAIKI 0x50000 + +#define NETSEC_REG_DESC_RING_CONFIG_CFG_UP BIT(31) +#define NETSEC_REG_DESC_RING_CONFIG_CH_RST BIT(30) +#define NETSEC_REG_DESC_TMR_MODE 4 +#define NETSEC_REG_DESC_ENDIAN 0 + +#define NETSEC_MAC_DESC_SOFT_RST_SOFT_RST 1 +#define NETSEC_MAC_DESC_INIT_REG_INIT 1 + +#define NETSEC_EEPROM_MAC_ADDRESS 0x00 +#define NETSEC_EEPROM_HM_ME_ADDRESS_H 0x08 +#define NETSEC_EEPROM_HM_ME_ADDRESS_L 0x0C +#define NETSEC_EEPROM_HM_ME_SIZE 0x10 +#define NETSEC_EEPROM_MH_ME_ADDRESS_H 0x14 +#define NETSEC_EEPROM_MH_ME_ADDRESS_L 0x18 +#define NETSEC_EEPROM_MH_ME_SIZE 0x1C +#define NETSEC_EEPROM_PKT_ME_ADDRESS 0x20 +#define NETSEC_EEPROM_PKT_ME_SIZE 0x24 + +#define DESC_SZ sizeof(struct netsec_de) + +#define NETSEC_F_NETSEC_VER_MAJOR_NUM(x) ((x) & 0xffff0000) + +#define EERPROM_MAP_OFFSET 0x8000000 +#define NOR_BLOCK 1024 + +struct netsec_de { /* Netsec Descriptor layout */ + u32 attr; + u32 data_buf_addr_up; + u32 data_buf_addr_lw; + u32 buf_len_info; +}; + +struct netsec_priv { + struct netsec_de rxde[PKTBUFSRX]; + struct netsec_de txde[1]; + u16 rxat; + + phys_addr_t eeprom_base; + phys_addr_t ioaddr; + + struct mii_dev *bus; + struct phy_device *phydev; + u32 phy_addr, freq; + int phy_mode; + int max_speed; +}; + +struct netsec_tx_pkt_ctrl { + u16 tcp_seg_len; + bool tcp_seg_offload_flag; + bool cksum_offload_flag; +}; + +struct netsec_rx_pkt_info { + int rx_cksum_result; + int err_code; + bool err_flag; +}; + +static void netsec_write_reg(struct netsec_priv *priv, u32 reg_addr, u32 val) +{ + writel(val, priv->ioaddr + reg_addr); +} + +static u32 netsec_read_reg(struct netsec_priv *priv, u32 reg_addr) +{ + return readl(priv->ioaddr + reg_addr); +} + +/************* MDIO BUS OPS FOLLOW *************/ + +#define TIMEOUT_SPINS_MAC 1000 +#define TIMEOUT_SECONDARY_MS_MAC 100 + +static u32 netsec_clk_type(u32 freq) +{ + if (freq < MHZ(35)) + return NETSEC_GMAC_GAR_REG_CR_25_35_MHZ; + if (freq < MHZ(60)) + return NETSEC_GMAC_GAR_REG_CR_35_60_MHZ; + if (freq < MHZ(100)) + return NETSEC_GMAC_GAR_REG_CR_60_100_MHZ; + if (freq < MHZ(150)) + return NETSEC_GMAC_GAR_REG_CR_100_150_MHZ; + if (freq < MHZ(250)) + return NETSEC_GMAC_GAR_REG_CR_150_250_MHZ; + + return NETSEC_GMAC_GAR_REG_CR_250_300_MHZ; +} + +static int netsec_wait_while_busy(struct netsec_priv *priv, u32 addr, u32 mask) +{ + u32 timeout = TIMEOUT_SPINS_MAC; + + while (--timeout && netsec_read_reg(priv, addr) & mask) + cpu_relax(); + if (timeout) + return 0; + + timeout = TIMEOUT_SECONDARY_MS_MAC; + while (--timeout && netsec_read_reg(priv, addr) & mask) + udelay(2000); + + if (timeout) + return 0; + + pr_err("%s: timeout\n", __func__); + + return -ETIMEDOUT; +} + +static int netsec_set_mac_reg(struct netsec_priv *priv, u32 addr, u32 value) +{ + netsec_write_reg(priv, MAC_REG_DATA, value); + netsec_write_reg(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_WRITE); + return netsec_wait_while_busy(priv, + MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); +} + +static int netsec_get_mac_reg(struct netsec_priv *priv, u32 addr, u32 *read) +{ + int ret; + + netsec_write_reg(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_READ); + ret = netsec_wait_while_busy(priv, + MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); + if (ret) + return ret; + + *read = netsec_read_reg(priv, MAC_REG_DATA); + + return 0; +} + +static int netsec_mac_wait_while_busy(struct netsec_priv *priv, + u32 addr, u32 mask) +{ + u32 timeout = TIMEOUT_SPINS_MAC; + u32 data; + int ret; + + do { + ret = netsec_get_mac_reg(priv, addr, &data); + if (ret) + break; + udelay(1); + } while (--timeout && (data & mask)); + + if (timeout) + return 0; + + timeout = TIMEOUT_SECONDARY_MS_MAC; + do { + udelay(2000); + + ret = netsec_get_mac_reg(priv, addr, &data); + if (ret) + break; + cpu_relax(); + } while (--timeout && (data & mask)); + + if (timeout && !ret) + return 0; + + return -ETIMEDOUT; +} + +static void netsec_cache_invalidate(uintptr_t vaddr, int len) +{ + invalidate_dcache_range(rounddown(vaddr, ARCH_DMA_MINALIGN), + roundup(vaddr + len, ARCH_DMA_MINALIGN)); +} + +static void netsec_cache_flush(uintptr_t vaddr, int len) +{ + flush_dcache_range(rounddown(vaddr, ARCH_DMA_MINALIGN), + roundup(vaddr + len, ARCH_DMA_MINALIGN)); +} + +static void netsec_set_rx_de(struct netsec_priv *priv, u16 idx, void *addr) +{ + struct netsec_de *de = &priv->rxde[idx]; + u32 attr = (1 << NETSEC_RX_PKT_OWN_FIELD) | + (1 << NETSEC_RX_PKT_FS_FIELD) | + (1 << NETSEC_RX_PKT_LS_FIELD); + + if (idx == PKTBUFSRX - 1) + attr |= (1 << NETSEC_RX_PKT_LD_FIELD); + + de->data_buf_addr_up = upper_32_bits((dma_addr_t)addr); + de->data_buf_addr_lw = lower_32_bits((dma_addr_t)addr); + de->buf_len_info = PKTSIZE; + de->attr = attr; + dmb(); + netsec_cache_flush((uintptr_t)de, sizeof(*de)); +} + +static void netsec_set_tx_de(struct netsec_priv *priv, void *addr, int len) +{ + struct netsec_de *de = &priv->txde[0]; + u32 attr; + + attr = (1 << NETSEC_TX_SHIFT_OWN_FIELD) | + (1 << NETSEC_TX_SHIFT_PT_FIELD) | + (NETSEC_RING_GMAC << NETSEC_TX_SHIFT_TDRID_FIELD) | + (1 << NETSEC_TX_SHIFT_FS_FIELD) | + (1 << NETSEC_TX_LAST) | + (1 << NETSEC_TX_SHIFT_TRS_FIELD) | + (1 << NETSEC_TX_SHIFT_LD_FIELD); + + de->data_buf_addr_up = upper_32_bits((dma_addr_t)addr); + de->data_buf_addr_lw = lower_32_bits((dma_addr_t)addr); + de->buf_len_info = len; + de->attr = attr; + dmb(); + netsec_cache_flush((uintptr_t)de, sizeof(*de)); +} + +static int netsec_get_phy_reg(struct netsec_priv *priv, + int phy_addr, int reg_addr) +{ + u32 data; + int ret; + + if (phy_addr != 7) + return -EINVAL; + + if (netsec_set_mac_reg(priv, GMAC_REG_GAR, NETSEC_GMAC_GAR_REG_GB | + phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | + reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | + (netsec_clk_type(priv->freq) << + GMAC_REG_SHIFT_CR_GAR))) + return -ETIMEDOUT; + + ret = netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, + NETSEC_GMAC_GAR_REG_GB); + if (ret) + return ret; + + ret = netsec_get_mac_reg(priv, GMAC_REG_GDR, &data); + if (ret) + return ret; + + return data; +} + +static int netsec_set_phy_reg(struct netsec_priv *priv, + int phy_addr, int reg_addr, u16 val) +{ + int ret; + + if (phy_addr != 7) + return -EINVAL; + if (netsec_set_mac_reg(priv, GMAC_REG_GDR, val)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_GAR, + phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | + reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | + NETSEC_GMAC_GAR_REG_GW | NETSEC_GMAC_GAR_REG_GB | + (netsec_clk_type(priv->freq) << + GMAC_REG_SHIFT_CR_GAR))) + return -ETIMEDOUT; + + ret = netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, + NETSEC_GMAC_GAR_REG_GB); + + /* Developerbox implements RTL8211E PHY and there is + * a compatibility problem with F_GMAC4. + * RTL8211E expects MDC clock must be kept toggling for several + * clock cycle with MDIO high before entering the IDLE state. + * To meet this requirement, netsec driver needs to issue dummy + * read(e.g. read PHYID1(offset 0x2) register) right after write. + */ + netsec_get_phy_reg(priv, phy_addr, MII_PHYSID1); + + return ret; +} + +static int netsec_mac_update_to_phy_state(struct netsec_priv *priv) +{ + struct phy_device *phydev = priv->phydev; + u32 value = 0; + + value = phydev->duplex ? NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON : + NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON; + + if (phydev->speed != SPEED_1000) + value |= NETSEC_MCR_PS; + + if (phydev->interface != PHY_INTERFACE_MODE_GMII && + phydev->speed == SPEED_100) + value |= NETSEC_GMAC_MCR_REG_FES; + + value |= NETSEC_GMAC_MCR_REG_CST | NETSEC_GMAC_MCR_REG_JE; + + if (phy_interface_is_rgmii(phydev)) + value |= NETSEC_GMAC_MCR_REG_IBN; + + if (netsec_set_mac_reg(priv, GMAC_REG_MCR, value)) + return -ETIMEDOUT; + + return 0; +} + +static int netsec_start_gmac(struct netsec_priv *priv) +{ + u32 value = 0; + int ret; + + if (priv->max_speed != SPEED_1000) + value = (NETSEC_GMAC_MCR_REG_CST | + NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON); + + if (netsec_set_mac_reg(priv, GMAC_REG_MCR, value)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_BMR, + NETSEC_GMAC_BMR_REG_RESET)) + return -ETIMEDOUT; + + /* Wait soft reset */ + mdelay(5); + + ret = netsec_get_mac_reg(priv, GMAC_REG_BMR, &value); + if (ret) + return ret; + + if (value & NETSEC_GMAC_BMR_REG_SWR) + return -EAGAIN; + + netsec_write_reg(priv, MAC_REG_DESC_SOFT_RST, 1); + if (netsec_wait_while_busy(priv, MAC_REG_DESC_SOFT_RST, 1)) + return -ETIMEDOUT; + + netsec_write_reg(priv, MAC_REG_DESC_INIT, 1); + if (netsec_wait_while_busy(priv, MAC_REG_DESC_INIT, 1)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_BMR, + NETSEC_GMAC_BMR_REG_COMMON)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_RDLAR, + NETSEC_GMAC_RDLAR_REG_COMMON)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_TDLAR, + NETSEC_GMAC_TDLAR_REG_COMMON)) + return -ETIMEDOUT; + + if (netsec_set_mac_reg(priv, GMAC_REG_MFFR, 0x80000001)) + return -ETIMEDOUT; + + ret = netsec_mac_update_to_phy_state(priv); + if (ret) + return ret; + + ret = netsec_get_mac_reg(priv, GMAC_REG_OMR, &value); + if (ret) + return ret; + + value |= NETSEC_GMAC_OMR_REG_SR; + value |= NETSEC_GMAC_OMR_REG_ST; + + netsec_write_reg(priv, NETSEC_REG_NRM_RX_INTEN_CLR, ~0); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_INTEN_CLR, ~0); + + if (netsec_set_mac_reg(priv, GMAC_REG_OMR, value)) + return -ETIMEDOUT; + + return 0; +} + +static int netsec_stop_gmac(struct netsec_priv *priv) +{ + u32 value; + int ret; + + ret = netsec_get_mac_reg(priv, GMAC_REG_OMR, &value); + if (ret) + return ret; + value &= ~NETSEC_GMAC_OMR_REG_SR; + value &= ~NETSEC_GMAC_OMR_REG_ST; + + /* disable all interrupts */ + netsec_write_reg(priv, NETSEC_REG_NRM_RX_INTEN_CLR, ~0); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_INTEN_CLR, ~0); + + return netsec_set_mac_reg(priv, GMAC_REG_OMR, value); +} + +static void netsec_spi_read(char *buf, loff_t len, loff_t offset) +{ + struct udevice *new; + struct spi_flash *flash; + + spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, CONFIG_SF_DEFAULT_MODE, &new); + flash = dev_get_uclass_priv(new); + + spi_flash_read(flash, offset, len, buf); +} + +static int netsec_read_rom_hwaddr(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_plat(dev); + char macp[NOR_BLOCK]; + + netsec_spi_read(macp, sizeof(macp), priv->eeprom_base); + + pdata->enetaddr[0] = readb(macp + 3); + pdata->enetaddr[1] = readb(macp + 2); + pdata->enetaddr[2] = readb(macp + 1); + pdata->enetaddr[3] = readb(macp + 0); + pdata->enetaddr[4] = readb(macp + 7); + pdata->enetaddr[5] = readb(macp + 6); + return 0; +} + +static int netsec_send(struct udevice *dev, void *packet, int length) +{ + struct netsec_priv *priv = dev_get_priv(dev); + u32 val, tout; + + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_STATUS); + netsec_cache_flush((uintptr_t)packet, length); + netsec_set_tx_de(priv, packet, length); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_PKTCNT, 1); /* submit another tx */ + + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_PKTCNT); + + tout = 10000; + do { + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_DONE_PKTCNT); + udelay(2); + } while (--tout && !val); + + if (!tout) { + val = netsec_read_reg(priv, NETSEC_REG_NRM_TX_PKTCNT); + pr_err("%s: ETIMEDOUT: %dpackets\n", __func__, val); + return -ETIMEDOUT; + } + + return 0; +} + +static int netsec_free_packet(struct udevice *dev, uchar *packet, int length) +{ + struct netsec_priv *priv = dev_get_priv(dev); + + netsec_set_rx_de(priv, priv->rxat, net_rx_packets[priv->rxat]); + + priv->rxat++; + if (priv->rxat == PKTBUFSRX) + priv->rxat = 0; + + return 0; +} + +static int netsec_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct netsec_priv *priv = dev_get_priv(dev); + int idx = priv->rxat; + uchar *ptr = net_rx_packets[idx]; + struct netsec_de *de = &priv->rxde[idx]; + int length = 0; + + netsec_cache_invalidate((uintptr_t)de, sizeof(*de)); + + if (de->attr & (1U << NETSEC_RX_PKT_OWN_FIELD)) + return -EAGAIN; + + length = de->buf_len_info >> 16; + + /* invalidate after DMA is done */ + netsec_cache_invalidate((uintptr_t)ptr, length); + *packetp = ptr; + + return length; +} + +static int _netsec_get_phy_reg(struct mii_dev *bus, + int phy_addr, int devad, int reg_addr) +{ + return netsec_get_phy_reg(bus->priv, phy_addr, reg_addr); +} + +static int _netsec_set_phy_reg(struct mii_dev *bus, + int phy_addr, int devad, int reg_addr, u16 val) +{ + return netsec_set_phy_reg(bus->priv, phy_addr, reg_addr, val); +} + +static int netsec_mdiobus_init(struct netsec_priv *priv, const char *name) +{ + struct mii_dev *bus = mdio_alloc(); + + if (!bus) + return -ENOMEM; + + bus->read = _netsec_get_phy_reg; + bus->write = _netsec_set_phy_reg; + snprintf(bus->name, sizeof(bus->name), "%s", name); + bus->priv = priv; + + return mdio_register(bus); +} + +static int netsec_phy_init(struct netsec_priv *priv, void *dev) +{ + struct phy_device *phydev; + int ret; + + phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode); + + phydev->supported &= PHY_GBIT_FEATURES; + if (priv->max_speed) { + ret = phy_set_supported(phydev, priv->max_speed); + if (ret) + return ret; + } + phydev->advertising = phydev->supported; + + priv->phydev = phydev; + phy_config(phydev); + + return 0; +} + +static int netsec_netdev_load_ucode_region(struct netsec_priv *priv, u32 reg, + u32 addr_h, u32 addr_l, u32 size) +{ + u64 base = ((u64)addr_h << 32 | addr_l) - EERPROM_MAP_OFFSET; + + while (size > 0) { + char buf[NOR_BLOCK]; + u32 *ucode = (u32 *)buf; + u64 off; + int i; + + off = base % NOR_BLOCK; + base -= off; + netsec_spi_read(buf, sizeof(buf), base); + + for (i = off / 4; i < sizeof(buf) / 4 && size > 0; i++, size--) + netsec_write_reg(priv, reg, ucode[i]); + base += NOR_BLOCK; + } + + return 0; +} + +static int netsec_netdev_load_microcode(struct netsec_priv *priv) +{ + u32 addr_h, addr_l, size; + char buf[NOR_BLOCK]; + u32 *ucinfo = (u32 *)buf; + int err; + + netsec_spi_read(buf, sizeof(buf), priv->eeprom_base); + + addr_h = ucinfo[NETSEC_EEPROM_HM_ME_ADDRESS_H >> 2]; + addr_l = ucinfo[NETSEC_EEPROM_HM_ME_ADDRESS_L >> 2]; + size = ucinfo[NETSEC_EEPROM_HM_ME_SIZE >> 2]; + + err = netsec_netdev_load_ucode_region(priv, NETSEC_REG_DMAC_HM_CMD_BUF, + addr_h, addr_l, size); + if (err) + return err; + + addr_h = ucinfo[NETSEC_EEPROM_MH_ME_ADDRESS_H >> 2]; + addr_l = ucinfo[NETSEC_EEPROM_MH_ME_ADDRESS_L >> 2]; + size = ucinfo[NETSEC_EEPROM_MH_ME_SIZE >> 2]; + + err = netsec_netdev_load_ucode_region(priv, NETSEC_REG_DMAC_MH_CMD_BUF, + addr_h, addr_l, size); + if (err) + return err; + + addr_h = 0; + addr_l = ucinfo[NETSEC_EEPROM_PKT_ME_ADDRESS >> 2]; + size = ucinfo[NETSEC_EEPROM_PKT_ME_SIZE >> 2]; + + err = netsec_netdev_load_ucode_region(priv, NETSEC_REG_PKT_CMD_BUF, + addr_h, addr_l, size); + if (err) + return err; + + return 0; +} + +void netsec_pre_init_microengine(struct netsec_priv *priv) +{ + u32 data; + + /* Remove dormant settings */ + data = netsec_get_phy_reg(priv, priv->phy_addr, MII_BMCR); + data &= ~BMCR_PDOWN; + data |= BMCR_ISOLATE; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); + + /* Put phy in loopback mode to guarantee RXCLK input */ + data |= BMCR_LOOPBACK; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); +} + +void netsec_post_init_microengine(struct netsec_priv *priv) +{ + u32 data; + + /* Get phy back to normal operation */ + data = netsec_get_phy_reg(priv, priv->phy_addr, MII_BMCR); + data &= ~BMCR_LOOPBACK; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); + + /* Apply software reset */ + data |= BMCR_RESET; + netsec_set_phy_reg(priv, priv->phy_addr, MII_BMCR, data); + mdelay(100); +} + +static int netsec_reset_hardware(struct netsec_priv *priv, bool load_ucode) +{ + u32 value; + int err; + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 0x24); + + /* stop DMA engines */ + if (!netsec_read_reg(priv, NETSEC_REG_ADDR_DIS_CORE)) { + netsec_write_reg(priv, NETSEC_REG_DMA_HM_CTRL, + NETSEC_DMA_CTRL_REG_STOP); + netsec_write_reg(priv, NETSEC_REG_DMA_MH_CTRL, + NETSEC_DMA_CTRL_REG_STOP); + + value = 100; + while (netsec_read_reg(priv, NETSEC_REG_DMA_HM_CTRL) & + NETSEC_DMA_CTRL_REG_STOP) { + udelay(1000); + if (--value == 0) { + pr_err("%s:%d timeout!\n", __func__, __LINE__); + break; + } + } + + value = 100; + while (netsec_read_reg(priv, NETSEC_REG_DMA_MH_CTRL) & + NETSEC_DMA_CTRL_REG_STOP) { + udelay(1000); + if (--value == 0) { + pr_err("%s:%d timeout!\n", __func__, __LINE__); + break; + } + } + } + + netsec_set_mac_reg(priv, GMAC_REG_BMR, NETSEC_GMAC_BMR_REG_RESET); + + netsec_write_reg(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RESET); + netsec_write_reg(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RUN); + netsec_write_reg(priv, NETSEC_REG_COM_INIT, NETSEC_COM_INIT_REG_ALL); + + value = 100; + while (netsec_read_reg(priv, NETSEC_REG_COM_INIT) != 0) { + udelay(1000); + if (--value == 0) { + pr_err("%s:%d COM_INIT timeout!\n", __func__, __LINE__); + break; + } + } + + /* MAC desc init */ + netsec_write_reg(priv, MAC_REG_DESC_INIT, 1); + netsec_wait_while_busy(priv, MAC_REG_DESC_INIT, 1); + /* set MAC_INTF_SEL */ + netsec_write_reg(priv, MAC_REG_INTF_SEL, 1); + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 1 << 5); + + /* set desc_start addr */ + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->rxde)); + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->rxde)); + + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->txde)); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->txde)); + + /* set normal tx dring ring config */ + netsec_write_reg(priv, NETSEC_REG_NRM_TX_CONFIG, + 1 << NETSEC_REG_DESC_ENDIAN); + netsec_write_reg(priv, NETSEC_REG_NRM_RX_CONFIG, + 1 << NETSEC_REG_DESC_ENDIAN); + + if (load_ucode) { + err = netsec_netdev_load_microcode(priv); + if (err) { + pr_err("%s: failed to load microcode (%d)\n", + __func__, err); + return err; + } + } + + /* set desc_start addr */ + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->rxde)); + netsec_write_reg(priv, NETSEC_REG_NRM_RX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->rxde)); + + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_UP, + upper_32_bits((dma_addr_t)priv->txde)); + netsec_write_reg(priv, NETSEC_REG_NRM_TX_DESC_START_LW, + lower_32_bits((dma_addr_t)priv->txde)); + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 1 << 5); + + /* start DMA engines */ + netsec_write_reg(priv, NETSEC_REG_DMA_TMR_CTRL, priv->freq / 1000000 - 1); + + netsec_pre_init_microengine(priv); + + netsec_write_reg(priv, NETSEC_REG_ADDR_DIS_CORE, 0); + + mdelay(100); + + if (!(netsec_read_reg(priv, NETSEC_REG_TOP_STATUS) & + NETSEC_TOP_IRQ_REG_ME_START)) { + pr_err("microengine start failed\n"); + return -ENXIO; + } + + netsec_post_init_microengine(priv); + + /* clear microcode load end status */ + netsec_write_reg(priv, NETSEC_REG_TOP_STATUS, + NETSEC_TOP_IRQ_REG_ME_START); + + netsec_write_reg(priv, NETSEC_REG_CLK_EN, 1 << 5); + + value = netsec_read_reg(priv, NETSEC_REG_PKT_CTRL); + value |= NETSEC_PKT_CTRL_REG_MODE_NRM; + /* change to normal mode */ + netsec_write_reg(priv, NETSEC_REG_DMA_MH_CTRL, MH_CTRL__MODE_TRANS); + netsec_write_reg(priv, NETSEC_REG_PKT_CTRL, value); + + value = 100; + while ((netsec_read_reg(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS) & + NETSEC_MODE_TRANS_COMP_IRQ_T2N) == 0) { + udelay(1000); + if (--value == 0) { + value = netsec_read_reg(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS); + pr_err("%s:%d timeout! val=%x\n", __func__, __LINE__, value); + break; + } + } + + /* clear any pending EMPTY/ERR irq status */ + netsec_write_reg(priv, NETSEC_REG_NRM_TX_STATUS, ~0); + + /* Disable TX & RX intr */ + netsec_write_reg(priv, NETSEC_REG_INTEN_CLR, ~0); + + return 0; +} + +static void netsec_stop(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + + netsec_write_reg(priv, NETSEC_REG_ADDR_DIS_CORE, 7); + netsec_stop_gmac(priv); + phy_shutdown(priv->phydev); + netsec_reset_hardware(priv, false); +} + +static int netsec_start(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + int i; + + phy_startup(priv->phydev); + netsec_start_gmac(priv); + + priv->rxat = 0; + for (i = 0; i < PKTBUFSRX; i++) + netsec_set_rx_de(priv, i, net_rx_packets[i]); + + return 0; +} + +static int netsec_of_to_plat(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + struct netsec_priv *priv = dev_get_priv(dev); + struct ofnode_phandle_args phandle_args; + const char *phy_mode; + + pdata->iobase = dev_read_addr_index(dev, 0); + priv->eeprom_base = dev_read_addr_index(dev, 1) - EERPROM_MAP_OFFSET; + + pdata->phy_interface = -1; + phy_mode = dev_read_prop(dev, "phy-mode", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + pr_err("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + + if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) + priv->phy_addr = ofnode_read_u32_default(phandle_args.node, "reg", 7); + else + priv->phy_addr = 7; + + pdata->max_speed = dev_read_u32_default(dev, "max-speed", SPEED_1000); + + priv->ioaddr = pdata->iobase; + priv->phy_mode = pdata->phy_interface; + priv->max_speed = pdata->max_speed; + priv->freq = 250000000UL; + + return 0; +} + +#define SMMU_SCR0_SHCFG_INNER (0x2 << 22) +#define SMMU_SCR0_MTCFG (0x1 << 20) +#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16) + +static int netsec_probe(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + int ret; + + writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB, + (phys_addr_t)0x52E00000); + + netsec_reset_hardware(priv, true); + + ret = netsec_mdiobus_init(priv, dev->name); + if (ret) { + pr_err("Failed to initialize mdiobus: %d\n", ret); + return ret; + } + + priv->bus = miiphy_get_dev_by_name(dev->name); + + ret = netsec_phy_init(priv, dev); + if (ret) { + pr_err("Failed to initialize phy: %d\n", ret); + goto out_mdiobus_release; + } + + return 0; +out_mdiobus_release: + mdio_unregister(priv->bus); + mdio_free(priv->bus); + return ret; +} + +static int netsec_remove(struct udevice *dev) +{ + struct netsec_priv *priv = dev_get_priv(dev); + + free(priv->phydev); + mdio_unregister(priv->bus); + mdio_free(priv->bus); + + return 0; +} + +static const struct eth_ops netsec_ops = { + .start = netsec_start, + .stop = netsec_stop, + .send = netsec_send, + .recv = netsec_recv, + .free_pkt = netsec_free_packet, + .read_rom_hwaddr = netsec_read_rom_hwaddr, +}; + +static const struct udevice_id netsec_ids[] = { + { + .compatible = "socionext,synquacer-netsec", + }, + {} +}; + +U_BOOT_DRIVER(ave) = { + .name = "synquacer_netsec", + .id = UCLASS_ETH, + .of_match = netsec_ids, + .probe = netsec_probe, + .remove = netsec_remove, + .of_to_plat = netsec_of_to_plat, + .ops = &netsec_ops, + .priv_auto = sizeof(struct netsec_priv), + .plat_auto = sizeof(struct eth_pdata), +}; diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 5a1b38bf80..d7553fe163 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg) * The EMAC clock is either 200 or 300 MHz, so we need a divider * of 128 to get the MDIO frequency below the required 2.5 MHz. */ - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT; + if (!priv->use_internal_phy) + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << + MDIO_CMD_MII_CLK_CSR_SHIFT; mii_cmd |= MDIO_CMD_MII_BUSY; @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg, * The EMAC clock is either 200 or 300 MHz, so we need a divider * of 128 to get the MDIO frequency below the required 2.5 MHz. */ - mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << MDIO_CMD_MII_CLK_CSR_SHIFT; + if (!priv->use_internal_phy) + mii_cmd |= MDIO_CMD_MII_CLK_CSR_DIV_128 << + MDIO_CMD_MII_CLK_CSR_SHIFT; mii_cmd |= MDIO_CMD_MII_WRITE; mii_cmd |= MDIO_CMD_MII_BUSY; diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index c68e4b7fb5..ee820aae15 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -828,6 +828,7 @@ int tsec_probe(struct udevice *dev) const char *phy_mode; ofnode parent, child; fdt_addr_t reg; + u32 max_speed; int ret; data = (struct tsec_data *)dev_get_driver_data(dev); @@ -893,8 +894,12 @@ int tsec_probe(struct udevice *dev) } priv->interface = pdata->phy_interface; + /* Check for speed limit, default is 1000Mbps */ + max_speed = dev_read_u32_default(dev, "max-speed", 1000); + /* Initialize flags */ - priv->flags = TSEC_GIGABIT; + if (max_speed == 1000) + priv->flags = TSEC_GIGABIT; if (priv->interface == PHY_INTERFACE_MODE_SGMII) priv->flags |= TSEC_SGMII; diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c index 277e31e1f3..610166d76e 100644 --- a/drivers/nvme/nvme-uclass.c +++ b/drivers/nvme/nvme-uclass.c @@ -5,39 +5,9 @@ */ #include <common.h> -#include <blk.h> -#include <errno.h> #include <dm.h> -#include <dm/device.h> -#include "nvme.h" - -static int nvme_uclass_post_probe(struct udevice *udev) -{ - char name[20]; - struct udevice *ns_udev; - int i, ret; - struct nvme_dev *ndev = dev_get_priv(udev); - - /* Create a blk device for each namespace */ - for (i = 0; i < ndev->nn; i++) { - /* - * Encode the namespace id to the device name so that - * we can extract it when doing the probe. - */ - sprintf(name, "blk#%d", i); - - /* The real blksz and size will be set by nvme_blk_probe() */ - ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME, - -1, 512, 0, &ns_udev); - if (ret) - return ret; - } - - return 0; -} UCLASS_DRIVER(nvme) = { .name = "nvme", .id = UCLASS_NVME, - .post_probe = nvme_uclass_post_probe, }; diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index c61dab20c5..f6465ea7f4 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -81,7 +81,7 @@ static int nvme_setup_prps(struct nvme_dev *dev, u64 *prp2, u64 *prp_pool; int length = total_len; int i, nprps; - u32 prps_per_page = (page_size >> 3) - 1; + u32 prps_per_page = page_size >> 3; u32 num_pages; length -= (page_size - offset); @@ -157,7 +157,7 @@ static u16 nvme_read_completion_status(struct nvme_queue *nvmeq, u16 index) invalidate_dcache_range(start, stop); - return le16_to_cpu(readw(&(nvmeq->cqes[index].status))); + return readw(&(nvmeq->cqes[index].status)); } /** @@ -221,7 +221,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq, } if (result) - *result = le32_to_cpu(readl(&(nvmeq->cqes[head].result))); + *result = readl(&(nvmeq->cqes[head].result)); if (++head == nvmeq->q_depth) { head = 0; @@ -304,7 +304,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev) { dev->ctrl_config &= ~NVME_CC_SHN_MASK; dev->ctrl_config |= NVME_CC_ENABLE; - writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); + writel(dev->ctrl_config, &dev->bar->cc); return nvme_wait_ready(dev, true); } @@ -313,7 +313,7 @@ static int nvme_disable_ctrl(struct nvme_dev *dev) { dev->ctrl_config &= ~NVME_CC_SHN_MASK; dev->ctrl_config &= ~NVME_CC_ENABLE; - writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); + writel(dev->ctrl_config, &dev->bar->cc); return nvme_wait_ready(dev, false); } @@ -387,7 +387,6 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) aqa = nvmeq->q_depth - 1; aqa |= aqa << 16; - aqa |= aqa << 16; dev->page_size = 1 << page_shift; @@ -706,10 +705,9 @@ static int nvme_blk_probe(struct udevice *udev) if (!id) return -ENOMEM; - memset(ns, 0, sizeof(*ns)); ns->dev = ndev; /* extract the namespace id from the block device name */ - ns->ns_id = trailing_strtol(udev->name) + 1; + ns->ns_id = trailing_strtol(udev->name); if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) { free(id); return -EIO; @@ -719,11 +717,9 @@ static int nvme_blk_probe(struct udevice *udev) flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK; ns->flbas = flbas; ns->lba_shift = id->lbaf[flbas].ds; - ns->mode_select_num_blocks = le64_to_cpu(id->nsze); - ns->mode_select_block_len = 1 << ns->lba_shift; list_add(&ns->list, &ndev->namespaces); - desc->lba = ns->mode_select_num_blocks; + desc->lba = le64_to_cpu(id->nsze); desc->log2blksz = ns->lba_shift; desc->blksz = 1 << ns->lba_shift; desc->bdev = udev; @@ -835,6 +831,7 @@ static int nvme_probe(struct udevice *udev) { int ret; struct nvme_dev *ndev = dev_get_priv(udev); + struct nvme_id_ns *id; ndev->instance = trailing_strtol(udev->name); @@ -879,8 +876,46 @@ static int nvme_probe(struct udevice *udev) nvme_get_info_from_identify(ndev); + /* Create a blk device for each namespace */ + + id = memalign(ndev->page_size, sizeof(struct nvme_id_ns)); + if (!id) { + ret = -ENOMEM; + goto free_queue; + } + + for (int i = 1; i <= ndev->nn; i++) { + struct udevice *ns_udev; + char name[20]; + + memset(id, 0, sizeof(*id)); + if (nvme_identify(ndev, i, 0, (dma_addr_t)(long)id)) { + ret = -EIO; + goto free_id; + } + + /* skip inactive namespace */ + if (!id->nsze) + continue; + + /* + * Encode the namespace id to the device name so that + * we can extract it when doing the probe. + */ + sprintf(name, "blk#%d", i); + + /* The real blksz and size will be set by nvme_blk_probe() */ + ret = blk_create_devicef(udev, "nvme-blk", name, IF_TYPE_NVME, + -1, 512, 0, &ns_udev); + if (ret) + goto free_id; + } + + free(id); return 0; +free_id: + free(id); free_queue: free((void *)ndev->queues); free_nvme: diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h index aa4b3bac67..c6aae4da5d 100644 --- a/drivers/nvme/nvme.h +++ b/drivers/nvme/nvme.h @@ -633,8 +633,6 @@ struct nvme_ns { int devnum; int lba_shift; u8 flbas; - u64 mode_select_num_blocks; - u32 mode_select_block_len; }; #endif /* __DRIVER_NVME_H__ */ diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c index c7231635e4..f2813aeef6 100644 --- a/drivers/pci/pcie_layerscape_ep.c +++ b/drivers/pci/pcie_layerscape_ep.c @@ -269,6 +269,10 @@ static int ls_pcie_ep_probe(struct udevice *dev) pcie->idx = ((unsigned long)pcie->dbi - PCIE_SYS_BASE_ADDR) / PCIE_CCSR_SIZE; + /* This controller is disabled by RCW */ + if (!is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx))) + return 0; + pcie->big_endian = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "big-endian"); diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c index 5e1502ed96..1793000ab5 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7790.c +++ b/drivers/pinctrl/renesas/pfc-r8a7790.c @@ -20,7 +20,7 @@ * All pins assigned to GPIO bank 3 can be used for SD interfaces in * which case they support both 3.3V and 1.8V signalling. */ -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_32(0, fn, sfx), \ PORT_GP_30(1, fn, sfx), \ PORT_GP_30(2, fn, sfx), \ @@ -28,6 +28,12 @@ PORT_GP_32(4, fn, sfx), \ PORT_GP_32(5, fn, sfx) +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP(IIC0_SDA, "AF15", fn), \ + PIN_NOGP(IIC0_SCL, "AG15", fn), \ + PIN_NOGP(IIC3_SDA, "AH15", fn), \ + PIN_NOGP(IIC3_SCL, "AJ15", fn) + enum { PINMUX_RESERVED = 0, @@ -1727,19 +1733,17 @@ static const u16 pinmux_data[] = { PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1), }; -/* R8A7790 has 6 banks with 32 GPIOs in each = 192 GPIOs */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) +/* + * Pins not associated with a GPIO port. + */ +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* Pins not associated with a GPIO port */ - SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15), - SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15), - SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15), - SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1867,6 +1871,86 @@ static const unsigned int avb_gmii_mux[] = { AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, AVB_COL_MARK, }; +/* - CAN0 ----------------------------------------------------------------- */ +static const unsigned int can0_data_pins[] = { + /* CAN0 RX */ + RCAR_GP_PIN(1, 17), + /* CAN0 TX */ + RCAR_GP_PIN(1, 19), +}; +static const unsigned int can0_data_mux[] = { + CAN0_RX_MARK, + CAN0_TX_MARK, +}; +static const unsigned int can0_data_b_pins[] = { + /* CAN0 RXB */ + RCAR_GP_PIN(4, 5), + /* CAN0 TXB */ + RCAR_GP_PIN(4, 4), +}; +static const unsigned int can0_data_b_mux[] = { + CAN0_RX_B_MARK, + CAN0_TX_B_MARK, +}; +static const unsigned int can0_data_c_pins[] = { + /* CAN0 RXC */ + RCAR_GP_PIN(4, 26), + /* CAN0 TXC */ + RCAR_GP_PIN(4, 23), +}; +static const unsigned int can0_data_c_mux[] = { + CAN0_RX_C_MARK, + CAN0_TX_C_MARK, +}; +static const unsigned int can0_data_d_pins[] = { + /* CAN0 RXD */ + RCAR_GP_PIN(4, 26), + /* CAN0 TXD */ + RCAR_GP_PIN(4, 18), +}; +static const unsigned int can0_data_d_mux[] = { + CAN0_RX_D_MARK, + CAN0_TX_D_MARK, +}; +/* - CAN1 ----------------------------------------------------------------- */ +static const unsigned int can1_data_pins[] = { + /* CAN1 RX */ + RCAR_GP_PIN(1, 22), + /* CAN1 TX */ + RCAR_GP_PIN(1, 18), +}; +static const unsigned int can1_data_mux[] = { + CAN1_RX_MARK, + CAN1_TX_MARK, +}; +static const unsigned int can1_data_b_pins[] = { + /* CAN1 RXB */ + RCAR_GP_PIN(4, 7), + /* CAN1 TXB */ + RCAR_GP_PIN(4, 6), +}; +static const unsigned int can1_data_b_mux[] = { + CAN1_RX_B_MARK, + CAN1_TX_B_MARK, +}; +/* - CAN Clock -------------------------------------------------------------- */ +static const unsigned int can_clk_pins[] = { + /* CLK */ + RCAR_GP_PIN(1, 21), +}; + +static const unsigned int can_clk_mux[] = { + CAN_CLK_MARK, +}; + +static const unsigned int can_clk_b_pins[] = { + /* CLK */ + RCAR_GP_PIN(4, 3), +}; + +static const unsigned int can_clk_b_mux[] = { + CAN_CLK_B_MARK, +}; /* - DU RGB ----------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2135,7 +2219,7 @@ static const unsigned int hscif1_ctrl_b_mux[] = { /* - I2C0 ------------------------------------------------------------------- */ static const unsigned int i2c0_pins[] = { /* SCL, SDA */ - PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15), + PIN_IIC0_SCL, PIN_IIC0_SDA, }; static const unsigned int i2c0_mux[] = { I2C0_SCL_MARK, I2C0_SDA_MARK, @@ -2201,7 +2285,7 @@ static const unsigned int i2c2_e_mux[] = { /* - I2C3 ------------------------------------------------------------------- */ static const unsigned int i2c3_pins[] = { /* SCL, SDA */ - PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15), + PIN_IIC3_SCL, PIN_IIC3_SDA, }; static const unsigned int i2c3_mux[] = { I2C3_SCL_MARK, I2C3_SDA_MARK, @@ -2209,7 +2293,7 @@ static const unsigned int i2c3_mux[] = { /* - IIC0 (I2C4) ------------------------------------------------------------ */ static const unsigned int iic0_pins[] = { /* SCL, SDA */ - PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15), + PIN_IIC0_SCL, PIN_IIC0_SDA, }; static const unsigned int iic0_mux[] = { IIC0_SCL_MARK, IIC0_SDA_MARK, @@ -2274,8 +2358,8 @@ static const unsigned int iic2_e_mux[] = { }; /* - IIC3 (I2C7) ------------------------------------------------------------ */ static const unsigned int iic3_pins[] = { -/* SCL, SDA */ - PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15), + /* SCL, SDA */ + PIN_IIC3_SCL, PIN_IIC3_SDA, }; static const unsigned int iic3_mux[] = { IIC3_SCL_MARK, IIC3_SDA_MARK, @@ -2309,6 +2393,8 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; + +#ifdef CONFIG_PINCTRL_PFC_R8A7790 /* - MLB+ ------------------------------------------------------------------- */ static const unsigned int mlb_3pin_pins[] = { RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), @@ -2316,6 +2402,8 @@ static const unsigned int mlb_3pin_pins[] = { static const unsigned int mlb_3pin_mux[] = { MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ + /* - MMCIF0 ----------------------------------------------------------------- */ static const unsigned int mmc0_data1_pins[] = { /* D[0] */ @@ -3607,6 +3695,13 @@ static const unsigned int usb1_pins[] = { static const unsigned int usb1_mux[] = { USB1_PWEN_MARK, USB1_OVC_MARK, }; +static const unsigned int usb1_pwen_pins[] = { + /* PWEN */ + RCAR_GP_PIN(5, 20), +}; +static const unsigned int usb1_pwen_mux[] = { + USB1_PWEN_MARK, +}; /* - USB2 ------------------------------------------------------------------- */ static const unsigned int usb2_pins[] = { /* PWEN, OVC */ @@ -3775,6 +3870,72 @@ static const unsigned int vin1_data18_mux[] = { VI1_R4_MARK, VI1_R5_MARK, VI1_R6_MARK, VI1_R7_MARK, }; +static const union vin_data vin1_data_b_pins = { + .data24 = { + /* B */ + RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + /* G */ + RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), + /* R */ + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), + RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), + }, +}; +static const union vin_data vin1_data_b_mux = { + .data24 = { + /* B */ + VI1_DATA0_VI1_B0_B_MARK, VI1_DATA1_VI1_B1_B_MARK, + VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK, + VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK, + VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK, + /* G */ + VI1_G0_B_MARK, VI1_G1_B_MARK, + VI1_G2_B_MARK, VI1_G3_B_MARK, + VI1_G4_B_MARK, VI1_G5_B_MARK, + VI1_G6_B_MARK, VI1_G7_B_MARK, + /* R */ + VI1_R0_B_MARK, VI1_R1_B_MARK, + VI1_R2_B_MARK, VI1_R3_B_MARK, + VI1_R4_B_MARK, VI1_R5_B_MARK, + VI1_R6_B_MARK, VI1_R7_B_MARK, + }, +}; +static const unsigned int vin1_data18_b_pins[] = { + /* B */ + RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), + RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), + RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7), + /* G */ + RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), + RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), + /* R */ + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), + RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), + RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), +}; +static const unsigned int vin1_data18_b_mux[] = { + /* B */ + VI1_DATA2_VI1_B2_B_MARK, VI1_DATA3_VI1_B3_B_MARK, + VI1_DATA4_VI1_B4_B_MARK, VI1_DATA5_VI1_B5_B_MARK, + VI1_DATA6_VI1_B6_B_MARK, VI1_DATA7_VI1_B7_B_MARK, + /* G */ + VI1_G2_B_MARK, VI1_G3_B_MARK, + VI1_G4_B_MARK, VI1_G5_B_MARK, + VI1_G6_B_MARK, VI1_G7_B_MARK, + /* R */ + VI1_R2_B_MARK, VI1_R3_B_MARK, + VI1_R4_B_MARK, VI1_R5_B_MARK, + VI1_R6_B_MARK, VI1_R7_B_MARK, +}; static const unsigned int vin1_sync_pins[] = { RCAR_GP_PIN(1, 24), /* HSYNC */ RCAR_GP_PIN(1, 25), /* VSYNC */ @@ -3783,24 +3944,50 @@ static const unsigned int vin1_sync_mux[] = { VI1_HSYNC_N_MARK, VI1_VSYNC_N_MARK, }; +static const unsigned int vin1_sync_b_pins[] = { + RCAR_GP_PIN(1, 24), /* HSYNC */ + RCAR_GP_PIN(1, 25), /* VSYNC */ +}; +static const unsigned int vin1_sync_b_mux[] = { + VI1_HSYNC_N_B_MARK, + VI1_VSYNC_N_B_MARK, +}; static const unsigned int vin1_field_pins[] = { RCAR_GP_PIN(1, 13), }; static const unsigned int vin1_field_mux[] = { VI1_FIELD_MARK, }; +static const unsigned int vin1_field_b_pins[] = { + RCAR_GP_PIN(1, 13), +}; +static const unsigned int vin1_field_b_mux[] = { + VI1_FIELD_B_MARK, +}; static const unsigned int vin1_clkenb_pins[] = { RCAR_GP_PIN(1, 26), }; static const unsigned int vin1_clkenb_mux[] = { VI1_CLKENB_MARK, }; +static const unsigned int vin1_clkenb_b_pins[] = { + RCAR_GP_PIN(1, 26), +}; +static const unsigned int vin1_clkenb_b_mux[] = { + VI1_CLKENB_B_MARK, +}; static const unsigned int vin1_clk_pins[] = { RCAR_GP_PIN(2, 9), }; static const unsigned int vin1_clk_mux[] = { VI1_CLK_MARK, }; +static const unsigned int vin1_clk_b_pins[] = { + RCAR_GP_PIN(3, 15), +}; +static const unsigned int vin1_clk_b_mux[] = { + VI1_CLK_B_MARK, +}; /* - VIN2 ----------------------------------------------------------------- */ static const union vin_data vin2_data_pins = { .data24 = { @@ -3868,6 +4055,18 @@ static const unsigned int vin2_data18_mux[] = { VI2_R4_MARK, VI2_R5_MARK, VI2_R6_MARK, VI2_R7_MARK, }; +static const unsigned int vin2_g8_pins[] = { + RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), + RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 10), + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 5), + RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7), +}; +static const unsigned int vin2_g8_mux[] = { + VI2_G0_MARK, VI2_G1_MARK, + VI2_G2_MARK, VI2_G3_MARK, + VI2_G4_MARK, VI2_G5_MARK, + VI2_G6_MARK, VI2_G7_MARK, +}; static const unsigned int vin2_sync_pins[] = { RCAR_GP_PIN(1, 16), /* HSYNC */ RCAR_GP_PIN(1, 21), /* VSYNC */ @@ -3934,297 +4133,330 @@ static const unsigned int vin3_clk_mux[] = { VI3_CLK_MARK, }; -static const struct sh_pfc_pin_group pinmux_groups[] = { - SH_PFC_PIN_GROUP(audio_clk_a), - SH_PFC_PIN_GROUP(audio_clk_b), - SH_PFC_PIN_GROUP(audio_clk_c), - SH_PFC_PIN_GROUP(audio_clkout), - SH_PFC_PIN_GROUP(audio_clkout_b), - SH_PFC_PIN_GROUP(audio_clkout_c), - SH_PFC_PIN_GROUP(audio_clkout_d), - SH_PFC_PIN_GROUP(avb_link), - SH_PFC_PIN_GROUP(avb_magic), - SH_PFC_PIN_GROUP(avb_phy_int), - SH_PFC_PIN_GROUP(avb_mdio), - SH_PFC_PIN_GROUP(avb_mii), - SH_PFC_PIN_GROUP(avb_gmii), - SH_PFC_PIN_GROUP(du_rgb666), - SH_PFC_PIN_GROUP(du_rgb888), - SH_PFC_PIN_GROUP(du_clk_out_0), - SH_PFC_PIN_GROUP(du_clk_out_1), - SH_PFC_PIN_GROUP(du_sync_0), - SH_PFC_PIN_GROUP(du_sync_1), - SH_PFC_PIN_GROUP(du_cde), - SH_PFC_PIN_GROUP(du0_clk_in), - SH_PFC_PIN_GROUP(du1_clk_in), - SH_PFC_PIN_GROUP(du2_clk_in), - SH_PFC_PIN_GROUP(eth_link), - SH_PFC_PIN_GROUP(eth_magic), - SH_PFC_PIN_GROUP(eth_mdio), - SH_PFC_PIN_GROUP(eth_rmii), - SH_PFC_PIN_GROUP(hscif0_data), - SH_PFC_PIN_GROUP(hscif0_clk), - SH_PFC_PIN_GROUP(hscif0_ctrl), - SH_PFC_PIN_GROUP(hscif0_data_b), - SH_PFC_PIN_GROUP(hscif0_ctrl_b), - SH_PFC_PIN_GROUP(hscif0_data_c), - SH_PFC_PIN_GROUP(hscif0_ctrl_c), - SH_PFC_PIN_GROUP(hscif0_data_d), - SH_PFC_PIN_GROUP(hscif0_ctrl_d), - SH_PFC_PIN_GROUP(hscif0_data_e), - SH_PFC_PIN_GROUP(hscif0_ctrl_e), - SH_PFC_PIN_GROUP(hscif0_data_f), - SH_PFC_PIN_GROUP(hscif0_ctrl_f), - SH_PFC_PIN_GROUP(hscif1_data), - SH_PFC_PIN_GROUP(hscif1_clk), - SH_PFC_PIN_GROUP(hscif1_ctrl), - SH_PFC_PIN_GROUP(hscif1_data_b), - SH_PFC_PIN_GROUP(hscif1_clk_b), - SH_PFC_PIN_GROUP(hscif1_ctrl_b), - SH_PFC_PIN_GROUP(i2c0), - SH_PFC_PIN_GROUP(i2c1), - SH_PFC_PIN_GROUP(i2c1_b), - SH_PFC_PIN_GROUP(i2c1_c), - SH_PFC_PIN_GROUP(i2c2), - SH_PFC_PIN_GROUP(i2c2_b), - SH_PFC_PIN_GROUP(i2c2_c), - SH_PFC_PIN_GROUP(i2c2_d), - SH_PFC_PIN_GROUP(i2c2_e), - SH_PFC_PIN_GROUP(i2c3), - SH_PFC_PIN_GROUP(iic0), - SH_PFC_PIN_GROUP(iic1), - SH_PFC_PIN_GROUP(iic1_b), - SH_PFC_PIN_GROUP(iic1_c), - SH_PFC_PIN_GROUP(iic2), - SH_PFC_PIN_GROUP(iic2_b), - SH_PFC_PIN_GROUP(iic2_c), - SH_PFC_PIN_GROUP(iic2_d), - SH_PFC_PIN_GROUP(iic2_e), - SH_PFC_PIN_GROUP(iic3), - SH_PFC_PIN_GROUP(intc_irq0), - SH_PFC_PIN_GROUP(intc_irq1), - SH_PFC_PIN_GROUP(intc_irq2), - SH_PFC_PIN_GROUP(intc_irq3), - SH_PFC_PIN_GROUP(mlb_3pin), - SH_PFC_PIN_GROUP(mmc0_data1), - SH_PFC_PIN_GROUP(mmc0_data4), - SH_PFC_PIN_GROUP(mmc0_data8), - SH_PFC_PIN_GROUP(mmc0_ctrl), - SH_PFC_PIN_GROUP(mmc1_data1), - SH_PFC_PIN_GROUP(mmc1_data4), - SH_PFC_PIN_GROUP(mmc1_data8), - SH_PFC_PIN_GROUP(mmc1_ctrl), - SH_PFC_PIN_GROUP(msiof0_clk), - SH_PFC_PIN_GROUP(msiof0_sync), - SH_PFC_PIN_GROUP(msiof0_ss1), - SH_PFC_PIN_GROUP(msiof0_ss2), - SH_PFC_PIN_GROUP(msiof0_rx), - SH_PFC_PIN_GROUP(msiof0_tx), - SH_PFC_PIN_GROUP(msiof0_clk_b), - SH_PFC_PIN_GROUP(msiof0_ss1_b), - SH_PFC_PIN_GROUP(msiof0_ss2_b), - SH_PFC_PIN_GROUP(msiof0_rx_b), - SH_PFC_PIN_GROUP(msiof0_tx_b), - SH_PFC_PIN_GROUP(msiof1_clk), - SH_PFC_PIN_GROUP(msiof1_sync), - SH_PFC_PIN_GROUP(msiof1_ss1), - SH_PFC_PIN_GROUP(msiof1_ss2), - SH_PFC_PIN_GROUP(msiof1_rx), - SH_PFC_PIN_GROUP(msiof1_tx), - SH_PFC_PIN_GROUP(msiof1_clk_b), - SH_PFC_PIN_GROUP(msiof1_ss1_b), - SH_PFC_PIN_GROUP(msiof1_ss2_b), - SH_PFC_PIN_GROUP(msiof1_rx_b), - SH_PFC_PIN_GROUP(msiof1_tx_b), - SH_PFC_PIN_GROUP(msiof2_clk), - SH_PFC_PIN_GROUP(msiof2_sync), - SH_PFC_PIN_GROUP(msiof2_ss1), - SH_PFC_PIN_GROUP(msiof2_ss2), - SH_PFC_PIN_GROUP(msiof2_rx), - SH_PFC_PIN_GROUP(msiof2_tx), - SH_PFC_PIN_GROUP(msiof3_clk), - SH_PFC_PIN_GROUP(msiof3_sync), - SH_PFC_PIN_GROUP(msiof3_ss1), - SH_PFC_PIN_GROUP(msiof3_ss2), - SH_PFC_PIN_GROUP(msiof3_rx), - SH_PFC_PIN_GROUP(msiof3_tx), - SH_PFC_PIN_GROUP(msiof3_clk_b), - SH_PFC_PIN_GROUP(msiof3_sync_b), - SH_PFC_PIN_GROUP(msiof3_rx_b), - SH_PFC_PIN_GROUP(msiof3_tx_b), - SH_PFC_PIN_GROUP(pwm0), - SH_PFC_PIN_GROUP(pwm0_b), - SH_PFC_PIN_GROUP(pwm1), - SH_PFC_PIN_GROUP(pwm1_b), - SH_PFC_PIN_GROUP(pwm2), - SH_PFC_PIN_GROUP(pwm3), - SH_PFC_PIN_GROUP(pwm4), - SH_PFC_PIN_GROUP(pwm5), - SH_PFC_PIN_GROUP(pwm6), - SH_PFC_PIN_GROUP(qspi_ctrl), - SH_PFC_PIN_GROUP(qspi_data2), - SH_PFC_PIN_GROUP(qspi_data4), - SH_PFC_PIN_GROUP(scif0_data), - SH_PFC_PIN_GROUP(scif0_clk), - SH_PFC_PIN_GROUP(scif0_ctrl), - SH_PFC_PIN_GROUP(scif0_data_b), - SH_PFC_PIN_GROUP(scif1_data), - SH_PFC_PIN_GROUP(scif1_clk), - SH_PFC_PIN_GROUP(scif1_ctrl), - SH_PFC_PIN_GROUP(scif1_data_b), - SH_PFC_PIN_GROUP(scif1_data_c), - SH_PFC_PIN_GROUP(scif1_data_d), - SH_PFC_PIN_GROUP(scif1_clk_d), - SH_PFC_PIN_GROUP(scif1_data_e), - SH_PFC_PIN_GROUP(scif1_clk_e), - SH_PFC_PIN_GROUP(scif2_data), - SH_PFC_PIN_GROUP(scif2_clk), - SH_PFC_PIN_GROUP(scif2_data_b), - SH_PFC_PIN_GROUP(scifa0_data), - SH_PFC_PIN_GROUP(scifa0_clk), - SH_PFC_PIN_GROUP(scifa0_ctrl), - SH_PFC_PIN_GROUP(scifa0_data_b), - SH_PFC_PIN_GROUP(scifa0_clk_b), - SH_PFC_PIN_GROUP(scifa0_ctrl_b), - SH_PFC_PIN_GROUP(scifa1_data), - SH_PFC_PIN_GROUP(scifa1_clk), - SH_PFC_PIN_GROUP(scifa1_ctrl), - SH_PFC_PIN_GROUP(scifa1_data_b), - SH_PFC_PIN_GROUP(scifa1_clk_b), - SH_PFC_PIN_GROUP(scifa1_ctrl_b), - SH_PFC_PIN_GROUP(scifa1_data_c), - SH_PFC_PIN_GROUP(scifa1_clk_c), - SH_PFC_PIN_GROUP(scifa1_ctrl_c), - SH_PFC_PIN_GROUP(scifa1_data_d), - SH_PFC_PIN_GROUP(scifa1_clk_d), - SH_PFC_PIN_GROUP(scifa1_ctrl_d), - SH_PFC_PIN_GROUP(scifa2_data), - SH_PFC_PIN_GROUP(scifa2_clk), - SH_PFC_PIN_GROUP(scifa2_ctrl), - SH_PFC_PIN_GROUP(scifa2_data_b), - SH_PFC_PIN_GROUP(scifa2_data_c), - SH_PFC_PIN_GROUP(scifa2_clk_c), - SH_PFC_PIN_GROUP(scifb0_data), - SH_PFC_PIN_GROUP(scifb0_clk), - SH_PFC_PIN_GROUP(scifb0_ctrl), - SH_PFC_PIN_GROUP(scifb0_data_b), - SH_PFC_PIN_GROUP(scifb0_clk_b), - SH_PFC_PIN_GROUP(scifb0_ctrl_b), - SH_PFC_PIN_GROUP(scifb0_data_c), - SH_PFC_PIN_GROUP(scifb1_data), - SH_PFC_PIN_GROUP(scifb1_clk), - SH_PFC_PIN_GROUP(scifb1_ctrl), - SH_PFC_PIN_GROUP(scifb1_data_b), - SH_PFC_PIN_GROUP(scifb1_clk_b), - SH_PFC_PIN_GROUP(scifb1_ctrl_b), - SH_PFC_PIN_GROUP(scifb1_data_c), - SH_PFC_PIN_GROUP(scifb1_data_d), - SH_PFC_PIN_GROUP(scifb1_data_e), - SH_PFC_PIN_GROUP(scifb1_clk_e), - SH_PFC_PIN_GROUP(scifb1_data_f), - SH_PFC_PIN_GROUP(scifb1_data_g), - SH_PFC_PIN_GROUP(scifb1_clk_g), - SH_PFC_PIN_GROUP(scifb2_data), - SH_PFC_PIN_GROUP(scifb2_clk), - SH_PFC_PIN_GROUP(scifb2_ctrl), - SH_PFC_PIN_GROUP(scifb2_data_b), - SH_PFC_PIN_GROUP(scifb2_clk_b), - SH_PFC_PIN_GROUP(scifb2_ctrl_b), - SH_PFC_PIN_GROUP(scifb2_data_c), - SH_PFC_PIN_GROUP(scif_clk), - SH_PFC_PIN_GROUP(scif_clk_b), - SH_PFC_PIN_GROUP(sdhi0_data1), - SH_PFC_PIN_GROUP(sdhi0_data4), - SH_PFC_PIN_GROUP(sdhi0_ctrl), - SH_PFC_PIN_GROUP(sdhi0_cd), - SH_PFC_PIN_GROUP(sdhi0_wp), - SH_PFC_PIN_GROUP(sdhi1_data1), - SH_PFC_PIN_GROUP(sdhi1_data4), - SH_PFC_PIN_GROUP(sdhi1_ctrl), - SH_PFC_PIN_GROUP(sdhi1_cd), - SH_PFC_PIN_GROUP(sdhi1_wp), - SH_PFC_PIN_GROUP(sdhi2_data1), - SH_PFC_PIN_GROUP(sdhi2_data4), - SH_PFC_PIN_GROUP(sdhi2_ctrl), - SH_PFC_PIN_GROUP(sdhi2_cd), - SH_PFC_PIN_GROUP(sdhi2_wp), - SH_PFC_PIN_GROUP(sdhi3_data1), - SH_PFC_PIN_GROUP(sdhi3_data4), - SH_PFC_PIN_GROUP(sdhi3_ctrl), - SH_PFC_PIN_GROUP(sdhi3_cd), - SH_PFC_PIN_GROUP(sdhi3_wp), - SH_PFC_PIN_GROUP(ssi0_data), - SH_PFC_PIN_GROUP(ssi0129_ctrl), - SH_PFC_PIN_GROUP(ssi1_data), - SH_PFC_PIN_GROUP(ssi1_ctrl), - SH_PFC_PIN_GROUP(ssi2_data), - SH_PFC_PIN_GROUP(ssi2_ctrl), - SH_PFC_PIN_GROUP(ssi3_data), - SH_PFC_PIN_GROUP(ssi34_ctrl), - SH_PFC_PIN_GROUP(ssi4_data), - SH_PFC_PIN_GROUP(ssi4_ctrl), - SH_PFC_PIN_GROUP(ssi5), - SH_PFC_PIN_GROUP(ssi5_b), - SH_PFC_PIN_GROUP(ssi5_c), - SH_PFC_PIN_GROUP(ssi6), - SH_PFC_PIN_GROUP(ssi6_b), - SH_PFC_PIN_GROUP(ssi7_data), - SH_PFC_PIN_GROUP(ssi7_b_data), - SH_PFC_PIN_GROUP(ssi7_c_data), - SH_PFC_PIN_GROUP(ssi78_ctrl), - SH_PFC_PIN_GROUP(ssi78_b_ctrl), - SH_PFC_PIN_GROUP(ssi78_c_ctrl), - SH_PFC_PIN_GROUP(ssi8_data), - SH_PFC_PIN_GROUP(ssi8_b_data), - SH_PFC_PIN_GROUP(ssi8_c_data), - SH_PFC_PIN_GROUP(ssi9_data), - SH_PFC_PIN_GROUP(ssi9_ctrl), - SH_PFC_PIN_GROUP(tpu0_to0), - SH_PFC_PIN_GROUP(tpu0_to1), - SH_PFC_PIN_GROUP(tpu0_to2), - SH_PFC_PIN_GROUP(tpu0_to3), - SH_PFC_PIN_GROUP(usb0), - SH_PFC_PIN_GROUP(usb0_ovc_vbus), - SH_PFC_PIN_GROUP(usb1), - SH_PFC_PIN_GROUP(usb2), - VIN_DATA_PIN_GROUP(vin0_data, 24), - VIN_DATA_PIN_GROUP(vin0_data, 20), - SH_PFC_PIN_GROUP(vin0_data18), - VIN_DATA_PIN_GROUP(vin0_data, 16), - VIN_DATA_PIN_GROUP(vin0_data, 12), - VIN_DATA_PIN_GROUP(vin0_data, 10), - VIN_DATA_PIN_GROUP(vin0_data, 8), - VIN_DATA_PIN_GROUP(vin0_data, 4), - SH_PFC_PIN_GROUP(vin0_sync), - SH_PFC_PIN_GROUP(vin0_field), - SH_PFC_PIN_GROUP(vin0_clkenb), - SH_PFC_PIN_GROUP(vin0_clk), - VIN_DATA_PIN_GROUP(vin1_data, 24), - VIN_DATA_PIN_GROUP(vin1_data, 20), - SH_PFC_PIN_GROUP(vin1_data18), - VIN_DATA_PIN_GROUP(vin1_data, 16), - VIN_DATA_PIN_GROUP(vin1_data, 12), - VIN_DATA_PIN_GROUP(vin1_data, 10), - VIN_DATA_PIN_GROUP(vin1_data, 8), - VIN_DATA_PIN_GROUP(vin1_data, 4), - SH_PFC_PIN_GROUP(vin1_sync), - SH_PFC_PIN_GROUP(vin1_field), - SH_PFC_PIN_GROUP(vin1_clkenb), - SH_PFC_PIN_GROUP(vin1_clk), - VIN_DATA_PIN_GROUP(vin2_data, 24), - SH_PFC_PIN_GROUP(vin2_data18), - VIN_DATA_PIN_GROUP(vin2_data, 16), - VIN_DATA_PIN_GROUP(vin2_data, 8), - VIN_DATA_PIN_GROUP(vin2_data, 4), - SH_PFC_PIN_GROUP(vin2_sync), - SH_PFC_PIN_GROUP(vin2_field), - SH_PFC_PIN_GROUP(vin2_clkenb), - SH_PFC_PIN_GROUP(vin2_clk), - SH_PFC_PIN_GROUP(vin3_data8), - SH_PFC_PIN_GROUP(vin3_sync), - SH_PFC_PIN_GROUP(vin3_field), - SH_PFC_PIN_GROUP(vin3_clkenb), - SH_PFC_PIN_GROUP(vin3_clk), +static const struct { + struct sh_pfc_pin_group common[311]; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + struct sh_pfc_pin_group automotive[1]; +#endif +} pinmux_groups = { + .common = { + SH_PFC_PIN_GROUP(audio_clk_a), + SH_PFC_PIN_GROUP(audio_clk_b), + SH_PFC_PIN_GROUP(audio_clk_c), + SH_PFC_PIN_GROUP(audio_clkout), + SH_PFC_PIN_GROUP(audio_clkout_b), + SH_PFC_PIN_GROUP(audio_clkout_c), + SH_PFC_PIN_GROUP(audio_clkout_d), + SH_PFC_PIN_GROUP(avb_link), + SH_PFC_PIN_GROUP(avb_magic), + SH_PFC_PIN_GROUP(avb_phy_int), + SH_PFC_PIN_GROUP(avb_mdio), + SH_PFC_PIN_GROUP(avb_mii), + SH_PFC_PIN_GROUP(avb_gmii), + SH_PFC_PIN_GROUP(can0_data), + SH_PFC_PIN_GROUP(can0_data_b), + SH_PFC_PIN_GROUP(can0_data_c), + SH_PFC_PIN_GROUP(can0_data_d), + SH_PFC_PIN_GROUP(can1_data), + SH_PFC_PIN_GROUP(can1_data_b), + SH_PFC_PIN_GROUP(can_clk), + SH_PFC_PIN_GROUP(can_clk_b), + SH_PFC_PIN_GROUP(du_rgb666), + SH_PFC_PIN_GROUP(du_rgb888), + SH_PFC_PIN_GROUP(du_clk_out_0), + SH_PFC_PIN_GROUP(du_clk_out_1), + SH_PFC_PIN_GROUP(du_sync_0), + SH_PFC_PIN_GROUP(du_sync_1), + SH_PFC_PIN_GROUP(du_cde), + SH_PFC_PIN_GROUP(du0_clk_in), + SH_PFC_PIN_GROUP(du1_clk_in), + SH_PFC_PIN_GROUP(du2_clk_in), + SH_PFC_PIN_GROUP(eth_link), + SH_PFC_PIN_GROUP(eth_magic), + SH_PFC_PIN_GROUP(eth_mdio), + SH_PFC_PIN_GROUP(eth_rmii), + SH_PFC_PIN_GROUP(hscif0_data), + SH_PFC_PIN_GROUP(hscif0_clk), + SH_PFC_PIN_GROUP(hscif0_ctrl), + SH_PFC_PIN_GROUP(hscif0_data_b), + SH_PFC_PIN_GROUP(hscif0_ctrl_b), + SH_PFC_PIN_GROUP(hscif0_data_c), + SH_PFC_PIN_GROUP(hscif0_ctrl_c), + SH_PFC_PIN_GROUP(hscif0_data_d), + SH_PFC_PIN_GROUP(hscif0_ctrl_d), + SH_PFC_PIN_GROUP(hscif0_data_e), + SH_PFC_PIN_GROUP(hscif0_ctrl_e), + SH_PFC_PIN_GROUP(hscif0_data_f), + SH_PFC_PIN_GROUP(hscif0_ctrl_f), + SH_PFC_PIN_GROUP(hscif1_data), + SH_PFC_PIN_GROUP(hscif1_clk), + SH_PFC_PIN_GROUP(hscif1_ctrl), + SH_PFC_PIN_GROUP(hscif1_data_b), + SH_PFC_PIN_GROUP(hscif1_clk_b), + SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(i2c0), + SH_PFC_PIN_GROUP(i2c1), + SH_PFC_PIN_GROUP(i2c1_b), + SH_PFC_PIN_GROUP(i2c1_c), + SH_PFC_PIN_GROUP(i2c2), + SH_PFC_PIN_GROUP(i2c2_b), + SH_PFC_PIN_GROUP(i2c2_c), + SH_PFC_PIN_GROUP(i2c2_d), + SH_PFC_PIN_GROUP(i2c2_e), + SH_PFC_PIN_GROUP(i2c3), + SH_PFC_PIN_GROUP(iic0), + SH_PFC_PIN_GROUP(iic1), + SH_PFC_PIN_GROUP(iic1_b), + SH_PFC_PIN_GROUP(iic1_c), + SH_PFC_PIN_GROUP(iic2), + SH_PFC_PIN_GROUP(iic2_b), + SH_PFC_PIN_GROUP(iic2_c), + SH_PFC_PIN_GROUP(iic2_d), + SH_PFC_PIN_GROUP(iic2_e), + SH_PFC_PIN_GROUP(iic3), + SH_PFC_PIN_GROUP(intc_irq0), + SH_PFC_PIN_GROUP(intc_irq1), + SH_PFC_PIN_GROUP(intc_irq2), + SH_PFC_PIN_GROUP(intc_irq3), + SH_PFC_PIN_GROUP(mmc0_data1), + SH_PFC_PIN_GROUP(mmc0_data4), + SH_PFC_PIN_GROUP(mmc0_data8), + SH_PFC_PIN_GROUP(mmc0_ctrl), + SH_PFC_PIN_GROUP(mmc1_data1), + SH_PFC_PIN_GROUP(mmc1_data4), + SH_PFC_PIN_GROUP(mmc1_data8), + SH_PFC_PIN_GROUP(mmc1_ctrl), + SH_PFC_PIN_GROUP(msiof0_clk), + SH_PFC_PIN_GROUP(msiof0_sync), + SH_PFC_PIN_GROUP(msiof0_ss1), + SH_PFC_PIN_GROUP(msiof0_ss2), + SH_PFC_PIN_GROUP(msiof0_rx), + SH_PFC_PIN_GROUP(msiof0_tx), + SH_PFC_PIN_GROUP(msiof0_clk_b), + SH_PFC_PIN_GROUP(msiof0_ss1_b), + SH_PFC_PIN_GROUP(msiof0_ss2_b), + SH_PFC_PIN_GROUP(msiof0_rx_b), + SH_PFC_PIN_GROUP(msiof0_tx_b), + SH_PFC_PIN_GROUP(msiof1_clk), + SH_PFC_PIN_GROUP(msiof1_sync), + SH_PFC_PIN_GROUP(msiof1_ss1), + SH_PFC_PIN_GROUP(msiof1_ss2), + SH_PFC_PIN_GROUP(msiof1_rx), + SH_PFC_PIN_GROUP(msiof1_tx), + SH_PFC_PIN_GROUP(msiof1_clk_b), + SH_PFC_PIN_GROUP(msiof1_ss1_b), + SH_PFC_PIN_GROUP(msiof1_ss2_b), + SH_PFC_PIN_GROUP(msiof1_rx_b), + SH_PFC_PIN_GROUP(msiof1_tx_b), + SH_PFC_PIN_GROUP(msiof2_clk), + SH_PFC_PIN_GROUP(msiof2_sync), + SH_PFC_PIN_GROUP(msiof2_ss1), + SH_PFC_PIN_GROUP(msiof2_ss2), + SH_PFC_PIN_GROUP(msiof2_rx), + SH_PFC_PIN_GROUP(msiof2_tx), + SH_PFC_PIN_GROUP(msiof3_clk), + SH_PFC_PIN_GROUP(msiof3_sync), + SH_PFC_PIN_GROUP(msiof3_ss1), + SH_PFC_PIN_GROUP(msiof3_ss2), + SH_PFC_PIN_GROUP(msiof3_rx), + SH_PFC_PIN_GROUP(msiof3_tx), + SH_PFC_PIN_GROUP(msiof3_clk_b), + SH_PFC_PIN_GROUP(msiof3_sync_b), + SH_PFC_PIN_GROUP(msiof3_rx_b), + SH_PFC_PIN_GROUP(msiof3_tx_b), + SH_PFC_PIN_GROUP(pwm0), + SH_PFC_PIN_GROUP(pwm0_b), + SH_PFC_PIN_GROUP(pwm1), + SH_PFC_PIN_GROUP(pwm1_b), + SH_PFC_PIN_GROUP(pwm2), + SH_PFC_PIN_GROUP(pwm3), + SH_PFC_PIN_GROUP(pwm4), + SH_PFC_PIN_GROUP(pwm5), + SH_PFC_PIN_GROUP(pwm6), + SH_PFC_PIN_GROUP(qspi_ctrl), + SH_PFC_PIN_GROUP(qspi_data2), + SH_PFC_PIN_GROUP(qspi_data4), + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif0_data_b), + SH_PFC_PIN_GROUP(scif1_data), + SH_PFC_PIN_GROUP(scif1_clk), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif1_data_c), + SH_PFC_PIN_GROUP(scif1_data_d), + SH_PFC_PIN_GROUP(scif1_clk_d), + SH_PFC_PIN_GROUP(scif1_data_e), + SH_PFC_PIN_GROUP(scif1_clk_e), + SH_PFC_PIN_GROUP(scif2_data), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif2_data_b), + SH_PFC_PIN_GROUP(scifa0_data), + SH_PFC_PIN_GROUP(scifa0_clk), + SH_PFC_PIN_GROUP(scifa0_ctrl), + SH_PFC_PIN_GROUP(scifa0_data_b), + SH_PFC_PIN_GROUP(scifa0_clk_b), + SH_PFC_PIN_GROUP(scifa0_ctrl_b), + SH_PFC_PIN_GROUP(scifa1_data), + SH_PFC_PIN_GROUP(scifa1_clk), + SH_PFC_PIN_GROUP(scifa1_ctrl), + SH_PFC_PIN_GROUP(scifa1_data_b), + SH_PFC_PIN_GROUP(scifa1_clk_b), + SH_PFC_PIN_GROUP(scifa1_ctrl_b), + SH_PFC_PIN_GROUP(scifa1_data_c), + SH_PFC_PIN_GROUP(scifa1_clk_c), + SH_PFC_PIN_GROUP(scifa1_ctrl_c), + SH_PFC_PIN_GROUP(scifa1_data_d), + SH_PFC_PIN_GROUP(scifa1_clk_d), + SH_PFC_PIN_GROUP(scifa1_ctrl_d), + SH_PFC_PIN_GROUP(scifa2_data), + SH_PFC_PIN_GROUP(scifa2_clk), + SH_PFC_PIN_GROUP(scifa2_ctrl), + SH_PFC_PIN_GROUP(scifa2_data_b), + SH_PFC_PIN_GROUP(scifa2_data_c), + SH_PFC_PIN_GROUP(scifa2_clk_c), + SH_PFC_PIN_GROUP(scifb0_data), + SH_PFC_PIN_GROUP(scifb0_clk), + SH_PFC_PIN_GROUP(scifb0_ctrl), + SH_PFC_PIN_GROUP(scifb0_data_b), + SH_PFC_PIN_GROUP(scifb0_clk_b), + SH_PFC_PIN_GROUP(scifb0_ctrl_b), + SH_PFC_PIN_GROUP(scifb0_data_c), + SH_PFC_PIN_GROUP(scifb1_data), + SH_PFC_PIN_GROUP(scifb1_clk), + SH_PFC_PIN_GROUP(scifb1_ctrl), + SH_PFC_PIN_GROUP(scifb1_data_b), + SH_PFC_PIN_GROUP(scifb1_clk_b), + SH_PFC_PIN_GROUP(scifb1_ctrl_b), + SH_PFC_PIN_GROUP(scifb1_data_c), + SH_PFC_PIN_GROUP(scifb1_data_d), + SH_PFC_PIN_GROUP(scifb1_data_e), + SH_PFC_PIN_GROUP(scifb1_clk_e), + SH_PFC_PIN_GROUP(scifb1_data_f), + SH_PFC_PIN_GROUP(scifb1_data_g), + SH_PFC_PIN_GROUP(scifb1_clk_g), + SH_PFC_PIN_GROUP(scifb2_data), + SH_PFC_PIN_GROUP(scifb2_clk), + SH_PFC_PIN_GROUP(scifb2_ctrl), + SH_PFC_PIN_GROUP(scifb2_data_b), + SH_PFC_PIN_GROUP(scifb2_clk_b), + SH_PFC_PIN_GROUP(scifb2_ctrl_b), + SH_PFC_PIN_GROUP(scifb2_data_c), + SH_PFC_PIN_GROUP(scif_clk), + SH_PFC_PIN_GROUP(scif_clk_b), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd), + SH_PFC_PIN_GROUP(sdhi2_wp), + SH_PFC_PIN_GROUP(sdhi3_data1), + SH_PFC_PIN_GROUP(sdhi3_data4), + SH_PFC_PIN_GROUP(sdhi3_ctrl), + SH_PFC_PIN_GROUP(sdhi3_cd), + SH_PFC_PIN_GROUP(sdhi3_wp), + SH_PFC_PIN_GROUP(ssi0_data), + SH_PFC_PIN_GROUP(ssi0129_ctrl), + SH_PFC_PIN_GROUP(ssi1_data), + SH_PFC_PIN_GROUP(ssi1_ctrl), + SH_PFC_PIN_GROUP(ssi2_data), + SH_PFC_PIN_GROUP(ssi2_ctrl), + SH_PFC_PIN_GROUP(ssi3_data), + SH_PFC_PIN_GROUP(ssi34_ctrl), + SH_PFC_PIN_GROUP(ssi4_data), + SH_PFC_PIN_GROUP(ssi4_ctrl), + SH_PFC_PIN_GROUP(ssi5), + SH_PFC_PIN_GROUP(ssi5_b), + SH_PFC_PIN_GROUP(ssi5_c), + SH_PFC_PIN_GROUP(ssi6), + SH_PFC_PIN_GROUP(ssi6_b), + SH_PFC_PIN_GROUP(ssi7_data), + SH_PFC_PIN_GROUP(ssi7_b_data), + SH_PFC_PIN_GROUP(ssi7_c_data), + SH_PFC_PIN_GROUP(ssi78_ctrl), + SH_PFC_PIN_GROUP(ssi78_b_ctrl), + SH_PFC_PIN_GROUP(ssi78_c_ctrl), + SH_PFC_PIN_GROUP(ssi8_data), + SH_PFC_PIN_GROUP(ssi8_b_data), + SH_PFC_PIN_GROUP(ssi8_c_data), + SH_PFC_PIN_GROUP(ssi9_data), + SH_PFC_PIN_GROUP(ssi9_ctrl), + SH_PFC_PIN_GROUP(tpu0_to0), + SH_PFC_PIN_GROUP(tpu0_to1), + SH_PFC_PIN_GROUP(tpu0_to2), + SH_PFC_PIN_GROUP(tpu0_to3), + SH_PFC_PIN_GROUP(usb0), + SH_PFC_PIN_GROUP(usb0_ovc_vbus), + SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb1_pwen), + SH_PFC_PIN_GROUP(usb2), + VIN_DATA_PIN_GROUP(vin0_data, 24), + VIN_DATA_PIN_GROUP(vin0_data, 20), + SH_PFC_PIN_GROUP(vin0_data18), + VIN_DATA_PIN_GROUP(vin0_data, 16), + VIN_DATA_PIN_GROUP(vin0_data, 12), + VIN_DATA_PIN_GROUP(vin0_data, 10), + VIN_DATA_PIN_GROUP(vin0_data, 8), + VIN_DATA_PIN_GROUP(vin0_data, 4), + SH_PFC_PIN_GROUP(vin0_sync), + SH_PFC_PIN_GROUP(vin0_field), + SH_PFC_PIN_GROUP(vin0_clkenb), + SH_PFC_PIN_GROUP(vin0_clk), + VIN_DATA_PIN_GROUP(vin1_data, 24), + VIN_DATA_PIN_GROUP(vin1_data, 20), + SH_PFC_PIN_GROUP(vin1_data18), + VIN_DATA_PIN_GROUP(vin1_data, 16), + VIN_DATA_PIN_GROUP(vin1_data, 12), + VIN_DATA_PIN_GROUP(vin1_data, 10), + VIN_DATA_PIN_GROUP(vin1_data, 8), + VIN_DATA_PIN_GROUP(vin1_data, 4), + VIN_DATA_PIN_GROUP(vin1_data, 24, _b), + VIN_DATA_PIN_GROUP(vin1_data, 20, _b), + SH_PFC_PIN_GROUP(vin1_data18_b), + VIN_DATA_PIN_GROUP(vin1_data, 16, _b), + VIN_DATA_PIN_GROUP(vin1_data, 12, _b), + VIN_DATA_PIN_GROUP(vin1_data, 10, _b), + VIN_DATA_PIN_GROUP(vin1_data, 8, _b), + VIN_DATA_PIN_GROUP(vin1_data, 4, _b), + SH_PFC_PIN_GROUP(vin1_sync), + SH_PFC_PIN_GROUP(vin1_sync_b), + SH_PFC_PIN_GROUP(vin1_field), + SH_PFC_PIN_GROUP(vin1_field_b), + SH_PFC_PIN_GROUP(vin1_clkenb), + SH_PFC_PIN_GROUP(vin1_clkenb_b), + SH_PFC_PIN_GROUP(vin1_clk), + SH_PFC_PIN_GROUP(vin1_clk_b), + VIN_DATA_PIN_GROUP(vin2_data, 24), + SH_PFC_PIN_GROUP(vin2_data18), + VIN_DATA_PIN_GROUP(vin2_data, 16), + VIN_DATA_PIN_GROUP(vin2_data, 8), + VIN_DATA_PIN_GROUP(vin2_data, 4), + SH_PFC_PIN_GROUP(vin2_g8), + SH_PFC_PIN_GROUP(vin2_sync), + SH_PFC_PIN_GROUP(vin2_field), + SH_PFC_PIN_GROUP(vin2_clkenb), + SH_PFC_PIN_GROUP(vin2_clk), + SH_PFC_PIN_GROUP(vin3_data8), + SH_PFC_PIN_GROUP(vin3_sync), + SH_PFC_PIN_GROUP(vin3_field), + SH_PFC_PIN_GROUP(vin3_clkenb), + SH_PFC_PIN_GROUP(vin3_clk), + }, +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + .automotive = { + SH_PFC_PIN_GROUP(mlb_3pin), + } +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ }; static const char * const audio_clk_groups[] = { @@ -4246,6 +4478,23 @@ static const char * const avb_groups[] = { "avb_gmii", }; +static const char * const can0_groups[] = { + "can0_data", + "can0_data_b", + "can0_data_c", + "can0_data_d", +}; + +static const char * const can1_groups[] = { + "can1_data", + "can1_data_b", +}; + +static const char * const can_clk_groups[] = { + "can_clk", + "can_clk_b", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -4351,9 +4600,11 @@ static const char * const intc_groups[] = { "intc_irq3", }; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 static const char * const mlb_groups[] = { "mlb_3pin", }; +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ static const char * const mmc0_groups[] = { "mmc0_data1", @@ -4629,6 +4880,7 @@ static const char * const usb0_groups[] = { static const char * const usb1_groups[] = { "usb1", + "usb1_pwen", }; static const char * const usb2_groups[] = { @@ -4659,10 +4911,22 @@ static const char * const vin1_groups[] = { "vin1_data10", "vin1_data8", "vin1_data4", + "vin1_data24_b", + "vin1_data20_b", + "vin1_data18_b", + "vin1_data16_b", + "vin1_data12_b", + "vin1_data10_b", + "vin1_data8_b", + "vin1_data4_b", "vin1_sync", + "vin1_sync_b", "vin1_field", + "vin1_field_b", "vin1_clkenb", + "vin1_clkenb_b", "vin1_clk", + "vin1_clk_b", }; static const char * const vin2_groups[] = { @@ -4671,6 +4935,7 @@ static const char * const vin2_groups[] = { "vin2_data16", "vin2_data8", "vin2_data4", + "vin2_g8", "vin2_sync", "vin2_field", "vin2_clkenb", @@ -4685,63 +4950,77 @@ static const char * const vin3_groups[] = { "vin3_clk", }; -static const struct sh_pfc_function pinmux_functions[] = { - SH_PFC_FUNCTION(audio_clk), - SH_PFC_FUNCTION(avb), - SH_PFC_FUNCTION(du), - SH_PFC_FUNCTION(du0), - SH_PFC_FUNCTION(du1), - SH_PFC_FUNCTION(du2), - SH_PFC_FUNCTION(eth), - SH_PFC_FUNCTION(hscif0), - SH_PFC_FUNCTION(hscif1), - SH_PFC_FUNCTION(i2c0), - SH_PFC_FUNCTION(i2c1), - SH_PFC_FUNCTION(i2c2), - SH_PFC_FUNCTION(i2c3), - SH_PFC_FUNCTION(iic0), - SH_PFC_FUNCTION(iic1), - SH_PFC_FUNCTION(iic2), - SH_PFC_FUNCTION(iic3), - SH_PFC_FUNCTION(intc), - SH_PFC_FUNCTION(mlb), - SH_PFC_FUNCTION(mmc0), - SH_PFC_FUNCTION(mmc1), - SH_PFC_FUNCTION(msiof0), - SH_PFC_FUNCTION(msiof1), - SH_PFC_FUNCTION(msiof2), - SH_PFC_FUNCTION(msiof3), - SH_PFC_FUNCTION(pwm0), - SH_PFC_FUNCTION(pwm1), - SH_PFC_FUNCTION(pwm2), - SH_PFC_FUNCTION(pwm3), - SH_PFC_FUNCTION(pwm4), - SH_PFC_FUNCTION(pwm5), - SH_PFC_FUNCTION(pwm6), - SH_PFC_FUNCTION(qspi), - SH_PFC_FUNCTION(scif0), - SH_PFC_FUNCTION(scif1), - SH_PFC_FUNCTION(scif2), - SH_PFC_FUNCTION(scifa0), - SH_PFC_FUNCTION(scifa1), - SH_PFC_FUNCTION(scifa2), - SH_PFC_FUNCTION(scifb0), - SH_PFC_FUNCTION(scifb1), - SH_PFC_FUNCTION(scifb2), - SH_PFC_FUNCTION(scif_clk), - SH_PFC_FUNCTION(sdhi0), - SH_PFC_FUNCTION(sdhi1), - SH_PFC_FUNCTION(sdhi2), - SH_PFC_FUNCTION(sdhi3), - SH_PFC_FUNCTION(ssi), - SH_PFC_FUNCTION(tpu0), - SH_PFC_FUNCTION(usb0), - SH_PFC_FUNCTION(usb1), - SH_PFC_FUNCTION(usb2), - SH_PFC_FUNCTION(vin0), - SH_PFC_FUNCTION(vin1), - SH_PFC_FUNCTION(vin2), - SH_PFC_FUNCTION(vin3), +static const struct { + struct sh_pfc_function common[58]; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + struct sh_pfc_function automotive[1]; +#endif +} pinmux_functions = { + .common = { + SH_PFC_FUNCTION(audio_clk), + SH_PFC_FUNCTION(avb), + SH_PFC_FUNCTION(du), + SH_PFC_FUNCTION(can0), + SH_PFC_FUNCTION(can1), + SH_PFC_FUNCTION(can_clk), + SH_PFC_FUNCTION(du0), + SH_PFC_FUNCTION(du1), + SH_PFC_FUNCTION(du2), + SH_PFC_FUNCTION(eth), + SH_PFC_FUNCTION(hscif0), + SH_PFC_FUNCTION(hscif1), + SH_PFC_FUNCTION(i2c0), + SH_PFC_FUNCTION(i2c1), + SH_PFC_FUNCTION(i2c2), + SH_PFC_FUNCTION(i2c3), + SH_PFC_FUNCTION(iic0), + SH_PFC_FUNCTION(iic1), + SH_PFC_FUNCTION(iic2), + SH_PFC_FUNCTION(iic3), + SH_PFC_FUNCTION(intc), + SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(mmc1), + SH_PFC_FUNCTION(msiof0), + SH_PFC_FUNCTION(msiof1), + SH_PFC_FUNCTION(msiof2), + SH_PFC_FUNCTION(msiof3), + SH_PFC_FUNCTION(pwm0), + SH_PFC_FUNCTION(pwm1), + SH_PFC_FUNCTION(pwm2), + SH_PFC_FUNCTION(pwm3), + SH_PFC_FUNCTION(pwm4), + SH_PFC_FUNCTION(pwm5), + SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi), + SH_PFC_FUNCTION(scif0), + SH_PFC_FUNCTION(scif1), + SH_PFC_FUNCTION(scif2), + SH_PFC_FUNCTION(scifa0), + SH_PFC_FUNCTION(scifa1), + SH_PFC_FUNCTION(scifa2), + SH_PFC_FUNCTION(scifb0), + SH_PFC_FUNCTION(scifb1), + SH_PFC_FUNCTION(scifb2), + SH_PFC_FUNCTION(scif_clk), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(sdhi3), + SH_PFC_FUNCTION(ssi), + SH_PFC_FUNCTION(tpu0), + SH_PFC_FUNCTION(usb0), + SH_PFC_FUNCTION(usb1), + SH_PFC_FUNCTION(usb2), + SH_PFC_FUNCTION(vin0), + SH_PFC_FUNCTION(vin1), + SH_PFC_FUNCTION(vin2), + SH_PFC_FUNCTION(vin3), + }, +#ifdef CONFIG_PINCTRL_PFC_R8A7790 + .automotive = { + SH_PFC_FUNCTION(mlb), + } +#endif /* CONFIG_PINCTRL_PFC_R8A7790 */ }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { @@ -5728,6 +6007,7 @@ static const struct sh_pfc_soc_operations r8a7790_pinmux_ops = { .pin_to_pocctrl = r8a7790_pin_to_pocctrl, }; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 const struct sh_pfc_soc_info r8a7790_pinmux_info = { .name = "r8a77900_pfc", .ops = &r8a7790_pinmux_ops, @@ -5737,13 +6017,16 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = { .pins = pinmux_pins, .nr_pins = ARRAY_SIZE(pinmux_pins), - .groups = pinmux_groups, - .nr_groups = ARRAY_SIZE(pinmux_groups), - .functions = pinmux_functions, - .nr_functions = ARRAY_SIZE(pinmux_functions), + .groups = pinmux_groups.common, + .nr_groups = ARRAY_SIZE(pinmux_groups.common) + + ARRAY_SIZE(pinmux_groups.automotive), + .functions = pinmux_functions.common, + .nr_functions = ARRAY_SIZE(pinmux_functions.common) + + ARRAY_SIZE(pinmux_functions.automotive), .cfg_regs = pinmux_config_regs, .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), }; +#endif diff --git a/drivers/pinctrl/renesas/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c index d6095d6f67..7c8db5dc2c 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7791.c +++ b/drivers/pinctrl/renesas/pfc-r8a7791.c @@ -18,7 +18,7 @@ * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in * which case they support both 3.3V and 1.8V signalling. */ -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_32(0, fn, sfx), \ PORT_GP_26(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ @@ -1703,6 +1703,7 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), }; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) /* - ADI -------------------------------------------------------------------- */ static const unsigned int adi_common_pins[] = { /* ADIDATA, ADICS/SAMP, ADICLK */ @@ -1768,6 +1769,7 @@ static const unsigned int adi_chsel2_b_mux[] = { /* ADICHS B 2 */ ADICHS2_B_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ /* - Audio Clock ------------------------------------------------------------ */ static const unsigned int audio_clk_a_pins[] = { @@ -2556,6 +2558,8 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; + +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) /* - MLB+ ------------------------------------------------------------------- */ static const unsigned int mlb_3pin_pins[] = { RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8), RCAR_GP_PIN(7, 9), @@ -2563,6 +2567,8 @@ static const unsigned int mlb_3pin_pins[] = { static const unsigned int mlb_3pin_mux[] = { MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ + /* - MMCIF ------------------------------------------------------------------ */ static const unsigned int mmc_data1_pins[] = { /* D[0] */ @@ -4455,7 +4461,9 @@ static const unsigned int vin2_clk_mux[] = { static const struct { struct sh_pfc_pin_group common[346]; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) struct sh_pfc_pin_group automotive[9]; +#endif } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a), @@ -4805,6 +4813,7 @@ static const struct { SH_PFC_PIN_GROUP(vin2_clkenb), SH_PFC_PIN_GROUP(vin2_clk), }, +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) .automotive = { SH_PFC_PIN_GROUP(adi_common), SH_PFC_PIN_GROUP(adi_chsel0), @@ -4816,8 +4825,10 @@ static const struct { SH_PFC_PIN_GROUP(adi_chsel2_b), SH_PFC_PIN_GROUP(mlb_3pin), } +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ }; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) static const char * const adi_groups[] = { "adi_common", "adi_chsel0", @@ -4828,6 +4839,7 @@ static const char * const adi_groups[] = { "adi_chsel1_b", "adi_chsel2_b", }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ static const char * const audio_clk_groups[] = { "audio_clk_a", @@ -5005,9 +5017,11 @@ static const char * const intc_groups[] = { "intc_irq3", }; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) static const char * const mlb_groups[] = { "mlb_3pin", }; +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ static const char * const mmc_groups[] = { "mmc_data1", @@ -5362,7 +5376,9 @@ static const char * const vin2_groups[] = { static const struct { struct sh_pfc_function common[58]; +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) struct sh_pfc_function automotive[2]; +#endif } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -5424,10 +5440,12 @@ static const struct { SH_PFC_FUNCTION(vin1), SH_PFC_FUNCTION(vin2), }, +#if defined(CONFIG_PINCTRL_PFC_R8A7791) || defined(CONFIG_PINCTRL_PFC_R8A7793) .automotive = { SH_PFC_FUNCTION(adi), SH_PFC_FUNCTION(mlb), } +#endif /* CONFIG_PINCTRL_PFC_R8A7791 || CONFIG_PINCTRL_PFC_R8A7793 */ }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { diff --git a/drivers/pinctrl/renesas/pfc-r8a7792.c b/drivers/pinctrl/renesas/pfc-r8a7792.c index 1c90412093..054c02a4ae 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7792.c +++ b/drivers/pinctrl/renesas/pfc-r8a7792.c @@ -14,7 +14,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_29(0, fn, sfx), \ PORT_GP_23(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c index 91ac815f3d..9495603f7c 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7794.c +++ b/drivers/pinctrl/renesas/pfc-r8a7794.c @@ -15,7 +15,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_32(0, fn, sfx), \ PORT_GP_26(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ diff --git a/drivers/pinctrl/renesas/pfc-r8a7795.c b/drivers/pinctrl/renesas/pfc-r8a7795.c index 898f837950..015a50f1de 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7795.c +++ b/drivers/pinctrl/renesas/pfc-r8a7795.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * R8A7795 ES2.0+ processor support - PFC hardware block. + * R8A77951 processor support - PFC hardware block. * * Copyright (C) 2015-2019 Renesas Electronics Corporation */ @@ -13,11 +13,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ - SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ @@ -30,6 +28,52 @@ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN2, "DU_DOTCLKIN2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN3, "DU_DOTCLKIN3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\ + PIN_NOGP_CFG(FSCLKST_N, "FSCLKST#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -1509,68 +1553,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A7795 has 8 banks with 32 GPIOs in each => 256 GPIOs. - * Physical layout rows: A - AW, cols: 1 - 39. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different r8a7795 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R-Car H3SiP to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 7, DU_DOTCLKIN2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1718,7 +1710,7 @@ static const unsigned int avb_phy_int_mux[] = { }; static const unsigned int avb_mdio_pins[] = { /* AVB_MDC, AVB_MDIO */ - RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), + RCAR_GP_PIN(2, 9), PIN_AVB_MDIO, }; static const unsigned int avb_mdio_mux[] = { AVB_MDC_MARK, AVB_MDIO_MARK, @@ -1731,12 +1723,11 @@ static const unsigned int avb_mii_pins[] = { * AVB_RD1, AVB_RD2, AVB_RD3, * AVB_TXCREFCLK */ - PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), - PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), - PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), - PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), - PIN_NUMBER('A', 12), - + PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0, + PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3, + PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0, + PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3, + PIN_AVB_TXCREFCLK, }; static const unsigned int avb_mii_mux[] = { AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, @@ -3261,6 +3252,57 @@ static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +/* - QSPI0 ------------------------------------------------------------------ */ +static const unsigned int qspi0_ctrl_pins[] = { + /* QSPI0_SPCLK, QSPI0_SSL */ + PIN_QSPI0_SPCLK, PIN_QSPI0_SSL, +}; +static const unsigned int qspi0_ctrl_mux[] = { + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, +}; +static const unsigned int qspi0_data2_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, +}; +static const unsigned int qspi0_data2_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, +}; +static const unsigned int qspi0_data4_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, + /* QSPI0_IO2, QSPI0_IO3 */ + PIN_QSPI0_IO2, PIN_QSPI0_IO3, +}; +static const unsigned int qspi0_data4_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, +}; +/* - QSPI1 ------------------------------------------------------------------ */ +static const unsigned int qspi1_ctrl_pins[] = { + /* QSPI1_SPCLK, QSPI1_SSL */ + PIN_QSPI1_SPCLK, PIN_QSPI1_SSL, +}; +static const unsigned int qspi1_ctrl_mux[] = { + QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int qspi1_data2_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, +}; +static const unsigned int qspi1_data2_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, +}; +static const unsigned int qspi1_data4_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, + /* QSPI1_IO2, QSPI1_IO3 */ + PIN_QSPI1_IO2, PIN_QSPI1_IO3, +}; +static const unsigned int qspi1_data4_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; + /* - SATA --------------------------------------------------------------------*/ static const unsigned int sata0_devslp_a_pins[] = { /* DEVSLP */ @@ -4169,7 +4211,7 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[320]; + struct sh_pfc_pin_group common[326]; #ifdef CONFIG_PINCTRL_PFC_R8A7795 struct sh_pfc_pin_group automotive[30]; #endif @@ -4374,6 +4416,12 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(qspi0_ctrl), + SH_PFC_PIN_GROUP(qspi0_data2), + SH_PFC_PIN_GROUP(qspi0_data4), + SH_PFC_PIN_GROUP(qspi1_ctrl), + SH_PFC_PIN_GROUP(qspi1_data2), + SH_PFC_PIN_GROUP(qspi1_data4), SH_PFC_PIN_GROUP(sata0_devslp_a), SH_PFC_PIN_GROUP(sata0_devslp_b), SH_PFC_PIN_GROUP(scif0_data), @@ -4868,6 +4916,18 @@ static const char * const pwm6_groups[] = { "pwm6_b", }; +static const char * const qspi0_groups[] = { + "qspi0_ctrl", + "qspi0_data2", + "qspi0_data4", +}; + +static const char * const qspi1_groups[] = { + "qspi1_ctrl", + "qspi1_data2", + "qspi1_data4", +}; + static const char * const sata0_groups[] = { "sata0_devslp_a", "sata0_devslp_b", @@ -5056,7 +5116,7 @@ static const char * const vin5_groups[] = { }; static const struct { - struct sh_pfc_function common[53]; + struct sh_pfc_function common[55]; #ifdef CONFIG_PINCTRL_PFC_R8A7795 struct sh_pfc_function automotive[4]; #endif @@ -5093,6 +5153,8 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi0), + SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(sata0), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -5692,44 +5754,44 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_drive_reg pinmux_drive_regs[] = { { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { - { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ - { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ - { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ - { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ - { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ - { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ - { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ - { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + { PIN_QSPI0_SPCLK, 28, 2 }, /* QSPI0_SPCLK */ + { PIN_QSPI0_MOSI_IO0, 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_QSPI0_MISO_IO1, 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_QSPI0_IO2, 16, 2 }, /* QSPI0_IO2 */ + { PIN_QSPI0_IO3, 12, 2 }, /* QSPI0_IO3 */ + { PIN_QSPI0_SSL, 8, 2 }, /* QSPI0_SSL */ + { PIN_QSPI1_SPCLK, 4, 2 }, /* QSPI1_SPCLK */ + { PIN_QSPI1_MOSI_IO0, 0, 2 }, /* QSPI1_MOSI_IO0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { - { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ - { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ - { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ - { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ - { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ - { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ - { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ - { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + { PIN_QSPI1_MISO_IO1, 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_QSPI1_IO2, 24, 2 }, /* QSPI1_IO2 */ + { PIN_QSPI1_IO3, 20, 2 }, /* QSPI1_IO3 */ + { PIN_QSPI1_SSL, 16, 2 }, /* QSPI1_SSL */ + { PIN_RPC_INT_N, 12, 2 }, /* RPC_INT# */ + { PIN_RPC_WP_N, 8, 2 }, /* RPC_WP# */ + { PIN_RPC_RESET_N, 4, 2 }, /* RPC_RESET# */ + { PIN_AVB_RX_CTL, 0, 3 }, /* AVB_RX_CTL */ } }, { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { - { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ - { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ - { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ - { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ - { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ - { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ - { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ - { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + { PIN_AVB_RXC, 28, 3 }, /* AVB_RXC */ + { PIN_AVB_RD0, 24, 3 }, /* AVB_RD0 */ + { PIN_AVB_RD1, 20, 3 }, /* AVB_RD1 */ + { PIN_AVB_RD2, 16, 3 }, /* AVB_RD2 */ + { PIN_AVB_RD3, 12, 3 }, /* AVB_RD3 */ + { PIN_AVB_TX_CTL, 8, 3 }, /* AVB_TX_CTL */ + { PIN_AVB_TXC, 4, 3 }, /* AVB_TXC */ + { PIN_AVB_TD0, 0, 3 }, /* AVB_TD0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { - { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ - { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ - { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ - { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ - { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ - { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ - { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ - { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + { PIN_AVB_TD1, 28, 3 }, /* AVB_TD1 */ + { PIN_AVB_TD2, 24, 3 }, /* AVB_TD2 */ + { PIN_AVB_TD3, 20, 3 }, /* AVB_TD3 */ + { PIN_AVB_TXCREFCLK, 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_AVB_MDIO, 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ } }, { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ @@ -5783,7 +5845,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { } }, { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ - { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { PIN_PRESETOUT_N, 24, 3 }, /* PRESETOUT# */ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ @@ -5802,30 +5864,32 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ } }, { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { - { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ - { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ - { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ - { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ - { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ - { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ - { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ - { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_DU_DOTCLKIN0, 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_DU_DOTCLKIN1, 0, 2 }, /* DU_DOTCLKIN1 */ } }, { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { - { PIN_A_NUMBER('R', 7), 28, 2 }, /* DU_DOTCLKIN2 */ - { PIN_A_NUMBER('R', 8), 24, 2 }, /* DU_DOTCLKIN3 */ - { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST# */ - { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ +#ifdef CONFIG_PINCTRL_PFC_R8A7795 + { PIN_DU_DOTCLKIN2, 28, 2 }, /* DU_DOTCLKIN2 */ +#endif + { PIN_DU_DOTCLKIN3, 24, 2 }, /* DU_DOTCLKIN3 */ + { PIN_FSCLKST_N, 20, 2 }, /* FSCLKST# */ + { PIN_TMS, 4, 2 }, /* TMS */ } }, { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { - { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ - { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ - { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ - { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ - { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ - { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ - { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ - { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + { PIN_TDO, 28, 2 }, /* TDO */ + { PIN_ASEBRK, 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ } }, { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ @@ -5894,7 +5958,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ - { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { PIN_MLB_REF, 4, 3 }, /* MLB_REF */ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ } }, { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { @@ -5933,8 +5997,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(6, 27), 20, 3 }, /* USB1_OVC */ { RCAR_GP_PIN(6, 28), 16, 3 }, /* USB30_PWEN */ { RCAR_GP_PIN(6, 29), 12, 3 }, /* USB30_OVC */ - { RCAR_GP_PIN(6, 30), 8, 3 }, /* USB2_CH3_PWEN */ - { RCAR_GP_PIN(6, 31), 4, 3 }, /* USB2_CH3_OVC */ + { RCAR_GP_PIN(6, 30), 8, 3 }, /* GP6_30/USB2_CH3_PWEN */ + { RCAR_GP_PIN(6, 31), 4, 3 }, /* GP6_31/USB2_CH3_OVC */ } }, { }, }; @@ -5950,7 +6014,8 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { { /* sentinel */ }, }; -static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +static int r8a77951_pin_to_pocctrl(struct sh_pfc *pfc, + unsigned int pin, u32 *pocctrl) { int bit = -EINVAL; @@ -5967,35 +6032,35 @@ static int r8a7795_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc static const struct pinmux_bias_reg pinmux_bias_regs[] = { { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) { - [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */ - [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */ - [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */ - [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */ - [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */ - [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */ - [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */ - [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */ - [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */ - [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */ - [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */ - [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */ - [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */ - [13] = PIN_NUMBER('V', 6), /* RPC_WP# */ - [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */ - [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */ - [16] = PIN_NUMBER('B', 19), /* AVB_RXC */ - [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */ - [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */ - [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */ - [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */ - [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */ - [22] = PIN_NUMBER('A', 19), /* AVB_TXC */ - [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */ - [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */ - [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */ - [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */ - [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */ - [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */ + [ 0] = PIN_QSPI0_SPCLK, /* QSPI0_SPCLK */ + [ 1] = PIN_QSPI0_MOSI_IO0, /* QSPI0_MOSI_IO0 */ + [ 2] = PIN_QSPI0_MISO_IO1, /* QSPI0_MISO_IO1 */ + [ 3] = PIN_QSPI0_IO2, /* QSPI0_IO2 */ + [ 4] = PIN_QSPI0_IO3, /* QSPI0_IO3 */ + [ 5] = PIN_QSPI0_SSL, /* QSPI0_SSL */ + [ 6] = PIN_QSPI1_SPCLK, /* QSPI1_SPCLK */ + [ 7] = PIN_QSPI1_MOSI_IO0, /* QSPI1_MOSI_IO0 */ + [ 8] = PIN_QSPI1_MISO_IO1, /* QSPI1_MISO_IO1 */ + [ 9] = PIN_QSPI1_IO2, /* QSPI1_IO2 */ + [10] = PIN_QSPI1_IO3, /* QSPI1_IO3 */ + [11] = PIN_QSPI1_SSL, /* QSPI1_SSL */ + [12] = PIN_RPC_INT_N, /* RPC_INT# */ + [13] = PIN_RPC_WP_N, /* RPC_WP# */ + [14] = PIN_RPC_RESET_N, /* RPC_RESET# */ + [15] = PIN_AVB_RX_CTL, /* AVB_RX_CTL */ + [16] = PIN_AVB_RXC, /* AVB_RXC */ + [17] = PIN_AVB_RD0, /* AVB_RD0 */ + [18] = PIN_AVB_RD1, /* AVB_RD1 */ + [19] = PIN_AVB_RD2, /* AVB_RD2 */ + [20] = PIN_AVB_RD3, /* AVB_RD3 */ + [21] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ + [22] = PIN_AVB_TXC, /* AVB_TXC */ + [23] = PIN_AVB_TD0, /* AVB_TD0 */ + [24] = PIN_AVB_TD1, /* AVB_TD1 */ + [25] = PIN_AVB_TD2, /* AVB_TD2 */ + [26] = PIN_AVB_TD3, /* AVB_TD3 */ + [27] = PIN_AVB_TXCREFCLK, /* AVB_TXCREFCLK */ + [28] = PIN_AVB_MDIO, /* AVB_MDIO */ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */ @@ -6044,7 +6109,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */ - [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */ + [ 9] = PIN_PRESETOUT_N, /* PRESETOUT# */ [10] = RCAR_GP_PIN(0, 0), /* D0 */ [11] = RCAR_GP_PIN(0, 1), /* D1 */ [12] = RCAR_GP_PIN(0, 2), /* D2 */ @@ -6065,20 +6130,20 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(7, 1), /* AVS2 */ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */ - [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */ - [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */ + [30] = PIN_DU_DOTCLKIN0, /* DU_DOTCLKIN0 */ + [31] = PIN_DU_DOTCLKIN1, /* DU_DOTCLKIN1 */ } }, { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) { - [ 0] = PIN_A_NUMBER('R', 7), /* DU_DOTCLKIN2 */ - [ 1] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN3 */ - [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST# */ - [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/ - [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */ - [ 5] = PIN_A_NUMBER('T', 27), /* TCK */ - [ 6] = PIN_A_NUMBER('R', 30), /* TMS */ - [ 7] = PIN_A_NUMBER('R', 29), /* TDI */ - [ 8] = PIN_NONE, - [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */ + [ 0] = PIN_DU_DOTCLKIN2, /* DU_DOTCLKIN2 */ + [ 1] = PIN_DU_DOTCLKIN3, /* DU_DOTCLKIN3 */ + [ 2] = PIN_FSCLKST_N, /* FSCLKST# */ + [ 3] = PIN_EXTALR, /* EXTALR*/ + [ 4] = PIN_TRST_N, /* TRST# */ + [ 5] = PIN_TCK, /* TCK */ + [ 6] = PIN_TMS, /* TMS */ + [ 7] = PIN_TDI, /* TDI */ + [ 8] = SH_PFC_PIN_NONE, + [ 9] = PIN_ASEBRK, /* ASEBRK */ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ @@ -6143,7 +6208,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */ - [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */ + [ 6] = PIN_MLB_REF, /* MLB_REF */ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ @@ -6178,31 +6243,31 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */ [ 5] = RCAR_GP_PIN(6, 30), /* USB2_CH3_PWEN */ [ 6] = RCAR_GP_PIN(6, 31), /* USB2_CH3_OVC */ - [ 7] = PIN_NONE, - [ 8] = PIN_NONE, - [ 9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, - [30] = PIN_NONE, - [31] = PIN_NONE, + [ 7] = SH_PFC_PIN_NONE, + [ 8] = SH_PFC_PIN_NONE, + [ 9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, + [30] = SH_PFC_PIN_NONE, + [31] = SH_PFC_PIN_NONE, } }, { /* sentinel */ }, }; @@ -6248,8 +6313,8 @@ static void r8a7795_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, sh_pfc_write(pfc, reg->puen, enable); } -static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = { - .pin_to_pocctrl = r8a7795_pin_to_pocctrl, +static const struct sh_pfc_soc_operations r8a77951_pinmux_ops = { + .pin_to_pocctrl = r8a77951_pin_to_pocctrl, .get_bias = r8a7795_pinmux_get_bias, .set_bias = r8a7795_pinmux_set_bias, }; @@ -6257,7 +6322,7 @@ static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = { #ifdef CONFIG_PINCTRL_PFC_R8A774E1 const struct sh_pfc_soc_info r8a774e1_pinmux_info = { .name = "r8a774e1_pfc", - .ops = &r8a7795_pinmux_ops, + .ops = &r8a77951_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, @@ -6282,7 +6347,7 @@ const struct sh_pfc_soc_info r8a774e1_pinmux_info = { #ifdef CONFIG_PINCTRL_PFC_R8A7795 const struct sh_pfc_soc_info r8a7795_pinmux_info = { .name = "r8a77951_pfc", - .ops = &r8a7795_pinmux_ops, + .ops = &r8a77951_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c index da7901ea6e..06cae74fb5 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 /* - * R8A7796 processor support - PFC hardware block. + * R8A7796 (R-Car M3-W/W+) support - PFC hardware block. * * Copyright (C) 2016-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -19,11 +19,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ - SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ @@ -36,6 +34,51 @@ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN2, "DU_DOTCLKIN2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\ + PIN_NOGP_CFG(FSCLKST, "FSCLKST", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -688,7 +731,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_PHYS_MSEL(IP1_23_20, HRX3_D, I2C_SEL_3_0, SEL_HSCIF3_3), PINMUX_IPSR_PHYS_MSEL(IP1_23_20, VI4_DATA7_B, I2C_SEL_3_0, SEL_VIN4_1), PINMUX_IPSR_PHYS_MSEL(IP1_23_20, IERX_B, I2C_SEL_3_0, SEL_IEBUS_1), - PINMUX_IPSR_PHYS(IP0_23_20, SCL3, I2C_SEL_3_1), + PINMUX_IPSR_PHYS(IP1_23_20, SCL3, I2C_SEL_3_1), PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A, I2C_SEL_3_0, SEL_PWM2_0), PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D, I2C_SEL_3_0, SEL_HSCIF3_3), @@ -1514,67 +1557,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A7796 has 8 banks with 32 GPIOs in each => 256 GPIOs. - * Physical layout rows: A - AW, cols: 1 - 39. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different r8a7796 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R-Car M3SiP to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1723,7 +1715,7 @@ static const unsigned int avb_phy_int_mux[] = { }; static const unsigned int avb_mdio_pins[] = { /* AVB_MDC, AVB_MDIO */ - RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), + RCAR_GP_PIN(2, 9), PIN_AVB_MDIO, }; static const unsigned int avb_mdio_mux[] = { AVB_MDC_MARK, AVB_MDIO_MARK, @@ -1736,12 +1728,11 @@ static const unsigned int avb_mii_pins[] = { * AVB_RD1, AVB_RD2, AVB_RD3, * AVB_TXCREFCLK */ - PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), - PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), - PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), - PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), - PIN_NUMBER('A', 12), - + PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0, + PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3, + PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0, + PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3, + PIN_AVB_TXCREFCLK, }; static const unsigned int avb_mii_mux[] = { AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, @@ -3267,6 +3258,57 @@ static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +/* - QSPI0 ------------------------------------------------------------------ */ +static const unsigned int qspi0_ctrl_pins[] = { + /* QSPI0_SPCLK, QSPI0_SSL */ + PIN_QSPI0_SPCLK, PIN_QSPI0_SSL, +}; +static const unsigned int qspi0_ctrl_mux[] = { + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, +}; +static const unsigned int qspi0_data2_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, +}; +static const unsigned int qspi0_data2_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, +}; +static const unsigned int qspi0_data4_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, + /* QSPI0_IO2, QSPI0_IO3 */ + PIN_QSPI0_IO2, PIN_QSPI0_IO3, +}; +static const unsigned int qspi0_data4_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, +}; +/* - QSPI1 ------------------------------------------------------------------ */ +static const unsigned int qspi1_ctrl_pins[] = { + /* QSPI1_SPCLK, QSPI1_SSL */ + PIN_QSPI1_SPCLK, PIN_QSPI1_SSL, +}; +static const unsigned int qspi1_ctrl_mux[] = { + QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int qspi1_data2_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, +}; +static const unsigned int qspi1_data2_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, +}; +static const unsigned int qspi1_data4_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, + /* QSPI1_IO2, QSPI1_IO3 */ + PIN_QSPI1_IO2, PIN_QSPI1_IO3, +}; +static const unsigned int qspi1_data4_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX, TX */ @@ -3895,6 +3937,36 @@ static const unsigned int tmu_tclk2_b_mux[] = { TCLK2_B_MARK, }; +/* - TPU ------------------------------------------------------------------- */ +static const unsigned int tpu_to0_pins[] = { + /* TPU0TO0 */ + RCAR_GP_PIN(6, 28), +}; +static const unsigned int tpu_to0_mux[] = { + TPU0TO0_MARK, +}; +static const unsigned int tpu_to1_pins[] = { + /* TPU0TO1 */ + RCAR_GP_PIN(6, 29), +}; +static const unsigned int tpu_to1_mux[] = { + TPU0TO1_MARK, +}; +static const unsigned int tpu_to2_pins[] = { + /* TPU0TO2 */ + RCAR_GP_PIN(6, 30), +}; +static const unsigned int tpu_to2_mux[] = { + TPU0TO2_MARK, +}; +static const unsigned int tpu_to3_pins[] = { + /* TPU0TO3 */ + RCAR_GP_PIN(6, 31), +}; +static const unsigned int tpu_to3_mux[] = { + TPU0TO3_MARK, +}; + /* - USB0 ------------------------------------------------------------------- */ static const unsigned int usb0_pins[] = { /* PWEN, OVC */ @@ -4114,7 +4186,7 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[312]; + struct sh_pfc_pin_group common[322]; #if defined(CONFIG_PINCTRL_PFC_R8A7796) struct sh_pfc_pin_group automotive[30]; #endif @@ -4319,6 +4391,12 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(qspi0_ctrl), + SH_PFC_PIN_GROUP(qspi0_data2), + SH_PFC_PIN_GROUP(qspi0_data4), + SH_PFC_PIN_GROUP(qspi1_ctrl), + SH_PFC_PIN_GROUP(qspi1_data2), + SH_PFC_PIN_GROUP(qspi1_data4), SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -4403,6 +4481,10 @@ static const struct { SH_PFC_PIN_GROUP(tmu_tclk1_b), SH_PFC_PIN_GROUP(tmu_tclk2_a), SH_PFC_PIN_GROUP(tmu_tclk2_b), + SH_PFC_PIN_GROUP(tpu_to0), + SH_PFC_PIN_GROUP(tpu_to1), + SH_PFC_PIN_GROUP(tpu_to2), + SH_PFC_PIN_GROUP(tpu_to3), SH_PFC_PIN_GROUP(usb0), SH_PFC_PIN_GROUP(usb1), SH_PFC_PIN_GROUP(usb30), @@ -4805,6 +4887,18 @@ static const char * const pwm6_groups[] = { "pwm6_b", }; +static const char * const qspi0_groups[] = { + "qspi0_ctrl", + "qspi0_data2", + "qspi0_data4", +}; + +static const char * const qspi1_groups[] = { + "qspi1_ctrl", + "qspi1_data2", + "qspi1_data4", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -4928,6 +5022,13 @@ static const char * const tmu_groups[] = { "tmu_tclk2_b", }; +static const char * const tpu_groups[] = { + "tpu_to0", + "tpu_to1", + "tpu_to2", + "tpu_to3", +}; + static const char * const usb0_groups[] = { "usb0", }; @@ -4973,7 +5074,7 @@ static const char * const vin5_groups[] = { }; static const struct { - struct sh_pfc_function common[49]; + struct sh_pfc_function common[52]; #if defined(CONFIG_PINCTRL_PFC_R8A7796) struct sh_pfc_function automotive[4]; #endif @@ -5010,6 +5111,8 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi0), + SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif2), @@ -5023,6 +5126,7 @@ static const struct { SH_PFC_FUNCTION(sdhi3), SH_PFC_FUNCTION(ssi), SH_PFC_FUNCTION(tmu), + SH_PFC_FUNCTION(tpu), SH_PFC_FUNCTION(usb0), SH_PFC_FUNCTION(usb1), SH_PFC_FUNCTION(usb30), @@ -5604,44 +5708,44 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_drive_reg pinmux_drive_regs[] = { { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { - { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ - { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ - { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ - { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ - { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ - { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ - { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ - { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + { PIN_QSPI0_SPCLK, 28, 2 }, /* QSPI0_SPCLK */ + { PIN_QSPI0_MOSI_IO0, 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_QSPI0_MISO_IO1, 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_QSPI0_IO2, 16, 2 }, /* QSPI0_IO2 */ + { PIN_QSPI0_IO3, 12, 2 }, /* QSPI0_IO3 */ + { PIN_QSPI0_SSL, 8, 2 }, /* QSPI0_SSL */ + { PIN_QSPI1_SPCLK, 4, 2 }, /* QSPI1_SPCLK */ + { PIN_QSPI1_MOSI_IO0, 0, 2 }, /* QSPI1_MOSI_IO0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { - { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ - { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ - { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ - { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ - { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ - { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ - { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ - { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + { PIN_QSPI1_MISO_IO1, 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_QSPI1_IO2, 24, 2 }, /* QSPI1_IO2 */ + { PIN_QSPI1_IO3, 20, 2 }, /* QSPI1_IO3 */ + { PIN_QSPI1_SSL, 16, 2 }, /* QSPI1_SSL */ + { PIN_RPC_INT_N, 12, 2 }, /* RPC_INT# */ + { PIN_RPC_WP_N, 8, 2 }, /* RPC_WP# */ + { PIN_RPC_RESET_N, 4, 2 }, /* RPC_RESET# */ + { PIN_AVB_RX_CTL, 0, 3 }, /* AVB_RX_CTL */ } }, { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { - { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ - { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ - { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ - { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ - { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ - { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ - { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ - { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + { PIN_AVB_RXC, 28, 3 }, /* AVB_RXC */ + { PIN_AVB_RD0, 24, 3 }, /* AVB_RD0 */ + { PIN_AVB_RD1, 20, 3 }, /* AVB_RD1 */ + { PIN_AVB_RD2, 16, 3 }, /* AVB_RD2 */ + { PIN_AVB_RD3, 12, 3 }, /* AVB_RD3 */ + { PIN_AVB_TX_CTL, 8, 3 }, /* AVB_TX_CTL */ + { PIN_AVB_TXC, 4, 3 }, /* AVB_TXC */ + { PIN_AVB_TD0, 0, 3 }, /* AVB_TD0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { - { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ - { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ - { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ - { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ - { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ - { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ - { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ - { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + { PIN_AVB_TD1, 28, 3 }, /* AVB_TD1 */ + { PIN_AVB_TD2, 24, 3 }, /* AVB_TD2 */ + { PIN_AVB_TD3, 20, 3 }, /* AVB_TD3 */ + { PIN_AVB_TXCREFCLK, 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_AVB_MDIO, 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ } }, { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ @@ -5695,7 +5799,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { } }, { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ - { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { PIN_PRESETOUT_N, 24, 3 }, /* PRESETOUT# */ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ @@ -5714,29 +5818,29 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ } }, { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { - { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ - { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ - { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ - { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ - { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ - { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ - { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ - { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_DU_DOTCLKIN0, 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_DU_DOTCLKIN1, 0, 2 }, /* DU_DOTCLKIN1 */ } }, { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { - { PIN_A_NUMBER('R', 8), 28, 2 }, /* DU_DOTCLKIN2 */ - { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST */ - { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ + { PIN_DU_DOTCLKIN2, 28, 2 }, /* DU_DOTCLKIN2 */ + { PIN_FSCLKST, 20, 2 }, /* FSCLKST */ + { PIN_TMS, 4, 2 }, /* TMS */ } }, { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { - { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ - { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ - { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ - { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ - { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ - { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ - { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ - { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + { PIN_TDO, 28, 2 }, /* TDO */ + { PIN_ASEBRK, 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ } }, { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ @@ -5805,7 +5909,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ - { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { PIN_MLB_REF, 4, 3 }, /* MLB_REF */ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ } }, { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { @@ -5878,35 +5982,35 @@ static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *poc static const struct pinmux_bias_reg pinmux_bias_regs[] = { { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) { - [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */ - [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */ - [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */ - [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */ - [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */ - [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */ - [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */ - [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */ - [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */ - [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */ - [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */ - [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */ - [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */ - [13] = PIN_NUMBER('V', 6), /* RPC_WP# */ - [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */ - [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */ - [16] = PIN_NUMBER('B', 19), /* AVB_RXC */ - [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */ - [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */ - [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */ - [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */ - [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */ - [22] = PIN_NUMBER('A', 19), /* AVB_TXC */ - [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */ - [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */ - [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */ - [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */ - [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */ - [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */ + [ 0] = PIN_QSPI0_SPCLK, /* QSPI0_SPCLK */ + [ 1] = PIN_QSPI0_MOSI_IO0, /* QSPI0_MOSI_IO0 */ + [ 2] = PIN_QSPI0_MISO_IO1, /* QSPI0_MISO_IO1 */ + [ 3] = PIN_QSPI0_IO2, /* QSPI0_IO2 */ + [ 4] = PIN_QSPI0_IO3, /* QSPI0_IO3 */ + [ 5] = PIN_QSPI0_SSL, /* QSPI0_SSL */ + [ 6] = PIN_QSPI1_SPCLK, /* QSPI1_SPCLK */ + [ 7] = PIN_QSPI1_MOSI_IO0, /* QSPI1_MOSI_IO0 */ + [ 8] = PIN_QSPI1_MISO_IO1, /* QSPI1_MISO_IO1 */ + [ 9] = PIN_QSPI1_IO2, /* QSPI1_IO2 */ + [10] = PIN_QSPI1_IO3, /* QSPI1_IO3 */ + [11] = PIN_QSPI1_SSL, /* QSPI1_SSL */ + [12] = PIN_RPC_INT_N, /* RPC_INT# */ + [13] = PIN_RPC_WP_N, /* RPC_WP# */ + [14] = PIN_RPC_RESET_N, /* RPC_RESET# */ + [15] = PIN_AVB_RX_CTL, /* AVB_RX_CTL */ + [16] = PIN_AVB_RXC, /* AVB_RXC */ + [17] = PIN_AVB_RD0, /* AVB_RD0 */ + [18] = PIN_AVB_RD1, /* AVB_RD1 */ + [19] = PIN_AVB_RD2, /* AVB_RD2 */ + [20] = PIN_AVB_RD3, /* AVB_RD3 */ + [21] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ + [22] = PIN_AVB_TXC, /* AVB_TXC */ + [23] = PIN_AVB_TD0, /* AVB_TD0 */ + [24] = PIN_AVB_TD1, /* AVB_TD1 */ + [25] = PIN_AVB_TD2, /* AVB_TD2 */ + [26] = PIN_AVB_TD3, /* AVB_TD3 */ + [27] = PIN_AVB_TXCREFCLK, /* AVB_TXCREFCLK */ + [28] = PIN_AVB_MDIO, /* AVB_MDIO */ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */ @@ -5955,7 +6059,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */ - [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */ + [ 9] = PIN_PRESETOUT_N, /* PRESETOUT# */ [10] = RCAR_GP_PIN(0, 0), /* D0 */ [11] = RCAR_GP_PIN(0, 1), /* D1 */ [12] = RCAR_GP_PIN(0, 2), /* D2 */ @@ -5976,20 +6080,20 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(7, 1), /* AVS2 */ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */ - [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */ - [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */ + [30] = PIN_DU_DOTCLKIN0, /* DU_DOTCLKIN0 */ + [31] = PIN_DU_DOTCLKIN1, /* DU_DOTCLKIN1 */ } }, { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) { - [ 0] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN2 */ - [ 1] = PIN_NONE, - [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST */ - [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/ - [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */ - [ 5] = PIN_A_NUMBER('T', 27), /* TCK */ - [ 6] = PIN_A_NUMBER('R', 30), /* TMS */ - [ 7] = PIN_A_NUMBER('R', 29), /* TDI */ - [ 8] = PIN_NONE, - [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */ + [ 0] = PIN_DU_DOTCLKIN2, /* DU_DOTCLKIN2 */ + [ 1] = SH_PFC_PIN_NONE, + [ 2] = PIN_FSCLKST, /* FSCLKST */ + [ 3] = PIN_EXTALR, /* EXTALR*/ + [ 4] = PIN_TRST_N, /* TRST# */ + [ 5] = PIN_TCK, /* TCK */ + [ 6] = PIN_TMS, /* TMS */ + [ 7] = PIN_TDI, /* TDI */ + [ 8] = SH_PFC_PIN_NONE, + [ 9] = PIN_ASEBRK, /* ASEBRK */ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ @@ -6054,7 +6158,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */ - [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */ + [ 6] = PIN_MLB_REF, /* MLB_REF */ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ @@ -6089,31 +6193,31 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */ [ 5] = RCAR_GP_PIN(6, 30), /* GP6_30 */ [ 6] = RCAR_GP_PIN(6, 31), /* GP6_31 */ - [ 7] = PIN_NONE, - [ 8] = PIN_NONE, - [ 9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, - [30] = PIN_NONE, - [31] = PIN_NONE, + [ 7] = SH_PFC_PIN_NONE, + [ 8] = SH_PFC_PIN_NONE, + [ 9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, + [30] = SH_PFC_PIN_NONE, + [31] = SH_PFC_PIN_NONE, } }, { /* sentinel */ }, }; diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c index d143750c2d..fae29d535c 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> * Copyright (C) 2016-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -20,11 +20,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | \ - SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_DRIVE_STRENGTH | SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \ @@ -37,6 +35,51 @@ PORT_GP_CFG_26(5, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_32(6, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_4(7, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD0, "AVB_RD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD1, "AVB_RD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD2, "AVB_RD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RD3, "AVB_RD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RXC, "AVB_RXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_RX_CTL, "AVB_RX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXCREFCLK, "AVB_TXCREFCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN0, "DU_DOTCLKIN0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN1, "DU_DOTCLKIN1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(DU_DOTCLKIN3, "DU_DOTCLKIN3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(EXTALR, "EXTALR", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),\ + PIN_NOGP_CFG(FSCLKST, "FSCLKST", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO2, "QSPI0_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_IO3, "QSPI0_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MISO_IO1, "QSPI0_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_MOSI_IO0, "QSPI0_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SPCLK, "QSPI0_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI0_SSL, "QSPI0_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO2, "QSPI1_IO2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_IO3, "QSPI1_IO3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MISO_IO1, "QSPI1_MISO_IO1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_MOSI_IO0, "QSPI1_MOSI_IO0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SPCLK, "QSPI1_SPCLK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(QSPI1_SSL, "QSPI1_SSL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_INT_N, "RPC_INT#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_RESET_N, "RPC_RESET#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(RPC_WP_N, "RPC_WP#", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN), \ + PIN_NOGP_CFG(TDO, "TDO", fn, SH_PFC_PIN_CFG_DRIVE_STRENGTH), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP_DOWN) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -1519,67 +1562,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A77965 has 8 banks with 32 GPIOs in each => 256 GPIOs. - * Physical layout rows: A - AW, cols: 1 - 39. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 39 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different r8a77965 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R-Car M3SiP to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('A', 8, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 9, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 12, AVB_TXCREFCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 13, AVB_RD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 14, AVB_RD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 16, AVB_RX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 17, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 18, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('A', 19, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 13, AVB_RD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 14, AVB_RD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 17, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 18, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('B', 19, AVB_RXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('C', 1, PRESETOUT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 37, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 3, QSPI1_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 5, QSPI1_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 6, RPC_WP#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('V', 7, RPC_RESET#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('W', 3, QSPI0_SPCLK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 3, QSPI0_SSL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 6, QSPI0_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('Y', 7, RPC_INT#, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 4, QSPI0_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('B'), 6, QSPI0_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 3, QSPI1_IO3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 5, QSPI0_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('C'), 7, QSPI1_MOSI_IO0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 38, FSCLKST, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 39, EXTALR, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 4, QSPI1_IO2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('E'), 5, QSPI1_MISO_IO1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 7, DU_DOTCLKIN0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('P'), 8, DU_DOTCLKIN1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 8, DU_DOTCLKIN3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 26, TRST#, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 29, TDI, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('R'), 30, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 27, TCK, SH_PFC_PIN_CFG_PULL_UP | SH_PFC_PIN_CFG_PULL_DOWN), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 28, TDO, SH_PFC_PIN_CFG_DRIVE_STRENGTH), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('T'), 30, ASEBRK, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -1728,7 +1720,7 @@ static const unsigned int avb_phy_int_mux[] = { }; static const unsigned int avb_mdio_pins[] = { /* AVB_MDC, AVB_MDIO */ - RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9), + RCAR_GP_PIN(2, 9), PIN_AVB_MDIO, }; static const unsigned int avb_mdio_mux[] = { AVB_MDC_MARK, AVB_MDIO_MARK, @@ -1741,12 +1733,11 @@ static const unsigned int avb_mii_pins[] = { * AVB_RD1, AVB_RD2, AVB_RD3, * AVB_TXCREFCLK */ - PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18), - PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17), - PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13), - PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14), - PIN_NUMBER('A', 12), - + PIN_AVB_TX_CTL, PIN_AVB_TXC, PIN_AVB_TD0, + PIN_AVB_TD1, PIN_AVB_TD2, PIN_AVB_TD3, + PIN_AVB_RX_CTL, PIN_AVB_RXC, PIN_AVB_RD0, + PIN_AVB_RD1, PIN_AVB_RD2, PIN_AVB_RD3, + PIN_AVB_TXCREFCLK, }; static const unsigned int avb_mii_mux[] = { AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK, @@ -3418,6 +3409,57 @@ static const unsigned int pwm6_b_mux[] = { PWM6_B_MARK, }; +/* - QSPI0 ------------------------------------------------------------------ */ +static const unsigned int qspi0_ctrl_pins[] = { + /* QSPI0_SPCLK, QSPI0_SSL */ + PIN_QSPI0_SPCLK, PIN_QSPI0_SSL, +}; +static const unsigned int qspi0_ctrl_mux[] = { + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK, +}; +static const unsigned int qspi0_data2_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, +}; +static const unsigned int qspi0_data2_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, +}; +static const unsigned int qspi0_data4_pins[] = { + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */ + PIN_QSPI0_MOSI_IO0, PIN_QSPI0_MISO_IO1, + /* QSPI0_IO2, QSPI0_IO3 */ + PIN_QSPI0_IO2, PIN_QSPI0_IO3, +}; +static const unsigned int qspi0_data4_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, +}; +/* - QSPI1 ------------------------------------------------------------------ */ +static const unsigned int qspi1_ctrl_pins[] = { + /* QSPI1_SPCLK, QSPI1_SSL */ + PIN_QSPI1_SPCLK, PIN_QSPI1_SSL, +}; +static const unsigned int qspi1_ctrl_mux[] = { + QSPI1_SPCLK_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int qspi1_data2_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, +}; +static const unsigned int qspi1_data2_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, +}; +static const unsigned int qspi1_data4_pins[] = { + /* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */ + PIN_QSPI1_MOSI_IO0, PIN_QSPI1_MISO_IO1, + /* QSPI1_IO2, QSPI1_IO3 */ + PIN_QSPI1_IO2, PIN_QSPI1_IO3, +}; +static const unsigned int qspi1_data4_mux[] = { + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; + /* - SATA --------------------------------------------------------------------*/ static const unsigned int sata0_devslp_a_pins[] = { /* DEVSLP */ @@ -4391,7 +4433,7 @@ static const unsigned int vin5_clk_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[318]; + struct sh_pfc_pin_group common[324]; #ifdef CONFIG_PINCTRL_PFC_R8A77965 struct sh_pfc_pin_group automotive[30]; #endif @@ -4596,6 +4638,12 @@ static const struct { SH_PFC_PIN_GROUP(pwm5_b), SH_PFC_PIN_GROUP(pwm6_a), SH_PFC_PIN_GROUP(pwm6_b), + SH_PFC_PIN_GROUP(qspi0_ctrl), + SH_PFC_PIN_GROUP(qspi0_data2), + SH_PFC_PIN_GROUP(qspi0_data4), + SH_PFC_PIN_GROUP(qspi1_ctrl), + SH_PFC_PIN_GROUP(qspi1_data2), + SH_PFC_PIN_GROUP(qspi1_data4), SH_PFC_PIN_GROUP(sata0_devslp_a), SH_PFC_PIN_GROUP(sata0_devslp_b), SH_PFC_PIN_GROUP(scif0_data), @@ -5088,6 +5136,18 @@ static const char * const pwm6_groups[] = { "pwm6_b", }; +static const char * const qspi0_groups[] = { + "qspi0_ctrl", + "qspi0_data2", + "qspi0_data4", +}; + +static const char * const qspi1_groups[] = { + "qspi1_ctrl", + "qspi1_data2", + "qspi1_data4", +}; + static const char * const sata0_groups[] = { "sata0_devslp_a", "sata0_devslp_b", @@ -5267,7 +5327,7 @@ static const char * const vin5_groups[] = { }; static const struct { - struct sh_pfc_function common[51]; + struct sh_pfc_function common[53]; #ifdef CONFIG_PINCTRL_PFC_R8A77965 struct sh_pfc_function automotive[4]; #endif @@ -5304,6 +5364,8 @@ static const struct { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(pwm5), SH_PFC_FUNCTION(pwm6), + SH_PFC_FUNCTION(qspi0), + SH_PFC_FUNCTION(qspi1), SH_PFC_FUNCTION(sata0), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), @@ -5900,44 +5962,44 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static const struct pinmux_drive_reg pinmux_drive_regs[] = { { PINMUX_DRIVE_REG("DRVCTRL0", 0xe6060300) { - { PIN_NUMBER('W', 3), 28, 2 }, /* QSPI0_SPCLK */ - { PIN_A_NUMBER('C', 5), 24, 2 }, /* QSPI0_MOSI_IO0 */ - { PIN_A_NUMBER('B', 4), 20, 2 }, /* QSPI0_MISO_IO1 */ - { PIN_NUMBER('Y', 6), 16, 2 }, /* QSPI0_IO2 */ - { PIN_A_NUMBER('B', 6), 12, 2 }, /* QSPI0_IO3 */ - { PIN_NUMBER('Y', 3), 8, 2 }, /* QSPI0_SSL */ - { PIN_NUMBER('V', 3), 4, 2 }, /* QSPI1_SPCLK */ - { PIN_A_NUMBER('C', 7), 0, 2 }, /* QSPI1_MOSI_IO0 */ + { PIN_QSPI0_SPCLK, 28, 2 }, /* QSPI0_SPCLK */ + { PIN_QSPI0_MOSI_IO0, 24, 2 }, /* QSPI0_MOSI_IO0 */ + { PIN_QSPI0_MISO_IO1, 20, 2 }, /* QSPI0_MISO_IO1 */ + { PIN_QSPI0_IO2, 16, 2 }, /* QSPI0_IO2 */ + { PIN_QSPI0_IO3, 12, 2 }, /* QSPI0_IO3 */ + { PIN_QSPI0_SSL, 8, 2 }, /* QSPI0_SSL */ + { PIN_QSPI1_SPCLK, 4, 2 }, /* QSPI1_SPCLK */ + { PIN_QSPI1_MOSI_IO0, 0, 2 }, /* QSPI1_MOSI_IO0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL1", 0xe6060304) { - { PIN_A_NUMBER('E', 5), 28, 2 }, /* QSPI1_MISO_IO1 */ - { PIN_A_NUMBER('E', 4), 24, 2 }, /* QSPI1_IO2 */ - { PIN_A_NUMBER('C', 3), 20, 2 }, /* QSPI1_IO3 */ - { PIN_NUMBER('V', 5), 16, 2 }, /* QSPI1_SSL */ - { PIN_NUMBER('Y', 7), 12, 2 }, /* RPC_INT# */ - { PIN_NUMBER('V', 6), 8, 2 }, /* RPC_WP# */ - { PIN_NUMBER('V', 7), 4, 2 }, /* RPC_RESET# */ - { PIN_NUMBER('A', 16), 0, 3 }, /* AVB_RX_CTL */ + { PIN_QSPI1_MISO_IO1, 28, 2 }, /* QSPI1_MISO_IO1 */ + { PIN_QSPI1_IO2, 24, 2 }, /* QSPI1_IO2 */ + { PIN_QSPI1_IO3, 20, 2 }, /* QSPI1_IO3 */ + { PIN_QSPI1_SSL, 16, 2 }, /* QSPI1_SSL */ + { PIN_RPC_INT_N, 12, 2 }, /* RPC_INT# */ + { PIN_RPC_WP_N, 8, 2 }, /* RPC_WP# */ + { PIN_RPC_RESET_N, 4, 2 }, /* RPC_RESET# */ + { PIN_AVB_RX_CTL, 0, 3 }, /* AVB_RX_CTL */ } }, { PINMUX_DRIVE_REG("DRVCTRL2", 0xe6060308) { - { PIN_NUMBER('B', 19), 28, 3 }, /* AVB_RXC */ - { PIN_NUMBER('A', 13), 24, 3 }, /* AVB_RD0 */ - { PIN_NUMBER('B', 13), 20, 3 }, /* AVB_RD1 */ - { PIN_NUMBER('A', 14), 16, 3 }, /* AVB_RD2 */ - { PIN_NUMBER('B', 14), 12, 3 }, /* AVB_RD3 */ - { PIN_NUMBER('A', 8), 8, 3 }, /* AVB_TX_CTL */ - { PIN_NUMBER('A', 19), 4, 3 }, /* AVB_TXC */ - { PIN_NUMBER('A', 18), 0, 3 }, /* AVB_TD0 */ + { PIN_AVB_RXC, 28, 3 }, /* AVB_RXC */ + { PIN_AVB_RD0, 24, 3 }, /* AVB_RD0 */ + { PIN_AVB_RD1, 20, 3 }, /* AVB_RD1 */ + { PIN_AVB_RD2, 16, 3 }, /* AVB_RD2 */ + { PIN_AVB_RD3, 12, 3 }, /* AVB_RD3 */ + { PIN_AVB_TX_CTL, 8, 3 }, /* AVB_TX_CTL */ + { PIN_AVB_TXC, 4, 3 }, /* AVB_TXC */ + { PIN_AVB_TD0, 0, 3 }, /* AVB_TD0 */ } }, { PINMUX_DRIVE_REG("DRVCTRL3", 0xe606030c) { - { PIN_NUMBER('B', 18), 28, 3 }, /* AVB_TD1 */ - { PIN_NUMBER('A', 17), 24, 3 }, /* AVB_TD2 */ - { PIN_NUMBER('B', 17), 20, 3 }, /* AVB_TD3 */ - { PIN_NUMBER('A', 12), 16, 3 }, /* AVB_TXCREFCLK */ - { PIN_NUMBER('A', 9), 12, 3 }, /* AVB_MDIO */ - { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ - { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ - { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ + { PIN_AVB_TD1, 28, 3 }, /* AVB_TD1 */ + { PIN_AVB_TD2, 24, 3 }, /* AVB_TD2 */ + { PIN_AVB_TD3, 20, 3 }, /* AVB_TD3 */ + { PIN_AVB_TXCREFCLK, 16, 3 }, /* AVB_TXCREFCLK */ + { PIN_AVB_MDIO, 12, 3 }, /* AVB_MDIO */ + { RCAR_GP_PIN(2, 9), 8, 3 }, /* AVB_MDC */ + { RCAR_GP_PIN(2, 10), 4, 3 }, /* AVB_MAGIC */ + { RCAR_GP_PIN(2, 11), 0, 3 }, /* AVB_PHY_INT */ } }, { PINMUX_DRIVE_REG("DRVCTRL4", 0xe6060310) { { RCAR_GP_PIN(2, 12), 28, 3 }, /* AVB_LINK */ @@ -5991,7 +6053,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { } }, { PINMUX_DRIVE_REG("DRVCTRL9", 0xe6060324) { { RCAR_GP_PIN(1, 27), 28, 3 }, /* EX_WAIT0 */ - { PIN_NUMBER('C', 1), 24, 3 }, /* PRESETOUT# */ + { PIN_PRESETOUT_N, 24, 3 }, /* PRESETOUT# */ { RCAR_GP_PIN(0, 0), 20, 3 }, /* D0 */ { RCAR_GP_PIN(0, 1), 16, 3 }, /* D1 */ { RCAR_GP_PIN(0, 2), 12, 3 }, /* D2 */ @@ -6010,29 +6072,29 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(0, 13), 0, 3 }, /* D13 */ } }, { PINMUX_DRIVE_REG("DRVCTRL11", 0xe606032c) { - { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ - { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ - { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ - { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ - { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ - { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ - { PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */ - { PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */ + { RCAR_GP_PIN(0, 14), 28, 3 }, /* D14 */ + { RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */ + { RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */ + { RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */ + { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */ + { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */ + { PIN_DU_DOTCLKIN0, 4, 2 }, /* DU_DOTCLKIN0 */ + { PIN_DU_DOTCLKIN1, 0, 2 }, /* DU_DOTCLKIN1 */ } }, { PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) { - { PIN_A_NUMBER('R', 8), 28, 2 }, /* DU_DOTCLKIN3 */ - { PIN_A_NUMBER('D', 38), 20, 2 }, /* FSCLKST */ - { PIN_A_NUMBER('R', 30), 4, 2 }, /* TMS */ + { PIN_DU_DOTCLKIN3, 24, 2 }, /* DU_DOTCLKIN3 */ + { PIN_FSCLKST, 20, 2 }, /* FSCLKST */ + { PIN_TMS, 4, 2 }, /* TMS */ } }, { PINMUX_DRIVE_REG("DRVCTRL13", 0xe6060334) { - { PIN_A_NUMBER('T', 28), 28, 2 }, /* TDO */ - { PIN_A_NUMBER('T', 30), 24, 2 }, /* ASEBRK */ - { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ - { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ - { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ - { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ - { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ - { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ + { PIN_TDO, 28, 2 }, /* TDO */ + { PIN_ASEBRK, 24, 2 }, /* ASEBRK */ + { RCAR_GP_PIN(3, 0), 20, 3 }, /* SD0_CLK */ + { RCAR_GP_PIN(3, 1), 16, 3 }, /* SD0_CMD */ + { RCAR_GP_PIN(3, 2), 12, 3 }, /* SD0_DAT0 */ + { RCAR_GP_PIN(3, 3), 8, 3 }, /* SD0_DAT1 */ + { RCAR_GP_PIN(3, 4), 4, 3 }, /* SD0_DAT2 */ + { RCAR_GP_PIN(3, 5), 0, 3 }, /* SD0_DAT3 */ } }, { PINMUX_DRIVE_REG("DRVCTRL14", 0xe6060338) { { RCAR_GP_PIN(3, 6), 28, 3 }, /* SD1_CLK */ @@ -6101,7 +6163,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { { RCAR_GP_PIN(5, 23), 16, 3 }, /* MLB_CLK */ { RCAR_GP_PIN(5, 24), 12, 3 }, /* MLB_SIG */ { RCAR_GP_PIN(5, 25), 8, 3 }, /* MLB_DAT */ - { PIN_NUMBER('H', 37), 4, 3 }, /* MLB_REF */ + { PIN_MLB_REF, 4, 3 }, /* MLB_REF */ { RCAR_GP_PIN(6, 0), 0, 3 }, /* SSI_SCK01239 */ } }, { PINMUX_DRIVE_REG("DRVCTRL21", 0xe6060354) { @@ -6174,35 +6236,35 @@ static int r8a77965_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *po static const struct pinmux_bias_reg pinmux_bias_regs[] = { { PINMUX_BIAS_REG("PUEN0", 0xe6060400, "PUD0", 0xe6060440) { - [ 0] = PIN_NUMBER('W', 3), /* QSPI0_SPCLK */ - [ 1] = PIN_A_NUMBER('C', 5), /* QSPI0_MOSI_IO0 */ - [ 2] = PIN_A_NUMBER('B', 4), /* QSPI0_MISO_IO1 */ - [ 3] = PIN_NUMBER('Y', 6), /* QSPI0_IO2 */ - [ 4] = PIN_A_NUMBER('B', 6), /* QSPI0_IO3 */ - [ 5] = PIN_NUMBER('Y', 3), /* QSPI0_SSL */ - [ 6] = PIN_NUMBER('V', 3), /* QSPI1_SPCLK */ - [ 7] = PIN_A_NUMBER('C', 7), /* QSPI1_MOSI_IO0 */ - [ 8] = PIN_A_NUMBER('E', 5), /* QSPI1_MISO_IO1 */ - [ 9] = PIN_A_NUMBER('E', 4), /* QSPI1_IO2 */ - [10] = PIN_A_NUMBER('C', 3), /* QSPI1_IO3 */ - [11] = PIN_NUMBER('V', 5), /* QSPI1_SSL */ - [12] = PIN_NUMBER('Y', 7), /* RPC_INT# */ - [13] = PIN_NUMBER('V', 6), /* RPC_WP# */ - [14] = PIN_NUMBER('V', 7), /* RPC_RESET# */ - [15] = PIN_NUMBER('A', 16), /* AVB_RX_CTL */ - [16] = PIN_NUMBER('B', 19), /* AVB_RXC */ - [17] = PIN_NUMBER('A', 13), /* AVB_RD0 */ - [18] = PIN_NUMBER('B', 13), /* AVB_RD1 */ - [19] = PIN_NUMBER('A', 14), /* AVB_RD2 */ - [20] = PIN_NUMBER('B', 14), /* AVB_RD3 */ - [21] = PIN_NUMBER('A', 8), /* AVB_TX_CTL */ - [22] = PIN_NUMBER('A', 19), /* AVB_TXC */ - [23] = PIN_NUMBER('A', 18), /* AVB_TD0 */ - [24] = PIN_NUMBER('B', 18), /* AVB_TD1 */ - [25] = PIN_NUMBER('A', 17), /* AVB_TD2 */ - [26] = PIN_NUMBER('B', 17), /* AVB_TD3 */ - [27] = PIN_NUMBER('A', 12), /* AVB_TXCREFCLK */ - [28] = PIN_NUMBER('A', 9), /* AVB_MDIO */ + [ 0] = PIN_QSPI0_SPCLK, /* QSPI0_SPCLK */ + [ 1] = PIN_QSPI0_MOSI_IO0, /* QSPI0_MOSI_IO0 */ + [ 2] = PIN_QSPI0_MISO_IO1, /* QSPI0_MISO_IO1 */ + [ 3] = PIN_QSPI0_IO2, /* QSPI0_IO2 */ + [ 4] = PIN_QSPI0_IO3, /* QSPI0_IO3 */ + [ 5] = PIN_QSPI0_SSL, /* QSPI0_SSL */ + [ 6] = PIN_QSPI1_SPCLK, /* QSPI1_SPCLK */ + [ 7] = PIN_QSPI1_MOSI_IO0, /* QSPI1_MOSI_IO0 */ + [ 8] = PIN_QSPI1_MISO_IO1, /* QSPI1_MISO_IO1 */ + [ 9] = PIN_QSPI1_IO2, /* QSPI1_IO2 */ + [10] = PIN_QSPI1_IO3, /* QSPI1_IO3 */ + [11] = PIN_QSPI1_SSL, /* QSPI1_SSL */ + [12] = PIN_RPC_INT_N, /* RPC_INT# */ + [13] = PIN_RPC_WP_N, /* RPC_WP# */ + [14] = PIN_RPC_RESET_N, /* RPC_RESET# */ + [15] = PIN_AVB_RX_CTL, /* AVB_RX_CTL */ + [16] = PIN_AVB_RXC, /* AVB_RXC */ + [17] = PIN_AVB_RD0, /* AVB_RD0 */ + [18] = PIN_AVB_RD1, /* AVB_RD1 */ + [19] = PIN_AVB_RD2, /* AVB_RD2 */ + [20] = PIN_AVB_RD3, /* AVB_RD3 */ + [21] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ + [22] = PIN_AVB_TXC, /* AVB_TXC */ + [23] = PIN_AVB_TD0, /* AVB_TD0 */ + [24] = PIN_AVB_TD1, /* AVB_TD1 */ + [25] = PIN_AVB_TD2, /* AVB_TD2 */ + [26] = PIN_AVB_TD3, /* AVB_TD3 */ + [27] = PIN_AVB_TXCREFCLK, /* AVB_TXCREFCLK */ + [28] = PIN_AVB_MDIO, /* AVB_MDIO */ [29] = RCAR_GP_PIN(2, 9), /* AVB_MDC */ [30] = RCAR_GP_PIN(2, 10), /* AVB_MAGIC */ [31] = RCAR_GP_PIN(2, 11), /* AVB_PHY_INT */ @@ -6251,7 +6313,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 6] = RCAR_GP_PIN(1, 25), /* WE0_N */ [ 7] = RCAR_GP_PIN(1, 26), /* WE1_N */ [ 8] = RCAR_GP_PIN(1, 27), /* EX_WAIT0_A */ - [ 9] = PIN_NUMBER('C', 1), /* PRESETOUT# */ + [ 9] = PIN_PRESETOUT_N, /* PRESETOUT# */ [10] = RCAR_GP_PIN(0, 0), /* D0 */ [11] = RCAR_GP_PIN(0, 1), /* D1 */ [12] = RCAR_GP_PIN(0, 2), /* D2 */ @@ -6272,20 +6334,20 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [27] = RCAR_GP_PIN(7, 1), /* AVS2 */ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */ - [30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */ - [31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */ + [30] = PIN_DU_DOTCLKIN0, /* DU_DOTCLKIN0 */ + [31] = PIN_DU_DOTCLKIN1, /* DU_DOTCLKIN1 */ } }, { PINMUX_BIAS_REG("PUEN3", 0xe606040c, "PUD3", 0xe606044c) { - [ 0] = PIN_A_NUMBER('R', 8), /* DU_DOTCLKIN3 */ - [ 1] = PIN_NONE, - [ 2] = PIN_A_NUMBER('D', 38), /* FSCLKST */ - [ 3] = PIN_A_NUMBER('D', 39), /* EXTALR*/ - [ 4] = PIN_A_NUMBER('R', 26), /* TRST# */ - [ 5] = PIN_A_NUMBER('T', 27), /* TCK */ - [ 6] = PIN_A_NUMBER('R', 30), /* TMS */ - [ 7] = PIN_A_NUMBER('R', 29), /* TDI */ - [ 8] = PIN_NONE, - [ 9] = PIN_A_NUMBER('T', 30), /* ASEBRK */ + [ 0] = SH_PFC_PIN_NONE, + [ 1] = PIN_DU_DOTCLKIN3, /* DU_DOTCLKIN3 */ + [ 2] = PIN_FSCLKST, /* FSCLKST */ + [ 3] = PIN_EXTALR, /* EXTALR*/ + [ 4] = PIN_TRST_N, /* TRST# */ + [ 5] = PIN_TCK, /* TCK */ + [ 6] = PIN_TMS, /* TMS */ + [ 7] = PIN_TDI, /* TDI */ + [ 8] = SH_PFC_PIN_NONE, + [ 9] = PIN_ASEBRK, /* ASEBRK */ [10] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ [11] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [12] = RCAR_GP_PIN(3, 2), /* SD0_DAT0 */ @@ -6350,7 +6412,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 3] = RCAR_GP_PIN(5, 23), /* MLB_CLK */ [ 4] = RCAR_GP_PIN(5, 24), /* MLB_SIG */ [ 5] = RCAR_GP_PIN(5, 25), /* MLB_DAT */ - [ 6] = PIN_NUMBER('H', 37), /* MLB_REF */ + [ 6] = PIN_MLB_REF, /* MLB_REF */ [ 7] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ [ 8] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [ 9] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ @@ -6385,31 +6447,31 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [ 4] = RCAR_GP_PIN(6, 29), /* USB30_OVC */ [ 5] = RCAR_GP_PIN(6, 30), /* GP6_30 */ [ 6] = RCAR_GP_PIN(6, 31), /* GP6_31 */ - [ 7] = PIN_NONE, - [ 8] = PIN_NONE, - [ 9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, - [30] = PIN_NONE, - [31] = PIN_NONE, + [ 7] = SH_PFC_PIN_NONE, + [ 8] = SH_PFC_PIN_NONE, + [ 9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, + [30] = SH_PFC_PIN_NONE, + [31] = SH_PFC_PIN_NONE, } }, { /* sentinel */ }, }; diff --git a/drivers/pinctrl/renesas/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c index 33ecd93398..4e6f406214 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77970.c +++ b/drivers/pinctrl/renesas/pfc-r8a77970.c @@ -5,7 +5,7 @@ * Copyright (C) 2016 Renesas Electronics Corp. * Copyright (C) 2017 Cogent Embedded, Inc. <source@cogentembedded.com> * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -20,7 +20,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_28(1, fn, sfx), \ PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ @@ -206,8 +206,8 @@ #define IP6_19_16 FM(VI1_DATA8) F_(0, 0) FM(CTS4_N) FM(D11) FM(MMC_D5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP6_23_20 FM(VI1_DATA9) F_(0, 0) FM(RTS4_N) FM(D12) FM(MMC_D6) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP6_27_24 FM(VI1_DATA10) F_(0, 0) F_(0, 0) FM(D13) FM(MMC_D7) FM(SDA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) FM(MMC_WP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) -#define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) FM(MMC_CD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_31_28 FM(VI1_DATA11) FM(SCL4) FM(IRQ4) FM(D14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_3_0 FM(VI1_FIELD) FM(SDA4) FM(IRQ5) FM(D15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP7_7_4 FM(SCL0) FM(DU_DR0) FM(TPU0TO0) FM(CLKOUT) F_(0, 0) FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP7_11_8 FM(SDA0) FM(DU_DR1) FM(TPU0TO1) FM(BS_N) FM(SCK0) FM(MSIOF0_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) #define IP7_15_12 FM(SCL1) FM(DU_DG0) FM(TPU0TO2) FM(RD_N) FM(CTS0_N) FM(MSIOF0_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) @@ -632,14 +632,12 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_GPSR(IP6_31_28, SCL4), PINMUX_IPSR_GPSR(IP6_31_28, IRQ4), PINMUX_IPSR_GPSR(IP6_31_28, D14), - PINMUX_IPSR_GPSR(IP6_31_28, MMC_WP), /* IPSR7 */ PINMUX_IPSR_GPSR(IP7_3_0, VI1_FIELD), PINMUX_IPSR_GPSR(IP7_3_0, SDA4), PINMUX_IPSR_GPSR(IP7_3_0, IRQ5), PINMUX_IPSR_GPSR(IP7_3_0, D15), - PINMUX_IPSR_GPSR(IP7_3_0, MMC_CD), PINMUX_IPSR_GPSR(IP7_7_4, SCL0), PINMUX_IPSR_GPSR(IP7_7_4, DU_DR0), @@ -1122,20 +1120,6 @@ static const unsigned int mmc_ctrl_pins[] = { static const unsigned int mmc_ctrl_mux[] = { MMC_CLK_MARK, MMC_CMD_MARK, }; -static const unsigned int mmc_cd_pins[] = { - /* CD */ - RCAR_GP_PIN(3, 16), -}; -static const unsigned int mmc_cd_mux[] = { - MMC_CD_MARK, -}; -static const unsigned int mmc_wp_pins[] = { - /* WP */ - RCAR_GP_PIN(3, 15), -}; -static const unsigned int mmc_wp_mux[] = { - MMC_WP_MARK, -}; /* - MSIOF0 ----------------------------------------------------------------- */ static const unsigned int msiof0_clk_pins[] = { @@ -1433,6 +1417,64 @@ static const unsigned int qspi1_data4_mux[] = { QSPI1_IO2_MARK, QSPI1_IO3_MARK }; +/* - RPC -------------------------------------------------------------------- */ +static const unsigned int rpc_clk1_pins[] = { + /* Octal-SPI flash: C/SCLK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int rpc_clk1_mux[] = { + QSPI0_SPCLK_MARK, +}; +static const unsigned int rpc_clk2_pins[] = { + /* HyperFlash: CK, CK# */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 6), +}; +static const unsigned int rpc_clk2_mux[] = { + QSPI0_SPCLK_MARK, QSPI1_SPCLK_MARK, +}; +static const unsigned int rpc_ctrl_pins[] = { + /* Octal-SPI flash: S#/CS, DQS */ + /* HyperFlash: CS#, RDS */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11), +}; +static const unsigned int rpc_ctrl_mux[] = { + QSPI0_SSL_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int rpc_data_pins[] = { + /* DQ[0:7] */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), + RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), + RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), + RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), +}; +static const unsigned int rpc_data_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; +static const unsigned int rpc_reset_pins[] = { + /* RPC_RESET# */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int rpc_reset_mux[] = { + RPC_RESET_N_MARK, +}; +static const unsigned int rpc_int_pins[] = { + /* RPC_INT# */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int rpc_int_mux[] = { + RPC_INT_N_MARK, +}; +static const unsigned int rpc_wp_pins[] = { + /* RPC_WP# */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int rpc_wp_mux[] = { + RPC_WP_N_MARK, +}; + /* - SCIF Clock ------------------------------------------------------------- */ static const unsigned int scif_clk_a_pins[] = { /* SCIF_CLK */ @@ -1727,8 +1769,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(mmc_data4), SH_PFC_PIN_GROUP(mmc_data8), SH_PFC_PIN_GROUP(mmc_ctrl), - SH_PFC_PIN_GROUP(mmc_cd), - SH_PFC_PIN_GROUP(mmc_wp), SH_PFC_PIN_GROUP(msiof0_clk), SH_PFC_PIN_GROUP(msiof0_sync), SH_PFC_PIN_GROUP(msiof0_ss1), @@ -1769,6 +1809,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(qspi1_ctrl), SH_PFC_PIN_GROUP(qspi1_data2), SH_PFC_PIN_GROUP(qspi1_data4), + SH_PFC_PIN_GROUP(rpc_clk1), + SH_PFC_PIN_GROUP(rpc_clk2), + SH_PFC_PIN_GROUP(rpc_ctrl), + SH_PFC_PIN_GROUP(rpc_data), + SH_PFC_PIN_GROUP(rpc_reset), + SH_PFC_PIN_GROUP(rpc_int), + SH_PFC_PIN_GROUP(rpc_wp), SH_PFC_PIN_GROUP(scif_clk_a), SH_PFC_PIN_GROUP(scif_clk_b), SH_PFC_PIN_GROUP(scif0_data), @@ -1898,8 +1945,6 @@ static const char * const mmc_groups[] = { "mmc_data4", "mmc_data8", "mmc_ctrl", - "mmc_cd", - "mmc_wp", }; static const char * const msiof0_groups[] = { @@ -1975,6 +2020,16 @@ static const char * const qspi1_groups[] = { "qspi1_data4", }; +static const char * const rpc_groups[] = { + "rpc_clk1", + "rpc_clk2", + "rpc_ctrl", + "rpc_data", + "rpc_reset", + "rpc_int", + "rpc_wp", +}; + static const char * const scif_clk_groups[] = { "scif_clk_a", "scif_clk_b", @@ -2060,6 +2115,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), + SH_PFC_FUNCTION(rpc), SH_PFC_FUNCTION(scif_clk), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c index 32efb4409c..2d15500f0f 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77980.c +++ b/drivers/pinctrl/renesas/pfc-r8a77980.c @@ -5,7 +5,7 @@ * Copyright (C) 2018 Renesas Electronics Corp. * Copyright (C) 2018 Cogent Embedded, Inc. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7795.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -20,7 +20,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_28(1, fn, sfx), \ PORT_GP_CFG_30(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ @@ -1711,6 +1711,64 @@ static const unsigned int qspi1_data4_mux[] = { QSPI1_IO2_MARK, QSPI1_IO3_MARK }; +/* - RPC -------------------------------------------------------------------- */ +static const unsigned int rpc_clk1_pins[] = { + /* Octal-SPI flash: C/SCLK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int rpc_clk1_mux[] = { + QSPI0_SPCLK_MARK, +}; +static const unsigned int rpc_clk2_pins[] = { + /* HyperFlash: CK, CK# */ + RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 6), +}; +static const unsigned int rpc_clk2_mux[] = { + QSPI0_SPCLK_MARK, QSPI1_SPCLK_MARK, +}; +static const unsigned int rpc_ctrl_pins[] = { + /* Octal-SPI flash: S#/CS, DQS */ + /* HyperFlash: CS#, RDS */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 11), +}; +static const unsigned int rpc_ctrl_mux[] = { + QSPI0_SSL_MARK, QSPI1_SSL_MARK, +}; +static const unsigned int rpc_data_pins[] = { + /* DQ[0:7] */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), + RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 4), + RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), + RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), +}; +static const unsigned int rpc_data_mux[] = { + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK, + QSPI0_IO2_MARK, QSPI0_IO3_MARK, + QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK, + QSPI1_IO2_MARK, QSPI1_IO3_MARK, +}; +static const unsigned int rpc_reset_pins[] = { + /* RPC_RESET# */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int rpc_reset_mux[] = { + RPC_RESET_N_MARK, +}; +static const unsigned int rpc_int_pins[] = { + /* RPC_INT# */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int rpc_int_mux[] = { + RPC_INT_N_MARK, +}; +static const unsigned int rpc_wp_pins[] = { + /* RPC_WP# */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int rpc_wp_mux[] = { + RPC_WP_N_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX0, TX0 */ @@ -2127,6 +2185,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(qspi1_ctrl), SH_PFC_PIN_GROUP(qspi1_data2), SH_PFC_PIN_GROUP(qspi1_data4), + SH_PFC_PIN_GROUP(rpc_clk1), + SH_PFC_PIN_GROUP(rpc_clk2), + SH_PFC_PIN_GROUP(rpc_ctrl), + SH_PFC_PIN_GROUP(rpc_data), + SH_PFC_PIN_GROUP(rpc_reset), + SH_PFC_PIN_GROUP(rpc_int), + SH_PFC_PIN_GROUP(rpc_wp), SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -2363,6 +2428,16 @@ static const char * const qspi1_groups[] = { "qspi1_data4", }; +static const char * const rpc_groups[] = { + "rpc_clk1", + "rpc_clk2", + "rpc_ctrl", + "rpc_data", + "rpc_reset", + "rpc_int", + "rpc_wp", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -2461,6 +2536,7 @@ static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(pwm4), SH_PFC_FUNCTION(qspi0), SH_PFC_FUNCTION(qspi1), + SH_PFC_FUNCTION(rpc), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif3), diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c index 572b041b83..78b46de041 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -4,7 +4,7 @@ * * Copyright (C) 2018-2019 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R8A7796 processor support - PFC hardware block. * @@ -20,10 +20,9 @@ #include "sh_pfc.h" -#define CFG_FLAGS (SH_PFC_PIN_CFG_PULL_UP | \ - SH_PFC_PIN_CFG_PULL_DOWN) +#define CFG_FLAGS (SH_PFC_PIN_CFG_PULL_UP_DOWN) -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_23(1, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_26(2, fn, sfx, CFG_FLAGS), \ @@ -44,6 +43,25 @@ PORT_GP_CFG_1(6, 15, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(6, 16, fn, sfx, CFG_FLAGS), \ PORT_GP_CFG_1(6, 17, fn, sfx, CFG_FLAGS) + +#define CPU_ALL_NOGP(fn) \ + PIN_NOGP_CFG(ASEBRK, "ASEBRK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDC, "AVB_MDC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_MDIO, "AVB_MDIO", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD0, "AVB_TD0", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD1, "AVB_TD1", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD2, "AVB_TD2", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TD3, "AVB_TD3", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TXC, "AVB_TXC", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(AVB_TX_CTL, "AVB_TX_CTL", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(FSCLKST_N, "FSCLKST_N", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(MLB_REF, "MLB_REF", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(PRESETOUT_N, "PRESETOUT_N", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TCK, "TCK", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TDI, "TDI", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TMS, "TMS", fn, CFG_FLAGS), \ + PIN_NOGP_CFG(TRST_N, "TRST_N", fn, CFG_FLAGS) + /* * F_() : just information * FM() : macro for FN_xxx / xxx_MARK @@ -1283,41 +1301,16 @@ static const u16 pinmux_data[] = { }; /* - * R8A77990 has 7 banks with 32 GPIOs in each => 224 GPIOs. - * Physical layout rows: A - AE, cols: 1 - 25. + * Pins not associated with a GPIO port. */ -#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r)) -#define PIN_NUMBER(r, c) (((r) - 'A') * 25 + (c) + 300) -#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c) -#define PIN_NONE U16_MAX +enum { + GP_ASSIGN_LAST(), + NOGP_ALL(), +}; static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - - /* - * Pins not associated with a GPIO port. - * - * The pin positions are different between different R8A77990 - * packages, all that is needed for the pfc driver is a unique - * number for each pin. To this end use the pin layout from - * R8A77990 to calculate a unique number for each pin. - */ - SH_PFC_PIN_NAMED_CFG('F', 1, TRST_N, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('F', 3, TMS, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('F', 4, TCK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('G', 2, TDI, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('G', 3, FSCLKST_N, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('H', 1, ASEBRK, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 1, AVB_TXC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 2, AVB_TD0, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 3, AVB_TD1, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 5, AVB_TD2, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('N', 6, AVB_TD3, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('P', 3, AVB_TX_CTL, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('P', 4, AVB_MDIO, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('P', 5, AVB_MDC, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG('T', 21, MLB_REF, CFG_FLAGS), - SH_PFC_PIN_NAMED_CFG(ROW_GROUP_A('D'), 3, PRESETOUT_N, CFG_FLAGS), + PINMUX_NOGP_ALL(), }; /* - AUDIO CLOCK ------------------------------------------------------------ */ @@ -5115,15 +5108,15 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [0] = RCAR_GP_PIN(2, 23), /* RD# */ [1] = RCAR_GP_PIN(2, 22), /* BS# */ [2] = RCAR_GP_PIN(2, 21), /* AVB_PHY_INT */ - [3] = PIN_NUMBER('P', 5), /* AVB_MDC */ - [4] = PIN_NUMBER('P', 4), /* AVB_MDIO */ + [3] = PIN_AVB_MDC, /* AVB_MDC */ + [4] = PIN_AVB_MDIO, /* AVB_MDIO */ [5] = RCAR_GP_PIN(2, 20), /* AVB_TXCREFCLK */ - [6] = PIN_NUMBER('N', 6), /* AVB_TD3 */ - [7] = PIN_NUMBER('N', 5), /* AVB_TD2 */ - [8] = PIN_NUMBER('N', 3), /* AVB_TD1 */ - [9] = PIN_NUMBER('N', 2), /* AVB_TD0 */ - [10] = PIN_NUMBER('N', 1), /* AVB_TXC */ - [11] = PIN_NUMBER('P', 3), /* AVB_TX_CTL */ + [6] = PIN_AVB_TD3, /* AVB_TD3 */ + [7] = PIN_AVB_TD2, /* AVB_TD2 */ + [8] = PIN_AVB_TD1, /* AVB_TD1 */ + [9] = PIN_AVB_TD0, /* AVB_TD0 */ + [10] = PIN_AVB_TXC, /* AVB_TXC */ + [11] = PIN_AVB_TX_CTL, /* AVB_TX_CTL */ [12] = RCAR_GP_PIN(2, 19), /* AVB_RD3 */ [13] = RCAR_GP_PIN(2, 18), /* AVB_RD2 */ [14] = RCAR_GP_PIN(2, 17), /* AVB_RD1 */ @@ -5174,33 +5167,33 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [25] = RCAR_GP_PIN(1, 2), /* A2 */ [26] = RCAR_GP_PIN(1, 1), /* A1 */ [27] = RCAR_GP_PIN(1, 0), /* A0 */ - [28] = PIN_NONE, - [29] = PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, [30] = RCAR_GP_PIN(2, 25), /* PUEN_EX_WAIT0 */ [31] = RCAR_GP_PIN(2, 24), /* PUEN_RD/WR# */ } }, { PINMUX_BIAS_REG("PUEN2", 0xe6060408, "PUD2", 0xe6060448) { [0] = RCAR_GP_PIN(3, 1), /* SD0_CMD */ [1] = RCAR_GP_PIN(3, 0), /* SD0_CLK */ - [2] = PIN_NUMBER('H', 1), /* ASEBRK */ - [3] = PIN_NONE, - [4] = PIN_NUMBER('G', 2), /* TDI */ - [5] = PIN_NUMBER('F', 3), /* TMS */ - [6] = PIN_NUMBER('F', 4), /* TCK */ - [7] = PIN_NUMBER('F', 1), /* TRST# */ - [8] = PIN_NONE, - [9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NUMBER('G', 3), /* FSCLKST# */ + [2] = PIN_ASEBRK, /* ASEBRK */ + [3] = SH_PFC_PIN_NONE, + [4] = PIN_TDI, /* TDI */ + [5] = PIN_TMS, /* TMS */ + [6] = PIN_TCK, /* TCK */ + [7] = PIN_TRST_N, /* TRST# */ + [8] = SH_PFC_PIN_NONE, + [9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = PIN_FSCLKST_N, /* FSCLKST# */ [16] = RCAR_GP_PIN(0, 17), /* SDA4 */ [17] = RCAR_GP_PIN(0, 16), /* SCL4 */ - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_A_NUMBER('D', 3), /* PRESETOUT# */ + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = PIN_PRESETOUT_N, /* PRESETOUT# */ [21] = RCAR_GP_PIN(0, 15), /* D15 */ [22] = RCAR_GP_PIN(0, 14), /* D14 */ [23] = RCAR_GP_PIN(0, 13), /* D13 */ @@ -5219,8 +5212,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [2] = RCAR_GP_PIN(5, 3), /* CTS0#_A */ [3] = RCAR_GP_PIN(5, 2), /* TX0_A */ [4] = RCAR_GP_PIN(5, 1), /* RX0_A */ - [5] = PIN_NONE, - [6] = PIN_NONE, + [5] = SH_PFC_PIN_NONE, + [6] = SH_PFC_PIN_NONE, [7] = RCAR_GP_PIN(3, 15), /* SD1_WP */ [8] = RCAR_GP_PIN(3, 14), /* SD1_CD */ [9] = RCAR_GP_PIN(3, 13), /* SD0_WP */ @@ -5264,7 +5257,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [13] = RCAR_GP_PIN(6, 2), /* SSI_SDATA0 */ [14] = RCAR_GP_PIN(6, 1), /* SSI_WS01239 */ [15] = RCAR_GP_PIN(6, 0), /* SSI_SCK01239 */ - [16] = PIN_NUMBER('T', 21), /* MLB_REF */ + [16] = PIN_MLB_REF, /* MLB_REF */ [17] = RCAR_GP_PIN(5, 19), /* MLB_DAT */ [18] = RCAR_GP_PIN(5, 18), /* MLB_SIG */ [19] = RCAR_GP_PIN(5, 17), /* MLB_CLK */ @@ -5282,36 +5275,36 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { [31] = RCAR_GP_PIN(5, 5), /* RX1 */ } }, { PINMUX_BIAS_REG("PUEN5", 0xe6060414, "PUD5", 0xe6060454) { - [0] = PIN_NONE, - [1] = PIN_NONE, - [2] = PIN_NONE, - [3] = PIN_NONE, - [4] = PIN_NONE, - [5] = PIN_NONE, - [6] = PIN_NONE, - [7] = PIN_NONE, - [8] = PIN_NONE, - [9] = PIN_NONE, - [10] = PIN_NONE, - [11] = PIN_NONE, - [12] = PIN_NONE, - [13] = PIN_NONE, - [14] = PIN_NONE, - [15] = PIN_NONE, - [16] = PIN_NONE, - [17] = PIN_NONE, - [18] = PIN_NONE, - [19] = PIN_NONE, - [20] = PIN_NONE, - [21] = PIN_NONE, - [22] = PIN_NONE, - [23] = PIN_NONE, - [24] = PIN_NONE, - [25] = PIN_NONE, - [26] = PIN_NONE, - [27] = PIN_NONE, - [28] = PIN_NONE, - [29] = PIN_NONE, + [0] = SH_PFC_PIN_NONE, + [1] = SH_PFC_PIN_NONE, + [2] = SH_PFC_PIN_NONE, + [3] = SH_PFC_PIN_NONE, + [4] = SH_PFC_PIN_NONE, + [5] = SH_PFC_PIN_NONE, + [6] = SH_PFC_PIN_NONE, + [7] = SH_PFC_PIN_NONE, + [8] = SH_PFC_PIN_NONE, + [9] = SH_PFC_PIN_NONE, + [10] = SH_PFC_PIN_NONE, + [11] = SH_PFC_PIN_NONE, + [12] = SH_PFC_PIN_NONE, + [13] = SH_PFC_PIN_NONE, + [14] = SH_PFC_PIN_NONE, + [15] = SH_PFC_PIN_NONE, + [16] = SH_PFC_PIN_NONE, + [17] = SH_PFC_PIN_NONE, + [18] = SH_PFC_PIN_NONE, + [19] = SH_PFC_PIN_NONE, + [20] = SH_PFC_PIN_NONE, + [21] = SH_PFC_PIN_NONE, + [22] = SH_PFC_PIN_NONE, + [23] = SH_PFC_PIN_NONE, + [24] = SH_PFC_PIN_NONE, + [25] = SH_PFC_PIN_NONE, + [26] = SH_PFC_PIN_NONE, + [27] = SH_PFC_PIN_NONE, + [28] = SH_PFC_PIN_NONE, + [29] = SH_PFC_PIN_NONE, [30] = RCAR_GP_PIN(6, 9), /* PUEN_USB30_OVC */ [31] = RCAR_GP_PIN(6, 17), /* PUEN_USB30_PWEN */ } }, diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c index 724cf4ae3c..4ff1b76588 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77995.c +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c @@ -4,7 +4,7 @@ * * Copyright (C) 2017 Renesas Electronics Corp. * - * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * This file is based on the drivers/pinctrl/renesas/pfc-r8a7796.c * * R-Car Gen3 processor support - PFC hardware block. * @@ -19,7 +19,7 @@ #include "sh_pfc.h" -#define CPU_ALL_PORT(fn, sfx) \ +#define CPU_ALL_GP(fn, sfx) \ PORT_GP_9(0, fn, sfx), \ PORT_GP_32(1, fn, sfx), \ PORT_GP_32(2, fn, sfx), \ diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index d5a245f4fd..48d737a141 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -1,11 +1,8 @@ -/* +/* SPDX-License-Identifier: GPL-2.0 + * * SuperH Pin Function Controller Support * * Copyright (c) 2008 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. */ #ifndef __SH_PFC_H @@ -21,19 +18,32 @@ enum { PINMUX_TYPE_INPUT, }; +#define SH_PFC_PIN_NONE U16_MAX + #define SH_PFC_PIN_CFG_INPUT (1 << 0) #define SH_PFC_PIN_CFG_OUTPUT (1 << 1) #define SH_PFC_PIN_CFG_PULL_UP (1 << 2) #define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) +#define SH_PFC_PIN_CFG_PULL_UP_DOWN (SH_PFC_PIN_CFG_PULL_UP | \ + SH_PFC_PIN_CFG_PULL_DOWN) #define SH_PFC_PIN_CFG_IO_VOLTAGE (1 << 4) #define SH_PFC_PIN_CFG_DRIVE_STRENGTH (1 << 5) + +#define SH_PFC_PIN_VOLTAGE_18_33 (0 << 6) +#define SH_PFC_PIN_VOLTAGE_25_33 (1 << 6) + +#define SH_PFC_PIN_CFG_IO_VOLTAGE_18_33 (SH_PFC_PIN_CFG_IO_VOLTAGE | \ + SH_PFC_PIN_VOLTAGE_18_33) +#define SH_PFC_PIN_CFG_IO_VOLTAGE_25_33 (SH_PFC_PIN_CFG_IO_VOLTAGE | \ + SH_PFC_PIN_VOLTAGE_25_33) + #define SH_PFC_PIN_CFG_NO_GPIO (1 << 31) struct sh_pfc_pin { - u16 pin; - u16 enum_id; const char *name; unsigned int configs; + u16 pin; + u16 enum_id; }; #define SH_PFC_PIN_GROUP_ALIAS(alias, n) \ @@ -393,12 +403,12 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; /* * Describe a pinmux configuration in which a pin is physically multiplexed * with other pins. - * - ipsr: IPSR field (unused, for documentation purposes only) + * - ipsr: IPSR field * - fn: Function name * - psel: Physical multiplexing selector */ #define PINMUX_IPSR_PHYS(ipsr, fn, psel) \ - PINMUX_DATA(fn##_MARK, FN_##psel) + PINMUX_DATA(fn##_MARK, FN_##psel, FN_##ipsr) /* * Describe a pinmux configuration for a single-function pin with GPIO @@ -416,9 +426,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; fn(bank, pin, GP_##bank##_##pin, sfx, cfg) #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) -#define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_2(bank, fn, sfx, cfg) \ PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 1, fn, sfx, cfg) +#define PORT_GP_2(bank, fn, sfx) PORT_GP_CFG_2(bank, fn, sfx, 0) + +#define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ + PORT_GP_CFG_2(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 3, fn, sfx, cfg) #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) @@ -517,9 +531,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT_GP_CFG_1(bank, 25, fn, sfx, cfg) #define PORT_GP_26(bank, fn, sfx) PORT_GP_CFG_26(bank, fn, sfx, 0) -#define PORT_GP_CFG_28(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_27(bank, fn, sfx, cfg) \ PORT_GP_CFG_26(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 26, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 26, fn, sfx, cfg) +#define PORT_GP_27(bank, fn, sfx) PORT_GP_CFG_27(bank, fn, sfx, 0) + +#define PORT_GP_CFG_28(bank, fn, sfx, cfg) \ + PORT_GP_CFG_27(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 27, fn, sfx, cfg) #define PORT_GP_28(bank, fn, sfx) PORT_GP_CFG_28(bank, fn, sfx, 0) @@ -533,9 +551,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT_GP_CFG_1(bank, 29, fn, sfx, cfg) #define PORT_GP_30(bank, fn, sfx) PORT_GP_CFG_30(bank, fn, sfx, 0) -#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_31(bank, fn, sfx, cfg) \ PORT_GP_CFG_30(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 30, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 30, fn, sfx, cfg) +#define PORT_GP_31(bank, fn, sfx) PORT_GP_CFG_31(bank, fn, sfx, 0) + +#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ + PORT_GP_CFG_31(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 31, fn, sfx, cfg) #define PORT_GP_32(bank, fn, sfx) PORT_GP_CFG_32(bank, fn, sfx, 0) @@ -559,7 +581,7 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; /* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */ #define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx -#define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str) +#define GP_ALL(str) CPU_ALL_GP(_GP_ALL, str) /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */ #define _GP_GPIO(bank, _pin, _name, sfx, cfg) \ @@ -569,11 +591,29 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; .enum_id = _name##_DATA, \ .configs = cfg, \ } -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused) +#define PINMUX_GPIO_GP_ALL() CPU_ALL_GP(_GP_GPIO, unused) /* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */ #define _GP_DATA(bank, pin, name, sfx, cfg) PINMUX_DATA(name##_DATA, name##_FN) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused) +#define PINMUX_DATA_GP_ALL() CPU_ALL_GP(_GP_DATA, unused) + +/* + * GP_ASSIGN_LAST() - Expand to an enum definition for the last GP pin + * + * The largest GP pin index is obtained by taking the size of a union, + * containing one array per GP pin, sized by the corresponding pin index. + * As the fields in the CPU_ALL_GP() macro definition are separated by commas, + * while the members of a union must be terminated by semicolons, the commas + * are absorbed by wrapping them inside dummy attributes. + */ +#define _GP_ENTRY(bank, pin, name, sfx, cfg) \ + deprecated)); char name[(bank * 32) + pin] __attribute__((deprecated +#define GP_ASSIGN_LAST() \ + GP_LAST = sizeof(union { \ + char dummy[0] __attribute__((deprecated, \ + CPU_ALL_GP(_GP_ENTRY, unused), \ + deprecated)); \ + }) /* * PORT style (linear pin space) @@ -616,22 +656,6 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; .configs = cfgs, \ } -/* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */ -#define SH_PFC_PIN_NAMED(row, col, _name) \ - { \ - .pin = PIN_NUMBER(row, col), \ - .name = __stringify(PIN_##_name), \ - .configs = SH_PFC_PIN_CFG_NO_GPIO, \ - } - -/* SH_PFC_PIN_NAMED_CFG - Expand to a sh_pfc_pin entry with the given name */ -#define SH_PFC_PIN_NAMED_CFG(row, col, _name, cfgs) \ - { \ - .pin = PIN_NUMBER(row, col), \ - .name = __stringify(PIN_##_name), \ - .configs = SH_PFC_PIN_CFG_NO_GPIO | cfgs, \ - } - /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0, * PORT_name_OUT, PORT_name_IN marks */ @@ -640,6 +664,24 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT##pfx##_OUT, PORT##pfx##_IN) #define PINMUX_DATA_ALL() CPU_ALL_PORT(_PORT_DATA, , unused) +/* + * PORT_ASSIGN_LAST() - Expand to an enum definition for the last PORT pin + * + * The largest PORT pin index is obtained by taking the size of a union, + * containing one array per PORT pin, sized by the corresponding pin index. + * As the fields in the CPU_ALL_PORT() macro definition are separated by + * commas, while the members of a union must be terminated by semicolons, the + * commas are absorbed by wrapping them inside dummy attributes. + */ +#define _PORT_ENTRY(pn, pfx, sfx) \ + deprecated)); char pfx[pn] __attribute__((deprecated +#define PORT_ASSIGN_LAST() \ + PORT_LAST = sizeof(union { \ + char dummy[0] __attribute__((deprecated, \ + CPU_ALL_PORT(_PORT_ENTRY, PORT, unused), \ + deprecated)); \ + }) + /* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */ #define PINMUX_GPIO_FN(gpio, base, data_or_mark) \ [gpio - (base)] = { \ @@ -650,6 +692,26 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK) /* + * Pins not associated with a GPIO port + */ + +#define PIN_NOGP_CFG(pin, name, fn, cfg) fn(pin, name, cfg) +#define PIN_NOGP(pin, name, fn) fn(pin, name, 0) + +/* NOGP_ALL - Expand to a list of PIN_id */ +#define _NOGP_ALL(pin, name, cfg) PIN_##pin +#define NOGP_ALL() CPU_ALL_NOGP(_NOGP_ALL) + +/* PINMUX_NOGP_ALL - Expand to a list of sh_pfc_pin entries */ +#define _NOGP_PINMUX(_pin, _name, cfg) \ + { \ + .pin = PIN_##_pin, \ + .name = "PIN_" _name, \ + .configs = SH_PFC_PIN_CFG_NO_GPIO | cfg, \ + } +#define PINMUX_NOGP_ALL() CPU_ALL_NOGP(_NOGP_PINMUX) + +/* * PORTnCR helper macro for SH-Mobile/R-Mobile */ #define PORTCR(nr, reg) \ diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 17780066ae..fc81b07343 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -39,6 +39,7 @@ #define GQSPI_IXR_TXFULL_MASK 0x00000008 /* QSPI TX FIFO is full */ #define GQSPI_IXR_RXNEMTY_MASK 0x00000010 /* QSPI RX FIFO Not Empty */ #define GQSPI_IXR_GFEMTY_MASK 0x00000080 /* QSPI Generic FIFO Empty */ +#define GQSPI_IXR_GFNFULL_MASK 0x00000200 /* QSPI GENFIFO not full */ #define GQSPI_IXR_ALL_MASK (GQSPI_IXR_TXNFULL_MASK | \ GQSPI_IXR_RXNEMTY_MASK) @@ -238,9 +239,21 @@ static void zynqmp_qspi_fill_gen_fifo(struct zynqmp_qspi_priv *priv, u32 gqspi_fifo_reg) { struct zynqmp_qspi_regs *regs = priv->regs; + u32 config_reg, ier; int ret = 0; - ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFEMTY_MASK, 1, + config_reg = readl(®s->confr); + /* Manual start if needed */ + config_reg |= GQSPI_STRT_GEN_FIFO; + writel(config_reg, ®s->confr); + + /* Enable interrupts */ + ier = readl(®s->ier); + ier |= GQSPI_IXR_GFNFULL_MASK; + writel(ier, ®s->ier); + + /* Wait until the fifo is not full to write the new command */ + ret = wait_for_bit_le32(®s->isr, GQSPI_IXR_GFNFULL_MASK, 1, GQSPI_TIMEOUT, 1); if (ret) printf("%s Timeout\n", __func__); @@ -263,6 +276,9 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on) debug("GFIFO_CMD_CS: 0x%x\n", gqspi_fifo_reg); + /* Dummy generic FIFO entry */ + zynqmp_qspi_fill_gen_fifo(priv, 0); + zynqmp_qspi_fill_gen_fifo(priv, gqspi_fifo_reg); } diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 80743a2551..ee81dfa776 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -227,4 +227,11 @@ config MCHP_PIT64B_TIMER Select this to enable support for Microchip 64-bit periodic interval timer. +config IMX_GPT_TIMER + bool "NXP i.MX GPT timer support" + depends on TIMER + help + Select this to enable support for the timer found on + NXP i.MX devices. + endmenu diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index 2ebdeab0ce..e2bd530eb0 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -25,3 +25,4 @@ obj-$(CONFIG_STM32_TIMER) += stm32_timer.o obj-$(CONFIG_X86_TSC_TIMER) += tsc_timer.o obj-$(CONFIG_MTK_TIMER) += mtk_timer.o obj-$(CONFIG_MCHP_PIT64B_TIMER) += mchp-pit64b-timer.o +obj-$(CONFIG_IMX_GPT_TIMER) += imx-gpt-timer.o diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c new file mode 100644 index 0000000000..72be297754 --- /dev/null +++ b/drivers/timer/imx-gpt-timer.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <fdtdec.h> +#include <timer.h> +#include <dm/device_compat.h> + +#include <asm/io.h> + +#define GPT_CR_EN BIT(0) +#define GPT_CR_FRR BIT(9) +#define GPT_CR_EN_24M BIT(10) +#define GPT_CR_SWR BIT(15) + +#define GPT_PR_PRESCALER24M_MASK 0x0000F000 +#define GPT_PR_PRESCALER24M_SHIFT 12 +#define GPT_PR_PRESCALER24M_MAX (GPT_PR_PRESCALER24M_MASK >> GPT_PR_PRESCALER24M_SHIFT) +#define GPT_PR_PRESCALER_MASK 0x00000FFF +#define GPT_PR_PRESCALER_SHIFT 0 +#define GPT_PR_PRESCALER_MAX (GPT_PR_PRESCALER_MASK >> GPT_PR_PRESCALER_SHIFT) + +#define GPT_CLKSRC_IPG_CLK (1 << 6) +#define GPT_CLKSRC_IPG_CLK_24M (5 << 6) + +/* If CONFIG_SYS_HZ_CLOCK not specified et's default to 3Mhz */ +#ifndef CONFIG_SYS_HZ_CLOCK +#define CONFIG_SYS_HZ_CLOCK 3000000 +#endif + +struct imx_gpt_timer_regs { + u32 cr; + u32 pr; + u32 sr; + u32 ir; + u32 ocr1; + u32 ocr2; + u32 ocr3; + u32 icr1; + u32 icr2; + u32 cnt; +}; + +struct imx_gpt_timer_priv { + struct imx_gpt_timer_regs *base; +}; + +static u64 imx_gpt_timer_get_count(struct udevice *dev) +{ + struct imx_gpt_timer_priv *priv = dev_get_priv(dev); + struct imx_gpt_timer_regs *regs = priv->base; + + return timer_conv_64(readl(®s->cnt)); +} + +static int imx_gpt_setup(struct imx_gpt_timer_regs *regs, u32 rate) +{ + u32 prescaler = (rate / CONFIG_SYS_HZ_CLOCK) - 1; + + /* Reset the timer */ + setbits_le32(®s->cr, GPT_CR_SWR); + + /* Wait for timer to finish reset */ + while (readl(®s->cr) & GPT_CR_SWR) + ; + + if (rate == 24000000UL) { + /* Set timer frequency if using 24M clock source */ + if (prescaler > GPT_PR_PRESCALER24M_MAX) + return -EINVAL; + + /* Set 24M prescaler */ + writel((prescaler << GPT_PR_PRESCALER24M_SHIFT), ®s->pr); + /* Set Oscillator as clock source, enable 24M input and set gpt + * in free-running mode + */ + writel(GPT_CLKSRC_IPG_CLK_24M | GPT_CR_EN_24M | GPT_CR_FRR, ®s->cr); + } else { + if (prescaler > GPT_PR_PRESCALER_MAX) + return -EINVAL; + + /* Set prescaler */ + writel((prescaler << GPT_PR_PRESCALER_SHIFT), ®s->pr); + /* Set Peripheral as clock source and set gpt in free-running + * mode + */ + writel(GPT_CLKSRC_IPG_CLK | GPT_CR_FRR, ®s->cr); + } + + /* Start timer */ + setbits_le32(®s->cr, GPT_CR_EN); + + return 0; +} + +static int imx_gpt_timer_probe(struct udevice *dev) +{ + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct imx_gpt_timer_priv *priv = dev_get_priv(dev); + struct imx_gpt_timer_regs *regs; + struct clk clk; + fdt_addr_t addr; + u32 clk_rate; + int ret; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = (struct imx_gpt_timer_regs *)addr; + regs = priv->base; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) + return ret; + + ret = clk_enable(&clk); + if (ret) { + dev_err(dev, "Failed to enable clock\n"); + return ret; + } + + /* Get timer clock rate */ + clk_rate = clk_get_rate(&clk); + if (clk_rate <= 0) { + dev_err(dev, "Could not get clock rate...\n"); + return -EINVAL; + } + + ret = imx_gpt_setup(regs, clk_rate); + if (ret) { + dev_err(dev, "Could not setup timer\n"); + return ret; + } + + uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK; + + return 0; +} + +static const struct timer_ops imx_gpt_timer_ops = { + .get_count = imx_gpt_timer_get_count, +}; + +static const struct udevice_id imx_gpt_timer_ids[] = { + { .compatible = "fsl,imxrt-gpt" }, + {} +}; + +U_BOOT_DRIVER(imx_gpt_timer) = { + .name = "imx_gpt_timer", + .id = UCLASS_TIMER, + .of_match = imx_gpt_timer_ids, + .priv_auto = sizeof(struct imx_gpt_timer_priv), + .probe = imx_gpt_timer_probe, + .ops = &imx_gpt_timer_ops, +}; diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 7b205c5656..43171678ee 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++ b/drivers/usb/cdns3/cdns3-ti.c @@ -101,7 +101,7 @@ static int cdns_ti_probe(struct udevice *dev) if (!data->usbss) return -EINVAL; - ret = clk_get_by_name(dev, "usb2_refclk", &usb2_refclk); + ret = clk_get_by_name(dev, "ref", &usb2_refclk); if (ret) { dev_err(dev, "Failed to get usb2_refclk\n"); return ret; diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index bf5d82f035..f34cba2395 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -149,7 +149,7 @@ config USB_EHCI_MX5 config USB_EHCI_MX6 bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller" - depends on ARCH_MX6 || ARCH_MX7ULP + depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT default y ---help--- Enables support for the on-chip EHCI controller on i.MX6 SoCs. diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index ec643e9f45..43cc2e0433 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -21,6 +21,7 @@ #include <asm/io.h> #include <dm/device_compat.h> #include <linux/delay.h> +#include <linux/usb/otg.h> #include <power/regulator.h> #include <reset.h> @@ -1204,7 +1205,13 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv) #endif dwc_otg_core_init(dev); - dwc_otg_core_host_init(dev, regs); + + if (usb_get_dr_mode(dev_ofnode(dev)) == USB_DR_MODE_PERIPHERAL) { + dev_dbg(dev, "USB device %s dr_mode set to %d. Skipping host_init.\n", + dev->name, usb_get_dr_mode(dev_ofnode(dev))); + } else { + dwc_otg_core_host_init(dev, regs); + } clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | DWC2_HPRT0_PRTENCHNG | diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 06be9deaaa..c3e4170513 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -177,7 +177,7 @@ static void __maybe_unused usb_power_config_mx7ulp(void *usbphy) { } #endif -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT) static const unsigned phy_bases[] = { USB_PHY0_BASE_ADDR, #if defined(USB_PHY1_BASE_ADDR) @@ -340,7 +340,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { enum usb_init_type type; -#if defined(CONFIG_MX6) +#if defined(CONFIG_MX6) || defined(CONFIG_IMXRT) u32 controller_spacing = 0x200; struct anatop_regs __iomem *anatop = (struct anatop_regs __iomem *)ANATOP_BASE_ADDR; @@ -382,7 +382,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, return ret; } -#if defined(CONFIG_MX6) +#if defined(CONFIG_MX6) || defined(CONFIG_IMXRT) usb_power_config_mx6(anatop, index); #elif defined (CONFIG_MX7) usb_power_config_mx7(usbnc); @@ -392,7 +392,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, usb_oc_config(usbnc, index); -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT) if (index < ARRAY_SIZE(phy_bases)) { usb_internal_phy_clock_gate((void __iomem *)phy_bases[index], 1); usb_phy_enable(ehci, (void __iomem *)phy_bases[index]); @@ -504,7 +504,7 @@ static int ehci_usb_phy_mode(struct udevice *dev) * About fsl,usbphy, Refer to * Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt. */ - if (is_mx6() || is_mx7ulp()) { + if (is_mx6() || is_mx7ulp() || is_imxrt()) { phy_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbphy"); @@ -569,7 +569,6 @@ static int mx6_parse_dt_addrs(struct udevice *dev) const void *blob = gd->fdt_blob; int offset = dev_of_offset(dev); void *__iomem addr; - int ret, devnump; phy_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbphy"); if (phy_off < 0) { @@ -578,21 +577,15 @@ static int mx6_parse_dt_addrs(struct udevice *dev) return -EINVAL; } - ret = fdtdec_get_alias_seq(blob, dev->uclass->uc_drv->name, - phy_off, &devnump); - if (ret < 0) - return ret; - misc_off = fdtdec_lookup_phandle(blob, offset, "fsl,usbmisc"); if (misc_off < 0) return -EINVAL; addr = (void __iomem *)fdtdec_get_addr(blob, phy_off, "reg"); if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) - return -EINVAL; + addr = NULL; priv->phy_addr = addr; - priv->portnr = devnump; addr = (void __iomem *)fdtdec_get_addr(blob, misc_off, "reg"); if ((fdt_addr_t)addr == FDT_ADDR_T_NONE) @@ -601,7 +594,13 @@ static int mx6_parse_dt_addrs(struct udevice *dev) priv->misc_addr = addr; #if defined(CONFIG_MX6) - int anatop_off; + int anatop_off, ret, devnump; + + ret = fdtdec_get_alias_seq(blob, dev->uclass->uc_drv->name, + phy_off, &devnump); + if (ret < 0) + return ret; + priv->portnr = devnump; /* Resolve ANATOP offset through USB PHY node */ anatop_off = fdtdec_lookup_phandle(blob, phy_off, "fsl,anatop"); @@ -671,7 +670,7 @@ static int ehci_usb_probe(struct udevice *dev) usb_oc_config(priv->misc_addr, priv->portnr); -#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7ULP) || defined(CONFIG_IMXRT) usb_internal_phy_clock_gate(priv->phy_addr, 1); usb_phy_enable(ehci, priv->phy_addr); #endif @@ -757,6 +756,7 @@ int ehci_usb_remove(struct udevice *dev) static const struct udevice_id mx6_usb_ids[] = { { .compatible = "fsl,imx27-usb" }, { .compatible = "fsl,imx7d-usb" }, + { .compatible = "fsl,imxrt-usb" }, { } }; diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index e1fd36a62d..523d8a8d98 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -67,26 +67,48 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, uint32_t vdctrl0; #if CONFIG_IS_ENABLED(CLK) - struct clk per_clk; + struct clk clk; int ret; - ret = clk_get_by_name(dev, "per", &per_clk); + ret = clk_get_by_name(dev, "pix", &clk); if (ret) { - dev_err(dev, "Failed to get mxs clk: %d\n", ret); + dev_err(dev, "Failed to get mxs pix clk: %d\n", ret); return; } - ret = clk_set_rate(&per_clk, timings->pixelclock.typ); + ret = clk_set_rate(&clk, timings->pixelclock.typ); if (ret < 0) { - dev_err(dev, "Failed to set mxs clk: %d\n", ret); + dev_err(dev, "Failed to set mxs pix clk: %d\n", ret); return; } - ret = clk_enable(&per_clk); + ret = clk_enable(&clk); if (ret < 0) { - dev_err(dev, "Failed to enable mxs clk: %d\n", ret); + dev_err(dev, "Failed to enable mxs pix clk: %d\n", ret); return; } + + ret = clk_get_by_name(dev, "axi", &clk); + if (!ret) { + debug("%s: Failed to get mxs axi clk: %d\n", __func__, ret); + } else { + ret = clk_enable(&clk); + if (ret < 0) { + dev_err(dev, "Failed to enable mxs axi clk: %d\n", ret); + return; + } + } + + ret = clk_get_by_name(dev, "disp_axi", &clk); + if (!ret) { + debug("%s: Failed to get mxs disp_axi clk: %d\n", __func__, ret); + } else { + ret = clk_enable(&clk); + if (ret < 0) { + dev_err(dev, "Failed to enable mxs disp_axi clk: %d\n", ret); + return; + } + } #else /* Kick in the LCDIF clock */ mxs_set_lcdclk(MXS_LCDIF_BASE, timings->pixelclock.typ / 1000); diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 997be2dcf4..92ab8ac631 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -1253,7 +1253,7 @@ static int sqfs_get_regfile_info(struct squashfs_reg_inode *reg, fentry); if (ret < 0) return -EINVAL; - finfo->comp = true; + finfo->comp = ret; if (fentry->size < 1 || fentry->start == 0x7FFFFFFF) return -EINVAL; } else { @@ -1291,7 +1291,7 @@ static int sqfs_get_lregfile_info(struct squashfs_lreg_inode *lreg, fentry); if (ret < 0) return -EINVAL; - finfo->comp = true; + finfo->comp = ret; if (fentry->size < 1 || fentry->start == 0x7FFFFFFF) return -EINVAL; } else { @@ -1547,20 +1547,16 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, goto out; } - for (j = *actread; j < finfo.size; j++) { - memcpy(buf + j, &fragment_block[finfo.offset + j], 1); - (*actread)++; - } + memcpy(buf + *actread, &fragment_block[finfo.offset], finfo.size - *actread); + *actread = finfo.size; free(fragment_block); } else if (finfo.frag && !finfo.comp) { fragment_block = (void *)fragment + table_offset; - for (j = *actread; j < finfo.size; j++) { - memcpy(buf + j, &fragment_block[finfo.offset + j], 1); - (*actread)++; - } + memcpy(buf + *actread, &fragment_block[finfo.offset], finfo.size - *actread); + *actread = finfo.size; } out: diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 3895c2d0c7..715154a0dd 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -92,7 +92,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* * DDR Setup diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index b1acb564c3..7bc792b8d1 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2011-2013 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ /* @@ -618,7 +618,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index e467ef453d..9449e30bfc 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ /* @@ -537,8 +537,12 @@ unsigned long get_board_ddr_clk(void); #define RGMII_PHY2_ADDR 0x02 #define CORTINA_PHY_ADDR1 0x0c /* Cortina CS4315 */ #define CORTINA_PHY_ADDR2 0x0d -#define FM1_10GEC3_PHY_ADDR 0x00 /* Aquantia AQ1202 10G Base-T */ +/* Aquantia AQ1202 10G Base-T used by board revisions up to C */ +#define FM1_10GEC3_PHY_ADDR 0x00 #define FM1_10GEC4_PHY_ADDR 0x01 +/* Aquantia AQR113C 10G Base-T used by board revisions D and up */ +#define AQR113C_PHY_ADDR1 0x00 +#define AQR113C_PHY_ADDR2 0x08 #endif #ifdef CONFIG_FMAN_ENET @@ -574,7 +578,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index a04d9137b3..139beae08d 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2020 NXP + * Copyright 2020-2021 NXP */ /* @@ -585,7 +585,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_MMC #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h new file mode 100644 index 0000000000..15c50279ad --- /dev/null +++ b/include/configs/cgtqmx8.h @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2017-2018 NXP + * Copyright 2018 congatec AG + * + */ + +#ifndef __CGTQMX8_H +#define __CGTQMX8_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_EMBED +#endif + +#define CONFIG_REMAKE_ELF + +#define CONFIG_BOARD_EARLY_INIT_F + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define USDHC1_BASE_ADDR 0x5B010000 +#define USDHC2_BASE_ADDR 0x5B020000 +#define USDHC3_BASE_ADDR 0x5B030000 +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +/* Boot M4 */ +#define M4_BOOT_ENV \ + "m4_0_image=m4_0.bin\0" \ + "m4_1_image=m4_1.bin\0" \ + "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \ + "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \ + "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ + "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \ + +#ifdef CONFIG_NAND_BOOT +#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) " +#else +#define MFG_NAND_PARTITION "" +#endif +#define FEC0_RESET IMX_GPIO_NR(2, 5) +#define FEC0_PDOMAIN "conn_enet0" + +#define CONFIG_MFG_ENV_SETTINGS \ + "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ + "rdinit=/linuxrc " \ + "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ + "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ + "g_mass_storage.iSerialNumber=\"\" "\ + MFG_NAND_PARTITION \ + "clk_ignore_unused "\ + "\0" \ + "initrd_addr=0x83800000\0" \ + "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_MFG_ENV_SETTINGS \ + M4_BOOT_ENV \ + "script=boot.scr\0" \ + "image=Image\0" \ + "panel=NULL\0" \ + "console=ttyLP0\0" \ + "fdt_addr=0x83000000\0" \ + "boot_fdt=try\0" \ + "fdt_file=imx8qm-cgt-qmx8.dtb\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "echo wait for boot; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "booti; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else booti ${loadaddr} - ${fdt_addr}; fi" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 3 + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ + +/* Serial */ +#define CONFIG_BAUDRATE 115200 + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_MXC_PHYADDR -1 +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __CGTQMX8_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6aef0..4f2f323b77 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@ * PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif @@ -82,13 +80,6 @@ /* Various command support */ -/* Ethernet support */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL - /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -129,7 +120,6 @@ #define CONFIG_SERVERIP 192.168.1.146 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "pcidisable=1\0" \ "splashpos=m,m\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 596e255ca6..985bec803a 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -31,69 +31,29 @@ #endif +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 2) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +#endif + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ "image=Image\0" \ + BOOTENV \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "console=ttymxc1,115200\0" \ - "fdt_addr=0x43000000\0" \ + "fdt_addr_r=0x43000000\0" \ "boot_fit=no\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ - "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ - "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if run loadfdt; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${loadaddr} ${image}; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "booti ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi;" /* Link Definitions */ #define CONFIG_LOADADDR 0x40480000 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 3d7519c935..eb480a34a6 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -21,6 +21,10 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + \ + CONFIG_KM_PHRAM + \ + CONFIG_KM_RESERVED_PRAM) >> 10) + #define CONFIG_SYS_CLK_FREQ 66666666 /* * Take into account default implementation where DDR_FDBK_MULTI is consider as @@ -43,6 +47,10 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 +/* POST memory regions test */ +#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) +#define CONFIG_POST_EXTERNAL_WORD_FUNCS + /* * IFC Definitions */ @@ -206,7 +214,7 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define COUNTER_FREQUENCY 12500000 +#define COUNTER_FREQUENCY 8333333 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 @@ -280,10 +288,17 @@ "protect on " __stringify(ENV_DEL_ADDR) \ " +" __stringify(CONFIG_ENV_TOTAL_SIZE) "\0" +#define CONFIG_HW_ENV_SETTINGS \ + "hwconfig=devdis:esdhc,usb3,usb2,sata,sec,dcu,duart2,qspi," \ + "can1,can2_4,ftm2_8,i2c2_3,sai1_4,lpuart2_6," \ + "asrc,spdif,lpuart1,ftm1\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_KM_NEW_ENV \ CONFIG_KM_DEF_ENV \ + CONFIG_HW_ENV_SETTINGS \ "EEprom_ivm=pca9547:70:9\0" \ + "ethrotate=no\0" \ "" #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 5f11205802..bfb4e67c8f 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -56,11 +56,6 @@ #define CONFIG_DDR_CLK_FREQ 100000000 #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4) -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* ethernet */ #define CONFIG_SYS_RX_ETH_BUFFER 8 diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 9962b9872a..44f9da7306 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017 NXP + * Copyright 2017, 2021 NXP */ #ifndef __LS1012A2G5RDB_H__ @@ -13,11 +13,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI @@ -72,7 +67,7 @@ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ @@ -82,11 +77,11 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;" #else #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd; run qspi_bootcmd; " \ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ "env exists secureboot && esbc_halt;" #endif #endif diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index a908b0acb0..6f55acc7db 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -102,11 +102,11 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT -#define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ +#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" #else -#define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ +#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\ "$kernel_start $kernel_size && "\ "bootm $kernel_load" #endif diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 02dd59892b..2711f651d7 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -50,16 +50,16 @@ "installer=load usb 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size && bootm $load_addr#$board\0" #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd" +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #else -#define CONFIG_BOOTCOMMAND "pfe stop;run distro_bootcmd;run qspi_bootcmd" +#define CONFIG_BOOTCOMMAND "run distro_bootcmd;run qspi_bootcmd" #endif #endif /* __LS1012ARDB_H__ */ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ba152834d5..f8b386125c 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018 NXP + * Copyright 2018, 2021 NXP */ #ifndef __LS1012AFRWY_H__ @@ -33,11 +33,6 @@ func(DHCP, dhcp, na) #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW @@ -89,7 +84,7 @@ "env exists secureboot " \ "&& esbc_validate ${scripthdraddr};" \ "source ${scriptaddr}\0" \ - "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \ + "sd_bootcmd=echo Trying load from sd card..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ "env exists secureboot && mmc read $kernelheader_addr_r "\ @@ -100,10 +95,10 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\ "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run sd_bootcmd; "\ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "\ "env exists secureboot && esbc_halt;" #endif diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 36be8f42c9..3e5fdadc40 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2021 NXP */ #ifndef __LS1012AQDS_H__ @@ -93,11 +94,6 @@ DSPI_CTAR_DT(0)) #define CONFIG_SPI_FLASH_EON /* cs3 */ -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW @@ -140,7 +136,7 @@ "env exists secureboot " \ "&& esbc_validate ${scripthdraddr};" \ "source ${scriptaddr}\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe 0:0 && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ @@ -150,10 +146,10 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #endif diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 582945b2ab..c8a2f120dc 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2020 NXP + * Copyright 2020-2021 NXP * Copyright 2016 Freescale Semiconductor, Inc. */ @@ -38,12 +38,6 @@ #define __PHY_ETH2_MASK 0xFB #define __PHY_ETH1_MASK 0xFD -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - - #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCI_SCAN_SHOW @@ -91,7 +85,7 @@ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ "bootm $load_addr#$board\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ @@ -101,10 +95,10 @@ #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT #undef QSPI_NOR_BOOTCOMMAND -#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ "env exists secureboot && esbc_halt;" #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 31fcdae986..5900b8f0e3 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __L1028A_COMMON_H @@ -93,11 +93,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define OCRAM_NONSECURE_SIZE 0x00010000 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 29a3790c45..65d63e2fc9 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015 Freescale Semiconductor - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __LS1043A_COMMON_H @@ -171,13 +171,6 @@ #endif #endif -/* MMC */ -#ifndef SPL_NO_MMC -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif -#endif - /* DSPI */ #ifndef SPL_NO_DSPI #ifdef CONFIG_FSL_DSPI diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 0c3978a922..11e1a184c5 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __LS1046A_COMMON_H @@ -165,13 +165,6 @@ CONFIG_SYS_SCSI_MAX_LUN) #endif -/* MMC */ -#ifndef SPL_NO_MMC -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif -#endif - /* FMan ucode */ #ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 4d04833c50..d032a3d111 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2020 NXP + * Copyright 2017, 2020-2021 NXP */ #ifndef __LS1088A_QDS_H @@ -361,7 +361,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_MEMAC /* MMC */ -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_ESDHC_DETECT_QUIRK ((readb(QIXIS_BASE + QIXIS_STAT_PRES1) & \ QIXIS_SDID_MASK) != QIXIS_ESDHC_NO_ADAPTER) diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 6f36dd417a..5ade0eb439 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2020 NXP + * Copyright 2017, 2020-2021 NXP */ #ifndef __LS1088A_RDB_H @@ -507,11 +507,6 @@ #endif #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #ifndef SPL_NO_ENV #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index b3fce1b7f7..41c1a86743 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2019-2020 NXP + * Copyright 2017, 2019-2021 NXP * Copyright 2015 Freescale Semiconductor */ @@ -318,11 +318,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCI_SCAN_SHOW #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS #ifdef CONFIG_NXP_ESBC diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 8626a1d5e6..f2dc495fbb 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2017, 2019-2020 NXP + * Copyright 2017, 2019-2021 NXP * Copyright 2015 Freescale Semiconductor */ @@ -300,11 +300,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PCI_SCAN_SHOW #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 9f2b8999cd..15ea0e4ce1 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018-2020 NXP + * Copyright 2018-2021 NXP */ #ifndef __LX2_COMMON_H @@ -129,11 +129,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* MMC */ -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#endif - /* SATA */ #ifdef CONFIG_SCSI diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 38f50468c5..493e3de9b9 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -91,11 +91,11 @@ #include <config_distro_bootcmd.h> #define CONFIG_EXTRA_ENV_SETTINGS \ - "scriptaddr=0x4d00000\0" \ - "pxefile_addr_r=0x4e00000\0" \ - "fdt_addr_r=0x4f00000\0" \ - "kernel_addr_r=0x5000000\0" \ - "ramdisk_addr_r=0x8000000\0" \ + "scriptaddr=0x6d00000\0" \ + "pxefile_addr_r=0x6e00000\0" \ + "fdt_addr_r=0x6f00000\0" \ + "kernel_addr_r=0x7000000\0" \ + "ramdisk_addr_r=0xa000000\0" \ "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h new file mode 100644 index 0000000000..3be9b8ff55 --- /dev/null +++ b/include/configs/npi_imx6ull.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * Copyright (c) 2021 Linumiz + * Author: Navin Sankar Velliangiri <navin@linumiz.com> + */ + +#ifndef _NPI_IMX6ULL_H +#define _NPI_IMX6ULL_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* SPL options */ +#include "imx6_spl.h" + +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +/* Size of malloc() poll */ +#define CONFIG_SYS_MALLOC_LEN SZ_2M + +/* Console configs */ +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR + +#define CONFIG_NETMASK 255.255.255.0 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* environment settings */ +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_NAND) +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#endif + +/* NAND */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 + +/* USB Configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 + +#ifdef CONFIG_CMD_NET +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "eth0" +#endif + +#define CONFIG_IMX_THERMAL + +#define CONFIG_FEC_ENET_DEV 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0,115200n8\0" \ + "image=zImage\0" \ + "fdtfile=imx6ull-seeed-npi-dev-board.dtb\0" \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "fdt_addr_r=0x82000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x87100000\0" \ + "ramdisk_addr_r=0x82100000\0" \ + "scriptaddr=0x87000000\0" \ + "root=/dev/mmcblk0p2 rootwait\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(UBIFS, ubifs, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#endif /* _NPI_IMX6ULL_H */ diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h new file mode 100644 index 0000000000..b9746b9b1c --- /dev/null +++ b/include/configs/o4-imx6ull-nano.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> */ + +#ifndef __O4_IMX6ULL_NANO_CONFIG_H +#define __O4_IMX6ULL_NANO_CONFIG_H + +#include "mx6_common.h" + +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#if IS_ENABLED(CONFIG_CMD_USB) +# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif /* CONFIG_CMD_USB */ + +#if IS_ENABLED(CONFIG_FEC_MXC) +# define CONFIG_FEC_XCV_TYPE RMII +#endif /* CONFIG_FEC_MXC */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mmcdev=0\0" \ + "mmcpart=2\0" \ + "mmcargs=setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcpart} console=ttymxc0,${baudrate} panic=30\0" \ + "mmcboot=run mmcargs && ext4load mmc ${mmcdev}:${mmcpart} $loadaddr /boot/zImage && bootz $loadaddr - $fdtcontroladdr\0" \ + "bootcmd=run mmcboot\0" \ + "bootcmd_mfg=fastboot usb 0\0" + +#endif /* __O4_IMX6ULL_NANO_CONFIG_H */ diff --git a/include/configs/pg-wcom-expu1.h b/include/configs/pg-wcom-expu1.h new file mode 100644 index 0000000000..e08d941412 --- /dev/null +++ b/include/configs/pg-wcom-expu1.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Hitachi ABB Power Grids + */ + +#ifndef __CONFIG_PG_WCOM_EXPU1_H +#define __CONFIG_PG_WCOM_EXPU1_H + +#define WCOM_EXPU1 +#define CONFIG_HOSTNAME "EXPU1" + +#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" +#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" + +/* CLIPS FPGA Definitions */ +#define CONFIG_SYS_CSPR3_EXT (0x00) +#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \ + CSPR_PORT_SIZE_8 | \ + CSPR_MSEL_GPCM | \ + CSPR_V) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) +#define CONFIG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \ + CSOR_GPCM_TRHZ_40) +#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \ + FTIM0_GPCM_TEADC(0x7) | \ + FTIM0_GPCM_TEAHC(0x2)) +#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ + FTIM1_GPCM_TRAD(0x12)) +#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \ + FTIM2_GPCM_TCH(0x1) | \ + FTIM2_GPCM_TWP(0x12)) +#define CONFIG_SYS_CS3_FTIM3 0x04000000 + +/* PRST */ +#define WCOM_CLIPS_RST 0 +#define WCOM_QSFP_RST 1 +#define WCOM_PHY_RST 2 +#define WCOM_TMG_RST 3 +#define KM_DBG_ETH_RST 15 + +/* QRIO GPIOs used for deblocking */ +#define KM_I2C_DEBLOCK_PORT QRIO_GPIO_A +#define KM_I2C_DEBLOCK_SCL 20 +#define KM_I2C_DEBLOCK_SDA 21 + +/* ZL30343 on SPI */ +#define WCOM_ZL30343_CFG_ADDR 0xe8070000 +#define WCOM_ZL30343_SPI_BUS 0 +#define WCOM_ZL30343_CS 0 + +#include "km/pg-wcom-ls102xa.h" + +#endif /* __CONFIG_PG_WCOM_EXPU1_H */ diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h new file mode 100644 index 0000000000..50f00136ac --- /dev/null +++ b/include/configs/smegw01.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 NXP Semiconductors + * Copyright (C) 2021 Fabio Estevam <festevam@denx.de> + * + * Configuration settings for the smegw01 board. + */ + +#ifndef __SMEGW01_CONFIG_H +#define __SMEGW01_CONFIG_H + +#include "mx7_common.h" +#include <imximage.h> + +#define PHYS_SDRAM_SIZE SZ_512M + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) + +/* MMC Config*/ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdtfile=imx7d-smegw01.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "bootm_size=0x10000000\0" \ + "mmcdev=0\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdtfile}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "fi;\0" \ + +#define CONFIG_BOOTCOMMAND \ + "if run loadimage; then " \ + "run mmcboot; " \ + "fi; " \ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#endif diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 5afdb10454..38fd775b5b 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -21,7 +21,6 @@ /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */ #define CPU_RELEASE_ADDR 0xFFD12210 #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_MEM_RESERVE_SECURE 0 /* using OCRAM, not DDR */ /* * U-Boot console configurations diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 51445ec60a..9c021a1ef9 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -75,12 +75,22 @@ #include <config_distro_bootcmd.h> +#define TURRIS_MOX_BOOTCMD_RESCUE \ + "setenv bootargs \"console=ttyMV0,115200 " \ + "earlycon=ar3700_uart,0xd0012000\" && " \ + "sf probe && " \ + "sf read 0x5000000 0x190000 && " \ + "lzmadec 0x5000000 0x5800000 && " \ + "bootm 0x5800000" + #define CONFIG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x4d00000\0" \ "pxefile_addr_r=0x4e00000\0" \ "fdt_addr_r=0x4f00000\0" \ "kernel_addr_r=0x5000000\0" \ "ramdisk_addr_r=0x8000000\0" \ + "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "bootcmd_rescue=" TURRIS_MOX_BOOTCMD_RESCUE "\0" \ BOOTENV #endif /* _CONFIG_TURRIS_MOX_H */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index e2a817891c..7be5e5ddf1 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -16,6 +16,8 @@ #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CONFIG_SYS_BOOTM_LEN SZ_64M + #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 diff --git a/include/dt-bindings/clock/imxrt1050-clock.h b/include/dt-bindings/clock/imxrt1050-clock.h index c174f90c1a..f74dbbcf93 100644 --- a/include/dt-bindings/clock/imxrt1050-clock.h +++ b/include/dt-bindings/clock/imxrt1050-clock.h @@ -52,7 +52,7 @@ #define IMXRT1050_CLK_USDHC2 43 #define IMXRT1050_CLK_LPUART1 44 #define IMXRT1050_CLK_SEMC 45 -#define IMXRT1050_CLK_LCDIF 46 +#define IMXRT1050_CLK_LCDIF_APB 46 #define IMXRT1050_CLK_PLL1_ARM 47 #define IMXRT1050_CLK_PLL2_SYS 48 #define IMXRT1050_CLK_PLL3_USB_OTG 49 @@ -60,6 +60,8 @@ #define IMXRT1050_CLK_PLL5_VIDEO 51 #define IMXRT1050_CLK_PLL6_ENET 52 #define IMXRT1050_CLK_PLL7_USB_HOST 53 -#define IMXRT1050_CLK_END 54 +#define IMXRT1050_CLK_LCDIF_PIX 54 +#define IMXRT1050_CLK_USBOH3 55 +#define IMXRT1050_CLK_END 56 #endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */ diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index b092034464..45ed635a77 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -39,7 +39,6 @@ #define VENDORSPEC_HCKEN 0x00001000 #define VENDORSPEC_IPGEN 0x00000800 #define VENDORSPEC_INIT 0x20007809 -#define VENDORSPEC_FRC_SDCLK_ON 0x00000100 #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) @@ -97,7 +96,6 @@ #define PRSSTAT_CINS (0x00010000) #define PRSSTAT_BREN (0x00000800) #define PRSSTAT_BWEN (0x00000400) -#define PRSSTAT_SDOFF (0x00000080) #define PRSSTAT_SDSTB (0X00000008) #define PRSSTAT_DLA (0x00000004) #define PRSSTAT_CICHB (0x00000002) diff --git a/include/malloc.h b/include/malloc.h index 024b18be00..1fbaf3755c 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -1,12 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* - A version of malloc/free/realloc written by Doug Lea and released to the - public domain. Send questions/comments/complaints/performance data - to dl@cs.oswego.edu + This code is based on a version of malloc/free/realloc written by Doug Lea and + released to the public domain. Send questions/comments/complaints/performance + data to dl@cs.oswego.edu * VERSION 2.6.6 Sun Mar 5 19:10:03 2000 Doug Lea (dl at gee) Note: There may be an updated version of this malloc obtainable at - ftp://g.oswego.edu/pub/misc/malloc.c + http://g.oswego.edu/pub/misc/malloc.c Check before installing! * Why use this malloc? diff --git a/include/mmc.h b/include/mmc.h index 8600881705..6f943e78b7 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -539,18 +539,6 @@ struct dm_mmc_ops { #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) -int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data); -int dm_mmc_set_ios(struct udevice *dev); -int dm_mmc_get_cd(struct udevice *dev); -int dm_mmc_get_wp(struct udevice *dev); -int dm_mmc_execute_tuning(struct udevice *dev, uint opcode); -int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us); -int dm_mmc_host_power_cycle(struct udevice *dev); -int dm_mmc_deferred_probe(struct udevice *dev); -int dm_mmc_reinit(struct udevice *dev); -int dm_mmc_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt); - /* Transition functions for compatibility */ int mmc_set_ios(struct mmc *mmc); int mmc_getcd(struct mmc *mmc); @@ -795,6 +783,7 @@ int mmc_initialize(struct bd_info *bis); int mmc_init_device(int num); int mmc_init(struct mmc *mmc); int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error); +int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ diff --git a/include/net/pfe_eth/pfe/pfe_hw.h b/include/net/pfe_eth/pfe/pfe_hw.h index c69fc69130..71e4115afa 100644 --- a/include/net/pfe_eth/pfe/pfe_hw.h +++ b/include/net/pfe_eth/pfe/pfe_hw.h @@ -160,4 +160,10 @@ void hif_rx_enable(void); void hif_rx_disable(void); void hif_rx_desc_disable(void); +#ifdef PFE_RESET_WA +void pfe_command_stop(int argc, char *const argv[]); +#else +static void pfe_command_stop(int argc, char *const argv[]) {} +#endif + #endif /* _PFE_H_ */ diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c index ee592cfda1..c691066332 100644 --- a/lib/asm-offsets.c +++ b/lib/asm-offsets.c @@ -41,5 +41,7 @@ int main(void) DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd)); + DEFINE(GD_ENV_ADDR, offsetof(struct global_data, env_addr)); + return 0; } diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index 9ead0d2c78..60309d4a07 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -901,7 +901,8 @@ static efi_status_t efi_capsule_delete_file(const u16 *filename) /* ignore an error */ EFI_CALL((*dirh->close)(dirh)); - ret = EFI_CALL((*fh->delete)(fh)); + if (ret == EFI_SUCCESS) + ret = EFI_CALL((*fh->delete)(fh)); return ret; } diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index 307d5d759b..988907ecb9 100644 --- a/lib/efi_loader/efi_disk.c +++ b/lib/efi_loader/efi_disk.c @@ -476,7 +476,7 @@ static efi_status_t efi_disk_add_dev( efi_system_partition.if_type = desc->if_type; efi_system_partition.devnum = desc->devnum; efi_system_partition.part = part; - EFI_PRINT("EFI system partition: %s %d:%d\n", + EFI_PRINT("EFI system partition: %s %x:%x\n", blk_get_if_type_name(desc->if_type), desc->devnum, part); } @@ -521,7 +521,7 @@ int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, if (part_get_info(desc, part, &info)) continue; - snprintf(devname, sizeof(devname), "%s:%d", pdevname, + snprintf(devname, sizeof(devname), "%s:%x", pdevname, part); ret = efi_disk_add_dev(parent, dp, if_typename, desc, diskid, &info, part, NULL); diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index bcd57f7fcc..a0eb63fceb 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -220,7 +220,7 @@ static void efi_set_code_and_data_type( * @end: End address of region (excluded) * @nocheck: flag against overlapped regions * - * Take one entry of region [@start, @end[ and insert it into the list. + * Take one entry of region \[@start, @end\[ and insert it into the list. * * * If @nocheck is false, the list will be sorted ascending by address. * Overlapping entries will not be allowed. diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c index b171d2d1a8..de076b8cbc 100644 --- a/lib/efi_loader/efi_var_file.c +++ b/lib/efi_loader/efi_var_file.c @@ -35,7 +35,7 @@ static efi_status_t __maybe_unused efi_set_blk_dev_to_system_partition(void) log_err("No EFI system partition\n"); return EFI_DEVICE_ERROR; } - snprintf(part_str, PART_STR_LEN, "%u:%u", + snprintf(part_str, PART_STR_LEN, "%x:%x", efi_system_partition.devnum, efi_system_partition.part); r = fs_set_blk_dev(blk_get_if_type_name(efi_system_partition.if_type), part_str, FS_TYPE_ANY); diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 34ca731d1e..5146bd6666 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -69,8 +69,11 @@ void eth_set_current_to_next(void) /* * Typically this will simply return the active device. * In the case where the most recent active device was unset, this will attempt - * to return the first device. If that device doesn't exist or fails to probe, - * this function will return NULL. + * to return the device with sequence id 0 (which can be configured by the + * device tree). If this fails, fall back to just getting the first device. + * The latter is non-deterministic and depends on the order of the probing. + * If that device doesn't exist or fails to probe, this function will return + * NULL. */ struct udevice *eth_get_dev(void) { @@ -80,9 +83,13 @@ struct udevice *eth_get_dev(void) if (!uc_priv) return NULL; - if (!uc_priv->current) - eth_errno = uclass_first_device(UCLASS_ETH, - &uc_priv->current); + if (!uc_priv->current) { + eth_errno = uclass_get_device_by_seq(UCLASS_ETH, 0, + &uc_priv->current); + if (eth_errno) + eth_errno = uclass_first_device(UCLASS_ETH, + &uc_priv->current); + } return uc_priv->current; } @@ -598,8 +605,8 @@ static int eth_pre_remove(struct udevice *dev) return 0; } -UCLASS_DRIVER(eth) = { - .name = "eth", +UCLASS_DRIVER(ethernet) = { + .name = "ethernet", .id = UCLASS_ETH, .post_bind = eth_post_bind, .pre_unbind = eth_pre_unbind, diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0f5ac8ff52..e549a5557f 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2305,7 +2305,6 @@ CONFIG_SYS_FSL_MAX_NUM_OF_SEC CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR CONFIG_SYS_FSL_MC_BASE CONFIG_SYS_FSL_MC_SIZE -CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 CONFIG_SYS_FSL_NI_BASE CONFIG_SYS_FSL_NI_SIZE CONFIG_SYS_FSL_NO_SERDES diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 94a4d2189e..44e51de085 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -213,7 +213,7 @@ static int dm_test_ofnode_read_aliases(struct unit_test_state *uts) ofnode node; int size; - node = ofnode_get_aliases_node("eth3"); + node = ofnode_get_aliases_node("ethernet3"); ut_assert(ofnode_valid(node)); ut_asserteq_str("sbe5", ofnode_get_name(node)); diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index d273e21853..8866d4d959 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -183,7 +183,7 @@ static int dm_test_alias_highest_id(struct unit_test_state *uts) { int ret; - ret = dev_read_alias_highest_id("eth"); + ret = dev_read_alias_highest_id("ethernet"); ut_asserteq(5, ret); ret = dev_read_alias_highest_id("gpio"); diff --git a/test/py/tests/test_fs/conftest.py b/test/py/tests/test_fs/conftest.py index 410a675b97..7325486cdb 100644 --- a/test/py/tests/test_fs/conftest.py +++ b/test/py/tests/test_fs/conftest.py @@ -159,6 +159,10 @@ def mk_fs(config, fs_type, size, id): count = (size + 1048576 - 1) / 1048576 + # Some distributions do not add /sbin to the default PATH, where mkfs lives + if '/sbin' not in os.environ["PATH"].split(os.pathsep): + os.environ["PATH"] += os.pathsep + '/sbin' + try: check_call('rm -f %s' % fs_img, shell=True) check_call('dd if=/dev/zero of=%s bs=1M count=%d' |