summaryrefslogtreecommitdiff
path: root/arch/arm/dts/k3-j7200-som-p0.dtsi
diff options
context:
space:
mode:
authorVignesh Raghavendra <vigneshr@ti.com>2020-08-07 00:26:59 +0530
committerLokesh Vutla <lokeshvutla@ti.com>2020-08-11 20:34:46 +0530
commit28e29fbb4f912ddc7deee4dbf426b269191012a2 (patch)
treee694f87a0f28b147b3d47e262e63c50c4217b599 /arch/arm/dts/k3-j7200-som-p0.dtsi
parent9e8a9b64572bcb15480c7476be45b9f4ab8fb3b4 (diff)
downloadu-boot-28e29fbb4f912ddc7deee4dbf426b269191012a2.tar.gz
ARM: dts: k3-j7200: Add HyperBus and HyperFlash nodes
J7200 SoM has Cypress HyperFlash connected to HyperBus interface, add DT entries for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'arch/arm/dts/k3-j7200-som-p0.dtsi')
-rw-r--r--arch/arm/dts/k3-j7200-som-p0.dtsi33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-som-p0.dtsi b/arch/arm/dts/k3-j7200-som-p0.dtsi
index 22fc50bd5c..ea5280ded7 100644
--- a/arch/arm/dts/k3-j7200-som-p0.dtsi
+++ b/arch/arm/dts/k3-j7200-som-p0.dtsi
@@ -27,3 +27,36 @@
};
};
};
+
+&wkup_pmx0 {
+ mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (B6) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */
+ J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C8) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */
+ J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (D6) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */
+ J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (D7) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */
+ J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (B7) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */
+ J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D8) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */
+ J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (C7) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */
+ J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (C5) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */
+ J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (A5) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */
+ J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (A6) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */
+ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
+ J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
+ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
+ >;
+ };
+};
+
+&hbmc {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
+ ranges = <0x0 0x0 0x5 0x0 0x4000000>, /* 64MB Flash on CS0 */
+ <0x1 0x0 0x5 0x4000000 0x800000>; /* 8MB RAM on CS1 */
+
+ flash@0,0 {
+ compatible = "cypress,hyperflash", "cfi-flash";
+ reg = <0x0 0x0 0x4000000>;
+ };
+};