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authorPatrick Delaunay <patrick.delaunay@st.com>2020-01-28 10:11:00 +0100
committerPatrick Delaunay <patrick.delaunay@st.com>2020-02-13 17:26:22 +0100
commitd35a5af321f33e6bd5b643e1b0356fc2bfa0ba0b (patch)
treea2786877e91ed7eea3c06d2a280c4ac4e58da364 /arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
parent7915b9914ea1922800dba8ea5551d6ab79e57726 (diff)
downloadu-boot-d35a5af321f33e6bd5b643e1b0356fc2bfa0ba0b.tar.gz
ARM: dts: stm32mp1: DT alignment with kernel v5.5-rc7
Device tree and binding alignment with kernel v5.5-rc7 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi')
-rw-r--r--arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi17
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index dcaab3eef2..4045a6e731 100644
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -35,24 +35,7 @@
};
&adc {
- pinctrl-names = "default";
- pinctrl-0 = <&adc12_usb_pwr_pins_a>;
- vdd-supply = <&vdd>;
- vdda-supply = <&vdd>;
- vref-supply = <&vrefbuf>;
status = "okay";
- adc1: adc@0 {
- /*
- * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
- * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
- * 5 * (56 + 47kOhms) * 5pF => 2.5us.
- * Use arbitrary margin here (e.g. 5µs).
- */
- st,min-sample-time-nsecs = <5000>;
- /* ANA0, ANA1, USB Type-C CC1 & CC2 */
- st,adc-channels = <0 1 18 19>;
- status = "okay";
- };
};
&clk_hse {