diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-11-25 00:25:35 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-11-29 00:29:00 +0900 |
commit | b443fb4210cb760594ebb46899344cdda2dbb616 (patch) | |
tree | 4762c8002257782e6337ec10617be7052b9ce2dc /arch/arm/dts/uniphier-ld11.dtsi | |
parent | e9986a4fa772f1d129725c5712e60298ee14f5b2 (diff) | |
download | u-boot-b443fb4210cb760594ebb46899344cdda2dbb616.tar.gz |
ARM: dts: uniphier: Sync with Linux 4.15-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ld11.dtsi')
-rw-r--r-- | arch/arm/dts/uniphier-ld11.dtsi | 50 |
1 files changed, 46 insertions, 4 deletions
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index cf079b9cd4..40f27bbb64 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -7,6 +7,9 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/gpio/uniphier-gpio.h> + /memreserve/ 0x80000000 0x02000000; / { @@ -49,7 +52,7 @@ }; }; - cluster0_opp: opp_table { + cluster0_opp: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -96,6 +99,11 @@ }; }; + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 4>, @@ -119,6 +127,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <58820000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -130,6 +139,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <58820000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -141,6 +151,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <58820000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -152,6 +163,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <58820000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -200,6 +212,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -213,6 +226,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -223,6 +237,7 @@ #size-cells = <0>; interrupts = <0 43 4>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <400000>; }; @@ -236,6 +251,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -249,6 +265,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; clocks = <&peri_clk 8>; + resets = <&peri_rst 8>; clock-frequency = <100000>; }; @@ -259,6 +276,7 @@ #size-cells = <0>; interrupts = <0 25 4>; clocks = <&peri_clk 9>; + resets = <&peri_rst 9>; clock-frequency = <400000>; }; @@ -311,9 +329,11 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc_1v8>; clocks = <&sys_clk 4>; + resets = <&sys_rst 4>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + mmc-pwrseq = <&emmc_pwrseq>; cdns,phy-input-delay-legacy = <4>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; @@ -328,7 +348,8 @@ interrupts = <0 243 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, + <&mio_clk 12>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>; }; @@ -340,7 +361,8 @@ interrupts = <0 244 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, + <&mio_clk 13>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>; }; @@ -352,7 +374,8 @@ interrupts = <0 245 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, + <&mio_clk 14>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>; }; @@ -384,6 +407,24 @@ }; }; + soc-glue@5f900000 { + compatible = "socionext,uniphier-ld11-soc-glue-debug", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; + }; + }; + aidet: aidet@5fc20000 { compatible = "socionext,uniphier-ld11-aidet"; reg = <0x5fc20000 0x200>; @@ -429,6 +470,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; |