summaryrefslogtreecommitdiff
path: root/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
diff options
context:
space:
mode:
authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-11 20:17:41 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-25 00:27:52 +0900
commitb25c4ab5be39767e594629030a73824c97aa8156 (patch)
tree51dd7a624329e0a721f97e74f890d8db2289fd59 /arch/arm/dts/uniphier-ph1-ld6b-ref.dts
parent76c52ce29fd75ca8802383ef1aed6c8f13461e37 (diff)
downloadu-boot-b25c4ab5be39767e594629030a73824c97aa8156.tar.gz
ARM: dts: uniphier: prepare device trees to use pinctrl in SPL
Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB (spl/u-boot-spl.dtb). The "soc" node (this is simple-bus node) also needs the property to bind the pinctrl node located under it. I am collecting this U-Boot specific hack to the bottom of board DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. My goal is to sync DTSI with Linux for easier maintenance. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-ld6b-ref.dts')
-rw-r--r--arch/arm/dts/uniphier-ph1-ld6b-ref.dts16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
index 58dc20e602..ca68930527 100644
--- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts
@@ -54,6 +54,20 @@
};
/* for U-boot only */
+/ {
+ soc {
+ u-boot,dm-pre-reloc;
+ };
+};
+
&serial0 {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_uart0 {
+ u-boot,dm-pre-reloc;
};