diff options
| author | Hao Zhang <hzhang@ti.com> | 2014-10-22 16:32:30 +0300 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-10-23 11:27:05 -0400 |
| commit | bc45d5729fbec157370b826156cf45ce78471096 (patch) | |
| tree | 12c70e660d7dccfbff4fa2c798cdbb748b51871a /arch/arm/include/asm/arch-keystone/hardware-k2e.h | |
| parent | 61d122583fb8163e0ea7c43a0fa7d5ff1241b782 (diff) | |
| download | u-boot-bc45d5729fbec157370b826156cf45ce78471096.tar.gz | |
keystone2: msmc: add MSMC cache coherency support for K2L SOC
This patch adds Keystone II Lamar (K2L) SoC specific definitions
to support MSMC cache coherency.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-keystone/hardware-k2e.h')
| -rw-r--r-- | arch/arm/include/asm/arch-keystone/hardware-k2e.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2e.h b/arch/arm/include/asm/arch-keystone/hardware-k2e.h index 62172a4b84..a70c184ef2 100644 --- a/arch/arm/include/asm/arch-keystone/hardware-k2e.h +++ b/arch/arm/include/asm/arch-keystone/hardware-k2e.h @@ -34,6 +34,9 @@ #define KS2_LPSC_PCIE_1 27 #define KS2_LPSC_XGE 50 +/* MSMC */ +#define KS2_MSMC_SEGMENT_PCIE1 13 + /* Chip Interrupt Controller */ #define KS2_CIC2_DDR3_ECC_IRQ_NUM -1 /* not defined in K2E */ #define KS2_CIC2_DDR3_ECC_CHAN_NUM -1 /* not defined in K2E */ |