diff options
author | Tom Rini <trini@konsulko.com> | 2022-03-30 18:07:12 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-04-08 09:05:19 -0400 |
commit | 4e4fff7d93035d19189a805fcde3120339663247 (patch) | |
tree | 9dc71882432d075528d1f091adb5d7a927e6a542 /arch/arm/mach-mvebu | |
parent | 95b641756cf0af009f8f74be5f57de84acc58d51 (diff) | |
download | u-boot-4e4fff7d93035d19189a805fcde3120339663247.tar.gz |
mvebu: Move BOOTROM_ERR_REG out of CONFIG namespace
This register is referenced in one location and does not seem
configurable, so remove it from CONFIG namespace.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r-- | arch/arm/mach-mvebu/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/include/mach/soc.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 0272dd7352..1e893777b2 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -91,7 +91,7 @@ u32 get_boot_device(void) * be done, via the bootrom error register. Here the * MSB marks if the UART mode is active. */ - val = readl(CONFIG_BOOTROM_ERR_REG); + val = readl(BOOTROM_ERR_REG); boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS; debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device); if (boot_device == BOOTROM_ERR_MODE_UART) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index aab61f7c15..3b9618852c 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -125,7 +125,7 @@ #define COMPHY_REFCLK_ALIGNMENT (MVEBU_REGISTER(0x182f8)) /* BootROM error register (also includes some status infos) */ -#define CONFIG_BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) +#define BOOTROM_ERR_REG (MVEBU_REGISTER(0x182d0)) #define BOOTROM_ERR_MODE_OFFS 28 #define BOOTROM_ERR_MODE_MASK (0xf << BOOTROM_ERR_MODE_OFFS) #define BOOTROM_ERR_MODE_UART 0x6 |