Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver

5 files changed, 72 insertions, 11 deletions

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 78a5d0efa8..0068cb8792 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -319,7 +319,7 @@ __maybe_unused int xilinx_read_eeprom(void)
 	return 0;
 }
 
-#if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
+#if defined(CONFIG_OF_BOARD)
 void *board_fdt_blob_setup(int *err)
 {
 	void *fdt_blob;
@@ -355,6 +355,7 @@ void *board_fdt_blob_setup(int *err)
 
 	debug("DTB is also not passed via %p\n", fdt_blob);
 
+	*err = -EINVAL;
 	return NULL;
 }
 #endif
@@ -377,7 +378,7 @@ int board_late_init_xilinx(void)
 	u32 ret = 0;
 	int i, id, macid = 0;
 	struct xilinx_board_description *desc;
-	phys_size_t bootm_size = gd->ram_size;
+	phys_size_t bootm_size = gd->ram_top - gd->ram_base;
 
 	if (!CONFIG_IS_ENABLED(MICROBLAZE)) {
 		ulong scriptaddr;
diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig
index e31257d335..117b476f3f 100644
--- a/board/xilinx/microblaze-generic/Kconfig
+++ b/board/xilinx/microblaze-generic/Kconfig
@@ -47,6 +47,15 @@ config XILINX_MICROBLAZE0_USR_EXCEP
 	  the exception vector table. The user exception vector is located at
 	  C_BASE_VECTORS + 0x8 address.
 
+config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP
+	bool "MicroBlaze delay slot exception support"
+	default y
+	help
+	  Enable this option if the MicroBlaze processor supports exceptions
+	  caused by delay slot instructions (processor version >= v5.00). When
+	  enabled, the hw exception handler will print a message indicating
+	  whether the exception was triggered by a delay slot instruction.
+
 config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
 	hex "Location of MicroBlaze vectors"
 	default 0x0
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 1111ad6fca..26ef048835 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -25,6 +25,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DEBUG_UART_BOARD_INIT)
+void board_debug_uart_init(void)
+{
+	/* Add initialization sequence if UART is not configured */
+}
+#endif
+
 int board_init(void)
 {
 	if (IS_ENABLED(CONFIG_SPL_BUILD))
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index 5a277c712f..2ab9596248 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -209,6 +209,19 @@ static int do_zynqmp_pmufw(struct cmd_tbl *cmdtp, int flag, int argc,
 	if (argc != cmdtp->maxargs)
 		return CMD_RET_USAGE;
 
+	if (!strncmp(argv[2], "node", 4)) {
+		u32 id;
+
+		if (!strncmp(argv[3], "close", 5))
+			return zynqmp_pmufw_config_close();
+
+		id = dectoul(argv[3], NULL);
+
+		printf("Enable permission for node ID %d\n", id);
+
+		return zynqmp_pmufw_node(id);
+	}
+
 	addr = hextoul(argv[2], NULL);
 	size = hextoul(argv[3], NULL);
 
@@ -416,6 +429,9 @@ static char zynqmp_help_text[] =
 	"		       lock(0)/split(1)\n"
 #endif
 	"zynqmp pmufw address size - load PMU FW configuration object\n"
+	"zynqmp pmufw node <id> - load PMU FW configuration object\n"
+	"zynqmp pmufw node close - disable config object loading\n"
+	"	node: keyword, id: NODE_ID in decimal format\n"
 	"zynqmp rsa srcaddr srclen mod exp rsaop -\n"
 	"	Performs RSA encryption and RSA decryption on blob of data\n"
 	"	at srcaddr and puts it back in srcaddr using modulus and\n"
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 2b5239ccb4..70b3c81f12 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -313,9 +313,8 @@ static char *zynqmp_get_silicon_idcode_name(void)
 }
 #endif
 
-int board_early_init_f(void)
+int __maybe_unused psu_uboot_init(void)
 {
-#if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
 	int ret;
 
 	ret = psu_init();
@@ -335,16 +334,31 @@ int board_early_init_f(void)
 
 	/* Delay is required for clocks to be propagated */
 	udelay(1000000);
-#endif
+	
+	return 0;
+}
 
-#ifdef CONFIG_DEBUG_UART
-	/* Uart debug for sure */
-	debug_uart_init();
-	puts("Debug uart enabled\n"); /* or printch() */
-#endif
+#if !defined(CONFIG_SPL_BUILD)
+# if defined(CONFIG_DEBUG_UART_BOARD_INIT)
+void board_debug_uart_init(void)
+{
+#  if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
+	psu_uboot_init();
+#  endif
+}
+# endif
 
-	return 0;
+# if defined(CONFIG_BOARD_EARLY_INIT_F)
+int board_early_init_f(void)
+{
+	int ret = 0;
+#  if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED) && !defined(CONFIG_DEBUG_UART_BOARD_INIT)
+	ret = psu_uboot_init();
+#  endif
+	return ret;
 }
+# endif
+#endif
 
 static int multi_boot(void)
 {
@@ -373,6 +387,18 @@ static void restore_jtag(void)
 }
 #endif
 
+static void print_secure_boot(void)
+{
+	u32 status = 0;
+
+	if (zynqmp_mmio_read((ulong)&csu_base->status, &status))
+		return;
+
+	printf("Secure Boot:\t%sauthenticated, %sencrypted\n",
+	       status & ZYNQMP_CSU_STATUS_AUTHENTICATED ? "" : "not ",
+	       status & ZYNQMP_CSU_STATUS_ENCRYPTED ? "" : "not ");
+}
+
 #define PS_SYSMON_ANALOG_BUS_VAL	0x3210
 #define PS_SYSMON_ANALOG_BUS_REG	0xFFA50914
 
@@ -413,6 +439,8 @@ int board_init(void)
 	fpga_add(fpga_xilinx, &zynqmppl);
 #endif
 
+	/* display secure boot information */
+	print_secure_boot();
 	if (current_el() == 3)
 		printf("Multiboot:\t%d\n", multi_boot());