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authorTrevor Woerner <trevor@toganlabs.com>2019-05-03 09:41:00 -0400
committerTom Rini <trini@konsulko.com>2019-05-18 08:15:35 -0400
commit1001502545ff0125c39232cf0e7f26d9213ab55f (patch)
tree6513e23c1df21e1a4bc55eb98a73a58f269ccf46 /common
parenta0aba8a2ebae51287fbee6848aece71655795fdb (diff)
downloadu-boot-1001502545ff0125c39232cf0e7f26d9213ab55f.tar.gz
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'common')
-rw-r--r--common/board_f.c2
-rw-r--r--common/lcd.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/common/board_f.c b/common/board_f.c
index 7ef20f2042..c25eb188fb 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -381,7 +381,7 @@ static int reserve_round_4k(void)
#ifdef CONFIG_ARM
__weak int reserve_mmu(void)
{
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
/* reserve TLB table */
gd->arch.tlb_size = PGTABLE_SIZE;
gd->relocaddr -= gd->arch.tlb_size;
diff --git a/common/lcd.c b/common/lcd.c
index cd630405d4..95526b1e17 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -61,7 +61,7 @@ void lcd_sync(void)
* architectures do not actually implement it. Is there a way to find
* out whether it exists? For now, ARM is safe.
*/
-#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_DCACHE_OFF)
+#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
int line_length;
if (lcd_flush_dcache)