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authorBin Meng <bmeng.cn@gmail.com>2017-08-03 02:31:02 -0700
committerTom Rini <trini@konsulko.com>2017-08-13 15:17:33 -0400
commitbeb5f521392e7da208455f3bf0c86bc141c0879d (patch)
tree23ea2f79212bfd284430336e34b2992835d5001f /drivers/nvme/nvme.c
parentf81d83d53454a108f0317c1debd8af7edc8413be (diff)
downloadu-boot-beb5f521392e7da208455f3bf0c86bc141c0879d.tar.gz
nvme: Handle zero Maximum Data Transfer Size (MDTS)
Maximum Data Transfer Size (MDTS) field indicates the maximum data transfer size between the host and the controller. The host should not submit a command that exceeds this transfer size. The value is in units of the minimum memory page size and is reported as a power of two (2^n). The spec also says: a value of 0h indicates no restrictions on transfer size. On the real NVMe card this is normally not 0 due to hardware restrictions, but with QEMU emulated NVMe device it reports as 0. In nvme_blk_read/write() below we have the following algorithm for maximum number of logic blocks per transfer: u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); dev->max_transfer_shift being 0 will for sure cause lbas to overflow. Let's use 20. With this fix, the NVMe driver works on QEMU emulated NVMe device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers/nvme/nvme.c')
-rw-r--r--drivers/nvme/nvme.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index bac253a3f7..151fe92479 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -563,6 +563,27 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev)
memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
if (ctrl->mdts)
dev->max_transfer_shift = (ctrl->mdts + shift);
+ else {
+ /*
+ * Maximum Data Transfer Size (MDTS) field indicates the maximum
+ * data transfer size between the host and the controller. The
+ * host should not submit a command that exceeds this transfer
+ * size. The value is in units of the minimum memory page size
+ * and is reported as a power of two (2^n).
+ *
+ * The spec also says: a value of 0h indicates no restrictions
+ * on transfer size. But in nvme_blk_read/write() below we have
+ * the following algorithm for maximum number of logic blocks
+ * per transfer:
+ *
+ * u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
+ *
+ * In order for lbas not to overflow, the maximum number is 15
+ * which means dev->max_transfer_shift = 15 + 9 (ns->lba_shift).
+ * Let's use 20 which provides 1MB size.
+ */
+ dev->max_transfer_shift = 20;
+ }
/* Apply quirk stuff */
dm_pci_read_config16(dev->pdev, PCI_VENDOR_ID, &vendor);