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authorSimon Glass <sjg@chromium.org>2016-01-18 20:19:15 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-01-24 12:07:17 +0800
commit9d731c82f0b17ea31666b23e5685d3d2a8388a68 (patch)
tree632fdce6062043157524d4a08bbc0613c08c1267 /drivers/pci/pci-uclass.c
parenta6eb93b3212d37fe623ed3b4351eedb971c12e3c (diff)
downloadu-boot-9d731c82f0b17ea31666b23e5685d3d2a8388a68.tar.gz
dm: pci: Add a function to write a BAR
Add a driver-model version of the pci_write_bar32 function so that this is supported in the new API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pci/pci-uclass.c')
-rw-r--r--drivers/pci/pci-uclass.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 6dd4883318..61292d72bd 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1053,6 +1053,14 @@ u32 dm_pci_read_bar32(struct udevice *dev, int barnum)
return addr & PCI_BASE_ADDRESS_MEM_MASK;
}
+void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr)
+{
+ int bar;
+
+ bar = PCI_BASE_ADDRESS_0 + barnum * 4;
+ dm_pci_write_config32(dev, bar, addr);
+}
+
static int _dm_pci_bus_to_phys(struct udevice *ctlr,
pci_addr_t bus_addr, unsigned long flags,
unsigned long skip_mask, phys_addr_t *pa)