diff options
author | Xiaowei Bao <xiaowei.bao@nxp.com> | 2018-10-26 09:56:24 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2019-01-17 13:17:28 -0800 |
commit | 5bd3c9d5565a40e3494867fa501e45be53d5e49a (patch) | |
tree | 7e0894bc55538ea890aa596ce56020f341cb3020 /drivers/pci/pcie_layerscape.c | |
parent | bae54ac99e4eb96e603821559627c46154a0d8ed (diff) | |
download | u-boot-5bd3c9d5565a40e3494867fa501e45be53d5e49a.tar.gz |
pci: layerscape: Modify the EP and RC mode judge method
Modify the RC and EP mode judge method, save the mode as a variable,
the variable will be used by other function.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/pci/pcie_layerscape.c')
-rw-r--r-- | drivers/pci/pcie_layerscape.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 3b7377a6eb..17cba46ebe 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -438,9 +438,7 @@ static int ls_pcie_probe(struct udevice *dev) struct ls_pcie *pcie = dev_get_priv(dev); const void *fdt = gd->fdt_blob; int node = dev_of_offset(dev); - u8 header_type; u16 link_sta; - bool ep_mode; uint svr; int ret; fdt_size_t cfg_size; @@ -524,15 +522,15 @@ static int ls_pcie_probe(struct udevice *dev) (unsigned long)pcie->ctrl, (unsigned long)pcie->cfg0, pcie->big_endian); - header_type = readb(pcie->dbi + PCI_HEADER_TYPE); - ep_mode = (header_type & 0x7f) == PCI_HEADER_TYPE_NORMAL; - printf("PCIe%u: %s %s", pcie->idx, dev->name, - ep_mode ? "Endpoint" : "Root Complex"); + pcie->mode = readb(pcie->dbi + PCI_HEADER_TYPE) & 0x7f; - if (ep_mode) - ls_pcie_setup_ep(pcie); - else - ls_pcie_setup_ctrl(pcie); + if (pcie->mode == PCI_HEADER_TYPE_NORMAL) { + printf("PCIe%u: %s %s", pcie->idx, dev->name, "Endpoint"); + ls_pcie_setup_ep(pcie); + } else { + printf("PCIe%u: %s %s", pcie->idx, dev->name, "Root Complex"); + ls_pcie_setup_ctrl(pcie); + } if (!ls_pcie_link_up(pcie)) { /* Let the user know there's no PCIe link */ |