diff options
| author | Stefan Roese <sr@denx.de> | 2016-08-30 16:48:20 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2016-09-27 17:29:54 +0200 |
| commit | c0132f60059d4a6809341d54f2fe744db8790421 (patch) | |
| tree | 90845c17f41919fb7ab0f06ba7ba0369c1207e42 /drivers/phy/marvell/sata.h | |
| parent | 01e62c7f11eb4c1fe814f109ecb34e1a176eb33b (diff) | |
| download | u-boot-c0132f60059d4a6809341d54f2fe744db8790421.tar.gz | |
drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 7K/8K
This version is based on the Marvell U-Boot version with this patch
applied as latest patch:
Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb
device mode" from 2016-07-05.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Diffstat (limited to 'drivers/phy/marvell/sata.h')
| -rw-r--r-- | drivers/phy/marvell/sata.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/phy/marvell/sata.h b/drivers/phy/marvell/sata.h new file mode 100644 index 0000000000..be2ba54a0d --- /dev/null +++ b/drivers/phy/marvell/sata.h @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2015-2016 Marvell International Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SATA_H_ +#define _SATA_H_ + +/* SATA3 Unit address */ +#define SATA3_VENDOR_ADDRESS 0xA0 +#define SATA3_VENDOR_ADDR_OFSSET 0 +#define SATA3_VENDOR_ADDR_MASK (0xFFFFFFFF << SATA3_VENDOR_ADDR_OFSSET) +#define SATA3_VENDOR_DATA 0xA4 + +#define SATA_CONTROL_REG 0x0 +#define SATA3_CTRL_SATA0_PD_OFFSET 6 +#define SATA3_CTRL_SATA0_PD_MASK (1 << SATA3_CTRL_SATA0_PD_OFFSET) +#define SATA3_CTRL_SATA1_PD_OFFSET 14 +#define SATA3_CTRL_SATA1_PD_MASK (1 << SATA3_CTRL_SATA1_PD_OFFSET) +#define SATA3_CTRL_SATA1_ENABLE_OFFSET 22 +#define SATA3_CTRL_SATA1_ENABLE_MASK (1 << SATA3_CTRL_SATA1_ENABLE_OFFSET) +#define SATA3_CTRL_SATA_SSU_OFFSET 23 +#define SATA3_CTRL_SATA_SSU_MASK (1 << SATA3_CTRL_SATA_SSU_OFFSET) + +#define SATA_MBUS_SIZE_SELECT_REG 0x4 +#define SATA_MBUS_REGRET_EN_OFFSET 7 +#define SATA_MBUS_REGRET_EN_MASK (0x1 << SATA_MBUS_REGRET_EN_OFFSET) + +#endif /* _SATA_H_ */ |