diff options
author | Richard Retanubun <RichardRetanubun@RuggedCom.com> | 2009-07-01 14:03:15 -0400 |
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committer | Ben Warren <biggerbadderben@gmail.com> | 2009-08-10 15:55:42 -0700 |
commit | 1a9519373b977ef3f7c9563ad3acb6c6f2424657 (patch) | |
tree | fc395d8354c00f7b4cfe7855ca1ff13577cd807c /drivers | |
parent | 9fd38a01cbc0ce4a8db41f72677103ed04b23db5 (diff) | |
download | u-boot-1a9519373b977ef3f7c9563ad3acb6c6f2424657.tar.gz |
Assigned a static SMI address to all UECs TBIPA address.
It is set to 0x1F by default and can be overwritten on the board
header file by defining CONFIG_UTBIPAR_INIT_TBIPA. This allows
the CPU to simply "reserve" one SMI address instead of using
a different one for each UEC.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/qe/uec.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index d48d22b612..db95adaeef 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -31,6 +31,11 @@ #include "uec_phy.h" #include "miiphy.h" +/* Default UTBIPAR SMI address */ +#ifndef CONFIG_UTBIPAR_INIT_TBIPA +#define CONFIG_UTBIPAR_INIT_TBIPA 0x1F +#endif + static uec_info_t uec_info[] = { #ifdef CONFIG_UEC_ETH1 STD_UEC_INFO(1), /* UEC1 */ @@ -1071,15 +1076,11 @@ static int uec_startup(uec_private_t *uec) utbipar = in_be32(&uec_regs->utbipar); utbipar &= ~UTBIPAR_PHY_ADDRESS_MASK; enet_interface = uec->uec_info->enet_interface; - if (enet_interface == ENET_1000_TBI || - enet_interface == ENET_1000_RTBI) { - utbipar |= (uec_info->phy_address + uec_info->uf_info.ucc_num) - << UTBIPAR_PHY_ADDRESS_SHIFT; - } else { - utbipar |= (0x10 + uec_info->uf_info.ucc_num) - << UTBIPAR_PHY_ADDRESS_SHIFT; - } + /* Initialize UTBIPAR address to CONFIG_UTBIPAR_INIT_TBIPA for ALL UEC. + * This frees up the remaining SMI addresses for use. + */ + utbipar |= CONFIG_UTBIPAR_INIT_TBIPA << UTBIPAR_PHY_ADDRESS_SHIFT; out_be32(&uec_regs->utbipar, utbipar); /* Configure the TBI for SGMII operation */ |