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authorHoratiu Vultur <horatiu.vultur@microchip.com>2019-01-23 16:39:42 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2019-01-23 18:28:09 +0100
commit1895b87e84d75272218a7db1d3454265fcf6e791 (patch)
tree6181191e8469ffbe46881285f651040507a677e8 /include/configs/vcoreiii.h
parent5c31ce36e33d6e6216bfa56d176976eca017afb6 (diff)
downloadu-boot-1895b87e84d75272218a7db1d3454265fcf6e791.tar.gz
MSCC: Add support for Serval SoC family.
As Ocelot, Servalt, Luton and Jaguar2, this family of SoCs are found in Microsemi Switches solution. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'include/configs/vcoreiii.h')
-rw-r--r--include/configs/vcoreiii.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h
index 4ea5f40ec5..8c30c6f09a 100644
--- a/include/configs/vcoreiii.h
+++ b/include/configs/vcoreiii.h
@@ -14,10 +14,11 @@
#define CONFIG_SYS_LOAD_ADDR 0x00100000
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
-#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
-#ifdef CONFIG_SOC_LUTON
+#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
+#define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
#else
+#define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
#endif
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ