diff options
| author | Mario Six <mario.six@gdsys.cc> | 2018-08-06 10:23:36 +0200 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2018-09-18 00:01:18 -0600 |
| commit | 07d538d2814fa03be243c71879372f4263030b78 (patch) | |
| tree | 7f643dc3547c3c5b1c881e8c2274d365fc471900 /include/dt-bindings/clk | |
| parent | 76fdad1f214beb5170f9979761286279fe8a234a (diff) | |
| download | u-boot-07d538d2814fa03be243c71879372f4263030b78.tar.gz | |
clk: Add MPC83xx clock driver
Add a clock driver for the MPC83xx architecture.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/dt-bindings/clk')
| -rw-r--r-- | include/dt-bindings/clk/mpc83xx-clk.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/dt-bindings/clk/mpc83xx-clk.h b/include/dt-bindings/clk/mpc83xx-clk.h new file mode 100644 index 0000000000..db4ea15cf4 --- /dev/null +++ b/include/dt-bindings/clk/mpc83xx-clk.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 + * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc + */ + +#ifndef DT_BINDINGS_MPC83XX_CLK_H +#define DT_BINDINGS_MPC83XX_CLK_H +#define MPC83XX_CLK_CORE 0 +#define MPC83XX_CLK_CSB 1 +#define MPC83XX_CLK_QE 2 +#define MPC83XX_CLK_BRG 3 +#define MPC83XX_CLK_LBIU 4 +#define MPC83XX_CLK_LCLK 5 +#define MPC83XX_CLK_MEM 6 +#define MPC83XX_CLK_MEM_SEC 7 +#define MPC83XX_CLK_ENC 8 +#define MPC83XX_CLK_I2C1 9 +#define MPC83XX_CLK_I2C2 10 +#define MPC83XX_CLK_TDM 11 +#define MPC83XX_CLK_SDHC 12 +#define MPC83XX_CLK_TSEC1 13 +#define MPC83XX_CLK_TSEC2 14 +#define MPC83XX_CLK_USBDR 15 +#define MPC83XX_CLK_USBMPH 16 +#define MPC83XX_CLK_PCIEXP1 17 +#define MPC83XX_CLK_PCIEXP2 18 +#define MPC83XX_CLK_SATA 19 +#define MPC83XX_CLK_DMAC 20 +#define MPC83XX_CLK_PCI 21 +/* Count */ +#define MPC83XX_CLK_COUNT 22 +#endif /* DT_BINDINGS_MPC83XX_CLK_H */ |