diff options
| author | Takahiro Kuwano <Takahiro.Kuwano@infineon.com> | 2022-09-01 15:05:31 +0900 |
|---|---|---|
| committer | Jagan Teki <jagan@edgeble.ai> | 2022-10-23 10:50:17 +0530 |
| commit | 4d60001fdf0c13ab1ccf720bb3cd6e5d385386bb (patch) | |
| tree | 7ceab529a161667689b40f8e816700b4e0231859 /include/linux | |
| parent | ee1c709cfde71b339a5c5dd0788522340c4c7e92 (diff) | |
| download | u-boot-4d60001fdf0c13ab1ccf720bb3cd6e5d385386bb.tar.gz | |
mtd: spi-nor-core: Track flash's internal address mode
The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mtd/spi-nor.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 638d807ee5..30f15452aa 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -494,6 +494,10 @@ struct spi_flash { * @rdsr_dummy dummy cycles needed for Read Status Register command. * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register * command. + * @addr_mode_nbytes: number of address bytes of current address mode. Useful + * when the flash operates with 4B opcodes but needs the + * internal address mode for opcodes that don't have a 4B + * opcode correspondent. * @bank_read_cmd: Bank read cmd * @bank_write_cmd: Bank write cmd * @bank_curr: Current flash bank @@ -540,6 +544,7 @@ struct spi_nor { u8 program_opcode; u8 rdsr_dummy; u8 rdsr_addr_nbytes; + u8 addr_mode_nbytes; #ifdef CONFIG_SPI_FLASH_BAR u8 bank_read_cmd; u8 bank_write_cmd; |