diff options
| author | Tom Rini <trini@konsulko.com> | 2022-09-19 13:19:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-09-19 16:07:12 -0400 |
| commit | e9a1ff9724348408144c7f1c5b5cc26130ba46e5 (patch) | |
| tree | 68b56f117206d121b4a7e567b0209c02283c98e6 /include | |
| parent | b6c50e5831f6ce3800d4b3cf3c7aa35dde8c48d9 (diff) | |
| parent | f76f3e3b44328fe6229650540109af93750fd5f0 (diff) | |
| download | u-boot-e9a1ff9724348408144c7f1c5b5cc26130ba46e5.tar.gz | |
Merge branch 'master' into next
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
26 files changed, 504 insertions, 402 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 9006c76927..4aeb61f08c 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -116,10 +116,14 @@ struct global_data { /** * @precon_buf_idx: pre-console buffer index * - * @precon_buf_idx indicates the current position of the buffer used to - * collect output before the console becomes available - */ - unsigned long precon_buf_idx; + * @precon_buf_idx indicates the current position of the + * buffer used to collect output before the console becomes + * available. When negative, the pre-console buffer is + * temporarily disabled (used when the pre-console buffer is + * being written out, to prevent adding its contents to + * itself). + */ + long precon_buf_idx; #endif /** * @env_addr: address of environment structure diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 2157f3533e..fcb319a20a 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -70,7 +70,7 @@ #ifdef CONFIG_CMD_UBIFS #define BOOTENV_SHARED_UBIFS \ "ubifs_boot=" \ - "if ubi part ${bootubipart} && " \ + "if ubi part ${bootubipart} ${bootubioff} && " \ "ubifsmount ubi0:${bootubivol}; " \ "then " \ "devtype=ubi; " \ @@ -80,12 +80,14 @@ "run scan_dev_for_boot; " \ "ubifsumount; " \ "fi\0" -#define BOOTENV_DEV_UBIFS(devtypeu, devtypel, instance, bootubipart, bootubivol) \ +#define BOOTENV_DEV_UBIFS_BOOTUBIOFF(off) #off /* type check, throw error when called with more args */ +#define BOOTENV_DEV_UBIFS(devtypeu, devtypel, instance, bootubipart, bootubivol, ...) \ "bootcmd_ubifs" #instance "=" \ "bootubipart=" #bootubipart "; " \ "bootubivol=" #bootubivol "; " \ + "bootubioff=" BOOTENV_DEV_UBIFS_BOOTUBIOFF(__VA_ARGS__) "; " \ "run ubifs_boot\0" -#define BOOTENV_DEV_NAME_UBIFS(devtypeu, devtypel, instance, bootubipart, bootubivol) \ +#define BOOTENV_DEV_NAME_UBIFS(devtypeu, devtypel, instance, ...) \ #devtypel #instance " " #else #define BOOTENV_SHARED_UBIFS diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h deleted file mode 100644 index 6ee5ec0962..0000000000 --- a/include/configs/corenet_ds.h +++ /dev/null @@ -1,365 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2009-2012 Freescale Semiconductor, Inc. - * Copyright 2020-2021 NXP - */ - -/* - * Corenet DS style board configuration file - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <linux/stringify.h> - -#include "../board/freescale/common/ics307_clk.h" - -#ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#endif - -#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -/* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#endif - -/* High Level Configuration Options */ - -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc -#endif - -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - -#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ - -/* - * Config the L3 Cache as L3 SRAM - */ -#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_RAMBOOT_TEXT_BASE) -#else -#define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR -#endif -#define CONFIG_SYS_L3_SIZE (1024 << 10) -#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) - -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull -#endif - -/* - * DDR Setup - */ -#define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define SPD_EEPROM_ADDRESS1 0x51 -#define SPD_EEPROM_ADDRESS2 0x52 -#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ - -/* - * Local Bus Definitions - */ - -/* Set the local bus clock 1/8 of platform clock */ -#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 - -#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* Start of PromJet */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull -#else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE -#endif - -#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ -#ifdef CONFIG_PHYS_64BIT -#define PIXIS_BASE_PHYS 0xfffdf0000ull -#else -#define PIXIS_BASE_PHYS PIXIS_BASE -#endif - -#define PIXIS_LBMAP_SWITCH 7 -#define PIXIS_LBMAP_MASK 0xf0 -#define PIXIS_LBMAP_SHIFT 4 -#define PIXIS_LBMAP_ALTBANK 0x40 - -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - -/* Nand Flash */ -#ifdef CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_BASE 0xffa00000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull -#else -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE -#endif - -#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -/* NAND flash config */ -#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ - | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ - | BR_PS_8 /* Port Size = 8 bit */ \ - | BR_MS_FCM /* MSEL = FCM */ \ - | BR_V) /* valid */ -#define CONFIG_SYS_NAND_OR_PRELIM (0xFFFC0000 /* length 256K */ \ - | OR_FCM_PGS /* Large Page*/ \ - | OR_FCM_CSCT \ - | OR_FCM_CST \ - | OR_FCM_CHT \ - | OR_FCM_SCY_1 \ - | OR_FCM_TRLX \ - | OR_FCM_EHTR) -#endif /* CONFIG_NAND_FSL_ELBC */ - -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} - -#define CONFIG_HWCONFIG - -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR -/* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#else -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS -#endif -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ - -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) - -/* Serial Port - controlled on board with jumper J8 - * open - index 2 - * shorted - index 1 - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) - -/* I2C */ - -/* - * RapidIO - */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull -#else -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 -#endif -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ - -#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull -#else -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000 -#endif -#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ - -/* - * for slave u-boot IMAGE instored in master memory space, - * PHYS must be aligned based on the SIZE - */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull -/* - * for slave UCODE and ENV instored in master memory space, - * PHYS must be aligned based on the SIZE - */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ - -/* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ - -/* - * SRIO_PCIE_BOOT - SLAVE - */ -#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) -#endif - -/* - * eSPI - Enhanced SPI - */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ - -/* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull - -/* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull - -/* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull - -/* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull - -/* Qman/Bman */ -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#else -#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE -#endif -#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull -#else -#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE -#endif -#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME - -#ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c -#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d -#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x1e -#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1f -#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4 - -#define CONFIG_SYS_FM2_DTSEC1_PHY_ADDR 0x1c -#define CONFIG_SYS_FM2_DTSEC2_PHY_ADDR 0x1d -#define CONFIG_SYS_FM2_DTSEC3_PHY_ADDR 0x1e -#define CONFIG_SYS_FM2_DTSEC4_PHY_ADDR 0x1f -#define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 - -#define CONFIG_SYS_TBIPA_VALUE 8 -#endif - -/* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -#ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#endif - -/* - * Miscellaneous configurable options - */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ - -/* - * Environment Configuration - */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ - -#ifdef CONFIG_TARGET_P4080DS -#define __USB_PHY_TYPE ulpi -#else -#define __USB_PHY_TYPE utmi -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ - "bank_intlv=cs0_cs1;" \ - "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ - "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ - "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ - "tftpflash=tftpboot $loadaddr $uboot && " \ - "protect off $ubootaddr +$filesize && " \ - "erase $ubootaddr +$filesize && " \ - "cp.b $loadaddr $ubootaddr $filesize && " \ - "protect on $ubootaddr +$filesize && " \ - "cmp.b $loadaddr $ubootaddr $filesize\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ - "ramdiskfile=p4080ds/ramdisk.uboot\0" \ - "fdtaddr=1e00000\0" \ - "fdtfile=p4080ds/p4080ds.dtb\0" \ - "bdev=sda3\0" - -#include <asm/fsl_secure_boot.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 79424647f6..0f7e1c5c45 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -60,7 +60,7 @@ "fdtfile=imx6q-dhcom-pdk2.dtb\0"\ "update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \ "load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\ - "sf probe && sf erase 0x0 0xa0000 && " \ + "sf probe && sf erase 0x0 0x100000 && " \ "sf write ${loadaddr} 0x400 ${filesize}\0" \ BOOTENV diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h new file mode 100644 index 0000000000..50885c53b3 --- /dev/null +++ b/include/configs/imx6ulz_smm_m2.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2021 Amarula Solutions B.V. + * + */ +#ifndef __IMX6ULZ_SMM_M2_CONFIG_H +#define __IMX6ULZ_SMM_M2_CONFIG_H + +#include "mx6_common.h" + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> +#include <linux/stringify.h> + +/* SPL options */ +#include "imx6_spl.h" + +#define CONFIG_MXC_UART_BASE UART4_BASE + +#ifndef CONFIG_SPL_BUILD + +#define BOOT_TARGET_DEVICES(func) \ + func(NAND, nand, 0) \ + +#include <config_distro_bootcmd.h> + +#endif /* !CONFIG_SPL_BUILD */ + +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "fdt_addr_r=0x81000000\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \ + +#define NANDARGS \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + CONFIG_MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs " \ + "${optargs} " \ + "mtdparts=${mtdparts} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:root rw ubi.mtd=rootfs\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${fdt_addr_r} nanddtb; " \ + "nand read ${loadaddr} kernel; " \ + "bootz ${loadaddr} - ${fdt_addr_r}\0" + +#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ + "bootcmd_" #devtypel #instance "=" \ + "run nandboot\0" + +#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ + #devtypel #instance " " + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ + NANDARGS \ + BOOTENV + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_SIZE SZ_128M + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +/* NAND */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define CONFIG_SYS_NAND_BASE 0x20000000 + +#endif diff --git a/include/configs/imxrt1170-evk.h b/include/configs/imxrt1170-evk.h new file mode 100644 index 0000000000..2459fe24e2 --- /dev/null +++ b/include/configs/imxrt1170-evk.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 + * Author(s): Jesse Taube <Mr.Bossman075@gmail.com> + * Giulio Benetti <giulio.benetti@benettiengineering.com> + */ + +#ifndef __IMXRT1170_EVK_H +#define __IMXRT1170_EVK_H + +#include <asm/arch/imx-regs.h> + +#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 + +/* + * Configuration of the external SDRAM memory + */ + +#define PHYS_SDRAM 0x80000000 +#define PHYS_SDRAM_SIZE (64 * 1024 * 1024) + +#define DMAMEM_SZ_ALL (1 * 1024 * 1024) +#define DMAMEM_BASE (PHYS_SDRAM + PHYS_SDRAM_SIZE - \ + DMAMEM_SZ_ALL) +/* For SPL */ +#define CONFIG_SYS_UBOOT_START 0x202403FD +/* For SPL ends */ + +#endif /* __IMXRT1170_EVK_H */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 38063ba484..df46e586f3 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -37,8 +37,6 @@ /* serial port */ #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) diff --git a/include/configs/librem5.h b/include/configs/librem5.h new file mode 100644 index 0000000000..389469aec5 --- /dev/null +++ b/include/configs/librem5.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2017 NXP + * Copyright 2018 Emcraft Systems + * Copyright 2022 Purism + * + */ + +#ifndef __LIBREM5_H +#define __LIBREM5_H + +/* #define DEBUG */ + +#include <version.h> +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) + +#ifdef CONFIG_SPL_BUILD + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ + +#define CONFIG_POWER_BD71837 +#define CONFIG_POWER_BD71837_I2C_BUS 0 +#define CONFIG_POWER_BD71837_I2C_ADDR 0x4B + +#endif /* CONFIG_SPL_BUILD*/ + +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_USBD_HS + +#define CONSOLE_ON_UART1 + +#ifdef CONSOLE_ON_UART1 +#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONSOLE_UART_CLK 0 +#define CONSOLE "ttymxc0" +#elif defined(CONSOLE_ON_UART2) +#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONSOLE_UART_CLK 1 +#define CONSOLE "ttymxc1" +#elif defined(CONSOLE_ON_UART3) +#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONSOLE_UART_CLK 2 +#define CONSOLE "ttymxc2" +#elif defined(CONSOLE_ON_UART4) +#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR +#define CONSOLE_UART_CLK 3 +#define CONSOLE "ttymxc3" +#else +#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONSOLE_UART_CLK 0 +#define CONSOLE "ttymxc0" +#endif + +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> +#else +#define BOOTENV +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "scriptaddr=0x80000000\0" \ + "pxefile_addr_r=0x80100000\0" \ + "kernel_addr_r=0x80800000\0" \ + "fdt_addr_r=0x84800000\0" \ + "ramdisk_addr_r=0x85000000\0" \ + "console=" CONSOLE ",115200\0" \ + "bootargs=u_boot_version=" PLAIN_VERSION "\0" \ + "stdin=usbacm,serial\0" \ + "stdout=usbacm,serial\0" \ + "stderr=usbacm,serial\0" \ + BOOTENV + +/* Link Definitions */ + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */ + +/* Monitor Command Prompt */ + +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#endif diff --git a/include/configs/p1_p2_bootsrc.h b/include/configs/p1_p2_bootsrc.h index 13e4fdb4fd..d155e553e2 100644 --- a/include/configs/p1_p2_bootsrc.h +++ b/include/configs/p1_p2_bootsrc.h @@ -34,6 +34,18 @@ #define RST_NOR_CMD(var, ...) "" #endif +#ifdef __SW_BOOT_NOR_BANK_LO +#define RST_NOR_LO_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_MASK)) +#else +#define RST_NOR_LO_CMD(var, ...) "" +#endif + +#ifdef __SW_BOOT_NOR_BANK_UP +#define RST_NOR_UP_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_MASK)) +#else +#define RST_NOR_UP_CMD(var, ...) "" +#endif + #ifdef __SW_BOOT_SPI #define RST_SPI_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK)) #else @@ -46,6 +58,12 @@ #define RST_SD_CMD(var, ...) "" #endif +#ifdef __SW_BOOT_SD2 +#define RST_SD2_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK)) +#else +#define RST_SD2_CMD(var, ...) "" +#endif + #ifdef __SW_BOOT_NAND #define RST_NAND_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK)) #else @@ -57,3 +75,5 @@ #else #define RST_PCIE_CMD(var, ...) "" #endif + +#define RST_DEF_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(0x00, 0xff)) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f7d8723b03..d201c72a6c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -24,6 +24,9 @@ #define __SW_NOR_BANK_MASK 0xfd #define __SW_NOR_BANK_UP 0x00 #define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0x5c /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0x5e /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ #define CONFIG_SYS_L2_SIZE (256 << 10) #endif @@ -52,6 +55,9 @@ #define __SW_NOR_BANK_MASK 0xfd #define __SW_NOR_BANK_UP 0x00 #define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0x64 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0x66 /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ #define CONFIG_SYS_L2_SIZE (256 << 10) /* * Dynamic MTD Partition support with mtdparts @@ -70,6 +76,9 @@ #define __SW_NOR_BANK_MASK 0xfd #define __SW_NOR_BANK_UP 0x00 #define __SW_NOR_BANK_LO 0x02 +#define __SW_BOOT_NOR_BANK_UP 0xc8 /* (__SW_BOOT_NOR | __SW_NOR_BANK_UP) */ +#define __SW_BOOT_NOR_BANK_LO 0xca /* (__SW_BOOT_NOR | __SW_NOR_BANK_LO) */ +#define __SW_BOOT_NOR_BANK_MASK 0x01 /* (__SW_BOOT_MASK & __SW_NOR_BANK_MASK) */ #define CONFIG_SYS_L2_SIZE (512 << 10) /* * Dynamic MTD Partition support with mtdparts @@ -80,7 +89,11 @@ #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MMC_U_BOOT_START CONFIG_SYS_TEXT_BASE +#ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR +#define CONFIG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512) +#else #define CONFIG_SYS_MMC_U_BOOT_OFFS CONFIG_SPL_PAD_TO +#endif #elif defined(CONFIG_SPIFLASH) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_SYS_TEXT_BASE @@ -465,10 +478,14 @@ __VSCFW_ADDR \ MAP_NOR_LO_CMD(map_lowernorbank) \ MAP_NOR_UP_CMD(map_uppernorbank) \ RST_NOR_CMD(norboot) \ +RST_NOR_LO_CMD(norlowerboot) \ +RST_NOR_UP_CMD(norupperboot) \ RST_SPI_CMD(spiboot) \ RST_SD_CMD(sdboot) \ +RST_SD2_CMD(sd2boot) \ RST_NAND_CMD(nandboot) \ RST_PCIE_CMD(pciboot) \ +RST_DEF_CMD(defboot) \ "" #define CONFIG_USB_FAT_BOOT \ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index b1a011bacb..1e966a2322 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x3E000000 -#define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */ +#define CONFIG_SYS_HZ_CLOCK 750000000 /* 750 MHz */ /* Environment */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index b8ff705ac9..f549f9f7ad 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -36,6 +36,7 @@ "bootm 0x5800000" #define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_addr=0x4c00000\0" \ "scriptaddr=0x4d00000\0" \ "pxefile_addr_r=0x4e00000\0" \ "fdt_addr_r=0x4f00000\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 5b5fce9bda..4d20b86591 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -20,10 +20,12 @@ #endif #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x44000000\0" \ - "kernel_addr_r=0x42000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "fdt_addr_r=0x50200000\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_comp_addr_r=0x40200000\0" \ + "kernel_comp_size=0x08080000\0" \ + "ramdisk_addr_r=0x50300000\0" \ + "scriptaddr=0x50280000\0" /* Enable Distro Boot */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index fca40beba1..9b8db223bb 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -34,10 +34,12 @@ #endif /* CONFIG_CMD_NET */ #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x43000000\0" \ - "kernel_addr_r=0x40000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "fdt_addr_r=0x50200000\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_comp_addr_r=0x40200000\0" \ + "kernel_comp_size=0x08080000\0" \ + "ramdisk_addr_r=0x50300000\0" \ + "scriptaddr=0x50280000\0" /* Enable Distro Boot */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/dt-bindings/clock/imxrt1170-clock.h b/include/dt-bindings/clock/imxrt1170-clock.h new file mode 100644 index 0000000000..8ab8018a15 --- /dev/null +++ b/include/dt-bindings/clock/imxrt1170-clock.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 + * Author(s): Jesse Taube <Mr.Bossman075@gmail.com> + */ + +#ifndef __DT_BINDINGS_CLOCK_IMXRT1170_H +#define __DT_BINDINGS_CLOCK_IMXRT1170_H + +#define IMXRT1170_CLK_DUMMY 0 +#define IMXRT1170_CLK_OSC 1 +#define IMXRT1170_CLK_OSC_32K 2 +#define IMXRT1170_CLK_RCOSC_16M 3 +#define IMXRT1170_CLK_RCOSC_48M 4 +#define IMXRT1170_CLK_RCOSC_48M_DIV2 5 +#define IMXRT1170_CLK_RCOSC_400M 6 +#define IMXRT1170_CLK_PLL_ARM 7 +#define IMXRT1170_CLK_PLL_AUDIO 8 +#define IMXRT1170_CLK_PLL_VIDEO 9 +#define IMXRT1170_CLK_PLL1 10 +#define IMXRT1170_CLK_PLL1_DIV2 11 +#define IMXRT1170_CLK_PLL1_DIV5 12 +#define IMXRT1170_CLK_PLL2 13 +#define IMXRT1170_CLK_PLL2_PFD0 14 +#define IMXRT1170_CLK_PLL2_PFD1 15 +#define IMXRT1170_CLK_PLL2_PFD2 16 +#define IMXRT1170_CLK_PLL2_PFD3 17 +#define IMXRT1170_CLK_PLL3 18 +#define IMXRT1170_CLK_PLL3_DIV2 19 +#define IMXRT1170_CLK_PLL3_PFD0 20 +#define IMXRT1170_CLK_PLL3_PFD1 21 +#define IMXRT1170_CLK_PLL3_PFD2 22 +#define IMXRT1170_CLK_PLL3_PFD3 23 +#define IMXRT1170_CLK_M7 24 +#define IMXRT1170_CLK_M4 25 +#define IMXRT1170_CLK_BUS 26 +#define IMXRT1170_CLK_BUS_LPSR 27 +#define IMXRT1170_CLK_LPUART1_SEL 28 +#define IMXRT1170_CLK_LPUART1 29 +#define IMXRT1170_CLK_USDHC1_SEL 30 +#define IMXRT1170_CLK_USDHC1 31 +#define IMXRT1170_CLK_GPT1_SEL 32 +#define IMXRT1170_CLK_GPT1 33 +#define IMXRT1170_CLK_SEMC_SEL 34 +#define IMXRT1170_CLK_SEMC 35 +#define IMXRT1170_CLK_END 36 + +#endif /* __DT_BINDINGS_CLOCK_IMXRT1170_H */ diff --git a/include/dt-bindings/clock/sifive-fu740-prci.h b/include/dt-bindings/clock/sifive-fu740-prci.h index c1224783c0..672bdadbf6 100644 --- a/include/dt-bindings/clock/sifive-fu740-prci.h +++ b/include/dt-bindings/clock/sifive-fu740-prci.h @@ -1,10 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0 OR MIT */ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ /* - * Copyright (C) 2020-2021 SiFive, Inc. + * Copyright (C) 2019 SiFive, Inc. * Wesley Terpstra * Paul Walmsley * Zong Li - * Pragnesh Patel */ #ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H @@ -12,14 +11,14 @@ /* Clock indexes for use by Device Tree data and the PRCI driver */ -#define PRCI_CLK_COREPLL 0 -#define PRCI_CLK_DDRPLL 1 -#define PRCI_CLK_GEMGXLPLL 2 -#define PRCI_CLK_DVFSCOREPLL 3 -#define PRCI_CLK_HFPCLKPLL 4 -#define PRCI_CLK_CLTXPLL 5 -#define PRCI_CLK_TLCLK 6 -#define PRCI_CLK_PCLK 7 -#define PRCI_CLK_PCIEAUX 8 +#define FU740_PRCI_CLK_COREPLL 0 +#define FU740_PRCI_CLK_DDRPLL 1 +#define FU740_PRCI_CLK_GEMGXLPLL 2 +#define FU740_PRCI_CLK_DVFSCOREPLL 3 +#define FU740_PRCI_CLK_HFPCLKPLL 4 +#define FU740_PRCI_CLK_CLTXPLL 5 +#define FU740_PRCI_CLK_TLCLK 6 +#define FU740_PRCI_CLK_PCLK 7 +#define FU740_PRCI_CLK_PCIE_AUX 8 -#endif +#endif /* __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H */ diff --git a/include/dt-bindings/memory/imxrt-sdram.h b/include/dt-bindings/memory/imxrt-sdram.h index acb35bce27..4b3b0c2f50 100644 --- a/include/dt-bindings/memory/imxrt-sdram.h +++ b/include/dt-bindings/memory/imxrt-sdram.h @@ -82,6 +82,7 @@ #define MEM_WIDTH_8BITS 0x0 #define MEM_WIDTH_16BITS 0x1 +#define MEM_WIDTH_32BITS 0x2 #define BL_1 0x0 #define BL_2 0x1 diff --git a/include/efi_api.h b/include/efi_api.h index 83c01085fd..9bb0d44ac8 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -226,6 +226,22 @@ enum efi_reset_type { EFI_GUID(0x6dcbd5ed, 0xe82d, 0x4c44, 0xbd, 0xa1, \ 0x71, 0x94, 0x19, 0x9a, 0xd9, 0x2a) +#define EFI_CONFORMANCE_PROFILES_TABLE_GUID \ + EFI_GUID(0x36122546, 0xf7ef, 0x4c8f, 0xbd, 0x9b, \ + 0xeb, 0x85, 0x25, 0xb5, 0x0c, 0x0b) + +#define EFI_CONFORMANCE_PROFILES_TABLE_VERSION 1 + +#define EFI_CONFORMANCE_PROFILE_EBBR_2_0_GUID \ + EFI_GUID(0xcce33c35, 0x74ac, 0x4087, 0xbc, 0xe7, \ + 0x8b, 0x29, 0xb0, 0x2e, 0xeb, 0x27) + +struct efi_conformance_profiles_table { + u16 version; + u16 number_of_profiles; + efi_guid_t conformance_profiles[]; +} __packed; + struct efi_capsule_header { efi_guid_t capsule_guid; u32 header_size; diff --git a/include/efi_loader.h b/include/efi_loader.h index fb35087ddb..7554f3b7db 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -544,8 +544,10 @@ void efi_carve_out_dt_rsv(void *fdt); void efi_try_purge_kaslr_seed(void *fdt); /* Called by bootefi to make console interface available */ efi_status_t efi_console_register(void); -/* Called by efi_init_obj_list() to initialize efi_disks */ +/* Called by efi_init_early() to add block devices when probed */ efi_status_t efi_disk_init(void); +/* Called by efi_init_obj_list() to proble all block devices */ +efi_status_t efi_disks_register(void); /* Called by efi_init_obj_list() to install EFI_RNG_PROTOCOL */ efi_status_t efi_rng_register(void); /* Called by efi_init_obj_list() to install EFI_TCG2_PROTOCOL */ @@ -1080,6 +1082,13 @@ extern u8 num_image_type_guids; efi_status_t efi_esrt_register(void); /** + * efi_ecpt_register() - Install the ECPT system table. + * + * Return: status code + */ +efi_status_t efi_ecpt_register(void); + +/** * efi_esrt_populate() - Populates the ESRT entries from the FMP instances * present in the system. * If an ESRT already exists, the old ESRT is replaced in the system table. diff --git a/include/efi_selftest.h b/include/efi_selftest.h index 5340cefbb6..e900cb85a9 100644 --- a/include/efi_selftest.h +++ b/include/efi_selftest.h @@ -18,6 +18,9 @@ #define EFI_ST_FAILURE 1 #define EFI_ST_SUCCESS_STR u"SUCCESS" +extern const struct efi_system_table *st_systable; +extern const struct efi_boot_services *st_boottime; + /** * efi_st_printf() - print a message * @@ -131,6 +134,14 @@ u16 *efi_st_translate_code(u16 code); int efi_st_strcmp_16_8(const u16 *buf1, const char *buf2); /** + * efi_st_get_config_table() - get configuration table + * + * @guid: GUID of the configuration table + * Return: pointer to configuration table or NULL + */ +void *efi_st_get_config_table(const efi_guid_t *guid); + +/** * efi_st_get_key() - reads an Unicode character from the input device * * Return: Unicode character diff --git a/include/fdt_support.h b/include/fdt_support.h index ac76939e81..b8380716f3 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -11,6 +11,7 @@ #include <asm/u-boot.h> #include <linux/libfdt.h> +#include <abuf.h> /** * arch_fixup_fdt() - Write arch-specific information to fdt @@ -187,6 +188,18 @@ int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name); int ft_board_setup(void *blob, struct bd_info *bd); /** + * board_rng_seed() - Provide a seed to be passed via /chosen/rng-seed + * + * This function is called if CONFIG_BOARD_RNG_SEED is set, and must + * be provided by the board. It should return, via @buf, some suitable + * seed value to pass to the kernel. + * + * @param buf A struct abuf for returning the seed and its size. + * @return 0 if ok, negative on error. + */ +int board_rng_seed(struct abuf *buf); + +/** * board_fdt_chosen_bootargs() - Arbitrarily amend fdt kernel command line * * This is used for late modification of kernel command line arguments just diff --git a/include/fs.h b/include/fs.h index 2195dc172e..8370d88cb2 100644 --- a/include/fs.h +++ b/include/fs.h @@ -46,7 +46,7 @@ int do_fat_fsload(struct cmd_tbl *cmdtp, int flag, int argc, int do_ext2load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); /* - * Tell the fs layer which block device an partition to use for future + * Tell the fs layer which block device and partition to use for future * commands. This also internally identifies the filesystem that is present * within the partition. The identification process may be limited to a * specific filesystem type by passing FS_* in the fstype parameter. diff --git a/include/image.h b/include/image.h index a148073113..03424f0521 100644 --- a/include/image.h +++ b/include/image.h @@ -1020,6 +1020,76 @@ int fit_image_get_data_size_unciphered(const void *fit, int noffset, int fit_image_get_data_and_size(const void *fit, int noffset, const void **data, size_t *size); +/** + * fit_get_data_node() - Get verified image data for an image + * @fit: Pointer to the FIT format image header + * @image_uname: The name of the image node + * @data: A pointer which will be filled with the location of the image data + * @size: A pointer which will be filled with the size of the image data + * + * This function looks up the location and size of an image specified by its + * name. For example, if you had a FIT like:: + * + * images { + * my-firmware { + * ... + * }; + * }; + * + * Then you could look up the data location and size of the my-firmware image + * by calling this function with @image_uname set to "my-firmware". This + * function also verifies the image data (if enabled) before returning. The + * image description is printed out on success. @data and @size will not be + * modified on faulure. + * + * Return: + * * 0 on success + * * -EINVAL if the image could not be verified + * * -ENOENT if there was a problem getting the data/size + * * Another negative error if there was a problem looking up the image node. + */ +int fit_get_data_node(const void *fit, const char *image_uname, + const void **data, size_t *size); + +/** + * fit_get_data_conf_prop() - Get verified image data for a property in /conf + * @fit: Pointer to the FIT format image header + * @prop_name: The name of the property in /conf referencing the image + * @data: A pointer which will be filled with the location of the image data + * @size: A pointer which will be filled with the size of the image data + * + * This function looks up the location and size of an image specified by a + * property in /conf. For example, if you had a FIT like:: + * + * images { + * my-firmware { + * ... + * }; + * }; + * + * configurations { + * default = "conf-1"; + * conf-1 { + * some-firmware = "my-firmware"; + * }; + * }; + * + * Then you could look up the data location and size of the my-firmware image + * by calling this function with @prop_name set to "some-firmware". This + * function also verifies the image data (if enabled) before returning. The + * image description is printed out on success. @data and @size will not be + * modified on faulure. + * + * Return: + * * 0 on success + * * -EINVAL if the image could not be verified + * * -ENOENT if there was a problem getting the data/size + * * Another negative error if there was a problem looking up the configuration + * or image node. + */ +int fit_get_data_conf_prop(const void *fit, const char *prop_name, + const void **data, size_t *size); + int fit_image_hash_get_algo(const void *fit, int noffset, const char **algo); int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value, int *value_len); diff --git a/include/tpm-common.h b/include/tpm-common.h index a28629e701..b2c5404430 100644 --- a/include/tpm-common.h +++ b/include/tpm-common.h @@ -120,6 +120,16 @@ struct tpm_ops { int (*get_desc)(struct udevice *dev, char *buf, int size); /** + * report_state() - Collect information about the current TPM state + * + * @dev: Device to check + * @buf: Buffer to put the string + * @size: Maximum size of buffer + * Return: return code of the operation (0 = success) + */ + int (*report_state)(struct udevice *dev, char *buf, int size); + + /** * send() - send data to the TPM * * @dev: Device to talk to @@ -235,6 +245,16 @@ u32 tpm_clear_and_reenable(struct udevice *dev); int tpm_get_desc(struct udevice *dev, char *buf, int size); /** + * tpm_report_state() - Collect information about the current TPM state + * + * @dev: Device to check + * @buf: Buffer to put the string + * @size: Maximum size of buffer + * Return: return code of the operation (0 = success) + */ +int tpm_report_state(struct udevice *dev, char *buf, int size); + +/** * tpm_xfer() - send data to the TPM and get response * * This first uses the device's send() method to send the bytes. Then it calls diff --git a/include/tpm-v2.h b/include/tpm-v2.h index e79c90b939..737e57551d 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -658,4 +658,34 @@ u32 tpm2_disable_platform_hierarchy(struct udevice *dev); u32 tpm2_submit_command(struct udevice *dev, const u8 *sendbuf, u8 *recvbuf, size_t *recv_size); +/** + * tpm_cr50_report_state() - Report the Cr50 internal state + * + * @dev: TPM device + * @vendor_cmd: Vendor command number to send + * @vendor_subcmd: Vendor sub-command number to send + * @recvbuf: Buffer to save the response to + * @recv_size: Pointer to the size of the response buffer + * Return: result of the operation + */ +u32 tpm2_report_state(struct udevice *dev, uint vendor_cmd, uint vendor_subcmd, + u8 *recvbuf, size_t *recv_size); + +/** + * tpm2_enable_nvcommits() - Tell TPM to commit NV data immediately + * + * For Chromium OS verified boot, we may reboot or reset at different times, + * possibly leaving non-volatile data unwritten by the TPM. + * + * This vendor command is used to indicate that non-volatile data should be + * written to its store immediately. + * + * @dev TPM device + * @vendor_cmd: Vendor command number to send + * @vendor_subcmd: Vendor sub-command number to send + * Return: result of the operation + */ +u32 tpm2_enable_nvcommits(struct udevice *dev, uint vendor_cmd, + uint vendor_subcmd); + #endif /* __TPM_V2_H */ diff --git a/include/tpm_api.h b/include/tpm_api.h index 11aa14eb79..8979d9d6df 100644 --- a/include/tpm_api.h +++ b/include/tpm_api.h @@ -81,14 +81,16 @@ u32 tpm_nv_write_value(struct udevice *dev, u32 index, const void *data, * * @param dev TPM device * @param index index of the PCR - * @param in_digest 160-bit value representing the event to be + * @param in_digest 160/256-bit value representing the event to be * recorded - * @param out_digest 160-bit PCR value after execution of the + * @param size size of digest in bytes + * @param out_digest 160/256-bit PCR value after execution of the * command + * @param name digest source, used for log output * Return: return code of the operation */ u32 tpm_pcr_extend(struct udevice *dev, u32 index, const void *in_digest, - void *out_digest); + uint size, void *out_digest, const char *name); /** * Issue a TPM_PCRRead command. |