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| author | Sam Shih <sam.shih@mediatek.com> | 2022-04-21 14:23:51 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-05-05 09:29:57 -0400 |
| commit | dafe0fbfb0f37e2d3be3e25a60975e1eb31ef8b7 (patch) | |
| tree | 4def1d48ec6f5af3c4d0bd24e6516b6b3b3a48d4 /tools/prelink-riscv.inc | |
| parent | ccf24a9d7739241c08e17b45d7fbe74b9baa3dcc (diff) | |
| download | u-boot-dafe0fbfb0f37e2d3be3e25a60975e1eb31ef8b7.tar.gz | |
pinctrl: mediatek: rewrite mtk_pinconf_set and related functions
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Diffstat (limited to 'tools/prelink-riscv.inc')
0 files changed, 0 insertions, 0 deletions