diff options
| -rw-r--r-- | arch/microblaze/cpu/exception.c | 2 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/Kconfig | 9 | ||||
| -rw-r--r-- | include/configs/microblaze-generic.h | 3 |
3 files changed, 10 insertions, 4 deletions
diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c index f60f1fc693..5601dde5b4 100644 --- a/arch/microblaze/cpu/exception.c +++ b/arch/microblaze/cpu/exception.c @@ -40,7 +40,7 @@ void _hw_exception_handler (void) case 0x7: puts("Priviledged or stack protection violation exception\n"); break; -#ifdef MICROBLAZE_V5 +#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP) case 0x1000: puts("Exception in delay slot\n"); break; diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index e31257d335..117b476f3f 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -47,6 +47,15 @@ config XILINX_MICROBLAZE0_USR_EXCEP the exception vector table. The user exception vector is located at C_BASE_VECTORS + 0x8 address. +config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP + bool "MicroBlaze delay slot exception support" + default y + help + Enable this option if the MicroBlaze processor supports exceptions + caused by delay slot instructions (processor version >= v5.00). When + enabled, the hw exception handler will print a message indicating + whether the exception was triggered by a delay slot instruction. + config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR hex "Location of MicroBlaze vectors" default 0x0 diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index ca749ed18a..fd5a9cf8b8 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -11,9 +11,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3 -/* MicroBlaze CPU */ -#define MICROBLAZE_V5 1 - #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* uart */ |