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-rw-r--r--arch/arm/include/asm/arch-tegra114/tegra.h2
-rw-r--r--arch/arm/include/asm/arch-tegra124/tegra.h2
-rw-r--r--arch/arm/include/asm/arch-tegra20/tegra.h2
-rw-r--r--arch/arm/include/asm/arch-tegra30/tegra.h2
4 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/include/asm/arch-tegra114/tegra.h b/arch/arm/include/asm/arch-tegra114/tegra.h
index 705ca5758e..5d426b524a 100644
--- a/arch/arm/include/asm/arch-tegra114/tegra.h
+++ b/arch/arm/include/asm/arch-tegra114/tegra.h
@@ -17,8 +17,6 @@
#ifndef _TEGRA114_H_
#define _TEGRA114_H_
-#define CONFIG_TEGRA114
-
#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T114 */
#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
diff --git a/arch/arm/include/asm/arch-tegra124/tegra.h b/arch/arm/include/asm/arch-tegra124/tegra.h
index 86ebd19453..db3d837920 100644
--- a/arch/arm/include/asm/arch-tegra124/tegra.h
+++ b/arch/arm/include/asm/arch-tegra124/tegra.h
@@ -8,8 +8,6 @@
#ifndef _TEGRA124_H_
#define _TEGRA124_H_
-#define CONFIG_TEGRA124
-
#define NV_PA_SDRAM_BASE 0x80000000
#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */
#define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */
diff --git a/arch/arm/include/asm/arch-tegra20/tegra.h b/arch/arm/include/asm/arch-tegra20/tegra.h
index 6a4b40ec76..18856ac372 100644
--- a/arch/arm/include/asm/arch-tegra20/tegra.h
+++ b/arch/arm/include/asm/arch-tegra20/tegra.h
@@ -8,8 +8,6 @@
#ifndef _TEGRA20_H_
#define _TEGRA20_H_
-#define CONFIG_TEGRA20
-
#define NV_PA_SDRAM_BASE 0x00000000
#include <asm/arch-tegra/tegra.h>
diff --git a/arch/arm/include/asm/arch-tegra30/tegra.h b/arch/arm/include/asm/arch-tegra30/tegra.h
index 4ad8b1c053..c02c5d8500 100644
--- a/arch/arm/include/asm/arch-tegra30/tegra.h
+++ b/arch/arm/include/asm/arch-tegra30/tegra.h
@@ -17,8 +17,6 @@
#ifndef _TEGRA30_H_
#define _TEGRA30_H_
-#define CONFIG_TEGRA30
-
#define NV_PA_SDRAM_BASE 0x80000000 /* 0x80000000 for real T30 */
#include <asm/arch-tegra/tegra.h>