| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | riscv: fix the wrong swap value register | Brad Kim | 2020-12-14 | 1 | -1/+1 |
| * | riscv: Add some comments to start.S | Sean Anderson | 2020-09-30 | 1 | -2/+17 |
| * | riscv: Ensure gp is NULL or points to valid data | Sean Anderson | 2020-09-30 | 1 | -3/+25 |
| * | riscv: Consolidate fences into AMOs for available_harts_lock | Sean Anderson | 2020-09-30 | 1 | -6/+3 |
| * | Revert "riscv: Clear pending interrupts before enabling IPIs" | Sean Anderson | 2020-09-30 | 1 | -2/+0 |
| * | riscv: Fix linking error when building u-boot-spl with no SMP support | Leo Yu-Chi Liang | 2020-07-24 | 1 | -0/+2 |
| * | riscv: Clear pending interrupts before enabling IPIs | Sean Anderson | 2020-07-01 | 1 | -0/+2 |
| * | riscv: Provide a mechanism to fix DT for reserved memory | Atish Patra | 2020-04-23 | 1 | -0/+1 |
| * | riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL | Bin Meng | 2020-04-23 | 1 | -7/+7 |
| * | riscv: Merge unnecessary SMP ifdefs in start.S | Bin Meng | 2020-04-23 | 1 | -4/+0 |
| * | riscv: Remove unnecessary instruction | Sean Anderson | 2020-02-10 | 1 | -3/+2 |
| * | common: Move relocate_code() to init.h | Simon Glass | 2020-01-17 | 1 | -1/+1 |
| * | riscv: add option to wait for ack from secondary harts in smp functions | Lukas Auer | 2019-12-10 | 1 | -0/+2 |
| * | riscv: Fix clear bss loop in the start-up code | Rick Chen | 2019-12-10 | 1 | -2/+2 |
| * | riscv: update fix_rela_dyn | Marcus Comstedt | 2019-09-03 | 1 | -5/+5 |
| * | riscv: support SPL stack and global data relocation | Lukas Auer | 2019-08-26 | 1 | -1/+34 |
| * | riscv: add SPL support | Lukas Auer | 2019-08-26 | 1 | -1/+22 |
| * | riscv: add run mode configuration for SPL | Lukas Auer | 2019-08-26 | 1 | -3/+3 |
| * | riscv: Access CSRs using CSR numbers | Bin Meng | 2019-08-15 | 1 | -2/+1 |
| * | riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena... | Rick Chen | 2019-05-09 | 1 | -0/+2 |
| * | riscv: Introduce CONFIG_XIP to support booting from flash | Rick Chen | 2019-05-09 | 1 | -0/+6 |
| * | riscv: hang if relocation of secondary harts fails | Lukas Auer | 2019-04-08 | 1 | -1/+12 |
| * | riscv: do not rely on hart ID passed by previous boot stage | Lukas Auer | 2019-04-08 | 1 | -0/+4 |
| * | riscv: add support for multi-hart systems | Lukas Auer | 2019-04-08 | 1 | -1/+133 |
| * | riscv: save hart ID in register tp instead of s0 | Lukas Auer | 2019-04-08 | 1 | -2/+2 |
| * | riscv: delay initialization of caches and debug UART | Lukas Auer | 2019-04-08 | 1 | -8/+8 |
| * | riscv: Save boot hart id to the global data | Bin Meng | 2018-12-18 | 1 | -0/+4 |
| * | riscv: Move trap handler codes to mtrap.S | Bin Meng | 2018-12-18 | 1 | -89/+0 |
| * | riscv: ax25-ae350: Pass dtb address to u-boot with a1 register | Rick Chen | 2018-12-05 | 1 | -2/+0 |
| * | riscv: Add kconfig option to run U-Boot in S-mode | Anup Patel | 2018-12-05 | 1 | -8/+15 |
| * | riscv: cache: Implement i/dcache [status, enable, disable] | Rick Chen | 2018-11-26 | 1 | -0/+6 |
| * | riscv: save hart ID and device tree passed by prior boot stage | Lukas Auer | 2018-11-26 | 1 | -2/+10 |
| * | riscv: do not blindly modify the mstatus CSR | Lukas Auer | 2018-11-26 | 1 | -4/+4 |
| * | riscv: remove unused labels in start.S | Lukas Auer | 2018-11-26 | 1 | -9/+0 |
| * | Drop CONFIG_INIT_CRITICAL | Bin Meng | 2018-11-26 | 1 | -13/+0 |
| * | riscv: align mtvec on a 4-byte boundary | Lukas Auer | 2018-11-26 | 1 | -1/+1 |
| * | riscv: fix inconsistent use of spaces and tabs in start.S | Lukas Auer | 2018-11-26 | 1 | -161/+161 |
| * | riscv: Make start.S available for all targets | Bin Meng | 2018-10-03 | 1 | -0/+292 |
