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path: root/arch/arm/dts/at91-sama5d2_icp.dts
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2 ICP board
 *			SAMA5D2 Industrial Connectivity Platform
 *
 *  Copyright (c) 2018, Microchip Technology Inc.
 *                2018, Eugen Hristev <eugen.hristev@microchip.com>
 */
/dts-v1/;
#include "sama5d2.dtsi"
#include "sama5d2-pinfunc.h"

/ {
	model = "Microchip SAMA5D2 ICP";
	compatible = "atmel,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";

	aliases {
		serial0 = &uart0;
		i2c1	= &i2c1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	ahb {

		sdmmc0: sdio-host@a0000000 {
			bus-width = <4>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_sdmmc0_default>;
			status = "okay";
		};

		apb {

			qspi1: spi@f0024000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_qspi1_sck_cs_default &pinctrl_qspi1_dat_default>;
				status = "okay";

				flash@0 {
					compatible = "jedec,spi-nor";
					reg = <0>;
					spi-max-frequency = <83000000>;
					spi-rx-bus-width = <4>;
					spi-tx-bus-width = <4>;
				};
			};

			macb0: ethernet@f8008000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq &pinctrl_macb0_rst>;
				phy-mode = "internal";
				status = "okay";
			};

			uart0: serial@f801c000 { /* mikrobus1 uart */
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_mikrobus1_uart>;
				status = "okay";
			};

			i2c1: i2c@fc028000 {
				dmas = <0>, <0>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c1_default>;
				status = "okay";

				eeprom@50 {
					compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */
					reg = <0x50>;
					pagesize = <16>;
				};

				eeprom@52 {
					compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */
					reg = <0x52>;
					pagesize = <16>;
				};

				eeprom@53 {
					compatible = "atmel,24c02"; /* EEPROM is 2Kbits microchip 24aa025e48, an at24c02 with page size of 16 */
					reg = <0x53>;
					pagesize = <16>;
				};
			};

			pioA: pinctrl@fc038000 {
				status = "okay";
				pinctrl_i2c1_default: i2c1_default {
					pinmux = <PIN_PD19__TWD1>,
						 <PIN_PD20__TWCK1>;
					bias-disable;
				};

				pinctrl_macb0_rmii: macb0_rmii {
					pinmux = <PIN_PD1__GRXCK>,
						 <PIN_PD2__GTXER>,
						 <PIN_PD5__GRX2>,
						 <PIN_PD6__GRX3>,
						 <PIN_PD7__GTX2>,
						 <PIN_PD8__GTX3>,
						 <PIN_PD9__GTXCK>,
						 <PIN_PD10__GTXEN>,
						 <PIN_PD11__GRXDV>,
						 <PIN_PD12__GRXER>,
						 <PIN_PD13__GRX0>,
						 <PIN_PD14__GRX1>,
						 <PIN_PD15__GTX0>,
						 <PIN_PD16__GTX1>,
						 <PIN_PD17__GMDC>,
						 <PIN_PD18__GMDIO>;
					bias-disable;
				};

				pinctrl_macb0_phy_irq: macb0_phy_irq {
					pinmux = <PIN_PD3__GPIO>;
					bias-disable;
				};

				pinctrl_macb0_rst: macb0_sw_rst {
					pinmux = <PIN_PD4__GPIO>;
					bias-pull-up;
				};

				pinctrl_mikrobus1_uart: mikrobus1_uart {
					pinmux = <PIN_PB26__URXD0>,
						 <PIN_PB27__UTXD0>;
					bias-disable;
				};

				pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
					pinmux = <PIN_PA6__QSPI1_SCK>,
						 <PIN_PA11__QSPI1_CS>;
					bias-disable;
				};

				pinctrl_qspi1_dat_default: qspi1_dat_default {
					pinmux = <PIN_PA7__QSPI1_IO0>,
						 <PIN_PA8__QSPI1_IO1>,
						 <PIN_PA9__QSPI1_IO2>,
						 <PIN_PA10__QSPI1_IO3>;
					bias-pull-up;
				};

				pinctrl_sdmmc0_default: sdmmc0_default {
					pinmux = <PIN_PA1__SDMMC0_CMD>,
						 <PIN_PA2__SDMMC0_DAT0>,
						 <PIN_PA3__SDMMC0_DAT1>,
						 <PIN_PA4__SDMMC0_DAT2>,
						 <PIN_PA5__SDMMC0_DAT3>,
						 <PIN_PA0__SDMMC0_CK>,
						 <PIN_PA13__SDMMC0_CD>;
					bias-disable;
				};
			};
		};
	};
};