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author | Peter Johnson <peter@tortall.net> | 2008-02-22 04:48:56 +0000 |
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committer | Peter Johnson <peter@tortall.net> | 2008-02-22 04:48:56 +0000 |
commit | 11ca8fd3241f027b95ec021c41b9ed8bc779259c (patch) | |
tree | 327b7f25505f109c471c13242c1dc66dfcb7a477 /modules/arch/x86/gen_x86_insn.py | |
parent | 6ced647e9798da6e57331065770e4a71131ea802 (diff) | |
download | yasm-11ca8fd3241f027b95ec021c41b9ed8bc779259c.tar.gz |
Add support for Nehalem XSAVE instructions and CPU feature.
svn path=/trunk/yasm/; revision=2042
Diffstat (limited to 'modules/arch/x86/gen_x86_insn.py')
-rwxr-xr-x | modules/arch/x86/gen_x86_insn.py | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/modules/arch/x86/gen_x86_insn.py b/modules/arch/x86/gen_x86_insn.py index fd923d4f..d850feed 100755 --- a/modules/arch/x86/gen_x86_insn.py +++ b/modules/arch/x86/gen_x86_insn.py @@ -5324,6 +5324,18 @@ add_insn("pshaq", "sse5psh", modifiers=[0x07]) # roundps, roundpd, roundss, roundsd, ptest are in SSE4.1 ##################################################################### +# Intel XSAVE instructions +##################################################################### +add_insn("xgetbv", "threebyte", modifiers=[0x0F, 0x01, 0xD0], + cpu=["XSAVE", "386"]) +add_insn("xsetbv", "threebyte", modifiers=[0x0F, 0x01, 0xD1], + cpu=["XSAVE", "386", "Priv"]) +add_insn("xsave", "twobytemem", modifiers=[4, 0x0F, 0xAE], + cpu=["XSAVE", "386"]) +add_insn("xrstor", "twobytemem", modifiers=[5, 0x0F, 0xAE], + cpu=["XSAVE", "386"]) + +##################################################################### # AMD 3DNow! instructions ##################################################################### |