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* powerpc: Kconfig: fix reference to unknown symbolHEADmasterAntony Pavlov2023-05-121-1/+1
| | | | | | | | | | In Kconfig files, the symbols don't have a CONFIG_ prefix. Fix an unknown Kconfig symbol introduced in d3b8a88d34 ("treewide: rename CONFIG_HAS_ARCH_SJLJ to CONFIG_ARCH_HAS_SJLJ"). Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Link: https://lore.barebox.org/20230512023838.1255762-1-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: rockchip: bbu: Fix getting active boot slotSascha Hauer2023-05-091-9/+2
| | | | | | | | | | | | | With some TF-A versions the IRAM where the boot information is stored cannot be accessed in normal mode. We therefore copy the information to another place before starting the TF-A. This copy is used for the boot source detection logic, but not yet for the barebox update code which still uses the original information from IRAM. Use the already existing rockchip_bootsource_get_active_slot() to avoid data aborts when trying to detect the active boot slot. Link: https://lore.barebox.org/20230509045055.601772-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: rockchip: bootm: move image to 4k alignmentSascha Hauer2023-05-031-1/+2
| | | | | | | | The new barebox must be 4k aligned which is not always the case when we skip over the SDRAM initialisation binary. memmove to a suitable place. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: NXP i.MX8MN EVK: Drop unnecessary IMD_USED_OFSascha Hauer2023-05-021-3/+0
| | | | | | | IMD tags are now automatically referenced when the DT itself is referenced. IMD_USED_OF is no longer needed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* defconfigs: usb-a9g20: update to a working versionWolfram Sang2023-05-021-9/+6
| | | | | | | | | | | | | The defconfig needs to be updated to get a usable barebox: We need bigger malloc because of the increasing kernel size, soft ECC so NAND will work, ifup and relocatable for easier development. Fix the prompt while here. Sadly, because of size restrictions, FAT, NFS, menus, netconsole, and SHA1 have to go. Signed-off-by: Wolfram Sang <wsa@kernel.org> Link: https://lore.barebox.org/20230427184718.105393-3-wsa@kernel.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: at91: usb-a926x: remove nand partitions from configWolfram Sang2023-05-021-4/+0
| | | | | | | | | | | | | | We define partitions as well in the board file. Leading to: New partition nand0.at91bootstrap (0x00000000-0x0001ffff) on nand0 overlaps with partition at91bootstrap_raw (0x00000000-0x0001ffff), not creating it cannot create nand0.at91bootstrap: Invalid argument addpart: Invalid argument So, remove it from the config file. Signed-off-by: Wolfram Sang <wsa@kernel.org> Link: https://lore.barebox.org/20230427184718.105393-2-wsa@kernel.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: multi_v7_defconfig: Enable BCM283X Pinctrl/GPIO driverSascha Hauer2023-05-021-0/+1
| | | | | | | multi_v7_defconfig has everything necessary to build for Rasperry Pi, but the BCM283X Pinctrl/GPIO driver is missing. Enable it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/usb'Sascha Hauer2023-04-1912-11/+15
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| * ARM: rockchip_v8_defconfig: Enable some commandsSascha Hauer2023-03-241-0/+4
| | | | | | | | | | | | Enable some useful commands, like 'wd', 'usbgadget and 'led' Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: move include files to place where Linux has themSascha Hauer2023-03-2011-11/+11
| | | | | | | | | | | | | | | | | | For easier patch merging and comparison with Linux move the usb gadget files to where Linux has them. For now do a plain git mv include/usb include/linux/usb, eventhough there might be some files which are purely barebox specific. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rockchip'Sascha Hauer2023-04-1918-116/+477
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| * | arm: rockchip: add support for CM3 on IO boardRouven Czerwinski2023-04-058-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Working: - RKBIN DDR training (rk3566_ddr_1056MHz_v1.13.bin) - RKBIN TF-A (v1.34) from RKBIN - Environment storage - DHCP, ping and link detection Signed-off-by: Rouven Czerwinski <rouven@czerwinskis.de> Link: https://lore.barebox.org/20230330161101.58529-1-r.czerwinski@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Rockchip: Do not pass device tree to TF-ASascha Hauer2023-04-051-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The downstream TF-A doesn't cope with our device tree when CONFIG_OF_OVERLAY_LIVE is enabled, supposedly because it is too big for some reason. Otherwise it doesn't have any visible effect if we pass a device tree or not, except that the TF-A fills in the ethernet MAC address into the device tree. The upstream TF-A doesn't use the device tree at all. Pass NULL for now until we have a good reason to pass a real device tree. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Rockchip: make bootsource logic generic to all SoCsAhmad Fatoum2023-04-054-28/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Decoding of the bootsource from the register value can be shared across multiple Rockchip SoCs. Move the code to a common place to allow for that. At least with some TF-A versions the IRAM where the bootsource is stored cannot not be accessed in normal mode, so read it out before we start the TF-A. For this the scratch space is used. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Rockchip: rk3568: use rk3568_barebox_entry()Sascha Hauer2023-04-054-88/+14
| | | | | | | | | | | | | | | | | | | | | There is a rk3568 specific entry function for barebox now, switch the existing boards over to use it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Rockchip: Add rk3568 specific barebox entry functionSascha Hauer2023-04-031-0/+19
| | | | | | | | | | | | | | | | | | | | | Add a rk3568 specific barebox entry function to simplify board code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: Rockchip: implement memory read out from controllerAhmad Fatoum2023-04-032-0/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver to read out the amount of memory from the DDR controller. The decoding of the registers has been taken from U-Boot. Currently supported are the RK3399 and the RK3568, but decoding should work on other Rockchip SoCs as well. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: dts: rk356x: Add DMC controller nodeSascha Hauer2023-03-281-0/+5
| | | | | | | | | | | | | | | | | | | | | There's currently no DMC controller node in the upstream dtsi file. Add one until it's there. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/misc'Sascha Hauer2023-04-1990-373/+167
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| * | | ARM: rpi: fixup prefix property from VideoCore FDTAhmad Fatoum2023-04-171-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | barebox will warn about lack of these properties when network booting. To make network booted barebox behave identically to flashed barebox, let's unconditionally copy them from VideoCore FDT into fixed up FDT. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230414183545.2039170-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | treewide: remove no-longer needed IMD_USED_OFAhmad Fatoum2023-04-1711-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that a __dtb* reference automatically pulls in the IMD tag if support is compiled in, we can drop all IMD_USED_OF and turn the macro into a no-op until we remove it completely. Theoretically, an out-of-tree board could reference a DT via IMD_USED_OF and not actually reference it via __dtb_*_start. So instead of makign IMD_USED_OF a no-top, let's print a warning for a few releases until we remove it completely. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230404101706.2237453-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: dts: i.MX8MP: add dual-role usb-type-c PORT1 supportMarco Felsch2023-04-051-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the dual-role support locally till we have upstream devicetree support. By this patch and with the recent usb-otg patches from Sascha usbgadget/fastboot does work now on the i.MX8MP-EVK as well. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230322210322.254744-1-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: cleanup 32bit/64bit support in KconfigSascha Hauer2023-04-056-31/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The decision whether to build a 32bit or 64bit barebox has to be made first before anything else, so this makes CONFIG_64BIT a toplevel option without any further dependencies. With this patch we will only present the SoCs/boards which are actually supported by the selected code model in Kconfig. Without this patch it was often possible to select 32bit boards on a 64bit build or vice versa, which resulted in a broken build. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: update defconfigsSascha Hauer2023-04-0569-271/+82
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: remove freescale-mx21-ads_defconfigSascha Hauer2023-04-051-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for this board is no longer present in the tree, so remove its defconfig Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: ZynqMP: Move ZynqMP feature selection into submenuSascha Hauer2023-04-051-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move ZynqMP feature selection into submenu like done on the other multiarch supporting architectures as well. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: Rockchip: let boards depend on 32/64bitSascha Hauer2023-04-053-1/+11
| | |/ | |/| | | | | | | | | | | | | | | | | | | So far we can enable support for 32bit and 64bit SoCs at the same time which results in an unbuildable barebox. This is annoying, let the board visibility depend on the selected code model. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx-image'Sascha Hauer2023-04-1917-7/+322
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| * | | ARM: i.MX8M: add QSPI update handlerMarco Felsch2023-04-043-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the FlexSPI/QSPI update handler to be able to write the common barebox image to the QSPI. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-22-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8M: add qspi barebox and barebox-environment partitionsMarco Felsch2023-04-043-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the same partition size layout as done for SD/eMMC devices. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-21-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8M: enable FlexSPI image supportMarco Felsch2023-04-043-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required flexspi_ image configuration options to build mmc and flexspi compatible images. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-20-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: bbu: add FlexSPI update handlerMarco Felsch2023-04-041-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the update handler support to flash barebox flexspi compatible images to the QSPI. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-19-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: bbu: add filetype offsetMarco Felsch2023-04-041-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it possible to have a different filetype offset which is used during the filetype check. This is required for the upcoming i.MX8MM/N/P QSPI bbu support. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-18-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX: bbu: rename IMX_INTERNAL_FLAG_ERASE to IMX_BBU_FLAG_ERASEMarco Felsch2023-04-041-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the flag to align it with the existing flags. Also move it to the common i.MX bbu header to avoid possible overrides. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-17-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8M: Add QSPI boot supportMarco Felsch2023-04-041-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX8M platforms support booting from QSPI NOR flashes via the FlexSPI boot option. This commit adds the support to load the image from QSPI NOR flashes into the RAM. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-11-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8MM bootsource: fix QSPI boot source detectionMarco Felsch2023-04-041-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ROM will not update the sw-info field, so we need to parse the SBMR1. There is just one QSPI controller so set instance to 0 to avoid bootsource_instance=unknown. This ports u-boot commit: | commit d4e84f24a6815957b3a218166f214ca9a1c4a7de | Author: Peng Fan <peng.fan@nxp.com> | Date: Thu May 17 15:15:59 2018 +0800 | | imx8m: add QSPI boot dev | | When boot type could not be detected from rom sw info, | read sbmr1 to detect, here we only use it to detect FLEXSPI | boot, because ROM not update it in rom sw info. | | Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-10-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX bootsource: set QSPI instanceMarco Felsch2023-04-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the instance to avoid '$bootsource_instace = unkown' albeit most SoCs just have one instance. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-9-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8M: Add QSPI image load supportMarco Felsch2023-04-042-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the helper function which can be used to load images from the QSPI flash. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-8-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mci: imx-esdhc-pbl: move imx_load_image into common xload codeMarco Felsch2023-04-041-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the function public available so we can reuse it for other boot mediums like QSPI. No functional changes Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-7-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8MN: add missing IMD_USED_OF image metadata entriesMarco Felsch2023-04-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the entries the update must be forced if IMD is enabled. Add the missing IMD_USED_OF to avoid this. Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-4-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | ARM: i.MX8MM: add missing IMD_USED_OF image metadata entryMarco Felsch2023-04-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the entry the update must be forced if IMD is enabled. Add the missing IMD_USED_OF to avoid this. Fixes: eba4a4eccd ("ARM: i.MX8MM: add support for 8MMINILPD4-CPU2 board") Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-3-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | arm: error out if __LINUX_ARM_ARCH__ is undefinedAhmad Fatoum2023-04-172-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent multiarch (really, multiplatform) rework, oldconfig will reask users what platforms they want to build for. The default is N, so holding return (or an olddefconfig) will just disable all boards and with it all CPUs leading to a cryptic torrent of: arch/arm/include/asm/swab.h:31:28: warning: "__LINUX_ARM_ARCH__" is not defined, evaluates to 0 [-Wundef] 31 | #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 | ^~~~~~~~~~~~~~~~~~ Make user experience a bit better by printing an error message instead. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230414171421.1745965-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM64: setupc: don't invoke KASAN before relocationAhmad Fatoum2023-04-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Plain memset and memcpy are checked by KASAN if enabled before calling unchecked __memset and __memcpy respectively. KASAN uses a kasan_initialized variable as first condition in its memory check, but that only works after relocation. For that reason, we must take care not to invoke KASAN before then. This was done for ARM32, but was missing for ARM64. Do so now. This fixes an annoying issue where network booting a KASAN-enabled barebox twice in a row would fail: The first happened to work because the memory kasan_initialized was placed at was zero. The second would behave erratically, because BSS initialization would silently fail and barebox static storage would then be initialized with the final values of the previous run. Fixes: 932ef7a02e2f ("ARM: Add KASan support") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230415083447.3069903-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: LS1021A: slow bootRenaud Barbier2023-04-112-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It was noticed that the LS1021A-IOT was slow to boot and perform computing intensive operations. Enable SMP so the cortex-a7 cache works as expected. Signed-off-by: Renaud Barbier mailto:renaud.barbier@ametek.com Link: https://lore.barebox.org/BL0PR07MB5665E8DA118845ED96A8289DEC959@BL0PR07MB5665.namprd07.prod.outlook.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | treewide: add missing device tree artifact cleanup where neededAhmad Fatoum2023-04-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DTs in arch/$ARCH/dts are all cleaned up when invoking the make target, but we have a few DTs outside these directories. Clean those up as well and add a clean line for the overlay too. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Link: https://lore.barebox.org/20230408080616.938638-1-ahmad@a3f.at Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: add sama5d4_wifx to at91_multi_defconfigSam Ravnborg2023-04-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this change we have more chances to catch build issues during refactoring. The board is added to get build coverage, it is not verified if it actually boots with this config. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://lore.barebox.org/20230407184500.GB1648837@ravnborg.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | ARM: sama5d4_wifx: fix build with moved mach filesSam Ravnborg2023-04-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://lore.barebox.org/20230407184356.GA1648837@ravnborg.org Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | RISC-V: configs: rv64i_defconfig: disable SBI serialAhmad Fatoum2023-04-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Virt64, enabling SBI serial leads to doubled output, because both OpenSBI and barebox use the same serial for output and all consoles are enabled by default. Given that SBI PUTCHAR is no longer part of newer SBI specs, we can just disable the sbi console driver in the defconfig to work around this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230411071436.1630752-9-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | RISC-V: restrict GCC optimization some moreAhmad Fatoum2023-04-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of these we are already setting for ARM and all of them are already in use by the Linux RISC-V arch Makefile. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230411071436.1630752-8-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | | RISC-V: sifive: disable non-functional SPI nodesAhmad Fatoum2023-04-112-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reasons,newer QEMU versions (tested v5.2.0) trigger a load fault at the first readl of the driver. For now disable the nodes, until this issue is looked into. Reported-by: Antony Pavlov <antonynpavlov@gmail.com> Link: https://lore.barebox.org/barebox/20220830140533.deb229d3e3f32c827e6ff521@gmail.com/ Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230411071436.1630752-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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