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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:23 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:23 +0100 |
| commit | 1be5f94f9c85821287b9ae423f738a8bab499526 (patch) | |
| tree | a2ff1865a63e3c3082585b950486d9bb05e36b30 /opcodes/aarch64-asm.c | |
| parent | 3c17238bc9fe8a078a6199470291f07bab9c64c8 (diff) | |
| download | binutils-gdb-1be5f94f9c85821287b9ae423f738a8bab499526.tar.gz | |
[binutils][aarch64] New sve_shift_tsz_bhsd iclass.
This new iclass encodes the variant by which is the most significant bit
used of bits 23-22:20-19, where those bits are usually part of a
given constant operand.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
iclass.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_shift_tsz_bhsd iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_shift_tsz_bhsd iclass decode.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 6be17f9246e..ad50598fd0e 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1626,6 +1626,7 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) case sve_shift_pred: case sve_shift_unpred: case sve_shift_tsz_hsd: + case sve_shift_tsz_bhsd: /* For indices and shift amounts, the variant is encoded as part of the immediate. */ break; |