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authorNick Clifton <nickc@redhat.com>2000-12-03 22:10:02 +0000
committerNick Clifton <nickc@redhat.com>2000-12-03 22:10:02 +0000
commit02f1dea1862e465db9654e12cb6a590158789d8f (patch)
tree56ca5d85112b32dfc8137bc7c7b0646412a01b89 /gas/testsuite/gas/mips
parent70b98a6f2cc7f69edd324886e5b24b686384b7e3 (diff)
downloadbinutils-redhat-02f1dea1862e465db9654e12cb6a590158789d8f.tar.gz
Add MIPS64 instructions and tests
Diffstat (limited to 'gas/testsuite/gas/mips')
-rw-r--r--gas/testsuite/gas/mips/mips.exp1
-rw-r--r--gas/testsuite/gas/mips/mips64.d17
-rw-r--r--gas/testsuite/gas/mips/mips64.s22
3 files changed, 40 insertions, 0 deletions
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index a7deff8c90..b5deb356b9 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -89,6 +89,7 @@ if [istarget mips*-*-*] then {
run_dump_test "lineno"
run_dump_test "sync"
run_dump_test "mips32"
+ run_dump_test "mips64"
# Make sure that -mcpu=FOO and -mFOO are equivalent. Assemble a file
# containing 4650-specific instructions with -m4650 and -mcpu=4650,
diff --git a/gas/testsuite/gas/mips/mips64.d b/gas/testsuite/gas/mips/mips64.d
new file mode 100644
index 0000000000..1baa367a19
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips64.d
@@ -0,0 +1,17 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS MIPS64 instructions
+#as: -mips64
+
+# Check MIPS32 instruction assembly
+
+.*: +file format elf.*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 70410825 dclo \$at,\$v0
+0+0004 <[^>]*> 70831824 dclz \$v1,\$a0
+0+0008 <[^>]*> 48232000 dmfc2 \$v1,\$4
+0+000c <[^>]*> 48242800 dmfc2 \$a0,\$5
+0+0010 <[^>]*> 48253007 dmfc2 \$a1,\$6,7
+0+0014 <[^>]*> 48a63800 dmtc2 \$a2,\$7
+0+0018 <[^>]*> 48a74000 dmtc2 \$a3,\$8
+0+001c <[^>]*> 48a84807 dmtc2 \$t0,\$9,7
diff --git a/gas/testsuite/gas/mips/mips64.s b/gas/testsuite/gas/mips/mips64.s
new file mode 100644
index 0000000000..bf5e6b74ef
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips64.s
@@ -0,0 +1,22 @@
+# source file to test assembly of mips64 instructions
+
+ .set noreorder
+ .set noat
+
+ .globl text_label .text
+text_label:
+
+ # unprivileged CPU instructions
+
+ dclo $1, $2
+ dclz $3, $4
+
+ # unprivileged coprocessor instructions.
+ # these tests use cp2 to avoid other (cp0, fpu, prefetch) opcodes.
+
+ dmfc2 $3, $4
+ dmfc2 $4, $5, 0 # disassembles without sel
+ dmfc2 $5, $6, 7
+ dmtc2 $6, $7
+ dmtc2 $7, $8, 0 # disassembles without sel
+ dmtc2 $8, $9, 7