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| author | Manish V Badarkhe <manish.badarkhe@arm.com> | 2023-05-09 18:15:01 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-05-09 18:15:01 +0200 |
| commit | c214ced421bafd0840c9bdbaf47f747fe9dd60ed (patch) | |
| tree | 2a684e70930066adf83636ba8fb81b78066d8388 /drivers/arm/gic/v3/gicv3_main.c | |
| parent | 315f4f8a84934de3391deb32582a5d07e7c2b823 (diff) | |
| parent | 1d0d5e40206c693e24b0a4de7dbcfc4b79f3138e (diff) | |
| download | arm-trusted-firmware-c214ced421bafd0840c9bdbaf47f747fe9dd60ed.tar.gz | |
Merge changes from topic "bk/context_refactor" into integration
* changes:
fix(gicv3): restore scr_el3 after changing it
refactor(cm): make SVE and SME build dependencies logical
Diffstat (limited to 'drivers/arm/gic/v3/gicv3_main.c')
| -rw-r--r-- | drivers/arm/gic/v3/gicv3_main.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c index 168d0ebc9..2c7480001 100644 --- a/drivers/arm/gic/v3/gicv3_main.c +++ b/drivers/arm/gic/v3/gicv3_main.c @@ -330,6 +330,8 @@ void gicv3_cpuif_enable(unsigned int proc_num) /* Enable Group1 Secure interrupts */ write_icc_igrpen1_el3(read_icc_igrpen1_el3() | IGRPEN1_EL3_ENABLE_G1S_BIT); + /* and restore the original */ + write_scr_el3(scr_el3); isb(); /* Add DSB to ensure visibility of System register writes */ dsb(); |