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| author | Andre Przywara <andre.przywara@arm.com> | 2022-11-17 17:30:43 +0000 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2023-03-22 13:33:22 +0000 |
| commit | 7db710f0cb54c5943c9e60cb9c29eadd8817e2c5 (patch) | |
| tree | 9126b03430a2433dd442d99855ce659126a98dad /include/arch | |
| parent | b8f03d29e172af7bd576eafbce9d485a9f626e2e (diff) | |
| download | arm-trusted-firmware-7db710f0cb54c5943c9e60cb9c29eadd8817e2c5.tar.gz | |
refactor(cpufeat): enable FEAT_CSV2_2 for FEAT_STATE_CHECKED
At the moment we only support FEAT_CSV2_2 to be either unconditionally
compiled in, or to be not supported at all.
Add support for runtime detection (ENABLE_FEAT_CSV2_2=2), by splitting
is_armv8_0_feat_csv2_2_present() into an ID register reading function
and a second function to report the support status. That function
considers both build time settings and runtime information (if needed),
and is used before we access the SCXTNUM_EL2 system register.
Also move the context saving code from assembly to C, and use the new
is_feat_csv2_2_supported() function to guard its execution.
Change the FVP platform default to the now supported dynamic option (=2),
so the right decision can be made by the code at runtime.
Change-Id: I89c7bc883e6a65727fdbdd36eb3bfbffb2196da7
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'include/arch')
| -rw-r--r-- | include/arch/aarch64/arch_features.h | 18 | ||||
| -rw-r--r-- | include/arch/aarch64/arch_helpers.h | 2 |
2 files changed, 17 insertions, 3 deletions
diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h index 029cdd112..0342d2f7c 100644 --- a/include/arch/aarch64/arch_features.h +++ b/include/arch/aarch64/arch_features.h @@ -301,10 +301,22 @@ static inline unsigned int read_feat_sb_id_field(void) /********************************************************************************* * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2) ********************************************************************************/ -static inline bool is_armv8_0_feat_csv2_2_present(void) +static inline unsigned int read_feat_csv2_id_field(void) { - return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) & - ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED); + return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2); +} + +static inline bool is_feat_csv2_2_supported(void) +{ + if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) { + return false; + } + + if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) { + return true; + } + + return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED; } /********************************************************************************** diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h index 720f6f3bd..35027ca67 100644 --- a/include/arch/aarch64/arch_helpers.h +++ b/include/arch/aarch64/arch_helpers.h @@ -540,6 +540,8 @@ DEFINE_RENAME_SYSREG_READ_FUNC(erxaddr_el1, ERXADDR_EL1) DEFINE_RENAME_SYSREG_READ_FUNC(erxmisc0_el1, ERXMISC0_EL1) DEFINE_RENAME_SYSREG_READ_FUNC(erxmisc1_el1, ERXMISC1_EL1) +DEFINE_RENAME_SYSREG_RW_FUNCS(scxtnum_el2, SCXTNUM_EL2) + /* Armv8.1 VHE Registers */ DEFINE_RENAME_SYSREG_RW_FUNCS(contextidr_el2, CONTEXTIDR_EL2) DEFINE_RENAME_SYSREG_RW_FUNCS(ttbr1_el2, TTBR1_EL2) |