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* AArch64: Disable Secure Cycle CounterAlexei Fedorov2019-08-211-1/+9
* Switch AARCH32/AARCH64 to __aarch64__Julius Werner2019-08-012-13/+13
* Refactor SPSR initialisation codeJohn Tsichritzis2019-07-242-26/+12
* Add support for Branch Target IdentificationAlexei Fedorov2019-05-241-4/+0
* BL1: Fix type consistencyAmbroise Vincent2019-04-011-5/+5
* Remove several warnings reported with W=2Ambroise Vincent2019-04-011-3/+0
* bl1-smc-handler: Ensure the lower-order 16 bits of SPSR are programmedBryan O'Donoghue2019-03-131-1/+1
* BL1: Enable pointer authentication supportAntonio Nino Diaz2019-02-274-19/+61
* Move BL1 and BL2 private defines to bl_common.hAntonio Nino Diaz2019-01-151-10/+2
* Sanitise includes across codebaseAntonio Nino Diaz2019-01-0410-40/+53
* Standardise header guards across codebaseAntonio Nino Diaz2018-11-081-3/+3
* context_mgmt: Fix MISRA defectsAntonio Nino Diaz2018-11-011-4/+4
* Merge pull request #1584 from danielboulby-arm/db/SwitchesSoby Mathew2018-10-031-4/+2
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| * Ensure the flow through switch statements is clearDaniel Boulby2018-09-211-4/+2
* | Remove deprecated bl1_init_bl2_mem_layout()Antonio Nino Diaz2018-09-281-19/+0
* | Remove build option LOAD_IMAGE_V2Roberto Vargas2018-09-283-55/+0
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* libc: Fix all includes in codebaseAntonio Nino Diaz2018-08-221-1/+1
* DSU erratum 936184 workaroundJohn Tsichritzis2018-08-171-2/+3
* Merge pull request #1510 from robertovargas-arm/romlibDimitris Papastamos2018-08-131-3/+1
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| * Create a library file for libmbedtlsRoberto Vargas2018-08-031-3/+1
* | xlat v2: Support the EL2 translation regimeAntonio Nino Diaz2018-08-101-1/+1
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* Fix some violations to MISRA rule 8.3Sandrine Bailleux2018-07-111-2/+2
* Add end_vector_entry assembler macroRoberto Vargas2018-07-111-16/+16
* Add .extab and .exidx sectionsRoberto Vargas2018-07-111-0/+9
* Use ALIGN instead of NEXT in linker scriptsRoberto Vargas2018-07-111-2/+2
* Make TF UUID RFC 4122 compliantRoberto Vargas2018-06-141-2/+2
* Fix MISRA rule 8.4 Part 4Roberto Vargas2018-04-131-1/+2
* Fix MISRA rule 8.3 Part 4Roberto Vargas2018-04-131-3/+3
* Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statementsDimitris Papastamos2018-03-291-0/+2
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| * bl1: fix switch statements to comply with MISRA rulesJonathan Wright2018-03-261-0/+2
* | Clean usage of void pointers to access symbolsJoel Hutton2018-03-271-7/+5
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* Rename 'smcc' to 'smccc'Antonio Nino Diaz2018-03-216-13/+13
* Merge pull request #1282 from robertovargas-arm/misra-changesdavidcunado-arm2018-02-281-1/+1
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| * Fix MISRA rule 8.8 in common codeRoberto Vargas2018-02-281-1/+1
* | Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatchdavidcunado-arm2018-02-281-2/+3
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| * Add comments about mismatched TCR_ELx and xlat tablesAntonio Nino Diaz2018-02-271-2/+3
* | BL1: Deprecate the `bl1_init_bl2_mem_layout()` APISoby Mathew2018-02-261-41/+32
* | Add image_id to bl1_plat_handle_post/pre_image_load()Soby Mathew2018-02-262-5/+26
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* Ensure the correct execution of TLBI instructionsAntonio Nino Diaz2018-02-211-0/+1
* Merge pull request #1173 from etienne-lms/armv7-qemudavidcunado-arm2018-02-071-0/+5
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| * aarch32: use lr as bl32 boot argument on aarch32 only systemsEtienne Carriere2018-02-021-0/+5
* | bl1: add bl1_plat_handle_{pre,post}_image_load()Masahiro Yamada2018-02-021-2/+15
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* bl2-el3: Don't compile BL1 when BL2_AT_EL3 is defined in FVPRoberto Vargas2018-01-181-1/+4
* Replace magic numbers in linkerscripts by PAGE_SIZEAntonio Nino Diaz2017-11-291-5/+6
* Fix order of #includesIsla Mitchell2017-07-123-3/+3
* Merge pull request #978 from etienne-lms/minor-builddanh-arm2017-06-285-4/+6
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| * bl1: include bl1_private.h in aarch* filesEtienne Carriere2017-06-234-0/+4
| * context_mgmt: declare extern cm_set_next_context() for AArch32Etienne Carriere2017-06-231-2/+0
| * bl: security_state should be of type unsigned intEtienne Carriere2017-06-231-2/+2
* | Merge pull request #994 from soby-mathew/sm/fwu_fixdavidcunado-arm2017-06-261-9/+14
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