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authorTom Hughes <tomhughes@chromium.org>2022-09-21 14:08:36 -0700
committerTom Hughes <tomhughes@chromium.org>2022-09-22 12:59:38 -0700
commitc453fd704268ef72de871b0c5ac7a989de662334 (patch)
treefcf6ce5810f9ff9e3c8cce434812dd75492269ed /chip/npcx/flash.c
parent6c1587ca70f558b4f96b3f0b18ad8b027d3ba99d (diff)
parent28712dae9d7ed1e694f7622cc083afa71090d4d5 (diff)
downloadchrome-ec-firmware-fpmcu-dartmonkey-release.tar.gz
Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-releasefirmware-fpmcu-dartmonkey-release
Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release Relevant changes: git log --oneline 6c1587ca70..28712dae9d -- board/nocturne_fp board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint util/getversion.sh ded9307b79 util/getversion.sh: Fix version when not in a git repo 956055e692 board: change Google USB vendor info 71b2ef709d Update license boilerplate text in source code files 33e11afda0 Revert "fpsensor: Build fpsensor source file with C++" c8d0360723 fpsensor: Build fpsensor source file with C++ bc113abd53 fpsensor: Fix g++ compiler error 150a58a0dc fpsensor: Fix fp_set_sensor_mode return type b33b5ce85b fpsensor: Remove nested designators for C++ compatibility 2e864b2539 tree-wide: const-ify argv for console commands 56d8b360f9 test: Add test for get ikm failure when seed not set 3a3d6c3690 test: Add test for fpsensor trivial key failure 233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256 0a041b285b docs/fingerprint: Typo correction c03fab67e2 docs/fingerprint: Fix the path of fputils.py 0b5d4baf5a util/getversion.sh: Fix empty file list handling 6e128fe760 FPMCU dev board environment with Satlab 3eb29b6aa5 builtin: Move ssize_t to sys/types.h 345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release c25ffdb316 common: Conditionally support printf %l and %i modifiers 9a3c514b45 test: Add a test to check if the debugger is connected 54e603413f Move standard library tests to their own file 43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release 25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format 4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format 738de2b575 trng: Rename rand to trng_rand 14b8270edd docs/fingerprint: Update dragonclaw power numbers 0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format a0751778f4 board/nocturne_fp/ro_workarounds.c: Format with clang-format 5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format 6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format 58f0246dbe board/nocturne_fp/board_ro.c: Format with clang-format 7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format 21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format 98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format 84e53a65da board/nocturne_fp/board.h: Format with clang-format 73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format 0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format 1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format dca9d74321 Revert "trng: Rename rand to trng_rand" a6b0b3554f trng: Rename rand to trng_rand 28d0b75b70 third_party/boringssl: Remove unused header BRANCH=None BUG=b:244387210 b:242720240 b:215613183 b:242720910 b:236386294 BUG=b:234181908 b:244781166 b:234781655 b:234143158 b:234181908 BUG=b:237344361 b:236025198 b:234181908 b:180945056 chromium:1098010 BUG=b:246424843 b:234181908 b:131913998 TEST=`make -j buildall` TEST=./util/run_device_tests.py --board dartmonkey Test "aes": PASSED Test "cec": PASSED Test "cortexm_fpu": PASSED Test "crc": PASSED Test "flash_physical": PASSED Test "flash_write_protect": PASSED Test "fpsensor_hw": PASSED Test "fpsensor_spi_ro": PASSED Test "fpsensor_spi_rw": PASSED Test "fpsensor_uart_ro": PASSED Test "fpsensor_uart_rw": PASSED Test "mpu_ro": PASSED Test "mpu_rw": PASSED Test "mutex": PASSED Test "pingpong": PASSED Test "printf": PASSED Test "queue": PASSED Test "rollback_region0": PASSED Test "rollback_region1": PASSED Test "rollback_entropy": PASSED Test "rtc": PASSED Test "sha256": PASSED Test "sha256_unrolled": PASSED Test "static_if": PASSED Test "stdlib": PASSED Test "system_is_locked_wp_on": PASSED Test "system_is_locked_wp_off": PASSED Test "timer_dos": PASSED Test "utils": PASSED Test "utils_str": PASSED Test "panic_data_dartmonkey_v2.0.2887": PASSED Test "panic_data_nocturne_fp_v2.2.64": PASSED Test "panic_data_nami_fp_v2.2.144": PASSED Force-Relevant-Builds: all Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I2c312583a709fedae8fe11d92c22328c3b634bc7
Diffstat (limited to 'chip/npcx/flash.c')
-rw-r--r--chip/npcx/flash.c76
1 files changed, 36 insertions, 40 deletions
diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c
index 768c2ced29..390cb1fa64 100644
--- a/chip/npcx/flash.c
+++ b/chip/npcx/flash.c
@@ -1,10 +1,11 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Flash memory module for Chrome EC */
+#include "builtin/assert.h"
#include "flash.h"
#include "host_command.h"
#include "registers.h"
@@ -68,7 +69,7 @@ static void flash_execute_cmd(uint8_t code, uint8_t cts)
/* set UMA_CODE */
NPCX_UMA_CODE = code;
/* execute UMA flash transaction */
- NPCX_UMA_CTS = cts;
+ NPCX_UMA_CTS = cts;
while (IS_BIT_SET(NPCX_UMA_CTS, NPCX_UMA_CTS_EXEC_DONE))
;
}
@@ -94,7 +95,7 @@ static int flash_wait_ready(void)
flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_ONLY);
do {
/* Read status register */
- NPCX_UMA_CTS = MASK_RD_1BYTE;
+ NPCX_UMA_CTS = MASK_RD_1BYTE;
while (IS_BIT_SET(NPCX_UMA_CTS, NPCX_UMA_CTS_EXEC_DONE))
;
/* Busy bit is clear */
@@ -316,8 +317,8 @@ static int flash_set_status_for_prot(int reg1, int reg2)
#endif
flash_set_status(reg1, reg2);
- spi_flash_reg_to_protect(reg1, reg2,
- &addr_prot_start, &addr_prot_length);
+ spi_flash_reg_to_protect(reg1, reg2, &addr_prot_start,
+ &addr_prot_length);
return EC_SUCCESS;
}
@@ -328,8 +329,8 @@ static int flash_check_prot_range(unsigned int offset, unsigned int bytes)
if (offset + bytes > CONFIG_FLASH_SIZE_BYTES)
return EC_ERROR_INVAL;
/* Check if ranges overlap */
- if (MAX(addr_prot_start, offset) < MIN(addr_prot_start +
- addr_prot_length, offset + bytes))
+ if (MAX(addr_prot_start, offset) <
+ MIN(addr_prot_start + addr_prot_length, offset + bytes))
return EC_ERROR_ACCESS_DENIED;
return EC_SUCCESS;
@@ -369,7 +370,6 @@ static int flash_check_prot_reg(unsigned int offset, unsigned int bytes)
return EC_ERROR_ACCESS_DENIED;
return EC_SUCCESS;
-
}
static int flash_write_prot_reg(unsigned int offset, unsigned int bytes,
@@ -395,7 +395,7 @@ static int flash_write_prot_reg(unsigned int offset, unsigned int bytes,
}
static void flash_burst_write(unsigned int dest_addr, unsigned int bytes,
- const char *data)
+ const char *data)
{
unsigned int i;
/* Chip Select down */
@@ -413,15 +413,17 @@ static void flash_burst_write(unsigned int dest_addr, unsigned int bytes,
}
static int flash_program_bytes(uint32_t offset, uint32_t bytes,
- const uint8_t *data)
+ const uint8_t *data)
{
int write_size;
int rv;
while (bytes > 0) {
/* Write length can not go beyond the end of the flash page */
- write_size = MIN(bytes, CONFIG_FLASH_WRITE_IDEAL_SIZE -
- (offset & (CONFIG_FLASH_WRITE_IDEAL_SIZE - 1)));
+ write_size = MIN(bytes,
+ CONFIG_FLASH_WRITE_IDEAL_SIZE -
+ (offset &
+ (CONFIG_FLASH_WRITE_IDEAL_SIZE - 1)));
/* Enable write */
rv = flash_write_enable();
@@ -436,9 +438,9 @@ static int flash_program_bytes(uint32_t offset, uint32_t bytes,
if (rv)
return rv;
- data += write_size;
+ data += write_size;
offset += write_size;
- bytes -= write_size;
+ bytes -= write_size;
}
return rv;
@@ -467,7 +469,7 @@ int crec_flash_physical_read(int offset, int size, char *data)
/* Burst read transaction */
for (idx = 0; idx < size; idx++) {
/* 1101 0101 - EXEC, RD, NO CMD, NO ADDR, 4 bytes */
- NPCX_UMA_CTS = MASK_RD_1BYTE;
+ NPCX_UMA_CTS = MASK_RD_1BYTE;
/* wait for UMA to complete */
while (IS_BIT_SET(NPCX_UMA_CTS, EXEC_DONE))
;
@@ -493,8 +495,8 @@ int crec_flash_physical_write(int offset, int size, const char *data)
int rv;
/* Fail if offset, size, and data aren't at least word-aligned */
- if ((offset | size
- | (uint32_t)(uintptr_t)data) & (CONFIG_FLASH_WRITE_SIZE - 1))
+ if ((offset | size | (uint32_t)(uintptr_t)data) &
+ (CONFIG_FLASH_WRITE_SIZE - 1))
return EC_ERROR_INVAL;
/* check protection */
@@ -510,7 +512,8 @@ int crec_flash_physical_write(int offset, int size, const char *data)
while (size > 0) {
/* First write multiples of 256, then (size % 256) last */
write_len = ((size % CONFIG_FLASH_WRITE_IDEAL_SIZE) == size) ?
- size : CONFIG_FLASH_WRITE_IDEAL_SIZE;
+ size :
+ CONFIG_FLASH_WRITE_IDEAL_SIZE;
/* check protection */
if (flash_check_prot_range(dest_addr, write_len)) {
@@ -522,9 +525,9 @@ int crec_flash_physical_write(int offset, int size, const char *data)
if (rv)
break;
- data += write_len;
+ data += write_len;
dest_addr += write_len;
- size -= write_len;
+ size -= write_len;
}
/* Enable tri-state */
@@ -551,7 +554,7 @@ int crec_flash_physical_erase(int offset, int size)
/* Alignment has been checked in upper layer */
for (; size > 0; size -= CONFIG_FLASH_ERASE_SIZE,
- offset += CONFIG_FLASH_ERASE_SIZE) {
+ offset += CONFIG_FLASH_ERASE_SIZE) {
/* check protection */
if (flash_check_prot_range(offset, CONFIG_FLASH_ERASE_SIZE)) {
rv = EC_ERROR_ACCESS_DENIED;
@@ -645,7 +648,6 @@ int crec_flash_physical_protect_now(int all)
return EC_SUCCESS;
}
-
int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int ret;
@@ -657,8 +659,7 @@ int crec_flash_physical_protect_at_boot(uint32_t new_flags)
}
ret = flash_write_prot_reg(CONFIG_WP_STORAGE_OFF,
- CONFIG_WP_STORAGE_SIZE,
- 1);
+ CONFIG_WP_STORAGE_SIZE, 1);
/*
* Set UMA_LOCK bit for locking all UMA transaction.
@@ -672,9 +673,8 @@ int crec_flash_physical_protect_at_boot(uint32_t new_flags)
uint32_t crec_flash_physical_get_valid_flags(void)
{
- return EC_FLASH_PROTECT_RO_AT_BOOT |
- EC_FLASH_PROTECT_RO_NOW |
- EC_FLASH_PROTECT_ALL_NOW;
+ return EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW |
+ EC_FLASH_PROTECT_ALL_NOW;
}
uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
@@ -690,7 +690,7 @@ uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
* the WP GPIO is asserted.
*/
if (!(cur_flags & EC_FLASH_PROTECT_ALL_NOW) &&
- (cur_flags & EC_FLASH_PROTECT_GPIO_ASSERTED))
+ (cur_flags & EC_FLASH_PROTECT_GPIO_ASSERTED))
ret |= EC_FLASH_PROTECT_ALL_NOW;
return ret;
@@ -759,8 +759,7 @@ static enum ec_status flash_command_spi_info(struct host_cmd_handler_args *args)
args->response_size = sizeof(*r);
return EC_RES_SUCCESS;
}
-DECLARE_HOST_COMMAND(EC_CMD_FLASH_SPI_INFO,
- flash_command_spi_info,
+DECLARE_HOST_COMMAND(EC_CMD_FLASH_SPI_INFO, flash_command_spi_info,
EC_VER_MASK(0));
#endif
@@ -788,7 +787,7 @@ static int flash_spi_sel_lock(int enable)
/*****************************************************************************/
/* Console commands */
-static int command_flash_spi_sel_lock(int argc, char **argv)
+static int command_flash_spi_sel_lock(int argc, const char **argv)
{
int ena;
@@ -801,10 +800,9 @@ static int command_flash_spi_sel_lock(int argc, char **argv)
return EC_SUCCESS;
}
DECLARE_CONSOLE_COMMAND(flash_spi_lock, command_flash_spi_sel_lock,
- "[on | off]",
- "Lock spi flash interface selection");
+ "[on | off]", "Lock spi flash interface selection");
-static int command_flash_tristate(int argc, char **argv)
+static int command_flash_tristate(int argc, const char **argv)
{
int ena;
@@ -817,12 +815,11 @@ static int command_flash_tristate(int argc, char **argv)
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(flash_tristate, command_flash_tristate,
- "[on | off]",
+DECLARE_CONSOLE_COMMAND(flash_tristate, command_flash_tristate, "[on | off]",
"Tristate spi flash pins");
#endif /* CONFIG_CMD_FLASH_TRISTATE */
-static int command_flash_chip(int argc, char **argv)
+static int command_flash_chip(int argc, const char **argv)
{
uint8_t jedec_id[3];
uint8_t sr1, sr2;
@@ -832,10 +829,9 @@ static int command_flash_chip(int argc, char **argv)
flash_get_jedec_id(jedec_id);
ccprintf("Manufacturer: 0x%02x, DID: 0x%02x%02x\n", jedec_id[0],
- jedec_id[1], jedec_id[2]);
+ jedec_id[1], jedec_id[2]);
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(flashchip, command_flash_chip,
- NULL,
+DECLARE_CONSOLE_COMMAND(flashchip, command_flash_chip, NULL,
"Print flash chip info");