Merge remote-tracking branch cros/main into firmware-fpmcu-bloonchipper-releasefirmware-fpmcu-bloonchipper-release

Generated by: ./util/update_release_branch.py --board bloonchipper
--relevant_paths_file ./util/fingerprint-relevant-paths.txt firmware-
fpmcu-bloonchipper-release

Relevant changes:

git log --oneline e5fb0b9ba4..28712dae9d -- board/hatch_fp
board/bloonchipper common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dc3e9008b8 board/hatch_fp/board.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:246424843 b:234181908 b:244781166 b:234181908 b:244387210
BUG=b:242720240 chromium:1098010 b:180945056 b:236025198 b:234181908
BUG=b:234181908 b:237344361 b:131913998 b:236386294 b:234143158
BUG=b:234781655 b:215613183 b:242720910
TEST=`make -j buildall`
TEST=./test/run_device_tests.py --board bloonchipper
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "stm32f_rtc": PASSED
     Test "panic_data_bloonchipper_v2.0.4277": PASSED
     Test "panic_data_bloonchipper_v2.0.5938": PASSED

Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I264ad0ffe7afcd507a1e483c6e934a9c4fea47c3

1 files changed, 25 insertions, 25 deletions

diff --git a/driver/tcpm/raa489000.h b/driver/tcpm/raa489000.h
index 2a4c7c6b3d..41a37f94e7 100644
--- a/driver/tcpm/raa489000.h
+++ b/driver/tcpm/raa489000.h
@@ -1,4 +1,4 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+/* Copyright 2020 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  *
@@ -17,25 +17,25 @@
 #define RAA489000_TCPC3_I2C_FLAGS 0x25
 
 /* Vendor registers */
-#define RAA489000_TCPC_SETTING1			0x80
-#define RAA489000_VBUS_VOLTAGE_TARGET		0x90
-#define RAA489000_VBUS_CURRENT_TARGET		0x92
-#define RAA489000_VBUS_OCP_UV_THRESHOLD		0x94
-#define RAA489000_TYPEC_SETTING1		0xC0
-#define RAA489000_PD_PHYSICAL_SETTING1		0xE0
-#define RAA489000_PD_PHYSICAL_PARAMETER1	0xE8
+#define RAA489000_TCPC_SETTING1 0x80
+#define RAA489000_VBUS_VOLTAGE_TARGET 0x90
+#define RAA489000_VBUS_CURRENT_TARGET 0x92
+#define RAA489000_VBUS_OCP_UV_THRESHOLD 0x94
+#define RAA489000_TYPEC_SETTING1 0xC0
+#define RAA489000_PD_PHYSICAL_SETTING1 0xE0
+#define RAA489000_PD_PHYSICAL_PARAMETER1 0xE8
 
 /* TCPC_SETTING_1 */
-#define RAA489000_TCPCV1_0_EN		BIT(0)
-#define RAA489000_TCPC_PWR_CNTRL	BIT(4)
+#define RAA489000_TCPCV1_0_EN BIT(0)
+#define RAA489000_TCPC_PWR_CNTRL BIT(4)
 
 /* VBUS_CURRENT_TARGET */
-#define RAA489000_VBUS_CURRENT_TARGET_3A	0x66 /* 3.0A + iOvershoot */
-#define RAA489000_VBUS_CURRENT_TARGET_1_5A	0x38 /* 1.5A + iOvershoot */
+#define RAA489000_VBUS_CURRENT_TARGET_3A 0x66 /* 3.0A + iOvershoot */
+#define RAA489000_VBUS_CURRENT_TARGET_1_5A 0x38 /* 1.5A + iOvershoot */
 
 /* VBUS_VOLTAGE_TARGET */
-#define RAA489000_VBUS_VOLTAGE_TARGET_5160MV	0x102 /* 5.16V */
-#define RAA489000_VBUS_VOLTAGE_TARGET_5220MV	0x105 /* 5.22V */
+#define RAA489000_VBUS_VOLTAGE_TARGET_5160MV 0x102 /* 5.16V */
+#define RAA489000_VBUS_VOLTAGE_TARGET_5220MV 0x105 /* 5.22V */
 
 /* VBUS_OCP_UV_THRESHOLD */
 /* Detect voltage level of overcurrent protection during Sourcing VBUS */
@@ -43,26 +43,26 @@
 
 /* TYPEC_SETTING1 - only older silicon */
 /* Enables for reverse current protection */
-#define RAA489000_SETTING1_IP2_EN	BIT(9)
-#define RAA489000_SETTING1_IP1_EN	BIT(8)
+#define RAA489000_SETTING1_IP2_EN BIT(9)
+#define RAA489000_SETTING1_IP1_EN BIT(8)
 
 /* Switches from dead-battery Rd */
-#define RAA489000_SETTING1_RDOE		BIT(7)
+#define RAA489000_SETTING1_RDOE BIT(7)
 
 /* CC comparator enables */
-#define RAA489000_SETTING1_CC2_CMP3_EN	BIT(6)
-#define RAA489000_SETTING1_CC2_CMP2_EN	BIT(5)
-#define RAA489000_SETTING1_CC2_CMP1_EN	BIT(4)
-#define RAA489000_SETTING1_CC1_CMP3_EN	BIT(3)
-#define RAA489000_SETTING1_CC1_CMP2_EN	BIT(2)
-#define RAA489000_SETTING1_CC1_CMP1_EN	BIT(1)
+#define RAA489000_SETTING1_CC2_CMP3_EN BIT(6)
+#define RAA489000_SETTING1_CC2_CMP2_EN BIT(5)
+#define RAA489000_SETTING1_CC2_CMP1_EN BIT(4)
+#define RAA489000_SETTING1_CC1_CMP3_EN BIT(3)
+#define RAA489000_SETTING1_CC1_CMP2_EN BIT(2)
+#define RAA489000_SETTING1_CC1_CMP1_EN BIT(1)
 
 /* CC debounce enable */
-#define RAA489000_SETTING1_CC_DB_EN	BIT(0)
+#define RAA489000_SETTING1_CC_DB_EN BIT(0)
 
 /* PD_PHYSICAL_SETTING_1 */
 #define RAA489000_PD_PHY_SETTING1_RECEIVER_EN BIT(9)
-#define RAA489000_PD_PHY_SETTING1_SQUELCH_EN  BIT(8)
+#define RAA489000_PD_PHY_SETTING1_SQUELCH_EN BIT(8)
 #define RAA489000_PD_PHY_SETTING1_TX_LDO11_EN BIT(0)
 
 /* PD_PHYSICAL_PARMETER_1 */