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authorBhanu Prakash Maiya <bhanumaiya@chromium.org>2021-03-01 12:12:46 -0800
committerCommit Bot <commit-bot@chromium.org>2021-03-01 21:56:42 +0000
commitb37024ccf7da7ab5dbdbf15d3478f69bf4deb879 (patch)
tree64560745049f9f8ecb90fb64fd368712cf03dd3a /util
parent194c032415bddc6783ba9e52de02fa5bc159191d (diff)
downloadchrome-ec-b37024ccf7da7ab5dbdbf15d3478f69bf4deb879.tar.gz
flash_fp_mcu: Fix Guybrush's gpiochip base from 320 -> 256
BRANCH=none BUG=b:181349369 TEST=None. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Change-Id: I822d91e26448e3ed9ee0bd2f6abe2ffdc016b345 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727864 Commit-Queue: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'util')
-rw-r--r--util/flash_fp_mcu12
1 files changed, 6 insertions, 6 deletions
diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu
index ed97d3878c..43ef6bee66 100644
--- a/util/flash_fp_mcu
+++ b/util/flash_fp_mcu
@@ -455,17 +455,17 @@ config_zork() {
}
config_guybrush() {
- check_gpio_chip_exists "gpiochip320"
+ check_gpio_chip_exists "gpiochip256"
readonly TRANSPORT="UART"
readonly DEVICE="/dev/ttyS1"
- # FPMCU RST_ODL is on AGPIO 11 = 320 + 11 = 331
- readonly GPIO_NRST=331
- # FPMCU BOOT0 is on AGPIO 144 = 320 + 144 = 464
- readonly GPIO_BOOT0=464
- # FPMCU PWR_EN is on AGPIO 32 = 320 + 32 = 352, but should not be
+ # FPMCU RST_ODL is on AGPIO 11 = 256 + 11 = 267
+ readonly GPIO_NRST=267
+ # FPMCU BOOT0 is on AGPIO 144 = 256 + 144 = 400
+ readonly GPIO_BOOT0=400
+ # FPMCU PWR_EN is on AGPIO 32 = 256 + 32 = 288, but should not be
# necessary for flashing. Set invalid value.
readonly GPIO_PWREN=-1
}