ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ish

In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.

This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.

The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.

BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>

1 files changed, 0 insertions, 97 deletions

diff --git a/zephyr/shim/chip/npcx/system.c b/zephyr/shim/chip/npcx/system.c
deleted file mode 100644
index 9809e138d5..0000000000
--- a/zephyr/shim/chip/npcx/system.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include <drivers/bbram.h>
-#include <logging/log.h>
-
-#include "system.h"
-#include "system_chip.h"
-
-LOG_MODULE_REGISTER(shim_npcx_system, LOG_LEVEL_ERR);
-
-static void chip_bbram_status_check(void)
-{
-	const struct device *bbram_dev;
-	int res;
-
-	bbram_dev = DEVICE_DT_GET(DT_NODELABEL(bbram));
-	if (!device_is_ready(bbram_dev)) {
-		LOG_ERR("Error: device %s is not ready", bbram_dev->name);
-		return;
-	}
-
-	res = bbram_check_invalid(bbram_dev);
-	if (res != 0 && res != -ENOTSUP)
-		LOG_INF("VBAT power drop!");
-
-	res = bbram_check_standby_power(bbram_dev);
-	if (res != 0 && res != -ENOTSUP)
-		LOG_INF("VSBY power drop!");
-
-	res = bbram_check_power(bbram_dev);
-	if (res != 0 && res != -ENOTSUP)
-		LOG_INF("VCC1 power drop!");
-}
-
-/*
- * Configure address 0x40001600 (Low Power RAM) in the the MPU
- * (Memory Protection Unit) as a "regular" memory
- */
-void system_mpu_config(void)
-{
-	if (!IS_ENABLED(CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API))
-		return;
-
-	/*
-	 * npcx9 Rev.1 has the problem for download_from_flash API.
-	 * Workaround it by implementing the system_download_from_flash function
-	 * in the suspend RAM. The functions will do the same, but will provide
-	 * a software solution similar to what's done in the npcx5.
-	 */
-	/* Enable MPU */
-	CPU_MPU_CTRL = 0x7;
-
-	/* Create a new MPU Region to allow execution from low-power ram */
-	CPU_MPU_RNR  = REGION_CHIP_RESERVED;
-	CPU_MPU_RASR = CPU_MPU_RASR & 0xFFFFFFFE; /* Disable region */
-	CPU_MPU_RBAR = CONFIG_LPRAM_BASE;         /* Set region base address */
-	/*
-	 * Set region size & attribute and enable region
-	 * [31:29] - Reserved.
-	 * [28]    - XN (Execute Never) = 0
-	 * [27]    - Reserved.
-	 * [26:24] - AP                 = 011 (Full access)
-	 * [23:22] - Reserved.
-	 * [21:19,18,17,16] - TEX,S,C,B = 001000 (Normal memory)
-	 * [15:8]  - SRD                = 0 (Subregions enabled)
-	 * [7:6]   - Reserved.
-	 * [5:1]   - SIZE               = 01001 (1K)
-	 * [0]     - ENABLE             = 1 (enabled)
-	 */
-	CPU_MPU_RASR = 0x03080013;
-}
-
-static int chip_system_init(const struct device *unused)
-{
-	ARG_UNUSED(unused);
-
-	/*
-	 * Check BBRAM power status.
-	 */
-	chip_bbram_status_check();
-
-	system_mpu_config();
-
-	return 0;
-}
-/*
- * The priority should be lower than CROS_BBRAM_NPCX_INIT_PRIORITY.
- */
-#if (CONFIG_CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY <= CONFIG_BBRAM_INIT_PRIORITY)
-#error CONFIG_CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY must greater than \
-	CONFIG_BBRAM_INIT_PRIORITY
-#endif
-SYS_INIT(chip_system_init, PRE_KERNEL_1,
-	 CONFIG_CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY);