diff options
Diffstat (limited to 'board/servo_v4p1/board.h')
| -rw-r--r-- | board/servo_v4p1/board.h | 89 |
1 files changed, 43 insertions, 46 deletions
diff --git a/board/servo_v4p1/board.h b/board/servo_v4p1/board.h index 86367a5d0b..b6c7915c6c 100644 --- a/board/servo_v4p1/board.h +++ b/board/servo_v4p1/board.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -58,31 +58,30 @@ #define CONFIG_RAM_BANK_SIZE CONFIG_RAM_SIZE - #define CONFIG_FLASH_PSTATE #define CONFIG_FLASH_PSTATE_BANK -#define CONFIG_SHAREDLIB_SIZE 0 +#define CONFIG_SHAREDLIB_SIZE 0 -#define CONFIG_RO_MEM_OFF 0 -#define CONFIG_RO_STORAGE_OFF 0 -#define CONFIG_RO_SIZE (92*1024) +#define CONFIG_RO_MEM_OFF 0 +#define CONFIG_RO_STORAGE_OFF 0 +#define CONFIG_RO_SIZE (92 * 1024) -#define CONFIG_FW_PSTATE_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE) -#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE +#define CONFIG_FW_PSTATE_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE) +#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE -#define CONFIG_RW_MEM_OFF (CONFIG_FW_PSTATE_OFF + CONFIG_FW_PSTATE_SIZE) -#define CONFIG_RW_STORAGE_OFF 0 -#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE_BYTES - \ - (CONFIG_RW_MEM_OFF - CONFIG_RO_MEM_OFF)) +#define CONFIG_RW_MEM_OFF (CONFIG_FW_PSTATE_OFF + CONFIG_FW_PSTATE_SIZE) +#define CONFIG_RW_STORAGE_OFF 0 +#define CONFIG_RW_SIZE \ + (CONFIG_FLASH_SIZE_BYTES - (CONFIG_RW_MEM_OFF - CONFIG_RO_MEM_OFF)) -#define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF -#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE -#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF -#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE +#define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF +#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RO_SIZE +#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF +#define CONFIG_EC_WRITABLE_STORAGE_SIZE CONFIG_RW_SIZE -#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF -#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE +#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF +#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE /* Enable USART1,3,4 and USB streams */ #define CONFIG_STREAM_USART @@ -106,7 +105,7 @@ * STM32F072x8 Datasheet. PVD Threshold 1 corresponds to a * falling voltage threshold of min:2.09V, max:2.27V. */ -#define PVD_THRESHOLD (1) +#define PVD_THRESHOLD (1) /* USB Configuration */ #define CONFIG_USB @@ -125,23 +124,23 @@ #define DEFAULT_MAC_ADDR "Uninitialized" /* USB interface indexes (use define rather than enum to expand them) */ -#define USB_IFACE_CONSOLE 0 -#define USB_IFACE_EMPTY 1 -#define USB_IFACE_I2C 2 -#define USB_IFACE_USART3_STREAM 3 -#define USB_IFACE_USART4_STREAM 4 -#define USB_IFACE_UPDATE 5 -#define USB_IFACE_COUNT 6 +#define USB_IFACE_CONSOLE 0 +#define USB_IFACE_EMPTY 1 +#define USB_IFACE_I2C 2 +#define USB_IFACE_USART3_STREAM 3 +#define USB_IFACE_USART4_STREAM 4 +#define USB_IFACE_UPDATE 5 +#define USB_IFACE_COUNT 6 /* USB endpoint indexes (use define rather than enum to expand them) */ -#define USB_EP_CONTROL 0 -#define USB_EP_CONSOLE 1 -#define USB_EP_EMPTY 2 -#define USB_EP_I2C 3 -#define USB_EP_USART3_STREAM 4 -#define USB_EP_USART4_STREAM 5 -#define USB_EP_UPDATE 6 -#define USB_EP_COUNT 7 +#define USB_EP_CONTROL 0 +#define USB_EP_CONSOLE 1 +#define USB_EP_EMPTY 2 +#define USB_EP_I2C 3 +#define USB_EP_USART3_STREAM 4 +#define USB_EP_USART4_STREAM 5 +#define USB_EP_UPDATE 6 +#define USB_EP_COUNT 7 /* Enable console recasting of GPIO type. */ #define CONFIG_CMD_GPIO_EXTENDED @@ -182,7 +181,7 @@ /* PD features */ #define CONFIG_ADC -#undef CONFIG_ADC_WATCHDOG +#undef CONFIG_ADC_WATCHDOG #define CONFIG_BOARD_PRE_INIT /* * If task profiling is enabled then the rx falling edge detection interrupts @@ -196,7 +195,7 @@ #define CONFIG_USB_HUB_GL3590 #define CONFIG_INA231 #define CONFIG_CHARGE_MANAGER -#undef CONFIG_CHARGE_MANAGER_SAFE_MODE +#undef CONFIG_CHARGE_MANAGER_SAFE_MODE #define CONFIG_USB_MUX_TUSB1064 #define CONFIG_USB_POWER_DELIVERY #define CONFIG_USB_PD_TCPMV1 @@ -221,8 +220,8 @@ #define CONFIG_USB_PD_INITIAL_DRP_STATE PD_DRP_FORCE_SINK /* Variable-current Rp no connect and Ra attach macros */ -#define CC_NC(port, cc, sel) (pd_tcpc_cc_nc(port, cc, sel)) -#define CC_RA(port, cc, sel) (pd_tcpc_cc_ra(port, cc, sel)) +#define CC_NC(port, cc, sel) (pd_tcpc_cc_nc(port, cc, sel)) +#define CC_RA(port, cc, sel) (pd_tcpc_cc_ra(port, cc, sel)) /* * These power-supply timing values are now set towards maximum spec limit, @@ -231,14 +230,14 @@ * Currently tuned with the Apple 96W adapter. * TODO: Change to EVENT-based PS_RDY notification (b/214216304) */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY (121*MSEC) -#define PD_POWER_SUPPLY_TURN_OFF_DELAY (461*MSEC) +#define PD_POWER_SUPPLY_TURN_ON_DELAY (121 * MSEC) +#define PD_POWER_SUPPLY_TURN_OFF_DELAY (461 * MSEC) /* Define typical operating power and max power */ #define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 100000 -#define PD_MAX_CURRENT_MA 5000 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_MAX_POWER_MW 100000 +#define PD_MAX_CURRENT_MA 5000 +#define PD_MAX_VOLTAGE_MV 20000 /* Add the raw option to the i2c_xfer command */ #define CONFIG_CMD_I2C_XFER_RAW @@ -266,8 +265,7 @@ /* Timer selection */ #define TIM_CLOCK32 2 -#define TIM_ADC 3 - +#define TIM_ADC 3 #include "gpio_signal.h" @@ -286,7 +284,6 @@ enum usb_strings { USB_STR_COUNT }; - /* ADC signal */ enum adc_channel { ADC_CHG_CC1_PD, |