diff options
Diffstat (limited to 'chip/stm32/usart-stm32f0.c')
| -rw-r--r-- | chip/stm32/usart-stm32f0.c | 53 |
1 files changed, 26 insertions, 27 deletions
diff --git a/chip/stm32/usart-stm32f0.c b/chip/stm32/usart-stm32f0.c index 740d3929bc..56325cdc74 100644 --- a/chip/stm32/usart-stm32f0.c +++ b/chip/stm32/usart-stm32f0.c @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,7 +23,7 @@ static struct usart_config const *configs[STM32_USARTS_MAX]; struct usart_configs usart_get_configs(void) { - return (struct usart_configs) {configs, ARRAY_SIZE(configs)}; + return (struct usart_configs){ configs, ARRAY_SIZE(configs) }; } static void usart_variant_enable(struct usart_config const *config) @@ -54,8 +54,7 @@ static void usart_variant_disable(struct usart_config const *config) * Only disable the shared interrupt for USART3/4 if both USARTs are * now disabled. */ - if ((index == 0) || - (index == 1) || + if ((index == 0) || (index == 1) || (index == 2 && configs[3] == NULL) || (index == 3 && configs[2] == NULL)) task_disable_irq(config->hw->irq); @@ -64,18 +63,18 @@ static void usart_variant_disable(struct usart_config const *config) } static struct usart_hw_ops const usart_variant_hw_ops = { - .enable = usart_variant_enable, + .enable = usart_variant_enable, .disable = usart_variant_disable, }; static void freq_change(void) { - size_t i; + size_t i; for (i = 0; i < ARRAY_SIZE(configs); ++i) if (configs[i]) usart_set_baud_f0_l(configs[i], configs[i]->baud, - clock_get_freq()); + clock_get_freq()); } DECLARE_HOOK(HOOK_FREQ_CHANGE, freq_change, HOOK_PRIO_DEFAULT); @@ -98,12 +97,12 @@ void usart_clear_tc(struct usart_config const *config) */ #if defined(CONFIG_STREAM_USART1) struct usart_hw_config const usart1_hw = { - .index = 0, - .base = STM32_USART1_BASE, - .irq = STM32_IRQ_USART1, + .index = 0, + .base = STM32_USART1_BASE, + .irq = STM32_IRQ_USART1, .clock_register = &STM32_RCC_APB2ENR, - .clock_enable = STM32_RCC_PB2_USART1, - .ops = &usart_variant_hw_ops, + .clock_enable = STM32_RCC_PB2_USART1, + .ops = &usart_variant_hw_ops, }; static void usart1_interrupt(void) @@ -116,12 +115,12 @@ DECLARE_IRQ(STM32_IRQ_USART1, usart1_interrupt, 2); #if defined(CONFIG_STREAM_USART2) struct usart_hw_config const usart2_hw = { - .index = 1, - .base = STM32_USART2_BASE, - .irq = STM32_IRQ_USART2, + .index = 1, + .base = STM32_USART2_BASE, + .irq = STM32_IRQ_USART2, .clock_register = &STM32_RCC_APB1ENR, - .clock_enable = STM32_RCC_PB1_USART2, - .ops = &usart_variant_hw_ops, + .clock_enable = STM32_RCC_PB1_USART2, + .ops = &usart_variant_hw_ops, }; static void usart2_interrupt(void) @@ -134,23 +133,23 @@ DECLARE_IRQ(STM32_IRQ_USART2, usart2_interrupt, 2); #if defined(CONFIG_STREAM_USART3) struct usart_hw_config const usart3_hw = { - .index = 2, - .base = STM32_USART3_BASE, - .irq = STM32_IRQ_USART3_4, + .index = 2, + .base = STM32_USART3_BASE, + .irq = STM32_IRQ_USART3_4, .clock_register = &STM32_RCC_APB1ENR, - .clock_enable = STM32_RCC_PB1_USART3, - .ops = &usart_variant_hw_ops, + .clock_enable = STM32_RCC_PB1_USART3, + .ops = &usart_variant_hw_ops, }; #endif #if defined(CONFIG_STREAM_USART4) struct usart_hw_config const usart4_hw = { - .index = 3, - .base = STM32_USART4_BASE, - .irq = STM32_IRQ_USART3_4, + .index = 3, + .base = STM32_USART4_BASE, + .irq = STM32_IRQ_USART3_4, .clock_register = &STM32_RCC_APB1ENR, - .clock_enable = STM32_RCC_PB1_USART4, - .ops = &usart_variant_hw_ops, + .clock_enable = STM32_RCC_PB1_USART4, + .ops = &usart_variant_hw_ops, }; #endif |