diff options
Diffstat (limited to 'zephyr/boards/riscv/it8xxx2')
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/Kconfig.board | 2 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/Kconfig.defconfig | 50 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/it81202bx.dts | 8 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/it81202bx_defconfig | 39 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/it81302bx.dts | 8 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/it81302bx_defconfig | 39 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/it8xxx2.dts | 2 | ||||
-rw-r--r-- | zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig | 78 |
8 files changed, 145 insertions, 81 deletions
diff --git a/zephyr/boards/riscv/it8xxx2/Kconfig.board b/zephyr/boards/riscv/it8xxx2/Kconfig.board index 0e58c236f8..157d269c77 100644 --- a/zephyr/boards/riscv/it8xxx2/Kconfig.board +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.board @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig index 6cf9bd039b..6b38f9395b 100644 --- a/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -11,4 +11,52 @@ choice PLATFORM_EC_HOSTCMD_DEBUG_MODE default HCDEBUG_OFF endchoice # PLATFORM_EC_HOSTCMD_DEBUG_MODE +config CROS_EC_HOOK_TICK_INTERVAL + default 500000 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 + +config SYS_CLOCK_TICKS_PER_SEC + default 32768 + +if ADC +config PLATFORM_EC_ADC_RESOLUTION + default 10 +endif # ADC + +if CONSOLE +config UART_CONSOLE + default y + depends on SERIAL +endif # CONSOLE + +if FLASH +config PLATFORM_EC_CONSOLE_CMD_FLASH + default y +endif # FLASH + +if SERIAL +config UART_INTERRUPT_DRIVEN + default y +endif # SERIAL + +if SHELL +config SHELL_TAB + default y +config SHELL_TAB_AUTOCOMPLETION + default y +config SHELL_HISTORY + default y +endif # SHELL + +if WATCHDOG +config PLATFORM_EC_WATCHDOG_PERIOD_MS + default 2500 +config WDT_ITE_WARNING_LEADING_TIME_MS + default 500 +config WDT_ITE_REDUCE_WARNING_LEADING_TIME + default y +endif # WATCHDOG + endif # BOARD_IT8XXX2 diff --git a/zephyr/boards/riscv/it8xxx2/it81202bx.dts b/zephyr/boards/riscv/it8xxx2/it81202bx.dts new file mode 100644 index 0000000000..d2c892f735 --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it81202bx.dts @@ -0,0 +1,8 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/dts-v1/; + +#include "it8xxx2.dts" diff --git a/zephyr/boards/riscv/it8xxx2/it81202bx_defconfig b/zephyr/boards/riscv/it8xxx2/it81202bx_defconfig new file mode 100644 index 0000000000..a024ab5824 --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it81202bx_defconfig @@ -0,0 +1,39 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y +CONFIG_SOC_IT8XXX2=y +CONFIG_SOC_IT81202_BX=y + +# Platform Configuration +CONFIG_BOARD_IT8XXX2=y + +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + +# Power Management +CONFIG_PM=y +CONFIG_PM_DEVICE=y +CONFIG_PM_POLICY_CUSTOM=y + +# Console +CONFIG_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y + +# Clock Controller +CONFIG_CLOCK_CONTROL=n + +# Serial Drivers +CONFIG_SERIAL=y + +# WATCHDOG configuration +CONFIG_WATCHDOG=y + +# BBRAM +CONFIG_BBRAM=y diff --git a/zephyr/boards/riscv/it8xxx2/it81302bx.dts b/zephyr/boards/riscv/it8xxx2/it81302bx.dts new file mode 100644 index 0000000000..d2c892f735 --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it81302bx.dts @@ -0,0 +1,8 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/dts-v1/; + +#include "it8xxx2.dts" diff --git a/zephyr/boards/riscv/it8xxx2/it81302bx_defconfig b/zephyr/boards/riscv/it8xxx2/it81302bx_defconfig new file mode 100644 index 0000000000..2841b9663c --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it81302bx_defconfig @@ -0,0 +1,39 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y +CONFIG_SOC_IT8XXX2=y +CONFIG_SOC_IT81302_BX=y + +# Platform Configuration +CONFIG_BOARD_IT8XXX2=y + +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + +# Power Management +CONFIG_PM=y +CONFIG_PM_DEVICE=y +CONFIG_PM_POLICY_CUSTOM=y + +# Console +CONFIG_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y + +# Clock Controller +CONFIG_CLOCK_CONTROL=n + +# Serial Drivers +CONFIG_SERIAL=y + +# WATCHDOG configuration +CONFIG_WATCHDOG=y + +# BBRAM +CONFIG_BBRAM=y diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts index 405d8f7a3e..640efd1433 100644 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig b/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig deleted file mode 100644 index 740910d5ab..0000000000 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig +++ /dev/null @@ -1,78 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Zephyr Kernel Configuration -CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y -CONFIG_SOC_IT8XXX2=y - -# Platform Configuration -CONFIG_BOARD_IT8XXX2=y - -# Power Management -CONFIG_PM=y -CONFIG_PM_DEVICE=y -CONFIG_PM_POLICY_CUSTOM=y - -# Console -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y -CONFIG_UART_NS16550=y -CONFIG_SHELL_TAB=y -CONFIG_SHELL_TAB_AUTOCOMPLETION=y -CONFIG_SHELL_HISTORY=y - -# GPIO Controller -CONFIG_GPIO=y -CONFIG_GPIO_ITE_IT8XXX2=y -# For IT81202, the GPIO group k/l are not brought out to pins, -# so by default they can be set to pull down inputs. -# However with the IT81302, they are available on pins, -# and should not be set to pull down inputs by default. -CONFIG_SOC_IT8XXX2_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN=n - -# ADC Driver -CONFIG_ADC_ITE_IT8XXX2=y -CONFIG_PLATFORM_EC_ADC=y -CONFIG_PLATFORM_EC_ADC_RESOLUTION=10 - -# Clock configuration -CONFIG_CLOCK_CONTROL=y -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768 -CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768 - -# Hook tick -CONFIG_CROS_EC_HOOK_TICK_INTERVAL=500000 - -# Flash -CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y -CONFIG_SOC_FLASH_ITE_IT8XXX2=y - -# I2C -CONFIG_I2C=y -CONFIG_I2C_ITE_IT8XXX2=y - -# Power Button -CONFIG_PLATFORM_EC_POWER_BUTTON=y - -# PWM -CONFIG_PWM=y -CONFIG_PWM_SHELL=n -CONFIG_PWM_ITE_IT8XXX2=y - -# Serial Drivers -CONFIG_SERIAL=y -CONFIG_UART_INTERRUPT_DRIVEN=y - -# Timer configuration -CONFIG_ITE_IT8XXX2_TIMER=y - -# WATCHDOG configuration -CONFIG_WATCHDOG=y -CONFIG_PLATFORM_EC_WATCHDOG_PERIOD_MS=2500 -CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS=500 -CONFIG_WDT_ITE_REDUCE_WARNING_LEADING_TIME=y - -# BBRAM -CONFIG_BBRAM=y -CONFIG_BBRAM_IT8XXX2=y |