diff options
Diffstat (limited to 'zephyr')
1478 files changed, 51808 insertions, 18540 deletions
diff --git a/zephyr/.pylintrc b/zephyr/.pylintrc index 817f2453b3..066e00da9d 100644 --- a/zephyr/.pylintrc +++ b/zephyr/.pylintrc @@ -1,6 +1,20 @@ [MASTER] init-hook='import sys; sys.path.extend(["zephyr/zmake"])' +# cros lint doesn't inherit the pylintrc from the parent dir. +# These settings are copied from platform/ec/pylintrc [MESSAGES CONTROL] -disable=fixme +disable= + bad-continuation, + bad-whitespace, + # These have nothing to do with black, they are just annoying + fixme, + too-many-arguments, + too-many-statements, + too-many-branches, + too-many-locals + +[format] + +string-quote=double diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 451406c8b3..7a71823bc8 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -29,6 +29,19 @@ if(DEFINED ZMAKE_INCLUDE_DIR) zephyr_include_directories("${ZMAKE_INCLUDE_DIR}") endif() +# When CONFIG_ASSERT is enabled, the __FILE__ macro may add full paths into the +# read-only strings. This wastes space and can cause non-reproducible builds. +# When the compiler supports it, replace common path prefixes with static +# strings. + +# PLATFORM_EC points to the build directory, which symlinks to the actual +# source. ZEPHYR_CURRENT_CMAKE_DIR points to the actual source directory +# containing this file. Set the PLATFORM_EC_SRC to the parent. +# Replace the paths of the both the build and source directories with "EC_BASE". +cmake_path(GET ZEPHYR_CURRENT_CMAKE_DIR PARENT_PATH PLATFORM_EC_SRC) +zephyr_cc_option(-fmacro-prefix-map=${PLATFORM_EC}=EC_BASE) +zephyr_cc_option(-fmacro-prefix-map=${PLATFORM_EC_SRC}=EC_BASE) + if(DEFINED CONFIG_PLATFORM_EC) # Add CHROMIUM_EC definition, which is used by ec_commands.h to # determine that the header is being compiled for the EC instead of @@ -65,6 +78,8 @@ endif() # Set extra compiler flags. zephyr_cc_option(-mno-unaligned-access) +zephyr_cc_option(-fno-PIC) + if (DEFINED CONFIG_RISCV) zephyr_cc_option(-fsanitize=integer-divide-by-zero) zephyr_cc_option(-fsanitize-undefined-trap-on-error) @@ -90,12 +105,12 @@ set(ZEPHYR_CURRENT_LIBRARY app) # Custom function that ensures the include path is always updated for both # libraries. function(cros_ec_library_include_directories) - target_include_directories(app PRIVATE ${ARGN}) + target_include_directories(app PUBLIC ${ARGN}) target_include_directories(ec_shim PRIVATE ${ARGN}) endfunction() function(cros_ec_library_include_directories_ifdef feature_toggle) if(${${feature_toggle}}) - target_include_directories(app PRIVATE ${ARGN}) + target_include_directories(app PUBLIC ${ARGN}) target_include_directories(ec_shim PRIVATE ${ARGN}) endif() endfunction() @@ -132,7 +147,11 @@ configure_file(gcov.tmpl.sh ${CMAKE_BINARY_DIR}/gcov.sh) # included here, sorted by filename. This is common functionality which is # supported by all boards and emulators (including unit tests) using the shim # layer. -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC "${PLATFORM_EC}/common/base32.c" +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC + # TODO(b/237712836): Remove once + # Zephyr's libc has strcasecmp. + "${PLATFORM_EC}/builtin/stdlib.c" + "${PLATFORM_EC}/common/base32.c" "${PLATFORM_EC}/common/console_output.c" "${PLATFORM_EC}/common/ec_features.c" "${PLATFORM_EC}/common/gpio_commands.c" @@ -173,9 +192,11 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCELGYRO_ICM42607 "${PLATFORM_EC}/driver/accelgyro_icm42607.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO "${PLATFORM_EC}/driver/accelgyro_lsm6dso.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM + "${PLATFORM_EC}/driver/accelgyro_lsm6dsm.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACCEL_FIFO "${PLATFORM_EC}/common/motion_sense_fifo.c") -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ADC_CMD +zephyr_library_sources_ifdef(CONFIG_ADC "${PLATFORM_EC}/common/adc.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ALS_TCS3400 "${PLATFORM_EC}/driver/als_tcs3400.c") @@ -183,6 +204,10 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ALS_CM32183 "${PLATFORM_EC}/driver/als_cm32183.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ACPI "${PLATFORM_EC}/common/acpi.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_AMD_SB_RMI + "${PLATFORM_EC}/driver/sb_rmi.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_AMD_STT + "${PLATFORM_EC}/driver/amd_stt.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BACKLIGHT_LID "${PLATFORM_EC}/common/backlight_lid.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY @@ -228,6 +253,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_RAMP_HW zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_RAMP_SW "${PLATFORM_EC}/common/charge_ramp.c" "${PLATFORM_EC}/common/charge_ramp_sw.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CPS8100 + "${PLATFORM_EC}/driver/wpc/cps8100.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_OCPC "${PLATFORM_EC}/common/ocpc.c") @@ -319,6 +346,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MOTIONSENSE "${PLATFORM_EC}/common/motion_sense.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MP2964 "${PLATFORM_EC}/driver/mp2964.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PERIPHERAL_CHARGER + "${PLATFORM_EC}/common/peripheral_charger.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_PORT80 "${PLATFORM_EC}/common/port80.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWER_BUTTON @@ -475,11 +504,7 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_CCGXXF "${PLATFORM_EC}/driver/tcpm/ccgxxf.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX "${PLATFORM_EC}/driver/tcpm/nct38xx.c") -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751 - "${PLATFORM_EC}/driver/tcpm/ps8xxx.c") -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805 - "${PLATFORM_EC}/driver/tcpm/ps8xxx.c") -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815 +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8XXX "${PLATFORM_EC}/driver/tcpm/ps8xxx.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_RAA489000 "${PLATFORM_EC}/driver/tcpm/raa489000.c") @@ -535,8 +560,6 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY "${PLATFORM_EC}/driver/led/max695x.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_DRIVER_TLC59116F "${PLATFORM_EC}/driver/led/tlc59116f.c") -zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_HOST_SLEEP - "${PLATFORM_EC}/power/host_sleep.c") # Switch to ec_shim library for all Zephyr sources set(ZEPHYR_CURRENT_LIBRARY ec_shim) @@ -544,4 +567,24 @@ add_subdirectory(linker) add_subdirectory("app") add_subdirectory("drivers") add_subdirectory("emul") +add_subdirectory("fake") +add_subdirectory("mock") add_subdirectory_ifdef(CONFIG_PLATFORM_EC "shim") + +# Use external script to generate the ec_version.h header and add as +# a dependency to the EC application library. +add_custom_target( + ec_version_header + VERBATIM COMMAND + "PYTHONPATH=${PLATFORM_EC}/zephyr/zmake/" ${PYTHON_EXECUTABLE} + "${PLATFORM_EC}/zephyr/zmake/zephyr_build_tools/generate_ec_version.py" + "${CMAKE_CURRENT_BINARY_DIR}/include/ec_version.h" + "--base" "${ZEPHYR_BASE}" + "--name" "${CMAKE_PROJECT_NAME}" + "--module" "${ZEPHYR_MODULES}" + ${EXTRA_EC_VERSION_FLAGS} +) +add_dependencies(app ec_version_header) + +# Include the directory containing the generated header. +zephyr_include_directories("${CMAKE_CURRENT_BINARY_DIR}/include") diff --git a/zephyr/DIR_METADATA b/zephyr/DIR_METADATA new file mode 100644 index 0000000000..c7bfb79d83 --- /dev/null +++ b/zephyr/DIR_METADATA @@ -0,0 +1,9 @@ +# Metadata information for this directory. +# +# For more information on DIR_METADATA files, see: +# https://source.chromium.org/chromium/infra/infra/+/main:go/src/infra/tools/dirmd/README.md +# +# For the schema of this file, see Metadata message: +# https://source.chromium.org/chromium/infra/infra/+/main:go/src/infra/tools/dirmd/proto/dir_metadata.proto + +team_email: "zephyr-task-force@google.com" diff --git a/zephyr/Kconfig b/zephyr/Kconfig index 6e17b9ed13..62b9fac62c 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -1,10 +1,12 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. rsource "app/Kconfig" rsource "drivers/Kconfig" rsource "emul/Kconfig" +rsource "fake/Kconfig" +rsource "mock/Kconfig" rsource "subsys/Kconfig" if ZTEST @@ -72,6 +74,7 @@ rsource "Kconfig.throttle_ap" rsource "Kconfig.usba" rsource "Kconfig.usbc" rsource "Kconfig.watchdog" +rsource "Kconfig.wireless_charger" # Define PLATFORM_EC_... options to enable EC features. Each Kconfig should be # matched by a line in zephyr/shim/include/config_chip.h which #defines the @@ -327,7 +330,7 @@ config PLATFORM_EC_EXTPOWER_GPIO Enable shimming the extpower_gpio module, which provides GPIO-based external power presence detection features. The project should define a GPIO pin named GPIO_AC_PRESENT, with - extpower_interrupt configured as the handler in gpio_map.h. + extpower_interrupt configured as the handler. config PLATFORM_EC_FLASH_CROS bool @@ -429,7 +432,7 @@ config PLATFORM_EC_LID_SWITCH behaviour. For example, when the lid is opened, the device may automatically power on. - This requires a GPIO named GPIO_LID_OPEN to be defined in gpio_map.h. + This requires a GPIO named GPIO_LID_OPEN to be defined or aliased. config PLATFORM_EC_MKBP_INPUT_DEVICES bool "Input devices via MKBP" @@ -490,23 +493,6 @@ config PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK HOST_EVENT_AC_CONNECTED)>; The host events are defined in dt-bindings/wake_mask_event_defines.h -config PLATFORM_EC_MPU - bool "Support Memory-Protection Unit (MPU)" - depends on CPU_CORTEX_M - select ARM_MPU - default y - help - This enables support a Memory-Protection Unit which can limit access - to certain areas of memory. This can be used to protect code or data - from being written to improve security or to find bugs. - - It causes any code in the iram.text section to be protected when - system jump is disabled (see system_disable_jump()). It also stops - execution of the image that is not currently being executed (read-only - or read-write). If internal storage is used, this is achieved by not - allowing code execution in that area. For external storage, it - disallows loading any code into RAM. - config PLATFORM_EC_PANIC bool "Panic output" default y @@ -540,7 +526,7 @@ config PLATFORM_EC_POWER_BUTTON commands in platform/ec. This is used to implement the Chromium OS shutdown sequence. - This requires a GPIO named GPIO_POWER_BUTTON_L in gpio_map.h. + This requires a GPIO named GPIO_POWER_BUTTON_L. config PLATFORM_EC_PWM_HC bool @@ -548,11 +534,10 @@ config PLATFORM_EC_PWM_HC Enable the PWM (Pulse Width Modulation) host command support. This implements EC_CMD_PWM_SET_DUTY and EC_CMD_PWM_GET_DUTY. -DT_COMPAT_CROS_EC_DISPLIGHT := cros-ec,displight - config PLATFORM_EC_PWM_DISPLIGHT bool "PWM display backlight" - default $(dt_compat_enabled,$(DT_COMPAT_CROS_EC_DISPLIGHT)) + default y + depends on DT_HAS_CROS_EC_DISPLIGHT_ENABLED select PLATFORM_EC_PWM_HC help Enables display backlight controlled by a PWM signal connected diff --git a/zephyr/Kconfig.accelgyro_bmi b/zephyr/Kconfig.accelgyro_bmi index bb8239f6d8..e08ba08838 100644 --- a/zephyr/Kconfig.accelgyro_bmi +++ b/zephyr/Kconfig.accelgyro_bmi @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.accelgyro_icm b/zephyr/Kconfig.accelgyro_icm index 2bee9184b5..a8b52c0d38 100644 --- a/zephyr/Kconfig.accelgyro_icm +++ b/zephyr/Kconfig.accelgyro_icm @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.adc b/zephyr/Kconfig.adc index a1e3bd63eb..40ec1e4e89 100644 --- a/zephyr/Kconfig.adc +++ b/zephyr/Kconfig.adc @@ -1,17 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -menuconfig PLATFORM_EC_ADC - bool "ADC shim" - default n if ARCH_POSIX - default y - imply ADC - help - Enable compilation of the EC ADC module. Once enabled, it is - possible to call platform/ec adc_read_channel() function. - -if PLATFORM_EC_ADC +# Note - CONFIG_ADC is defined in upstream Zephyr +if ADC # Chromium EC provides it's own "adc" command. Disable the Zephyr # built-in ADC shell command. @@ -59,4 +51,4 @@ config PLATFORM_EC_ADC_CHANNELS_RUNTIME_CONFIG Without this, multiple EC images would need to be installed depending on the board. -endif # PLATFORM_EC_ADC +endif # ADC diff --git a/zephyr/Kconfig.ap_power b/zephyr/Kconfig.ap_power index 03c92759f0..4e3b4139aa 100644 --- a/zephyr/Kconfig.ap_power +++ b/zephyr/Kconfig.ap_power @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.battery b/zephyr/Kconfig.battery index 7b3f20da38..92bce6b618 100644 --- a/zephyr/Kconfig.battery +++ b/zephyr/Kconfig.battery @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -57,19 +57,17 @@ config PLATFORM_EC_BATTERY_PRESENT_GPIO GPIO should read low if the battery is present, high if absent. The GPIO is hard-coded to GPIO_BATT_PRES_ODL so you should define this - in the device tree and GPIO map. The convention is to use the signal + in the device tree. The convention is to use the signal name from schematic as both the node name and label for the GPIO. For example: /* gpio.dts */ ec_batt_pres_odl { gpios = <&gpioe 5 GPIO_INPUT>; - label = "EC_BATT_PRES_ODL"; + enum-name = "EC_BATT_PRES_ODL"; + alias = "GPIO_BATT_PRES_ODL"; }; - /* gpio_map.h */ - #define GPIO_BATT_PRES_ODL NAMED_GPIO(ec_batt_pres_odl) - endchoice # PLATFORM_EC_BATTERY_PRESENT_MODE config PLATFORM_EC_USE_BATTERY_DEVICE_CHEMISTRY diff --git a/zephyr/Kconfig.board_version b/zephyr/Kconfig.board_version index e24957764d..7b7581d90a 100644 --- a/zephyr/Kconfig.board_version +++ b/zephyr/Kconfig.board_version @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.cbi b/zephyr/Kconfig.cbi index 962392e56c..a2be51375e 100644 --- a/zephyr/Kconfig.cbi +++ b/zephyr/Kconfig.cbi @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.charger b/zephyr/Kconfig.charger index fe2dd9f408..baa751f138 100644 --- a/zephyr/Kconfig.charger +++ b/zephyr/Kconfig.charger @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.chargesplash b/zephyr/Kconfig.chargesplash index 83a914e497..c23b51f2a7 100644 --- a/zephyr/Kconfig.chargesplash +++ b/zephyr/Kconfig.chargesplash @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.console b/zephyr/Kconfig.console index 8f0241a4d9..74de199067 100644 --- a/zephyr/Kconfig.console +++ b/zephyr/Kconfig.console @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -66,3 +66,25 @@ menuconfig PLATFORM_EC_CONSOLE_DEBUG Write all zephyr_print() messages to printk() also. Not recommended outside of tests. + +config PLATFORM_EC_LOG_BACKEND_CONSOLE_BUFFER + bool "Logging backend for the console buffer" + depends on PLATFORM_EC_HOSTCMD_CONSOLE + select LOG_OUTPUT + help + Enable the logging backend for the console buffer. + + This will copy messages sent to the zephyr logging subsystem + to the EC console buffer. This allows the AP to access the + log messages with the console host command. + +config PLATFORM_EC_LOG_BACKEND_CONSOLE_BUFFER_TMP_BUF_SIZE + int "Size of temporary buffer used by console buffer logging backend" + default 128 if LOG_MODE_DEFERRED + default 1 + depends on PLATFORM_EC_LOG_BACKEND_CONSOLE_BUFFER + help + The size of the temporary buffer used by the console buffer backend. + The logging subsystem will buffer up to this many bytes before calling + the backend in deferred logging mode. Ideally this will be large + enough to fit an entire log line. diff --git a/zephyr/Kconfig.console_cmd_mem b/zephyr/Kconfig.console_cmd_mem index 4b69cc1778..9be465b488 100644 --- a/zephyr/Kconfig.console_cmd_mem +++ b/zephyr/Kconfig.console_cmd_mem @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.debug_assert b/zephyr/Kconfig.debug_assert index ad94f525f6..c05dceae02 100644 --- a/zephyr/Kconfig.debug_assert +++ b/zephyr/Kconfig.debug_assert @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.defaults b/zephyr/Kconfig.defaults index a92971b3c7..ded7516748 100644 --- a/zephyr/Kconfig.defaults +++ b/zephyr/Kconfig.defaults @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,6 +9,10 @@ config TIMESLICING default n +config LOG + default y + imply LOG_DEFAULT_MINIMAL + config GPIO_EMUL default y if ARCH_POSIX @@ -21,4 +25,13 @@ config THREAD_MAX_NAME_LEN config SHELL_PROMPT_UART default "ec:~$ " +config SHELL_THREAD_PRIORITY_OVERRIDE + default y + +config SHELL_THREAD_PRIORITY + default 12 # track EC_SHELL_PRIO + +config EXTRA_EXCEPTION_INFO + default y if ARCH_HAS_EXTRA_EXCEPTION_INFO + orsource "Kconfig.defaults-$(ARCH)" diff --git a/zephyr/Kconfig.defaults-arm b/zephyr/Kconfig.defaults-arm index 4dddf87304..2d55aaf7d4 100644 --- a/zephyr/Kconfig.defaults-arm +++ b/zephyr/Kconfig.defaults-arm @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.espi b/zephyr/Kconfig.espi index 60ea99def7..3e7210362c 100644 --- a/zephyr/Kconfig.espi +++ b/zephyr/Kconfig.espi @@ -1,28 +1,28 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. if PLATFORM_EC_HOST_INTERFACE_ESPI -config PLATFORM_EC_ESPI_VW_SLP_S3 +config PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3 bool "SLP_S3 is an eSPI virtual wire instead of a GPIO" help For power sequencing, use an eSPI virtual wire instead of - defining GPIO_PCH_SLP_S3 in gpio_map.h. + defining GPIO_PCH_SLP_S3 in the GPIO device tree. -config PLATFORM_EC_ESPI_VW_SLP_S4 +config PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4 bool "SLP_S4 is an eSPI virtual wire instead of a GPIO" help For power sequencing, use an eSPI virtual wire instead of - defining GPIO_PCH_SLP_S4 in gpio_map.h. + defining GPIO_PCH_SLP_S4 in the GPIO device tree. -config PLATFORM_EC_ESPI_VW_SLP_S5 +config PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5 bool "SLP_S5 is an eSPI virtual wire instead of an alias for SLP_S4" help For power sequencing, use an eSPI virtual wire to read the SLP_S5 line, as opposed to merging it into the same net as SLP_S4. -config PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST +config PLATFORM_EC_HOST_INTERFACE_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST bool "Reset SLP VW signals on eSPI reset" help Enable this config to reset SLP* VW when eSPI_RST is asserted @@ -31,7 +31,7 @@ config PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST maintain these pins' states per request. Note that this is currently unimplemented for Zephyr. Please see b/183148073. -config PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US +config PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US int "Virtual wire pulse width (microseconds)" default 65 help diff --git a/zephyr/Kconfig.flash b/zephyr/Kconfig.flash index 8611c8731b..b8b176e987 100644 --- a/zephyr/Kconfig.flash +++ b/zephyr/Kconfig.flash @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -18,6 +18,7 @@ config PLATFORM_EC_SPI_FLASH_REGS config PLATFORM_EC_CONSOLE_CMD_CHARGEN bool "Console command: chargen" depends on UART_INTERRUPT_DRIVEN + default y help Enables the "chargen" console command, which sends a continuous stream of characters to the EC console. diff --git a/zephyr/Kconfig.header b/zephyr/Kconfig.header index 931d7dbaf1..02f9ecc1a7 100644 --- a/zephyr/Kconfig.header +++ b/zephyr/Kconfig.header @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.host_interface b/zephyr/Kconfig.host_interface index 95fe6a0543..41ff23970f 100644 --- a/zephyr/Kconfig.host_interface +++ b/zephyr/Kconfig.host_interface @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.i2c b/zephyr/Kconfig.i2c index 23ccf88bd0..0187409b31 100644 --- a/zephyr/Kconfig.i2c +++ b/zephyr/Kconfig.i2c @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.init_priority b/zephyr/Kconfig.init_priority index c974bb4d8f..42d03e8794 100644 --- a/zephyr/Kconfig.init_priority +++ b/zephyr/Kconfig.init_priority @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.ioex b/zephyr/Kconfig.ioex index 24a946777d..e9bb8065e1 100644 --- a/zephyr/Kconfig.ioex +++ b/zephyr/Kconfig.ioex @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.keyboard b/zephyr/Kconfig.keyboard index 8bcc32af8e..f7c0df77ee 100644 --- a/zephyr/Kconfig.keyboard +++ b/zephyr/Kconfig.keyboard @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -99,15 +99,15 @@ config PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2 bool "Forces KSI2 to be asserted" help Enable this if KSI2 is stuck 'asserted' for all scan columns if the - power button is held. We must be aware of this case in order to - correctly handle recovery-mode key combinations. + power button is held. This applies if the refresh key is on KSI2. + The GSC will assert this row for all columns during a recovery boot. config PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3 bool "Forces KSI3 to be asserted" help Enable this if KSI3 is stuck 'asserted' for all scan columns if the - power button is held. We must be aware of this case in order to - correctly handle recovery-mode key combinations. + power button is held. This applies if the refresh key is on KSI3. + The GSC will assert this row for all columns during a recovery boot. endchoice # PLATFORM_EC_KEYBOARD_PWRBTN_MODE @@ -145,8 +145,8 @@ config PLATFORM_EC_VOLUME_BUTTONS These are buttons controlled by GPIOs and are not part of the keyboard matrix. - Your board must define GPIO_VOLUME_UP_L and GPIO_VOLUME_DOWN_L in - gpio_map.h + Your board must define GPIO_VOLUME_UP_L and GPIO_VOLUME_DOWN_L as + GPIOs names or as aliases in the GPIO devicetree configuration. config PLATFORM_EC_BUTTONS_RUNTIME_CONFIG bool "Enable buttons runtime configuration" @@ -180,11 +180,10 @@ config PLATFORM_EC_CONSOLE_CMD_KEYBOARD kblog - Print or toggle keyboard event log (current disabled) typematic - Get/set typematic delays -DT_COMPAT_CROS_EC_KBLIGHT_PWM := cros-ec,kblight-pwm - config PLATFORM_EC_PWM_KBLIGHT bool "PWM keyboard backlight" - default $(dt_compat_enabled,$(DT_COMPAT_CROS_EC_KBLIGHT_PWM)) + default y + depends on DT_HAS_CROS_EC_KBLIGHT_PWM_ENABLED select PLATFORM_EC_PWM_HC help Enables a PWM-controlled keyboard backlight controlled by a PWM signal @@ -197,6 +196,16 @@ config PLATFORM_EC_KBLIGHT_ENABLE_PIN Enables control of the keyboard backlight through a GPIO enable and disable pin. This pin must be defined as GPIO_EN_KEYBOARD_BACKLIGHT. +config PLATFORM_EC_KEYBOARD_STRICT_DEBOUNCE + bool "Keyboard strict debouncer" + help + Enable strict debouncer. A strict debouncer waits until debounce + is done before registering key up/down while a non-strict debouncer + registers a key up/down as soon as a key is pressed or released. + If a strict debouncer is used, it's recommended to set + debounce_down_us and debounce_up_us to an equal value. This guarantees + key events are registered in the order the keys are pressed. + endif # PLATFORM_EC_KEYBOARD diff --git a/zephyr/Kconfig.led b/zephyr/Kconfig.led index 03f2ebed56..d3d50ccc56 100644 --- a/zephyr/Kconfig.led +++ b/zephyr/Kconfig.led @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.led_dt b/zephyr/Kconfig.led_dt index 16b5842c06..25993802a3 100644 --- a/zephyr/Kconfig.led_dt +++ b/zephyr/Kconfig.led_dt @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.mkbp_event b/zephyr/Kconfig.mkbp_event index e24cf370d2..28d791bbdc 100644 --- a/zephyr/Kconfig.mkbp_event +++ b/zephyr/Kconfig.mkbp_event @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -14,7 +14,7 @@ config PLATFORM_EC_MKBP_USE_GPIO bool "Use GPIO" help Select to send MKBP events via GPIO. You should define GPIO_EC_INT_L - in gpio_map.h as output from the EC. The GPIO is used to indicate an + as a GPIO output from the EC. The GPIO is used to indicate an event is ready for serving by the AP. config PLATFORM_EC_MKBP_USE_HOST_EVENT diff --git a/zephyr/Kconfig.motionsense b/zephyr/Kconfig.motionsense index abfdacc5be..7cf991918b 100644 --- a/zephyr/Kconfig.motionsense +++ b/zephyr/Kconfig.motionsense @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.panic b/zephyr/Kconfig.panic index 322aaee25d..c402fc1e70 100644 --- a/zephyr/Kconfig.panic +++ b/zephyr/Kconfig.panic @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -40,4 +40,11 @@ config PLATFORM_EC_STACKOVERFLOW This can be used to check that stack-overflow detection is working as expected. +config PLATFORM_EC_DEBUG_ASSERT_BRIEF + bool "Enable brief panic messages" + default n + help + On assertion failure, prints only the file name and the line number. + Boards typically define this option in order to reduce image size. + endif # PLATFORM_EC_PANIC diff --git a/zephyr/Kconfig.pd b/zephyr/Kconfig.pd index e1ca76a298..57d348007d 100644 --- a/zephyr/Kconfig.pd +++ b/zephyr/Kconfig.pd @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -76,6 +76,16 @@ config PLATFORM_EC_USB_PD_DEBUG_LEVEL The meaning of each level depends on the module in question, but the maximum available level is 3. +config PLATFORM_EC_USB_PD_INITIAL_DEBUG_LEVEL + int "Initial debug level to use" + default 1 + help + Sets the initial value of the debug level to use, while + still allowing the debug level to be changed using 'pd dump'. + A value of 0 will initially disable debug logging, and values 1 + through to 3 will increase the level of debug logging. + If this config is not set, the default level will be set to 1. + config PLATFORM_EC_USB_PD_5V_EN_CUSTOM bool "Custom method of detecting VBUS" help @@ -343,6 +353,27 @@ config PLATFORM_EC_USB_PD_TEMP_SENSOR one temperature. But, Chromebooks can have multiple temperature sensors. This option selects which temperature sensor is used for USB PD. +config PLATFORM_EC_USB_PD_SHORT_PRESS_MAX_MS + int "Time limit in ms for short presses with a USB PD power button" + default 4000 + help + USB PD supports power buttons over USB-C using button press and button + release alerts. How a chromeOS device responds depends on whether the button + press is considered short or long. This config is used to set the short press + time limit in ms. Any press shorter will be a short press and any press + longer will either be a long press or invalid. + +config PLATFORM_EC_USB_PD_LONG_PRESS_MAX_MS + int "Time limit in ms for valid presses with a USB PD power button" + default 8000 + help + USB PD supports power buttons over USB-C using button press and button + release alerts. If a USB PD partner sends a press but never a release alert, + the EC should time out while waiting for the release and return to an idle + state. This value sets how long the EC waits for a release alert from the + partner in ms. Any press longer than this will not be considered a valid USB + PD button press. + endif # PLATFORM_EC_USB_POWER_DELIVERY endif # PLATFORM_EC_USBC diff --git a/zephyr/Kconfig.pd_console_cmd b/zephyr/Kconfig.pd_console_cmd index bc654f3274..bba130718f 100644 --- a/zephyr/Kconfig.pd_console_cmd +++ b/zephyr/Kconfig.pd_console_cmd @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pd_discharge b/zephyr/Kconfig.pd_discharge index 3631beffa7..6d2bd58b82 100644 --- a/zephyr/Kconfig.pd_discharge +++ b/zephyr/Kconfig.pd_discharge @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pd_frs b/zephyr/Kconfig.pd_frs index 8883542c56..5faf16b05c 100644 --- a/zephyr/Kconfig.pd_frs +++ b/zephyr/Kconfig.pd_frs @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pd_int_shared b/zephyr/Kconfig.pd_int_shared index 6f90d2e3e9..8385496b62 100644 --- a/zephyr/Kconfig.pd_int_shared +++ b/zephyr/Kconfig.pd_int_shared @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pd_meas_vbus b/zephyr/Kconfig.pd_meas_vbus index cffe35985c..1484ad6979 100644 --- a/zephyr/Kconfig.pd_meas_vbus +++ b/zephyr/Kconfig.pd_meas_vbus @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pd_usbc_device_type b/zephyr/Kconfig.pd_usbc_device_type index 4bf1a2d442..62797128cd 100644 --- a/zephyr/Kconfig.pd_usbc_device_type +++ b/zephyr/Kconfig.pd_usbc_device_type @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pd_vbus_detection b/zephyr/Kconfig.pd_vbus_detection index 019eca654a..8e25d973eb 100644 --- a/zephyr/Kconfig.pd_vbus_detection +++ b/zephyr/Kconfig.pd_vbus_detection @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.pmic b/zephyr/Kconfig.pmic index dc79305439..831767c546 100644 --- a/zephyr/Kconfig.pmic +++ b/zephyr/Kconfig.pmic @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.port80 b/zephyr/Kconfig.port80 index adeea08d20..a03d8295f7 100644 --- a/zephyr/Kconfig.port80 +++ b/zephyr/Kconfig.port80 @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -11,4 +11,12 @@ config PLATFORM_EC_PORT80_4_BYTE codes when AP sends 4-byte Port80 codes via eSPI PUT_IOWR_SHORT protocol in a single transaction. +config PLATFORM_EC_PORT80_QUIET + bool "Do not log Port80 codes when they are received" + help + Enable this config to avoid logging the entire buffer of + Port80 codes as each are received. + The history is still available via the 'port80' EC command. + Enabling this will reduce the logging overhead during AP startup. + endif # PLATFORM_EC_HOST_INTERFACE_ESPI diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq index f0db496082..e7c0891ab4 100644 --- a/zephyr/Kconfig.powerseq +++ b/zephyr/Kconfig.powerseq @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -126,12 +126,12 @@ config PLATFORM_EC_POWERSEQ_RTC_RESET bool "Board has an RTC reset" help This project has a gpio named GPIO_PCH_RTCRST defined in - gpio_map.h, which can be used to reset the AP's RTC when set - high. + the GPIO configuration, which can be used to reset the AP's RTC when + set high. config PLATFORM_EC_POWERSEQ_S4 bool "Advertise S4 residency" - depends on PLATFORM_EC_ESPI_VW_SLP_S5 + depends on PLATFORM_HOST_INTERFACE_EC_HOST_INTERFACE_ESPI_VW_SLP_S5 default y if AP_X86_INTEL_TGL default y if AP_X86_INTEL_ADL default y if AP_X86_INTEL_MTL diff --git a/zephyr/Kconfig.ppc b/zephyr/Kconfig.ppc index 9d0ff3b86c..06f78dcf01 100644 --- a/zephyr/Kconfig.ppc +++ b/zephyr/Kconfig.ppc @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -89,6 +89,13 @@ config PLATFORM_EC_USBC_PPC_NX20P3483 The NX20P3483 is a product with combined multiple power switches and a LDO for USB PD application. +config PLATFORM_EC_USBC_NX20P348X_RCP_5VSRC_MASK_ENABLE + bool "NX20P3483 RCP 5VSRC MASK enable" + depends on PLATFORM_EC_USBC_PPC_NX20P3483 + help + The NX20P3483 is a product with 5V SRC reverse current protection + mask enable and disable. + config PLATFORM_EC_USBC_PPC_RT1739 bool "Richtek RT1739 Type-C Power Path Controller" help diff --git a/zephyr/Kconfig.retimer b/zephyr/Kconfig.retimer index f328ffea17..8a460715cb 100644 --- a/zephyr/Kconfig.retimer +++ b/zephyr/Kconfig.retimer @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.rtc b/zephyr/Kconfig.rtc index 5f36893122..a157ffdc77 100644 --- a/zephyr/Kconfig.rtc +++ b/zephyr/Kconfig.rtc @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.sensor_devices b/zephyr/Kconfig.sensor_devices index 1c8e38ac6f..12f5951ff5 100644 --- a/zephyr/Kconfig.sensor_devices +++ b/zephyr/Kconfig.sensor_devices @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -113,6 +113,13 @@ config PLATFORM_EC_ACCELGYRO_LSM6DSO The driver supports ST's LSM6DSO 3D digital accelerometer sensor. It allows measurements of acceleration in three perpendicular axes. +config PLATFORM_EC_ACCELGYRO_LSM6DSM + bool "LSM6DSM Accelgyro Driver" + select PLATFORM_EC_STM_MEMS_COMMON + help + The driver supports ST's LSM6DSM 3D digital accelerometer sensor. + It allows measurements of acceleration in three perpendicular axes. + config PLATFORM_EC_STM_MEMS_COMMON bool help diff --git a/zephyr/Kconfig.stacks b/zephyr/Kconfig.stacks index 519a827b7c..6d983a3d05 100644 --- a/zephyr/Kconfig.stacks +++ b/zephyr/Kconfig.stacks @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.system b/zephyr/Kconfig.system index c9b67a6ab7..5467bc7422 100644 --- a/zephyr/Kconfig.system +++ b/zephyr/Kconfig.system @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -20,6 +20,8 @@ config PLATFORM_EC_CONSOLE_CMD_SYSINFO config PLATFORM_EC_HIBERNATE_PSL bool "System hibernating with PSL (Power Switch Logic) mechanism" + default y + depends on DT_HAS_NUVOTON_NPCX_POWER_PSL_ENABLED depends on SOC_FAMILY_NPCX help Use PSL (Power Switch Logic) for hibernating. It turns off VCC power diff --git a/zephyr/Kconfig.tasks b/zephyr/Kconfig.tasks index d329150e22..0a3c24f1fa 100644 --- a/zephyr/Kconfig.tasks +++ b/zephyr/Kconfig.tasks @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.tcpm b/zephyr/Kconfig.tcpm index 1e7d52358a..4078f3f9be 100644 --- a/zephyr/Kconfig.tcpm +++ b/zephyr/Kconfig.tcpm @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -49,15 +49,6 @@ config PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP This is selected by the ITE USB Type-C drivers. It cannot be set otherwise, even in prj.conf -config PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT - int "Number of ITE USB PD active ports" - depends on PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP - default 1 - help - This sets the number of active USB Power Delivery (USB PD) ports - in use on the ITE microcontroller. The active port usage should - follow the order of ITE TCPC port index. - config PLATFORM_EC_USB_PD_PPC bool "Enable Power Path Control from PD" default n @@ -79,27 +70,6 @@ config PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG factory. Without this, multiple EC images would need to be installed depending on the board. -config PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX - bool "Support multiple PS8xxx devices" - help - PS8XXX-series chips are all supported by a single driver. Enable - this If a board with the same EC firmware is expected to support - multiple products here. Then enable the required PS8xxx options - below. - - In this case the board must provide a function to return the correct - product ID actually used by a particular board: - - uint16_t board_get_ps8xxx_product_id(int port) - - Supported return values are: - - PS8705_PRODUCT_ID - PS8751_PRODUCT_ID - PS8755_PRODUCT_ID - PS8805_PRODUCT_ID - PS8815_PRODUCT_ID - config PLATFORM_EC_USB_PD_TCPM_ANX7447 bool "Analogix ANX7447 USB-C Gen 2 Type-C Port Controller" select PLATFORM_EC_USB_PD_TCPM_MUX @@ -150,10 +120,63 @@ config PLATFORM_EC_USB_PD_TCPM_NCT38XX (TCPC). It incorporates a Power Delivery (PD) PHY with BMC encoding, Protocol logic and USB Type-C Configuration Channel (CC) logic. +config PLATFORM_EC_USB_PD_TCPM_PS8XXX + bool + select PLATFORM_EC_USB_PD_TCPM_MUX + imply PLATFORM_EC_HOSTCMD_I2C_CONTROL + help + Enable the driver for PS8xxx active retimer/redrivers with integrated + USB Type-C Port Controller (TCPC) for USB Type-C Host and DisplayPort + applications. They support Power Delivery and the DisplayPort Alt Mode. + + Support for specific devices in the driver (below) must also be enabled. + +if PLATFORM_EC_USB_PD_TCPM_PS8XXX +config PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX + bool "Support multiple PS8xxx devices" + help + PS8XXX-series chips are all supported by a single driver. Enable + this if a board with the same EC firmware is expected to support + multiple products here. + + In this case the board must provide a function to return the correct + product ID actually used by a particular board: + + uint16_t board_get_ps8xxx_product_id(int port) + + Supported return values are: + + PS8705_PRODUCT_ID + PS8745_PRODUCT_ID + PS8751_PRODUCT_ID + PS8755_PRODUCT_ID + PS8805_PRODUCT_ID + PS8815_PRODUCT_ID +endif # PLATFORM_EC_USB_PD_TCPM_PS8XXX + +config PLATFORM_EC_USB_PD_TCPM_PS8745 + bool "Parade PS8745 USB-C Gen 2 Type-C Port Controller" + select PLATFORM_EC_USB_PD_TCPM_PS8XXX + help + The Parade Technologies PS8815 is an active retiming/redriving + (respectively for USB 3.1 Gen 2 / DisplayPort 1.4a HBR3) integrated + with a USB Type-C Port Controller (TCPC) for USB Type-C Host and + DisplayPort applications. It supports Power Delivery and the + DisplayPort Alt Mode. + +if PLATFORM_EC_USB_PD_TCPM_PS8745 +config PLATFORM_EC_USB_PD_TCPM_PS8745_FORCE_ID + bool "Disambiguate PS8745 and PS8815" + default y + help + Some firmware versions of the PS8745 report incorrect product and device + IDs. Enable this option to check vendor-specific registers and force the + correct device and product IDs. +endif # PLATFORM_EC_USB_PD_TCPM_PS8745 + config PLATFORM_EC_USB_PD_TCPM_PS8751 bool "Parade PS8751 USB-C Gen 2 Type-C Port Controller" - select PLATFORM_EC_USB_PD_TCPM_MUX - imply PLATFORM_EC_HOSTCMD_I2C_CONTROL + select PLATFORM_EC_USB_PD_TCPM_PS8XXX help The Parade Technologies PS8751 is a USB Type-C Port Controller (TCPC) for USB Type-C Host and DisplayPort applications. It supports @@ -161,8 +184,7 @@ config PLATFORM_EC_USB_PD_TCPM_PS8751 config PLATFORM_EC_USB_PD_TCPM_PS8805 bool "Parade PS8805 USB-C Gen 2 Type-C Port Controller" - select PLATFORM_EC_USB_PD_TCPM_MUX - imply PLATFORM_EC_HOSTCMD_I2C_CONTROL + select PLATFORM_EC_USB_PD_TCPM_PS8XXX help The Parade Technologies PS8805 is an active retiming/redriving (respectively for USB 3.1 Gen 2 / DisplayPort 1.4a HBR3) integrated @@ -182,8 +204,7 @@ endif # PLATFORM_EC_USB_PD_TCPM_PS8805 config PLATFORM_EC_USB_PD_TCPM_PS8815 bool "Parade PS8815 USB-C Gen 2 Type-C Port Controller" - select PLATFORM_EC_USB_PD_TCPM_MUX - imply PLATFORM_EC_HOSTCMD_I2C_CONTROL + select PLATFORM_EC_USB_PD_TCPM_PS8XXX help The Parade Technologies PS8815 is an active retiming/redriving (respectively for USB 3.1 Gen 2 / DisplayPort 1.4a HBR3) integrated diff --git a/zephyr/Kconfig.temperature b/zephyr/Kconfig.temperature index 1718a8dc53..09756663bc 100644 --- a/zephyr/Kconfig.temperature +++ b/zephyr/Kconfig.temperature @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -33,7 +33,7 @@ config PLATFORM_EC_DPTF config PLATFORM_EC_THERMISTOR bool "Thermistor support" - depends on PLATFORM_EC_ADC + depends on ADC help Enables support for thermistors (resistor whose resistance is strongly dependent on temperature) as temperature-sensor type. @@ -77,11 +77,10 @@ config PLATFORM_EC_TEMP_SENSOR_FIRST_READ_DELAY_MS endif # PLATFORM_EC_TEMP_SENSOR_FIRST_READ_DELAY -DT_COMPAT_CROS_EC_FANS := cros-ec,fans - config PLATFORM_EC_FAN bool "Fan support" - default $(dt_compat_enabled,$(DT_COMPAT_CROS_EC_FANS)) + default y + depends on DT_HAS_CROS_EC_FANS_ENABLED help Enables support for fans. Allows periodic thermal task to automatically set the fan speed (control temperature). @@ -101,3 +100,12 @@ config PLATFORM_EC_NUM_FANS for control through fan APIs. endif # PLATFORM_EC_FAN + +config PLATFORM_EC_FAN_BYPASS_SLOW_RESPONSE + bool "Enable fan slow response control mechanism" + default n + help + A specific type of fan needs a longer time to output the TACH + signal to EC after EC outputs the PWM signal to the fan. + During this period, the driver will read two consecutive RPM = 0. + In this case, don't step the PWM duty too aggressively. diff --git a/zephyr/Kconfig.throttle_ap b/zephyr/Kconfig.throttle_ap index ad5bfe9c77..e4dba3f2b4 100644 --- a/zephyr/Kconfig.throttle_ap +++ b/zephyr/Kconfig.throttle_ap @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -58,4 +58,14 @@ config PLATFORM_EC_THROTTLE_AP_ON_BAT_LOW_VOLTAGE_THRESH default 0 endif +config PLATFORM_EC_GPU_NVIDIA + bool "Nvidia GPU supports throttling" + default n + help + Enable GPU throttling. When the GPU is throttled, a software (D-Notify) + and a hardware throttle (GPIO_NVIDIA_GPU_ACOFF_ODL) are enabled. A + hardware throttle will be automatically disabled after a fixed period + of time but a software throttle may remain and keep changing as the + situation changes. + endif # PLATFORM_EC_THROTTLE_AP diff --git a/zephyr/Kconfig.timer b/zephyr/Kconfig.timer index 5b615961eb..0e19f2d551 100644 --- a/zephyr/Kconfig.timer +++ b/zephyr/Kconfig.timer @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.usb_charger b/zephyr/Kconfig.usb_charger index dd167dddae..1c58753412 100644 --- a/zephyr/Kconfig.usb_charger +++ b/zephyr/Kconfig.usb_charger @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -16,10 +16,12 @@ config PLATFORM_EC_USB_CHARGER if PLATFORM_EC_USB_CHARGER config PLATFORM_EC_USB_CHARGER_SINGLE_TASK - bool "Run all charger code in a single task" + bool default y help - Run all USB charger code in a single task rather than a task per port. + Helper symbol use in the common EC code for Zephyr specific charger + changes. + config PLATFORM_EC_BC12_DETECT_DATA_ROLE_TRIGGER bool @@ -27,6 +29,14 @@ config PLATFORM_EC_BC12_DETECT_DATA_ROLE_TRIGGER This is a helper symbol that indicates the BC1.2 chip needs to be triggered on data role swaps in addition to VBUS changes. +config PLATFORM_EC_BC12_CLIENT_MODE_ONLY_PI3USB9201 + bool "Run as BC1.2 client while using PI3USB9201" + depends on PLATFORM_EC_BC12_DETECT_PI3USB9201 + default n + help + This is a helper symbol that indicates the PI3USB9201 will only + advertise itself as a BC1.2 client, not a BC1.2 host. + config PLATFORM_EC_BC12_DETECT_PI3USB9201 bool "Enable support for Pericom PI3USB9201" select PLATFORM_EC_BC12_DETECT_DATA_ROLE_TRIGGER diff --git a/zephyr/Kconfig.usb_mux b/zephyr/Kconfig.usb_mux index a0db4f666d..6f4e31a2cf 100644 --- a/zephyr/Kconfig.usb_mux +++ b/zephyr/Kconfig.usb_mux @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.usba b/zephyr/Kconfig.usba index 380d277d2c..8abbe839f6 100644 --- a/zephyr/Kconfig.usba +++ b/zephyr/Kconfig.usba @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -81,6 +81,30 @@ config PLATFORM_EC_USB_PORT_POWER_SMART_INVERTED is inverted, meaning a low value indicates a high current limit and a high value requests a low current limit. +choice PLATFORM_EC_USBA_PORT_POWER_SMART_DEFAULT_MODE + prompt "Port power smart charging default mode" + default PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_SDP + +config PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_DISABLED + bool "Disabled" + help + USB-A ports charging mode default set to disabled. + If set, the USB-A charging mode is disabled. + +config PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_SDP + bool "SDP" + help + USB-A ports charging mode default set to Standard Downstream + Port, USB 2.0 mode. + +config PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_CDP + bool "CDP" + help + USB-A ports charging mode default set to Charging Downstream + Port, BC 1.2. + +endchoice + endif # PLATFORM_EC_USB_PORT_POWER_SMART endif # PLATFORM_EC_USBA diff --git a/zephyr/Kconfig.usbc b/zephyr/Kconfig.usbc index cfee1172f4..37c57bcdd2 100644 --- a/zephyr/Kconfig.usbc +++ b/zephyr/Kconfig.usbc @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -56,6 +56,7 @@ config PLATFORM_EC_USBC_OCP config PLATFORM_EC_USB_PID hex "USB Product ID" + default 0 help Each platform (e.g. baseboard set) should have a single VID/PID combination. If there is a big enough change within a platform, @@ -133,6 +134,16 @@ config PLATFORM_EC_CONSOLE_CMD_PPC_DUMP reference to the datasheet for the part this can help you figure out what is going on. +config PLATFORM_EC_USBC_PPC_LOGGING + bool "Enable PPC Related logging" + depends on PLATFORM_EC_USBC_PPC + default y + help + PPC drivers use two print functions for logging error messages + (ppc_prints and ppc_err_prints). Setting this config adds the + CPRINTS call to both of these function which will enable PPC + related logging but increase EC image size. + config PLATFORM_EC_USB_PD_TCPM_DRIVER_IT83XX bool "Enable IT83XX driver" depends on PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP @@ -163,4 +174,55 @@ config PLATFORM_EC_USB_PD_ONLY_FIXED_PDOS Ignore all non-fixed PDOs received from a src_caps message. Enable this for boards (like servo_v4) which only support FIXED PDO types. +# Define power related settings here for now to allow projects to overwrite +# them. Ideally they would be defined in the devicetree. +config PLATFORM_EC_PD_OPERATING_POWER_MW + int "PD operating power in milliwatt" + default 15000 + help + Base configuration for PD power operating power value, which is used + in PD negotiation. The final PD parameter used in negotiation is + affected by PLATFORM_EC_PD_MAX_POWER_MW, + PLATFORM_EC_PD_MAX_CURRENT_MA, and PLATFORM_EC_PD_MAX_VOLTAGE_MV. + Increase this value is the system requires more than 15 watts to boot + without a battery. + +config PLATFORM_EC_PD_MAX_POWER_MW + int "PD maximum power in milliwatt" + default 60000 + help + The maximum PD negotiated power for the system. The value should match + with configured PLATFORM_EC_PD_MAX_CURRENT_MA and + PLATFORM_EC_PD_MAX_VOLTAGE_MV. + +config PLATFORM_EC_PD_MAX_CURRENT_MA + int "PD maximum current in milliampere" + default 3000 + help + The maximum PD negotiated current for the system. The value should + match with configured PLATFORM_EC_PD_MAX_POWER_MW and + PLATFORM_EC_PD_MAX_VOLTAGE_MV. + +config PLATFORM_EC_PD_MAX_VOLTAGE_MV + int "PD maximum voltage in millivolt" + default 20000 + help + The maximum PD negotiated voltage for the system. The value should + match with configured PLATFORM_EC_PD_MAX_POWER_MW and + PLATFORM_EC_PD_MAX_CURRENT_MA. + +config PLATFORM_EC_PD_POWER_SUPPLY_TURN_ON_DELAY + int "Power supply turn on delay in us" + default 30000 + help + Each platform could have different power sequencing and transition + timing for turning on the power on the PD port. + +config PLATFORM_EC_PD_POWER_SUPPLY_TURN_OFF_DELAY + int "Power supply turn off delay in us" + default 30000 + help + Each platform could have different power sequencing and transition + timing for turning off the power on the PD port. + endif # PLATFORM_EC_USBC diff --git a/zephyr/Kconfig.usbc_ss_mux b/zephyr/Kconfig.usbc_ss_mux index 5578deaa6b..5d09bb3b02 100644 --- a/zephyr/Kconfig.usbc_ss_mux +++ b/zephyr/Kconfig.usbc_ss_mux @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.watchdog b/zephyr/Kconfig.watchdog index 57d93d7c39..f6c9002233 100644 --- a/zephyr/Kconfig.watchdog +++ b/zephyr/Kconfig.watchdog @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/Kconfig.wireless_charger b/zephyr/Kconfig.wireless_charger index e0608d0b57..c53bd6f7cc 100644 --- a/zephyr/Kconfig.wireless_charger +++ b/zephyr/Kconfig.wireless_charger @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/README.md b/zephyr/README.md index 1a4967a8b2..403cf7132e 100644 --- a/zephyr/README.md +++ b/zephyr/README.md @@ -25,9 +25,10 @@ See the piplines [here](https://gitlab.com/zephyr-ec/ec/-/pipelines). To test the cq builder script run these commands: ### firmware-zephyr-cq + ``` rm -rf /tmp/artifact_bundles /tmp/artifact_bundle_metadata \ - ~/chromiumos/src/platform/ec/build + ~/chromiumos/src/platform/ec/build ( cd ~/chromiumos/src/platform/ec/zephyr ; \ ./firmware_builder.py --metrics /tmp/metrics-build build && \ ./firmware_builder.py --metrics /tmp/metrics-test test && \ @@ -39,6 +40,7 @@ ls -l /tmp/artifact_bundles/ ``` ### firmware-zephyr-cov-cq + ``` rm -rf /tmp/artifact_bundles-cov /tmp/artifact_bundle_metadata-cov \ ~/chromiumos/src/platform/ec/build && \ diff --git a/zephyr/app/CMakeLists.txt b/zephyr/app/CMakeLists.txt index dfc45f19f9..0365782963 100644 --- a/zephyr/app/CMakeLists.txt +++ b/zephyr/app/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/app/Kconfig b/zephyr/app/Kconfig index 3cac46afa7..7fb8c917ed 100644 --- a/zephyr/app/Kconfig +++ b/zephyr/app/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/app/ec/CMakeLists.txt b/zephyr/app/ec/CMakeLists.txt index fc7205462d..ac3d3fe3d2 100644 --- a/zephyr/app/ec/CMakeLists.txt +++ b/zephyr/app/ec/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,3 +7,5 @@ zephyr_library_sources(ec_app_main.c) if(NOT DEFINED CONFIG_ZTEST) zephyr_library_sources(main_shim.c) endif() + +add_subdirectory(chip)
\ No newline at end of file diff --git a/zephyr/app/ec/Kconfig b/zephyr/app/ec/Kconfig index ebdeebfdf2..fbf6185740 100644 --- a/zephyr/app/ec/Kconfig +++ b/zephyr/app/ec/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -34,6 +34,11 @@ config NUM_PREEMPT_PRIORITIES config SYSTEM_WORKQUEUE_PRIORITY default 24 +# eSPI is chatty, so default to Error only +choice ESPI_LOG_LEVEL_CHOICE + default ESPI_LOG_LEVEL_ERR +endchoice + config LTO bool "Link Time Optimization (LTO)" default y if !SOC_POSIX diff --git a/zephyr/app/ec/chip/CMakeLists.txt b/zephyr/app/ec/chip/CMakeLists.txt new file mode 100644 index 0000000000..e92dbc5d5d --- /dev/null +++ b/zephyr/app/ec/chip/CMakeLists.txt @@ -0,0 +1 @@ +add_subdirectory_ifdef(CONFIG_RISCV riscv)
\ No newline at end of file diff --git a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec index d05ad020e7..3baca08d04 100644 --- a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec +++ b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -8,6 +8,10 @@ if SOC_FAMILY_MEC +# Enable MPU for ARM targets +config ARM_MPU + default y + # ADC config PLATFORM_EC_ADC_RESOLUTION default 10 diff --git a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x index 9e37b6a534..bfcfeb8235 100644 --- a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x +++ b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx index 2da9252775..17936ab05d 100644 --- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx +++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -8,6 +8,10 @@ if SOC_FAMILY_NPCX +# Enable MPU for ARM targets +config ARM_MPU + default y + # Enable NPCX firmware header generator config NPCX_HEADER default y diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7 b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7 index 37561f4dad..cb00db3345 100644 --- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7 +++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7 @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9 b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9 index aceec4f3ca..9c807a732c 100644 --- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9 +++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9 @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/app/ec/chip/riscv/CMakeLists.txt b/zephyr/app/ec/chip/riscv/CMakeLists.txt new file mode 100644 index 0000000000..b11c4e9a90 --- /dev/null +++ b/zephyr/app/ec/chip/riscv/CMakeLists.txt @@ -0,0 +1 @@ +add_subdirectory_ifdef(CONFIG_SOC_FAMILY_RISCV_ITE riscv-ite)
\ No newline at end of file diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/CMakeLists.txt b/zephyr/app/ec/chip/riscv/riscv-ite/CMakeLists.txt new file mode 100644 index 0000000000..69608c33e3 --- /dev/null +++ b/zephyr/app/ec/chip/riscv/riscv-ite/CMakeLists.txt @@ -0,0 +1,3 @@ +if (CONFIG_ESPI_IT8XXX2) + zephyr_library_sources_ifdef(CONFIG_AP_POWER_CONTROL it8xxx2-espi.c) +endif ()
\ No newline at end of file diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 index 809b9a6401..e0ea15c5b7 100644 --- a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 +++ b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/it8xxx2-espi.c b/zephyr/app/ec/chip/riscv/riscv-ite/it8xxx2-espi.c new file mode 100644 index 0000000000..6109964cb9 --- /dev/null +++ b/zephyr/app/ec/chip/riscv/riscv-ite/it8xxx2-espi.c @@ -0,0 +1,63 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <soc_espi.h> +#include <ap_power/ap_power.h> +#include <chipset.h> +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> + +LOG_MODULE_REGISTER(ec_chip_it8xxx2_espi, CONFIG_ESPI_LOG_LEVEL); + +/* + * When eSPI CS# is held low, it prevents IT8xxx2 from entering deep doze. + * To allow deep doze and save power, disable the eSPI inputs while the AP is + * in G3. + */ +static const struct device *const espi_device = + DEVICE_DT_GET(DT_NODELABEL(espi0)); + +static void espi_enable_callback(struct ap_power_ev_callback *cb, + struct ap_power_ev_data data) +{ + switch (data.event) { + case AP_POWER_INITIALIZED: + /* When AP power state becomes known, sync eSPI enable */ + if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) { + LOG_DBG("AP off; disabling eSPI"); + espi_it8xxx2_enable_pad_ctrl(espi_device, false); + } + break; + case AP_POWER_PRE_INIT: + case AP_POWER_HARD_OFF: { + bool enable = data.event == AP_POWER_PRE_INIT; + + LOG_DBG("%sabling eSPI in response to AP power event", + enable ? "en" : "dis"); + espi_it8xxx2_enable_pad_ctrl(espi_device, enable); + break; + } + default: + __ASSERT(false, "%s: unhandled event: %d", __func__, + data.event); + break; + } +} + +static int init_espi_enable_callback(const struct device *unused) +{ + static struct ap_power_ev_callback cb; + + if (!device_is_ready(espi_device)) + k_oops(); + + ap_power_ev_init_callback(&cb, espi_enable_callback, + AP_POWER_INITIALIZED | AP_POWER_PRE_INIT | + AP_POWER_HARD_OFF); + ap_power_ev_add_callback(&cb); + + return 0; +} +/* Should run before power sequencing init so INITIALIZED callback can fire */ +SYS_INIT(init_espi_enable_callback, APPLICATION, 0); diff --git a/zephyr/app/ec/ec_app_main.c b/zephyr/app/ec/ec_app_main.c index 12043a3c4a..9b13c8ab86 100644 --- a/zephyr/app/ec/ec_app_main.c +++ b/zephyr/app/ec/ec_app_main.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,11 +6,11 @@ #include <zephyr/kernel.h> #include <zephyr/sys/printk.h> #include <zephyr/shell/shell_uart.h> -#include <zephyr/zephyr.h> #include "ap_power/ap_pwrseq.h" #include "button.h" #include "chipset.h" +#include "cros_board_info.h" #include "ec_tasks.h" #include "hooks.h" #include "keyboard_scan.h" @@ -38,7 +38,7 @@ void ec_app_main(void) system_print_banner(); if (IS_ENABLED(CONFIG_PLATFORM_EC_WATCHDOG) && - !IS_ENABLED(CONFIG_WDT_DISABLE_AT_BOOT)) { + !IS_ENABLED(CONFIG_WDT_DISABLE_AT_BOOT)) { watchdog_init(); } @@ -77,6 +77,14 @@ void ec_app_main(void) } /* + * If the EC has exclusive control over the CBI EEPROM WP signal, have + * the EC set the WP if appropriate. Note that once the WP is set, the + * EC must be reset via EC_RST_ODL in order for the WP to become unset. + */ + if (IS_ENABLED(CONFIG_PLATFORM_EC_EEPROM_CBI_WP) && system_is_locked()) + cbi_latch_eeprom_wp(); + + /* * Print the init time. Not completely accurate because it can't take * into account the time before timer_init(), but it'll at least catch * the majority of the time. diff --git a/zephyr/app/ec/include/ec_app_main.h b/zephyr/app/ec/include/ec_app_main.h index a5043be84a..472e0b5c0e 100644 --- a/zephyr/app/ec/include/ec_app_main.h +++ b/zephyr/app/ec/include/ec_app_main.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/app/ec/main_shim.c b/zephyr/app/ec/main_shim.c index 7e54c83295..a14cff2dcb 100644 --- a/zephyr/app/ec/main_shim.c +++ b/zephyr/app/ec/main_shim.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/app/ec/soc/Kconfig b/zephyr/app/ec/soc/Kconfig index 9d3c851a36..3dccfa3a2a 100644 --- a/zephyr/app/ec/soc/Kconfig +++ b/zephyr/app/ec/soc/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/mec1727/Kconfig.board b/zephyr/boards/arm/mec1727/Kconfig.board index 66a3993185..7b11c1a0e9 100644 --- a/zephyr/boards/arm/mec1727/Kconfig.board +++ b/zephyr/boards/arm/mec1727/Kconfig.board @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/mec1727/Kconfig.defconfig b/zephyr/boards/arm/mec1727/Kconfig.defconfig index 0708bda48c..8afdc63abf 100644 --- a/zephyr/boards/arm/mec1727/Kconfig.defconfig +++ b/zephyr/boards/arm/mec1727/Kconfig.defconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/mec1727/board.cmake b/zephyr/boards/arm/mec1727/board.cmake index b67f47c819..d28d9c55e2 100644 --- a/zephyr/boards/arm/mec1727/board.cmake +++ b/zephyr/boards/arm/mec1727/board.cmake @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/mec1727/mec1727.dts b/zephyr/boards/arm/mec1727/mec1727.dts index d371f8a2dc..3852f35fa8 100644 --- a/zephyr/boards/arm/mec1727/mec1727.dts +++ b/zephyr/boards/arm/mec1727/mec1727.dts @@ -58,22 +58,18 @@ compatible = "named-adc-channels"; adc_ddr_soc: ddr_soc { - label = "TEMP_DDR_SOC"; enum-name = "ADC_TEMP_SENSOR_1_DDR_SOC"; io-channels = <&adc0 5>; }; adc_ambient: ambient { - label = "TEMP_AMBIENT"; enum-name = "ADC_TEMP_SENSOR_2_AMBIENT"; io-channels = <&adc0 3>; }; adc_charger: charger { - label = "TEMP_CHARGER"; enum-name = "ADC_TEMP_SENSOR_3_CHARGER"; io-channels = <&adc0 0>; }; adc_wwan: wwan { - label = "TEMP_WWAN"; enum-name = "ADC_TEMP_SENSOR_4_WWAN"; io-channels = <&adc0 4>; }; @@ -93,7 +89,6 @@ cros_kb_raw: cros-kb-raw@40009c00 { compatible = "microchip,xec-cros-kb-raw"; reg = <0x40009c00 0x18>; - label = "CROS_KB_RAW_0"; interrupts = <135 0>; }; }; diff --git a/zephyr/boards/arm/mec1727/mec1727_defconfig b/zephyr/boards/arm/mec1727/mec1727_defconfig index 69f0ff53f5..b6aa0dd1e9 100644 --- a/zephyr/boards/arm/mec1727/mec1727_defconfig +++ b/zephyr/boards/arm/mec1727/mec1727_defconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -12,6 +12,10 @@ CONFIG_RTOS_TIMER=y CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768 CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768 +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y @@ -28,6 +32,7 @@ CONFIG_PINCTRL=y # GPIO Controller CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y # Clock configuration CONFIG_CLOCK_CONTROL=y diff --git a/zephyr/boards/arm/npcx7/Kconfig.board b/zephyr/boards/arm/npcx7/Kconfig.board index 706f03a577..b5c0134b75 100644 --- a/zephyr/boards/arm/npcx7/Kconfig.board +++ b/zephyr/boards/arm/npcx7/Kconfig.board @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx7/Kconfig.defconfig b/zephyr/boards/arm/npcx7/Kconfig.defconfig index fcea4f964e..afa9640b5a 100644 --- a/zephyr/boards/arm/npcx7/Kconfig.defconfig +++ b/zephyr/boards/arm/npcx7/Kconfig.defconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx7/board.cmake b/zephyr/boards/arm/npcx7/board.cmake index f2117625b3..e1d12397eb 100644 --- a/zephyr/boards/arm/npcx7/board.cmake +++ b/zephyr/boards/arm/npcx7/board.cmake @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx7/npcx7.dts b/zephyr/boards/arm/npcx7/npcx7.dts index 551c3fe3af..99e152c260 100644 --- a/zephyr/boards/arm/npcx7/npcx7.dts +++ b/zephyr/boards/arm/npcx7/npcx7.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -38,10 +38,6 @@ named-adc-channels { compatible = "named-adc-channels"; }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - }; }; &uart1 { @@ -88,3 +84,8 @@ >; pinctrl-names = "default"; }; + +/* PSL_OUT is fixed to GPIO85 in npcx7 series. */ +&power_ctrl_psl { + enable-gpios = <&gpio8 5 0>; +}; diff --git a/zephyr/boards/arm/npcx7/npcx7_defconfig b/zephyr/boards/arm/npcx7/npcx7_defconfig index 6cced28039..c6c8f6c3f4 100644 --- a/zephyr/boards/arm/npcx7/npcx7_defconfig +++ b/zephyr/boards/arm/npcx7/npcx7_defconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -12,6 +12,10 @@ CONFIG_BOARD_NPCX7=y CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + # Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y @@ -24,6 +28,7 @@ CONFIG_PINCTRL=y # GPIO Controller CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y # Clock configuration CONFIG_CLOCK_CONTROL=y diff --git a/zephyr/boards/arm/npcx9/Kconfig.board b/zephyr/boards/arm/npcx9/Kconfig.board index c469ada39e..64e02d2c92 100644 --- a/zephyr/boards/arm/npcx9/Kconfig.board +++ b/zephyr/boards/arm/npcx9/Kconfig.board @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx9/Kconfig.defconfig b/zephyr/boards/arm/npcx9/Kconfig.defconfig index a8e2fbc0fd..f764ad0454 100644 --- a/zephyr/boards/arm/npcx9/Kconfig.defconfig +++ b/zephyr/boards/arm/npcx9/Kconfig.defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx9/board.cmake b/zephyr/boards/arm/npcx9/board.cmake index a204305534..e5e2fedd4f 100644 --- a/zephyr/boards/arm/npcx9/board.cmake +++ b/zephyr/boards/arm/npcx9/board.cmake @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx9/npcx9.dtsi b/zephyr/boards/arm/npcx9/npcx9.dtsi index 27ece8cdd6..d253928dea 100644 --- a/zephyr/boards/arm/npcx9/npcx9.dtsi +++ b/zephyr/boards/arm/npcx9/npcx9.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -33,10 +33,6 @@ named-adc-channels { compatible = "named-adc-channels"; }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - }; }; &uart1 { @@ -56,3 +52,8 @@ pinmux-gpio; }; }; + +/* PSL_OUT is fixed to GPIO85 in npcx9 series. */ +&power_ctrl_psl { + enable-gpios = <&gpio8 5 0>; +}; diff --git a/zephyr/boards/arm/npcx9/npcx9m3f.dts b/zephyr/boards/arm/npcx9/npcx9m3f.dts index 1b009dfa0b..a51aeccae1 100644 --- a/zephyr/boards/arm/npcx9/npcx9m3f.dts +++ b/zephyr/boards/arm/npcx9/npcx9m3f.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/boards/arm/npcx9/npcx9m3f_defconfig b/zephyr/boards/arm/npcx9/npcx9m3f_defconfig index f35fa4564b..d3b4bcc3a2 100644 --- a/zephyr/boards/arm/npcx9/npcx9m3f_defconfig +++ b/zephyr/boards/arm/npcx9/npcx9m3f_defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,6 +9,10 @@ CONFIG_SOC_NPCX9M3F=y # Platform Configuration CONFIG_BOARD_NPCX9=y +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y @@ -25,6 +29,7 @@ CONFIG_PINCTRL=y # GPIO Controller CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y # Clock configuration CONFIG_CLOCK_CONTROL=y diff --git a/zephyr/boards/arm/npcx9/npcx9m7f.dts b/zephyr/boards/arm/npcx9/npcx9m7f.dts index ebb355c877..5f936173e1 100644 --- a/zephyr/boards/arm/npcx9/npcx9m7f.dts +++ b/zephyr/boards/arm/npcx9/npcx9m7f.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/boards/arm/npcx9/npcx9m7f_defconfig b/zephyr/boards/arm/npcx9/npcx9m7f_defconfig index b2015041f4..e742904aed 100644 --- a/zephyr/boards/arm/npcx9/npcx9m7f_defconfig +++ b/zephyr/boards/arm/npcx9/npcx9m7f_defconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,6 +9,10 @@ CONFIG_SOC_NPCX9M7F=y # Platform Configuration CONFIG_BOARD_NPCX9=y +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y @@ -25,6 +29,7 @@ CONFIG_PINCTRL=y # GPIO Controller CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y # Clock configuration CONFIG_CLOCK_CONTROL=y diff --git a/zephyr/boards/arm/npcx_evb/Kconfig.board b/zephyr/boards/arm/npcx_evb/Kconfig.board index 0a64548887..00b6b75f72 100644 --- a/zephyr/boards/arm/npcx_evb/Kconfig.board +++ b/zephyr/boards/arm/npcx_evb/Kconfig.board @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx_evb/Kconfig.defconfig b/zephyr/boards/arm/npcx_evb/Kconfig.defconfig index c0c874ad26..512a8403e7 100644 --- a/zephyr/boards/arm/npcx_evb/Kconfig.defconfig +++ b/zephyr/boards/arm/npcx_evb/Kconfig.defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb.dts b/zephyr/boards/arm/npcx_evb/npcx7_evb.dts index 1780495feb..75ad9e33a6 100644 --- a/zephyr/boards/arm/npcx_evb/npcx7_evb.dts +++ b/zephyr/boards/arm/npcx_evb/npcx7_evb.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,3 +22,8 @@ pinctrl-0 = <&uart1_2_sin_sout_gp64_65>; pinctrl-names = "default"; }; + +/* PSL_OUT is fixed to GPIO85 in npcx7 series. */ +&power_ctrl_psl { + enable-gpios = <&gpio8 5 0>; +}; diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig index 169108f18b..faee09f492 100644 --- a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig +++ b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -29,6 +29,7 @@ CONFIG_PINCTRL=y # GPIO Controller CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y # Clock configuration CONFIG_CLOCK_CONTROL=y diff --git a/zephyr/boards/arm/npcx_evb/npcx9_evb.dts b/zephyr/boards/arm/npcx_evb/npcx9_evb.dts index 6669575466..1def8dc48f 100644 --- a/zephyr/boards/arm/npcx_evb/npcx9_evb.dts +++ b/zephyr/boards/arm/npcx_evb/npcx9_evb.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,3 +23,8 @@ &uart1_2_sout_gp65>; pinctrl-names = "default"; }; + +/* PSL_OUT is fixed to GPIO85 in npcx9 series. */ +&power_ctrl_psl { + enable-gpios = <&gpio8 5 0>; +}; diff --git a/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig index e64abd9e73..da75b3d113 100644 --- a/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig +++ b/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -29,6 +29,7 @@ CONFIG_PINCTRL=y # GPIO Controller CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y # Clock configuration CONFIG_CLOCK_CONTROL=y diff --git a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi index 9a9f221bfc..615df09a64 100644 --- a/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi +++ b/zephyr/boards/arm/npcx_evb/npcx_evb.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,23 +22,23 @@ i2c_evb_0_0 { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_EVB_0"; + enum-names = "I2C_PORT_EVB_0"; }; i2c_evb_1_0 { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_EVB_1"; + enum-names = "I2C_PORT_EVB_1"; }; i2c_evb_2_0 { i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_EVB_2"; + enum-names = "I2C_PORT_EVB_2"; }; i2c_evb_3_0 { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_EVB_3"; + enum-names = "I2C_PORT_EVB_3"; }; i2c_evb_7_0 { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_EVB_7"; + enum-names = "I2C_PORT_EVB_7"; }; }; @@ -46,27 +46,22 @@ compatible = "named-adc-channels"; adc_ch_0 { - label = "ADC0"; enum-name = "ADC_EVB_CH_0"; io-channels = <&adc0 0>; }; adc_ch_1 { - label = "ADC1"; enum-name = "ADC_EVB_CH_1"; io-channels = <&adc0 1>; }; adc_ch_2 { - label = "ADC2"; enum-name = "ADC_EVB_CH_2"; io-channels = <&adc0 2>; }; adc_ch_3 { - label = "ADC3"; enum-name = "ADC_EVB_CH_3"; io-channels = <&adc0 3>; }; adc_ch_4 { - label = "ADC4"; enum-name = "ADC_EVB_CH_4"; io-channels = <&adc0 4>; }; diff --git a/zephyr/boards/riscv/it8xxx2/Kconfig.board b/zephyr/boards/riscv/it8xxx2/Kconfig.board index 0e58c236f8..157d269c77 100644 --- a/zephyr/boards/riscv/it8xxx2/Kconfig.board +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.board @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig index 6cf9bd039b..6b38f9395b 100644 --- a/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -11,4 +11,52 @@ choice PLATFORM_EC_HOSTCMD_DEBUG_MODE default HCDEBUG_OFF endchoice # PLATFORM_EC_HOSTCMD_DEBUG_MODE +config CROS_EC_HOOK_TICK_INTERVAL + default 500000 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 + +config SYS_CLOCK_TICKS_PER_SEC + default 32768 + +if ADC +config PLATFORM_EC_ADC_RESOLUTION + default 10 +endif # ADC + +if CONSOLE +config UART_CONSOLE + default y + depends on SERIAL +endif # CONSOLE + +if FLASH +config PLATFORM_EC_CONSOLE_CMD_FLASH + default y +endif # FLASH + +if SERIAL +config UART_INTERRUPT_DRIVEN + default y +endif # SERIAL + +if SHELL +config SHELL_TAB + default y +config SHELL_TAB_AUTOCOMPLETION + default y +config SHELL_HISTORY + default y +endif # SHELL + +if WATCHDOG +config PLATFORM_EC_WATCHDOG_PERIOD_MS + default 2500 +config WDT_ITE_WARNING_LEADING_TIME_MS + default 500 +config WDT_ITE_REDUCE_WARNING_LEADING_TIME + default y +endif # WATCHDOG + endif # BOARD_IT8XXX2 diff --git a/zephyr/projects/posix-ec/include/gpio_map.h b/zephyr/boards/riscv/it8xxx2/it81202bx.dts index 93e5f644ba..d2c892f735 100644 --- a/zephyr/projects/posix-ec/include/gpio_map.h +++ b/zephyr/boards/riscv/it8xxx2/it81202bx.dts @@ -1,4 +1,8 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ + +/dts-v1/; + +#include "it8xxx2.dts" diff --git a/zephyr/boards/riscv/it8xxx2/it81202bx_defconfig b/zephyr/boards/riscv/it8xxx2/it81202bx_defconfig new file mode 100644 index 0000000000..a024ab5824 --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it81202bx_defconfig @@ -0,0 +1,39 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y +CONFIG_SOC_IT8XXX2=y +CONFIG_SOC_IT81202_BX=y + +# Platform Configuration +CONFIG_BOARD_IT8XXX2=y + +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + +# Power Management +CONFIG_PM=y +CONFIG_PM_DEVICE=y +CONFIG_PM_POLICY_CUSTOM=y + +# Console +CONFIG_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y + +# Clock Controller +CONFIG_CLOCK_CONTROL=n + +# Serial Drivers +CONFIG_SERIAL=y + +# WATCHDOG configuration +CONFIG_WATCHDOG=y + +# BBRAM +CONFIG_BBRAM=y diff --git a/zephyr/projects/nissa/include/gpio_map.h b/zephyr/boards/riscv/it8xxx2/it81302bx.dts index e99bf2c131..d2c892f735 100644 --- a/zephyr/projects/nissa/include/gpio_map.h +++ b/zephyr/boards/riscv/it8xxx2/it81302bx.dts @@ -1,4 +1,8 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ + +/dts-v1/; + +#include "it8xxx2.dts" diff --git a/zephyr/boards/riscv/it8xxx2/it81302bx_defconfig b/zephyr/boards/riscv/it8xxx2/it81302bx_defconfig new file mode 100644 index 0000000000..2841b9663c --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it81302bx_defconfig @@ -0,0 +1,39 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y +CONFIG_SOC_IT8XXX2=y +CONFIG_SOC_IT81302_BX=y + +# Platform Configuration +CONFIG_BOARD_IT8XXX2=y + +# ADC +CONFIG_ADC=y +CONFIG_ADC_SHELL=n + +# Power Management +CONFIG_PM=y +CONFIG_PM_DEVICE=y +CONFIG_PM_POLICY_CUSTOM=y + +# Console +CONFIG_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y + +# Clock Controller +CONFIG_CLOCK_CONTROL=n + +# Serial Drivers +CONFIG_SERIAL=y + +# WATCHDOG configuration +CONFIG_WATCHDOG=y + +# BBRAM +CONFIG_BBRAM=y diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts index 405d8f7a3e..640efd1433 100644 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig b/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig deleted file mode 100644 index 740910d5ab..0000000000 --- a/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig +++ /dev/null @@ -1,78 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Zephyr Kernel Configuration -CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y -CONFIG_SOC_IT8XXX2=y - -# Platform Configuration -CONFIG_BOARD_IT8XXX2=y - -# Power Management -CONFIG_PM=y -CONFIG_PM_DEVICE=y -CONFIG_PM_POLICY_CUSTOM=y - -# Console -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y -CONFIG_UART_NS16550=y -CONFIG_SHELL_TAB=y -CONFIG_SHELL_TAB_AUTOCOMPLETION=y -CONFIG_SHELL_HISTORY=y - -# GPIO Controller -CONFIG_GPIO=y -CONFIG_GPIO_ITE_IT8XXX2=y -# For IT81202, the GPIO group k/l are not brought out to pins, -# so by default they can be set to pull down inputs. -# However with the IT81302, they are available on pins, -# and should not be set to pull down inputs by default. -CONFIG_SOC_IT8XXX2_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN=n - -# ADC Driver -CONFIG_ADC_ITE_IT8XXX2=y -CONFIG_PLATFORM_EC_ADC=y -CONFIG_PLATFORM_EC_ADC_RESOLUTION=10 - -# Clock configuration -CONFIG_CLOCK_CONTROL=y -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768 -CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768 - -# Hook tick -CONFIG_CROS_EC_HOOK_TICK_INTERVAL=500000 - -# Flash -CONFIG_PLATFORM_EC_CONSOLE_CMD_FLASH=y -CONFIG_SOC_FLASH_ITE_IT8XXX2=y - -# I2C -CONFIG_I2C=y -CONFIG_I2C_ITE_IT8XXX2=y - -# Power Button -CONFIG_PLATFORM_EC_POWER_BUTTON=y - -# PWM -CONFIG_PWM=y -CONFIG_PWM_SHELL=n -CONFIG_PWM_ITE_IT8XXX2=y - -# Serial Drivers -CONFIG_SERIAL=y -CONFIG_UART_INTERRUPT_DRIVEN=y - -# Timer configuration -CONFIG_ITE_IT8XXX2_TIMER=y - -# WATCHDOG configuration -CONFIG_WATCHDOG=y -CONFIG_PLATFORM_EC_WATCHDOG_PERIOD_MS=2500 -CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS=500 -CONFIG_WDT_ITE_REDUCE_WARNING_LEADING_TIME=y - -# BBRAM -CONFIG_BBRAM=y -CONFIG_BBRAM_IT8XXX2=y diff --git a/zephyr/cmake/bintools/gnu/target.cmake b/zephyr/cmake/bintools/gnu/target.cmake index 2ec9d075dc..13e81ed4a0 100644 --- a/zephyr/cmake/bintools/gnu/target.cmake +++ b/zephyr/cmake/bintools/gnu/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/bintools/llvm/generic.cmake b/zephyr/cmake/bintools/llvm/generic.cmake index 94b35ed51d..f85236d39c 100644 --- a/zephyr/cmake/bintools/llvm/generic.cmake +++ b/zephyr/cmake/bintools/llvm/generic.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/bintools/llvm/target.cmake b/zephyr/cmake/bintools/llvm/target.cmake index a77d459288..9e747483ae 100644 --- a/zephyr/cmake/bintools/llvm/target.cmake +++ b/zephyr/cmake/bintools/llvm/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/compiler/clang/compiler_flags.cmake b/zephyr/cmake/compiler/clang/compiler_flags.cmake index 5f97625a58..3423f1c36c 100644 --- a/zephyr/cmake/compiler/clang/compiler_flags.cmake +++ b/zephyr/cmake/compiler/clang/compiler_flags.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,6 +7,9 @@ include("${ZEPHYR_BASE}/cmake/compiler/clang/compiler_flags.cmake") # Disable -fno-freestanding. set_compiler_property(PROPERTY hosted) +# Disable position independent code. +add_compile_options(-fno-PIC) + check_set_compiler_property(APPEND PROPERTY warning_extended -Wunused-variable -Werror=unused-variable -Werror=missing-braces -Werror=sometimes-uninitialized -Werror=unused-function diff --git a/zephyr/cmake/compiler/clang/generic.cmake b/zephyr/cmake/compiler/clang/generic.cmake index aa3665ad39..b848c8bd03 100644 --- a/zephyr/cmake/compiler/clang/generic.cmake +++ b/zephyr/cmake/compiler/clang/generic.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/compiler/clang/target.cmake b/zephyr/cmake/compiler/clang/target.cmake index 6702087df5..bda3efdeae 100644 --- a/zephyr/cmake/compiler/clang/target.cmake +++ b/zephyr/cmake/compiler/clang/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/compiler/gcc/compiler_flags.cmake b/zephyr/cmake/compiler/gcc/compiler_flags.cmake index 125f909c87..adc111835e 100644 --- a/zephyr/cmake/compiler/gcc/compiler_flags.cmake +++ b/zephyr/cmake/compiler/gcc/compiler_flags.cmake @@ -1,7 +1,10 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # Zephyr cmake system looks into ${TOOLCHAIN_ROOT}, but we just send # this out to the copy in ${ZEPHYR_BASE}. include("${ZEPHYR_BASE}/cmake/compiler/gcc/compiler_flags.cmake") + +# Disable position independent code. +add_compile_options(-fno-PIC) diff --git a/zephyr/cmake/compiler/gcc/target.cmake b/zephyr/cmake/compiler/gcc/target.cmake index 5bdb6fc5f6..943ea167ca 100644 --- a/zephyr/cmake/compiler/gcc/target.cmake +++ b/zephyr/cmake/compiler/gcc/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/linker/ld/gcc/linker_flags.cmake b/zephyr/cmake/linker/ld/gcc/linker_flags.cmake new file mode 100644 index 0000000000..f71793c431 --- /dev/null +++ b/zephyr/cmake/linker/ld/gcc/linker_flags.cmake @@ -0,0 +1,7 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# GCC 11 by default emits DWARF version 5 which cannot be parsed by +# pyelftools. Can be removed once pyelftools supports v5. +add_link_options(-gdwarf-4) diff --git a/zephyr/cmake/linker/ld/linker_flags.cmake b/zephyr/cmake/linker/ld/linker_flags.cmake index c80d1d2452..d6045ba6ed 100644 --- a/zephyr/cmake/linker/ld/linker_flags.cmake +++ b/zephyr/cmake/linker/ld/linker_flags.cmake @@ -1,7 +1,11 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # Zephyr cmake system looks into ${TOOLCHAIN_ROOT}, but we just send # this out to the copy in ${ZEPHYR_BASE}. include("${ZEPHYR_BASE}/cmake/linker/ld/linker_flags.cmake") + +# There can also be compiler specific linker options, so try to include +# our version of that also. +include("${TOOLCHAIN_ROOT}/cmake/linker/${LINKER}/${COMPILER}/linker_flags.cmake" OPTIONAL) diff --git a/zephyr/cmake/linker/ld/target.cmake b/zephyr/cmake/linker/ld/target.cmake index 0e2ad1f4d7..02dd95b236 100644 --- a/zephyr/cmake/linker/ld/target.cmake +++ b/zephyr/cmake/linker/ld/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/linker/lld/linker_flags.cmake b/zephyr/cmake/linker/lld/linker_flags.cmake index 5055e4c5a4..d382bd5b60 100644 --- a/zephyr/cmake/linker/lld/linker_flags.cmake +++ b/zephyr/cmake/linker/lld/linker_flags.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/linker/lld/target.cmake b/zephyr/cmake/linker/lld/target.cmake index 1bbc6f479d..10774909a2 100644 --- a/zephyr/cmake/linker/lld/target.cmake +++ b/zephyr/cmake/linker/lld/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -21,6 +21,7 @@ macro(toolchain_ld_base) # Default flags zephyr_ld_options( ${TOOLCHAIN_LD_FLAGS} + -no-pie -Wl,--gc-sections --build-id=none) endmacro() diff --git a/zephyr/cmake/toolchain/coreboot-sdk/generic.cmake b/zephyr/cmake/toolchain/coreboot-sdk/generic.cmake index 1b86948bcd..d20f19528d 100644 --- a/zephyr/cmake/toolchain/coreboot-sdk/generic.cmake +++ b/zephyr/cmake/toolchain/coreboot-sdk/generic.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/toolchain/coreboot-sdk/target.cmake b/zephyr/cmake/toolchain/coreboot-sdk/target.cmake index 5f3d86459b..82804e6b32 100644 --- a/zephyr/cmake/toolchain/coreboot-sdk/target.cmake +++ b/zephyr/cmake/toolchain/coreboot-sdk/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/toolchain/llvm/generic.cmake b/zephyr/cmake/toolchain/llvm/generic.cmake index 6a248a13cf..933162d9bb 100644 --- a/zephyr/cmake/toolchain/llvm/generic.cmake +++ b/zephyr/cmake/toolchain/llvm/generic.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/cmake/toolchain/llvm/target.cmake b/zephyr/cmake/toolchain/llvm/target.cmake index d79d73d1ae..e6960dade5 100644 --- a/zephyr/cmake/toolchain/llvm/target.cmake +++ b/zephyr/cmake/toolchain/llvm/target.cmake @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/CMakeLists.txt b/zephyr/drivers/CMakeLists.txt index ae74955a44..38d8b3f7bb 100644 --- a/zephyr/drivers/CMakeLists.txt +++ b/zephyr/drivers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/Kconfig b/zephyr/drivers/Kconfig index 041a6cf212..0848d83939 100644 --- a/zephyr/drivers/Kconfig +++ b/zephyr/drivers/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_displight/CMakeLists.txt b/zephyr/drivers/cros_displight/CMakeLists.txt index 9f6d99ee34..5e43d5fedd 100644 --- a/zephyr/drivers/cros_displight/CMakeLists.txt +++ b/zephyr/drivers/cros_displight/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_displight/cros_displight.c b/zephyr/drivers/cros_displight/cros_displight.c index e730caf409..98d1dd0823 100644 --- a/zephyr/drivers/cros_displight/cros_displight.c +++ b/zephyr/drivers/cros_displight/cros_displight.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,7 +21,7 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, #define DISPLIGHT_PWM_NODE DT_INST_PWMS_CTLR(0) #define DISPLIGHT_PWM_CHANNEL DT_INST_PWMS_CHANNEL(0) #define DISPLIGHT_PWM_FLAGS DT_INST_PWMS_FLAGS(0) -#define DISPLIGHT_PWM_PERIOD_NS (NSEC_PER_SEC/DT_INST_PROP(0, frequency)) +#define DISPLIGHT_PWM_PERIOD_NS DT_INST_PWMS_PERIOD(0) static int displight_percent; @@ -38,8 +38,8 @@ static void displight_set_duty(int percent) pulse_ns = DIV_ROUND_NEAREST(DISPLIGHT_PWM_PERIOD_NS * percent, 100); - LOG_DBG("displight PWM %s set percent (%d), pulse %d", - pwm_dev->name, percent, pulse_ns); + LOG_DBG("displight PWM %s set percent (%d), pulse %d", pwm_dev->name, + percent, pulse_ns); rv = pwm_set(pwm_dev, DISPLIGHT_PWM_CHANNEL, DISPLIGHT_PWM_PERIOD_NS, pulse_ns, DISPLIGHT_PWM_FLAGS); diff --git a/zephyr/drivers/cros_flash/CMakeLists.txt b/zephyr/drivers/cros_flash/CMakeLists.txt index 1846d10576..fdd60a2f44 100644 --- a/zephyr/drivers/cros_flash/CMakeLists.txt +++ b/zephyr/drivers/cros_flash/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_flash/Kconfig b/zephyr/drivers/cros_flash/Kconfig index 68ed451f27..247f261cc5 100644 --- a/zephyr/drivers/cros_flash/Kconfig +++ b/zephyr/drivers/cros_flash/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c index 7be6ef86fb..4838c5d583 100644 --- a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c +++ b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -102,7 +102,7 @@ static int cros_flash_it8xxx2_init(const struct device *dev) reset_flags = system_get_reset_flags(); prot_flags = crec_flash_get_protect(); unwanted_prot_flags = EC_FLASH_PROTECT_ALL_NOW | - EC_FLASH_PROTECT_ERROR_INCONSISTENT; + EC_FLASH_PROTECT_ERROR_INCONSISTENT; /* * If we have already jumped between images, an earlier image could @@ -113,12 +113,12 @@ static int cros_flash_it8xxx2_init(const struct device *dev) if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) { /* Protect the entire flash of host interface */ - flash_protect_banks(0, - CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, + flash_protect_banks( + 0, CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, FLASH_WP_HOST); /* Protect the entire flash of DBGR interface */ - flash_protect_banks(0, - CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, + flash_protect_banks( + 0, CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, FLASH_WP_DBGR); /* * Write protect is asserted. If we want RO flash protected, @@ -126,8 +126,9 @@ static int cros_flash_it8xxx2_init(const struct device *dev) */ if ((prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT) && !(prot_flags & EC_FLASH_PROTECT_RO_NOW)) { - int rv = crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW, - EC_FLASH_PROTECT_RO_NOW); + int rv = + crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW, + EC_FLASH_PROTECT_RO_NOW); if (rv) return rv; @@ -206,13 +207,13 @@ static int cros_flash_it8xxx2_erase(const struct device *dev, int offset, * during erasing. */ if (IS_ENABLED(HAS_TASK_HOSTCMD) && - IS_ENABLED(CONFIG_HOST_COMMAND_STATUS)) { + IS_ENABLED(CONFIG_HOST_COMMAND_STATUS)) { irq_enable(DT_IRQN(DT_NODELABEL(shi))); } /* Always use sector erase command */ for (; size > 0; size -= CONFIG_FLASH_ERASE_SIZE) { ret = flash_erase(flash_controller, offset, - CONFIG_FLASH_ERASE_SIZE); + CONFIG_FLASH_ERASE_SIZE); if (ret) break; @@ -273,17 +274,16 @@ static int cros_flash_it8xxx2_protect_now(const struct device *dev, int all) if (all) { /* Protect the entire flash */ - flash_protect_banks(0, - CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, + flash_protect_banks( + 0, CONFIG_FLASH_SIZE_BYTES / CONFIG_FLASH_BANK_SIZE, FLASH_WP_EC); data->all_protected = 1; } else { /* Protect the read-only section and persistent state */ - flash_protect_banks(WP_BANK_OFFSET, - WP_BANK_COUNT, FLASH_WP_EC); + flash_protect_banks(WP_BANK_OFFSET, WP_BANK_COUNT, FLASH_WP_EC); #ifdef PSTATE_BANK - flash_protect_banks(PSTATE_BANK, - PSTATE_BANK_COUNT, FLASH_WP_EC); + flash_protect_banks(PSTATE_BANK, PSTATE_BANK_COUNT, + FLASH_WP_EC); #endif } diff --git a/zephyr/drivers/cros_flash/cros_flash_npcx.c b/zephyr/drivers/cros_flash/cros_flash_npcx.c index e0ffe9f348..032bb5906c 100644 --- a/zephyr/drivers/cros_flash/cros_flash_npcx.c +++ b/zephyr/drivers/cros_flash/cros_flash_npcx.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/drivers/cros_flash/cros_flash_xec.c b/zephyr/drivers/cros_flash/cros_flash_xec.c index 2424c2a499..2b92eae25b 100644 --- a/zephyr/drivers/cros_flash/cros_flash_xec.c +++ b/zephyr/drivers/cros_flash/cros_flash_xec.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -184,7 +184,7 @@ static int cros_flash_xec_set_status_reg(const struct device *dev, } static int cros_flash_xec_write_protection_set(const struct device *dev, - bool enable) + bool enable) { int ret = 0; @@ -303,8 +303,7 @@ static int flash_set_status_for_prot(const struct device *dev, int reg1) flash_set_status(dev, reg1); - spi_flash_reg_to_protect(reg1, 0, &addr_prot_start, - &addr_prot_length); + spi_flash_reg_to_protect(reg1, 0, &addr_prot_start, &addr_prot_length); return EC_SUCCESS; } @@ -392,7 +391,6 @@ static int cros_flash_xec_init(const struct device *dev) return 0; } - static int cros_flash_xec_write(const struct device *dev, int offset, int size, const char *src_data) { @@ -524,7 +522,7 @@ static int cros_flash_xec_protect_now(const struct device *dev, int all) } static int cros_flash_xec_get_jedec_id(const struct device *dev, - uint8_t *manufacturer, uint16_t *device) + uint8_t *manufacturer, uint16_t *device) { int ret; uint8_t jedec_id[3]; @@ -546,7 +544,7 @@ static int cros_flash_xec_get_jedec_id(const struct device *dev, } static int cros_flash_xec_get_status(const struct device *dev, uint8_t *sr1, - uint8_t *sr2) + uint8_t *sr2) { flash_get_status(dev, sr1); *sr2 = 0; diff --git a/zephyr/drivers/cros_kb_raw/CMakeLists.txt b/zephyr/drivers/cros_kb_raw/CMakeLists.txt index 0b51057dbf..680b15342e 100644 --- a/zephyr/drivers/cros_kb_raw/CMakeLists.txt +++ b/zephyr/drivers/cros_kb_raw/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_kb_raw/Kconfig b/zephyr/drivers/cros_kb_raw/Kconfig index 682c7843b9..1055c8a4b2 100644 --- a/zephyr/drivers/cros_kb_raw/Kconfig +++ b/zephyr/drivers/cros_kb_raw/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c index 49c80b2211..fdbc8ee30d 100644 --- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c +++ b/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -120,7 +120,7 @@ static int cros_kb_raw_ite_drive_column(const struct device *dev, int col) * we are using). */ inst->KBS_KSOH1 = ((inst->KBS_KSOH1) & ~KSOH_PIN_MASK) | - ((mask >> 8) & KSOH_PIN_MASK); + ((mask >> 8) & KSOH_PIN_MASK); /* restore interrupts */ irq_unlock(key); @@ -208,7 +208,7 @@ static int cros_kb_raw_ite_init(const struct device *dev) */ if (IS_ENABLED(CONFIG_LOG)) { if (config->wuc_map_list[i].wucs != - config->wuc_map_list[0].wucs) { + config->wuc_map_list[0].wucs) { LOG_ERR("KSI%d isn't in the same wuc node!", i); } } diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c index cc60794d24..c720f4b431 100644 --- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c +++ b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_xec.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_xec.c index 31dcfdd29d..797377f84f 100644 --- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_xec.c +++ b/zephyr/drivers/cros_kb_raw/cros_kb_raw_xec.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -103,7 +103,7 @@ static int cros_kb_raw_xec_drive_column(const struct device *dev, int col) /* Drive all lines to low for detection any key press */ else if (col == KEYBOARD_COLUMN_ALL) { mchp_soc_ecia_girq_src_dis(MCHP_GIRQ21_ID, - MCHP_KEYSCAN_GIRQ_POS); + MCHP_KEYSCAN_GIRQ_POS); inst->KSO_SEL = MCHP_KSCAN_KSO_ALL; /* Set logical level low on COL2 */ cros_kb_raw_set_col2(0); @@ -122,7 +122,7 @@ static int cros_kb_raw_xec_drive_column(const struct device *dev, int col) kb_raw_xec_clr_src(dev); } mchp_soc_ecia_girq_src_en(MCHP_GIRQ21_ID, - MCHP_KEYSCAN_GIRQ_POS); + MCHP_KEYSCAN_GIRQ_POS); } /* Drive one line to low for determining * which key's state changed. @@ -164,7 +164,7 @@ static int cros_kb_raw_xec_init(const struct device *dev) /* Set up Kscan IRQ and ISR */ IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), - cros_kb_raw_xec_ksi_isr, DEVICE_DT_INST_GET(0), 0); + cros_kb_raw_xec_ksi_isr, DEVICE_DT_INST_GET(0), 0); /* Disable Kscan NVIC and source interrupts */ irq_disable(cfg->irq); diff --git a/zephyr/drivers/cros_kblight/CMakeLists.txt b/zephyr/drivers/cros_kblight/CMakeLists.txt index a9e8516f85..6371370b65 100644 --- a/zephyr/drivers/cros_kblight/CMakeLists.txt +++ b/zephyr/drivers/cros_kblight/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_kblight/pwm_kblight.c b/zephyr/drivers/cros_kblight/pwm_kblight.c index b57adff26d..59b4ef20ef 100644 --- a/zephyr/drivers/cros_kblight/pwm_kblight.c +++ b/zephyr/drivers/cros_kblight/pwm_kblight.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,7 +21,7 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, #define KBLIGHT_PWM_NODE DT_INST_PWMS_CTLR(0) #define KBLIGHT_PWM_CHANNEL DT_INST_PWMS_CHANNEL(0) #define KBLIGHT_PWM_FLAGS DT_INST_PWMS_FLAGS(0) -#define KBLIGHT_PWM_PERIOD_NS (NSEC_PER_SEC/DT_INST_PROP(0, frequency)) +#define KBLIGHT_PWM_PERIOD_NS DT_INST_PWMS_PERIOD(0) static bool kblight_enabled; static int kblight_percent; @@ -39,8 +39,8 @@ static void kblight_pwm_set_duty(int percent) pulse_ns = DIV_ROUND_NEAREST(KBLIGHT_PWM_PERIOD_NS * percent, 100); - LOG_DBG("kblight PWM %s set percent (%d), pulse %d", - pwm_dev->name, percent, pulse_ns); + LOG_DBG("kblight PWM %s set percent (%d), pulse %d", pwm_dev->name, + percent, pulse_ns); rv = pwm_set(pwm_dev, KBLIGHT_PWM_CHANNEL, KBLIGHT_PWM_PERIOD_NS, pulse_ns, KBLIGHT_PWM_FLAGS); diff --git a/zephyr/drivers/cros_rtc/CMakeLists.txt b/zephyr/drivers/cros_rtc/CMakeLists.txt index bfec8b9ad5..d9ae577254 100644 --- a/zephyr/drivers/cros_rtc/CMakeLists.txt +++ b/zephyr/drivers/cros_rtc/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_rtc/Kconfig b/zephyr/drivers/cros_rtc/Kconfig index 50a4d00022..2839b03c62 100644 --- a/zephyr/drivers/cros_rtc/Kconfig +++ b/zephyr/drivers/cros_rtc/Kconfig @@ -1,8 +1,8 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -if PLATFORM_EC_RTC +if PLATFORM_EC_RTC && !ARCH_POSIX choice CROS_RTC_TYPE prompt "Select the RTC to use" diff --git a/zephyr/drivers/cros_rtc/cros_rtc_xec.c b/zephyr/drivers/cros_rtc/cros_rtc_xec.c index ec8e0e6d07..c543aab6af 100644 --- a/zephyr/drivers/cros_rtc/cros_rtc_xec.c +++ b/zephyr/drivers/cros_rtc/cros_rtc_xec.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -123,7 +123,7 @@ static const struct cros_rtc_xec_config cros_rtc_xec_cfg_0 = { static struct cros_rtc_xec_data cros_rtc_xec_data_0; -DEVICE_DT_INST_DEFINE(0, cros_rtc_xec_init, NULL, - &cros_rtc_xec_data_0, &cros_rtc_xec_cfg_0, POST_KERNEL, +DEVICE_DT_INST_DEFINE(0, cros_rtc_xec_init, NULL, &cros_rtc_xec_data_0, + &cros_rtc_xec_cfg_0, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &cros_rtc_xec_driver_api); diff --git a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c index e7821c1dac..c5580eaeef 100644 --- a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c +++ b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -58,12 +58,12 @@ static int pcf85063a_read_time_regs(const struct device *dev, bool is_alarm) num_reg = NUM_TIMER_REGS; } - return i2c_burst_read(config->bus, - config->i2c_addr_flags, start_reg, data->time_reg, num_reg); + return i2c_burst_read(config->bus, config->i2c_addr_flags, start_reg, + data->time_reg, num_reg); } -static int pcf85063a_read_reg(const struct device *dev, - uint8_t reg, uint8_t *val) +static int pcf85063a_read_reg(const struct device *dev, uint8_t reg, + uint8_t *val) { const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev); @@ -95,13 +95,12 @@ static int pcf85063a_write_time_regs(const struct device *dev, bool is_alarm) tx_buf[i] = data->time_reg[i]; } - return i2c_burst_write(config->bus, - config->i2c_addr_flags, start_reg, tx_buf, num_reg); + return i2c_burst_write(config->bus, config->i2c_addr_flags, start_reg, + tx_buf, num_reg); } - -static int pcf85063a_write_reg(const struct device *dev, - uint8_t reg, uint8_t val) +static int pcf85063a_write_reg(const struct device *dev, uint8_t reg, + uint8_t val) { const struct nxp_rtc_pcf85063a_config *const config = DRV_CONFIG(dev); uint8_t tx_buf[2]; @@ -109,8 +108,8 @@ static int pcf85063a_write_reg(const struct device *dev, tx_buf[0] = reg; tx_buf[1] = val; - return i2c_write(config->bus, - tx_buf, sizeof(tx_buf), config->i2c_addr_flags); + return i2c_write(config->bus, tx_buf, sizeof(tx_buf), + config->i2c_addr_flags); } /* @@ -138,7 +137,7 @@ static uint8_t dec_to_bcd(uint32_t val, enum bcd_mask mask) } static int nxp_rtc_pcf85063a_read_seconds(const struct device *dev, - uint32_t *value, bool is_alarm) + uint32_t *value, bool is_alarm) { struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev); struct calendar_date time; @@ -152,31 +151,30 @@ static int nxp_rtc_pcf85063a_read_seconds(const struct device *dev, if (is_alarm) { *value = (bcd_to_dec(data->time_reg[DAYS], DAYS_MASK) * - SECS_PER_DAY) + - (bcd_to_dec(data->time_reg[HOURS], HOURS24_MASK) * - SECS_PER_HOUR) + - (bcd_to_dec(data->time_reg[MINUTES], MINUTES_MASK) * - SECS_PER_MINUTE) + - bcd_to_dec(data->time_reg[SECONDS], SECONDS_MASK); + SECS_PER_DAY) + + (bcd_to_dec(data->time_reg[HOURS], HOURS24_MASK) * + SECS_PER_HOUR) + + (bcd_to_dec(data->time_reg[MINUTES], MINUTES_MASK) * + SECS_PER_MINUTE) + + bcd_to_dec(data->time_reg[SECONDS], SECONDS_MASK); } else { time.year = bcd_to_dec(data->time_reg[YEARS], YEARS_MASK); - time.month = - bcd_to_dec(data->time_reg[MONTHS], MONTHS_MASK); + time.month = bcd_to_dec(data->time_reg[MONTHS], MONTHS_MASK); time.day = bcd_to_dec(data->time_reg[DAYS], DAYS_MASK); *value = date_to_sec(time) - SECS_TILL_YEAR_2K + - (bcd_to_dec(data->time_reg[HOURS], HOURS24_MASK) * - SECS_PER_HOUR) + - (bcd_to_dec(data->time_reg[MINUTES], MINUTES_MASK) * - SECS_PER_MINUTE) + - bcd_to_dec(data->time_reg[SECONDS], SECONDS_MASK); + (bcd_to_dec(data->time_reg[HOURS], HOURS24_MASK) * + SECS_PER_HOUR) + + (bcd_to_dec(data->time_reg[MINUTES], MINUTES_MASK) * + SECS_PER_MINUTE) + + bcd_to_dec(data->time_reg[SECONDS], SECONDS_MASK); } return ret; } static int nxp_rtc_pcf85063a_write_seconds(const struct device *dev, - uint32_t value, bool is_alarm) + uint32_t value, bool is_alarm) { struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev); struct calendar_date time; @@ -186,8 +184,7 @@ static int nxp_rtc_pcf85063a_write_seconds(const struct device *dev, if (!is_alarm) { data->time_reg[YEARS] = dec_to_bcd(time.year, YEARS_MASK); - data->time_reg[MONTHS] = - dec_to_bcd(time.month, MONTHS_MASK); + data->time_reg[MONTHS] = dec_to_bcd(time.month, MONTHS_MASK); } data->time_reg[DAYS] = dec_to_bcd(time.day, DAYS_MASK); @@ -223,7 +220,7 @@ static int nxp_rtc_pcf85063a_write_seconds(const struct device *dev, } static int nxp_rtc_pcf85063a_configure(const struct device *dev, - cros_rtc_alarm_callback_t callback) + cros_rtc_alarm_callback_t callback) { struct nxp_rtc_pcf85063a_data *data = DRV_DATA(dev); @@ -237,7 +234,7 @@ static int nxp_rtc_pcf85063a_configure(const struct device *dev, } static int nxp_rtc_pcf85063a_get_value(const struct device *dev, - uint32_t *value) + uint32_t *value) { return nxp_rtc_pcf85063a_read_seconds(dev, value, false); } @@ -248,7 +245,8 @@ static int nxp_rtc_pcf85063a_set_value(const struct device *dev, uint32_t value) } static int nxp_rtc_pcf85063a_get_alarm(const struct device *dev, - uint32_t *seconds, uint32_t *microseconds) + uint32_t *seconds, + uint32_t *microseconds) { *microseconds = 0; return nxp_rtc_pcf85063a_read_seconds(dev, seconds, true); @@ -275,7 +273,7 @@ static int nxp_rtc_pcf85063a_reset_alarm(const struct device *dev) } static int nxp_rtc_pcf85063a_set_alarm(const struct device *dev, - uint32_t seconds, uint32_t microseconds) + uint32_t seconds, uint32_t microseconds) { int ret; @@ -297,7 +295,7 @@ static int nxp_rtc_pcf85063a_set_alarm(const struct device *dev, } static void nxp_pcf85063a_isr(const struct device *port, - struct gpio_callback *cb, uint32_t pin) + struct gpio_callback *cb, uint32_t pin) { struct nxp_rtc_pcf85063a_data *data = CONTAINER_OF(cb, struct nxp_rtc_pcf85063a_data, gpio_cb); @@ -400,8 +398,8 @@ static int nxp_rtc_pcf85063a_init(const struct device *dev) return ret; } - gpio_init_callback(&data->gpio_cb, - nxp_pcf85063a_isr, BIT(config->gpio_alert.pin)); + gpio_init_callback(&data->gpio_cb, nxp_pcf85063a_isr, + BIT(config->gpio_alert.pin)); ret = gpio_add_callback(config->gpio_alert.port, &data->gpio_cb); @@ -416,8 +414,7 @@ static int nxp_rtc_pcf85063a_init(const struct device *dev) GPIO_INT_EDGE_FALLING); } -#define PCF85063A_INT_GPIOS \ - DT_PHANDLE(DT_NODELABEL(pcf85063a), int_pin) +#define PCF85063A_INT_GPIOS DT_PHANDLE(DT_NODELABEL(pcf85063a), int_pin) /* * dt_flags is a uint8_t type. However, for platform/ec @@ -426,19 +423,17 @@ static int nxp_rtc_pcf85063a_init(const struct device *dev) * Cast back to a gpio_dt_flags to compile, discarding the bits * that are not supported by the Zephyr GPIO API. */ -#define CROS_EC_GPIO_DT_SPEC_GET(node_id, prop) \ - { \ - .port = DEVICE_DT_GET(DT_GPIO_CTLR(node_id, prop)), \ - .pin = DT_GPIO_PIN(node_id, prop), \ - .dt_flags = \ - (gpio_dt_flags_t)DT_GPIO_FLAGS(node_id, prop), \ +#define CROS_EC_GPIO_DT_SPEC_GET(node_id, prop) \ + { \ + .port = DEVICE_DT_GET(DT_GPIO_CTLR(node_id, prop)), \ + .pin = DT_GPIO_PIN(node_id, prop), \ + .dt_flags = (gpio_dt_flags_t)DT_GPIO_FLAGS(node_id, prop), \ } static const struct nxp_rtc_pcf85063a_config nxp_rtc_pcf85063a_cfg_0 = { .bus = DEVICE_DT_GET(DT_INST_BUS(0)), .i2c_addr_flags = DT_INST_REG_ADDR(0), - .gpio_alert = - CROS_EC_GPIO_DT_SPEC_GET(PCF85063A_INT_GPIOS, gpios) + .gpio_alert = CROS_EC_GPIO_DT_SPEC_GET(PCF85063A_INT_GPIOS, gpios) }; static struct nxp_rtc_pcf85063a_data nxp_rtc_pcf85063a_data_0; diff --git a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h index dc4fcd24fc..54b1fbd2ea 100644 --- a/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h +++ b/zephyr/drivers/cros_rtc/nxp_rtc_pcf85063a.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,53 +6,53 @@ #ifndef __CROS_EC_RTC_PCF85063A_H #define __CROS_EC_RTC_PCF85063A_H -#define PCF85063A_REG_NUM 18 -#define SOFT_RESET 0x58 +#define PCF85063A_REG_NUM 18 +#define SOFT_RESET 0x58 #define CONTROL_1_DEFAULT_VALUE 0 -#define OS_BIT 0x80 -#define DISABLE_ALARM 0x80 -#define ENABLE_ALARM_INTERRUPT 0x80 -#define RTC_STOP_CLOCKS 0x20 -#define RTC_START_CLOCKS 0x00 +#define OS_BIT 0x80 +#define DISABLE_ALARM 0x80 +#define ENABLE_ALARM_INTERRUPT 0x80 +#define RTC_STOP_CLOCKS 0x20 +#define RTC_START_CLOCKS 0x00 -#define NUM_TIMER_REGS 7 -#define NUM_ALARM_REGS 4 +#define NUM_TIMER_REGS 7 +#define NUM_ALARM_REGS 4 -#define REG_CONTROL_1 0x00 -#define REG_CONTROL_2 0x01 -#define REG_OFFSET 0x02 -#define REG_RAM_BYTE 0x03 -#define REG_SECONDS 0x04 -#define REG_MINUTES 0x05 -#define REG_HOURS 0x06 -#define REG_DAYS 0x07 -#define REG_WEEKDAYS 0x08 -#define REG_MONTHS 0x09 -#define REG_YEARS 0x0a -#define REG_SECOND_ALARM 0x0b -#define REG_MINUTE_ALARM 0x0c -#define REG_HOUR_ALARM 0x0d -#define REG_DAY_ALARM 0x0e -#define REG_WEEKDAY_ALARM 0x0f -#define REG_TIMER_VALUE 0x10 -#define REG_TIMER_MODE 0x11 +#define REG_CONTROL_1 0x00 +#define REG_CONTROL_2 0x01 +#define REG_OFFSET 0x02 +#define REG_RAM_BYTE 0x03 +#define REG_SECONDS 0x04 +#define REG_MINUTES 0x05 +#define REG_HOURS 0x06 +#define REG_DAYS 0x07 +#define REG_WEEKDAYS 0x08 +#define REG_MONTHS 0x09 +#define REG_YEARS 0x0a +#define REG_SECOND_ALARM 0x0b +#define REG_MINUTE_ALARM 0x0c +#define REG_HOUR_ALARM 0x0d +#define REG_DAY_ALARM 0x0e +#define REG_WEEKDAY_ALARM 0x0f +#define REG_TIMER_VALUE 0x10 +#define REG_TIMER_MODE 0x11 /* Macros for indexing time_reg buffer */ -#define SECONDS 0 -#define MINUTES 1 -#define HOURS 2 -#define DAYS 3 -#define WEEKDAYS 4 -#define MONTHS 5 -#define YEARS 6 +#define SECONDS 0 +#define MINUTES 1 +#define HOURS 2 +#define DAYS 3 +#define WEEKDAYS 4 +#define MONTHS 5 +#define YEARS 6 enum bcd_mask { SECONDS_MASK = 0x70, MINUTES_MASK = 0x70, HOURS24_MASK = 0x30, - DAYS_MASK = 0x30, - MONTHS_MASK = 0x10, - YEARS_MASK = 0xf0 + DAYS_MASK = 0x30, + MONTHS_MASK = 0x10, + YEARS_MASK = 0xf0 }; #endif /* __CROS_EC_RTC_PCF85063A_H */ diff --git a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c index 661268ee9b..7a9a11fd41 100644 --- a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c +++ b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -43,8 +43,8 @@ enum timer_type { * type == RTC_TIMER: Reads time registers SECONDS, MINUTES, HOURS, DAYS, and * MONTHS, YEARS */ -static int idt1337ag_read_time_regs(const struct device *dev, - uint8_t *time_reg, enum timer_type type) +static int idt1337ag_read_time_regs(const struct device *dev, uint8_t *time_reg, + enum timer_type type) { const struct renesas_rtc_idt1337ag_config *const config = dev->config; uint8_t start_reg; @@ -58,12 +58,12 @@ static int idt1337ag_read_time_regs(const struct device *dev, num_reg = NUM_TIMER_REGS; } - return i2c_burst_read(config->bus, - config->i2c_addr_flags, start_reg, time_reg, num_reg); + return i2c_burst_read(config->bus, config->i2c_addr_flags, start_reg, + time_reg, num_reg); } -static int idt1337ag_read_reg(const struct device *dev, - uint8_t reg, uint8_t *val) +static int idt1337ag_read_reg(const struct device *dev, uint8_t reg, + uint8_t *val) { const struct renesas_rtc_idt1337ag_config *const config = dev->config; @@ -97,12 +97,12 @@ static int idt1337ag_write_time_regs(const struct device *dev, num_reg = NUM_TIMER_REGS; } - return i2c_burst_write(config->bus, - config->i2c_addr_flags, start_reg, time_reg, num_reg); + return i2c_burst_write(config->bus, config->i2c_addr_flags, start_reg, + time_reg, num_reg); } -static int idt1337ag_write_reg(const struct device *dev, - uint8_t reg, uint8_t val) +static int idt1337ag_write_reg(const struct device *dev, uint8_t reg, + uint8_t val) { const struct renesas_rtc_idt1337ag_config *const config = dev->config; uint8_t tx_buf[2]; @@ -110,8 +110,8 @@ static int idt1337ag_write_reg(const struct device *dev, tx_buf[0] = reg; tx_buf[1] = val; - return i2c_write(config->bus, - tx_buf, sizeof(tx_buf), config->i2c_addr_flags); + return i2c_write(config->bus, tx_buf, sizeof(tx_buf), + config->i2c_addr_flags); } /* @@ -139,7 +139,8 @@ static uint8_t dec_to_bcd(uint32_t val, enum bcd_mask mask) } static int renesas_rtc_idt1337ag_read_seconds(const struct device *dev, - uint32_t *value, enum timer_type type) + uint32_t *value, + enum timer_type type) { uint8_t time_reg[NUM_TIMER_REGS]; struct calendar_date time; @@ -152,12 +153,12 @@ static int renesas_rtc_idt1337ag_read_seconds(const struct device *dev, } if (type == ALARM_TIMER) { - *value = (bcd_to_dec(time_reg[DAYS], DAYS_MASK) * - SECS_PER_DAY) + + *value = + (bcd_to_dec(time_reg[DAYS], DAYS_MASK) * SECS_PER_DAY) + (bcd_to_dec(time_reg[HOURS], HOURS24_MASK) * - SECS_PER_HOUR) + + SECS_PER_HOUR) + (bcd_to_dec(time_reg[MINUTES], MINUTES_MASK) * - SECS_PER_MINUTE) + + SECS_PER_MINUTE) + bcd_to_dec(time_reg[SECONDS], SECONDS_MASK); } else { time.year = bcd_to_dec(time_reg[YEARS], YEARS_MASK); @@ -165,18 +166,19 @@ static int renesas_rtc_idt1337ag_read_seconds(const struct device *dev, time.day = bcd_to_dec(time_reg[DAYS], DAYS_MASK); *value = date_to_sec(time) - SECS_TILL_YEAR_2K + - (bcd_to_dec(time_reg[HOURS], HOURS24_MASK) * - SECS_PER_HOUR) + - (bcd_to_dec(time_reg[MINUTES], MINUTES_MASK) * - SECS_PER_MINUTE) + - bcd_to_dec(time_reg[SECONDS], SECONDS_MASK); + (bcd_to_dec(time_reg[HOURS], HOURS24_MASK) * + SECS_PER_HOUR) + + (bcd_to_dec(time_reg[MINUTES], MINUTES_MASK) * + SECS_PER_MINUTE) + + bcd_to_dec(time_reg[SECONDS], SECONDS_MASK); } return ret; } static int renesas_rtc_idt1337ag_write_seconds(const struct device *dev, - uint32_t value, enum timer_type type) + uint32_t value, + enum timer_type type) { uint8_t time_reg[NUM_TIMER_REGS]; struct calendar_date time; @@ -206,7 +208,7 @@ static int renesas_rtc_idt1337ag_write_seconds(const struct device *dev, } static int renesas_rtc_idt1337ag_configure(const struct device *dev, - cros_rtc_alarm_callback_t callback) + cros_rtc_alarm_callback_t callback) { struct renesas_rtc_idt1337ag_data *data = dev->data; @@ -232,7 +234,8 @@ static int renesas_rtc_idt1337ag_set_value(const struct device *dev, } static int renesas_rtc_idt1337ag_get_alarm(const struct device *dev, - uint32_t *seconds, uint32_t *microseconds) + uint32_t *seconds, + uint32_t *microseconds) { *microseconds = 0; return renesas_rtc_idt1337ag_read_seconds(dev, seconds, ALARM_TIMER); @@ -283,7 +286,8 @@ static int renesas_rtc_idt1337ag_reset_alarm(const struct device *dev) } static int renesas_rtc_idt1337ag_set_alarm(const struct device *dev, - uint32_t seconds, uint32_t microseconds) + uint32_t seconds, + uint32_t microseconds) { int ret; uint8_t val; @@ -429,8 +433,8 @@ static int renesas_rtc_idt1337ag_init(const struct device *dev) return ret; } - gpio_init_callback(&data->gpio_cb, - renesas_rtc_idt1337ag_isr, BIT(config->gpio_alert.pin)); + gpio_init_callback(&data->gpio_cb, renesas_rtc_idt1337ag_isr, + BIT(config->gpio_alert.pin)); ret = gpio_add_callback(config->gpio_alert.port, &data->gpio_cb); @@ -445,8 +449,7 @@ static int renesas_rtc_idt1337ag_init(const struct device *dev) GPIO_INT_EDGE_FALLING); } -#define IDT1337AG_INT_PIN \ - DT_PHANDLE(DT_NODELABEL(idt1337ag), int_pin) +#define IDT1337AG_INT_PIN DT_PHANDLE(DT_NODELABEL(idt1337ag), int_pin) /* * dt_flags is a uint8_t type. However, for platform/ec @@ -455,12 +458,11 @@ static int renesas_rtc_idt1337ag_init(const struct device *dev) * Cast back to a gpio_dt_flags to compile, discarding the bits * that are not supported by the Zephyr GPIO API. */ -#define CROS_EC_GPIO_DT_SPEC_GET(node_id, prop) \ - { \ - .port = DEVICE_DT_GET(DT_GPIO_CTLR(node_id, prop)), \ - .pin = DT_GPIO_PIN(node_id, prop), \ - .dt_flags = \ - (gpio_dt_flags_t)DT_GPIO_FLAGS(node_id, prop), \ +#define CROS_EC_GPIO_DT_SPEC_GET(node_id, prop) \ + { \ + .port = DEVICE_DT_GET(DT_GPIO_CTLR(node_id, prop)), \ + .pin = DT_GPIO_PIN(node_id, prop), \ + .dt_flags = (gpio_dt_flags_t)DT_GPIO_FLAGS(node_id, prop), \ } static const struct renesas_rtc_idt1337ag_config renesas_rtc_idt1337ag_cfg_0 = { @@ -473,6 +475,6 @@ static struct renesas_rtc_idt1337ag_data renesas_rtc_idt1337ag_data_0; DEVICE_DT_INST_DEFINE(0, renesas_rtc_idt1337ag_init, /* pm_control_fn= */ NULL, &renesas_rtc_idt1337ag_data_0, - &renesas_rtc_idt1337ag_cfg_0, - POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, + &renesas_rtc_idt1337ag_cfg_0, POST_KERNEL, + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &renesas_rtc_idt1337ag_driver_api); diff --git a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h index 3296f80992..9dd195e8c3 100644 --- a/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h +++ b/zephyr/drivers/cros_rtc/renesas_rtc_idt1337ag.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,54 +7,54 @@ #define __CROS_EC_RTC_IDT1337AG_H /* Setting bit 6 of register 0Ah selects the DAY as alarm source */ -#define SELECT_DAYS_ALARM 0x40 -#define DISABLE_ALARM 0x80 - -#define CONTROL_A1IE BIT(0) -#define CONTROL_A2IE BIT(1) -#define CONTROL_INTCN BIT(2) -#define CONTROL_EOSC BIT(7) - -#define STATUS_A1F BIT(0) -#define STATUS_A2F BIT(1) -#define STATUS_OSF BIT(7) - -#define NUM_TIMER_REGS 7 -#define NUM_ALARM_REGS 4 - -#define REG_SECONDS 0x00 -#define REG_MINUTES 0x01 -#define REG_HOURS 0x02 -#define REG_DAYS 0x03 -#define REG_DATE 0x04 -#define REG_MONTHS 0x05 -#define REG_YEARS 0x06 -#define REG_SECOND_ALARM1 0x07 -#define REG_MINUTE_ALARM1 0x08 -#define REG_HOUR_ALARM1 0x09 -#define REG_DAY_ALARM1 0x0a -#define REG_MINUTE_ALARM2 0x0b -#define REG_HOUR_ALARM2 0x0c -#define REG_DAY_ALARM2 0x0d -#define REG_CONTROL 0x0e -#define REG_STATUS 0x0f +#define SELECT_DAYS_ALARM 0x40 +#define DISABLE_ALARM 0x80 + +#define CONTROL_A1IE BIT(0) +#define CONTROL_A2IE BIT(1) +#define CONTROL_INTCN BIT(2) +#define CONTROL_EOSC BIT(7) + +#define STATUS_A1F BIT(0) +#define STATUS_A2F BIT(1) +#define STATUS_OSF BIT(7) + +#define NUM_TIMER_REGS 7 +#define NUM_ALARM_REGS 4 + +#define REG_SECONDS 0x00 +#define REG_MINUTES 0x01 +#define REG_HOURS 0x02 +#define REG_DAYS 0x03 +#define REG_DATE 0x04 +#define REG_MONTHS 0x05 +#define REG_YEARS 0x06 +#define REG_SECOND_ALARM1 0x07 +#define REG_MINUTE_ALARM1 0x08 +#define REG_HOUR_ALARM1 0x09 +#define REG_DAY_ALARM1 0x0a +#define REG_MINUTE_ALARM2 0x0b +#define REG_HOUR_ALARM2 0x0c +#define REG_DAY_ALARM2 0x0d +#define REG_CONTROL 0x0e +#define REG_STATUS 0x0f /* Macros for indexing time_reg buffer */ -#define SECONDS 0 -#define MINUTES 1 -#define HOURS 2 -#define DAYS 3 -#define DATE 4 -#define MONTHS 5 -#define YEARS 6 +#define SECONDS 0 +#define MINUTES 1 +#define HOURS 2 +#define DAYS 3 +#define DATE 4 +#define MONTHS 5 +#define YEARS 6 enum bcd_mask { SECONDS_MASK = 0x70, MINUTES_MASK = 0x70, HOURS24_MASK = 0x30, - DAYS_MASK = 0x00, - MONTHS_MASK = 0x10, - YEARS_MASK = 0xf0 + DAYS_MASK = 0x00, + MONTHS_MASK = 0x10, + YEARS_MASK = 0xf0 }; #endif /* __CROS_EC_RTC_IDT1337AG_H */ diff --git a/zephyr/drivers/cros_shi/CMakeLists.txt b/zephyr/drivers/cros_shi/CMakeLists.txt index f0b3c8bb5a..c4708f3551 100644 --- a/zephyr/drivers/cros_shi/CMakeLists.txt +++ b/zephyr/drivers/cros_shi/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_shi/Kconfig b/zephyr/drivers/cros_shi/Kconfig index 8ca08b6b19..ebcd937c7d 100644 --- a/zephyr/drivers/cros_shi/Kconfig +++ b/zephyr/drivers/cros_shi/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c index 3d0db3bc89..ee6ce3f7a4 100644 --- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c +++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,12 +21,12 @@ #include "host_command.h" /* Console output macros */ -#define CPRINTS(format, args...) cprints(CC_SPI, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SPI, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SPI, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SPI, format, ##args) LOG_MODULE_REGISTER(cros_shi, LOG_LEVEL_ERR); -#define DRV_CONFIG(dev) ((struct cros_shi_it8xxx2_cfg * const)(dev)->config) +#define DRV_CONFIG(dev) ((struct cros_shi_it8xxx2_cfg *const)(dev)->config) /* * Strcture cros_shi_it8xxx2_cfg is about the setting of SHI, @@ -45,8 +45,8 @@ struct cros_shi_it8xxx2_cfg { /* Max data size for a version 3 request/response packet. */ #define SPI_MAX_REQUEST_SIZE SPI_RX_MAX_FIFO_SIZE -#define SPI_MAX_RESPONSE_SIZE (SPI_TX_MAX_FIFO_SIZE - \ - EC_SPI_PREAMBLE_LENGTH - EC_SPI_PAST_END_LENGTH) +#define SPI_MAX_RESPONSE_SIZE \ + (SPI_TX_MAX_FIFO_SIZE - EC_SPI_PREAMBLE_LENGTH - EC_SPI_PAST_END_LENGTH) static const uint8_t out_preamble[EC_SPI_PREAMBLE_LENGTH] = { EC_SPI_PROCESSING, @@ -80,9 +80,9 @@ static enum shi_state_machine shi_state; static const int spi_response_state[] = { [SPI_STATE_READY_TO_RECV] = EC_SPI_RX_READY, - [SPI_STATE_RECEIVING] = EC_SPI_RECEIVING, - [SPI_STATE_PROCESSING] = EC_SPI_PROCESSING, - [SPI_STATE_RX_BAD] = EC_SPI_RX_BAD_DATA, + [SPI_STATE_RECEIVING] = EC_SPI_RECEIVING, + [SPI_STATE_PROCESSING] = EC_SPI_PROCESSING, + [SPI_STATE_RX_BAD] = EC_SPI_RX_BAD_DATA, }; BUILD_ASSERT(ARRAY_SIZE(spi_response_state) == SPI_STATE_COUNT); @@ -169,12 +169,12 @@ static void spi_send_response_packet(struct host_packet *pkt) /* Append our past-end byte, which we reserved space for. */ for (int i = 0; i < EC_SPI_PAST_END_LENGTH; i++) { - ((uint8_t *)pkt->response)[pkt->response_size + i] - = EC_SPI_PAST_END; + ((uint8_t *)pkt->response)[pkt->response_size + i] = + EC_SPI_PAST_END; } tx_size = pkt->response_size + EC_SPI_PREAMBLE_LENGTH + - EC_SPI_PAST_END_LENGTH; + EC_SPI_PAST_END_LENGTH; /* Transmit the reply */ spi_response_host_data(out_msg, tx_size); @@ -340,8 +340,8 @@ static int cros_shi_ite_init(const struct device *dev) * bit3 : Rx FIFO1 will not be overwrited once it's full. * bit0 : Rx FIFO1/FIFO2 will reset after each CS_N goes high. */ - IT83XX_SPI_GCR2 = IT83XX_SPI_RXF2OC | IT83XX_SPI_RXF1OC - | IT83XX_SPI_RXFAR; + IT83XX_SPI_GCR2 = IT83XX_SPI_RXF2OC | IT83XX_SPI_RXF1OC | + IT83XX_SPI_RXFAR; /* * Interrupt mask register (0b:Enable, 1b:Mask) * bit5 : Rx byte reach interrupt mask @@ -384,10 +384,8 @@ static const struct cros_shi_it8xxx2_cfg cros_shi_cfg = { CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY #error "CROS_SHI must initialize after the GPIOs initialization" #endif -DEVICE_DT_INST_DEFINE(0, cros_shi_ite_init, NULL, - NULL, &cros_shi_cfg, POST_KERNEL, - CONFIG_CROS_SHI_IT8XXX2_INIT_PRIORITY, - NULL); +DEVICE_DT_INST_DEFINE(0, cros_shi_ite_init, NULL, NULL, &cros_shi_cfg, + POST_KERNEL, CONFIG_CROS_SHI_IT8XXX2_INIT_PRIORITY, NULL); /* Get protocol information */ enum ec_status spi_get_protocol_info(struct host_cmd_handler_args *args) @@ -404,6 +402,5 @@ enum ec_status spi_get_protocol_info(struct host_cmd_handler_args *args) return EC_SUCCESS; } -DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO, - spi_get_protocol_info, +DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO, spi_get_protocol_info, EC_VER_MASK(0)); diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c index b236980205..ce3279288b 100644 --- a/zephyr/drivers/cros_shi/cros_shi_npcx.c +++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -810,7 +810,7 @@ static int cros_shi_npcx_disable(const struct device *dev) } ret = clock_control_off(clk_dev, - (clock_control_subsys_t *)&config->clk_cfg); + (clock_control_subsys_t *)&config->clk_cfg); if (ret < 0) { DEBUG_CPRINTF("Turn off SHI clock fail %d", ret); return ret; diff --git a/zephyr/drivers/cros_system/CMakeLists.txt b/zephyr/drivers/cros_system/CMakeLists.txt index b0d3730cbc..0838dca1ae 100644 --- a/zephyr/drivers/cros_system/CMakeLists.txt +++ b/zephyr/drivers/cros_system/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_system/Kconfig b/zephyr/drivers/cros_system/Kconfig index 3f58f0eb21..80fc701285 100644 --- a/zephyr/drivers/cros_system/Kconfig +++ b/zephyr/drivers/cros_system/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/drivers/cros_system/cros_system_it8xxx2.c b/zephyr/drivers/cros_system/cros_system_it8xxx2.c index 693b981e83..8c63886808 100644 --- a/zephyr/drivers/cros_system/cros_system_it8xxx2.c +++ b/zephyr/drivers/cros_system/cros_system_it8xxx2.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -36,8 +36,7 @@ static uint32_t system_get_chip_id(void) struct gctrl_it8xxx2_regs *const gctrl_base = GCTRL_IT8XXX2_REG_BASE; return (gctrl_base->GCTRL_ECHIPID1 << 16) | - (gctrl_base->GCTRL_ECHIPID2 << 8) | - gctrl_base->GCTRL_ECHIPID3; + (gctrl_base->GCTRL_ECHIPID2 << 8) | gctrl_base->GCTRL_ECHIPID3; } static uint8_t system_get_chip_version(void) @@ -52,26 +51,26 @@ static const char *cros_system_it8xxx2_get_chip_name(const struct device *dev) { ARG_UNUSED(dev); - static char buf[8] = {'i', 't'}; + static char buf[8] = { 'i', 't' }; uint32_t chip_id = system_get_chip_id(); int num = 4; for (int n = 2; num >= 0; n++, num--) - snprintf(buf+n, (sizeof(buf)-n), "%x", + snprintf(buf + n, (sizeof(buf) - n), "%x", chip_id >> (num * 4) & 0xF); return buf; } -static const char *cros_system_it8xxx2_get_chip_revision(const struct device - *dev) +static const char * +cros_system_it8xxx2_get_chip_revision(const struct device *dev) { ARG_UNUSED(dev); static char buf[3]; uint8_t rev = system_get_chip_version(); - snprintf(buf, sizeof(buf), "%1xx", rev+0xa); + snprintf(buf, sizeof(buf), "%1xx", rev + 0xa); return buf; } @@ -81,9 +80,10 @@ static int cros_system_it8xxx2_get_reset_cause(const struct device *dev) ARG_UNUSED(dev); struct gctrl_it8xxx2_regs *const gctrl_base = GCTRL_IT8XXX2_REG_BASE; uint8_t last_reset_source = gctrl_base->GCTRL_RSTS & IT8XXX2_GCTRL_LRS; - uint8_t raw_reset_cause2 = gctrl_base->GCTRL_SPCTRL4 & + uint8_t raw_reset_cause2 = + gctrl_base->GCTRL_SPCTRL4 & (IT8XXX2_GCTRL_LRSIWR | IT8XXX2_GCTRL_LRSIPWRSWTR | - IT8XXX2_GCTRL_LRSIPGWR); + IT8XXX2_GCTRL_LRSIPGWR); /* Clear reset cause. */ gctrl_base->GCTRL_RSTS |= IT8XXX2_GCTRL_LRS; @@ -185,8 +185,8 @@ static int cros_system_it8xxx2_hibernate(const struct device *dev, * Convert milliseconds(or at least 1 ms) to 32 Hz * free run timer count for hibernate. */ - uint32_t c = (seconds * 1000 + microseconds / 1000 + 1) * - 32 / 1000; + uint32_t c = + (seconds * 1000 + microseconds / 1000 + 1) * 32 / 1000; /* Enable a 32-bit timer and clock source is 32 Hz */ /* Disable external timer x */ @@ -205,7 +205,7 @@ static int cros_system_it8xxx2_hibernate(const struct device *dev, /* * Get the interrupt DTS node for this wakeup pin */ -#define WAKEUP_INT(id, prop, idx) DT_PHANDLE_BY_IDX(id, prop, idx) +#define WAKEUP_INT(id, prop, idx) DT_PHANDLE_BY_IDX(id, prop, idx) /* * Get the named-gpio node for this wakeup pin by reading the @@ -217,19 +217,19 @@ static int cros_system_it8xxx2_hibernate(const struct device *dev, /* * Reset and re-enable interrupts on this wake pin. */ -#define WAKEUP_SETUP(id, prop, idx) \ -do { \ - gpio_pin_configure_dt(GPIO_DT_FROM_NODE(WAKEUP_NGPIO(id, prop, idx)), \ - GPIO_INPUT); \ - gpio_enable_dt_interrupt( \ - GPIO_INT_FROM_NODE(WAKEUP_INT(id, prop, idx))); \ +#define WAKEUP_SETUP(id, prop, idx) \ + do { \ + gpio_pin_configure_dt( \ + GPIO_DT_FROM_NODE(WAKEUP_NGPIO(id, prop, idx)), \ + GPIO_INPUT); \ + gpio_enable_dt_interrupt( \ + GPIO_INT_FROM_NODE(WAKEUP_INT(id, prop, idx))); \ } while (0); -/* - * For all the wake-pins, re-init the GPIO and re-enable the interrupt. - */ - DT_FOREACH_PROP_ELEM(SYSTEM_DT_NODE_HIBERNATE_CONFIG, - wakeup_irqs, + /* + * For all the wake-pins, re-init the GPIO and re-enable the interrupt. + */ + DT_FOREACH_PROP_ELEM(SYSTEM_DT_NODE_HIBERNATE_CONFIG, wakeup_irqs, WAKEUP_SETUP); #undef WAKEUP_INT @@ -242,7 +242,7 @@ do { \ chip_pll_ctrl(CHIP_PLL_SLEEP); /* Chip sleep and wait timer wake it up */ - __asm__ volatile ("wfi"); + __asm__ volatile("wfi"); /* Reset EC when wake up from sleep mode (system hibernate) */ system_reset(SYSTEM_RESET_HIBERNATE); diff --git a/zephyr/drivers/cros_system/cros_system_npcx.c b/zephyr/drivers/cros_system/cros_system_npcx.c index 2952831cee..4ab21ca549 100644 --- a/zephyr/drivers/cros_system/cros_system_npcx.c +++ b/zephyr/drivers/cros_system/cros_system_npcx.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -82,7 +82,7 @@ struct cros_system_npcx_data { #define NPCX_RAM_BLOCK_PD_MASK (BIT(NPCX_RAM_PD_DEPTH) - 1) /* Get saved reset flag address in battery-backed ram */ -#define BBRAM_SAVED_RESET_FLAG_ADDR \ +#define BBRAM_SAVED_RESET_FLAG_ADDR \ (DT_REG_ADDR(DT_INST(0, nuvoton_npcx_bbram)) + \ DT_PROP(DT_PATH(named_bbram_regions, saved_reset_flags), offset)) @@ -90,8 +90,8 @@ struct cros_system_npcx_data { static int system_npcx_watchdog_stop(void) { if (IS_ENABLED(CONFIG_WATCHDOG)) { - const struct device *wdt_dev = DEVICE_DT_GET( - DT_NODELABEL(twd0)); + const struct device *wdt_dev = + DEVICE_DT_GET(DT_NODELABEL(twd0)); if (!device_is_ready(wdt_dev)) { LOG_ERR("Error: device %s is not ready", wdt_dev->name); return -ENODEV; @@ -182,7 +182,7 @@ static void system_npcx_set_wakeup_gpios_before_hibernate(void) /* * Get the interrupt DTS node for this wakeup pin */ -#define WAKEUP_INT(id, prop, idx) DT_PHANDLE_BY_IDX(id, prop, idx) +#define WAKEUP_INT(id, prop, idx) DT_PHANDLE_BY_IDX(id, prop, idx) /* * Get the named-gpio node for this wakeup pin by reading the @@ -194,19 +194,19 @@ static void system_npcx_set_wakeup_gpios_before_hibernate(void) /* * Reset and re-enable interrupts on this wake pin. */ -#define WAKEUP_SETUP(id, prop, idx) \ -do { \ - gpio_pin_configure_dt(GPIO_DT_FROM_NODE(WAKEUP_NGPIO(id, prop, idx)), \ - GPIO_INPUT); \ - gpio_enable_dt_interrupt( \ - GPIO_INT_FROM_NODE(WAKEUP_INT(id, prop, idx))); \ +#define WAKEUP_SETUP(id, prop, idx) \ + do { \ + gpio_pin_configure_dt( \ + GPIO_DT_FROM_NODE(WAKEUP_NGPIO(id, prop, idx)), \ + GPIO_INPUT); \ + gpio_enable_dt_interrupt( \ + GPIO_INT_FROM_NODE(WAKEUP_INT(id, prop, idx))); \ } while (0); -/* - * For all the wake-pins, re-init the GPIO and re-enable the interrupt. - */ - DT_FOREACH_PROP_ELEM(SYSTEM_DT_NODE_HIBERNATE_CONFIG, - wakeup_irqs, + /* + * For all the wake-pins, re-init the GPIO and re-enable the interrupt. + */ + DT_FOREACH_PROP_ELEM(SYSTEM_DT_NODE_HIBERNATE_CONFIG, wakeup_irqs, WAKEUP_SETUP); #undef WAKEUP_INT @@ -412,11 +412,42 @@ static const char *cros_system_npcx_get_chip_revision(const struct device *dev) return rev; } +#define PSL_NODE DT_INST(0, nuvoton_npcx_power_psl) +#if DT_NODE_HAS_STATUS(PSL_NODE, okay) +PINCTRL_DT_DEFINE(PSL_NODE); +static int cros_system_npcx_configure_psl_in(void) +{ + const struct pinctrl_dev_config *pcfg = + PINCTRL_DT_DEV_CONFIG_GET(PSL_NODE); + + return pinctrl_apply_state(pcfg, PINCTRL_STATE_SLEEP); +} + +static void cros_system_npcx_psl_out_inactive(void) +{ + struct gpio_dt_spec enable = GPIO_DT_SPEC_GET(PSL_NODE, enable_gpios); + + gpio_pin_set_dt(&enable, 1); +} +#else +static int cros_system_npcx_configure_psl_in(void) +{ + return -EINVAL; +} + +static void cros_system_npcx_psl_out_inactive(void) +{ + return; +} +#endif + static void system_npcx_hibernate_by_psl(const struct device *dev, uint32_t seconds, uint32_t microseconds) { ARG_UNUSED(dev); + int ret; + /* * TODO(b/178230662): RTC wake-up in PSL mode only support in npcx9 * series. Nuvoton will introduce CLs for it later. @@ -424,11 +455,12 @@ static void system_npcx_hibernate_by_psl(const struct device *dev, ARG_UNUSED(seconds); ARG_UNUSED(microseconds); - /* - * Configure PSL input pads from "psl-in-pads" property in device tree - * file. - */ - npcx_pinctrl_psl_input_configure(); + /* Configure detection settings of PSL_IN pads first */ + ret = cros_system_npcx_configure_psl_in(); + if (ret < 0) { + LOG_ERR("PSL_IN pinctrl setup failed (%d)", ret); + return; + } /* * Give the board a chance to do any late stage hibernation work. This @@ -439,8 +471,12 @@ static void system_npcx_hibernate_by_psl(const struct device *dev, if (board_hibernate_late) board_hibernate_late(); - /* Turn off VCC1 to enter ultra-low-power mode for hibernating */ - npcx_pinctrl_psl_output_set_inactive(); + /* + * A transition from 0 to 1 of specific IO (GPIO85) data-out bit + * set PSL_OUT to inactive state. Then, it will turn Core Domain + * power supply (VCC1) off for better power consumption. + */ + cros_system_npcx_psl_out_inactive(); } static int cros_system_npcx_get_reset_cause(const struct device *dev) @@ -460,8 +496,8 @@ static int cros_system_npcx_init(const struct device *dev) data->reset = UNKNOWN_RST; /* Use scratch bit to check power on reset or VCC1_RST reset. */ if (!IS_BIT_SET(inst_scfg->RSTCTL, NPCX_RSTCTL_VCC1_RST_SCRATCH)) { - bool is_vcc1_rst = IS_BIT_SET(inst_scfg->RSTCTL, - NPCX_RSTCTL_VCC1_RST_STS); + bool is_vcc1_rst = + IS_BIT_SET(inst_scfg->RSTCTL, NPCX_RSTCTL_VCC1_RST_STS); data->reset = is_vcc1_rst ? VCC1_RST_PIN : POWERUP; } @@ -526,8 +562,8 @@ static int cros_system_npcx_soc_reset(const struct device *dev) #error "cros-ec,hibernate-wake-pins cannot be used with HIBERNATE_PSL" #endif #else -#if DT_HAS_COMPAT_STATUS_OKAY(nuvoton_npcx_pslctrl_def) -#error "vsby-psl-in-list cannot be used with non-HIBERNATE_PSL" +#if DT_NODE_HAS_STATUS(PSL_NODE, okay) +#error "power_ctrl_psl cannot be used with non-HIBERNATE_PSL" #endif #endif @@ -587,9 +623,9 @@ DEVICE_DEFINE(cros_system_npcx_0, "CROS_SYSTEM", cros_system_npcx_init, NULL, #define HAL_DBG_REG_BASE_ADDR \ ((struct dbg_reg *)DT_REG_ADDR(DT_INST(0, nuvoton_npcx_cros_dbg))) -#define DBG_NODE DT_NODELABEL(dbg) -#define DBG_PINCTRL_PH DT_PHANDLE_BY_IDX(DBG_NODE, pinctrl_0, 0) -#define DBG_ALT_FILED(f) DT_PHA_BY_IDX(DBG_PINCTRL_PH, alts, 0, f) +#define DBG_NODE DT_NODELABEL(dbg) +#define DBG_PINCTRL_PH DT_PHANDLE_BY_IDX(DBG_NODE, pinctrl_0, 0) +#define DBG_ALT_FILED(f) DT_PHA_BY_IDX(DBG_PINCTRL_PH, alts, 0, f) PINCTRL_DT_DEFINE(DBG_NODE); diff --git a/zephyr/drivers/cros_system/cros_system_xec.c b/zephyr/drivers/cros_system/cros_system_xec.c index 8d0c8f864c..a3cf9aea22 100644 --- a/zephyr/drivers/cros_system/cros_system_xec.c +++ b/zephyr/drivers/cros_system/cros_system_xec.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,9 +13,42 @@ #include "system.h" #include "system_chip.h" +#include <zephyr/drivers/interrupt_controller/intc_mchp_xec_ecia.h> +#include "gpio/gpio_int.h" LOG_MODULE_REGISTER(cros_system, LOG_LEVEL_ERR); +/* Modules Map */ +#define STRUCT_ADC_REG_BASE_ADDR \ + ((struct adc_regs *)(DT_REG_ADDR(DT_NODELABEL(adc0)))) + +#define STRUCT_UART_REG_BASE_ADDR \ + ((struct uart_regs *)(DT_REG_ADDR(DT_NODELABEL(uart0)))) + +#define STRUCT_ECS_REG_BASE_ADDR \ + ((struct ecs_regs *)(DT_REG_ADDR(DT_NODELABEL(ecs)))) + +#define STRUCT_TIMER4_REG_BASE_ADDR \ + ((struct btmr_regs *)(DT_REG_ADDR(DT_NODELABEL(timer4)))) + +#define STRUCT_ESPI_REG_BASE_ADDR \ + ((struct espi_iom_regs *)(DT_REG_ADDR(DT_NODELABEL(espi0)))) + +#define STRUCT_KBD_REG_BASE_ADDR \ + ((struct kscan_regs *)(DT_REG_ADDR(DT_NODELABEL(cros_kb_raw)))) + +#define STRUCT_QMSPI_REG_BASE_ADDR \ + ((struct qmspi_regs *)(DT_REG_ADDR(DT_NODELABEL(spi0)))) + +#define STRUCT_PWM_REG_BASE_ADDR \ + ((struct pwm_regs *)(DT_REG_ADDR(DT_NODELABEL(pwm0)))) + +#define STRUCT_TACH_REG_BASE_ADDR \ + ((struct tach_regs *)(DT_REG_ADDR(DT_NODELABEL(tach0)))) + +#define STRUCT_HTMR0_REG_BASE_ADDR \ + ((struct htmr_regs *)(DT_REG_ADDR(DT_NODELABEL(hibtimer0)))) + /* Driver config */ struct cros_system_xec_config { /* hardware module base address */ @@ -38,7 +71,7 @@ struct cros_system_xec_data { #define HAL_WDOG_INST(dev) (struct wdt_regs *)(DRV_CONFIG(dev)->base_wdog) /* Get saved reset flag address in battery-backed ram */ -#define BBRAM_SAVED_RESET_FLAG_ADDR \ +#define BBRAM_SAVED_RESET_FLAG_ADDR \ (DT_REG_ADDR(DT_INST(0, microchip_xec_bbram)) + \ DT_PROP(DT_PATH(named_bbram_regions, saved_reset_flags), offset)) @@ -46,8 +79,8 @@ struct cros_system_xec_data { static int system_xec_watchdog_stop(void) { if (IS_ENABLED(CONFIG_WATCHDOG)) { - const struct device *wdt_dev = DEVICE_DT_GET( - DT_NODELABEL(wdog)); + const struct device *wdt_dev = + DEVICE_DT_GET(DT_NODELABEL(wdog)); if (!device_is_ready(wdt_dev)) { LOG_ERR("Error: device %s is not ready", wdt_dev->name); return -ENODEV; @@ -120,6 +153,8 @@ noreturn static int cros_system_xec_soc_reset(const struct device *dev) /* Disable interrupts to avoid task swaps during reboot */ interrupt_disable_all(); + /* Stop the watchdog */ + system_xec_watchdog_stop(); /* Trigger chip reset */ pcr->SYS_RST |= MCHP_PCR_SYS_RESET_NOW; @@ -130,20 +165,254 @@ noreturn static int cros_system_xec_soc_reset(const struct device *dev) /* return 0; */ } -static int cros_system_xec_hibernate(const struct device *dev, - uint32_t seconds, uint32_t microseconds) +/* Configure wakeup GPIOs in hibernate (from hibernate-wake-pins). */ +static void system_xec_set_wakeup_gpios_before_hibernate(void) +{ +#if DT_NODE_EXISTS(SYSTEM_DT_NODE_HIBERNATE_CONFIG) + +/* + * Get the interrupt DTS node for this wakeup pin + */ +#define WAKEUP_INT(id, prop, idx) DT_PHANDLE_BY_IDX(id, prop, idx) + +/* + * Get the named-gpio node for this wakeup pin by reading the + * irq-gpio property from the interrupt node. + */ +#define WAKEUP_NGPIO(id, prop, idx) \ + DT_PHANDLE(WAKEUP_INT(id, prop, idx), irq_pin) + +/* + * Reset and re-enable interrupts on this wake pin. + */ +#define WAKEUP_SETUP(id, prop, idx) \ + do { \ + gpio_pin_configure_dt( \ + GPIO_DT_FROM_NODE(WAKEUP_NGPIO(id, prop, idx)), \ + GPIO_INPUT); \ + gpio_enable_dt_interrupt( \ + GPIO_INT_FROM_NODE(WAKEUP_INT(id, prop, idx))); \ + } while (0); + + /* + * For all the wake-pins, re-init the GPIO and re-enable the interrupt. + */ + DT_FOREACH_PROP_ELEM(SYSTEM_DT_NODE_HIBERNATE_CONFIG, wakeup_irqs, + WAKEUP_SETUP); + +#undef WAKEUP_INT +#undef WAKEUP_NGPIO +#undef WAKEUP_SETUP + +#endif +} + +/** + * initialization of Hibernation timer 0 + * GIRQ=23, aggregator bit = 16, Direct NVIC = 112 + * NVIC direct connect interrupts are used for all peripherals + * (exception GPIO's) + */ +static void htimer_init(void) +{ + struct htmr_regs *htmr0 = STRUCT_HTMR0_REG_BASE_ADDR; + + /* disable HT0 at beginning */ + htmr0->PRLD = 0U; + mchp_soc_ecia_girq_src_clr(MCHP_GIRQ23_ID, MCHP_HTMR_0_GIRQ_POS); + mchp_soc_ecia_girq_src_en(MCHP_GIRQ23_ID, MCHP_HTMR_0_GIRQ_POS); + + /* enable NVIC interrupt for HT0 */ + irq_enable(MCHP_HTMR_0_GIRQ_NVIC_DIRECT); +} + +/** + * Use hibernate module to set up an htimer interrupt at a given + * time from now + * + * @param seconds Number of seconds before htimer interrupt + * @param microseconds Number of microseconds before htimer interrupt + * @note hibernation timer input clock is 32.768KHz. + */ +static void system_set_htimer_alarm(uint32_t seconds, uint32_t microseconds) +{ + uint32_t hcnt, ns; + uint8_t hctrl; + struct htmr_regs *htmr0 = STRUCT_HTMR0_REG_BASE_ADDR; + + /* disable HT0 */ + htmr0->PRLD = 0U; + + if (microseconds > 1000000ul) { + ns = (microseconds / 1000000ul); + microseconds %= 1000000ul; + if ((0xfffffffful - seconds) > ns) + seconds += ns; + else + seconds = 0xfffffffful; + } + + /* + * Hibernation timer input clock is 32.768KHz. + * Control register bit[0] selects the divider. + * If bit[0] is 0, divide by 1 for 30.5 us per LSB for a maximum of + * 65535 * 30.5 us = 1998817.5 us or 32.786 counts per second + * If bit[0] is 1, divide by 4096 for 0.125 s per LSB for a maximum + * of ~2 hours, 65535 * 0.125 s ~ 8192 s = 2.27 hours + */ + if (seconds > 1) { + hcnt = (seconds << 3); /* divide by 0.125 */ + if (hcnt > 0xfffful) + hcnt = 0xfffful; + hctrl = 1; + } else { + /* + * approximate(~2% error) as seconds is 0 or 1 + * seconds / 30.5e-6 + microseconds / 30.5 + */ + hcnt = (seconds << 15) + (microseconds >> 5) + + (microseconds >> 10); + hctrl = 0; + } + + htmr0->CTRL = hctrl; + htmr0->PRLD = hcnt; +} + +/* Put the EC in hibernate (lowest EC power state). */ +noreturn static int cros_system_xec_hibernate(const struct device *dev, + uint32_t seconds, + uint32_t microseconds) { + struct pcr_regs *const pcr = HAL_PCR_INST(dev); +#ifdef CONFIG_ADC_XEC_V2 + struct adc_regs *adc0 = STRUCT_ADC_REG_BASE_ADDR; +#endif +#ifdef CONFIG_UART_XEC + struct uart_regs *uart0 = STRUCT_UART_REG_BASE_ADDR; +#endif + struct ecs_regs *ecs = STRUCT_ECS_REG_BASE_ADDR; + struct btmr_regs *btmr4 = STRUCT_TIMER4_REG_BASE_ADDR; + struct espi_iom_regs *espi0 = STRUCT_ESPI_REG_BASE_ADDR; +#ifdef CONFIG_CROS_KB_RAW_XEC + struct kscan_regs *kbd = STRUCT_KBD_REG_BASE_ADDR; +#endif + struct qmspi_regs *qmspi0 = STRUCT_QMSPI_REG_BASE_ADDR; +#if defined(CONFIG_PWM_XEC) + struct pwm_regs *pwm0 = STRUCT_PWM_REG_BASE_ADDR; +#endif +#if defined(CONFIG_TACH_XEC) + struct tach_regs *tach0 = STRUCT_TACH_REG_BASE_ADDR; +#endif + struct ecia_regs *ecia = (struct ecia_regs *)(ECIA_BASE_ADDR); + int i; + /* Disable interrupt first */ interrupt_disable_all(); - /* Stop the watchdog */ system_xec_watchdog_stop(); - /* Enter hibernate mode */ + /* Disable all individaul block interrupt and source */ + for (i = 0; i < MCHP_GIRQ_IDX_MAX; ++i) { + ecia->GIRQ[i].EN_CLR = 0xffffffff; + ecia->GIRQ[i].SRC = 0xffffffff; + } - /* MCHP TODO */ + /* Disable and clear all NVIC interrupt pending */ + for (i = 0; i < MCHP_MAX_NVIC_EXT_INPUTS; ++i) { + mchp_xec_ecia_nvic_clr_pend(i); + } - return 0; + /* Disable blocks */ +#ifdef CONFIG_ADC_XEC_V2 + /* Disable ADC */ + adc0->CONTROL &= ~(MCHP_ADC_CTRL_ACTV); +#endif + /* Disable eSPI */ + espi0->ACTV &= ~0x01; +#ifdef CONFIG_CROS_KB_RAW_XEC + /* Disable Keyboard Scanner */ + kbd->KSO_SEL &= ~(MCHP_KSCAN_KSO_EN); +#endif +#ifdef CONFIG_I2C + /* Disable SMB / I2C */ + for (i = 0; i < MCHP_I2C_SMB_INSTANCES; i++) { + uint32_t addr = + MCHP_I2C_SMB_BASE_ADDR(i) + MCHP_I2C_SMB_CFG_OFS; + uint32_t regval = sys_read32(addr); + + sys_write32(regval & ~(MCHP_I2C_SMB_CFG_ENAB), addr); + } +#endif + /* Disable QMSPI */ + qmspi0->MODE &= ~MCHP_QMSPI_M_ACTIVATE; +#if defined(CONFIG_PWM_XEC) + /* Disable PWM0 */ + pwm0->CONFIG &= ~MCHP_PWM_CFG_ENABLE; +#endif +#if defined(CONFIG_TACH_XEC) + /* Disable TACH0 */ + tach0->CONTROL &= ~MCHP_TACH_CTRL_EN; +#endif +#if defined(CONFIG_TACH_XEC) || defined(CONFIG_PWM_XEC) + /* This low-speed clock derived from the 48MHz clock domain is used as + * a time base for PWMs and TACHs + * Set SLOW_CLOCK_DIVIDE = CLKOFF to save additional power + */ + pcr->SLOW_CLK_CTRL &= + (~MCHP_PCR_SLOW_CLK_CTRL_100KHZ & MCHP_PCR_SLOW_CLK_CTRL_MASK); +#endif + /* Disable timers - 32bit timer 0 */ + btmr4->CTRL &= ~MCHP_BTMR_CTRL_ENABLE; + /* + * Give the board a chance to do any late stage hibernation work. This + * is likely going to configure GPIOs for hibernation. On some boards, + * it's possible that this may not return at all. On those boards, + * power to the EC is likely being turn off entirely. + */ + if (board_hibernate_late) { + board_hibernate_late(); + } + + /* Setup wakeup GPIOs for hibernate */ + system_xec_set_wakeup_gpios_before_hibernate(); + /* Init htimer and enable interrupt if times are not 0 */ + if (seconds || microseconds) { + htimer_init(); + system_set_htimer_alarm(seconds, microseconds); + } + +#ifdef CONFIG_UART_XEC + /* Disable UART0 */ + /* Flush console before hibernating */ + cflush(); + uart0->ACTV &= ~(MCHP_UART_LD_ACTIVATE); +#endif + + /* Disable JATG and RTM */ + ecs->DEBUG_CTRL = 0; + ecs->ETM_CTRL = 0; + + /* + * Set sleep state + * arm sleep state to trigger on next WFI + */ + pcr->SYS_SLP_CTRL |= MCHP_PCR_SYS_SLP_HEAVY; + /* + * Set PRIMASK = 1 so on wake the CPU will not vector to any ISR. + * Set BASEPRI = 0 to allow any priority to wake. + */ + __set_BASEPRI(0); + /* triggers sleep hardware */ + __WFI(); + __NOP(); + __NOP(); + + /* Reset EC chip */ + cros_system_xec_soc_reset(dev); + + /* Should not reach here... */ + /* return 0; */ } static struct cros_system_xec_data cros_system_xec_dev_data; diff --git a/zephyr/dts/bindings/adc/named-adc.yaml b/zephyr/dts/bindings/adc/named-adc-channels.yaml index 80ae9d145f..f1b6f19790 100644 --- a/zephyr/dts/bindings/adc/named-adc.yaml +++ b/zephyr/dts/bindings/adc/named-adc-channels.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,11 +9,6 @@ compatible: "named-adc-channels" child-binding: description: Named ADCs child node properties: - label: - required: true - type: string - description: - String used to describe an ADC channel in the 'adc' console command. io-channels: required: true type: phandle-array diff --git a/zephyr/dts/bindings/battery/aec,5477109.yaml b/zephyr/dts/bindings/battery/aec,5477109.yaml index ca0ce51eb1..3cb8e44135 100644 --- a/zephyr/dts/bindings/battery/aec,5477109.yaml +++ b/zephyr/dts/bindings/battery/aec,5477109.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/atl,cfd72.yaml b/zephyr/dts/bindings/battery/atl,cfd72.yaml new file mode 100644 index 0000000000..0f5c4ba511 --- /dev/null +++ b/zephyr/dts/bindings/battery/atl,cfd72.yaml @@ -0,0 +1,53 @@ +description: "ATL-NVT ATL-ATL3.66 DELL CFD72" +compatible: "atl,cfd72" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "atl,cfd72" + + # Fuel Gauge + manuf_name: + default: "ATL-ATL3.66" + device_name: + default: "DELL CFD72" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x43 + fet_reg_mask: + default: 0x0001 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0002 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17600 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 50 + discharging_min_c: + default: -20 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/battery-fuel-gauge.yaml b/zephyr/dts/bindings/battery/battery-fuel-gauge.yaml index 2572090024..d2fed4bfa6 100644 --- a/zephyr/dts/bindings/battery/battery-fuel-gauge.yaml +++ b/zephyr/dts/bindings/battery/battery-fuel-gauge.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,10 +9,16 @@ compatible: "battery-fuel-gauge" properties: manuf_name: - description: Manufacturer name + description: | + String returned by the smart battery attribute + ManufacturerName (0x20), which is used to help + uniquely identify the type of battery. type: string device_name: - description: Model/Device name + description: | + String returned by the smart battery attribute + DeviceName (0x21), which is used to help + uniquely identify the type of battery. type: string ship_mode_wb_support: description: | diff --git a/zephyr/dts/bindings/battery/battery-info.yaml b/zephyr/dts/bindings/battery/battery-info.yaml index 3a4cb875e7..54e81cedeb 100644 --- a/zephyr/dts/bindings/battery/battery-info.yaml +++ b/zephyr/dts/bindings/battery/battery-info.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/battery-smart.yaml b/zephyr/dts/bindings/battery/battery-smart.yaml index c2c6d28175..81c96f0115 100644 --- a/zephyr/dts/bindings/battery/battery-smart.yaml +++ b/zephyr/dts/bindings/battery/battery-smart.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -12,7 +12,19 @@ properties: type: string enum: - "aec,5477109" - - "as3gwrc3ka,c235-41" + - "atl,cfd72" + - "byd,l22b3pg0" + - "byd,wv3k8" + - "celxpert,c235-41" + - "celxpert,l22c3pg0" + - "cosmx,ap20cbl" + - "cosmx,ap20cbl-2" + - "cosmx,gh02047xl" + - "cosmx,l22x3pg0" + - "cosmx,mvk11" + - "dynapack,atl_gh02047xl" + - "dynapack,cosmx_gh02047xl" + - "dynapack,c140254" - "ganfeng,7c01" - "getac,bq40z50-R3-S3" - "getac,bq40z50-R3-S2" @@ -20,12 +32,27 @@ properties: - "lgc,ap16l8j" - "lgc,ap18c8k" - "lgc,ap19a8k" + - "lgc,ap19b8m" - "lgc,l20l3pg2" + - "lgc,xphx8" - "murata,ap18c4k" - "panasonic,ap16l5j" - "panasonic,ap16l5j-009" - "panasonic,ap19a5k" - "powertech,batgqa05l22" + - "smp,atlxdy9k" + - "smp,c31n1915" + - "smp,c31n2005" - "smp,l20m3pg0" - "smp,l20m3pg1" - "smp,l20m3pg2" + - "smp,l22m3pg0" + - "smp,l22m3pg1" + - "smp,pc-vp-bp153" + - "smp,coslight_gh02047xl" + - "smp,cosxdy9k" + - "smp,highpower_gh02047xl" + - "sunwoda,atl3rr09" + - "sunwoda,cos3rr09" + - "sunwoda,l22d3pg0" + - "sunwoda,l22d3pg1" diff --git a/zephyr/dts/bindings/battery/byd,l22b3pg0.yaml b/zephyr/dts/bindings/battery/byd,l22b3pg0.yaml new file mode 100644 index 0000000000..dbe82d5aaa --- /dev/null +++ b/zephyr/dts/bindings/battery/byd,l22b3pg0.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "BYD L22B3PG0" +compatible: "byd,l22b3pg0" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "byd,l22b3pg0" + + # Fuel gauge + manuf_name: + default: "BYD" + device_name: + default: "L22B3PG0" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x34 + fet_reg_mask: + default: 0x0100 + fet_disconnect_val: + default: 0x0100 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11310 + voltage_min: + default: 9000 + precharge_current: + default: 416 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 70 + diff --git a/zephyr/dts/bindings/battery/byd,wv3k8.yaml b/zephyr/dts/bindings/battery/byd,wv3k8.yaml new file mode 100644 index 0000000000..98c3313632 --- /dev/null +++ b/zephyr/dts/bindings/battery/byd,wv3k8.yaml @@ -0,0 +1,54 @@ +description: "BYD DELL WV3K8" +compatible: "byd,wv3k8" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "byd,wv3k8" + + # Fuel gauge + manuf_name: + default: "BYD" + device_name: + default: "DELL WV3K8" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x54 + fet_reg_mask: + default: 0x0002 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0004 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17400 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: -3 + start_charging_max_c: + default: 45 + charging_min_c: + default: -3 + charging_max_c: + default: 50 + discharging_min_c: + default: -5 + discharging_max_c: + default: 70 + diff --git a/zephyr/dts/bindings/battery/as3gwrc3ka,c235-41.yaml b/zephyr/dts/bindings/battery/celxpert,c235-41.yaml index c4359b29d2..cffe1c2f0d 100644 --- a/zephyr/dts/bindings/battery/as3gwrc3ka,c235-41.yaml +++ b/zephyr/dts/bindings/battery/celxpert,c235-41.yaml @@ -1,12 +1,12 @@ -description: "AS3GWRc3KA C235-41" -compatible: "as3gwrc3ka,c235-41" +description: "Celxpert C235-41" +compatible: "celxpert,c235-41" include: battery-smart.yaml properties: enum-name: type: string - default: "as3gwrc3ka,c235-41" + default: "celxpert,c235-41" # Fuel gauge manuf_name: diff --git a/zephyr/dts/bindings/battery/celxpert,l22c3pg0.yaml b/zephyr/dts/bindings/battery/celxpert,l22c3pg0.yaml new file mode 100644 index 0000000000..2e99336c06 --- /dev/null +++ b/zephyr/dts/bindings/battery/celxpert,l22c3pg0.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "CELXPERT L22C3PG0" +compatible: "celxpert,l22c3pg0" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "celxpert,l22c3pg0" + + # Fuel gauge + manuf_name: + default: "Celxpert" + device_name: + default: "L22C3PG0" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x00 + fet_reg_mask: + default: 0x0018 + fet_disconnect_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11310 + voltage_min: + default: 9000 + precharge_current: + default: 416 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/cosmx,ap20cbl-2.yaml b/zephyr/dts/bindings/battery/cosmx,ap20cbl-2.yaml new file mode 100644 index 0000000000..5e64834f15 --- /dev/null +++ b/zephyr/dts/bindings/battery/cosmx,ap20cbl-2.yaml @@ -0,0 +1,57 @@ +description: "COSMX AP20CBL-2" +compatible: "cosmx,ap20cbl-2" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "cosmx,ap20cbl-2" + + # Fuel gauge + manuf_name: + default: "COSMX KT0030B004" + device_name: + default: "AP20CBL" + ship_mode_reg_addr: + default: 0x3A + ship_mode_reg_data: + default: [ 0xC574, 0xC574 ] + # Documentation: b/243772306 + # Manufacturer Access 0x00 + # b14: C-FET Status (0: Off, 1: On) + # b15: D-FET Status (0: Off, 1: On) + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x8000 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x4000 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11550 + voltage_min: + default: 9000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 75 diff --git a/zephyr/dts/bindings/battery/cosmx,ap20cbl.yaml b/zephyr/dts/bindings/battery/cosmx,ap20cbl.yaml new file mode 100644 index 0000000000..193ef649f1 --- /dev/null +++ b/zephyr/dts/bindings/battery/cosmx,ap20cbl.yaml @@ -0,0 +1,57 @@ +description: "COSMX AP20CBL" +compatible: "cosmx,ap20cbl" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "cosmx,ap20cbl" + + # Fuel gauge + manuf_name: + default: "COSMX KT0030B002" + device_name: + default: "AP20CBL" + ship_mode_reg_addr: + default: 0x3A + ship_mode_reg_data: + default: [ 0xC574, 0xC574 ] + # Documentation: b/230427330 + # Manufacturer Access 0x00 + # b14: Charging Disabled (0: Off, 1: On) + # b13: Discharging Disabled (0: Off, 1: On) + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x2000 + fet_disconnect_val: + default: 0x2000 + fet_cfet_mask: + default: 0x4000 + fet_cfet_off_val: + default: 0x4000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11550 + voltage_min: + default: 9000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 75 diff --git a/zephyr/dts/bindings/battery/cosmx,gh02047xl.yaml b/zephyr/dts/bindings/battery/cosmx,gh02047xl.yaml new file mode 100644 index 0000000000..aa44980621 --- /dev/null +++ b/zephyr/dts/bindings/battery/cosmx,gh02047xl.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "COSMX GH02047XL" +compatible: "cosmx,gh02047xl" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "cosmx,gh02047xl" + + # Fuel gauge + manuf_name: + default: "333-AC-DA-A" + device_name: + default: "GH02047XL" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x0006 + fet_disconnect_val: + default: 0x0 + + # Battery info + voltage_max: + default: 8800 + voltage_normal: + default: 7700 + voltage_min: + default: 6000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 45 + discharging_min_c: + default: -10 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/cosmx,l22x3pg0.yaml b/zephyr/dts/bindings/battery/cosmx,l22x3pg0.yaml new file mode 100644 index 0000000000..b8e199d6cb --- /dev/null +++ b/zephyr/dts/bindings/battery/cosmx,l22x3pg0.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "COSMX L22X3PG0" +compatible: "cosmx,l22x3pg0" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "cosmx,l22x3pg0" + + # Fuel gauge + manuf_name: + default: "COSMX" + device_name: + default: "L22X3PG0" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x34 + fet_reg_mask: + default: 0x0100 + fet_disconnect_val: + default: 0x0100 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11310 + voltage_min: + default: 9000 + precharge_current: + default: 207 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 70 + diff --git a/zephyr/dts/bindings/battery/cosmx,mvk11.yaml b/zephyr/dts/bindings/battery/cosmx,mvk11.yaml new file mode 100644 index 0000000000..c493d27cef --- /dev/null +++ b/zephyr/dts/bindings/battery/cosmx,mvk11.yaml @@ -0,0 +1,53 @@ +description: "COSMX COM DELL MVK11" +compatible: "cosmx,mvk11" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "cosmx,mvk11" + + # Fuel Gauge + manuf_name: + default: "COM" + device_name: + default: "DELL MVK11" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x54 + fet_reg_mask: + default: 0x0002 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0004 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17600 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/dynapack,atl_gh02047xl.yaml b/zephyr/dts/bindings/battery/dynapack,atl_gh02047xl.yaml new file mode 100644 index 0000000000..3bc3eccb4c --- /dev/null +++ b/zephyr/dts/bindings/battery/dynapack,atl_gh02047xl.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "DYNAPACK ATL_GH02047XL" +compatible: "dynapack,atl_gh02047xl" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "dynapack,atl_gh02047xl" + + # Fuel gauge + manuf_name: + default: "333-27-DA-A" + device_name: + default: "GH02047XL" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x0006 + fet_disconnect_val: + default: 0x0 + + # Battery info + voltage_max: + default: 8800 + voltage_normal: + default: 7700 + voltage_min: + default: 6000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 45 + discharging_min_c: + default: -10 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/dynapack,c140254.yaml b/zephyr/dts/bindings/battery/dynapack,c140254.yaml new file mode 100644 index 0000000000..1c9f4c59de --- /dev/null +++ b/zephyr/dts/bindings/battery/dynapack,c140254.yaml @@ -0,0 +1,56 @@ +description: "DYNAPACK AS3GXXE3KA C140254" +compatible: "dynapack,c140254" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "dynapack,c140254" + + # Fuel gauge + manuf_name: + default: "AS3GXXE3KA" + device_name: + default: "C140254" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + # Documentation: b/150833879 + # Charging/Discharging FETs Status + # Register SBS_PackStatus_ACCESS (0x99) + # Bit-3: XDSG + # Bit-2: XCHG + fet_reg_addr: + default: 0x99 + fet_reg_mask: + default: 0x0C + fet_disconnect_val: + default: 0x0C + fet_cfet_mask: + default: 0x04 + fet_cfet_off_val: + default: 0x04 + + # Battery info + voltage_max: + default: 8900 + voltage_normal: + default: 7970 + voltage_min: + default: 6000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60
\ No newline at end of file diff --git a/zephyr/dts/bindings/battery/dynapack,cosmx_gh02047xl.yaml b/zephyr/dts/bindings/battery/dynapack,cosmx_gh02047xl.yaml new file mode 100644 index 0000000000..8fb6315914 --- /dev/null +++ b/zephyr/dts/bindings/battery/dynapack,cosmx_gh02047xl.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "DYNAPACK COSMX_GH02047XL" +compatible: "dynapack,cosmx_gh02047xl" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "dynapack,cosmx_gh02047xl" + + # Fuel gauge + manuf_name: + default: "333-2C-DA-A" + device_name: + default: "GH02047XL" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x0006 + fet_disconnect_val: + default: 0x0 + + # Battery info + voltage_max: + default: 8800 + voltage_normal: + default: 7700 + voltage_min: + default: 6000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 45 + discharging_min_c: + default: -10 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/getac,bq40z50-R3-S2.yaml b/zephyr/dts/bindings/battery/getac,bq40z50-R3-S2.yaml index b144c30be3..e59f6c1e37 100644 --- a/zephyr/dts/bindings/battery/getac,bq40z50-R3-S2.yaml +++ b/zephyr/dts/bindings/battery/getac,bq40z50-R3-S2.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/getac,bq40z50-R3-S3.yaml b/zephyr/dts/bindings/battery/getac,bq40z50-R3-S3.yaml index 57d220abbb..aed466ad11 100644 --- a/zephyr/dts/bindings/battery/getac,bq40z50-R3-S3.yaml +++ b/zephyr/dts/bindings/battery/getac,bq40z50-R3-S3.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/lgc,ac17a8m.yaml b/zephyr/dts/bindings/battery/lgc,ac17a8m.yaml index 53eeedc8a4..939713bbe5 100644 --- a/zephyr/dts/bindings/battery/lgc,ac17a8m.yaml +++ b/zephyr/dts/bindings/battery/lgc,ac17a8m.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/lgc,ap19b8m.yaml b/zephyr/dts/bindings/battery/lgc,ap19b8m.yaml new file mode 100644 index 0000000000..8a3beb49fe --- /dev/null +++ b/zephyr/dts/bindings/battery/lgc,ap19b8m.yaml @@ -0,0 +1,54 @@ +description: "LGC KT0030G024 AP19B8M" +compatible: "lgc,ap19b8m" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "lgc,ap19b8m" + + # Fuel gauge + manuf_name: + default: "LGC KT0030G024" + device_name: + default: "AP19B8M" + ship_mode_reg_addr: + default: 0x3A + ship_mode_reg_data: + default: [ 0xC574, 0xC574 ] + # Documentation: b/135496272 + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x43 + fet_reg_mask: + default: 0x0001 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0002 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13350 + voltage_normal: + default: 11610 + voltage_min: + default: 9000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 75 diff --git a/zephyr/dts/bindings/battery/lgc,l20l3pg2.yaml b/zephyr/dts/bindings/battery/lgc,l20l3pg2.yaml index bf2b62bc44..73d2ca5ec6 100644 --- a/zephyr/dts/bindings/battery/lgc,l20l3pg2.yaml +++ b/zephyr/dts/bindings/battery/lgc,l20l3pg2.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/lgc,xphx8.yaml b/zephyr/dts/bindings/battery/lgc,xphx8.yaml new file mode 100644 index 0000000000..98b27fbe5b --- /dev/null +++ b/zephyr/dts/bindings/battery/lgc,xphx8.yaml @@ -0,0 +1,57 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "LGC-LGC3.600 DELL_XPHX8" +compatible: "lgc,xphx8" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "lgc,xphx8" + + # Fuel Gauge + manuf_name: + default: "LGC-LGC3.600" + device_name: + default: "DELL XPHX8" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x43 + fet_reg_mask: + default: 0x0001 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0002 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17600 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: -3 + start_charging_max_c: + default: 45 + charging_min_c: + default: -3 + charging_max_c: + default: 50 + discharging_min_c: + default: -20 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/powertech,batgqa05l22.yaml b/zephyr/dts/bindings/battery/powertech,batgqa05l22.yaml index a12ef741e6..45b067ee4d 100644 --- a/zephyr/dts/bindings/battery/powertech,batgqa05l22.yaml +++ b/zephyr/dts/bindings/battery/powertech,batgqa05l22.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/smp,atlxdy9k.yaml b/zephyr/dts/bindings/battery/smp,atlxdy9k.yaml new file mode 100644 index 0000000000..dd437f705a --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,atlxdy9k.yaml @@ -0,0 +1,53 @@ +description: "SMP-ATL SMP-ATL3.66 " +compatible: "smp,atlxdy9k" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,atlxdy9k" + + # Fuel gauge + manuf_name: + default: "SMP-ATL3.66" + device_name: + default: "DELL XDY9K" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x43 + fet_reg_mask: + default: 0x0001 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0002 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17600 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: -3 + start_charging_max_c: + default: 45 + charging_min_c: + default: -3 + charging_max_c: + default: 50 + discharging_min_c: + default: -17 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/smp,c31n1915.yaml b/zephyr/dts/bindings/battery/smp,c31n1915.yaml new file mode 100644 index 0000000000..03dd7d3915 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,c31n1915.yaml @@ -0,0 +1,47 @@ +description: "SMP Rechargeable Li-Polymer Battery Pack 3640mAh" +compatible: "smp,c31n1915" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,c31n1915" + + # Fuel gauge + manuf_name: + default: "AS3GWND3jB" + device_name: + default: "B340035" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_reg_addr: + default: 0x99 + fet_reg_mask: + default: 0x000c + fet_disconnect_val: + default: 0x000c + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11850 + voltage_min: + default: 9000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 diff --git a/zephyr/dts/bindings/battery/smp,c31n2005.yaml b/zephyr/dts/bindings/battery/smp,c31n2005.yaml new file mode 100644 index 0000000000..07b7e9f0b6 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,c31n2005.yaml @@ -0,0 +1,48 @@ +# SMP Li-Po 4335mAh +description: "SMP LiPo 4335mAh AS3GWQd3jB C490-42" +compatible: "smp,c31n2005" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,c31n2005" + + # Fuel gauge + manuf_name: + default: "AS3GWQd3jB" + device_name: + default: "C490-42" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_reg_addr: + default: 0x99 + fet_reg_mask: + default: 0x000c + fet_disconnect_val: + default: 0x000c + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11880 + voltage_min: + default: 9000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 diff --git a/zephyr/dts/bindings/battery/smp,coslight_gh02047xl.yaml b/zephyr/dts/bindings/battery/smp,coslight_gh02047xl.yaml new file mode 100644 index 0000000000..19f8751998 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,coslight_gh02047xl.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SMP COSLIGHT_GH02047XL" +compatible: "smp,coslight_gh02047xl" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,coslight_gh02047xl" + + # Fuel gauge + manuf_name: + default: "333-1C-DA-A" + device_name: + default: "GH02047XL" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x0006 + fet_disconnect_val: + default: 0x0 + + # Battery info + voltage_max: + default: 8800 + voltage_normal: + default: 7700 + voltage_min: + default: 6000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 45 + discharging_min_c: + default: -10 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/smp,cosxdy9k.yaml b/zephyr/dts/bindings/battery/smp,cosxdy9k.yaml new file mode 100644 index 0000000000..29baf7b807 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,cosxdy9k.yaml @@ -0,0 +1,51 @@ +description: "SMP-ATL SMP-COS3.66 " +compatible: "smp,cosxdy9k" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,cosxdy9k" + + # Fuel gauge + manuf_name: + default: "SMP-COS3.66" + device_name: + default: "DELL XDY9K" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_reg_addr: + default: 0x43 + fet_reg_mask: + default: 0x0001 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0002 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17600 + voltage_normal: + default: 15000 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: -3 + start_charging_max_c: + default: 45 + charging_min_c: + default: -3 + charging_max_c: + default: 50 + discharging_min_c: + default: -17 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/smp,highpower_gh02047xl.yaml b/zephyr/dts/bindings/battery/smp,highpower_gh02047xl.yaml new file mode 100644 index 0000000000..f3d039dfdf --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,highpower_gh02047xl.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SMP HIGHPOWER_GH02047XL" +compatible: "smp,highpower_gh02047xl" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,highpower_gh02047xl" + + # Fuel gauge + manuf_name: + default: "333-1D-DA-A" + device_name: + default: "GH02047XL" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 1 + fet_reg_addr: + default: 0x0 + fet_reg_mask: + default: 0x0006 + fet_disconnect_val: + default: 0x0 + + # Battery info + voltage_max: + default: 8800 + voltage_normal: + default: 7700 + voltage_min: + default: 6000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: 0 + charging_max_c: + default: 45 + discharging_min_c: + default: -10 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/smp,l20m3pg0.yaml b/zephyr/dts/bindings/battery/smp,l20m3pg0.yaml index ecb0678dc7..437a3ca140 100644 --- a/zephyr/dts/bindings/battery/smp,l20m3pg0.yaml +++ b/zephyr/dts/bindings/battery/smp,l20m3pg0.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/smp,l20m3pg1.yaml b/zephyr/dts/bindings/battery/smp,l20m3pg1.yaml index f462f8b388..00a6b99a84 100644 --- a/zephyr/dts/bindings/battery/smp,l20m3pg1.yaml +++ b/zephyr/dts/bindings/battery/smp,l20m3pg1.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/smp,l20m3pg2.yaml b/zephyr/dts/bindings/battery/smp,l20m3pg2.yaml index 874e1f8d0c..37a5cb2052 100644 --- a/zephyr/dts/bindings/battery/smp,l20m3pg2.yaml +++ b/zephyr/dts/bindings/battery/smp,l20m3pg2.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/battery/smp,l22m3pg0.yaml b/zephyr/dts/bindings/battery/smp,l22m3pg0.yaml new file mode 100644 index 0000000000..991734c9bc --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,l22m3pg0.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SMP L22M3PG0" +compatible: "smp,l22m3pg0" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,l22m3pg0" + + # Fuel gauge + manuf_name: + default: "SMP" + device_name: + default: "L22M3PG0" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x00 + fet_reg_mask: + default: 0x0018 + fet_disconnect_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11310 + voltage_min: + default: 9000 + precharge_current: + default: 208 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/smp,l22m3pg1.yaml b/zephyr/dts/bindings/battery/smp,l22m3pg1.yaml new file mode 100644 index 0000000000..48152e0722 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,l22m3pg1.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SMP L22M3PG1" +compatible: "smp,l22m3pg1" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,l22m3pg1" + + # Fuel gauge + manuf_name: + default: "SMP" + device_name: + default: "L22M3PG1" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x00 + fet_reg_mask: + default: 0x0018 + fet_disconnect_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11520 + voltage_min: + default: 9000 + precharge_current: + default: 248 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/smp,pc-vp-bp153.yaml b/zephyr/dts/bindings/battery/smp,pc-vp-bp153.yaml new file mode 100644 index 0000000000..3341b40d14 --- /dev/null +++ b/zephyr/dts/bindings/battery/smp,pc-vp-bp153.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SMP PC-VP-BP153" +compatible: "smp,pc-vp-bp153" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "smp,pc-vp-bp153" + + # Fuel gauge + manuf_name: + default: "SIMPLO" + device_name: + default: "PC-VP-BP153" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x34 + fet_reg_mask: + default: 0x0100 + fet_disconnect_val: + default: 0x0100 + + # Battery info + voltage_max: + default: 8800 + voltage_normal: + default: 7680 + voltage_min: + default: 6000 + precharge_current: + default: 128 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 70 + diff --git a/zephyr/dts/bindings/battery/sunwoda,atl3rr09.yaml b/zephyr/dts/bindings/battery/sunwoda,atl3rr09.yaml new file mode 100644 index 0000000000..5ca2477f87 --- /dev/null +++ b/zephyr/dts/bindings/battery/sunwoda,atl3rr09.yaml @@ -0,0 +1,53 @@ +description: "SUNWODA SWD-ATL4.242" +compatible: "sunwoda,atl3rr09" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "sunwoda,atl3rr09" + + # Fuel Gauge + manuf_name: + default: "SWD-ATL4.242" + device_name: + default: "DELL 3RR09" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x54 + fet_reg_mask: + default: 0x0002 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0004 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17800 + voltage_normal: + default: 15200 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: -3 + charging_max_c: + default: 50 + discharging_min_c: + default: -5 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/sunwoda,cos3rr09.yaml b/zephyr/dts/bindings/battery/sunwoda,cos3rr09.yaml new file mode 100644 index 0000000000..58d6b7d635 --- /dev/null +++ b/zephyr/dts/bindings/battery/sunwoda,cos3rr09.yaml @@ -0,0 +1,53 @@ +description: "SUNWODA SWD-COS4.264" +compatible: "sunwoda,cos3rr09" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "sunwoda,cos3rr09" + + # Fuel Gauge + manuf_name: + default: "SWD-COS4.264" + device_name: + default: "DELL 3RR09YMD" + ship_mode_reg_addr: + default: 0x00 + ship_mode_reg_data: + default: [ 0x0010, 0x0010 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x54 + fet_reg_mask: + default: 0x0002 + fet_disconnect_val: + default: 0x0000 + fet_cfet_mask: + default: 0x0004 + fet_cfet_off_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 17800 + voltage_normal: + default: 15200 + voltage_min: + default: 12000 + precharge_current: + default: 256 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 45 + charging_min_c: + default: -3 + charging_max_c: + default: 50 + discharging_min_c: + default: -5 + discharging_max_c: + default: 70 diff --git a/zephyr/dts/bindings/battery/sunwoda,l22d3pg0.yaml b/zephyr/dts/bindings/battery/sunwoda,l22d3pg0.yaml new file mode 100644 index 0000000000..a0ff640c6b --- /dev/null +++ b/zephyr/dts/bindings/battery/sunwoda,l22d3pg0.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SUNWODA L22D3PG0" +compatible: "sunwoda,l22d3pg0" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "sunwoda,l22d3pg0" + + # Fuel gauge + manuf_name: + default: "Sunwoda" + device_name: + default: "L22D3PG0" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x00 + fet_reg_mask: + default: 0x0018 + fet_disconnect_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11310 + voltage_min: + default: 9000 + precharge_current: + default: 209 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/battery/sunwoda,l22d3pg1.yaml b/zephyr/dts/bindings/battery/sunwoda,l22d3pg1.yaml new file mode 100644 index 0000000000..84505cffeb --- /dev/null +++ b/zephyr/dts/bindings/battery/sunwoda,l22d3pg1.yaml @@ -0,0 +1,54 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: "SUNWODA L22D3PG1" +compatible: "sunwoda,l22d3pg1" + +include: battery-smart.yaml + +properties: + enum-name: + type: string + default: "sunwoda,l22d3pg1" + + # Fuel gauge + manuf_name: + default: "Sunwoda" + device_name: + default: "L22D3PG1" + ship_mode_reg_addr: + default: 0x34 + ship_mode_reg_data: + default: [ 0x0000, 0x1000 ] + fet_mfgacc_support: + default: 0 + fet_reg_addr: + default: 0x00 + fet_reg_mask: + default: 0x0018 + fet_disconnect_val: + default: 0x0000 + + # Battery info + voltage_max: + default: 13200 + voltage_normal: + default: 11520 + voltage_min: + default: 9000 + precharge_current: + default: 251 + start_charging_min_c: + default: 0 + start_charging_max_c: + default: 50 + charging_min_c: + default: 0 + charging_max_c: + default: 60 + discharging_min_c: + default: -20 + discharging_max_c: + default: 60 + diff --git a/zephyr/dts/bindings/cbi/cros-ec-cbi-fw-config-value.yaml b/zephyr/dts/bindings/cbi/cros-ec,cbi-fw-config-value.yaml index facbb086f1..6c45ffbf0b 100644 --- a/zephyr/dts/bindings/cbi/cros-ec-cbi-fw-config-value.yaml +++ b/zephyr/dts/bindings/cbi/cros-ec,cbi-fw-config-value.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cbi/cros-ec-cbi-fw-config.yaml b/zephyr/dts/bindings/cbi/cros-ec,cbi-fw-config.yaml index b19c9632be..b47c511d5e 100644 --- a/zephyr/dts/bindings/cbi/cros-ec-cbi-fw-config.yaml +++ b/zephyr/dts/bindings/cbi/cros-ec,cbi-fw-config.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cbi/named-cbi-ssfc-value.yaml b/zephyr/dts/bindings/cbi/named-cbi-ssfc-value.yaml index f97d688727..7e04afed87 100644 --- a/zephyr/dts/bindings/cbi/named-cbi-ssfc-value.yaml +++ b/zephyr/dts/bindings/cbi/named-cbi-ssfc-value.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cbi/named-cbi-ssfc.yaml b/zephyr/dts/bindings/cbi/named-cbi-ssfc.yaml index bd6c1d535b..2db330079d 100644 --- a/zephyr/dts/bindings/cbi/named-cbi-ssfc.yaml +++ b/zephyr/dts/bindings/cbi/named-cbi-ssfc.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -20,6 +20,7 @@ child-binding: description: Enum values used only for description purposes enum: + - AUDIO_CODEC - BASE_SENSOR - LID_SENSOR - LIGHTBAR diff --git a/zephyr/dts/bindings/charger/chg-chip.yaml b/zephyr/dts/bindings/charger/chg-chip.yaml index 50e78756d9..58cc487b1b 100644 --- a/zephyr/dts/bindings/charger/chg-chip.yaml +++ b/zephyr/dts/bindings/charger/chg-chip.yaml @@ -1,20 +1,9 @@ -# Copyright (c) 2022 The Chromium OS Authors +# Copyright 2022 The ChromiumOS Authors # SPDX-License-Identifier: Apache-2.0 description: Charger chip -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with charger chip - - i2c-addr-flags: - type: string - required: false - description: | - I2C address of charger chip +include: i2c-device.yaml # Example # The charger chips nodes have to be placed under the USB-C @@ -30,28 +19,30 @@ properties: # port0@0 { # compatible = "named-usbc-port"; # reg = <0>; -# bc12 { -# compatible = "pericom,pi3usb9201"; -# port = <&i2c_ec_i2c_usb_c0>; -# }; -# chg { -# compatible = "siliconmitus,sm5803"; -# status = "okay"; -# port = <&i2c_ec_i2c_usb_c0>; -# }; +# bc12 = <&bc12_port0>; +# chg = <&chg_port0>; # }; # port1@1 { # compatible = "named-usbc-port"; # reg = <1>; -# bc12 { -# compatible = "pericom,pi3usb9201"; -# port = <&i2c_ec_i2c_sub_usb_c1>; -# }; -# chg { -# compatible = "siliconmitus,sm5803"; -# status = "okay"; -# port = <&i2c_ec_i2c_sub_usb_c1>; -# }; +# bc12 = <&bc12_port1>; +# chg = <&chg_port1>; +# }; +# }; +# +# &i2c5 { +# chg_port0: sm5803@32 { +# compatible = "siliconmitus,sm5803"; +# status = "okay"; +# reg = <0x32>; +# }; +# }; +# +# &i2c4 { +# chg_port1: sm5803@32 { +# compatible = "siliconmitus,sm5803"; +# status = "okay"; +# reg = <0x32>; # }; # }; # @@ -63,23 +54,19 @@ properties: # port0@0 { # compatible = "named-usbc-port"; # reg = <0>; -# bc12 { -# compatible = "pericom,pi3usb9201"; -# port = <&i2c_ec_i2c_usb_c0>; -# }; -# chg { -# compatible = "siliconmitus,sm5803"; -# status = "okay"; -# port = <&i2c_ec_i2c_usb_c0>; -# }; +# chg = <&charger>; # }; # port1@1 { # compatible = "named-usbc-port"; # reg = <1>; -# bc12 { -# compatible = "pericom,pi3usb9201"; -# port = <&i2c_ec_i2c_sub_usb_c1>; -# }; +# bc12 = <&bc12_port1>; +# }; +# }; +# +# &i2c5 { +# charger: sm5803@32 { +# compatible = "siliconmitus,sm5803"; +# status = "okay"; +# reg = <0x32>; # }; # }; - diff --git a/zephyr/dts/bindings/charger/intersil,isl923x.yaml b/zephyr/dts/bindings/charger/intersil,isl923x.yaml index 2da947fea8..a9c2e8f814 100644 --- a/zephyr/dts/bindings/charger/intersil,isl923x.yaml +++ b/zephyr/dts/bindings/charger/intersil,isl923x.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/charger/intersil,isl9241.yaml b/zephyr/dts/bindings/charger/intersil,isl9241.yaml index 567c2077a6..7423e46a23 100644 --- a/zephyr/dts/bindings/charger/intersil,isl9241.yaml +++ b/zephyr/dts/bindings/charger/intersil,isl9241.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/charger/richtek,rt9490.yaml b/zephyr/dts/bindings/charger/richtek,rt9490.yaml index 96d8b81fa0..ecd25696f3 100644 --- a/zephyr/dts/bindings/charger/richtek,rt9490.yaml +++ b/zephyr/dts/bindings/charger/richtek,rt9490.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,3 +7,8 @@ description: Richtek RT9490 Charger compatible: "richtek,rt9490" include: chg-chip.yaml + +properties: + thermistor: + type: phandle + description: Underlying thermistor device to measure temperature diff --git a/zephyr/dts/bindings/charger/siliconmitus,sm5803.yaml b/zephyr/dts/bindings/charger/siliconmitus,sm5803.yaml index 9aac5f3d8b..20d88d1659 100644 --- a/zephyr/dts/bindings/charger/siliconmitus,sm5803.yaml +++ b/zephyr/dts/bindings/charger/siliconmitus,sm5803.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/charger/ti,bq25710.yaml b/zephyr/dts/bindings/charger/ti,bq25710.yaml index 2ebf194b77..d0bc20a015 100644 --- a/zephyr/dts/bindings/charger/ti,bq25710.yaml +++ b/zephyr/dts/bindings/charger/ti,bq25710.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/console/ec-console.yaml b/zephyr/dts/bindings/console/ec-console.yaml index f79ddd67b0..0f46524a39 100644 --- a/zephyr/dts/bindings/console/ec-console.yaml +++ b/zephyr/dts/bindings/console/ec-console.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml b/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml index 8b12473d0a..a8824c3fb1 100644 --- a/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml +++ b/zephyr/dts/bindings/cros_bbram/named-bbram-regions.yaml @@ -1,4 +1,4 @@ -# Copyright (c) 2021 Google Inc. +# Copyright 2021 Google LLC # SPDX-License-Identifier: Apache-2.0 description: Named battery-backed RAM parent node diff --git a/zephyr/dts/bindings/cros_dbg/nuvoton,npcx-cros-dbg.yaml b/zephyr/dts/bindings/cros_dbg/nuvoton,npcx-cros-dbg.yaml index c3a9937d45..0cdfd41e31 100644 --- a/zephyr/dts/bindings/cros_dbg/nuvoton,npcx-cros-dbg.yaml +++ b/zephyr/dts/bindings/cros_dbg/nuvoton,npcx-cros-dbg.yaml @@ -1,4 +1,4 @@ -# Copyright (c) 2021 Google Inc. +# Copyright 2021 Google LLC # SPDX-License-Identifier: Apache-2.0 description: Nuvoton, NPCX Debug Interface diff --git a/zephyr/dts/bindings/cros_displight/cros-ec,displight.yaml b/zephyr/dts/bindings/cros_displight/cros-ec,displight.yaml index df51bf19dc..1ce1892fd2 100644 --- a/zephyr/dts/bindings/cros_displight/cros-ec,displight.yaml +++ b/zephyr/dts/bindings/cros_displight/cros-ec,displight.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -14,11 +14,6 @@ properties: required: true description: PWM controlling the display backlight level. - frequency: - type: int - required: true - description: PWM frequency in Hz. - generic-pwm-channel: type: int required: false diff --git a/zephyr/dts/bindings/cros_flash/cros-ec,flash-layout.yaml b/zephyr/dts/bindings/cros_flash/cros-ec,flash-layout.yaml index 991f3c71cf..0ec9bdfbb0 100644 --- a/zephyr/dts/bindings/cros_flash/cros-ec,flash-layout.yaml +++ b/zephyr/dts/bindings/cros_flash/cros-ec,flash-layout.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cros_flash/cros-flash-controller.yaml b/zephyr/dts/bindings/cros_flash/cros-flash-controller.yaml index b9c8a9f149..9469a02004 100644 --- a/zephyr/dts/bindings/cros_flash/cros-flash-controller.yaml +++ b/zephyr/dts/bindings/cros_flash/cros-flash-controller.yaml @@ -6,7 +6,3 @@ include: base.yaml bus: crosflash - -properties: - label: - required: true diff --git a/zephyr/dts/bindings/cros_flash/microchip,xec-cros-flash.yaml b/zephyr/dts/bindings/cros_flash/microchip,xec-cros-flash.yaml index 2b9aea1554..a5c1155b9e 100644 --- a/zephyr/dts/bindings/cros_flash/microchip,xec-cros-flash.yaml +++ b/zephyr/dts/bindings/cros_flash/microchip,xec-cros-flash.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cros_kb_raw/cros-kb-raw-controller.yaml b/zephyr/dts/bindings/cros_kb_raw/cros-kb-raw-controller.yaml deleted file mode 100644 index e8c95419e1..0000000000 --- a/zephyr/dts/bindings/cros_kb_raw/cros-kb-raw-controller.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2020 Google LLC -# SPDX-License-Identifier: Apache-2.0 - -# Common fields for Chrome OS raw keyboard devices - -include: base.yaml - -bus: croskb - -properties: - label: - required: true diff --git a/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml b/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml index 9c1d635b61..a03da035b1 100644 --- a/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml +++ b/zephyr/dts/bindings/cros_kb_raw/ite,it8xxx2-cros-kb-raw.yaml @@ -5,7 +5,7 @@ description: ITE, it8xxx2-cros-kb-raw node compatible: "ite,it8xxx2-cros-kb-raw" -include: cros-kb-raw-controller.yaml +include: base.yaml properties: reg: diff --git a/zephyr/dts/bindings/cros_kb_raw/microchip,xec-cros-kb-raw.yaml b/zephyr/dts/bindings/cros_kb_raw/microchip,xec-cros-kb-raw.yaml index 79ca1dda4a..9ad5a50bfd 100644 --- a/zephyr/dts/bindings/cros_kb_raw/microchip,xec-cros-kb-raw.yaml +++ b/zephyr/dts/bindings/cros_kb_raw/microchip,xec-cros-kb-raw.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,7 +6,7 @@ description: Microchip, xec-cros-kb-raw node compatible: "microchip,xec-cros-kb-raw" -include: [cros-kb-raw-controller.yaml, pinctrl-device.yaml] +include: [base.yaml, pinctrl-device.yaml] properties: reg: diff --git a/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml b/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml index 241cd11cbf..dbecfb0502 100644 --- a/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml +++ b/zephyr/dts/bindings/cros_kb_raw/nuvoton,npcx-cros-kb-raw.yaml @@ -5,7 +5,7 @@ description: Nuvoton, NPCX-cros-kb-raw node compatible: "nuvoton,npcx-cros-kb-raw" -include: [cros-kb-raw-controller.yaml, pinctrl-device.yaml] +include: [base.yaml, pinctrl-device.yaml] properties: reg: diff --git a/zephyr/dts/bindings/cros_mkbp_event/ec-mkbp-event.yaml b/zephyr/dts/bindings/cros_mkbp_event/ec-wake-mask-event.yaml index d3ec3c8ff5..04e95ea829 100644 --- a/zephyr/dts/bindings/cros_mkbp_event/ec-mkbp-event.yaml +++ b/zephyr/dts/bindings/cros_mkbp_event/ec-wake-mask-event.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cros_rtc/cros-rtc.yaml b/zephyr/dts/bindings/cros_rtc/cros-rtc.yaml deleted file mode 100644 index f754826404..0000000000 --- a/zephyr/dts/bindings/cros_rtc/cros-rtc.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2021 Google LLC -# SPDX-License-Identifier: Apache-2.0 - -# Common fields for Chrome OS RTC devices - -include: base.yaml - -bus: crosrtc - -properties: - label: - required: true diff --git a/zephyr/dts/bindings/cros_rtc/microchip,xec-cros-rtc.yaml b/zephyr/dts/bindings/cros_rtc/microchip,xec-cros-rtc.yaml index 6b22559d01..f22b26c2ec 100644 --- a/zephyr/dts/bindings/cros_rtc/microchip,xec-cros-rtc.yaml +++ b/zephyr/dts/bindings/cros_rtc/microchip,xec-cros-rtc.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cros_rtc/nuvoton,npcx-cros-mtc.yaml b/zephyr/dts/bindings/cros_rtc/nuvoton,npcx-cros-mtc.yaml index 547b6897e8..3db0880e75 100644 --- a/zephyr/dts/bindings/cros_rtc/nuvoton,npcx-cros-mtc.yaml +++ b/zephyr/dts/bindings/cros_rtc/nuvoton,npcx-cros-mtc.yaml @@ -11,9 +11,6 @@ properties: reg: required: true - label: - required: true - mtc-alarm: type: phandle required: true diff --git a/zephyr/dts/bindings/cros_rtc/nxp,rtc-pcf85063a.yaml b/zephyr/dts/bindings/cros_rtc/nxp,rtc-pcf85063a.yaml index 8b881d2f2c..db6f3f9685 100644 --- a/zephyr/dts/bindings/cros_rtc/nxp,rtc-pcf85063a.yaml +++ b/zephyr/dts/bindings/cros_rtc/nxp,rtc-pcf85063a.yaml @@ -8,9 +8,6 @@ compatible: "nxp,rtc-pcf85063a" include: [base.yaml, i2c-device.yaml] properties: - label: - required: true - int-pin: type: phandle required: true diff --git a/zephyr/dts/bindings/cros_rtc/renesas,rtc-idt1337ag.yaml b/zephyr/dts/bindings/cros_rtc/renesas,rtc-idt1337ag.yaml index ad4e5ce891..c2643f0e84 100644 --- a/zephyr/dts/bindings/cros_rtc/renesas,rtc-idt1337ag.yaml +++ b/zephyr/dts/bindings/cros_rtc/renesas,rtc-idt1337ag.yaml @@ -8,9 +8,6 @@ compatible: "renesas,rtc-idt1337ag" include: [base.yaml, i2c-device.yaml] properties: - label: - required: true - int-pin: type: phandle required: true diff --git a/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml index 0ad49f1487..2e2c6b74a5 100644 --- a/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml +++ b/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml index 0761ba3526..9a5596bd4c 100644 --- a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml +++ b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml @@ -1,4 +1,4 @@ -# Copyright (c) 2021 Google Inc. +# Copyright 2021 Google LLC # SPDX-License-Identifier: Apache-2.0 description: Nuvoton, NPCX Serial Host Interface (SHI) node diff --git a/zephyr/dts/bindings/emul/cros,bb-retimer-emul.yaml b/zephyr/dts/bindings/emul/cros,bb-retimer-emul.yaml index 007a73b17b..11dd5f5218 100644 --- a/zephyr/dts/bindings/emul/cros,bb-retimer-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,bb-retimer-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/cros,clock-control-emul.yaml b/zephyr/dts/bindings/emul/cros,clock-control-emul.yaml index fa632ea2d4..746c883942 100644 --- a/zephyr/dts/bindings/emul/cros,clock-control-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,clock-control-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/cros,i2c-mock.yaml b/zephyr/dts/bindings/emul/cros,i2c-mock.yaml index 7da69028bd..11dbb62b45 100644 --- a/zephyr/dts/bindings/emul/cros,i2c-mock.yaml +++ b/zephyr/dts/bindings/emul/cros,i2c-mock.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,6 +7,7 @@ description: A generic I2C mock compatible: "cros,i2c-mock" include: base.yaml + properties: reg: required: true diff --git a/zephyr/dts/bindings/emul/cros,isl923x-emul.yaml b/zephyr/dts/bindings/emul/cros,isl923x-emul.yaml index 81663b5509..10ad8d1ba9 100644 --- a/zephyr/dts/bindings/emul/cros,isl923x-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,isl923x-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,6 +7,7 @@ description: ISL923X Charger emulator compatible: "cros,isl923x-emul" include: base.yaml + properties: reg: required: true diff --git a/zephyr/dts/bindings/emul/cros,lis2dw12-emul.yaml b/zephyr/dts/bindings/emul/cros,lis2dw12-emul.yaml index 44c29fbe56..f0a8632c18 100644 --- a/zephyr/dts/bindings/emul/cros,lis2dw12-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,lis2dw12-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,6 +7,7 @@ description: CROS implementation of the LIS2DW12 emulator compatible: "cros,lis2dw12-emul" include: base.yaml + properties: reg: required: true diff --git a/zephyr/dts/bindings/emul/cros,ln9310-emul.yaml b/zephyr/dts/bindings/emul/cros,ln9310-emul.yaml index ba37836fb5..7f086cd5f2 100644 --- a/zephyr/dts/bindings/emul/cros,ln9310-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,ln9310-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -16,4 +16,3 @@ properties: description: GPIO that receives interrupt signal from this device. required: true - diff --git a/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml b/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml index e2d45ca52f..31e53903d2 100644 --- a/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,15 +6,9 @@ description: Zephyr PS8xxx emulator compatible: "cros,ps8xxx-emul" -include: base.yaml +include: tcpci.yaml properties: - tcpci-i2c: - type: phandle - required: true - description: - Base TCPCI emulator. Has to be sibling of PS8xxx emulator. - p0-i2c-addr: type: int required: true diff --git a/zephyr/dts/bindings/emul/cros,pwm-mock.yaml b/zephyr/dts/bindings/emul/cros,pwm-mock.yaml new file mode 100644 index 0000000000..3b3a992cd0 --- /dev/null +++ b/zephyr/dts/bindings/emul/cros,pwm-mock.yaml @@ -0,0 +1,15 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: A generic PWM mock +compatible: "cros,pwm-mock" +include: [pwm-controller.yaml, base.yaml] +properties: + reg: + required: true + +pwm-cells: + - channel + - period + - flags diff --git a/zephyr/dts/bindings/emul/cros,sn5s330.yaml b/zephyr/dts/bindings/emul/cros,sn5s330-emul.yaml index 0cfe3ebe9c..cbdf320bc1 100644 --- a/zephyr/dts/bindings/emul/cros,sn5s330.yaml +++ b/zephyr/dts/bindings/emul/cros,sn5s330-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/cros,tcpci-generic-emul.yaml b/zephyr/dts/bindings/emul/cros,tcpci-generic-emul.yaml new file mode 100644 index 0000000000..73d115f5ed --- /dev/null +++ b/zephyr/dts/bindings/emul/cros,tcpci-generic-emul.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Zephyr TCPCI Generic Emulator + +compatible: "cros,tcpci-generic-emul" + +include: tcpci.yaml diff --git a/zephyr/dts/bindings/emul/cros-ec,flash-emul.yaml b/zephyr/dts/bindings/emul/cros-ec,flash-emul.yaml index 490258e8a9..c6a20f9991 100644 --- a/zephyr/dts/bindings/emul/cros-ec,flash-emul.yaml +++ b/zephyr/dts/bindings/emul/cros-ec,flash-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/cros-ec,kb-raw-emul.yaml b/zephyr/dts/bindings/emul/cros-ec,kb-raw-emul.yaml index 781f1498d7..f6821dbc2b 100644 --- a/zephyr/dts/bindings/emul/cros-ec,kb-raw-emul.yaml +++ b/zephyr/dts/bindings/emul/cros-ec,kb-raw-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,7 +6,7 @@ description: Emulator for Chromiumos EC raw keyboard driver. compatible: "cros-ec,kb-raw-emul" -include: cros-kb-raw-controller.yaml +include: base.yaml properties: rows: diff --git a/zephyr/dts/bindings/emul/cros-ec,rtc-emul.yaml b/zephyr/dts/bindings/emul/cros-ec,rtc-emul.yaml new file mode 100644 index 0000000000..d3efd6835f --- /dev/null +++ b/zephyr/dts/bindings/emul/cros-ec,rtc-emul.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Emulator for Chromiumos EC flash driver. + +compatible: "cros-ec,rtc-emul" + +include: base.yaml diff --git a/zephyr/dts/bindings/emul/cros,tcpci-emul.yaml b/zephyr/dts/bindings/emul/tcpci.yaml index 3b218acd62..9f825c5dda 100644 --- a/zephyr/dts/bindings/emul/cros,tcpci-emul.yaml +++ b/zephyr/dts/bindings/emul/tcpci.yaml @@ -1,10 +1,8 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -description: Zephyr TCPCI Emulator - -compatible: "cros,tcpci-emul" +description: Common TCPCI properties include: base.yaml diff --git a/zephyr/dts/bindings/emul/zephyr,bma255.yaml b/zephyr/dts/bindings/emul/zephyr,bma255.yaml index 40750196c1..3f504e05a5 100644 --- a/zephyr/dts/bindings/emul/zephyr,bma255.yaml +++ b/zephyr/dts/bindings/emul/zephyr,bma255.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/zephyr,bmi.yaml b/zephyr/dts/bindings/emul/zephyr,bmi.yaml index a754287bcc..6280d5cc39 100644 --- a/zephyr/dts/bindings/emul/zephyr,bmi.yaml +++ b/zephyr/dts/bindings/emul/zephyr,bmi.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/zephyr,pi3usb9201.yaml b/zephyr/dts/bindings/emul/zephyr,pi3usb9201-emul.yaml index 856703e9d7..1f26a62f73 100644 --- a/zephyr/dts/bindings/emul/zephyr,pi3usb9201.yaml +++ b/zephyr/dts/bindings/emul/zephyr,pi3usb9201-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/zephyr,smart-battery.yaml b/zephyr/dts/bindings/emul/zephyr,smart-battery.yaml index cc1d2f368d..4c46fd4f64 100644 --- a/zephyr/dts/bindings/emul/zephyr,smart-battery.yaml +++ b/zephyr/dts/bindings/emul/zephyr,smart-battery.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -153,3 +153,9 @@ properties: required: false default: "LION" description: Manufacturer data. Length has to be smaller than 32 bytes. + + mf-info: + type: string + required: false + default: "LION" + description: Manufacturer info. Length has to be smaller than 32 bytes. diff --git a/zephyr/dts/bindings/emul/zephyr,syv682x.yaml b/zephyr/dts/bindings/emul/zephyr,syv682x-emul.yaml index 8652b42b82..2ad9241f96 100644 --- a/zephyr/dts/bindings/emul/zephyr,syv682x.yaml +++ b/zephyr/dts/bindings/emul/zephyr,syv682x-emul.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/emul/zephyr,tcs3400.yaml b/zephyr/dts/bindings/emul/zephyr,tcs3400.yaml index a4474ec279..f214a21064 100644 --- a/zephyr/dts/bindings/emul/zephyr,tcs3400.yaml +++ b/zephyr/dts/bindings/emul/zephyr,tcs3400.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/fan/cros-ec,fans.yaml b/zephyr/dts/bindings/fan/cros-ec,fans.yaml index ee1d8be891..9aa6317f61 100644 --- a/zephyr/dts/bindings/fan/cros-ec,fans.yaml +++ b/zephyr/dts/bindings/fan/cros-ec,fans.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -29,10 +29,6 @@ child-binding: required: true description: PWM channel to control the fan - pwm-frequency: - type: int - description: - PWM frequency in Hz. tach: type: phandle required: false diff --git a/zephyr/dts/bindings/gpio/gpio-id.yaml b/zephyr/dts/bindings/gpio/cros-ec,gpio-id.yaml index 24322b3de8..689171c1d4 100644 --- a/zephyr/dts/bindings/gpio/gpio-id.yaml +++ b/zephyr/dts/bindings/gpio/cros-ec,gpio-id.yaml @@ -1,6 +1,6 @@ description: Defines board version and sku id gpios -compatible: cros-ec,gpio-id +compatible: "cros-ec,gpio-id" properties: bits: diff --git a/zephyr/dts/bindings/gpio/cros-ec,gpio-interrupts.yaml b/zephyr/dts/bindings/gpio/cros-ec,gpio-interrupts.yaml index 56cf17a5a1..bb6b4001f4 100644 --- a/zephyr/dts/bindings/gpio/cros-ec,gpio-interrupts.yaml +++ b/zephyr/dts/bindings/gpio/cros-ec,gpio-interrupts.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/zephyr/dts/bindings/gpio/hibernate-wake-pins.yaml b/zephyr/dts/bindings/gpio/cros-ec,hibernate-wake-pins.yaml index 0d79efa79d..a6cb488c48 100644 --- a/zephyr/dts/bindings/gpio/hibernate-wake-pins.yaml +++ b/zephyr/dts/bindings/gpio/cros-ec,hibernate-wake-pins.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/gpio/cros-ec,usba-port-enable-pins.yaml b/zephyr/dts/bindings/gpio/cros-ec,usba-port-enable-pins.yaml index 8ee2a380f3..92532c1893 100644 --- a/zephyr/dts/bindings/gpio/cros-ec,usba-port-enable-pins.yaml +++ b/zephyr/dts/bindings/gpio/cros-ec,usba-port-enable-pins.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index bdfb1fba1c..8252ca75e1 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -4,12 +4,17 @@ properties: type: string description: Enum used in code. - These names should only be used for legacy common code. + These names MUST ONLY be referenced by legacy code that is + included with Zephyr projects. Some development boards like trogdor, volteer etc. shim in the older baseboard/board headers and code, so they are also using most of these names. When these boards get removed, these names can be removed + + Do not add any more names to this list. Please remove + any names that are not referenced by Zephyr projects (or + are not in included common legacy code) enum: - GPIO_AC_PRESENT - GPIO_AP_EC_SYSRST_ODL @@ -42,8 +47,6 @@ properties: - GPIO_EN_PP3300_A - GPIO_EN_PP5000 - GPIO_EN_PP5000_A - - GPIO_EN_PP5000_USB_A0_VBUS - - GPIO_EN_PP5000_USB_A1_VBUS - GPIO_EN_PP5000_USBA - GPIO_EN_PP5000_USBA_R - GPIO_EN_PPVAR_VCCIN @@ -128,128 +131,37 @@ properties: - GPIO_VOLUME_DOWN_L - GPIO_VOLUME_UP_L - GPIO_WARM_RESET_L - - IOEX_5V_DC_DC_MODE_CTRL - - IOEX_ATMEL_MISO - - IOEX_ATMEL_MOSI - - IOEX_ATMEL_RESET_L - - IOEX_ATMEL_SCLK - - IOEX_ATMEL_SS - - IOEX_BAT_LED_AMBER_L - - IOEX_BAT_LED_GREEN_FULL_L - - IOEX_BAT_LED_RED_L - - IOEX_BAT_LED_WHITE_L - - IOEX_BOARD_ID_DET0 - - IOEX_BOARD_ID_DET1 - - IOEX_BOARD_ID_DET2 - - IOEX_C1_CHARGER_LED_AMBER_DB - - IOEX_C1_CHARGER_LED_WHITE_DB - - IOEX_DAC_BUF1_LATCH_FAULT_L - - IOEX_DAC_BUF2_LATCH_FAULT_L - - IOEX_DONGLE_DET - - IOEX_DUT_CHG_EN - - IOEX_EN_PP3300_DP - - IOEX_EN_PP3300_ETH - - IOEX_EN_PP5000_ALT_3P3 - - IOEX_EN_PP5000_USB_A0_VBUS - - IOEX_EN_PP5000_USB_A1_VBUS_DB - - IOEX_EN_PWR_HDMI - - IOEX_EN_PWR_HDMI_DB - - IOEX_EN_USB_A0_5V - - IOEX_EN_USB_A1_5V_DB - - IOEX_EN_USB_A1_5V_DB_OPT1 - - IOEX_EN_USB_A1_5V_DB_OPT2 - - IOEX_EN_VOUT_BUF_CC1 - - IOEX_EN_VOUT_BUF_CC2 - - IOEX_FAULT_CLEAR_CC - - IOEX_HDMI_DATA_EN - - IOEX_HDMI_DATA_EN_DB - - IOEX_HDMI_POWER_EN_DB - - IOEX_HOST_CHRG_DET - - IOEX_HOST_OR_CHG_CTL - - IOEX_ID_1_USB_C0_FRS_EN - - IOEX_ID_1_USB_C0_OC_ODL - - IOEX_ID_1_USB_C0_RT_RST_ODL - - IOEX_ID_1_USB_C1_OC_ODL - - IOEX_ID_1_USB_C2_FRS_EN - - IOEX_ID_1_USB_C2_OC_ODL - - IOEX_ID_1_USB_C2_RT_RST_ODL - - IOEX_KB_BL_EN - - IOEX_LED_BLUE - - IOEX_LED_GREEN - - IOEX_LED_ORANGE - - IOEX_PP3300_DP_FAULT_L - - IOEX_PP5000_SRC_SEL - - IOEX_PPC_ID - - IOEX_PWR_LED_WHITE_L - - IOEX_SBU_FLIP_SEL - - IOEX_SBU_UART_SEL - - IOEX_SYS_PWR_IRQ_ODL - - IOEX_TCA_GPIO_DBG_LED_K_ODL - - IOEX_UART_18_SEL - - IOEX_USB3_A0_FAULT_L - - IOEX_USB3_A0_MUX_EN_L - - IOEX_USB3_A0_MUX_SEL - - IOEX_USB3_A0_PWR_EN - - IOEX_USB3_A1_FAULT_L - - IOEX_USB3_A1_MUX_SEL - - IOEX_USB3_A1_PWR_EN - - IOEX_USB_A0_CHARGE_EN_L - - IOEX_USB_A0_LIMIT_SDP - - IOEX_USB_A0_RETIMER_EN - - IOEX_USB_A0_RETIMER_RST - - IOEX_USB_A1_CHARGE_EN_DB_L - - IOEX_USB_A1_CHARGE_EN_DB_L_OPT1 - - IOEX_USB_A1_CHARGE_EN_DB_L_OPT2 - - IOEX_USB_A1_FAULT_DB_ODL - - IOEX_USB_A1_LIMIT_SDP_DB - IOEX_USB_A1_RETIMER_EN - - IOEX_USB_A1_RETIMER_EN_OPT1 - - IOEX_USB_A1_RETIMER_EN_OPT2 - - IOEX_USB_A1_RETIMER_RST - - IOEX_USB_A1_RETIMER_RST_DB - IOEX_USB_C0_BB_RETIMER_LS_EN - IOEX_USB_C0_BB_RETIMER_RST - IOEX_USB_C0_C1_OC - - IOEX_USB_C0_DATA_EN - - IOEX_USB_C0_FAULT_ODL - IOEX_USB_C0_FRS_EN - - IOEX_USB_C0_OC_ODL - - IOEX_USB_C0_PPC_EN_L + - IOEX_USB_C0_HBR_LS_EN + - IOEX_USB_C0_HBR_RST + - IOEX_USB_C0_MUX_SBU_SEL_0 + - IOEX_USB_C0_MUX_SBU_SEL_1 - IOEX_USB_C0_PPC_ILIM_3A_EN - - IOEX_USB_C0_RT_RST_ODL - IOEX_USB_C0_SBU_FLIP - IOEX_USB_C0_TCPC_FASTSW_CTL_EN - IOEX_USB_C0_USB_MUX_CNTRL_0 - IOEX_USB_C0_USB_MUX_CNTRL_1 - IOEX_USB_C1_BB_RETIMER_LS_EN - IOEX_USB_C1_BB_RETIMER_RST - - IOEX_USB_C1_DATA_EN - IOEX_USB_C1_FAULT_ODL - - IOEX_USB_C1_FRS_EN + - IOEX_USB_C1_HBR_LS_EN + - IOEX_USB_C1_HBR_RST - IOEX_USB_C1_HPD - IOEX_USB_C1_HPD_IN_DB - - IOEX_USB_C1_IN_HPD - - IOEX_USB_C1_MUX_RST_DB - - IOEX_USB_C1_OC_ODL - - IOEX_USB_C1_POWER_SWITCH_ID - - IOEX_USB_C1_PPC_EN_L - IOEX_USB_C1_PPC_ILIM_3A_EN - - IOEX_USB_C1_RT_RST_ODL - IOEX_USB_C1_SBU_FLIP - IOEX_USB_C1_TCPC_FASTSW_CTL_EN - IOEX_USB_C2_BB_RETIMER_LS_EN - IOEX_USB_C2_BB_RETIMER_RST + - IOEX_USB_C2_HBR_RST + - IOEX_USB_C2_HBR_LS_EN - IOEX_USB_C2_C3_OC - IOEX_USB_C2_FRS_EN - - IOEX_USB_C2_OC_ODL - - IOEX_USB_C2_RT_RST_ODL - - IOEX_USB_C2_USB_MUX_CNTRL_0 - - IOEX_USB_C2_USB_MUX_CNTRL_1 - IOEX_USB_C3_BB_RETIMER_LS_EN - IOEX_USB_C3_BB_RETIMER_RST - - IOEX_USB_DUTCHG_FLT_ODL - - IOEX_USBH_PWRDN_L - - IOEX_USERVO_FASTBOOT_MUX_SEL - - IOEX_USERVO_FAULT_L - - IOEX_USERVO_POWER_EN - - IOEX_VBUS_DISCHRG_EN + - IOEX_USB_C3_HBR_RST + - IOEX_USB_C3_HBR_LS_EN diff --git a/zephyr/dts/bindings/gpio/named-gpios.yaml b/zephyr/dts/bindings/gpio/named-gpios.yaml index 59ed404754..bf0ba7237e 100644 --- a/zephyr/dts/bindings/gpio/named-gpios.yaml +++ b/zephyr/dts/bindings/gpio/named-gpios.yaml @@ -10,10 +10,11 @@ child-binding: # Must name this property [..-]gpios which # is treated specially (looks for #gpio-cells # in referenced node so that cell properties can - # be specified). + # be specified). If this property does not exist, treat + # this GPIO as unimplemented. gpios: type: phandle-array - required: true + required: false "#led-pin-cells": type: int required: false @@ -27,5 +28,13 @@ child-binding: according to the flags in the gpios node. type: boolean required: false + alias: + description: + When set, defines an alias for this GPIO's enum-name. + + This is to allow common or generic names in legacy code to map + to the particular board's GPIO name. + type: string + required: false led-pin-cells: - value diff --git a/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml b/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml index bd24f32620..7d3aad07f7 100644 --- a/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml +++ b/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml @@ -1,4 +1,4 @@ -# Copyright (c) 2021 The Chromium OS Authors +# Copyright 2021 The ChromiumOS Authors # SPDX-License-Identifier: Apache-2.0 description: I2C port base properties @@ -13,55 +13,11 @@ properties: description: A port number used by remote components like Kernel via the I2C_PASSTHRU Host Command - enum-name: - type: string + enum-names: + type: string-array required: true description: Enum values used in the source code to refer to the i2c port - enum: - - I2C_PORT_ACCEL - - I2C_PORT_BATTERY - - I2C_PORT_CHARGER - - I2C_PORT_EEPROM - - I2C_PORT_EVB_0 - - I2C_PORT_EVB_1 - - I2C_PORT_EVB_2 - - I2C_PORT_EVB_3 - - I2C_PORT_EVB_7 - - I2C_PORT_KB_DISCRETE - - I2C_PORT_MP2964 - - I2C_PORT_OPT_4 - - I2C_PORT_PORT80 - - I2C_PORT_POWER - - I2C_PORT_PPC0 - - I2C_PORT_PPC1 - - I2C_PORT_RTC - - I2C_PORT_SENSOR - - I2C_PORT_TCPC0 - - I2C_PORT_TCPC1 - - I2C_PORT_THERMAL_AP - - I2C_PORT_TYPEC_0 - - I2C_PORT_TYPEC_1 - - I2C_PORT_TYPEC_2 - - I2C_PORT_TYPEC_3 - - I2C_PORT_TYPEC_AIC_1 - - I2C_PORT_TYPEC_AIC_2 - - I2C_PORT_USB_1_MIX - - I2C_PORT_USB_C0 - - I2C_PORT_USB_C0_TCPC - - I2C_PORT_USB_C0_C2_BC12 - - I2C_PORT_USB_C0_C2_MUX - - I2C_PORT_USB_C0_C2_PPC - - I2C_PORT_USB_C0_C2_TCPC - - I2C_PORT_USB_C1 - - I2C_PORT_USB_C1_BC12 - - I2C_PORT_USB_C1_PPC - - I2C_PORT_USB_C1_TCPC - - I2C_PORT_USB_MUX - - I2C_PORT_USB_MUX0 - - I2C_PORT_USB_MUX1 - - I2C_PORT_VIRTUAL_BATTERY - - I2C_PORT_WLC dynamic-speed: type: boolean required: false diff --git a/zephyr/dts/bindings/i2c/named-i2c-ports.yaml b/zephyr/dts/bindings/i2c/named-i2c-ports.yaml index 4fce9c3229..5aa95e5f65 100644 --- a/zephyr/dts/bindings/i2c/named-i2c-ports.yaml +++ b/zephyr/dts/bindings/i2c/named-i2c-ports.yaml @@ -1,4 +1,4 @@ -# Copyright (c) 2020 The Chromium OS Authors +# Copyright 2020 The ChromiumOS Authors # SPDX-License-Identifier: Apache-2.0 description: Named I2C ports parent node diff --git a/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml b/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml index 6ef25aa6bd..9b4fed524e 100644 --- a/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml +++ b/zephyr/dts/bindings/intel/intel,rvp-board-id.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/kb_discrete/ite,it8801.yaml b/zephyr/dts/bindings/kb_discrete/ite,it8801.yaml index 228b3500af..036d3d0e69 100644 --- a/zephyr/dts/bindings/kb_discrete/ite,it8801.yaml +++ b/zephyr/dts/bindings/kb_discrete/ite,it8801.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -14,6 +14,5 @@ include: i2c-device.yaml # kb_not_raw: ite-it8801@38 { # compatible = "ite,it8801"; # reg = <0x38>; -# label = "KEYBOARD_DISCRETE"; # }; # diff --git a/zephyr/dts/bindings/keyboard/cros-ec,kblight-pwm.yaml b/zephyr/dts/bindings/keyboard/cros-ec,kblight-pwm.yaml index 33607729cd..9cf862a555 100644 --- a/zephyr/dts/bindings/keyboard/cros-ec,kblight-pwm.yaml +++ b/zephyr/dts/bindings/keyboard/cros-ec,kblight-pwm.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -14,11 +14,6 @@ properties: required: true description: PWM controlling the Keyboard backlight level. - frequency: - type: int - required: true - description: PWM frequency in Hz. - generic-pwm-channel: type: int required: false diff --git a/zephyr/dts/bindings/keyboard/cros-keyscan.yaml b/zephyr/dts/bindings/keyboard/cros-keyscan.yaml index 11caf7fd11..a2ec2afc46 100644 --- a/zephyr/dts/bindings/keyboard/cros-keyscan.yaml +++ b/zephyr/dts/bindings/keyboard/cros-keyscan.yaml @@ -1,4 +1,4 @@ - # Copyright 2021 The Chromium OS Authors. All rights reserved. + # Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/led/cros-ec,pwm-leds.yaml b/zephyr/dts/bindings/led/cros-ec,pwm-leds.yaml index f854f84d50..1d94ec1b6f 100644 --- a/zephyr/dts/bindings/led/cros-ec,pwm-leds.yaml +++ b/zephyr/dts/bindings/led/cros-ec,pwm-leds.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -41,7 +41,7 @@ properties: pwmleds { compatible = "pwm-leds"; pwm_sidesel: pwm_sidesel { - pwms = <&pwm7 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; + pwms = <&pwm7 0 PWM_HZ(2400) PWM_POLARITY_INVERTED>; }; }; cros-pwmleds { @@ -49,13 +49,6 @@ properties: sidesel = <&pwm_sidesel>; }; - frequency: - type: int - required: true - description: | - PWM frequency in Hz for LEDs. SIDESEL, if present, uses half the - frequency. - color-map-red: type: array required: false diff --git a/zephyr/dts/bindings/led/maxim,seven-seg-display.yaml b/zephyr/dts/bindings/led/maxim,seven-seg-display.yaml index 9307edad34..d66a0cdca2 100644 --- a/zephyr/dts/bindings/led/maxim,seven-seg-display.yaml +++ b/zephyr/dts/bindings/led/maxim,seven-seg-display.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/leds/cros-ec,gpio-led-pins.yaml b/zephyr/dts/bindings/leds/cros-ec,gpio-led-pins.yaml index 53688a8172..2e5fe7cff0 100644 --- a/zephyr/dts/bindings/leds/cros-ec,gpio-led-pins.yaml +++ b/zephyr/dts/bindings/leds/cros-ec,gpio-led-pins.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,20 +7,24 @@ description: GPIO LED pins parent node compatible: "cros-ec,gpio-led-pins" child-binding: - description: Each child node describes all the GPIO pins that need to be - altered to set a specific color. Eg. for a board supporting - Blue and Amber LEDs - to set LED_AMBER color, amber LED will - need to be set to 1 and blue LED to 0. So a node looks like - color-amber { - led-color = "LED_AMBER"; - led-pins = <&gpio_ec_chg_led_y_c1 1>, - <&gpio_ec_chg_led_b_c1 0>; - }; + description: | + Each child node describes all the GPIO pins that need to be altered to set + a specific color. + e.g. For a board supporting Blue and Amber LEDs - to set LED_AMBER color, + amber LED will need to be set to 1 and blue LED to 0. 1 always turns on + the LED and 0 always turns off the LED. So a node looks like + color-amber { + led-color = "LED_AMBER"; + led-pins = <&gpio_ec_chg_led_y_c1 1>, + <&gpio_ec_chg_led_b_c1 0>; + }; properties: led-color: type: string required: true - description: Used to link the color nodes with the pin nodes + description: | + This property is used to identify pin nodes based on color enum. + It is required by the EC_CMD_LED_CONTROL host command. enum: - LED_OFF - LED_RED @@ -32,10 +36,9 @@ child-binding: led-id: type: string required: true - description: Used to link the color nodes with the pin nodes in - case of multiple LEDs. Also required by ectool to - identify led-ids supported. It needs to match the - enum names defined in ec_commands.h + description: | + This property is required by the EC_CMD_LED_CONTROL host command. + It must match the enum names defined in ec_commands.h. enum: - EC_LED_ID_BATTERY_LED - EC_LED_ID_POWER_LED @@ -47,8 +50,9 @@ child-binding: br-color: type: string required: false - description: This is used in the ectool brightness range APIs. - It needs to match the enum names defined in ec_commands.h + description: | + This is used in the ectool brightness range APIs. It must match + the enum names defined in ec_commands.h. enum: - EC_LED_COLOR_RED - EC_LED_COLOR_GREEN @@ -58,4 +62,9 @@ child-binding: - EC_LED_COLOR_AMBER led-pins: type: phandle-array - required: false + required: true + description: | + This property is used to specify an array of gpio pins and + corresponding values to enable a particular color. + e.g. Amber color - led-pins = <&gpio_ec_chg_led_y_c1 1>, + <&gpio_ec_chg_led_b_c1 0>; diff --git a/zephyr/dts/bindings/leds/cros-ec,led-colors.yaml b/zephyr/dts/bindings/leds/cros-ec,led-colors.yaml deleted file mode 100644 index cd10ca9a60..0000000000 --- a/zephyr/dts/bindings/leds/cros-ec,led-colors.yaml +++ /dev/null @@ -1,94 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: LED colors parent node - -compatible: "cros-ec,led-colors" - -child-binding: - description: LED Color nodes to describe the policy combination a node - depends on, and the color to set to for that combination. - e.g. If Blue color needs to be set for charge state discharge - in S0, a node looks like - power-state-discharge-s0 { - charge-state = "PWR_STATE_DISCHARGE"; - chipset-state = "POWER_S0"; - color-0 { - led-color = "LED_BLUE"; - }; - }; - - properties: - charge-state: - description: If the LED color depends on charge state, this - property is used to describe it. - type: string - required: false - enum: - - PWR_STATE_CHARGE - - PWR_STATE_DISCHARGE - - PWR_STATE_ERROR - - PWR_STATE_IDLE - - PWR_STATE_CHARGE_NEAR_FULL - - charge-port: - description: If the LED color depends on the charging port (left or right) - type: int - required: false - - chipset-state: - description: If the LED color depends on chipset state, this - property is used to describe it. - type: string - required: false - enum: - - POWER_S0 - - POWER_S3 - - POWER_S5 - - batt-lvl: - description: If the LED color depends on current battery level, this property - is used to describe the batt_lvl range using closed interval [x,y]. - Use the macros defined in dt-bindings/battery.h. - e.g. <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW> describes battery level - range of BATTERY_LEVEL_EMPTY to BATTERY_LEVEL_LOW inclusive. - type: array - required: false - - extra-flag: - description: If the LED color depends on additional factors - type: string - required: false - enum: - - NONE - - LED_CHFLAG_FORCE_IDLE - - LED_CHFLAG_DEFAULT - - child-binding: - description: Color enum - properties: - led-color: - description: Handle to LED pins node that describes pins to set - to enable a particular color - type: phandle - required: true - period-ms: - description: In case of blinking LEDs, amount of time in msecs - the LED color is active. This value must be a - multiple of HOOK_TICK_INTERVAL_MS - e.g. - power-state-error { - charge-state = "PWR_STATE_ERROR"; - /* One sec Amber, one sec Off */ - color-0 { - led-color = "LED_AMBER"; - period-ms = <1000>; - }; - color-1 { - led-color = "LED_OFF"; - period-ms = <1000>; - }; - }; - type: int - required: false diff --git a/zephyr/dts/bindings/leds/cros-ec,led-policy.yaml b/zephyr/dts/bindings/leds/cros-ec,led-policy.yaml new file mode 100644 index 0000000000..7bdcbd863e --- /dev/null +++ b/zephyr/dts/bindings/leds/cros-ec,led-policy.yaml @@ -0,0 +1,102 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: LED policy parent node + +compatible: "cros-ec,led-policy" + +child-binding: + description: | + LED policy nodes to describe the policy combination a node depends on, and + the color to set to for that combination. + e.g. If Blue color needs to be set for charge state discharge in S0, a + node looks like + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + charge-port = <0>; + color-0 { + led-color = <&color_blue>; + }; + }; + + properties: + charge-state: + description: | + If the LED color depends on charge state, this property is used + to describe it. + PWR_STATE_CHARGE - AC is connected, battery is charging. + PWR_STATE_DISCHARGE - AC is not connected, battery is discharging. + PWR_STATE_ERROR - Battery is in error state. + PWR_STATE_IDLE - AC is connected, battery is not charging. + PWR_STATE_FORCED_IDLE - AC is connected, battery is not charging. + Used during factory testing. + PWR_STATE_CHARGE_NEAR_FULL - AC is connected, battery is charging + and close to fully charged. + type: string + required: false + enum: + - PWR_STATE_CHARGE + - PWR_STATE_DISCHARGE + - PWR_STATE_ERROR + - PWR_STATE_IDLE + - PWR_STATE_FORCED_IDLE + - PWR_STATE_CHARGE_NEAR_FULL + + charge-port: + description: | + If the LED color depends on the charging port (left or right). + type: int + required: false + + chipset-state: + description: | + If the LED color depends on chipset state, this property is used + to describe it. + type: string + required: false + enum: + - POWER_S0 + - POWER_S3 + - POWER_S5 + + batt-lvl: + description: | + If the LED color depends on current battery level, this property + is used to describe batt_lvl range using closed interval [x,y]. + Use the macros defined in dt-bindings/battery.h. + e.g. <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW> describes battery level + range of BATTERY_LEVEL_EMPTY to BATTERY_LEVEL_LOW inclusive. + type: array + required: false + + child-binding: + description: Color enum + properties: + led-color: + description: | + Handle to LED pins node that describes pins to set to enable a + particular color. + type: phandle + required: true + period-ms: + description: | + In case of blinking LEDs, amount of time in msecs the LED + color is active. This value must be a multiple of + HOOK_TICK_INTERVAL_MS. + e.g. + power-state-error { + charge-state = "PWR_STATE_ERROR"; + /* One sec Amber, one sec Off */ + color-0 { + led-color = <&color_amber>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + type: int + required: false diff --git a/zephyr/dts/bindings/leds/cros-ec,pwm-led-pins.yaml b/zephyr/dts/bindings/leds/cros-ec,pwm-led-pins.yaml index dcd06d7b96..19fee69be4 100644 --- a/zephyr/dts/bindings/leds/cros-ec,pwm-led-pins.yaml +++ b/zephyr/dts/bindings/leds/cros-ec,pwm-led-pins.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,27 +6,24 @@ description: PWM LED pins parent node compatible: "cros-ec,pwm-led-pins" -properties: - pwm-frequency: - type: int - required: true - description: PWM frequency in Hz. - child-binding: - description: Each child node describes all the PWM pins that need to be - altered to set a specific color. Eg. For blue and amber PWM - channels, in order to set color amber, a node looks like - this where 100 is PWM duty cycle in percentage - color-amber { - led-color = "LED_AMBER"; - led-pins = <&pwm_led_y 100>, - <&pwm_led_b 0>; - }; + description: | + Each child node describes all the PWM pins that need to be altered to set + a specific color. + e.g. For blue and amber PWM channels, in order to set color amber, a node + looks like this where 100 is PWM duty cycle in percentage. + color-amber { + led-color = "LED_AMBER"; + led-pins = <&pwm_led_y 100>, + <&pwm_led_b 0>; + }; properties: led-color: type: string required: true - description: Used to link the color nodes with the pin nodes + description: | + This property is used to identify pin nodes based on color enum. + It is required by the EC_CMD_LED_CONTROL host command. enum: - LED_OFF - LED_RED @@ -38,10 +35,9 @@ child-binding: led-id: type: string required: true - description: Used to link the color nodes with the pin nodes in - case of multiple LEDs. Also required by ectool to - identify led-ids supported. It needs to match the - enum names defined in ec_commands.h + description: | + This property is required by the EC_CMD_LED_CONTROL host command. + It must match the enum names defined in ec_commands.h. enum: - EC_LED_ID_BATTERY_LED - EC_LED_ID_POWER_LED @@ -53,8 +49,9 @@ child-binding: br-color: type: string required: false - description: This is used in the ectool brightness range APIs. - It needs to match the enum names defined in ec_commands.h + description: | + This is used in the ectool brightness range APIs. It must match + the enum names defined in ec_commands.h. enum: - EC_LED_COLOR_RED - EC_LED_COLOR_GREEN @@ -64,4 +61,9 @@ child-binding: - EC_LED_COLOR_AMBER led-pins: type: phandle-array - required: false + required: true + description: | + This property is used to specify an array of PWM pins and + corresponding values to enable a particular color. + e.g. Amber color - led-pins = <&pwm_led_y 100>, + <&pwm_led_b 0>; diff --git a/zephyr/dts/bindings/leds/cros-ec,pwm-led-pin-config.yaml b/zephyr/dts/bindings/leds/cros-ec,pwm-pin-config.yaml index 0813847bba..bdef6b6144 100644 --- a/zephyr/dts/bindings/leds/cros-ec,pwm-led-pin-config.yaml +++ b/zephyr/dts/bindings/leds/cros-ec,pwm-pin-config.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-mutex.yaml b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-mutex.yaml index c988af258d..17c60744c8 100644 --- a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-mutex.yaml +++ b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-mutex.yaml @@ -1,4 +1,4 @@ -# Copyright (c) 2021 The Chromium OS Authors +# Copyright 2021 The ChromiumOS Authors # SPDX-License-Identifier: Apache-2.0 description: Motion sense mutex parent node @@ -9,14 +9,6 @@ child-binding: description: A mutex node is used to create an instance of mutex_t. A mutex node is referenced by one or more sensor nodes in "/motionsense-sensors" node. - properties: - label: - required: true - type: string - description: Human readable string describing the mutex. - This is a brief explanation about the mutex. - The property is not actually used in code. - # # examples: @@ -24,11 +16,9 @@ child-binding: # motionsense-mutex { # compatible = "cros-ec,motionsense-mutex"; # mutex_bma255: bma255-mutex { -# label = "BMA255_MUTEX"; # }; # # mutex_bmi260: bmi260-mutex { -# label = "BMI260_MUTEX"; # }; # }; # diff --git a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-rotation-ref.yaml b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-rotation-ref.yaml index 7de86ec8db..da2b99e928 100644 --- a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-rotation-ref.yaml +++ b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-rotation-ref.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-config.yaml b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-config.yaml index 68cdd15637..cb0fd96d95 100644 --- a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-config.yaml +++ b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-config.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -26,17 +26,10 @@ child-binding: and it is used to indicate one of the 4 configurations. For example, node name ec-s0 is for SENSOR_CONFIG_EC_S0. ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <1000>; ec_rate = <1000>; }; properties: - label: - type: string - required: false - description: | - Human-readable string describing the config. - see the example the above. odr: type: int required: false @@ -55,11 +48,9 @@ child-binding: # compatible = # "cros-ec,motionsense-sensor-config"; # ec-s0 { -# label = "SENSOR_CONFIG_EC_S0"; # odr = <(10000 | ROUND_UP_FLAG)>; # }; # ec-s3 { -# label = "SENSOR_CONFIG_EC_S3"; # odr = <(10000 | ROUND_UP_FLAG)>; # }; # }; diff --git a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-info.yaml b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-info.yaml index 2f508777e1..b0e960e559 100644 --- a/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-info.yaml +++ b/zephyr/dts/bindings/motionsense/cros-ec,motionsense-sensor-info.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/bmi160.yaml b/zephyr/dts/bindings/motionsense/driver/bmi160.yaml index 6ca096d87a..e2c4bd6ac7 100644 --- a/zephyr/dts/bindings/motionsense/driver/bmi160.yaml +++ b/zephyr/dts/bindings/motionsense/driver/bmi160.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/bmi260.yaml b/zephyr/dts/bindings/motionsense/driver/bmi260.yaml index f308472ec3..33fd4356b8 100644 --- a/zephyr/dts/bindings/motionsense/driver/bmi260.yaml +++ b/zephyr/dts/bindings/motionsense/driver/bmi260.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/bmi3xx.yaml b/zephyr/dts/bindings/motionsense/driver/bmi3xx.yaml index bd99738afe..e9e603fc96 100644 --- a/zephyr/dts/bindings/motionsense/driver/bmi3xx.yaml +++ b/zephyr/dts/bindings/motionsense/driver/bmi3xx.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml index cbd9e82f2d..12a5be2d44 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma4xx.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma4xx.yaml index 6c912c96d4..b17b372af1 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma4xx.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma4xx.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-accel.yaml index 4eabf12cd5..cb574c6c0c 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-accel.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-accel.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-gyro.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-gyro.yaml index b7a0b38290..8064549e4a 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-gyro.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi160-gyro.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-accel.yaml index 130600cca2..d18feaa813 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-accel.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-accel.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-gyro.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-gyro.yaml index 00226d0304..29e87e89ee 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-gyro.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi260-gyro.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-accel.yaml index 24d28645ee..7d0f077226 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-accel.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-accel.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-gyro.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-gyro.yaml index e8792492ef..0085dc5648 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-gyro.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bmi3xx-gyro.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-accel.yaml index ba7fbb3878..7812870aee 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-accel.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-accel.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-gyro.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-gyro.yaml index 4707f33d6d..fb4739242f 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-gyro.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm42607-gyro.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-accel.yaml index fbc9f44051..d41275cdd8 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-accel.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-accel.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-gyro.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-gyro.yaml index 1f0ae26ced..bcad871fc7 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-gyro.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,icm426xx-gyro.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml index 8aecc32077..e66988502a 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,lis2dw12.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,lis2dw12.yaml index bacf8f2c75..9dd07a7b78 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,lis2dw12.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,lis2dw12.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dsm-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dsm-accel.yaml new file mode 100644 index 0000000000..25bd059906 --- /dev/null +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dsm-accel.yaml @@ -0,0 +1,13 @@ +# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: motionsense sensor node for LSM6DSM Accelerometer + +compatible: "cros-ec,lsm6dsm-accel" + +include: lsm6dsm.yaml + +properties: + default-range: + default: 4 diff --git a/zephyr/test/ap_power/BUILD.py b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dsm-gyro.yaml index e3dac8c77e..737f3a5105 100644 --- a/zephyr/test/ap_power/BUILD.py +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dsm-gyro.yaml @@ -2,6 +2,12 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -"""Register zmake project for ap_power test.""" +description: motionsense sensor node for LSM6DSM Gyro -register_host_test("ap_power", dts_overlays=["overlay.dts"]) +compatible: "cros-ec,lsm6dsm-gyro" + +include: lsm6dsm.yaml + +properties: + default-range: + default: 1000 diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-accel.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-accel.yaml index 5c3c6172f0..044c187c50 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-accel.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-accel.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-gyro.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-gyro.yaml index a10a98d97f..1a946eab98 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-gyro.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,lsm6dso-gyro.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-clear.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-clear.yaml index 323286c462..05033de35e 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-clear.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-clear.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-rgb.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-rgb.yaml index e2987cf44b..903574a7f3 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-rgb.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,tcs3400-rgb.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/icm42607.yaml b/zephyr/dts/bindings/motionsense/driver/icm42607.yaml index f47e7a2f97..4052f12fd9 100644 --- a/zephyr/dts/bindings/motionsense/driver/icm42607.yaml +++ b/zephyr/dts/bindings/motionsense/driver/icm42607.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/icm426xx.yaml b/zephyr/dts/bindings/motionsense/driver/icm426xx.yaml index 5c33931706..7f5e8e164c 100644 --- a/zephyr/dts/bindings/motionsense/driver/icm426xx.yaml +++ b/zephyr/dts/bindings/motionsense/driver/icm426xx.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/driver/lsm6dsm.yaml b/zephyr/dts/bindings/motionsense/driver/lsm6dsm.yaml new file mode 100644 index 0000000000..efd71fe181 --- /dev/null +++ b/zephyr/dts/bindings/motionsense/driver/lsm6dsm.yaml @@ -0,0 +1,19 @@ +# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# common fields for both LSM6DSM accel and gyro + +# every motionsense sensor node should include motionsense-sensor-base.yaml +include: motionsense-sensor-base.yaml + +properties: + i2c-spi-addr-flags: + type: string + description: i2c address or SPI peripheral logic GPIO + # Address is b'0110101x' where x is determined by the + # logic level on SA0 + enum: + - "LSM6DSM_ADDR0_FLAGS" + - "LSM6DSM_ADDR1_FLAGS" + default: "LSM6DSM_ADDR0_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/lsm6dso.yaml b/zephyr/dts/bindings/motionsense/driver/lsm6dso.yaml index dd345854be..565c64b1c8 100644 --- a/zephyr/dts/bindings/motionsense/driver/lsm6dso.yaml +++ b/zephyr/dts/bindings/motionsense/driver/lsm6dso.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # diff --git a/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml b/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml index ecad7ec1a7..1c2fbeccbc 100644 --- a/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml +++ b/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-channel-scale.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-channel-scale.yaml index 753edc7ea8..39f92c7a50 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-channel-scale.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-channel-scale.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,7 +6,7 @@ description: | Bindings for als_channel_scale_t in accelgyro.h. Each channel has scaling factor for normalization & cover -compatible: cros-ec,accelgyro-als-channel-scale +compatible: "cros-ec,accelgyro-als-channel-scale" properties: k-channel-scale: diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-drv-data.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-drv-data.yaml index 7d64689cf2..13a64bafb0 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-drv-data.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-als-drv-data.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-rgb-calibration.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-rgb-calibration.yaml index 4204a63cff..e0ef479ffd 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-rgb-calibration.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,accelgyro-rgb-calibration.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma255.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma255.yaml index 4cabd620da..8749d96de6 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma255.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma255.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma4xx.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma4xx.yaml index 2f00d771b3..5504b3642c 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma4xx.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bma4xx.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi160.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi160.yaml index 52f5c346fc..c4aea99ea1 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi160.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi160.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi260.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi260.yaml index 4d414121d1..a6247c6cd4 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi260.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi260.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi3xx.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi3xx.yaml index d3fa8cc009..5ca2059b3d 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi3xx.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-bmi3xx.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-icm426xx.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-icm426xx.yaml index b88ad7eacd..04ba419d69 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-icm426xx.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-icm426xx.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-kionix.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-kionix.yaml index 3151412b79..0f86616ae2 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-kionix.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-kionix.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lis2dw12.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lis2dw12.yaml index ecb182a4fd..25f47c7e96 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lis2dw12.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lis2dw12.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dsm.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dsm.yaml new file mode 100644 index 0000000000..66e6f32f60 --- /dev/null +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dsm.yaml @@ -0,0 +1,21 @@ +# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: LSM6DSM driver data node. Note this has to be + a separate instance for each sensor instance for this device + e.g if the device is used for both accel and gyro, then + separate instances of this driver data node must be used for each. + +compatible: "cros-ec,drvdata-lsm6dsm" + +include: drvdata-base.yaml + +# +# examples: +# +# lsm6dsm_data: lsm6dsm-drv-data { +# compatible = "cros-ec,drvdata-lsm6dsm"; +# status = "okay"; +# }; +# diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dso.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dso.yaml index d3a37da9a1..57f2eedf01 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dso.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-lsm6dso.yaml @@ -1,8 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -description: LSM6DSO driver data node +description: LSM6DSO driver data node. Note this has to be + a separate instance for each sensor instance for this device + e.g if the device is used for both accel and gyro, then + separate instances of this driver data node must be used for each. compatible: "cros-ec,drvdata-lsm6dso" diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-clear.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-clear.yaml index c1059d40be..6b234d4460 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-clear.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-clear.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-rgb.yaml b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-rgb.yaml index 7ae7bc5983..b81a4d6d49 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-rgb.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/cros-ec,drvdata-tcs3400-rgb.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/drvdata/drvdata-base.yaml b/zephyr/dts/bindings/motionsense/drvdata/drvdata-base.yaml index dc32d69d21..b278f26ba3 100644 --- a/zephyr/dts/bindings/motionsense/drvdata/drvdata-base.yaml +++ b/zephyr/dts/bindings/motionsense/drvdata/drvdata-base.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/motionsense/motionsense-sensor-base.yaml b/zephyr/dts/bindings/motionsense/motionsense-sensor-base.yaml index 9e4aa8e3f7..c5ef4ba192 100644 --- a/zephyr/dts/bindings/motionsense/motionsense-sensor-base.yaml +++ b/zephyr/dts/bindings/motionsense/motionsense-sensor-base.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,13 +9,6 @@ include: base.yaml properties: status: required: true - label: - type: string - required: true - description: | - Human readable string describing the motion sensor. - This is used as the name of the motion sensor. - e.g) label = "Lid Accel"; active-mask: type: string description: indicates system power state for sensor to be active @@ -53,7 +46,10 @@ properties: drv-data: type: phandle required: false - description: phandle to driver data to be used for the motion sensor + description: phandle to driver data to be used for the motion sensor. + Some drivers require this to be a global shared datas structure + used by all instances of this device, others require separate + data structures for each instance. alternate-for: type: phandle description: phandle to another sensor that can be swapped with this one @@ -73,7 +69,6 @@ properties: # compatible = "cros-ec,bma255"; # status = "okay"; # -# label = "Lid Accel"; # active-mask = "SENSOR_ACTIVE_S0_S3"; # location = "MOTIONSENSE_LOC_LID"; # mutex = <&mutex_bma255>; diff --git a/zephyr/dts/bindings/pmic/mps,mp2964.yaml b/zephyr/dts/bindings/pmic/mps,mp2964.yaml index db35aa07b2..57017992a7 100644 --- a/zephyr/dts/bindings/pmic/mps,mp2964.yaml +++ b/zephyr/dts/bindings/pmic/mps,mp2964.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/power/intel,ap-pwr-signal-base.yaml b/zephyr/dts/bindings/power/intel,ap-pwr-signal-base.yaml index 256320f85b..375d51227d 100644 --- a/zephyr/dts/bindings/power/intel,ap-pwr-signal-base.yaml +++ b/zephyr/dts/bindings/power/intel,ap-pwr-signal-base.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/power/intel,ap-pwrseq-adc.yaml b/zephyr/dts/bindings/power/intel,ap-pwrseq-adc.yaml index c3a267a19a..3dd6fabf1c 100644 --- a/zephyr/dts/bindings/power/intel,ap-pwrseq-adc.yaml +++ b/zephyr/dts/bindings/power/intel,ap-pwrseq-adc.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/power/intel,ap-pwrseq-external.yaml b/zephyr/dts/bindings/power/intel,ap-pwrseq-external.yaml index 2aaf05bf23..e0258b0f7c 100644 --- a/zephyr/dts/bindings/power/intel,ap-pwrseq-external.yaml +++ b/zephyr/dts/bindings/power/intel,ap-pwrseq-external.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/power/intel,ap-pwrseq-gpio.yaml b/zephyr/dts/bindings/power/intel,ap-pwrseq-gpio.yaml index bd550eff5e..c72b36f5d2 100644 --- a/zephyr/dts/bindings/power/intel,ap-pwrseq-gpio.yaml +++ b/zephyr/dts/bindings/power/intel,ap-pwrseq-gpio.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/power/intel,ap-pwrseq-vw.yaml b/zephyr/dts/bindings/power/intel,ap-pwrseq-vw.yaml index 12b310e383..606dd6c2b4 100644 --- a/zephyr/dts/bindings/power/intel,ap-pwrseq-vw.yaml +++ b/zephyr/dts/bindings/power/intel,ap-pwrseq-vw.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/power/intel,ap-pwrseq.yaml b/zephyr/dts/bindings/power/intel,ap-pwrseq.yaml index 64c1fc7d30..b0a0426435 100644 --- a/zephyr/dts/bindings/power/intel,ap-pwrseq.yaml +++ b/zephyr/dts/bindings/power/intel,ap-pwrseq.yaml @@ -1,4 +1,4 @@ - # Copyright 2022 The Chromium OS Authors. All rights reserved. + # Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/switchcap/switchcap-gpio.yaml b/zephyr/dts/bindings/switchcap/switchcap-gpio.yaml index 5d1a25bf94..0016401835 100644 --- a/zephyr/dts/bindings/switchcap/switchcap-gpio.yaml +++ b/zephyr/dts/bindings/switchcap/switchcap-gpio.yaml @@ -14,3 +14,9 @@ properties: required: false description: | GPIO used to read if power is good + + poff-delay-ms: + type: int + required: false + description: | + Additional power off delay required for some systems diff --git a/zephyr/dts/bindings/temp/amd,sb-tsi.yaml b/zephyr/dts/bindings/temp/amd,sb-tsi.yaml new file mode 100644 index 0000000000..f99c01081a --- /dev/null +++ b/zephyr/dts/bindings/temp/amd,sb-tsi.yaml @@ -0,0 +1,10 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: > + Properties for an Side Band Temperature Sensor Interface sensor + +compatible: "amd,sb-tsi" + +include: i2c-device.yaml diff --git a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_thermistor.yaml b/zephyr/dts/bindings/temp/cros-ec,temp-sensor-thermistor.yaml index 34acbebcae..958dbd79e9 100644 --- a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_thermistor.yaml +++ b/zephyr/dts/bindings/temp/cros-ec,temp-sensor-thermistor.yaml @@ -1,13 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. description: > Properties for a thermistor temperature sensor -include: cros_ec_temp_sensor.yaml - -compatible: cros-ec,temp-sensor-thermistor +compatible: "cros-ec,temp-sensor-thermistor" properties: adc: diff --git a/zephyr/dts/bindings/temp/cros-ec,temp-sensor-tmp112.yaml b/zephyr/dts/bindings/temp/cros-ec,temp-sensor-tmp112.yaml new file mode 100644 index 0000000000..43ab9386c9 --- /dev/null +++ b/zephyr/dts/bindings/temp/cros-ec,temp-sensor-tmp112.yaml @@ -0,0 +1,10 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: > + Properties for a TMP112 I2C temperature sensor + +compatible: "cros-ec,temp-sensor-tmp112" + +include: i2c-device.yaml diff --git a/zephyr/dts/bindings/temp/cros_ec_temp_sensor.yaml b/zephyr/dts/bindings/temp/cros-ec,temp-sensors.yaml index 393cb1be78..66c5bc955a 100644 --- a/zephyr/dts/bindings/temp/cros_ec_temp_sensor.yaml +++ b/zephyr/dts/bindings/temp/cros-ec,temp-sensors.yaml @@ -1,44 +1,22 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. description: > - Common properties for temperature sensors + Common properties for temperature sensors that are not handled by drivers. Zero values in degrees K(-273 in degrees C)in thermal thresholds will be ignored -compatible: cros-ec,temp-sensor +compatible: "cros-ec,temp-sensors" -properties: - label: - required: true - type: string - description: - Human-readable string describing the device (used as - device_get_binding() argument) - - enum-name: - type: string +child-binding: + description: Named temperature sensor node + properties: + sensor: + type: phandle required: true description: - Enum values used in the source code to refer to the temperature sensors - enum: - - TEMP_SENSOR_1 - - TEMP_SENSOR_2 - - TEMP_SENSOR_3 - - TEMP_SENSOR_4 - - TEMP_SENSOR_AMB - - TEMP_SENSOR_CHARGER - - TEMP_SENSOR_CPU - - TEMP_SENSOR_DDR_SOC - - TEMP_SENSOR_FAN - - TEMP_SENSOR_MEMORY - - TEMP_SENSOR_PP3300_REGULATOR - - TEMP_SENSOR_SOC - - TEMP_SENSOR_1_DDR_SOC - - TEMP_SENSOR_2_AMBIENT - - TEMP_SENSOR_3_CHARGER - - TEMP_SENSOR_4_WWAN + A pointer to a coresponding temperature sensor node. power-good-pin: type: phandle diff --git a/zephyr/dts/bindings/temp/cros_ec_thermistor.yaml b/zephyr/dts/bindings/temp/cros-ec,thermistor.yaml index d4bc32ed3c..3121f8a95f 100644 --- a/zephyr/dts/bindings/temp/cros_ec_thermistor.yaml +++ b/zephyr/dts/bindings/temp/cros-ec,thermistor.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,7 +7,7 @@ description: Common properties for thermistors -compatible: cros-ec,thermistor +compatible: "cros-ec,thermistor" properties: scaling-factor: diff --git a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_pct2075.yaml b/zephyr/dts/bindings/temp/cros_ec_temp_sensor_pct2075.yaml deleted file mode 100644 index a85dc1759e..0000000000 --- a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_pct2075.yaml +++ /dev/null @@ -1,39 +0,0 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: > - Properties for a PCT2075 I2C temperature sensor - -include: cros_ec_temp_sensor.yaml - -compatible: cros-ec,temp-sensor-pct2075 - -properties: - pct2075-name: - type: string - required: true - description: - Enum value to index into the PCT2075 specific sensors - enum: - - PCT2075_SOC - - PCT2075_AMB - - port: - required: true - type: phandle - description: phandle to the named i2c port - - i2c-addr-flags: - required: true - type: string - description: I2C address of chip - enum: - - PCT2075_I2C_ADDR_FLAGS0 - - PCT2075_I2C_ADDR_FLAGS1 - - PCT2075_I2C_ADDR_FLAGS2 - - PCT2075_I2C_ADDR_FLAGS3 - - PCT2075_I2C_ADDR_FLAGS4 - - PCT2075_I2C_ADDR_FLAGS5 - - PCT2075_I2C_ADDR_FLAGS6 - - PCT2075_I2C_ADDR_FLAGS7 diff --git a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_sb_tsi.yaml b/zephyr/dts/bindings/temp/cros_ec_temp_sensor_sb_tsi.yaml deleted file mode 100644 index a0772281cb..0000000000 --- a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_sb_tsi.yaml +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: > - Properties for an Side Band Temperature Sensor Interface sensor - -include: cros_ec_temp_sensor.yaml - -compatible: cros-ec,temp-sensor-sb-tsi - -properties: - port: - required: true - type: phandle - description: phandle to the sensor's i2c port diff --git a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_tmp112.yaml b/zephyr/dts/bindings/temp/cros_ec_temp_sensor_tmp112.yaml deleted file mode 100644 index 0cf05f48a0..0000000000 --- a/zephyr/dts/bindings/temp/cros_ec_temp_sensor_tmp112.yaml +++ /dev/null @@ -1,35 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: > - Properties for a TMP112 I2C temperature sensor - -include: cros_ec_temp_sensor.yaml - -compatible: cros-ec,temp-sensor-tmp112 - -properties: - tmp112-name: - type: string - required: true - description: - Enum value to index into the TMP112 specific sensors - enum: - - TMP112_SOC - - TMP112_AMB - - port: - required: true - type: phandle - description: phandle to the named i2c port - - i2c-addr-flags: - required: true - type: string - description: I2C address of chip - enum: - - TMP112_I2C_ADDR_FLAGS0 - - TMP112_I2C_ADDR_FLAGS1 - - TMP112_I2C_ADDR_FLAGS2 - - TMP112_I2C_ADDR_FLAGS3 diff --git a/zephyr/dts/bindings/temp/nxp,pct2075.yaml b/zephyr/dts/bindings/temp/nxp,pct2075.yaml new file mode 100644 index 0000000000..bca7f7125b --- /dev/null +++ b/zephyr/dts/bindings/temp/nxp,pct2075.yaml @@ -0,0 +1,10 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: > + Properties for a PCT2075 I2C temperature sensor + +compatible: "nxp,pct2075" + +include: i2c-device.yaml diff --git a/zephyr/dts/bindings/usbc/bc12/pericom,pi3usb9201.yaml b/zephyr/dts/bindings/usbc/bc12/pericom,pi3usb9201.yaml new file mode 100644 index 0000000000..841c443877 --- /dev/null +++ b/zephyr/dts/bindings/usbc/bc12/pericom,pi3usb9201.yaml @@ -0,0 +1,11 @@ +description: USBC BC1.2 + +compatible: "pericom,pi3usb9201" + +include: base.yaml + +properties: + irq: + type: phandles + description: | + GPIO interrupt from BC1.2 diff --git a/zephyr/dts/bindings/usbc/bc12/richtek,rt1718s-bc12.yaml b/zephyr/dts/bindings/usbc/bc12/richtek,rt1718s-bc12.yaml new file mode 100644 index 0000000000..6a93e78496 --- /dev/null +++ b/zephyr/dts/bindings/usbc/bc12/richtek,rt1718s-bc12.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC RT1718S BC1.2 + +compatible: "richtek,rt1718s-bc12" + +include: base.yaml diff --git a/zephyr/dts/bindings/usbc/richtek,rt1739-bc12.yaml b/zephyr/dts/bindings/usbc/bc12/richtek,rt1739-bc12.yaml index b6f44f72db..aef959bea8 100644 --- a/zephyr/dts/bindings/usbc/richtek,rt1739-bc12.yaml +++ b/zephyr/dts/bindings/usbc/bc12/richtek,rt1739-bc12.yaml @@ -1,7 +1,9 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. description: USBC BC1.2 compatible: "richtek,rt1739-bc12" + +include: base.yaml diff --git a/zephyr/dts/bindings/usbc/richtek,rt9490-bc12.yaml b/zephyr/dts/bindings/usbc/bc12/richtek,rt9490-bc12.yaml index 94496455a3..38791d65bf 100644 --- a/zephyr/dts/bindings/usbc/richtek,rt9490-bc12.yaml +++ b/zephyr/dts/bindings/usbc/bc12/richtek,rt9490-bc12.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,6 +6,8 @@ description: USBC BC1.2 compatible: "richtek,rt9490-bc12" +include: base.yaml + properties: irq: type: phandles diff --git a/zephyr/dts/bindings/usbc/cros-ec,tcpci.yaml b/zephyr/dts/bindings/usbc/cros-ec,tcpci.yaml deleted file mode 100644 index a3c36d9ded..0000000000 --- a/zephyr/dts/bindings/usbc/cros-ec,tcpci.yaml +++ /dev/null @@ -1,16 +0,0 @@ -description: USBC TCPC - -compatible: "cros-ec,tcpci" - -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller - - i2c-addr-flags: - type: int - required: true - description: | - I2C address of controller diff --git a/zephyr/dts/bindings/usbc/cros-ec,usb-mux-chain.yaml b/zephyr/dts/bindings/usbc/cros-ec,usb-mux-chain.yaml new file mode 100644 index 0000000000..398d7255ac --- /dev/null +++ b/zephyr/dts/bindings/usbc/cros-ec,usb-mux-chain.yaml @@ -0,0 +1,47 @@ +# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USB-C muxes chain + +compatible: "cros-ec,usb-mux-chain" + +properties: + usb-muxes: + type: phandles + required: true + description: | + List of USB-C muxes and retimers for the USB-C port. The USB-C subsystem + traverses this list in the order specified. The phandles are references to + cros-ec,usbc-mux nodes. Link this mux chain with a specific USB-C port by + adding the "cros-ec,usb-mux-chain" as a child of the "named-usbc-port" + node. + + alternative-chain: + type: boolean + description: | + Set if this is alternative USB-C muxes chain. It can be selected in + runtime using USB_MUX_ENABLE_ALTERNATIVE macro. + +# Example DTS defining USB-C port 0 with main and alternative usb mux chains. +# The main chain has two muxes: BB retimer and virtual mux. +# The alternative chain has three muxes: BB retimer, SOC side BB retimer and +# virtual mux. +# +# usbc_port0: port0@0 { +# compatible = "named-usbc-port"; +# reg = <0>; +# ... +# usb-mux-chain-0 { +# compatible = "cros-ec,usb-mux-chain"; +# usb-muxes = <&usb_c0_bb_retimer +# &virtual_mux_c0>; +# }; +# usb-mux-chain-0 { +# compatible = "cros-ec,usb-mux-chain"; +# alternative-chain; +# usb-muxes = <&usb_c0_bb_retimer +# &usb_c0_soc_side_bb_retimer +# &virtual_mux_c0>; +# }; +# }; diff --git a/zephyr/dts/bindings/usbc/cypress,ccgxxf.yaml b/zephyr/dts/bindings/usbc/cypress,ccgxxf.yaml deleted file mode 100644 index 61f05495ea..0000000000 --- a/zephyr/dts/bindings/usbc/cypress,ccgxxf.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: USBC TCPC - -compatible: "cypress,ccgxxf" - -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller - - i2c-addr-flags: - type: string - default: "CCGXXF_I2C_ADDR1_FLAGS" - enum: - - "CCGXXF_I2C_ADDR1_FLAGS" - - "CCGXXF_I2C_ADDR2_FLAGS" - description: | - I2C address of controller diff --git a/zephyr/dts/bindings/usbc/fairchild,fusb302.yaml b/zephyr/dts/bindings/usbc/fairchild,fusb302.yaml deleted file mode 100644 index 1eba4dedaf..0000000000 --- a/zephyr/dts/bindings/usbc/fairchild,fusb302.yaml +++ /dev/null @@ -1,21 +0,0 @@ -description: USBC TCPC - -compatible: "fairchild,fusb302" - -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller - - i2c-addr-flags: - type: string - default: "FUSB302_I2C_ADDR_FLAGS" - enum: - - "FUSB302_I2C_ADDR_FLAGS" - - "FUSB302_I2C_ADDR_B01_FLAGS" - - "FUSB302_I2C_ADDR_B10_FLAGS" - - "FUSB302_I2C_ADDR_B11_FLAGS" - description: | - I2C address of controller diff --git a/zephyr/dts/bindings/usbc/ite,it8xxx2-tcpc.yaml b/zephyr/dts/bindings/usbc/ite,it8xxx2-tcpc.yaml deleted file mode 100644 index 846ac5ead7..0000000000 --- a/zephyr/dts/bindings/usbc/ite,it8xxx2-tcpc.yaml +++ /dev/null @@ -1,3 +0,0 @@ -description: USBC TCPC - -compatible: "ite,it8xxx2-tcpc" diff --git a/zephyr/dts/bindings/usbc/mux/amd,usbc-mux-amd-fp6.yaml b/zephyr/dts/bindings/usbc/mux/amd,usbc-mux-amd-fp6.yaml new file mode 100644 index 0000000000..1ce1db82c7 --- /dev/null +++ b/zephyr/dts/bindings/usbc/mux/amd,usbc-mux-amd-fp6.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USB-C AMD-FP6 mux + +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] + +compatible: "amd,usbc-mux-amd-fp6" diff --git a/zephyr/dts/bindings/usbc/mux/analogix,anx7483.yaml b/zephyr/dts/bindings/usbc/mux/analogix,anx7483.yaml index 9e4716d5d1..c4ac7782f0 100644 --- a/zephyr/dts/bindings/usbc/mux/analogix,anx7483.yaml +++ b/zephyr/dts/bindings/usbc/mux/analogix,anx7483.yaml @@ -1,26 +1,10 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. description: | Analogix re-timing MUX -include: cros-ec,usbc-mux.yaml +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] compatible: "analogix,anx7483" - -properties: - port: - type: phandle - required: true - description: phandle to the named i2c port - - i2c-addr-flags: - type: string - required: true - description: I2C address of chip - enum: - - ANX7483_I2C_ADDR0_FLAGS - - ANX7483_I2C_ADDR1_FLAGS - - ANX7483_I2C_ADDR2_FLAGS - - ANX7483_I2C_ADDR3_FLAGS diff --git a/zephyr/dts/bindings/usbc/mux/analogix,usbc-mux-anx7447.yaml b/zephyr/dts/bindings/usbc/mux/analogix,usbc-mux-anx7447.yaml new file mode 100644 index 0000000000..25b042e28c --- /dev/null +++ b/zephyr/dts/bindings/usbc/mux/analogix,usbc-mux-anx7447.yaml @@ -0,0 +1,15 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC ANX7447 USB MUX + +include: cros-ec,usbc-mux.yaml + +compatible: "analogix,usbc-mux-anx7447" + +properties: + hpd-update-enable: + type: boolean + description: | + Enable anx7447 hpd update callback diff --git a/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-tcpci.yaml b/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-tcpci.yaml index 9b986a5942..548d510630 100644 --- a/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-tcpci.yaml +++ b/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-tcpci.yaml @@ -1,10 +1,12 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. description: USBC TCPC USB MUX -include: cros-ec,usbc-mux.yaml +# Include base.yaml instead of i2c-device.yaml because the reg property is not +# required for this node. +include: ["base.yaml", "cros-ec,usbc-mux.yaml"] compatible: "cros-ec,usbc-mux-tcpci" @@ -14,56 +16,3 @@ properties: required: false description: | Name of function used as hpd_update callback - enum: - - ps8xxx_tcpc_update_hpd_status - - port: - type: phandle - required: false - description: | - If the TCPC in your design is used to manage both the power-delivery - interface and configure the mux for the USB superspeed signals, this - property, and the i2c-addr-flags should be omitted. The driver uses - the I2C configuration specified in the corresponding TCPC node. - - Example below - - port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; - usb-muxes = <&usb_mux_0>; - }; - usb_mux_0 usb-mux-0 { - compatible = "parade,usbc-mux-ps8xxx"; - /* I2C configuration provide by TCPC node */ - }; - - If the TCPC in your design only configures the USB superspeed signals, - for instance when the EC chip contains an embedded TCPC controller, - then port and i2c-addr-flags are required. - - port0@0 { - compatible = "named-usbc-port"; - reg = <0>; - tcpc { - compatible = "ite,it8xxx2-tcpc"; - }; - }; - usb_mux_0 usb-mux-0 { - compatible = "parade,usbc-mux-ps8xxx"; - port = <i2c_usbc0>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; - - i2c-addr-flags: - type: int - required: false - description: | - I2C address of chip. If provided, port property has to be present too. - Please check description of port property for more information. diff --git a/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-virtual.yaml b/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-virtual.yaml index cadeb6d35b..7231bc9e2c 100644 --- a/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-virtual.yaml +++ b/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux-virtual.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux.yaml b/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux.yaml index 21cb8e0a3f..0e76f548a9 100644 --- a/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux.yaml +++ b/zephyr/dts/bindings/usbc/mux/cros-ec,usbc-mux.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml b/zephyr/dts/bindings/usbc/mux/intel,jhl8040r.yaml index 5098080c25..6289d440f1 100644 --- a/zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml +++ b/zephyr/dts/bindings/usbc/mux/intel,jhl8040r.yaml @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,7 +6,7 @@ description: Intel JHL8040R Thunderbolt 4 Retimer compatible: "intel,jhl8040r" -include: cros-ec,usbc-mux.yaml +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] properties: reset-pin: @@ -20,13 +20,3 @@ properties: ls-en-pin: type: phandle required: false - - port: - type: phandle - required: true - description: phandle to the named i2c port - - i2c-addr-flags: - type: int - required: true - description: I2C address of chip diff --git a/zephyr/dts/bindings/usbc/mux/ite,it5205.yaml b/zephyr/dts/bindings/usbc/mux/ite,it5205.yaml index 4d4c360d47..3c9381aee1 100644 --- a/zephyr/dts/bindings/usbc/mux/ite,it5205.yaml +++ b/zephyr/dts/bindings/usbc/mux/ite,it5205.yaml @@ -1,23 +1,9 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. description: ITE IT5205 USB Type-C 3:2 alternate mode MUX -include: cros-ec,usbc-mux.yaml +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] compatible: "ite,it5205" - -properties: - port: - type: phandle - required: true - description: phandle to the named i2c port - - i2c-addr-flags: - type: string - required: true - description: I2C address of chip - enum: - - IT5205_I2C_ADDR1_FLAGS - - IT5205_I2C_ADDR2_FLAGS diff --git a/zephyr/dts/bindings/usbc/mux/parade,ps8743.yaml b/zephyr/dts/bindings/usbc/mux/parade,ps8743.yaml new file mode 100644 index 0000000000..1ee0bbaf74 --- /dev/null +++ b/zephyr/dts/bindings/usbc/mux/parade,ps8743.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Parade PS8743 USB Type-C alternate mode MUX + +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] + +compatible: "parade,ps8743" diff --git a/zephyr/dts/bindings/usbc/mux/parade,ps8818.yaml b/zephyr/dts/bindings/usbc/mux/parade,ps8818.yaml new file mode 100644 index 0000000000..aafdf29341 --- /dev/null +++ b/zephyr/dts/bindings/usbc/mux/parade,ps8818.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC PS8818 Retimer + +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] + +compatible: "parade,ps8818" diff --git a/zephyr/dts/bindings/usbc/mux/parade,usbc-mux-ps8xxx.yaml b/zephyr/dts/bindings/usbc/mux/parade,usbc-mux-ps8xxx.yaml index 685544cbf4..4df0b35d76 100644 --- a/zephyr/dts/bindings/usbc/mux/parade,usbc-mux-ps8xxx.yaml +++ b/zephyr/dts/bindings/usbc/mux/parade,usbc-mux-ps8xxx.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -13,3 +13,5 @@ properties: description: | PS8xxx USB MUX almost always use this hdp_update callback default: "ps8xxx_tcpc_update_hpd_status" + enum: + - ps8xxx_tcpc_update_hpd_status diff --git a/zephyr/dts/bindings/usbc/mux/ti,tusb1064.yaml b/zephyr/dts/bindings/usbc/mux/ti,tusb1064.yaml index 6c625459c1..d5a0b34e6c 100644 --- a/zephyr/dts/bindings/usbc/mux/ti,tusb1064.yaml +++ b/zephyr/dts/bindings/usbc/mux/ti,tusb1064.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,34 +6,6 @@ description: | TI TUSB546, TUSB1044, or TUSB1064 USB-C MUX, device variant depends on CONFIG_PLATFORM_EC_USB_MUX_TUSB_TYPE Kconfig choice -include: cros-ec,usbc-mux.yaml +include: ["i2c-device.yaml", "cros-ec,usbc-mux.yaml"] compatible: "ti,tusb1064" - -properties: - port: - type: phandle - required: true - description: phandle to the named i2c port - - i2c-addr-flags: - type: string - required: true - description: I2C address of chip - enum: - - TUSB1064_I2C_ADDR0_FLAGS - - TUSB1064_I2C_ADDR1_FLAGS - - TUSB1064_I2C_ADDR2_FLAGS - - TUSB1064_I2C_ADDR3_FLAGS - - TUSB1064_I2C_ADDR4_FLAGS - - TUSB1064_I2C_ADDR5_FLAGS - - TUSB1064_I2C_ADDR6_FLAGS - - TUSB1064_I2C_ADDR7_FLAGS - - TUSB1064_I2C_ADDR8_FLAGS - - TUSB1064_I2C_ADDR9_FLAGS - - TUSB1064_I2C_ADDR10_FLAGS - - TUSB1064_I2C_ADDR11_FLAGS - - TUSB1064_I2C_ADDR12_FLAGS - - TUSB1064_I2C_ADDR13_FLAGS - - TUSB1064_I2C_ADDR14_FLAGS - - TUSB1064_I2C_ADDR15_FLAGS diff --git a/zephyr/dts/bindings/usbc/named-usbc-port.yaml b/zephyr/dts/bindings/usbc/named-usbc-port.yaml index bcd9c7a2b4..1cdcb878b2 100644 --- a/zephyr/dts/bindings/usbc/named-usbc-port.yaml +++ b/zephyr/dts/bindings/usbc/named-usbc-port.yaml @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,13 +9,36 @@ compatible: "named-usbc-port" include: base.yaml properties: - usb-muxes: - type: phandles + bc12: + type: phandle required: false description: | - List of USB-C muxes and retimers for the USB-C port. The USB-C subsystem - traverses this list in the order specified. The phandles are references to - cros-ec,usbc-mux nodes. + BC1.2 chip for the USB-C port. + tcpc: + type: phandle + required: false + description: | + TCPC chip for the USB-C port. + chg: + type: phandle + required: false + description: | + Charger chip for the USB-C port. + chg_alt: + type: phandle + required: false + description: | + Alternative charger for the USB-C port. + ppc: + type: phandle + required: false + description: | + PPC for the USB-C port. + ppc_alt: + type: phandle + required: false + description: | + Alternate PPC for the USB-C port. # Example: @@ -27,17 +50,11 @@ properties: # port0@0 { # compatible = "named-usbc-port"; # reg = <0>; -# bc12 { -# compatible = "pericom,pi3usb9201"; -# port = <&i2c_ec_i2c_usb_c0>; -# }; +# bc12 = <&bc12_port0>; # }; # port1@1 { # compatible = "named-usbc-port"; # reg = <1>; -# bc12 { -# compatible = "pericom,pi3usb9201"; -# port = <&i2c_ec_i2c_sub_usb_c1>; -# }; +# bc12 = <&bc12_port1>; # }; # }; diff --git a/zephyr/dts/bindings/usbc/nuvoton,nct38xx.yaml b/zephyr/dts/bindings/usbc/nuvoton,nct38xx.yaml deleted file mode 100644 index ddd307c2a2..0000000000 --- a/zephyr/dts/bindings/usbc/nuvoton,nct38xx.yaml +++ /dev/null @@ -1,40 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: Nuvoton NCT38XX USB TCPC binding - -compatible: "nuvoton,nct38xx" - -properties: - gpio-dev: - type: phandle - description: | - Pointer to the NCT38XX GPIO device. This is used to binding the Cros TCPC - port index to Zephyr NCT38XX GPIO device. - - port: - type: phandle - description: | - I2C port used to communicate with controller - - i2c-addr-flags: - type: string - default: "NCT38XX_I2C_ADDR1_1_FLAGS" - enum: - - "NCT38XX_I2C_ADDR1_1_FLAGS" - - "NCT38XX_I2C_ADDR1_2_FLAGS" - - "NCT38XX_I2C_ADDR1_3_FLAGS" - - "NCT38XX_I2C_ADDR1_4_FLAGS" - - "NCT38XX_I2C_ADDR2_1_FLAGS" - - "NCT38XX_I2C_ADDR2_2_FLAGS" - - "NCT38XX_I2C_ADDR2_3_FLAGS" - - "NCT38XX_I2C_ADDR2_4_FLAGS" - description: | - I2C address of controller - - tcpc-flags: - type: int - default: 0 - description: | - TCPC configuration flags diff --git a/zephyr/dts/bindings/usbc/parade,ps8xxx.yaml b/zephyr/dts/bindings/usbc/parade,ps8xxx.yaml deleted file mode 100644 index 8a65e736c9..0000000000 --- a/zephyr/dts/bindings/usbc/parade,ps8xxx.yaml +++ /dev/null @@ -1,29 +0,0 @@ -description: USBC TCPC - -compatible: "parade,ps8xxx" - -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller - - i2c-addr-flags: - type: string - default: "PS8XXX_I2C_ADDR1_FLAGS" - enum: - - "PS8XXX_I2C_ADDR1_P1_FLAGS" - - "PS8XXX_I2C_ADDR1_P2_FLAGS" - - "PS8XXX_I2C_ADDR1_FLAGS" - - "PS8XXX_I2C_ADDR2_FLAGS" - - "PS8XXX_I2C_ADDR3_FLAGS" - - "PS8XXX_I2C_ADDR4_FLAGS" - description: | - I2C address of controller - - tcpc-flags: - type: int - default: 0 - description: | - TCPC configuration flags diff --git a/zephyr/dts/bindings/usbc/pericom,pi3usb9201.yaml b/zephyr/dts/bindings/usbc/pericom,pi3usb9201.yaml deleted file mode 100644 index 41e1501684..0000000000 --- a/zephyr/dts/bindings/usbc/pericom,pi3usb9201.yaml +++ /dev/null @@ -1,26 +0,0 @@ -description: USBC BC1.2 - -compatible: "pericom,pi3usb9201" - -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller - - irq: - type: phandles - description: | - GPIO interrupt from BC1.2 - - i2c-addr-flags: - type: string - default: "PI3USB9201_I2C_ADDR_3_FLAGS" - enum: - - "PI3USB9201_I2C_ADDR_0_FLAGS" - - "PI3USB9201_I2C_ADDR_1_FLAGS" - - "PI3USB9201_I2C_ADDR_2_FLAGS" - - "PI3USB9201_I2C_ADDR_3_FLAGS" - description: | - I2C address of controller diff --git a/zephyr/dts/bindings/usbc/ppc-chip.yaml b/zephyr/dts/bindings/usbc/ppc-chip.yaml index b5b2cedc03..7fe944fe4c 100644 --- a/zephyr/dts/bindings/usbc/ppc-chip.yaml +++ b/zephyr/dts/bindings/usbc/ppc-chip.yaml @@ -1,28 +1,14 @@ -# Copyright (c) 2021 The Chromium OS Authors +# Copyright 2021 The ChromiumOS Authors # SPDX-License-Identifier: Apache-2.0 description: Power path chip +include: i2c-device.yaml + properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller irq: type: phandles required: false description: | GPIO interrupt from PPC - - i2c-addr-flags: - type: string - description: | - I2C address of controller - - alternate-for: - type: phandle - description: | - Pointer to the primary PPC device that can be replaced at runtime - by this device. diff --git a/zephyr/dts/bindings/usbc/ppc/aoz,aoz1380.yaml b/zephyr/dts/bindings/usbc/ppc/aoz,aoz1380.yaml new file mode 100644 index 0000000000..52144ffc78 --- /dev/null +++ b/zephyr/dts/bindings/usbc/ppc/aoz,aoz1380.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: AOZ1380 USBC PPC binding + +compatible: "aoz,aoz1380" + +include: ppc-chip.yaml diff --git a/zephyr/dts/bindings/usbc/ppc/nxp,nx20p348x.yaml b/zephyr/dts/bindings/usbc/ppc/nxp,nx20p348x.yaml new file mode 100644 index 0000000000..b297702356 --- /dev/null +++ b/zephyr/dts/bindings/usbc/ppc/nxp,nx20p348x.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: NXP NX20P348X USBC PPC binding + +compatible: "nxp,nx20p348x" + +include: ppc-chip.yaml diff --git a/zephyr/dts/bindings/usbc/ppc/richtek,rt1739-ppc.yaml b/zephyr/dts/bindings/usbc/ppc/richtek,rt1739-ppc.yaml new file mode 100644 index 0000000000..e15322883c --- /dev/null +++ b/zephyr/dts/bindings/usbc/ppc/richtek,rt1739-ppc.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC PPC + +compatible: "richtek,rt1739-ppc" + +include: ppc-chip.yaml diff --git a/zephyr/dts/bindings/usbc/silergy,syv682x.yaml b/zephyr/dts/bindings/usbc/ppc/silergy,syv682x.yaml index 51ab7e89e1..ab45a98ebd 100644 --- a/zephyr/dts/bindings/usbc/silergy,syv682x.yaml +++ b/zephyr/dts/bindings/usbc/ppc/silergy,syv682x.yaml @@ -9,11 +9,3 @@ properties: type: phandle description: The GPIO that controls FRS enable on this device required: false - - i2c-addr-flags: - default: "SYV682X_ADDR0_FLAGS" - enum: - - "SYV682X_ADDR0_FLAGS" - - "SYV682X_ADDR1_FLAGS" - - "SYV682X_ADDR2_FLAGS" - - "SYV682X_ADDR3_FLAGS" diff --git a/zephyr/dts/bindings/usbc/ppc/ti,sn5s330.yaml b/zephyr/dts/bindings/usbc/ppc/ti,sn5s330.yaml new file mode 100644 index 0000000000..9d92811c03 --- /dev/null +++ b/zephyr/dts/bindings/usbc/ppc/ti,sn5s330.yaml @@ -0,0 +1,5 @@ +description: USBC PPC + +compatible: "ti,sn5s330" + +include: ppc-chip.yaml diff --git a/zephyr/dts/bindings/usbc/richtek,rt1739-ppc.yaml b/zephyr/dts/bindings/usbc/richtek,rt1739-ppc.yaml deleted file mode 100644 index a1f2dbdbb0..0000000000 --- a/zephyr/dts/bindings/usbc/richtek,rt1739-ppc.yaml +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: USBC PPC - -compatible: "richtek,rt1739-ppc" - -include: ppc-chip.yaml - -properties: - i2c-addr-flags: - default: "RT1739_ADDR1_FLAGS" - enum: - - "RT1739_ADDR1_FLAGS" - - "RT1739_ADDR2_FLAGS" - - "RT1739_ADDR3_FLAGS" - - "RT1739_ADDR4_FLAGS" diff --git a/zephyr/dts/bindings/usbc/tcpc/anologix,anx7447-tcpc.yaml b/zephyr/dts/bindings/usbc/tcpc/anologix,anx7447-tcpc.yaml new file mode 100644 index 0000000000..cb10c3ee15 --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/anologix,anx7447-tcpc.yaml @@ -0,0 +1,12 @@ +description: Anologix ANX7447 USBC TCPC binding + +compatible: "anologix,anx7447-tcpc" + +include: i2c-device.yaml + +properties: + tcpc-flags: + type: int + default: 0 + description: | + TCPC configuration flags diff --git a/zephyr/dts/bindings/usbc/tcpc/cros-ec,tcpci.yaml b/zephyr/dts/bindings/usbc/tcpc/cros-ec,tcpci.yaml new file mode 100644 index 0000000000..10a8f04f55 --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/cros-ec,tcpci.yaml @@ -0,0 +1,5 @@ +description: USBC TCPC + +compatible: "cros-ec,tcpci" + +include: i2c-device.yaml diff --git a/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml b/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml new file mode 100644 index 0000000000..f6ad3c3ba6 --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/cypress,ccgxxf.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC TCPC + +compatible: "cypress,ccgxxf" + +include: i2c-device.yaml diff --git a/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml b/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml new file mode 100644 index 0000000000..05b7f9b9ad --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/fairchild,fusb302.yaml @@ -0,0 +1,5 @@ +description: USBC TCPC + +compatible: "fairchild,fusb302" + +include: i2c-device.yaml diff --git a/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml b/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml new file mode 100644 index 0000000000..51a69846e0 --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/nuvoton,nct38xx.yaml @@ -0,0 +1,22 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Nuvoton NCT38XX USB TCPC binding + +compatible: "nuvoton,nct38xx" + +include: i2c-device.yaml + +properties: + gpio-dev: + type: phandle + description: | + Pointer to the NCT38XX GPIO device. This is used to binding the Cros TCPC + port index to Zephyr NCT38XX GPIO device. + + tcpc-flags: + type: int + default: 0 + description: | + TCPC configuration flags diff --git a/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml b/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml new file mode 100644 index 0000000000..8048e05522 --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/parade,ps8xxx.yaml @@ -0,0 +1,12 @@ +description: USBC TCPC + +compatible: "parade,ps8xxx" + +include: i2c-device.yaml + +properties: + tcpc-flags: + type: int + default: 0 + description: | + TCPC configuration flags diff --git a/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml b/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml new file mode 100644 index 0000000000..fb7dc8a4aa --- /dev/null +++ b/zephyr/dts/bindings/usbc/tcpc/richtek,rt1718s-tcpc.yaml @@ -0,0 +1,17 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC RT1718S TCPC + +compatible: "richtek,rt1718s-tcpc" + +include: i2c-device.yaml + +properties: + tcpc-flags: + type: int + default: 0 + description: | + TCPC configuration flags + diff --git a/zephyr/dts/bindings/usbc/ti,sn5s330.yaml b/zephyr/dts/bindings/usbc/ti,sn5s330.yaml deleted file mode 100644 index 664f888805..0000000000 --- a/zephyr/dts/bindings/usbc/ti,sn5s330.yaml +++ /dev/null @@ -1,14 +0,0 @@ -description: USBC PPC - -compatible: "ti,sn5s330" - -include: ppc-chip.yaml - -properties: - i2c-addr-flags: - default: "SN5S330_ADDR0_FLAGS" - enum: - - "SN5S330_ADDR0_FLAGS" - - "SN5S330_ADDR1_FLAGS" - - "SN5S330_ADDR2_FLAGS" - - "SN5S330_ADDR3_FLAGS" diff --git a/zephyr/dts/bindings/vendor-prefixes.txt b/zephyr/dts/bindings/vendor-prefixes.txt index 403b0ba1ea..53dd2d4cfc 100644 --- a/zephyr/dts/bindings/vendor-prefixes.txt +++ b/zephyr/dts/bindings/vendor-prefixes.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,9 +9,14 @@ cros-ec The Chromium OS Embedded Controller Project cros The Chromium OS Embedded Controller Project intersil Intersil lgc LG Chem -as3gwrc3ka Battery vendor smp Battery vendor aec Battery vendor powertech Battery vendor getac Battery vendor ganfeng Battery vendor +byd Battery vendor +celxpert Battery vendor +sunwoda Battery vendor +cosmx Battery vendor +dynapack Battery vendor +atl Battery vendor
\ No newline at end of file diff --git a/zephyr/dts/board-overlays/native_posix.dts b/zephyr/dts/board-overlays/native_posix.dts index 7801997553..44a034d73b 100644 --- a/zephyr/dts/board-overlays/native_posix.dts +++ b/zephyr/dts/board-overlays/native_posix.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,7 @@ named-gpios { compatible = "named-gpios"; - entering_rw { + entering-rw { gpios = <&gpio0 1 GPIO_OUTPUT_LOW>; enum-name = "GPIO_ENTERING_RW"; }; diff --git a/zephyr/dts/it8xxx2_emul.dts b/zephyr/dts/it8xxx2_emul.dts new file mode 100644 index 0000000000..dcb44aebd2 --- /dev/null +++ b/zephyr/dts/it8xxx2_emul.dts @@ -0,0 +1,177 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Contains emulators for devices normally found on IT8xxx2 chips. + * To use, include this file, then the board's gpio definitions. + */ + +#include <dt-bindings/gpio_defines.h> + +/ { + gpioa: gpio@f01601 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01601 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiob: gpio@f01602 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01602 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioc: gpio@f01603 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01603 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiod: gpio@f01604 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01604 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioe: gpio@f01605 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01605 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiof: gpio@f01606 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01606 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiog: gpio@f01607 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01607 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioh: gpio@f01608 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01608 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioi: gpio@f01609 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf01609 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioj: gpio@f0160a { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf0160a 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiok: gpio@f0160b { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf0160b 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiol: gpio@f0160c { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf0160c 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiom: gpio@f0160d { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf0160d 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + + i2c_ctrl0: i2c@f01c40 { + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xf01c40 0x1000>; + }; +}; diff --git a/zephyr/dts/npcx_emul.dts b/zephyr/dts/npcx_emul.dts new file mode 100644 index 0000000000..20b1a02eeb --- /dev/null +++ b/zephyr/dts/npcx_emul.dts @@ -0,0 +1,266 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Contains emulators for devices normally found on NPCX chips. + * To use, include this file, then the board's gpio definitions. + */ + +#include <dt-bindings/gpio_defines.h> + +/ { + gpio1: gpio@101 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x101 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio3: gpio@301 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x301 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio4: gpio@400 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x400 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio5: gpio@500 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x500 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio6: gpio@600 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x600 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio7: gpio@700 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x700 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio8: gpio@801 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x801 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpio9: gpio@900 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x900 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioa: gpio@a00 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xa00 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiob: gpio@b00 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xb00 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioc: gpio@c00 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xc00 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiod: gpio@d00 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xd00 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpioe: gpio@e00 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xe00 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + gpiof: gpio@f00 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0xf00 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + + i2c_ctrl0: i2c@40009000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40009000 0x1000>; + }; + i2c_ctrl1: i2c@4000b000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4000b000 0x1000>; + }; + + i2c_ctrl2: i2c@400c0000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x400c0000 0x1000>; + }; + + i2c_ctrl3: i2c@400c2000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x400c2000 0x1000>; + }; + + i2c_ctrl4: i2c@40008000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40008000 0x1000>; + }; + + i2c_ctrl5: i2c@40017000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40017000 0x1000>; + }; + + i2c_ctrl6: i2c@40018000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40018000 0x1000>; + }; + + i2c_ctrl7: i2c@40019000 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40019000 0x1000>; + }; + scfg: scfg@400c3000 { + compatible = "nuvoton,npcx-scfg"; + /* First reg region is System Configuration Device */ + /* Second reg region is System Glue Device */ + reg = <0x400c3000 0x70 + 0x400a5000 0x2000>; + reg-names = "scfg", "glue"; + #alt-cells = <3>; + #lvol-cells = <2>; + }; +}; + +&gpio0 { + ngpios = <8>; +}; diff --git a/zephyr/emul/CMakeLists.txt b/zephyr/emul/CMakeLists.txt index 4b64e80736..f8e4bae15b 100644 --- a/zephyr/emul/CMakeLists.txt +++ b/zephyr/emul/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -22,5 +22,8 @@ zephyr_library_sources_ifdef(CONFIG_EMUL_CLOCK_CONTROL emul_clock_control.c) zephyr_library_sources_ifdef(CONFIG_EMUL_SN5S330 emul_sn5s330.c) zephyr_library_sources_ifdef(CONFIG_EMUL_KB_RAW emul_kb_raw.c) zephyr_library_sources_ifdef(CONFIG_EMUL_CROS_FLASH emul_flash.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_RTC emul_rtc.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_RT9490 emul_rt9490.c) +zephyr_library_sources_ifdef(CONFIG_PWM_MOCK pwm_mock.c) cros_ec_library_include_directories_ifdef(CONFIG_EMUL_CROS_FLASH include) diff --git a/zephyr/emul/Kconfig b/zephyr/emul/Kconfig index ffbafd059a..3cabd96b6f 100644 --- a/zephyr/emul/Kconfig +++ b/zephyr/emul/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -77,9 +77,28 @@ config EMUL_KB_RAW config EMUL_CROS_FLASH bool "Emulated flash driver for the Zephyr shim" select PLATFORM_EC_FLASH_CROS + imply SYSTEM_FAKE help This option enables the flash emulator for testing. +config EMUL_RTC + bool "Emulated RTC driver for Zephyr shim" + help + This options enables the RTC emulator for testing. + +config EMUL_RT9490 + bool "Rt9490 charger emulator" + select EMUL_COMMON_I2C + help + Enable the RT9490 light sensor emulator. This driver use emulated I2C + bus. Emulators API is available in zephyr/include/emul/emul_rt9490.h. + +config PWM_MOCK + bool "Mock implementation of an PWM device" + help + Enable the PWM mock. This driver is a pure mock and does nothing by + default. + rsource "Kconfig.ln9310" rsource "Kconfig.lis2dw12" rsource "Kconfig.i2c_mock" diff --git a/zephyr/emul/Kconfig.clock_control b/zephyr/emul/Kconfig.clock_control index a4dfbce557..29b38333c9 100644 --- a/zephyr/emul/Kconfig.clock_control +++ b/zephyr/emul/Kconfig.clock_control @@ -1,12 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_CLOCK_CONTROL_EMUL := cros,clock-control-emul - config EMUL_CLOCK_CONTROL bool "Emulated clock control" - default $(dt_compat_enabled,$(DT_COMPAT_CLOCK_CONTROL_EMUL)) + default y + depends on DT_HAS_CROS_CLOCK_CONTROL_EMUL_ENABLED help Enable the emulated clock control module. This module introduces a functioning clock control implementation along with backdoor APIs to diff --git a/zephyr/emul/Kconfig.i2c_mock b/zephyr/emul/Kconfig.i2c_mock index 6c98a32739..9bc75d961c 100644 --- a/zephyr/emul/Kconfig.i2c_mock +++ b/zephyr/emul/Kconfig.i2c_mock @@ -1,12 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_I2C_MOCK := cros,i2c-mock - menuconfig I2C_MOCK bool "Mock implementation of an I2C device" - default $(dt_compat_enabled,$(DT_COMPAT_I2C_MOCK)) + default y + depends on DT_HAS_CROS_I2C_MOCK_ENABLED depends on I2C_EMUL help Enable the I2C mock. This driver is a pure mock and does nothing by diff --git a/zephyr/emul/Kconfig.isl923x b/zephyr/emul/Kconfig.isl923x index bf124ec0a9..d1ad526979 100644 --- a/zephyr/emul/Kconfig.isl923x +++ b/zephyr/emul/Kconfig.isl923x @@ -1,12 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_ISL923X_EMUL := cros,isl923x-emul - menuconfig EMUL_ISL923X bool "ISL923X switchcap emulator" - default $(dt_compat_enabled,$(DT_COMPAT_ISL923X_EMUL)) + default y + depends on DT_HAS_CROS_ISL923X_EMUL_ENABLED depends on I2C_EMUL help Enable the ISL923X emulator. This driver uses the emulated I2C bus. It diff --git a/zephyr/emul/Kconfig.lis2dw12 b/zephyr/emul/Kconfig.lis2dw12 index 2263255418..e74f1f8cf4 100644 --- a/zephyr/emul/Kconfig.lis2dw12 +++ b/zephyr/emul/Kconfig.lis2dw12 @@ -1,12 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_LIS2DW12_EMUL := cros,lis2dw12-emul - menuconfig EMUL_LIS2DW12 bool "LIS2DW12 accelerometer emulator" - default $(dt_compat_enabled,$(DT_COMPAT_LIS2DW12_EMUL)) + default y + depends on DT_HAS_CROS_LIS2DW12_EMUL_ENABLED depends on I2C_EMUL select PLATFORM_EC_ACCEL_LIS2DW12 help diff --git a/zephyr/emul/Kconfig.ln9310 b/zephyr/emul/Kconfig.ln9310 index c9e3e6fbc9..9cacfbd670 100644 --- a/zephyr/emul/Kconfig.ln9310 +++ b/zephyr/emul/Kconfig.ln9310 @@ -1,12 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_LN9310_EMUL := cros,ln9310-emul - menuconfig EMUL_LN9310 bool "LN9310 switchcap emulator" - default $(dt_compat_enabled,$(DT_COMPAT_LN9310_EMUL)) + default y + depends on DT_HAS_CROS_LN9310_EMUL_ENABLED depends on I2C_EMUL depends on ASSERT help diff --git a/zephyr/emul/Kconfig.sn5s330 b/zephyr/emul/Kconfig.sn5s330 index bb3e5eeea8..283bf1fbd7 100644 --- a/zephyr/emul/Kconfig.sn5s330 +++ b/zephyr/emul/Kconfig.sn5s330 @@ -1,12 +1,11 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_SN5S330_EMUL := cros,sn5s330-emul - menuconfig EMUL_SN5S330 bool "sn5s330 emulator" - default $(dt_compat_enabled,$(DT_COMPAT_SN5S330_EMUL)) + default y + depends on DT_HAS_CROS_SN5S330_EMUL_ENABLED depends on I2C_EMUL depends on ASSERT help diff --git a/zephyr/emul/emul_bb_retimer.c b/zephyr/emul/emul_bb_retimer.c index 9a3e0a7b6e..266fd1a340 100644 --- a/zephyr/emul/emul_bb_retimer.c +++ b/zephyr/emul/emul_bb_retimer.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -16,13 +16,10 @@ LOG_MODULE_REGISTER(emul_bb_retimer); #include "emul/emul_common_i2c.h" #include "emul/emul_bb_retimer.h" +#include "emul/emul_stub_device.h" #include "driver/retimer/bb_retimer.h" -#define BB_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct bb_emul_data, common) - /** Run-time data used by the emulator */ struct bb_emul_data { /** Common I2C data */ @@ -44,7 +41,7 @@ struct bb_emul_data { }; /** Check description in emul_bb_retimer.h */ -void bb_emul_set_reg(struct i2c_emul *emul, int reg, uint32_t val) +void bb_emul_set_reg(const struct emul *emul, int reg, uint32_t val) { struct bb_emul_data *data; @@ -52,12 +49,12 @@ void bb_emul_set_reg(struct i2c_emul *emul, int reg, uint32_t val) return; } - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->reg[reg] = val; } /** Check description in emul_bb_retimer.h */ -uint32_t bb_emul_get_reg(struct i2c_emul *emul, int reg) +uint32_t bb_emul_get_reg(const struct emul *emul, int reg) { struct bb_emul_data *data; @@ -65,39 +62,39 @@ uint32_t bb_emul_get_reg(struct i2c_emul *emul, int reg) return 0; } - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; return data->reg[reg]; } /** Check description in emul_bb_retimer.h */ -void bb_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set) +void bb_emul_set_err_on_ro_write(const struct emul *emul, bool set) { struct bb_emul_data *data; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_ro_write = set; } /** Check description in emul_bb_retimer.h */ -void bb_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set) +void bb_emul_set_err_on_rsvd_write(const struct emul *emul, bool set) { struct bb_emul_data *data; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_rsvd_write = set; } /** Mask reserved bits in each register of BB retimer */ static const uint32_t bb_emul_rsvd_mask[] = { - [BB_RETIMER_REG_VENDOR_ID] = 0x00000000, - [BB_RETIMER_REG_DEVICE_ID] = 0x00000000, - [0x02] = 0xffffffff, /* Reserved */ - [0x03] = 0xffffffff, /* Reserved */ - [BB_RETIMER_REG_CONNECTION_STATE] = 0xc0201000, - [BB_RETIMER_REG_TBT_CONTROL] = 0xffffdfff, - [0x06] = 0xffffffff, /* Reserved */ - [BB_RETIMER_REG_EXT_CONNECTION_MODE] = 0x08007f00, + [BB_RETIMER_REG_VENDOR_ID] = 0x00000000, + [BB_RETIMER_REG_DEVICE_ID] = 0x00000000, + [0x02] = 0xffffffff, /* Reserved */ + [0x03] = 0xffffffff, /* Reserved */ + [BB_RETIMER_REG_CONNECTION_STATE] = 0xc0201000, + [BB_RETIMER_REG_TBT_CONTROL] = 0xffffdfff, + [0x06] = 0xffffffff, /* Reserved */ + [BB_RETIMER_REG_EXT_CONNECTION_MODE] = 0x08007f00, }; /** @@ -105,20 +102,20 @@ static const uint32_t bb_emul_rsvd_mask[] = { * * @param emul Pointer to BB retimer emulator */ -static void bb_emul_reset(struct i2c_emul *emul) +static void bb_emul_reset(const struct emul *emul) { struct bb_emul_data *data; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; - data->reg[BB_RETIMER_REG_VENDOR_ID] = data->vendor_id; - data->reg[BB_RETIMER_REG_DEVICE_ID] = BB_RETIMER_DEVICE_ID; - data->reg[0x02] = 0x00; /* Reserved */ - data->reg[0x03] = 0x00; /* Reserved */ - data->reg[BB_RETIMER_REG_CONNECTION_STATE] = 0x00; - data->reg[BB_RETIMER_REG_TBT_CONTROL] = 0x00; - data->reg[0x06] = 0x00; /* Reserved */ - data->reg[BB_RETIMER_REG_EXT_CONNECTION_MODE] = 0x00; + data->reg[BB_RETIMER_REG_VENDOR_ID] = data->vendor_id; + data->reg[BB_RETIMER_REG_DEVICE_ID] = BB_RETIMER_DEVICE_ID; + data->reg[0x02] = 0x00; /* Reserved */ + data->reg[0x03] = 0x00; /* Reserved */ + data->reg[BB_RETIMER_REG_CONNECTION_STATE] = 0x00; + data->reg[BB_RETIMER_REG_TBT_CONTROL] = 0x00; + data->reg[0x06] = 0x00; /* Reserved */ + data->reg[BB_RETIMER_REG_EXT_CONNECTION_MODE] = 0x00; } /** @@ -133,12 +130,12 @@ static void bb_emul_reset(struct i2c_emul *emul) * @return 0 on success * @return -EIO on error */ -static int bb_emul_handle_write(struct i2c_emul *emul, int reg, int msg_len) +static int bb_emul_handle_write(const struct emul *emul, int reg, int msg_len) { struct bb_emul_data *data; uint32_t val; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* This write only selected register for I2C read message */ if (msg_len < 2) { @@ -155,8 +152,7 @@ static int bb_emul_handle_write(struct i2c_emul *emul, int reg, int msg_len) LOG_WRN("Got %d bytes of WR data, expected 4", msg_len - 2); } - if (reg <= BB_RETIMER_REG_DEVICE_ID || - reg >= BB_RETIMER_REG_COUNT || + if (reg <= BB_RETIMER_REG_DEVICE_ID || reg >= BB_RETIMER_REG_COUNT || reg == BB_RETIMER_REG_TBT_CONTROL) { if (data->error_on_ro_write) { LOG_ERR("Writing to reg 0x%x which is RO", reg); @@ -191,11 +187,11 @@ static int bb_emul_handle_write(struct i2c_emul *emul, int reg, int msg_len) * @return 0 on success * @return -EIO on error */ -static int bb_emul_handle_read(struct i2c_emul *emul, int reg) +static int bb_emul_handle_read(const struct emul *emul, int reg) { struct bb_emul_data *data; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (reg >= BB_RETIMER_REG_COUNT) { LOG_ERR("Read unknown register 0x%x", reg); @@ -219,12 +215,12 @@ static int bb_emul_handle_read(struct i2c_emul *emul, int reg) * * @return 0 on success */ -static int bb_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, +static int bb_emul_write_byte(const struct emul *emul, int reg, uint8_t val, int bytes) { struct bb_emul_data *data; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (bytes == 1) { data->data_dword = 0; @@ -249,12 +245,12 @@ static int bb_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, * * @return 0 on success */ -static int bb_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, +static int bb_emul_read_byte(const struct emul *emul, int reg, uint8_t *val, int bytes) { struct bb_emul_data *data; - data = BB_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* First byte of read message is read size which is always 4 */ if (bytes == 0) { @@ -279,7 +275,7 @@ static int bb_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, * * @return Currently accessed register */ -static int bb_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, +static int bb_emul_access_reg(const struct emul *emul, int reg, int bytes, bool read) { return reg; @@ -298,27 +294,20 @@ static int bb_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, * * @return 0 indicating success (always) */ -static int bb_emul_init(const struct emul *emul, - const struct device *parent) +static int bb_emul_init(const struct emul *emul, const struct device *parent) { - const struct i2c_common_emul_cfg *cfg = emul->cfg; - struct i2c_common_emul_data *data = cfg->data; - int ret; + struct bb_emul_data *data = emul->data; - data->emul.api = &i2c_common_emul_api; - data->emul.addr = cfg->addr; - data->i2c = parent; - data->cfg = cfg; - i2c_common_emul_init(data); + data->common.i2c = parent; - ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + i2c_common_emul_init(&data->common); - bb_emul_reset(&data->emul); + bb_emul_reset(emul); - return ret; + return 0; } -#define BB_RETIMER_EMUL(n) \ +#define BB_RETIMER_EMUL(n) \ static struct bb_emul_data bb_emul_data_##n = { \ .vendor_id = DT_STRING_TOKEN(DT_DRV_INST(n), vendor), \ .error_on_ro_write = DT_INST_PROP(n, error_on_ro_write),\ @@ -333,29 +322,22 @@ static int bb_emul_init(const struct emul *emul, .finish_read = NULL, \ .access_reg = bb_emul_access_reg, \ }, \ - }; \ - \ - static const struct i2c_common_emul_cfg bb_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .data = &bb_emul_data_##n.common, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(bb_emul_init, DT_DRV_INST(n), &bb_emul_cfg_##n, \ - &bb_emul_data_##n) + }; \ + \ + static const struct i2c_common_emul_cfg bb_emul_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &bb_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DT_INST_DEFINE(n, bb_emul_init, &bb_emul_data_##n, \ + &bb_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(BB_RETIMER_EMUL) -#define BB_RETIMER_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &bb_emul_data_##n.common.emul; +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); -/** Check description in emul_bb_emulator.h */ -struct i2c_emul *bb_emul_get(int ord) +struct i2c_common_emul_data * +emul_bb_retimer_get_i2c_common_data(const struct emul *emul) { - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(BB_RETIMER_EMUL_CASE) - - default: - return NULL; - } + return emul->data; } diff --git a/zephyr/emul/emul_bma255.c b/zephyr/emul/emul_bma255.c index cd790dbc99..a57c8fbdbb 100644 --- a/zephyr/emul/emul_bma255.c +++ b/zephyr/emul/emul_bma255.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -18,10 +18,7 @@ LOG_MODULE_REGISTER(emul_bma255); #include "emul/emul_bma255.h" #include "driver/accel_bma2x2.h" - -#define BMA_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct bma_emul_data, common) +#include "emul/emul_stub_device.h" /** Run-time data used by the emulator */ struct bma_emul_data { @@ -74,7 +71,7 @@ struct bma_emul_data { }; /** Check description in emul_bma255.h */ -void bma_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) +void bma_emul_set_reg(const struct emul *emul, int reg, uint8_t val) { struct bma_emul_data *data; @@ -82,12 +79,12 @@ void bma_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) return; } - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->reg[reg] = val; } /** Check description in emul_bma255.h */ -uint8_t bma_emul_get_reg(struct i2c_emul *emul, int reg) +uint8_t bma_emul_get_reg(const struct emul *emul, int reg) { struct bma_emul_data *data; @@ -95,7 +92,7 @@ uint8_t bma_emul_get_reg(struct i2c_emul *emul, int reg) return 0; } - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; return data->reg[reg]; } @@ -182,11 +179,11 @@ static uint8_t bma_emul_off_to_nvm(int16_t off) } /** Check description in emul_bma255.h */ -int16_t bma_emul_get_off(struct i2c_emul *emul, int axis) +int16_t bma_emul_get_off(const struct emul *emul, int axis) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMA_EMUL_AXIS_X: @@ -201,37 +198,37 @@ int16_t bma_emul_get_off(struct i2c_emul *emul, int axis) } /** Check description in emul_bma255.h */ -void bma_emul_set_off(struct i2c_emul *emul, int axis, int16_t val) +void bma_emul_set_off(const struct emul *emul, int axis, int16_t val) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMA_EMUL_AXIS_X: data->off_x = val; - data->reg[BMA2x2_OFFSET_X_AXIS_ADDR] = bma_emul_off_to_nvm( - data->off_x); + data->reg[BMA2x2_OFFSET_X_AXIS_ADDR] = + bma_emul_off_to_nvm(data->off_x); break; case BMA_EMUL_AXIS_Y: data->off_y = val; - data->reg[BMA2x2_OFFSET_Y_AXIS_ADDR] = bma_emul_off_to_nvm( - data->off_y); + data->reg[BMA2x2_OFFSET_Y_AXIS_ADDR] = + bma_emul_off_to_nvm(data->off_y); break; case BMA_EMUL_AXIS_Z: data->off_z = val; - data->reg[BMA2x2_OFFSET_Z_AXIS_ADDR] = bma_emul_off_to_nvm( - data->off_z); + data->reg[BMA2x2_OFFSET_Z_AXIS_ADDR] = + bma_emul_off_to_nvm(data->off_z); break; } } /** Check description in emul_bma255.h */ -int16_t bma_emul_get_acc(struct i2c_emul *emul, int axis) +int16_t bma_emul_get_acc(const struct emul *emul, int axis) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMA_EMUL_AXIS_X: @@ -246,11 +243,11 @@ int16_t bma_emul_get_acc(struct i2c_emul *emul, int axis) } /** Check description in emul_bma255.h */ -void bma_emul_set_acc(struct i2c_emul *emul, int axis, int16_t val) +void bma_emul_set_acc(const struct emul *emul, int axis, int16_t val) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMA_EMUL_AXIS_X: @@ -266,116 +263,116 @@ void bma_emul_set_acc(struct i2c_emul *emul, int axis, int16_t val) } /** Check description in emul_bma255.h */ -void bma_emul_set_err_on_cal_nrdy(struct i2c_emul *emul, bool set) +void bma_emul_set_err_on_cal_nrdy(const struct emul *emul, bool set) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_cal_trg_nrdy = set; } /** Check description in emul_bma255.h */ -void bma_emul_set_err_on_cal_bad_range(struct i2c_emul *emul, bool set) +void bma_emul_set_err_on_cal_bad_range(const struct emul *emul, bool set) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_cal_trg_bad_range = set; } /** Check description in emul_bma255.h */ -void bma_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set) +void bma_emul_set_err_on_ro_write(const struct emul *emul, bool set) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_ro_write = set; } /** Check description in emul_bma255.h */ -void bma_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set) +void bma_emul_set_err_on_rsvd_write(const struct emul *emul, bool set) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_rsvd_write = set; } /** Check description in emul_bma255.h */ -void bma_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set) +void bma_emul_set_err_on_msb_first(const struct emul *emul, bool set) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_msb_first = set; } /** Mask reserved bits in each register of BMA255 */ static const uint8_t bma_emul_rsvd_mask[] = { - [BMA2x2_CHIP_ID_ADDR] = 0x00, - [0x01] = 0xff, /* Reserved */ - [BMA2x2_X_AXIS_LSB_ADDR] = 0x0e, - [BMA2x2_X_AXIS_MSB_ADDR] = 0x00, - [BMA2x2_Y_AXIS_LSB_ADDR] = 0x0e, - [BMA2x2_Y_AXIS_MSB_ADDR] = 0x00, - [BMA2x2_Z_AXIS_LSB_ADDR] = 0x0e, - [BMA2x2_Z_AXIS_MSB_ADDR] = 0x00, - [BMA2x2_TEMP_ADDR] = 0x00, - [BMA2x2_STAT1_ADDR] = 0x00, - [BMA2x2_STAT2_ADDR] = 0x1f, - [BMA2x2_STAT_TAP_SLOPE_ADDR] = 0x00, - [BMA2x2_STAT_ORIENT_HIGH_ADDR] = 0x00, - [0x0d] = 0xff, /* Reserved */ - [BMA2x2_STAT_FIFO_ADDR] = 0x00, - [BMA2x2_RANGE_SELECT_ADDR] = 0xf0, - [BMA2x2_BW_SELECT_ADDR] = 0xe0, - [BMA2x2_MODE_CTRL_ADDR] = 0x01, - [BMA2x2_LOW_NOISE_CTRL_ADDR] = 0x9f, - [BMA2x2_DATA_CTRL_ADDR] = 0x3f, - [BMA2x2_RST_ADDR] = 0x00, - [0x15] = 0xff, /* Reserved */ - [BMA2x2_INTR_ENABLE1_ADDR] = 0x08, - [BMA2x2_INTR_ENABLE2_ADDR] = 0x80, - [BMA2x2_INTR_SLOW_NO_MOTION_ADDR] = 0xf0, - [BMA2x2_INTR1_PAD_SELECT_ADDR] = 0x00, - [BMA2x2_INTR_DATA_SELECT_ADDR] = 0x18, - [BMA2x2_INTR2_PAD_SELECT_ADDR] = 0x00, - [0x1c] = 0xff, /* Reserved */ - [0x1d] = 0xff, /* Reserved */ - [BMA2x2_INTR_SOURCE_ADDR] = 0xc0, - [0x1f] = 0xff, /* Reserved */ - [BMA2x2_INTR_SET_ADDR] = 0xf0, - [BMA2x2_INTR_CTRL_ADDR] = 0x70, - [BMA2x2_LOW_DURN_ADDR] = 0x00, - [BMA2x2_LOW_THRES_ADDR] = 0x00, - [BMA2x2_LOW_HIGH_HYST_ADDR] = 0x38, - [BMA2x2_HIGH_DURN_ADDR] = 0x00, - [BMA2x2_HIGH_THRES_ADDR] = 0x00, - [BMA2x2_SLOPE_DURN_ADDR] = 0x00, - [BMA2x2_SLOPE_THRES_ADDR] = 0x00, - [BMA2x2_SLOW_NO_MOTION_THRES_ADDR] = 0x00, - [BMA2x2_TAP_PARAM_ADDR] = 0x38, - [BMA2x2_TAP_THRES_ADDR] = 0x20, - [BMA2x2_ORIENT_PARAM_ADDR] = 0x80, - [BMA2x2_THETA_BLOCK_ADDR] = 0x80, - [BMA2x2_THETA_FLAT_ADDR] = 0xc0, - [BMA2x2_FLAT_HOLD_TIME_ADDR] = 0xc8, - [BMA2x2_FIFO_WML_TRIG] = 0xc0, - [0x31] = 0xff, /* Reserved */ - [BMA2x2_SELFTEST_ADDR] = 0xf8, - [BMA2x2_EEPROM_CTRL_ADDR] = 0x00, - [BMA2x2_SERIAL_CTRL_ADDR] = 0xf8, - [0x35] = 0xff, /* Reserved */ - [BMA2x2_OFFSET_CTRL_ADDR] = 0x08, - [BMA2x2_OFC_SETTING_ADDR] = 0x80, - [BMA2x2_OFFSET_X_AXIS_ADDR] = 0x00, - [BMA2x2_OFFSET_Y_AXIS_ADDR] = 0x00, - [BMA2x2_OFFSET_Z_AXIS_ADDR] = 0x00, - [BMA2x2_GP0_ADDR] = 0x00, - [BMA2x2_GP1_ADDR] = 0x00, - [0x3d] = 0xff, /* Reserved */ - [BMA2x2_FIFO_MODE_ADDR] = 0x3c, - [BMA2x2_FIFO_DATA_OUTPUT_ADDR] = 0x00, + [BMA2x2_CHIP_ID_ADDR] = 0x00, + [0x01] = 0xff, /* Reserved */ + [BMA2x2_X_AXIS_LSB_ADDR] = 0x0e, + [BMA2x2_X_AXIS_MSB_ADDR] = 0x00, + [BMA2x2_Y_AXIS_LSB_ADDR] = 0x0e, + [BMA2x2_Y_AXIS_MSB_ADDR] = 0x00, + [BMA2x2_Z_AXIS_LSB_ADDR] = 0x0e, + [BMA2x2_Z_AXIS_MSB_ADDR] = 0x00, + [BMA2x2_TEMP_ADDR] = 0x00, + [BMA2x2_STAT1_ADDR] = 0x00, + [BMA2x2_STAT2_ADDR] = 0x1f, + [BMA2x2_STAT_TAP_SLOPE_ADDR] = 0x00, + [BMA2x2_STAT_ORIENT_HIGH_ADDR] = 0x00, + [0x0d] = 0xff, /* Reserved */ + [BMA2x2_STAT_FIFO_ADDR] = 0x00, + [BMA2x2_RANGE_SELECT_ADDR] = 0xf0, + [BMA2x2_BW_SELECT_ADDR] = 0xe0, + [BMA2x2_MODE_CTRL_ADDR] = 0x01, + [BMA2x2_LOW_NOISE_CTRL_ADDR] = 0x9f, + [BMA2x2_DATA_CTRL_ADDR] = 0x3f, + [BMA2x2_RST_ADDR] = 0x00, + [0x15] = 0xff, /* Reserved */ + [BMA2x2_INTR_ENABLE1_ADDR] = 0x08, + [BMA2x2_INTR_ENABLE2_ADDR] = 0x80, + [BMA2x2_INTR_SLOW_NO_MOTION_ADDR] = 0xf0, + [BMA2x2_INTR1_PAD_SELECT_ADDR] = 0x00, + [BMA2x2_INTR_DATA_SELECT_ADDR] = 0x18, + [BMA2x2_INTR2_PAD_SELECT_ADDR] = 0x00, + [0x1c] = 0xff, /* Reserved */ + [0x1d] = 0xff, /* Reserved */ + [BMA2x2_INTR_SOURCE_ADDR] = 0xc0, + [0x1f] = 0xff, /* Reserved */ + [BMA2x2_INTR_SET_ADDR] = 0xf0, + [BMA2x2_INTR_CTRL_ADDR] = 0x70, + [BMA2x2_LOW_DURN_ADDR] = 0x00, + [BMA2x2_LOW_THRES_ADDR] = 0x00, + [BMA2x2_LOW_HIGH_HYST_ADDR] = 0x38, + [BMA2x2_HIGH_DURN_ADDR] = 0x00, + [BMA2x2_HIGH_THRES_ADDR] = 0x00, + [BMA2x2_SLOPE_DURN_ADDR] = 0x00, + [BMA2x2_SLOPE_THRES_ADDR] = 0x00, + [BMA2x2_SLOW_NO_MOTION_THRES_ADDR] = 0x00, + [BMA2x2_TAP_PARAM_ADDR] = 0x38, + [BMA2x2_TAP_THRES_ADDR] = 0x20, + [BMA2x2_ORIENT_PARAM_ADDR] = 0x80, + [BMA2x2_THETA_BLOCK_ADDR] = 0x80, + [BMA2x2_THETA_FLAT_ADDR] = 0xc0, + [BMA2x2_FLAT_HOLD_TIME_ADDR] = 0xc8, + [BMA2x2_FIFO_WML_TRIG] = 0xc0, + [0x31] = 0xff, /* Reserved */ + [BMA2x2_SELFTEST_ADDR] = 0xf8, + [BMA2x2_EEPROM_CTRL_ADDR] = 0x00, + [BMA2x2_SERIAL_CTRL_ADDR] = 0xf8, + [0x35] = 0xff, /* Reserved */ + [BMA2x2_OFFSET_CTRL_ADDR] = 0x08, + [BMA2x2_OFC_SETTING_ADDR] = 0x80, + [BMA2x2_OFFSET_X_AXIS_ADDR] = 0x00, + [BMA2x2_OFFSET_Y_AXIS_ADDR] = 0x00, + [BMA2x2_OFFSET_Z_AXIS_ADDR] = 0x00, + [BMA2x2_GP0_ADDR] = 0x00, + [BMA2x2_GP1_ADDR] = 0x00, + [0x3d] = 0xff, /* Reserved */ + [BMA2x2_FIFO_MODE_ADDR] = 0x3c, + [BMA2x2_FIFO_DATA_OUTPUT_ADDR] = 0x00, }; /** @@ -384,11 +381,11 @@ static const uint8_t bma_emul_rsvd_mask[] = { * * @param emul Pointer to BMA255 emulator */ -static void bma_emul_restore_nvm(struct i2c_emul *emul) +static void bma_emul_restore_nvm(const struct emul *emul) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* Restore registers values */ data->reg[BMA2x2_OFFSET_X_AXIS_ADDR] = data->nvm_x; @@ -408,71 +405,71 @@ static void bma_emul_restore_nvm(struct i2c_emul *emul) * * @param emul Pointer to BMA255 emulator */ -static void bma_emul_reset(struct i2c_emul *emul) +static void bma_emul_reset(const struct emul *emul) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); - - data->reg[BMA2x2_CHIP_ID_ADDR] = 0xfa; - data->reg[0x01] = 0x00; /* Reserved */ - data->reg[BMA2x2_X_AXIS_LSB_ADDR] = 0x00; - data->reg[BMA2x2_X_AXIS_MSB_ADDR] = 0x00; - data->reg[BMA2x2_Y_AXIS_LSB_ADDR] = 0x00; - data->reg[BMA2x2_Y_AXIS_MSB_ADDR] = 0x00; - data->reg[BMA2x2_Z_AXIS_LSB_ADDR] = 0x00; - data->reg[BMA2x2_Z_AXIS_MSB_ADDR] = 0x00; - data->reg[BMA2x2_TEMP_ADDR] = 0x00; - data->reg[BMA2x2_STAT1_ADDR] = 0x00; - data->reg[BMA2x2_STAT2_ADDR] = 0x00; - data->reg[BMA2x2_STAT_TAP_SLOPE_ADDR] = 0x00; - data->reg[BMA2x2_STAT_ORIENT_HIGH_ADDR] = 0x00; - data->reg[0x0d] = 0xff; /* Reserved */ - data->reg[BMA2x2_STAT_FIFO_ADDR] = 0x00; - data->reg[BMA2x2_RANGE_SELECT_ADDR] = 0x03; - data->reg[BMA2x2_BW_SELECT_ADDR] = 0x0f; - data->reg[BMA2x2_MODE_CTRL_ADDR] = 0x00; - data->reg[BMA2x2_LOW_NOISE_CTRL_ADDR] = 0x00; - data->reg[BMA2x2_DATA_CTRL_ADDR] = 0x00; - data->reg[BMA2x2_RST_ADDR] = 0x00; - data->reg[0x15] = 0xff; /* Reserved */ - data->reg[BMA2x2_INTR_ENABLE1_ADDR] = 0x00; - data->reg[BMA2x2_INTR_ENABLE2_ADDR] = 0x00; - data->reg[BMA2x2_INTR_SLOW_NO_MOTION_ADDR] = 0x00; - data->reg[BMA2x2_INTR1_PAD_SELECT_ADDR] = 0x00; - data->reg[BMA2x2_INTR_DATA_SELECT_ADDR] = 0x00; - data->reg[BMA2x2_INTR2_PAD_SELECT_ADDR] = 0x00; - data->reg[0x1c] = 0xff; /* Reserved */ - data->reg[0x1d] = 0xff; /* Reserved */ - data->reg[BMA2x2_INTR_SOURCE_ADDR] = 0x00; - data->reg[0x1f] = 0xff; /* Reserved */ - data->reg[BMA2x2_INTR_SET_ADDR] = 0x05; - data->reg[BMA2x2_INTR_CTRL_ADDR] = 0x00; - data->reg[BMA2x2_LOW_DURN_ADDR] = 0x09; - data->reg[BMA2x2_LOW_THRES_ADDR] = 0x30; - data->reg[BMA2x2_LOW_HIGH_HYST_ADDR] = 0x81; - data->reg[BMA2x2_HIGH_DURN_ADDR] = 0x0f; - data->reg[BMA2x2_HIGH_THRES_ADDR] = 0xc0; - data->reg[BMA2x2_SLOPE_DURN_ADDR] = 0x00; - data->reg[BMA2x2_SLOPE_THRES_ADDR] = 0x14; - data->reg[BMA2x2_SLOW_NO_MOTION_THRES_ADDR] = 0x14; - data->reg[BMA2x2_TAP_PARAM_ADDR] = 0x04; - data->reg[BMA2x2_TAP_THRES_ADDR] = 0x0a; - data->reg[BMA2x2_ORIENT_PARAM_ADDR] = 0x18; - data->reg[BMA2x2_THETA_BLOCK_ADDR] = 0x48; - data->reg[BMA2x2_THETA_FLAT_ADDR] = 0x08; - data->reg[BMA2x2_FLAT_HOLD_TIME_ADDR] = 0x11; - data->reg[BMA2x2_FIFO_WML_TRIG] = 0x00; - data->reg[0x31] = 0xff; /* Reserved */ - data->reg[BMA2x2_SELFTEST_ADDR] = 0x00; - data->reg[BMA2x2_EEPROM_CTRL_ADDR] = 0xf0; - data->reg[BMA2x2_SERIAL_CTRL_ADDR] = 0x00; - data->reg[0x35] = 0x00; /* Reserved */ - data->reg[BMA2x2_OFFSET_CTRL_ADDR] = 0x10; - data->reg[BMA2x2_OFC_SETTING_ADDR] = 0x00; - data->reg[0x3d] = 0xff; /* Reserved */ - data->reg[BMA2x2_FIFO_MODE_ADDR] = 0x00; - data->reg[BMA2x2_FIFO_DATA_OUTPUT_ADDR] = 0x00; + data = emul->data; + + data->reg[BMA2x2_CHIP_ID_ADDR] = 0xfa; + data->reg[0x01] = 0x00; /* Reserved */ + data->reg[BMA2x2_X_AXIS_LSB_ADDR] = 0x00; + data->reg[BMA2x2_X_AXIS_MSB_ADDR] = 0x00; + data->reg[BMA2x2_Y_AXIS_LSB_ADDR] = 0x00; + data->reg[BMA2x2_Y_AXIS_MSB_ADDR] = 0x00; + data->reg[BMA2x2_Z_AXIS_LSB_ADDR] = 0x00; + data->reg[BMA2x2_Z_AXIS_MSB_ADDR] = 0x00; + data->reg[BMA2x2_TEMP_ADDR] = 0x00; + data->reg[BMA2x2_STAT1_ADDR] = 0x00; + data->reg[BMA2x2_STAT2_ADDR] = 0x00; + data->reg[BMA2x2_STAT_TAP_SLOPE_ADDR] = 0x00; + data->reg[BMA2x2_STAT_ORIENT_HIGH_ADDR] = 0x00; + data->reg[0x0d] = 0xff; /* Reserved */ + data->reg[BMA2x2_STAT_FIFO_ADDR] = 0x00; + data->reg[BMA2x2_RANGE_SELECT_ADDR] = 0x03; + data->reg[BMA2x2_BW_SELECT_ADDR] = 0x0f; + data->reg[BMA2x2_MODE_CTRL_ADDR] = 0x00; + data->reg[BMA2x2_LOW_NOISE_CTRL_ADDR] = 0x00; + data->reg[BMA2x2_DATA_CTRL_ADDR] = 0x00; + data->reg[BMA2x2_RST_ADDR] = 0x00; + data->reg[0x15] = 0xff; /* Reserved */ + data->reg[BMA2x2_INTR_ENABLE1_ADDR] = 0x00; + data->reg[BMA2x2_INTR_ENABLE2_ADDR] = 0x00; + data->reg[BMA2x2_INTR_SLOW_NO_MOTION_ADDR] = 0x00; + data->reg[BMA2x2_INTR1_PAD_SELECT_ADDR] = 0x00; + data->reg[BMA2x2_INTR_DATA_SELECT_ADDR] = 0x00; + data->reg[BMA2x2_INTR2_PAD_SELECT_ADDR] = 0x00; + data->reg[0x1c] = 0xff; /* Reserved */ + data->reg[0x1d] = 0xff; /* Reserved */ + data->reg[BMA2x2_INTR_SOURCE_ADDR] = 0x00; + data->reg[0x1f] = 0xff; /* Reserved */ + data->reg[BMA2x2_INTR_SET_ADDR] = 0x05; + data->reg[BMA2x2_INTR_CTRL_ADDR] = 0x00; + data->reg[BMA2x2_LOW_DURN_ADDR] = 0x09; + data->reg[BMA2x2_LOW_THRES_ADDR] = 0x30; + data->reg[BMA2x2_LOW_HIGH_HYST_ADDR] = 0x81; + data->reg[BMA2x2_HIGH_DURN_ADDR] = 0x0f; + data->reg[BMA2x2_HIGH_THRES_ADDR] = 0xc0; + data->reg[BMA2x2_SLOPE_DURN_ADDR] = 0x00; + data->reg[BMA2x2_SLOPE_THRES_ADDR] = 0x14; + data->reg[BMA2x2_SLOW_NO_MOTION_THRES_ADDR] = 0x14; + data->reg[BMA2x2_TAP_PARAM_ADDR] = 0x04; + data->reg[BMA2x2_TAP_THRES_ADDR] = 0x0a; + data->reg[BMA2x2_ORIENT_PARAM_ADDR] = 0x18; + data->reg[BMA2x2_THETA_BLOCK_ADDR] = 0x48; + data->reg[BMA2x2_THETA_FLAT_ADDR] = 0x08; + data->reg[BMA2x2_FLAT_HOLD_TIME_ADDR] = 0x11; + data->reg[BMA2x2_FIFO_WML_TRIG] = 0x00; + data->reg[0x31] = 0xff; /* Reserved */ + data->reg[BMA2x2_SELFTEST_ADDR] = 0x00; + data->reg[BMA2x2_EEPROM_CTRL_ADDR] = 0xf0; + data->reg[BMA2x2_SERIAL_CTRL_ADDR] = 0x00; + data->reg[0x35] = 0x00; /* Reserved */ + data->reg[BMA2x2_OFFSET_CTRL_ADDR] = 0x10; + data->reg[BMA2x2_OFC_SETTING_ADDR] = 0x00; + data->reg[0x3d] = 0xff; /* Reserved */ + data->reg[BMA2x2_FIFO_MODE_ADDR] = 0x00; + data->reg[BMA2x2_FIFO_DATA_OUTPUT_ADDR] = 0x00; /* Restore registers backed in NVM */ bma_emul_restore_nvm(emul); @@ -514,12 +511,12 @@ static int bma_emul_range_to_shift(uint8_t range) * * @return 0 on success */ -static int bma_emul_handle_nvm_write(struct i2c_emul *emul, uint8_t val) +static int bma_emul_handle_nvm_write(const struct emul *emul, uint8_t val) { struct bma_emul_data *data; uint8_t writes_rem; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* NVM not ready, ignore write/load requests */ if (!(data->reg[BMA2x2_EEPROM_CTRL_ADDR] & BMA2x2_EEPROM_RDY)) { @@ -532,7 +529,8 @@ static int bma_emul_handle_nvm_write(struct i2c_emul *emul, uint8_t val) } writes_rem = (data->reg[BMA2x2_EEPROM_CTRL_ADDR] & - BMA2x2_EEPROM_REMAIN_MSK) >> BMA2x2_EEPROM_REMAIN_OFF; + BMA2x2_EEPROM_REMAIN_MSK) >> + BMA2x2_EEPROM_REMAIN_OFF; /* Trigger write is set, write is unlocked and writes remaining */ if (val & BMA2x2_EEPROM_PROG && data->reg[BMA2x2_EEPROM_CTRL_ADDR] & BMA2x2_EEPROM_PROG_EN && @@ -544,10 +542,9 @@ static int bma_emul_handle_nvm_write(struct i2c_emul *emul, uint8_t val) data->nvm_gp1 = data->reg[BMA2x2_GP1_ADDR]; /* Decrement number of remaining writes and save it in reg */ writes_rem--; - data->reg[BMA2x2_EEPROM_CTRL_ADDR] &= - ~BMA2x2_EEPROM_REMAIN_MSK; + data->reg[BMA2x2_EEPROM_CTRL_ADDR] &= ~BMA2x2_EEPROM_REMAIN_MSK; data->reg[BMA2x2_EEPROM_CTRL_ADDR] |= - writes_rem << BMA2x2_EEPROM_REMAIN_OFF; + writes_rem << BMA2x2_EEPROM_REMAIN_OFF; } return 0; @@ -558,16 +555,16 @@ static int bma_emul_handle_nvm_write(struct i2c_emul *emul, uint8_t val) * * @param emul Pointer to BMA255 emulator */ -static void bma_emul_clear_int(struct i2c_emul *emul) +static void bma_emul_clear_int(const struct emul *emul) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; - data->reg[BMA2x2_STAT1_ADDR] = 0x00; - data->reg[BMA2x2_STAT2_ADDR] = 0x00; - data->reg[BMA2x2_STAT_TAP_SLOPE_ADDR] = 0x00; - data->reg[BMA2x2_STAT_ORIENT_HIGH_ADDR] = 0x00; + data->reg[BMA2x2_STAT1_ADDR] = 0x00; + data->reg[BMA2x2_STAT2_ADDR] = 0x00; + data->reg[BMA2x2_STAT_TAP_SLOPE_ADDR] = 0x00; + data->reg[BMA2x2_STAT_ORIENT_HIGH_ADDR] = 0x00; } /** @@ -579,12 +576,12 @@ static void bma_emul_clear_int(struct i2c_emul *emul) * * @return target Value to which offset compensation should be calculated */ -static int16_t bma_emul_get_target(struct i2c_emul *emul, int axis) +static int16_t bma_emul_get_target(const struct emul *emul, int axis) { struct bma_emul_data *data; uint8_t target; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; target = data->reg[BMA2x2_OFC_SETTING_ADDR] >> BMA2x2_OFC_TARGET_AXIS(axis); @@ -614,13 +611,13 @@ static int16_t bma_emul_get_target(struct i2c_emul *emul, int axis) * @return 0 on success * @return -EIO when trying to start fast compensation in wrong emulator state */ -static int bma_emul_handle_off_comp(struct i2c_emul *emul, uint8_t val) +static int bma_emul_handle_off_comp(const struct emul *emul, uint8_t val) { struct bma_emul_data *data; uint8_t trigger; int16_t target; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (val & BMA2x2_OFFSET_RESET) { data->off_x = 0; @@ -631,7 +628,6 @@ static int bma_emul_handle_off_comp(struct i2c_emul *emul, uint8_t val) data->reg[BMA2x2_OFFSET_Z_AXIS_ADDR] = 0; } - trigger = (val & BMA2x2_OFFSET_TRIGGER_MASK) >> BMA2x2_OFFSET_TRIGGER_OFF; @@ -681,13 +677,13 @@ static int bma_emul_handle_off_comp(struct i2c_emul *emul, uint8_t val) * @return 0 on success * @return -EIO on error */ -static int bma_emul_handle_write(struct i2c_emul *emul, int reg, int bytes) +static int bma_emul_handle_write(const struct emul *emul, int reg, int bytes) { struct bma_emul_data *data; uint8_t val; int ret; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; val = data->write_byte; @@ -717,7 +713,6 @@ static int bma_emul_handle_write(struct i2c_emul *emul, int reg, int bytes) return -EIO; } - switch (reg) { case BMA2x2_RST_ADDR: if (val == BMA2x2_CMD_SOFT_RESET) { @@ -745,9 +740,9 @@ static int bma_emul_handle_write(struct i2c_emul *emul, int reg, int bytes) /* Only slow compensation bits are RW */ val &= BMA2x2_OFFSET_CAL_SLOW_X | BMA2x2_OFFSET_CAL_SLOW_Y | BMA2x2_OFFSET_CAL_SLOW_Z; - val |= data->reg[reg] & ~(BMA2x2_OFFSET_CAL_SLOW_X | - BMA2x2_OFFSET_CAL_SLOW_Y | - BMA2x2_OFFSET_CAL_SLOW_Z); + val |= data->reg[reg] & + ~(BMA2x2_OFFSET_CAL_SLOW_X | BMA2x2_OFFSET_CAL_SLOW_Y | + BMA2x2_OFFSET_CAL_SLOW_Z); break; /* Change internal offset to value set in I2C message */ case BMA2x2_OFFSET_X_AXIS_ADDR: @@ -793,7 +788,7 @@ static int bma_emul_handle_write(struct i2c_emul *emul, int reg, int bytes) * @return 0 on success * @return -EIO when accessing MSB before LSB with enabled shadowing */ -static int bma_emul_get_acc_val(struct i2c_emul *emul, int lsb_reg, +static int bma_emul_get_acc_val(const struct emul *emul, int lsb_reg, bool *lsb_read, bool lsb, int16_t val) { struct bma_emul_data *data; @@ -802,7 +797,7 @@ static int bma_emul_get_acc_val(struct i2c_emul *emul, int lsb_reg, int msb_reg; int shift; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (lsb) { *lsb_read = 1; @@ -837,7 +832,7 @@ static int bma_emul_get_acc_val(struct i2c_emul *emul, int lsb_reg, } /** Check description in emul_bma255.h */ -int bma_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, bool read) +int bma_emul_access_reg(const struct emul *emul, int reg, int bytes, bool read) { /* * Exclude first byte (select register) from total number of bytes @@ -868,13 +863,13 @@ int bma_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, bool read) * @return 0 on success * @return -EIO on error */ -static int bma_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *val, +static int bma_emul_handle_read(const struct emul *emul, int reg, uint8_t *val, int bytes) { struct bma_emul_data *data; int ret; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; reg = bma_emul_access_reg(emul, reg, bytes, true /* = read */); @@ -936,12 +931,12 @@ static int bma_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *val, * @return 0 on success * @return -EIO on error */ -static int bma_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, +static int bma_emul_write_byte(const struct emul *emul, int reg, uint8_t val, int bytes) { struct bma_emul_data *data; - data = BMA_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->write_byte = val; @@ -961,27 +956,20 @@ static int bma_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, * * @return 0 indicating success (always) */ -static int bma_emul_init(const struct emul *emul, - const struct device *parent) +static int bma_emul_init(const struct emul *emul, const struct device *parent) { - const struct i2c_common_emul_cfg *cfg = emul->cfg; - struct i2c_common_emul_data *data = cfg->data; - int ret; + struct bma_emul_data *data = emul->data; - data->emul.api = &i2c_common_emul_api; - data->emul.addr = cfg->addr; - data->i2c = parent; - data->cfg = cfg; - i2c_common_emul_init(data); + data->common.i2c = parent; - ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + i2c_common_emul_init(&data->common); - bma_emul_reset(&data->emul); + bma_emul_reset(emul); - return ret; + return 0; } -#define BMA255_EMUL(n) \ +#define BMA255_EMUL(n) \ static struct bma_emul_data bma_emul_data_##n = { \ .nvm_x = DT_INST_PROP(n, nvm_off_x), \ .nvm_y = DT_INST_PROP(n, nvm_off_y), \ @@ -1010,29 +998,22 @@ static int bma_emul_init(const struct emul *emul, .finish_read = NULL, \ .access_reg = bma_emul_access_reg, \ }, \ - }; \ - \ - static const struct i2c_common_emul_cfg bma_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .data = &bma_emul_data_##n.common, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(bma_emul_init, DT_DRV_INST(n), &bma_emul_cfg_##n, \ - &bma_emul_data_##n) + }; \ + \ + static const struct i2c_common_emul_cfg bma_emul_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &bma_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DT_INST_DEFINE(n, bma_emul_init, &bma_emul_data_##n, \ + &bma_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(BMA255_EMUL) -#define BMA255_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &bma_emul_data_##n.common.emul; - -/** Check description in emul_bma255.h */ -struct i2c_emul *bma_emul_get(int ord) +struct i2c_common_emul_data * +emul_bma_get_i2c_common_data(const struct emul *emul) { - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(BMA255_EMUL_CASE) - - default: - return NULL; - } + return emul->data; } + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); diff --git a/zephyr/emul/emul_bmi.c b/zephyr/emul/emul_bmi.c index 37dba43e6d..fe46428f01 100644 --- a/zephyr/emul/emul_bmi.c +++ b/zephyr/emul/emul_bmi.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,18 +13,16 @@ LOG_MODULE_REGISTER(emul_bmi); #include <zephyr/drivers/emul.h> #include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c_emul.h> +#include <zephyr/sys/__assert.h> #include "emul/emul_common_i2c.h" #include "emul/emul_bmi.h" +#include "emul/emul_stub_device.h" #include "driver/accelgyro_bmi160.h" #include "driver/accelgyro_bmi260.h" #include "driver/accelgyro_bmi_common.h" -#define BMI_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct bmi_emul_data, common) - /** Run-time data used by the emulator */ struct bmi_emul_data { /** Common I2C data */ @@ -87,7 +85,7 @@ struct bmi_emul_data { }; /** Check description in emul_bmi.h */ -void bmi_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) +void bmi_emul_set_reg(const struct emul *emul, int reg, uint8_t val) { struct bmi_emul_data *data; @@ -95,12 +93,12 @@ void bmi_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) return; } - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->reg[reg] = val; } /** Check description in emul_bmi.h */ -uint8_t bmi_emul_get_reg(struct i2c_emul *emul, int reg) +uint8_t bmi_emul_get_reg(const struct emul *emul, int reg) { struct bmi_emul_data *data; @@ -108,7 +106,7 @@ uint8_t bmi_emul_get_reg(struct i2c_emul *emul, int reg) return 0; } - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; return data->reg[reg]; } @@ -258,11 +256,11 @@ static uint16_t bmi_emul_gyr_off_to_nvm(int16_t off) } /** Check description in emul_bmi.h */ -int16_t bmi_emul_get_off(struct i2c_emul *emul, enum bmi_emul_axis axis) +int16_t bmi_emul_get_off(const struct emul *emul, enum bmi_emul_axis axis) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMI_EMUL_ACC_X: @@ -283,30 +281,30 @@ int16_t bmi_emul_get_off(struct i2c_emul *emul, enum bmi_emul_axis axis) } /** Check description in emul_bmi.h */ -void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, +void bmi_emul_set_off(const struct emul *emul, enum bmi_emul_axis axis, int16_t val) { struct bmi_emul_data *data; uint16_t gyr_off; uint8_t gyr98_shift; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMI_EMUL_ACC_X: data->off_acc_x = val; data->reg[data->type_data->acc_off_reg] = - bmi_emul_acc_off_to_nvm(data->off_acc_x); + bmi_emul_acc_off_to_nvm(data->off_acc_x); break; case BMI_EMUL_ACC_Y: data->off_acc_y = val; data->reg[data->type_data->acc_off_reg + 1] = - bmi_emul_acc_off_to_nvm(data->off_acc_y); + bmi_emul_acc_off_to_nvm(data->off_acc_y); break; case BMI_EMUL_ACC_Z: data->off_acc_z = val; data->reg[data->type_data->acc_off_reg + 2] = - bmi_emul_acc_off_to_nvm(data->off_acc_z); + bmi_emul_acc_off_to_nvm(data->off_acc_z); break; case BMI_EMUL_GYR_X: data->off_gyr_x = val; @@ -314,9 +312,9 @@ void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, data->reg[data->type_data->gyr_off_reg] = gyr_off & 0xff; gyr98_shift = 0; data->reg[data->type_data->gyr98_off_reg] &= - ~(0x3 << gyr98_shift); + ~(0x3 << gyr98_shift); data->reg[data->type_data->gyr98_off_reg] |= - (gyr_off & 0x300) >> (8 - gyr98_shift); + (gyr_off & 0x300) >> (8 - gyr98_shift); break; case BMI_EMUL_GYR_Y: data->off_gyr_y = val; @@ -324,9 +322,9 @@ void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, data->reg[data->type_data->gyr_off_reg + 1] = gyr_off & 0xff; gyr98_shift = 2; data->reg[data->type_data->gyr98_off_reg] &= - ~(0x3 << gyr98_shift); + ~(0x3 << gyr98_shift); data->reg[data->type_data->gyr98_off_reg] |= - (gyr_off & 0x300) >> (8 - gyr98_shift); + (gyr_off & 0x300) >> (8 - gyr98_shift); break; case BMI_EMUL_GYR_Z: data->off_gyr_z = val; @@ -334,19 +332,19 @@ void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, data->reg[data->type_data->gyr_off_reg + 2] = gyr_off & 0xff; gyr98_shift = 4; data->reg[data->type_data->gyr98_off_reg] &= - ~(0x3 << gyr98_shift); + ~(0x3 << gyr98_shift); data->reg[data->type_data->gyr98_off_reg] |= - (gyr_off & 0x300) >> (8 - gyr98_shift); + (gyr_off & 0x300) >> (8 - gyr98_shift); break; } } /** Check description in emul_bmi.h */ -int32_t bmi_emul_get_value(struct i2c_emul *emul, enum bmi_emul_axis axis) +int32_t bmi_emul_get_value(const struct emul *emul, enum bmi_emul_axis axis) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMI_EMUL_ACC_X: @@ -367,12 +365,12 @@ int32_t bmi_emul_get_value(struct i2c_emul *emul, enum bmi_emul_axis axis) } /** Check description in emul_bmi.h */ -void bmi_emul_set_value(struct i2c_emul *emul, enum bmi_emul_axis axis, +void bmi_emul_set_value(const struct emul *emul, enum bmi_emul_axis axis, int32_t val) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case BMI_EMUL_ACC_X: @@ -397,47 +395,47 @@ void bmi_emul_set_value(struct i2c_emul *emul, enum bmi_emul_axis axis, } /** Check description in emul_bmi.h */ -void bmi_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set) +void bmi_emul_set_err_on_ro_write(const struct emul *emul, bool set) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_ro_write = set; } /** Check description in emul_bmi.h */ -void bmi_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set) +void bmi_emul_set_err_on_rsvd_write(const struct emul *emul, bool set) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_rsvd_write = set; } /** Check description in emul_bmi.h */ -void bmi_emul_set_err_on_wo_read(struct i2c_emul *emul, bool set) +void bmi_emul_set_err_on_wo_read(const struct emul *emul, bool set) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_wo_read = set; } /** Check description in emul_bmi.h */ -void bmi_emul_simulate_cmd_exec_time(struct i2c_emul *emul, bool set) +void bmi_emul_simulate_cmd_exec_time(const struct emul *emul, bool set) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->simulate_command_exec_time = set; } /** Check description in emul_bmi.h */ -void bmi_emul_set_skipped_frames(struct i2c_emul *emul, uint8_t skip) +void bmi_emul_set_skipped_frames(const struct emul *emul, uint8_t skip) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->fifo_skip = skip; } @@ -460,13 +458,13 @@ static int64_t bmi_emul_get_sensortime(void) * @param reg Pointer to 3 byte array, where current sensor time should be * stored */ -static void bmi_emul_set_sensortime_reg(struct i2c_emul *emul, uint8_t *reg) +static void bmi_emul_set_sensortime_reg(const struct emul *emul, uint8_t *reg) { struct bmi_emul_data *data; uint32_t twos_comp_val; int64_t time; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; time = bmi_emul_get_sensortime(); @@ -487,13 +485,13 @@ static void bmi_emul_set_sensortime_reg(struct i2c_emul *emul, uint8_t *reg) * @param reg Pointer to 2 byte array, where sensor value should be stored * @param shift How many bits should be shift to the right */ -static void bmi_emul_set_data_reg(struct i2c_emul *emul, int32_t val, +static void bmi_emul_set_data_reg(const struct emul *emul, int32_t val, uint8_t *reg, int shift) { struct bmi_emul_data *data; uint32_t twos_comp_val; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; twos_comp_val = bmi_emul_val_to_twos_comp(val); @@ -515,14 +513,14 @@ static void bmi_emul_set_data_reg(struct i2c_emul *emul, int32_t val, * * @return length of frame */ -static uint8_t bmi_emul_get_frame_len(struct i2c_emul *emul, +static uint8_t bmi_emul_get_frame_len(const struct emul *emul, struct bmi_emul_frame *frame, bool tag_time, bool header) { struct bmi_emul_data *data; int len; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* Empty FIFO frame */ if (frame == NULL) { @@ -584,7 +582,7 @@ static uint8_t bmi_emul_get_frame_len(struct i2c_emul *emul, * data * @param gyr_shift How many bits should be right shifted from gyroscope data */ -static void bmi_emul_set_current_frame(struct i2c_emul *emul, +static void bmi_emul_set_current_frame(const struct emul *emul, struct bmi_emul_frame *frame, bool tag_time, bool header, int acc_shift, int gyr_shift) @@ -592,11 +590,11 @@ static void bmi_emul_set_current_frame(struct i2c_emul *emul, struct bmi_emul_data *data; int i = 0; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->fifo_frame_byte = 0; - data->fifo_frame_len = bmi_emul_get_frame_len(emul, frame, tag_time, - header); + data->fifo_frame_len = + bmi_emul_get_frame_len(emul, frame, tag_time, header); /* Empty FIFO frame */ if (frame == NULL) { if (tag_time && header) { @@ -628,11 +626,14 @@ static void bmi_emul_set_current_frame(struct i2c_emul *emul, if (header) { data->fifo[0] = BMI_EMUL_FIFO_HEAD_DATA; data->fifo[0] |= frame->type & BMI_EMUL_FRAME_MAG ? - BMI_EMUL_FIFO_HEAD_DATA_MAG : 0; + BMI_EMUL_FIFO_HEAD_DATA_MAG : + 0; data->fifo[0] |= frame->type & BMI_EMUL_FRAME_GYR ? - BMI_EMUL_FIFO_HEAD_DATA_GYR : 0; + BMI_EMUL_FIFO_HEAD_DATA_GYR : + 0; data->fifo[0] |= frame->type & BMI_EMUL_FRAME_ACC ? - BMI_EMUL_FIFO_HEAD_DATA_ACC : 0; + BMI_EMUL_FIFO_HEAD_DATA_ACC : + 0; data->fifo[0] |= frame->tag & BMI_EMUL_FIFO_HEAD_DATA_TAG_MASK; i = 1; } @@ -679,20 +680,20 @@ static void bmi_emul_set_current_frame(struct i2c_emul *emul, * * @param emul Pointer to BMI emulator */ -static void bmi_emul_updata_int_off(struct i2c_emul *emul) +static void bmi_emul_updata_int_off(const struct emul *emul) { struct bmi_emul_data *data; uint16_t gyr_nvm; uint8_t gyr98; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->off_acc_x = bmi_emul_acc_nvm_to_off( - data->reg[data->type_data->acc_off_reg]); + data->reg[data->type_data->acc_off_reg]); data->off_acc_y = bmi_emul_acc_nvm_to_off( - data->reg[data->type_data->acc_off_reg + 1]); + data->reg[data->type_data->acc_off_reg + 1]); data->off_acc_z = bmi_emul_acc_nvm_to_off( - data->reg[data->type_data->acc_off_reg + 2]); + data->reg[data->type_data->acc_off_reg + 2]); gyr98 = data->reg[data->type_data->gyr98_off_reg]; @@ -713,14 +714,14 @@ static void bmi_emul_updata_int_off(struct i2c_emul *emul) * * @param emul Pointer to BMI emulator */ -static void bmi_emul_restore_nvm(struct i2c_emul *emul) +static void bmi_emul_restore_nvm(const struct emul *emul) { struct bmi_emul_data *data; int i; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; - ASSERT(data->type_data->nvm_len <= BMI_EMUL_MAX_NVM_REGS); + __ASSERT_NO_MSG(data->type_data->nvm_len <= BMI_EMUL_MAX_NVM_REGS); /* Restore registers values */ for (i = 0; i < data->type_data->nvm_len; i++) { @@ -731,11 +732,11 @@ static void bmi_emul_restore_nvm(struct i2c_emul *emul) } /** Check description in emul_bmi.h */ -void bmi_emul_flush_fifo(struct i2c_emul *emul, bool tag_time, bool header) +void bmi_emul_flush_fifo(const struct emul *emul, bool tag_time, bool header) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->fifo_skip = 0; data->fifo_frame = NULL; @@ -747,11 +748,11 @@ void bmi_emul_flush_fifo(struct i2c_emul *emul, bool tag_time, bool header) } /** Check description in emul_bmi.h */ -void bmi_emul_reset_common(struct i2c_emul *emul, bool tag_time, bool header) +void bmi_emul_reset_common(const struct emul *emul, bool tag_time, bool header) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* Restore registers backed in NVM */ bmi_emul_restore_nvm(emul); @@ -764,21 +765,21 @@ void bmi_emul_reset_common(struct i2c_emul *emul, bool tag_time, bool header) } /** Check description in emul_bmi.h */ -void bmi_emul_set_cmd_end_time(struct i2c_emul *emul, int time) +void bmi_emul_set_cmd_end_time(const struct emul *emul, int time) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->cmd_end_time = k_uptime_get_32() + time; } /** Check description in emul_bmi.h */ -bool bmi_emul_is_cmd_end(struct i2c_emul *emul) +bool bmi_emul_is_cmd_end(const struct emul *emul) { struct bmi_emul_data *data; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* We are simulating command execution time and it doesn't expired */ if (data->simulate_command_exec_time && @@ -803,14 +804,14 @@ bool bmi_emul_is_cmd_end(struct i2c_emul *emul) * @return 0 on success * @return -EIO on error */ -static int bmi_emul_handle_write(struct i2c_emul *emul, int reg, uint8_t val, +static int bmi_emul_handle_write(const struct emul *emul, int reg, uint8_t val, int byte) { struct bmi_emul_data *data; uint8_t rsvd_mask; int ret; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; ret = data->type_data->handle_write(data->reg, emul, reg, byte, val); reg = data->type_data->access_reg(emul, reg, byte, false /* = read */); @@ -855,16 +856,15 @@ static int bmi_emul_handle_write(struct i2c_emul *emul, int reg, uint8_t val, } /** Check description in emul_bmi.h */ -void bmi_emul_state_to_reg(struct i2c_emul *emul, int acc_shift, +void bmi_emul_state_to_reg(const struct emul *emul, int acc_shift, int gyr_shift, int acc_reg, int gyr_reg, - int sensortime_reg, bool acc_off_en, - bool gyr_off_en) + int sensortime_reg, bool acc_off_en, bool gyr_off_en) { struct bmi_emul_data *data; int32_t val[3]; int i; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (gyr_off_en) { val[0] = data->gyr_x - data->off_gyr_x; @@ -900,12 +900,13 @@ void bmi_emul_state_to_reg(struct i2c_emul *emul, int acc_shift, } /** Check description in emul_bmi.h */ -void bmi_emul_append_frame(struct i2c_emul *emul, struct bmi_emul_frame *frame) +void bmi_emul_append_frame(const struct emul *emul, + struct bmi_emul_frame *frame) { struct bmi_emul_data *data; struct bmi_emul_frame *tmp_frame; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (data->fifo_frame == NULL) { data->fifo_frame = frame; @@ -919,13 +920,13 @@ void bmi_emul_append_frame(struct i2c_emul *emul, struct bmi_emul_frame *frame) } /** Check description in emul_bmi.h */ -uint16_t bmi_emul_fifo_len(struct i2c_emul *emul, bool tag_time, bool header) +uint16_t bmi_emul_fifo_len(const struct emul *emul, bool tag_time, bool header) { struct bmi_emul_frame *frame; struct bmi_emul_data *data; uint16_t len = 0; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (data->fifo_skip != 0 && header) { len += 2; @@ -945,14 +946,13 @@ uint16_t bmi_emul_fifo_len(struct i2c_emul *emul, bool tag_time, bool header) } /** Check description in emul_bmi.h */ -uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, - bool tag_time, bool header, int acc_shift, - int gyr_shift) +uint8_t bmi_emul_get_fifo_data(const struct emul *emul, int byte, bool tag_time, + bool header, int acc_shift, int gyr_shift) { struct bmi_emul_data *data; int ret; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (byte == 0) { /* Repeat uncompleated read of frame */ @@ -967,6 +967,7 @@ uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, if (data->fifo_skip != 0 && byte == 1 && header) { /* Return number of skipped frames */ + ret = data->fifo_skip; data->fifo_skip = 0; @@ -999,13 +1000,13 @@ uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, * @return 0 on success * @return -EIO on error */ -static int bmi_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, +static int bmi_emul_handle_read(const struct emul *emul, int reg, uint8_t *buf, int byte) { struct bmi_emul_data *data; int ret; - data = BMI_DATA_FROM_I2C_EMUL(emul); + data = emul->data; ret = data->type_data->handle_read(data->reg, emul, reg, byte, buf); reg = data->type_data->access_reg(emul, reg, byte, true /* = read */); @@ -1018,6 +1019,31 @@ static int bmi_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, return 0; } +/** + * @brief Called at the end of I2C read message. + * + * @param target Pointer to emulator + * @param reg Address which is now accessed by read command (first byte of last + * I2C write message) + * @param bytes Number of bytes responeded to the I2C read message + * + * @return 0 on success + * @return -EIO on error + */ +static int bmi_emul_finish_read(const struct emul *emul, int reg, int bytes) +{ + struct bmi_emul_data *data; + int ret; + + data = emul->data; + + if (data->type_data->finish_read == NULL) { + return 0; + } + ret = data->type_data->finish_read(data->reg, emul, reg, bytes); + return ret; +} + /* Device instantiation */ /** @@ -1031,42 +1057,31 @@ static int bmi_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, * * @return 0 indicating success (always) */ -static int bmi_emul_init(const struct emul *emul, - const struct device *parent) +static int bmi_emul_init(const struct emul *emul, const struct device *parent) { - const struct i2c_common_emul_cfg *cfg = emul->cfg; - struct i2c_common_emul_data *data = cfg->data; - struct bmi_emul_data *bmi_data; - int ret; - - data->emul.api = &i2c_common_emul_api; - data->emul.addr = cfg->addr; - data->i2c = parent; - data->cfg = cfg; - i2c_common_emul_init(data); + struct bmi_emul_data *data = emul->data; - bmi_data = CONTAINER_OF(data, struct bmi_emul_data, common); + data->common.i2c = parent; + i2c_common_emul_init(&data->common); - switch (bmi_data->type) { + switch (data->type) { case BMI_EMUL_160: - bmi_data->type_data = get_bmi160_emul_type_data(); + data->type_data = get_bmi160_emul_type_data(); break; case BMI_EMUL_260: - bmi_data->type_data = get_bmi260_emul_type_data(); + data->type_data = get_bmi260_emul_type_data(); break; } /* Set callback access_reg to type specific function */ - data->access_reg = bmi_data->type_data->access_reg; + data->common.access_reg = data->type_data->access_reg; - ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + data->type_data->reset(data->reg, emul); - bmi_data->type_data->reset(bmi_data->reg, &data->emul); - - return ret; + return 0; } -#define BMI_EMUL(n) \ +#define BMI_EMUL(n) \ static struct bmi_emul_data bmi_emul_data_##n = { \ .error_on_ro_write = DT_INST_PROP(n, error_on_ro_write),\ .error_on_wo_read = DT_INST_PROP(n, error_on_wo_read), \ @@ -1081,32 +1096,24 @@ static int bmi_emul_init(const struct emul *emul, .finish_write = NULL, \ .start_read = NULL, \ .read_byte = bmi_emul_handle_read, \ - .finish_read = NULL, \ + .finish_read = bmi_emul_finish_read, \ .access_reg = NULL, \ }, \ - }; \ - \ - static const struct i2c_common_emul_cfg bmi_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .data = &bmi_emul_data_##n.common, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(bmi_emul_init, DT_DRV_INST(n), &bmi_emul_cfg_##n, \ - &bmi_emul_data_##n) + }; \ + static const struct i2c_common_emul_cfg bmi_emul_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &bmi_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DT_INST_DEFINE(n, bmi_emul_init, &bmi_emul_data_##n, \ + &bmi_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(BMI_EMUL) -#define BMI_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &bmi_emul_data_##n.common.emul; +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); -/** Check description in emul_bmi.h */ -struct i2c_emul *bmi_emul_get(int ord) +struct i2c_common_emul_data * +emul_bmi_get_i2c_common_data(const struct emul *emul) { - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(BMI_EMUL_CASE) - - default: - return NULL; - } + return emul->data; } diff --git a/zephyr/emul/emul_bmi160.c b/zephyr/emul/emul_bmi160.c index 9a2f4b5cf1..c1d6b58a8f 100644 --- a/zephyr/emul/emul_bmi160.c +++ b/zephyr/emul/emul_bmi160.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,105 +21,105 @@ LOG_MODULE_REGISTER(emul_bmi160); /** Mask reserved bits in each register of BMI160 */ static const uint8_t bmi_emul_160_rsvd_mask[] = { - [BMI160_CHIP_ID] = 0x00, - [0x01] = 0xff, /* Reserved */ - [BMI160_ERR_REG] = 0x00, - [BMI160_PMU_STATUS] = 0xc0, - [BMI160_MAG_X_L_G] = 0x00, - [BMI160_MAG_X_H_G] = 0x00, - [BMI160_MAG_Y_L_G] = 0x00, - [BMI160_MAG_Y_H_G] = 0x00, - [BMI160_MAG_Z_L_G] = 0x00, - [BMI160_MAG_Z_H_G] = 0x00, - [BMI160_RHALL_L_G] = 0x00, - [BMI160_RHALL_H_G] = 0x00, - [BMI160_GYR_X_L_G] = 0x00, - [BMI160_GYR_X_H_G] = 0x00, - [BMI160_GYR_Y_L_G] = 0x00, - [BMI160_GYR_Y_H_G] = 0x00, - [BMI160_GYR_Z_L_G] = 0x00, - [BMI160_GYR_Z_H_G] = 0x00, - [BMI160_ACC_X_L_G] = 0x00, - [BMI160_ACC_X_H_G] = 0x00, - [BMI160_ACC_Y_L_G] = 0x00, - [BMI160_ACC_Y_H_G] = 0x00, - [BMI160_ACC_Z_L_G] = 0x00, - [BMI160_ACC_Z_H_G] = 0x00, - [BMI160_SENSORTIME_0] = 0x00, - [BMI160_SENSORTIME_1] = 0x00, - [BMI160_SENSORTIME_2] = 0x00, - [BMI160_STATUS] = 0x01, - [BMI160_INT_STATUS_0] = 0x00, - [BMI160_INT_STATUS_1] = 0x03, - [BMI160_INT_STATUS_2] = 0x00, - [BMI160_INT_STATUS_3] = 0x00, - [BMI160_TEMPERATURE_0] = 0x00, - [BMI160_TEMPERATURE_1] = 0x00, - [BMI160_FIFO_LENGTH_0] = 0x00, - [BMI160_FIFO_LENGTH_1] = 0xf8, - [BMI160_FIFO_DATA] = 0x00, - [0x25 ... 0x3f] = 0xff, /* Reserved */ - [BMI160_ACC_CONF] = 0x00, - [BMI160_ACC_RANGE] = 0xf0, - [BMI160_GYR_CONF] = 0xc0, - [BMI160_GYR_RANGE] = 0xf8, - [BMI160_MAG_CONF] = 0xf0, - [BMI160_FIFO_DOWNS] = 0x00, - [BMI160_FIFO_CONFIG_0] = 0x00, - [BMI160_FIFO_CONFIG_1] = 0x01, - [0x48 ... 0x4a] = 0xff, /* Reserved */ - [BMI160_MAG_IF_0] = 0x01, - [BMI160_MAG_IF_1] = 0x40, - [BMI160_MAG_IF_2] = 0x00, - [BMI160_MAG_IF_3] = 0x00, - [BMI160_MAG_IF_4] = 0x00, - [BMI160_INT_EN_0] = 0x08, - [BMI160_INT_EN_1] = 0x80, - [BMI160_INT_EN_2] = 0xf0, - [BMI160_INT_OUT_CTRL] = 0x00, - [BMI160_INT_LATCH] = 0xc0, - [BMI160_INT_MAP_0] = 0x00, - [BMI160_INT_MAP_1] = 0x00, - [BMI160_INT_MAP_2] = 0x00, - [BMI160_INT_DATA_0] = 0x77, - [BMI160_INT_DATA_1] = 0x7f, - [BMI160_INT_LOW_HIGH_0] = 0x00, - [BMI160_INT_LOW_HIGH_1] = 0x00, - [BMI160_INT_LOW_HIGH_2] = 0x3c, - [BMI160_INT_LOW_HIGH_3] = 0x00, - [BMI160_INT_LOW_HIGH_4] = 0x00, - [BMI160_INT_MOTION_0] = 0x00, - [BMI160_INT_MOTION_1] = 0x00, - [BMI160_INT_MOTION_2] = 0x00, - [BMI160_INT_MOTION_3] = 0xc0, - [BMI160_INT_TAP_0] = 0x38, - [BMI160_INT_TAP_1] = 0xe0, - [BMI160_INT_ORIENT_0] = 0x00, - [BMI160_INT_ORIENT_1] = 0x00, - [BMI160_INT_FLAT_0] = 0xc0, - [BMI160_INT_FLAT_1] = 0xc8, - [BMI160_FOC_CONF] = 0x80, - [BMI160_CONF] = 0xfd, - [BMI160_IF_CONF] = 0xce, - [BMI160_PMU_TRIGGER] = 0x80, - [BMI160_SELF_TEST] = 0xe0, - [0x6e] = 0xff, /* Reserved */ - [0x6f] = 0xff, /* Reserved */ - [BMI160_NV_CONF] = 0xf0, - [BMI160_OFFSET_ACC70] = 0x00, - [BMI160_OFFSET_ACC70 + 1] = 0x00, - [BMI160_OFFSET_ACC70 + 2] = 0x00, - [BMI160_OFFSET_GYR70] = 0x00, - [BMI160_OFFSET_GYR70 + 1] = 0x00, - [BMI160_OFFSET_GYR70 + 2] = 0x00, - [BMI160_OFFSET_EN_GYR98] = 0x00, - [BMI160_STEP_CNT_0] = 0x00, - [BMI160_STEP_CNT_1] = 0x00, - [BMI160_STEP_CONF_0] = 0x00, - [BMI160_STEP_CONF_1] = 0xf0, - [0x7c] = 0xff, /* Reserved */ - [0x7d] = 0xff, /* Reserved */ - [BMI160_CMD_REG] = 0x00, + [BMI160_CHIP_ID] = 0x00, + [0x01] = 0xff, /* Reserved */ + [BMI160_ERR_REG] = 0x00, + [BMI160_PMU_STATUS] = 0xc0, + [BMI160_MAG_X_L_G] = 0x00, + [BMI160_MAG_X_H_G] = 0x00, + [BMI160_MAG_Y_L_G] = 0x00, + [BMI160_MAG_Y_H_G] = 0x00, + [BMI160_MAG_Z_L_G] = 0x00, + [BMI160_MAG_Z_H_G] = 0x00, + [BMI160_RHALL_L_G] = 0x00, + [BMI160_RHALL_H_G] = 0x00, + [BMI160_GYR_X_L_G] = 0x00, + [BMI160_GYR_X_H_G] = 0x00, + [BMI160_GYR_Y_L_G] = 0x00, + [BMI160_GYR_Y_H_G] = 0x00, + [BMI160_GYR_Z_L_G] = 0x00, + [BMI160_GYR_Z_H_G] = 0x00, + [BMI160_ACC_X_L_G] = 0x00, + [BMI160_ACC_X_H_G] = 0x00, + [BMI160_ACC_Y_L_G] = 0x00, + [BMI160_ACC_Y_H_G] = 0x00, + [BMI160_ACC_Z_L_G] = 0x00, + [BMI160_ACC_Z_H_G] = 0x00, + [BMI160_SENSORTIME_0] = 0x00, + [BMI160_SENSORTIME_1] = 0x00, + [BMI160_SENSORTIME_2] = 0x00, + [BMI160_STATUS] = 0x01, + [BMI160_INT_STATUS_0] = 0x00, + [BMI160_INT_STATUS_1] = 0x03, + [BMI160_INT_STATUS_2] = 0x00, + [BMI160_INT_STATUS_3] = 0x00, + [BMI160_TEMPERATURE_0] = 0x00, + [BMI160_TEMPERATURE_1] = 0x00, + [BMI160_FIFO_LENGTH_0] = 0x00, + [BMI160_FIFO_LENGTH_1] = 0xf8, + [BMI160_FIFO_DATA] = 0x00, + [0x25 ... 0x3f] = 0xff, /* Reserved */ + [BMI160_ACC_CONF] = 0x00, + [BMI160_ACC_RANGE] = 0xf0, + [BMI160_GYR_CONF] = 0xc0, + [BMI160_GYR_RANGE] = 0xf8, + [BMI160_MAG_CONF] = 0xf0, + [BMI160_FIFO_DOWNS] = 0x00, + [BMI160_FIFO_CONFIG_0] = 0x00, + [BMI160_FIFO_CONFIG_1] = 0x01, + [0x48 ... 0x4a] = 0xff, /* Reserved */ + [BMI160_MAG_IF_0] = 0x01, + [BMI160_MAG_IF_1] = 0x40, + [BMI160_MAG_IF_2] = 0x00, + [BMI160_MAG_IF_3] = 0x00, + [BMI160_MAG_IF_4] = 0x00, + [BMI160_INT_EN_0] = 0x08, + [BMI160_INT_EN_1] = 0x80, + [BMI160_INT_EN_2] = 0xf0, + [BMI160_INT_OUT_CTRL] = 0x00, + [BMI160_INT_LATCH] = 0xc0, + [BMI160_INT_MAP_0] = 0x00, + [BMI160_INT_MAP_1] = 0x00, + [BMI160_INT_MAP_2] = 0x00, + [BMI160_INT_DATA_0] = 0x77, + [BMI160_INT_DATA_1] = 0x7f, + [BMI160_INT_LOW_HIGH_0] = 0x00, + [BMI160_INT_LOW_HIGH_1] = 0x00, + [BMI160_INT_LOW_HIGH_2] = 0x3c, + [BMI160_INT_LOW_HIGH_3] = 0x00, + [BMI160_INT_LOW_HIGH_4] = 0x00, + [BMI160_INT_MOTION_0] = 0x00, + [BMI160_INT_MOTION_1] = 0x00, + [BMI160_INT_MOTION_2] = 0x00, + [BMI160_INT_MOTION_3] = 0xc0, + [BMI160_INT_TAP_0] = 0x38, + [BMI160_INT_TAP_1] = 0xe0, + [BMI160_INT_ORIENT_0] = 0x00, + [BMI160_INT_ORIENT_1] = 0x00, + [BMI160_INT_FLAT_0] = 0xc0, + [BMI160_INT_FLAT_1] = 0xc8, + [BMI160_FOC_CONF] = 0x80, + [BMI160_CONF] = 0xfd, + [BMI160_IF_CONF] = 0xce, + [BMI160_PMU_TRIGGER] = 0x80, + [BMI160_SELF_TEST] = 0xe0, + [0x6e] = 0xff, /* Reserved */ + [0x6f] = 0xff, /* Reserved */ + [BMI160_NV_CONF] = 0xf0, + [BMI160_OFFSET_ACC70] = 0x00, + [BMI160_OFFSET_ACC70 + 1] = 0x00, + [BMI160_OFFSET_ACC70 + 2] = 0x00, + [BMI160_OFFSET_GYR70] = 0x00, + [BMI160_OFFSET_GYR70 + 1] = 0x00, + [BMI160_OFFSET_GYR70 + 2] = 0x00, + [BMI160_OFFSET_EN_GYR98] = 0x00, + [BMI160_STEP_CNT_0] = 0x00, + [BMI160_STEP_CNT_1] = 0x00, + [BMI160_STEP_CONF_0] = 0x00, + [BMI160_STEP_CONF_1] = 0xf0, + [0x7c] = 0xff, /* Reserved */ + [0x7d] = 0xff, /* Reserved */ + [BMI160_CMD_REG] = 0x00, }; /** @@ -182,95 +182,95 @@ static int bmi160_emul_gyr_range_to_shift(uint8_t range) * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ -static void bmi160_emul_reset(uint8_t *regs, struct i2c_emul *emul) +static void bmi160_emul_reset(uint8_t *regs, const struct emul *emul) { bool tag_time; bool header; - regs[BMI160_CHIP_ID] = 0xd1; - regs[BMI160_ERR_REG] = 0x00; - regs[BMI160_PMU_STATUS] = 0x00; - regs[BMI160_MAG_X_L_G] = 0x00; - regs[BMI160_MAG_X_H_G] = 0x00; - regs[BMI160_MAG_Y_L_G] = 0x00; - regs[BMI160_MAG_Y_H_G] = 0x00; - regs[BMI160_MAG_Z_L_G] = 0x00; - regs[BMI160_MAG_Z_H_G] = 0x00; - regs[BMI160_RHALL_L_G] = 0x00; - regs[BMI160_RHALL_H_G] = 0x00; - regs[BMI160_GYR_X_L_G] = 0x00; - regs[BMI160_GYR_X_H_G] = 0x00; - regs[BMI160_GYR_Y_L_G] = 0x00; - regs[BMI160_GYR_Y_H_G] = 0x00; - regs[BMI160_GYR_Z_L_G] = 0x00; - regs[BMI160_GYR_Z_H_G] = 0x00; - regs[BMI160_ACC_X_L_G] = 0x00; - regs[BMI160_ACC_X_H_G] = 0x00; - regs[BMI160_ACC_Y_L_G] = 0x00; - regs[BMI160_ACC_Y_H_G] = 0x00; - regs[BMI160_ACC_Z_L_G] = 0x00; - regs[BMI160_ACC_Z_H_G] = 0x00; - regs[BMI160_SENSORTIME_0] = 0x00; - regs[BMI160_SENSORTIME_1] = 0x00; - regs[BMI160_SENSORTIME_2] = 0x00; - regs[BMI160_STATUS] = 0x01; - regs[BMI160_INT_STATUS_0] = 0x00; - regs[BMI160_INT_STATUS_1] = 0x00; - regs[BMI160_INT_STATUS_2] = 0x00; - regs[BMI160_INT_STATUS_3] = 0x00; - regs[BMI160_TEMPERATURE_0] = 0x00; - regs[BMI160_TEMPERATURE_1] = 0x00; - regs[BMI160_FIFO_LENGTH_0] = 0x00; - regs[BMI160_FIFO_LENGTH_1] = 0x00; - regs[BMI160_FIFO_DATA] = 0x00; - regs[BMI160_ACC_CONF] = 0x28; - regs[BMI160_ACC_RANGE] = 0x03; - regs[BMI160_GYR_CONF] = 0x28; - regs[BMI160_GYR_RANGE] = 0x00; - regs[BMI160_MAG_CONF] = 0x0b; - regs[BMI160_FIFO_DOWNS] = 0x88; - regs[BMI160_FIFO_CONFIG_0] = 0x80; - regs[BMI160_FIFO_CONFIG_1] = 0x10; - regs[BMI160_MAG_IF_0] = 0x20; - regs[BMI160_MAG_IF_1] = 0x80; - regs[BMI160_MAG_IF_2] = 0x42; - regs[BMI160_MAG_IF_3] = 0x4c; - regs[BMI160_MAG_IF_4] = 0x00; - regs[BMI160_INT_EN_0] = 0x00; - regs[BMI160_INT_EN_1] = 0x00; - regs[BMI160_INT_EN_2] = 0x00; - regs[BMI160_INT_OUT_CTRL] = 0x00; - regs[BMI160_INT_LATCH] = 0x00; - regs[BMI160_INT_MAP_0] = 0x00; - regs[BMI160_INT_MAP_1] = 0x00; - regs[BMI160_INT_MAP_2] = 0x00; - regs[BMI160_INT_DATA_0] = 0x00; - regs[BMI160_INT_DATA_1] = 0x00; - regs[BMI160_INT_LOW_HIGH_0] = 0x07; - regs[BMI160_INT_LOW_HIGH_1] = 0x30; - regs[BMI160_INT_LOW_HIGH_2] = 0x81; - regs[BMI160_INT_LOW_HIGH_3] = 0xdb; - regs[BMI160_INT_LOW_HIGH_4] = 0xc0; - regs[BMI160_INT_MOTION_0] = 0x00; - regs[BMI160_INT_MOTION_1] = 0x14; - regs[BMI160_INT_MOTION_2] = 0x14; - regs[BMI160_INT_MOTION_3] = 0x24; - regs[BMI160_INT_TAP_0] = 0x04; - regs[BMI160_INT_TAP_1] = 0xda; - regs[BMI160_INT_ORIENT_0] = 0x18; - regs[BMI160_INT_ORIENT_1] = 0x48; - regs[BMI160_INT_FLAT_0] = 0x08; - regs[BMI160_INT_FLAT_1] = 0x11; - regs[BMI160_FOC_CONF] = 0x00; - regs[BMI160_CONF] = 0x00; - regs[BMI160_IF_CONF] = 0x00; - regs[BMI160_PMU_TRIGGER] = 0x00; - regs[BMI160_SELF_TEST] = 0x00; - regs[BMI160_STEP_CNT_0] = 0x00; - regs[BMI160_STEP_CNT_1] = 0x00; - regs[BMI160_STEP_CONF_0] = 0x00; - regs[BMI160_STEP_CONF_1] = 0x15; - regs[BMI160_CMD_REG] = 0x03; + regs[BMI160_CHIP_ID] = 0xd1; + regs[BMI160_ERR_REG] = 0x00; + regs[BMI160_PMU_STATUS] = 0x00; + regs[BMI160_MAG_X_L_G] = 0x00; + regs[BMI160_MAG_X_H_G] = 0x00; + regs[BMI160_MAG_Y_L_G] = 0x00; + regs[BMI160_MAG_Y_H_G] = 0x00; + regs[BMI160_MAG_Z_L_G] = 0x00; + regs[BMI160_MAG_Z_H_G] = 0x00; + regs[BMI160_RHALL_L_G] = 0x00; + regs[BMI160_RHALL_H_G] = 0x00; + regs[BMI160_GYR_X_L_G] = 0x00; + regs[BMI160_GYR_X_H_G] = 0x00; + regs[BMI160_GYR_Y_L_G] = 0x00; + regs[BMI160_GYR_Y_H_G] = 0x00; + regs[BMI160_GYR_Z_L_G] = 0x00; + regs[BMI160_GYR_Z_H_G] = 0x00; + regs[BMI160_ACC_X_L_G] = 0x00; + regs[BMI160_ACC_X_H_G] = 0x00; + regs[BMI160_ACC_Y_L_G] = 0x00; + regs[BMI160_ACC_Y_H_G] = 0x00; + regs[BMI160_ACC_Z_L_G] = 0x00; + regs[BMI160_ACC_Z_H_G] = 0x00; + regs[BMI160_SENSORTIME_0] = 0x00; + regs[BMI160_SENSORTIME_1] = 0x00; + regs[BMI160_SENSORTIME_2] = 0x00; + regs[BMI160_STATUS] = 0x01; + regs[BMI160_INT_STATUS_0] = 0x00; + regs[BMI160_INT_STATUS_1] = 0x00; + regs[BMI160_INT_STATUS_2] = 0x00; + regs[BMI160_INT_STATUS_3] = 0x00; + regs[BMI160_TEMPERATURE_0] = 0x00; + regs[BMI160_TEMPERATURE_1] = 0x00; + regs[BMI160_FIFO_LENGTH_0] = 0x00; + regs[BMI160_FIFO_LENGTH_1] = 0x00; + regs[BMI160_FIFO_DATA] = 0x00; + regs[BMI160_ACC_CONF] = 0x28; + regs[BMI160_ACC_RANGE] = 0x03; + regs[BMI160_GYR_CONF] = 0x28; + regs[BMI160_GYR_RANGE] = 0x00; + regs[BMI160_MAG_CONF] = 0x0b; + regs[BMI160_FIFO_DOWNS] = 0x88; + regs[BMI160_FIFO_CONFIG_0] = 0x80; + regs[BMI160_FIFO_CONFIG_1] = 0x10; + regs[BMI160_MAG_IF_0] = 0x20; + regs[BMI160_MAG_IF_1] = 0x80; + regs[BMI160_MAG_IF_2] = 0x42; + regs[BMI160_MAG_IF_3] = 0x4c; + regs[BMI160_MAG_IF_4] = 0x00; + regs[BMI160_INT_EN_0] = 0x00; + regs[BMI160_INT_EN_1] = 0x00; + regs[BMI160_INT_EN_2] = 0x00; + regs[BMI160_INT_OUT_CTRL] = 0x00; + regs[BMI160_INT_LATCH] = 0x00; + regs[BMI160_INT_MAP_0] = 0x00; + regs[BMI160_INT_MAP_1] = 0x00; + regs[BMI160_INT_MAP_2] = 0x00; + regs[BMI160_INT_DATA_0] = 0x00; + regs[BMI160_INT_DATA_1] = 0x00; + regs[BMI160_INT_LOW_HIGH_0] = 0x07; + regs[BMI160_INT_LOW_HIGH_1] = 0x30; + regs[BMI160_INT_LOW_HIGH_2] = 0x81; + regs[BMI160_INT_LOW_HIGH_3] = 0xdb; + regs[BMI160_INT_LOW_HIGH_4] = 0xc0; + regs[BMI160_INT_MOTION_0] = 0x00; + regs[BMI160_INT_MOTION_1] = 0x14; + regs[BMI160_INT_MOTION_2] = 0x14; + regs[BMI160_INT_MOTION_3] = 0x24; + regs[BMI160_INT_TAP_0] = 0x04; + regs[BMI160_INT_TAP_1] = 0xda; + regs[BMI160_INT_ORIENT_0] = 0x18; + regs[BMI160_INT_ORIENT_1] = 0x48; + regs[BMI160_INT_FLAT_0] = 0x08; + regs[BMI160_INT_FLAT_1] = 0x11; + regs[BMI160_FOC_CONF] = 0x00; + regs[BMI160_CONF] = 0x00; + regs[BMI160_IF_CONF] = 0x00; + regs[BMI160_PMU_TRIGGER] = 0x00; + regs[BMI160_SELF_TEST] = 0x00; + regs[BMI160_STEP_CNT_0] = 0x00; + regs[BMI160_STEP_CNT_1] = 0x00; + regs[BMI160_STEP_CONF_0] = 0x00; + regs[BMI160_STEP_CONF_1] = 0x15; + regs[BMI160_CMD_REG] = 0x03; /* Call generic reset */ tag_time = regs[BMI160_FIFO_CONFIG_1] & BMI160_FIFO_TAG_TIME_EN; @@ -349,7 +349,7 @@ static int16_t bmi160_emul_get_acc_target_off(int32_t acc, uint8_t target) * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ -static void bmi160_emul_handle_off_comp(uint8_t *regs, struct i2c_emul *emul) +static void bmi160_emul_handle_off_comp(uint8_t *regs, const struct emul *emul) { uint8_t target; int16_t off; @@ -361,6 +361,7 @@ static void bmi160_emul_handle_off_comp(uint8_t *regs, struct i2c_emul *emul) bmi_emul_set_off(emul, BMI_EMUL_GYR_X, off); val = bmi_emul_get_value(emul, BMI_EMUL_GYR_Y); off = bmi160_emul_get_gyr_target_off(val); + bmi_emul_set_off(emul, BMI_EMUL_GYR_Y, off); val = bmi_emul_get_value(emul, BMI_EMUL_GYR_Z); off = bmi160_emul_get_gyr_target_off(val); @@ -401,7 +402,8 @@ static void bmi160_emul_handle_off_comp(uint8_t *regs, struct i2c_emul *emul) * @return 0 on success * @return -EIO on failure */ -static int bmi160_emul_start_cmd(uint8_t *regs, struct i2c_emul *emul, int cmd) +static int bmi160_emul_start_cmd(uint8_t *regs, const struct emul *emul, + int cmd) { int time; @@ -470,7 +472,7 @@ static int bmi160_emul_start_cmd(uint8_t *regs, struct i2c_emul *emul, int cmd) * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ -static void bmi160_emul_end_cmd(uint8_t *regs, struct i2c_emul *emul) +static void bmi160_emul_end_cmd(uint8_t *regs, const struct emul *emul) { uint8_t pmu_status; bool tag_time; @@ -560,7 +562,7 @@ static void bmi160_emul_end_cmd(uint8_t *regs, struct i2c_emul *emul) * @return BMI_EMUL_ACCESS_E on RO register access * @return -EIO on error */ -static int bmi160_emul_handle_write(uint8_t *regs, struct i2c_emul *emul, +static int bmi160_emul_handle_write(uint8_t *regs, const struct emul *emul, int reg, int byte, uint8_t val) { bool tag_time; @@ -618,7 +620,7 @@ static int bmi160_emul_handle_write(uint8_t *regs, struct i2c_emul *emul, * * @return Currently accessed register */ -static int bmi160_emul_access_reg(struct i2c_emul *emul, int reg, int byte, +static int bmi160_emul_access_reg(const struct emul *emul, int reg, int byte, bool read) { if (!read) { @@ -654,7 +656,7 @@ static int bmi160_emul_access_reg(struct i2c_emul *emul, int reg, int byte, * @return BMI_EMUL_ACCESS_E on WO register access * @return -EIO on other error */ -static int bmi160_emul_handle_read(uint8_t *regs, struct i2c_emul *emul, +static int bmi160_emul_handle_read(uint8_t *regs, const struct emul *emul, int reg, int byte, char *buf) { uint16_t fifo_len; @@ -714,8 +716,8 @@ static int bmi160_emul_handle_read(uint8_t *regs, struct i2c_emul *emul, bmi_emul_state_to_reg(emul, acc_shift, gyr_shift, BMI160_ACC_X_L_G, BMI160_GYR_X_L_G, - BMI160_SENSORTIME_0, - acc_off_en, gyr_off_en); + BMI160_SENSORTIME_0, acc_off_en, + gyr_off_en); } break; case BMI160_FIFO_LENGTH_0: @@ -738,21 +740,35 @@ static int bmi160_emul_handle_read(uint8_t *regs, struct i2c_emul *emul, return 0; } +static int bmi160_emul_finish_read(uint8_t *regs, const struct emul *emul, + int reg, int bytes) +{ + int i; + + switch (reg) { + case BMI160_INT_STATUS_0: + /* Clear interrupt status after reading. */ + for (i = 0; i < bytes; ++i) { + regs[BMI160_INT_STATUS_0 + i] = 0; + } + break; + } + return 0; +} + /** Registers backed in NVM by BMI160 */ -const int bmi160_nvm_reg[] = {BMI160_NV_CONF, - BMI160_OFFSET_ACC70, - BMI160_OFFSET_ACC70 + 1, - BMI160_OFFSET_ACC70 + 2, - BMI160_OFFSET_GYR70, - BMI160_OFFSET_GYR70 + 1, - BMI160_OFFSET_GYR70 + 2, - BMI160_OFFSET_EN_GYR98}; +const int bmi160_nvm_reg[] = { + BMI160_NV_CONF, BMI160_OFFSET_ACC70, BMI160_OFFSET_ACC70 + 1, + BMI160_OFFSET_ACC70 + 2, BMI160_OFFSET_GYR70, BMI160_OFFSET_GYR70 + 1, + BMI160_OFFSET_GYR70 + 2, BMI160_OFFSET_EN_GYR98 +}; /** Confguration of BMI160 */ struct bmi_emul_type_data bmi160_emul = { .sensortime_follow_config_frame = false, .handle_write = bmi160_emul_handle_write, .handle_read = bmi160_emul_handle_read, + .finish_read = bmi160_emul_finish_read, .access_reg = bmi160_emul_access_reg, .reset = bmi160_emul_reset, .rsvd_mask = bmi_emul_160_rsvd_mask, diff --git a/zephyr/emul/emul_bmi260.c b/zephyr/emul/emul_bmi260.c index 31da71316a..5892a9ae96 100644 --- a/zephyr/emul/emul_bmi260.c +++ b/zephyr/emul/emul_bmi260.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,100 +21,100 @@ LOG_MODULE_REGISTER(emul_bmi260); /** Mask reserved bits in each register of BMI260 */ static const uint8_t bmi_emul_260_rsvd_mask[] = { - [BMI260_CHIP_ID] = 0x00, - [0x01] = 0xff, /* Reserved */ - [BMI260_ERR_REG] = 0x20, - [BMI260_STATUS] = 0x0b, - [BMI260_AUX_X_L_G] = 0x00, - [BMI260_AUX_X_H_G] = 0x00, - [BMI260_AUX_Y_L_G] = 0x00, - [BMI260_AUX_Y_H_G] = 0x00, - [BMI260_AUX_Z_L_G] = 0x00, - [BMI260_AUX_Z_H_G] = 0x00, - [BMI260_AUX_R_L_G] = 0x00, - [BMI260_AUX_R_H_G] = 0x00, - [BMI260_ACC_X_L_G] = 0x00, - [BMI260_ACC_X_H_G] = 0x00, - [BMI260_ACC_Y_L_G] = 0x00, - [BMI260_ACC_Y_H_G] = 0x00, - [BMI260_ACC_Z_L_G] = 0x00, - [BMI260_ACC_Z_H_G] = 0x00, - [BMI260_GYR_X_L_G] = 0x00, - [BMI260_GYR_X_H_G] = 0x00, - [BMI260_GYR_Y_L_G] = 0x00, - [BMI260_GYR_Y_H_G] = 0x00, - [BMI260_GYR_Z_L_G] = 0x00, - [BMI260_GYR_Z_H_G] = 0x00, - [BMI260_SENSORTIME_0] = 0x00, - [BMI260_SENSORTIME_1] = 0x00, - [BMI260_SENSORTIME_2] = 0x00, - [BMI260_EVENT] = 0xe2, - [BMI260_INT_STATUS_0] = 0x00, - [BMI260_INT_STATUS_1] = 0x18, - [BMI260_SC_OUT_0] = 0x00, - [BMI260_SC_OUT_1] = 0x00, - [BMI260_ORIENT_ACT] = 0xe0, - [BMI260_INTERNAL_STATUS] = 0x00, - [BMI260_TEMPERATURE_0] = 0x00, - [BMI260_TEMPERATURE_1] = 0x00, - [BMI260_FIFO_LENGTH_0] = 0x00, - [BMI260_FIFO_LENGTH_1] = 0xc0, - [BMI160_FIFO_DATA] = 0x00, - [0x27 ... 0x2e] = 0xff, /* Reserved */ - [BMI260_FEAT_PAGE] = 0xf8, - [0x30 ... 0x3f] = 0x00, /* Features */ - [BMI260_ACC_CONF] = 0x00, - [BMI260_ACC_RANGE] = 0xfc, - [BMI260_GYR_CONF] = 0x00, - [BMI260_GYR_RANGE] = 0xf0, - [BMI260_AUX_CONF] = 0x00, - [BMI260_FIFO_DOWNS] = 0x00, - [BMI260_FIFO_WTM_0] = 0x00, - [BMI260_FIFO_WTM_1] = 0xe0, - [BMI260_FIFO_CONFIG_0] = 0xfc, - [BMI260_FIFO_CONFIG_1] = 0x00, - [BMI260_SATURATION] = 0xc0, - [BMI260_AUX_DEV_ID] = 0x01, - [BMI260_AUX_IF_CONF] = 0x30, - [BMI260_AUX_RD_ADDR] = 0x00, - [BMI260_AUX_WR_ADDR] = 0x00, - [BMI260_AUX_WR_DATA] = 0x00, - [0x50 ... 0x51] = 0xff, /* Reserved */ - [BMI260_ERR_REG_MSK] = 0x20, - [BMI260_INT1_IO_CTRL] = 0xe1, - [BMI260_INT2_IO_CTRL] = 0xe1, - [BMI260_INT_LATCH] = 0xfe, - [BMI260_INT1_MAP_FEAT] = 0x00, - [BMI260_INT2_MAP_FEAT] = 0x00, - [BMI260_INT_MAP_DATA] = 0x00, - [BMI260_INIT_CTRL] = 0x00, - [0x5a] = 0xff, /* Reserved */ - [BMI260_INIT_ADDR_0] = 0xf0, - [BMI260_INIT_ADDR_1] = 0x00, - [0x5d] = 0xff, /* Reserved */ - [BMI260_INIT_DATA] = 0x00, - [BMI260_INTERNAL_ERROR] = 0xe9, - [0x60 ... 0x67] = 0xff, /* Reserved */ - [BMI260_AUX_IF_TRIM] = 0xf8, - [BMI260_GYR_CRT_CONF] = 0xf2, - [BMI260_NVM_CONF] = 0xfd, - [BMI260_IF_CONF] = 0xcc, - [BMI260_DRV] = 0x00, - [BMI260_ACC_SELF_TEST] = 0xf2, - [BMI260_GYR_SELF_TEST_AXES] = 0xf0, - [0x6f] = 0xff, /* Reserved */ - [BMI260_NV_CONF] = 0xf0, - [BMI260_OFFSET_ACC70] = 0x00, - [BMI260_OFFSET_ACC70 + 1] = 0x00, - [BMI260_OFFSET_ACC70 + 2] = 0x00, - [BMI260_OFFSET_GYR70] = 0x00, - [BMI260_OFFSET_GYR70 + 1] = 0x00, - [BMI260_OFFSET_GYR70 + 2] = 0x00, - [BMI160_OFFSET_EN_GYR98] = 0x00, - [0x78 ... 0x7b] = 0xff, /* Reserved */ - [BMI260_PWR_CONF] = 0xf8, - [BMI260_PWR_CTRL] = 0xf0, - [BMI260_CMD_REG] = 0x00, + [BMI260_CHIP_ID] = 0x00, + [0x01] = 0xff, /* Reserved */ + [BMI260_ERR_REG] = 0x20, + [BMI260_STATUS] = 0x0b, + [BMI260_AUX_X_L_G] = 0x00, + [BMI260_AUX_X_H_G] = 0x00, + [BMI260_AUX_Y_L_G] = 0x00, + [BMI260_AUX_Y_H_G] = 0x00, + [BMI260_AUX_Z_L_G] = 0x00, + [BMI260_AUX_Z_H_G] = 0x00, + [BMI260_AUX_R_L_G] = 0x00, + [BMI260_AUX_R_H_G] = 0x00, + [BMI260_ACC_X_L_G] = 0x00, + [BMI260_ACC_X_H_G] = 0x00, + [BMI260_ACC_Y_L_G] = 0x00, + [BMI260_ACC_Y_H_G] = 0x00, + [BMI260_ACC_Z_L_G] = 0x00, + [BMI260_ACC_Z_H_G] = 0x00, + [BMI260_GYR_X_L_G] = 0x00, + [BMI260_GYR_X_H_G] = 0x00, + [BMI260_GYR_Y_L_G] = 0x00, + [BMI260_GYR_Y_H_G] = 0x00, + [BMI260_GYR_Z_L_G] = 0x00, + [BMI260_GYR_Z_H_G] = 0x00, + [BMI260_SENSORTIME_0] = 0x00, + [BMI260_SENSORTIME_1] = 0x00, + [BMI260_SENSORTIME_2] = 0x00, + [BMI260_EVENT] = 0xe2, + [BMI260_INT_STATUS_0] = 0x00, + [BMI260_INT_STATUS_1] = 0x18, + [BMI260_SC_OUT_0] = 0x00, + [BMI260_SC_OUT_1] = 0x00, + [BMI260_ORIENT_ACT] = 0xe0, + [BMI260_INTERNAL_STATUS] = 0x00, + [BMI260_TEMPERATURE_0] = 0x00, + [BMI260_TEMPERATURE_1] = 0x00, + [BMI260_FIFO_LENGTH_0] = 0x00, + [BMI260_FIFO_LENGTH_1] = 0xc0, + [BMI160_FIFO_DATA] = 0x00, + [0x27 ... 0x2e] = 0xff, /* Reserved */ + [BMI260_FEAT_PAGE] = 0xf8, + [0x30 ... 0x3f] = 0x00, /* Features */ + [BMI260_ACC_CONF] = 0x00, + [BMI260_ACC_RANGE] = 0xfc, + [BMI260_GYR_CONF] = 0x00, + [BMI260_GYR_RANGE] = 0xf0, + [BMI260_AUX_CONF] = 0x00, + [BMI260_FIFO_DOWNS] = 0x00, + [BMI260_FIFO_WTM_0] = 0x00, + [BMI260_FIFO_WTM_1] = 0xe0, + [BMI260_FIFO_CONFIG_0] = 0xfc, + [BMI260_FIFO_CONFIG_1] = 0x00, + [BMI260_SATURATION] = 0xc0, + [BMI260_AUX_DEV_ID] = 0x01, + [BMI260_AUX_IF_CONF] = 0x30, + [BMI260_AUX_RD_ADDR] = 0x00, + [BMI260_AUX_WR_ADDR] = 0x00, + [BMI260_AUX_WR_DATA] = 0x00, + [0x50 ... 0x51] = 0xff, /* Reserved */ + [BMI260_ERR_REG_MSK] = 0x20, + [BMI260_INT1_IO_CTRL] = 0xe1, + [BMI260_INT2_IO_CTRL] = 0xe1, + [BMI260_INT_LATCH] = 0xfe, + [BMI260_INT1_MAP_FEAT] = 0x00, + [BMI260_INT2_MAP_FEAT] = 0x00, + [BMI260_INT_MAP_DATA] = 0x00, + [BMI260_INIT_CTRL] = 0x00, + [0x5a] = 0xff, /* Reserved */ + [BMI260_INIT_ADDR_0] = 0xf0, + [BMI260_INIT_ADDR_1] = 0x00, + [0x5d] = 0xff, /* Reserved */ + [BMI260_INIT_DATA] = 0x00, + [BMI260_INTERNAL_ERROR] = 0xe9, + [0x60 ... 0x67] = 0xff, /* Reserved */ + [BMI260_AUX_IF_TRIM] = 0xf8, + [BMI260_GYR_CRT_CONF] = 0xf2, + [BMI260_NVM_CONF] = 0xfd, + [BMI260_IF_CONF] = 0xcc, + [BMI260_DRV] = 0x00, + [BMI260_ACC_SELF_TEST] = 0xf2, + [BMI260_GYR_SELF_TEST_AXES] = 0xf0, + [0x6f] = 0xff, /* Reserved */ + [BMI260_NV_CONF] = 0xf0, + [BMI260_OFFSET_ACC70] = 0x00, + [BMI260_OFFSET_ACC70 + 1] = 0x00, + [BMI260_OFFSET_ACC70 + 2] = 0x00, + [BMI260_OFFSET_GYR70] = 0x00, + [BMI260_OFFSET_GYR70 + 1] = 0x00, + [BMI260_OFFSET_GYR70 + 2] = 0x00, + [BMI160_OFFSET_EN_GYR98] = 0x00, + [0x78 ... 0x7b] = 0xff, /* Reserved */ + [BMI260_PWR_CONF] = 0xf8, + [BMI260_PWR_CTRL] = 0xf0, + [BMI260_CMD_REG] = 0x00, }; /** @@ -123,88 +123,88 @@ static const uint8_t bmi_emul_260_rsvd_mask[] = { * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ -static void bmi260_emul_reset(uint8_t *regs, struct i2c_emul *emul) +static void bmi260_emul_reset(uint8_t *regs, const struct emul *emul) { bool tag_time; bool header; - regs[BMI260_CHIP_ID] = 0x27; - regs[BMI260_ERR_REG] = 0x00; - regs[BMI260_STATUS] = 0x10; - regs[BMI260_AUX_X_L_G] = 0x00; - regs[BMI260_AUX_X_H_G] = 0x00; - regs[BMI260_AUX_Y_L_G] = 0x00; - regs[BMI260_AUX_Y_H_G] = 0x00; - regs[BMI260_AUX_Z_L_G] = 0x00; - regs[BMI260_AUX_Z_H_G] = 0x00; - regs[BMI260_AUX_R_L_G] = 0x00; - regs[BMI260_AUX_R_H_G] = 0x00; - regs[BMI260_ACC_X_L_G] = 0x00; - regs[BMI260_ACC_X_H_G] = 0x00; - regs[BMI260_ACC_Y_L_G] = 0x00; - regs[BMI260_ACC_Y_H_G] = 0x00; - regs[BMI260_ACC_Z_L_G] = 0x00; - regs[BMI260_ACC_Z_H_G] = 0x00; - regs[BMI260_GYR_X_L_G] = 0x00; - regs[BMI260_GYR_X_H_G] = 0x00; - regs[BMI260_GYR_Y_L_G] = 0x00; - regs[BMI260_GYR_Y_H_G] = 0x00; - regs[BMI260_GYR_Z_L_G] = 0x00; - regs[BMI260_GYR_Z_H_G] = 0x00; - regs[BMI260_SENSORTIME_0] = 0x00; - regs[BMI260_SENSORTIME_1] = 0x00; - regs[BMI260_SENSORTIME_2] = 0x00; - regs[BMI260_EVENT] = 0x01; - regs[BMI260_INT_STATUS_0] = 0x00; - regs[BMI260_INT_STATUS_1] = 0x00; - regs[BMI260_SC_OUT_0] = 0x00; - regs[BMI260_SC_OUT_1] = 0x00; - regs[BMI260_ORIENT_ACT] = 0x00; - regs[BMI260_INTERNAL_STATUS] = 0x00; - regs[BMI260_TEMPERATURE_0] = 0x00; - regs[BMI260_TEMPERATURE_1] = 0x80; - regs[BMI260_FIFO_LENGTH_0] = 0x00; - regs[BMI260_FIFO_LENGTH_1] = 0x00; - regs[BMI160_FIFO_DATA] = 0x00; - regs[BMI260_FEAT_PAGE] = 0x00; - regs[BMI260_ACC_CONF] = 0xa8; - regs[BMI260_ACC_RANGE] = 0x02; - regs[BMI260_GYR_CONF] = 0xa9; - regs[BMI260_GYR_RANGE] = 0x00; - regs[BMI260_AUX_CONF] = 0x46; - regs[BMI260_FIFO_DOWNS] = 0x88; - regs[BMI260_FIFO_WTM_0] = 0x00; - regs[BMI260_FIFO_WTM_1] = 0x02; - regs[BMI260_FIFO_CONFIG_0] = 0x02; - regs[BMI260_FIFO_CONFIG_1] = 0x10; - regs[BMI260_SATURATION] = 0x00; - regs[BMI260_AUX_DEV_ID] = 0x20; - regs[BMI260_AUX_IF_CONF] = 0x83; - regs[BMI260_AUX_RD_ADDR] = 0x42; - regs[BMI260_AUX_WR_ADDR] = 0x4c; - regs[BMI260_AUX_WR_DATA] = 0x02; - regs[BMI260_ERR_REG_MSK] = 0x00; - regs[BMI260_INT1_IO_CTRL] = 0x00; - regs[BMI260_INT2_IO_CTRL] = 0x00; - regs[BMI260_INT_LATCH] = 0x00; - regs[BMI260_INT1_MAP_FEAT] = 0x00; - regs[BMI260_INT2_MAP_FEAT] = 0x00; - regs[BMI260_INT_MAP_DATA] = 0x00; - regs[BMI260_INIT_CTRL] = 0x00; - regs[BMI260_INIT_ADDR_0] = 0x00; - regs[BMI260_INIT_ADDR_1] = 0x00; - regs[BMI260_INIT_DATA] = 0x00; - regs[BMI260_INTERNAL_ERROR] = 0x00; - regs[BMI260_AUX_IF_TRIM] = 0x01; - regs[BMI260_GYR_CRT_CONF] = 0x00; - regs[BMI260_NVM_CONF] = 0x00; - regs[BMI260_IF_CONF] = 0x00; - regs[BMI260_DRV] = 0xff; - regs[BMI260_ACC_SELF_TEST] = 0x00; - regs[BMI260_GYR_SELF_TEST_AXES] = 0x00; - regs[BMI260_PWR_CONF] = 0x03; - regs[BMI260_PWR_CTRL] = 0x00; - regs[BMI260_CMD_REG] = 0x00; + regs[BMI260_CHIP_ID] = 0x27; + regs[BMI260_ERR_REG] = 0x00; + regs[BMI260_STATUS] = 0x10; + regs[BMI260_AUX_X_L_G] = 0x00; + regs[BMI260_AUX_X_H_G] = 0x00; + regs[BMI260_AUX_Y_L_G] = 0x00; + regs[BMI260_AUX_Y_H_G] = 0x00; + regs[BMI260_AUX_Z_L_G] = 0x00; + regs[BMI260_AUX_Z_H_G] = 0x00; + regs[BMI260_AUX_R_L_G] = 0x00; + regs[BMI260_AUX_R_H_G] = 0x00; + regs[BMI260_ACC_X_L_G] = 0x00; + regs[BMI260_ACC_X_H_G] = 0x00; + regs[BMI260_ACC_Y_L_G] = 0x00; + regs[BMI260_ACC_Y_H_G] = 0x00; + regs[BMI260_ACC_Z_L_G] = 0x00; + regs[BMI260_ACC_Z_H_G] = 0x00; + regs[BMI260_GYR_X_L_G] = 0x00; + regs[BMI260_GYR_X_H_G] = 0x00; + regs[BMI260_GYR_Y_L_G] = 0x00; + regs[BMI260_GYR_Y_H_G] = 0x00; + regs[BMI260_GYR_Z_L_G] = 0x00; + regs[BMI260_GYR_Z_H_G] = 0x00; + regs[BMI260_SENSORTIME_0] = 0x00; + regs[BMI260_SENSORTIME_1] = 0x00; + regs[BMI260_SENSORTIME_2] = 0x00; + regs[BMI260_EVENT] = 0x01; + regs[BMI260_INT_STATUS_0] = 0x00; + regs[BMI260_INT_STATUS_1] = 0x00; + regs[BMI260_SC_OUT_0] = 0x00; + regs[BMI260_SC_OUT_1] = 0x00; + regs[BMI260_ORIENT_ACT] = 0x00; + regs[BMI260_INTERNAL_STATUS] = 0x00; + regs[BMI260_TEMPERATURE_0] = 0x00; + regs[BMI260_TEMPERATURE_1] = 0x80; + regs[BMI260_FIFO_LENGTH_0] = 0x00; + regs[BMI260_FIFO_LENGTH_1] = 0x00; + regs[BMI160_FIFO_DATA] = 0x00; + regs[BMI260_FEAT_PAGE] = 0x00; + regs[BMI260_ACC_CONF] = 0xa8; + regs[BMI260_ACC_RANGE] = 0x02; + regs[BMI260_GYR_CONF] = 0xa9; + regs[BMI260_GYR_RANGE] = 0x00; + regs[BMI260_AUX_CONF] = 0x46; + regs[BMI260_FIFO_DOWNS] = 0x88; + regs[BMI260_FIFO_WTM_0] = 0x00; + regs[BMI260_FIFO_WTM_1] = 0x02; + regs[BMI260_FIFO_CONFIG_0] = 0x02; + regs[BMI260_FIFO_CONFIG_1] = 0x10; + regs[BMI260_SATURATION] = 0x00; + regs[BMI260_AUX_DEV_ID] = 0x20; + regs[BMI260_AUX_IF_CONF] = 0x83; + regs[BMI260_AUX_RD_ADDR] = 0x42; + regs[BMI260_AUX_WR_ADDR] = 0x4c; + regs[BMI260_AUX_WR_DATA] = 0x02; + regs[BMI260_ERR_REG_MSK] = 0x00; + regs[BMI260_INT1_IO_CTRL] = 0x00; + regs[BMI260_INT2_IO_CTRL] = 0x00; + regs[BMI260_INT_LATCH] = 0x00; + regs[BMI260_INT1_MAP_FEAT] = 0x00; + regs[BMI260_INT2_MAP_FEAT] = 0x00; + regs[BMI260_INT_MAP_DATA] = 0x00; + regs[BMI260_INIT_CTRL] = 0x00; + regs[BMI260_INIT_ADDR_0] = 0x00; + regs[BMI260_INIT_ADDR_1] = 0x00; + regs[BMI260_INIT_DATA] = 0x00; + regs[BMI260_INTERNAL_ERROR] = 0x00; + regs[BMI260_AUX_IF_TRIM] = 0x01; + regs[BMI260_GYR_CRT_CONF] = 0x00; + regs[BMI260_NVM_CONF] = 0x00; + regs[BMI260_IF_CONF] = 0x00; + regs[BMI260_DRV] = 0xff; + regs[BMI260_ACC_SELF_TEST] = 0x00; + regs[BMI260_GYR_SELF_TEST_AXES] = 0x00; + regs[BMI260_PWR_CONF] = 0x03; + regs[BMI260_PWR_CTRL] = 0x00; + regs[BMI260_CMD_REG] = 0x00; /* Call generic reset */ tag_time = regs[BMI260_FIFO_CONFIG_0] & BMI260_FIFO_TIME_EN; @@ -278,7 +278,8 @@ static int bmi260_emul_gyr_range_to_shift(uint8_t range) * @return 0 on success * @return -EIO on failure */ -static int bmi260_emul_start_cmd(uint8_t *regs, struct i2c_emul *emul, int cmd) +static int bmi260_emul_start_cmd(uint8_t *regs, const struct emul *emul, + int cmd) { int time; @@ -306,7 +307,7 @@ static int bmi260_emul_start_cmd(uint8_t *regs, struct i2c_emul *emul, int cmd) * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ -static void bmi260_emul_end_cmd(uint8_t *regs, struct i2c_emul *emul) +static void bmi260_emul_end_cmd(uint8_t *regs, const struct emul *emul) { bool tag_time; bool header; @@ -339,7 +340,7 @@ static void bmi260_emul_end_cmd(uint8_t *regs, struct i2c_emul *emul) * * @return Currently accessed register */ -static int bmi260_emul_access_reg(struct i2c_emul *emul, int reg, int byte, +static int bmi260_emul_access_reg(const struct emul *emul, int reg, int byte, bool read) { /* Ignore first byte which sets starting register */ @@ -354,8 +355,7 @@ static int bmi260_emul_access_reg(struct i2c_emul *emul, int reg, int byte, */ if (reg <= BMI260_FIFO_DATA && reg + byte >= BMI260_FIFO_DATA) { return BMI260_FIFO_DATA; - } else if (reg <= BMI260_INIT_DATA && - reg + byte >= BMI260_INIT_DATA) { + } else if (reg <= BMI260_INIT_DATA && reg + byte >= BMI260_INIT_DATA) { return BMI260_INIT_DATA; } @@ -381,7 +381,7 @@ static int bmi260_emul_access_reg(struct i2c_emul *emul, int reg, int byte, * @return BMI_EMUL_ACCESS_E on RO register access * @return -EIO on error */ -static int bmi260_emul_handle_write(uint8_t *regs, struct i2c_emul *emul, +static int bmi260_emul_handle_write(uint8_t *regs, const struct emul *emul, int reg, int byte, uint8_t val) { uint8_t mask; @@ -395,7 +395,6 @@ static int bmi260_emul_handle_write(uint8_t *regs, struct i2c_emul *emul, return BMI_EMUL_ACCESS_E; } - /* Stop on going command if required */ if (regs[BMI260_CMD_REG] != 0 && bmi_emul_is_cmd_end(emul)) { bmi260_emul_end_cmd(regs, emul); @@ -454,7 +453,7 @@ static int bmi260_emul_handle_write(uint8_t *regs, struct i2c_emul *emul, * @return BMI_EMUL_ACCESS_E on WO register access * @return -EIO on other error */ -static int bmi260_emul_handle_read(uint8_t *regs, struct i2c_emul *emul, +static int bmi260_emul_handle_read(uint8_t *regs, const struct emul *emul, int reg, int byte, char *buf) { uint16_t fifo_len; @@ -513,8 +512,8 @@ static int bmi260_emul_handle_read(uint8_t *regs, struct i2c_emul *emul, bmi_emul_state_to_reg(emul, acc_shift, gyr_shift, BMI260_ACC_X_L_G, BMI260_GYR_X_L_G, - BMI260_SENSORTIME_0, - acc_off_en, gyr_off_en); + BMI260_SENSORTIME_0, acc_off_en, + gyr_off_en); } break; case BMI260_FIFO_LENGTH_0: @@ -538,16 +537,12 @@ static int bmi260_emul_handle_read(uint8_t *regs, struct i2c_emul *emul, } /** Registers backed in NVM by BMI260 */ -const int bmi260_nvm_reg[] = {BMI260_AUX_IF_TRIM, - BMI260_NV_CONF, - BMI260_DRV, - BMI260_OFFSET_ACC70, - BMI260_OFFSET_ACC70 + 1, - BMI260_OFFSET_ACC70 + 2, - BMI260_OFFSET_GYR70, - BMI260_OFFSET_GYR70 + 1, - BMI260_OFFSET_GYR70 + 2, - BMI260_OFFSET_EN_GYR98}; +const int bmi260_nvm_reg[] = { + BMI260_AUX_IF_TRIM, BMI260_NV_CONF, BMI260_DRV, + BMI260_OFFSET_ACC70, BMI260_OFFSET_ACC70 + 1, BMI260_OFFSET_ACC70 + 2, + BMI260_OFFSET_GYR70, BMI260_OFFSET_GYR70 + 1, BMI260_OFFSET_GYR70 + 2, + BMI260_OFFSET_EN_GYR98 +}; /** Confguration of BMI260 */ struct bmi_emul_type_data bmi260_emul = { diff --git a/zephyr/emul/emul_clock_control.c b/zephyr/emul/emul_clock_control.c index 397c4af32e..561298a705 100644 --- a/zephyr/emul/emul_clock_control.c +++ b/zephyr/emul/emul_clock_control.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/emul/emul_common_i2c.c b/zephyr/emul/emul_common_i2c.c index ae603f924a..70bc962c5f 100644 --- a/zephyr/emul/emul_common_i2c.c +++ b/zephyr/emul/emul_common_i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,63 +15,46 @@ LOG_MODULE_REGISTER(emul_common_i2c); #include "emul/emul_common_i2c.h" /** Check description in emul_common_i2c.h */ -int i2c_common_emul_lock_data(struct i2c_emul *emul, k_timeout_t timeout) +int i2c_common_emul_lock_data(struct i2c_common_emul_data *common_data, + k_timeout_t timeout) { - struct i2c_common_emul_data *data; - - data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - - return k_mutex_lock(&data->data_mtx, timeout); + return k_mutex_lock(&common_data->data_mtx, timeout); } /** Check description in emul_common_i2c.h */ -int i2c_common_emul_unlock_data(struct i2c_emul *emul) +int i2c_common_emul_unlock_data(struct i2c_common_emul_data *common_data) { - struct i2c_common_emul_data *data; - - data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - - return k_mutex_unlock(&data->data_mtx); + return k_mutex_unlock(&common_data->data_mtx); } /** Check description in emul_common_i2c.h */ -void i2c_common_emul_set_write_func(struct i2c_emul *emul, +void i2c_common_emul_set_write_func(struct i2c_common_emul_data *common_data, i2c_common_emul_write_func func, void *data) { - struct i2c_common_emul_data *emul_data; - - emul_data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - emul_data->write_func = func; - emul_data->write_func_data = data; + common_data->write_func = func; + common_data->write_func_data = data; } /** Check description in emul_common_i2c.h */ -void i2c_common_emul_set_read_func(struct i2c_emul *emul, +void i2c_common_emul_set_read_func(struct i2c_common_emul_data *common_data, i2c_common_emul_read_func func, void *data) { - struct i2c_common_emul_data *emul_data; - - emul_data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - emul_data->read_func = func; - emul_data->read_func_data = data; + common_data->read_func = func; + common_data->read_func_data = data; } /** Check description in emul_common_i2c.h */ -void i2c_common_emul_set_read_fail_reg(struct i2c_emul *emul, int reg) +void i2c_common_emul_set_read_fail_reg(struct i2c_common_emul_data *common_data, + int reg) { - struct i2c_common_emul_data *data; - - data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - data->read_fail_reg = reg; + common_data->read_fail_reg = reg; } /** Check description in emul_common_i2c.h */ -void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg) +void i2c_common_emul_set_write_fail_reg( + struct i2c_common_emul_data *common_data, int reg) { - struct i2c_common_emul_data *data; - - data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - data->write_fail_reg = reg; + common_data->write_fail_reg = reg; } /** @@ -83,7 +66,7 @@ void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg) * * @retval start_write emulator callback return code */ -static int i2c_common_emul_start_write(struct i2c_emul *emul, +static int i2c_common_emul_start_write(const struct emul *target, struct i2c_common_emul_data *data) { int ret = 0; @@ -92,7 +75,7 @@ static int i2c_common_emul_start_write(struct i2c_emul *emul, if (data->start_write) { k_mutex_lock(&data->data_mtx, K_FOREVER); - ret = data->start_write(emul, data->cur_reg); + ret = data->start_write(target, data->cur_reg); k_mutex_unlock(&data->data_mtx); } @@ -108,14 +91,14 @@ static int i2c_common_emul_start_write(struct i2c_emul *emul, * * @retval finish_write emulator callback return code */ -static int i2c_common_emul_finish_write(struct i2c_emul *emul, +static int i2c_common_emul_finish_write(const struct emul *target, struct i2c_common_emul_data *data) { int ret = 0; if (data->finish_write) { k_mutex_lock(&data->data_mtx, K_FOREVER); - ret = data->finish_write(emul, data->cur_reg, data->msg_byte); + ret = data->finish_write(target, data->cur_reg, data->msg_byte); k_mutex_unlock(&data->data_mtx); } @@ -131,7 +114,7 @@ static int i2c_common_emul_finish_write(struct i2c_emul *emul, * * @retval start_read emulator callback return code */ -static int i2c_common_emul_start_read(struct i2c_emul *emul, +static int i2c_common_emul_start_read(const struct emul *target, struct i2c_common_emul_data *data) { int ret = 0; @@ -140,7 +123,7 @@ static int i2c_common_emul_start_read(struct i2c_emul *emul, if (data->start_read) { k_mutex_lock(&data->data_mtx, K_FOREVER); - ret = data->start_read(emul, data->cur_reg); + ret = data->start_read(target, data->cur_reg); k_mutex_unlock(&data->data_mtx); } @@ -156,14 +139,14 @@ static int i2c_common_emul_start_read(struct i2c_emul *emul, * * @retval finish_read emulator callback return code */ -static int i2c_common_emul_finish_read(struct i2c_emul *emul, +static int i2c_common_emul_finish_read(const struct emul *target, struct i2c_common_emul_data *data) { int ret = 0; if (data->finish_read) { k_mutex_lock(&data->data_mtx, K_FOREVER); - ret = data->finish_read(emul, data->cur_reg, data->msg_byte); + ret = data->finish_read(target, data->cur_reg, data->msg_byte); k_mutex_unlock(&data->data_mtx); } @@ -183,7 +166,7 @@ static int i2c_common_emul_finish_read(struct i2c_emul *emul, * @retval 0 If successful * @retval -EIO General input / output error */ -static int i2c_common_emul_write_byte(struct i2c_emul *emul, +static int i2c_common_emul_write_byte(const struct emul *target, struct i2c_common_emul_data *data, uint8_t val) { @@ -191,8 +174,8 @@ static int i2c_common_emul_write_byte(struct i2c_emul *emul, /* Custom user handler */ if (data->write_func) { - ret = data->write_func(emul, data->cur_reg, val, data->msg_byte, - data->write_func_data); + ret = data->write_func(target, data->cur_reg, val, + data->msg_byte, data->write_func_data); if (ret < 0) { return -EIO; } else if (ret == 0) { @@ -201,7 +184,7 @@ static int i2c_common_emul_write_byte(struct i2c_emul *emul, } /* Check if user wants to fail on accessed register */ if (data->access_reg) { - reg = data->access_reg(emul, data->cur_reg, data->msg_byte, + reg = data->access_reg(target, data->cur_reg, data->msg_byte, false /* = read */); } else { /* Ignore first (register address) byte */ @@ -215,7 +198,7 @@ static int i2c_common_emul_write_byte(struct i2c_emul *emul, /* Emulator handler */ if (data->write_byte) { k_mutex_lock(&data->data_mtx, K_FOREVER); - ret = data->write_byte(emul, data->cur_reg, val, + ret = data->write_byte(target, data->cur_reg, val, data->msg_byte); k_mutex_unlock(&data->data_mtx); if (ret) { @@ -239,7 +222,7 @@ static int i2c_common_emul_write_byte(struct i2c_emul *emul, * @retval 0 If successful * @retval -EIO General input / output error */ -static int i2c_common_emul_read_byte(struct i2c_emul *emul, +static int i2c_common_emul_read_byte(const struct emul *target, struct i2c_common_emul_data *data, uint8_t *val) { @@ -247,8 +230,8 @@ static int i2c_common_emul_read_byte(struct i2c_emul *emul, /* Custom user handler */ if (data->read_func) { - ret = data->read_func(emul, data->cur_reg, val, data->msg_byte, - data->read_func_data); + ret = data->read_func(target, data->cur_reg, val, + data->msg_byte, data->read_func_data); if (ret < 0) { return -EIO; } else if (ret == 0) { @@ -257,7 +240,7 @@ static int i2c_common_emul_read_byte(struct i2c_emul *emul, } /* Check if user wants to fail on accessed register */ if (data->access_reg) { - reg = data->access_reg(emul, data->cur_reg, data->msg_byte, + reg = data->access_reg(target, data->cur_reg, data->msg_byte, true /* = read */); } else { reg = data->cur_reg + data->msg_byte; @@ -270,7 +253,8 @@ static int i2c_common_emul_read_byte(struct i2c_emul *emul, /* Emulator handler */ if (data->read_byte) { k_mutex_lock(&data->data_mtx, K_FOREVER); - ret = data->read_byte(emul, data->cur_reg, val, data->msg_byte); + ret = data->read_byte(target, data->cur_reg, val, + data->msg_byte); k_mutex_unlock(&data->data_mtx); if (ret) { return -EIO; @@ -281,17 +265,15 @@ static int i2c_common_emul_read_byte(struct i2c_emul *emul, } /** Check description in emul_common_i2c.h */ -int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, - int num_msgs, int addr) +int i2c_common_emul_transfer_workhorse(const struct emul *target, + struct i2c_common_emul_data *data, + const struct i2c_common_emul_cfg *cfg, + struct i2c_msg *msgs, int num_msgs, + int addr) { - const struct i2c_common_emul_cfg *cfg; - struct i2c_common_emul_data *data; bool read, stop; int ret, i; - data = CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - cfg = data->cfg; - if (cfg->addr != addr) { LOG_ERR("Address mismatch, expected %02x, got %02x", cfg->addr, addr); @@ -308,11 +290,12 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, case I2C_COMMON_EMUL_IN_WRITE: if (read) { data->msg_state = I2C_COMMON_EMUL_NONE_MSG; - ret = i2c_common_emul_finish_write(emul, data); + ret = i2c_common_emul_finish_write(target, + data); if (ret) { return ret; } - ret = i2c_common_emul_start_read(emul, data); + ret = i2c_common_emul_start_read(target, data); if (ret) { return ret; } @@ -321,7 +304,7 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, case I2C_COMMON_EMUL_IN_READ: if (!read) { data->msg_state = I2C_COMMON_EMUL_NONE_MSG; - ret = i2c_common_emul_finish_read(emul, data); + ret = i2c_common_emul_finish_read(target, data); if (ret) { return ret; } @@ -331,7 +314,7 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, } /* Dispatch command/register address */ data->cur_reg = msgs->buf[0]; - ret = i2c_common_emul_start_write(emul, data); + ret = i2c_common_emul_start_write(target, data); if (ret) { return ret; } @@ -339,7 +322,7 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, break; case I2C_COMMON_EMUL_NONE_MSG: if (read) { - ret = i2c_common_emul_start_read(emul, data); + ret = i2c_common_emul_start_read(target, data); if (ret) { return ret; } @@ -350,15 +333,15 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, } /* Dispatch command/register address */ data->cur_reg = msgs->buf[0]; - ret = i2c_common_emul_start_write(emul, data); + ret = i2c_common_emul_start_write(target, data); if (ret) { return ret; } } } - data->msg_state = read ? I2C_COMMON_EMUL_IN_READ - : I2C_COMMON_EMUL_IN_WRITE; + data->msg_state = read ? I2C_COMMON_EMUL_IN_READ : + I2C_COMMON_EMUL_IN_WRITE; if (stop) { data->msg_state = I2C_COMMON_EMUL_NONE_MSG; @@ -379,7 +362,7 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, } /* Dispatch write command */ for (; i < msgs->len; i++, data->msg_byte++) { - ret = i2c_common_emul_write_byte(emul, data, + ret = i2c_common_emul_write_byte(target, data, msgs->buf[i]); if (ret) { return ret; @@ -387,7 +370,8 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, } /* Finish write command */ if (stop) { - ret = i2c_common_emul_finish_write(emul, data); + ret = i2c_common_emul_finish_write(target, + data); if (ret) { return ret; } @@ -395,8 +379,8 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, } else { /* Dispatch read command */ for (i = 0; i < msgs->len; i++, data->msg_byte++) { - ret = i2c_common_emul_read_byte(emul, data, - &(msgs->buf[i])); + ret = i2c_common_emul_read_byte( + target, data, &(msgs->buf[i])); if (ret) { return ret; } @@ -404,7 +388,7 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, /* Finish read command */ if (stop) { - ret = i2c_common_emul_finish_read(emul, data); + ret = i2c_common_emul_finish_read(target, data); if (ret) { return ret; } @@ -416,6 +400,20 @@ int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, } /** Check description in emul_common_i2c.h */ +int i2c_common_emul_transfer(const struct emul *target, struct i2c_msg *msgs, + int num_msgs, int addr) +{ + const struct i2c_common_emul_cfg *cfg; + struct i2c_common_emul_data *data; + + data = target->data; + cfg = target->cfg; + + return i2c_common_emul_transfer_workhorse(target, data, cfg, msgs, + num_msgs, addr); +} + +/** Check description in emul_common_i2c.h */ void i2c_common_emul_init(struct i2c_common_emul_data *data) { data->msg_state = I2C_COMMON_EMUL_NONE_MSG; @@ -434,3 +432,14 @@ void i2c_common_emul_init(struct i2c_common_emul_data *data) struct i2c_emul_api i2c_common_emul_api = { .transfer = i2c_common_emul_transfer, }; + +static int i2c_common_emul_transfer_noop(const struct emul *target, + struct i2c_msg *msgs, int num_msgs, + int addr) +{ + return 0; +} + +struct i2c_emul_api i2c_common_emul_noop = { + .transfer = i2c_common_emul_transfer_noop, +}; diff --git a/zephyr/emul/emul_flash.c b/zephyr/emul/emul_flash.c index 2fa88916f3..0efc690fd4 100644 --- a/zephyr/emul/emul_flash.c +++ b/zephyr/emul/emul_flash.c @@ -1,10 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #define DT_DRV_COMPAT cros_ec_flash_emul +#include <zephyr/drivers/flash.h> #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(emul_flash); @@ -14,74 +15,183 @@ LOG_MODULE_REGISTER(emul_flash); #include <drivers/cros_flash.h> #include <zephyr/sys/__assert.h> -struct flash_emul_data {}; +#include "flash.h" + +struct flash_emul_data { + const struct device *flash_dev; +}; struct flash_emul_cfg { - /** Label of the device being emulated */ - const char *dev_label; /** Pointer to run-time data */ struct flash_emul_data *data; }; -void system_jump_to_booter(void) -{ -} +#define FLASH_DEV DT_CHOSEN(zephyr_flash_controller) -uint32_t system_get_lfw_address(void) -{ - uint32_t jump_addr = (uint32_t)system_jump_to_booter; - return jump_addr; -} +#define DRV_DATA(dev) ((struct flash_emul_data *)(dev)->data) -enum ec_image system_get_shrspi_image_copy(void) -{ - return EC_IMAGE_RO; -} +/* Variables to emulate the protection */ +bool ro_protected, all_protected; -void system_set_image_copy(enum ec_image copy) +static int cros_flash_emul_init(const struct device *dev) { + struct flash_emul_data *data = DRV_DATA(dev); + + data->flash_dev = DEVICE_DT_GET(FLASH_DEV); + if (!device_is_ready(data->flash_dev)) { + LOG_ERR("%s device not ready", data->flash_dev->name); + return -ENODEV; + } + + return EC_SUCCESS; } -static int cros_flash_emul_init(const struct device *dev) +static int flash_check_writable_range(int offset, int size) { - return 0; + /* Check out of range */ + if (offset + size > CONFIG_FLASH_SIZE_BYTES) { + return EC_ERROR_INVAL; + } + + /* Check RO protected and within the RO range */ + if (ro_protected && + MAX(CONFIG_WP_STORAGE_OFF, offset) < + MIN(CONFIG_WP_STORAGE_OFF + CONFIG_WP_STORAGE_SIZE, + offset + size)) { + return EC_ERROR_ACCESS_DENIED; + } + + return EC_SUCCESS; } static int cros_flash_emul_write(const struct device *dev, int offset, int size, const char *src_data) { - __ASSERT(false, "Not implemented"); - return -EINVAL; + int ret = 0; + struct flash_emul_data *data = DRV_DATA(dev); + + /* Check protection */ + if (all_protected) { + return EC_ERROR_ACCESS_DENIED; + } + + if (flash_check_writable_range(offset, size)) { + return EC_ERROR_ACCESS_DENIED; + } + + /* Check invalid data pointer? */ + if (src_data == 0) { + return -EINVAL; + } + + /* Lock physical flash operations */ + crec_flash_lock_mapped_storage(1); + + ret = flash_write(data->flash_dev, offset, src_data, size); + + /* Unlock physical flash operations */ + crec_flash_lock_mapped_storage(0); + + return ret; } static int cros_flash_emul_erase(const struct device *dev, int offset, int size) { - __ASSERT(false, "Not implemented"); - return -EINVAL; + int ret = 0; + struct flash_emul_data *data = DRV_DATA(dev); + + /* Check protection */ + if (all_protected) { + return EC_ERROR_ACCESS_DENIED; + } + + if (flash_check_writable_range(offset, size)) { + return EC_ERROR_ACCESS_DENIED; + } + + /* Address must be aligned to erase size */ + if ((offset % CONFIG_FLASH_ERASE_SIZE) != 0) { + return -EINVAL; + } + + /* Erase size must be a non-zero multiple of sectors */ + if ((size == 0) || (size % CONFIG_FLASH_ERASE_SIZE) != 0) { + return -EINVAL; + } + + /* Lock physical flash operations */ + crec_flash_lock_mapped_storage(1); + + ret = flash_erase(data->flash_dev, offset, size); + + /* Unlock physical flash operations */ + crec_flash_lock_mapped_storage(0); + + return ret; } static int cros_flash_emul_get_protect(const struct device *dev, int bank) { - __ASSERT(false, "Not implemented"); - return -EINVAL; + if (all_protected) { + return EC_ERROR_ACCESS_DENIED; + } + if (ro_protected && bank >= WP_BANK_OFFSET && + bank < WP_BANK_OFFSET + WP_BANK_COUNT) { + return EC_ERROR_ACCESS_DENIED; + } + + return EC_SUCCESS; } static uint32_t cros_flash_emul_get_protect_flags(const struct device *dev) { - return EC_FLASH_PROTECT_ERROR_UNKNOWN; + uint32_t flags = 0; + + if (ro_protected) { + flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW; + } + if (all_protected) { + flags |= EC_FLASH_PROTECT_ALL_NOW; + } + return flags; } static int cros_flash_emul_protect_at_boot(const struct device *dev, uint32_t new_flags) { - __ASSERT(false, "Not implemented"); - return -EINVAL; + if ((new_flags & (EC_FLASH_PROTECT_RO_AT_BOOT | + EC_FLASH_PROTECT_ALL_AT_BOOT)) == 0) { + /* Clear protection if allowed */ + if (crec_flash_get_protect() & EC_FLASH_PROTECT_GPIO_ASSERTED) { + return EC_ERROR_ACCESS_DENIED; + } + + ro_protected = all_protected = false; + return EC_SUCCESS; + } + + ro_protected = true; + + if (new_flags & EC_FLASH_PROTECT_ALL_AT_BOOT) { + all_protected = true; + } + + return EC_SUCCESS; } static int cros_flash_emul_protect_now(const struct device *dev, int all) { - __ASSERT(false, "Not implemented"); - return -EINVAL; + /* Emulate ALL_NOW only */ + if (all) { + all_protected = true; + } + + return EC_SUCCESS; +} + +void cros_flash_emul_protect_reset(void) +{ + ro_protected = all_protected = false; } static int cros_flash_emul_get_jedec_id(const struct device *dev, @@ -98,7 +208,6 @@ static int cros_flash_emul_get_status(const struct device *dev, uint8_t *sr1, return -EINVAL; } - static const struct cros_flash_driver_api emul_cros_flash_driver_api = { .init = cros_flash_emul_init, .physical_write = cros_flash_emul_write, @@ -118,17 +227,14 @@ static int flash_emul_init(const struct device *dev) return 0; } -#define FLASH_EMUL(n) \ - static struct flash_emul_data flash_emul_data_##n = { \ - }; \ - \ - static const struct flash_emul_cfg flash_emul_cfg_##n = { \ - .dev_label = DT_INST_LABEL(n), \ - .data = &flash_emul_data_##n, \ - }; \ - DEVICE_DT_INST_DEFINE(n, flash_emul_init, NULL, \ - &flash_emul_data_##n, &flash_emul_cfg_##n, \ - PRE_KERNEL_1, \ - CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \ +#define FLASH_EMUL(n) \ + static struct flash_emul_data flash_emul_data_##n = {}; \ + \ + static const struct flash_emul_cfg flash_emul_cfg_##n = { \ + .data = &flash_emul_data_##n, \ + }; \ + DEVICE_DT_INST_DEFINE(n, flash_emul_init, NULL, &flash_emul_data_##n, \ + &flash_emul_cfg_##n, PRE_KERNEL_1, \ + CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \ &emul_cros_flash_driver_api) DT_INST_FOREACH_STATUS_OKAY(FLASH_EMUL); diff --git a/zephyr/emul/emul_isl923x.c b/zephyr/emul/emul_isl923x.c index 9896804f7f..1ecb9e79f9 100644 --- a/zephyr/emul/emul_isl923x.c +++ b/zephyr/emul/emul_isl923x.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,7 +11,7 @@ #include <zephyr/drivers/emul.h> #include <errno.h> #include <zephyr/sys/__assert.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "driver/charger/isl923x.h" #include "driver/charger/isl923x_public.h" @@ -19,14 +19,11 @@ #include "emul/emul_isl923x.h" #include "emul/emul_smart_battery.h" #include "i2c.h" +#include "emul/emul_stub_device.h" #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(isl923x_emul, CONFIG_ISL923X_EMUL_LOG_LEVEL); -#define ISL923X_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct isl923x_emul_data, common) - /** Mask used for the charge current register */ #define REG_CHG_CURRENT_MASK GENMASK(12, 2) @@ -71,7 +68,7 @@ LOG_MODULE_REGISTER(isl923x_emul, CONFIG_ISL923X_EMUL_LOG_LEVEL); #define DEFAULT_R_SNS 10 #define R_SNS CONFIG_CHARGER_SENSE_RESISTOR -#define REG_TO_CURRENT(REG) ((REG) * DEFAULT_R_SNS / R_SNS) +#define REG_TO_CURRENT(REG) ((REG)*DEFAULT_R_SNS / R_SNS) struct isl923x_emul_data { /** Common I2C data */ @@ -113,7 +110,7 @@ struct isl923x_emul_data { /** Emulated input voltage register */ uint16_t input_voltage_reg; /** Pointer to battery emulator. */ - int battery_ord; + const struct emul *battery_emul; }; struct isl923x_emul_cfg { @@ -128,11 +125,10 @@ const struct device *isl923x_emul_get_parent(const struct emul *emulator) return data->common.i2c; } -struct i2c_emul *isl923x_emul_get_i2c_emul(const struct emul *emulator) +const struct i2c_common_emul_cfg * +isl923x_emul_get_cfg(const struct emul *emulator) { - struct isl923x_emul_data *data = emulator->data; - - return &(data->common.emul); + return emulator->cfg; } static void isl923x_emul_reset(struct isl923x_emul_data *data) @@ -145,11 +141,11 @@ void isl923x_emul_reset_registers(const struct emul *emulator) { struct isl923x_emul_data *data = emulator->data; struct i2c_common_emul_data common_backup = data->common; - int battery_ord = data->battery_ord; + const struct emul *battery_emul = data->battery_emul; memset(data, 0, sizeof(struct isl923x_emul_data)); data->common = common_backup; - data->battery_ord = battery_ord; + data->battery_emul = battery_emul; } void isl923x_emul_set_manufacturer_id(const struct emul *emulator, @@ -160,8 +156,7 @@ void isl923x_emul_set_manufacturer_id(const struct emul *emulator, data->manufacturer_id_reg = manufacturer_id; } -void isl923x_emul_set_device_id(const struct emul *emulator, - uint16_t device_id) +void isl923x_emul_set_device_id(const struct emul *emulator, uint16_t device_id) { struct isl923x_emul_data *data = emulator->data; @@ -215,10 +210,10 @@ void raa489000_emul_set_acok_pin(const struct emul *emulator, uint16_t value) break; \ } while (0) -static int isl923x_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, - int bytes) +static int isl923x_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) { - struct isl923x_emul_data *data = ISL923X_DATA_FROM_I2C_EMUL(emul); + struct isl923x_emul_data *data = emul->data; switch (reg) { case ISL923X_REG_CHG_CURRENT: @@ -283,12 +278,12 @@ static int isl923x_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, return 0; } -uint16_t isl923x_emul_peek_reg(struct i2c_emul *i2c_emul, int reg) +uint16_t isl923x_emul_peek_reg(const struct emul *emul, int reg) { uint8_t bytes[2]; - isl923x_emul_read_byte(i2c_emul, reg, &bytes[0], 0); - isl923x_emul_read_byte(i2c_emul, reg, &bytes[1], 1); + isl923x_emul_read_byte(emul, reg, &bytes[0], 0); + isl923x_emul_read_byte(emul, reg, &bytes[1], 1); return bytes[1] << 8 | bytes[0]; } @@ -303,10 +298,10 @@ uint16_t isl923x_emul_peek_reg(struct i2c_emul *i2c_emul, int reg) (REG) |= ((VAL) << 8) & (MASK); \ } while (0) -static int isl923x_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, - int bytes) +static int isl923x_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) { - struct isl923x_emul_data *data = ISL923X_DATA_FROM_I2C_EMUL(emul); + struct isl923x_emul_data *data = emul->data; switch (reg) { case ISL923X_REG_CHG_CURRENT: @@ -366,38 +361,42 @@ static int isl923x_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, break; case ISL9238_REG_INPUT_VOLTAGE: WRITE_REG_16(data->input_voltage_reg, bytes, val, - REG_INPUT_VOLTAGE_MASK); + REG_INPUT_VOLTAGE_MASK); break; default: __ASSERT(false, "Attempt to write unimplemented reg 0x%02x", reg); return -EINVAL; } + return 0; } -static int isl923x_emul_finish_write(struct i2c_emul *emul, int reg, int bytes) +static int isl923x_emul_finish_write(const struct emul *emul, int reg, + int bytes) { - struct isl923x_emul_data *data = ISL923X_DATA_FROM_I2C_EMUL(emul); - struct i2c_emul *battery_i2c_emul; + struct isl923x_emul_data *data = emul->data; struct sbat_emul_bat_data *bat; int16_t current; + /* This write only selected register for I2C read message */ + if (bytes < 2) { + return 0; + } + switch (reg) { case ISL923X_REG_CHG_CURRENT: /* Write current to battery. */ - if (data->battery_ord >= 0) { - battery_i2c_emul = sbat_emul_get_ptr(data->battery_ord); - if (battery_i2c_emul != NULL) { - bat = sbat_emul_get_bat_data(battery_i2c_emul); - if (bat != NULL) { - current = REG_TO_CURRENT( - data->current_limit_reg); - if (current > 0) - bat->cur = current; - else - bat->cur = -5; - } + if (data->battery_emul != NULL) { + /* We only have a single battery */ + bat = sbat_emul_get_bat_data(data->battery_emul); + if (bat != NULL) { + current = + REG_TO_CURRENT(data->current_limit_reg); + if (current > 0) + bat->cur = current; + else + bat->cur = -5; } } break; @@ -408,40 +407,34 @@ static int isl923x_emul_finish_write(struct i2c_emul *emul, int reg, int bytes) static int emul_isl923x_init(const struct emul *emul, const struct device *parent) { - const struct isl923x_emul_cfg *cfg = emul->cfg; struct isl923x_emul_data *data = emul->data; - data->common.emul.api = &i2c_common_emul_api; - data->common.emul.addr = cfg->common.addr; - data->common.emul.parent = emul; data->common.i2c = parent; - data->common.cfg = &cfg->common; i2c_common_emul_init(&data->common); - return i2c_emul_register(parent, emul->dev_label, &data->common.emul); + return 0; } -#define INIT_ISL923X(n) \ +#define INIT_ISL923X(n) \ static struct isl923x_emul_data isl923x_emul_data_##n = { \ .common = { \ .write_byte = isl923x_emul_write_byte, \ .read_byte = isl923x_emul_read_byte, \ .finish_write = isl923x_emul_finish_write, \ }, \ - .battery_ord = COND_CODE_1( \ + .battery_emul = COND_CODE_1( \ DT_INST_NODE_HAS_PROP(n, battery), \ - (DT_DEP_ORD(DT_INST_PROP(n, battery))), \ - (-1)), \ - }; \ + (EMUL_DT_GET(DT_INST_PROP(n, battery))), \ + (NULL)), \ + }; \ static struct isl923x_emul_cfg isl923x_emul_cfg_##n = { \ .common = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .addr = DT_INST_REG_ADDR(n), \ }, \ - }; \ - EMUL_DEFINE(emul_isl923x_init, DT_DRV_INST(n), &isl923x_emul_cfg_##n, \ - &isl923x_emul_data_##n) + }; \ + EMUL_DT_INST_DEFINE(n, emul_isl923x_init, &isl923x_emul_data_##n, \ + &isl923x_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(INIT_ISL923X) @@ -460,3 +453,11 @@ static void emul_isl923x_reset_before(const struct ztest_unit_test *test, } ZTEST_RULE(emul_isl923x_reset, emul_isl923x_reset_before, NULL); #endif /* CONFIG_ZTEST_NEW_API */ + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_isl923x_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/emul_kb_raw.c b/zephyr/emul/emul_kb_raw.c index 238c9673bb..1fdd93d1a0 100644 --- a/zephyr/emul/emul_kb_raw.c +++ b/zephyr/emul/emul_kb_raw.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -97,6 +97,16 @@ int emul_kb_raw_set_kbstate(const struct device *dev, uint8_t row, uint8_t col, return 0; } +void emul_kb_raw_reset(const struct device *dev) +{ + const struct kb_raw_emul_cfg *cfg = dev->config; + struct kb_raw_emul_data *data = dev->data; + + for (int col = 0; col < cfg->cols; col++) { + data->matrix[col] = 0; + } +} + static const struct cros_kb_raw_driver_api emul_kb_raw_driver_api = { .init = emul_kb_raw_init, .drive_colum = emul_kb_raw_drive_column, @@ -109,9 +119,9 @@ static const struct cros_kb_raw_driver_api emul_kb_raw_driver_api = { static struct kb_raw_emul_data kb_raw_emul_data_##n = { \ .matrix = kb_raw_emul_matrix_##n, \ }; \ - \ + \ static const struct kb_raw_emul_cfg kb_raw_emul_cfg_##n = { \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .data = &kb_raw_emul_data_##n, \ .rows = DT_INST_PROP(n, rows), \ .cols = DT_INST_PROP(n, cols), \ diff --git a/zephyr/emul/emul_lis2dw12.c b/zephyr/emul/emul_lis2dw12.c index 38bf6572b1..bdc4b50358 100644 --- a/zephyr/emul/emul_lis2dw12.c +++ b/zephyr/emul/emul_lis2dw12.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -16,14 +16,11 @@ #include "emul/emul_common_i2c.h" #include "emul/emul_lis2dw12.h" #include "i2c.h" +#include "emul/emul_stub_device.h" #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(lis2dw12_emul, CONFIG_LIS2DW12_EMUL_LOG_LEVEL); -#define LIS2DW12_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct lis2dw12_emul_data, common) - struct lis2dw12_emul_data { /** Common I2C data */ struct i2c_common_emul_data common; @@ -50,24 +47,16 @@ struct lis2dw12_emul_cfg { struct i2c_common_emul_cfg common; }; -struct i2c_emul *lis2dw12_emul_to_i2c_emul(const struct emul *emul) -{ - struct lis2dw12_emul_data *data = emul->data; - - return &(data->common.emul); -} - void lis2dw12_emul_reset(const struct emul *emul) { struct lis2dw12_emul_data *data = emul->data; - struct i2c_emul *i2c_emul = lis2dw12_emul_to_i2c_emul(emul); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(&data->common, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(&data->common, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(&data->common, NULL, NULL); + i2c_common_emul_set_write_func(&data->common, NULL, NULL); data->who_am_i_reg = LIS2DW12_WHO_AM_I; data->ctrl1_reg = 0; data->ctrl2_reg = 0; @@ -93,10 +82,10 @@ uint32_t lis2dw12_emul_get_soft_reset_count(const struct emul *emul) return data->soft_reset_count; } -static int lis2dw12_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, - int bytes) +static int lis2dw12_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) { - struct lis2dw12_emul_data *data = LIS2DW12_DATA_FROM_I2C_EMUL(emul); + struct lis2dw12_emul_data *data = emul->data; switch (reg) { case LIS2DW12_WHO_AM_I_REG: @@ -158,7 +147,7 @@ static int lis2dw12_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, return 0; } -uint8_t lis2dw12_emul_peek_reg(struct i2c_emul *emul, int reg) +uint8_t lis2dw12_emul_peek_reg(const struct emul *emul, int reg) { __ASSERT(emul, "emul is NULL"); @@ -171,7 +160,7 @@ uint8_t lis2dw12_emul_peek_reg(struct i2c_emul *emul, int reg) return val; } -uint8_t lis2dw12_emul_peek_odr(struct i2c_emul *emul) +uint8_t lis2dw12_emul_peek_odr(const struct emul *emul) { __ASSERT(emul, "emul is NULL"); @@ -181,7 +170,7 @@ uint8_t lis2dw12_emul_peek_odr(struct i2c_emul *emul) __builtin_ctz(LIS2DW12_ACC_ODR_MASK); } -uint8_t lis2dw12_emul_peek_mode(struct i2c_emul *emul) +uint8_t lis2dw12_emul_peek_mode(const struct emul *emul) { __ASSERT(emul, "emul is NULL"); @@ -191,7 +180,7 @@ uint8_t lis2dw12_emul_peek_mode(struct i2c_emul *emul) __builtin_ctz(LIS2DW12_ACC_MODE_MASK); } -uint8_t lis2dw12_emul_peek_lpmode(struct i2c_emul *emul) +uint8_t lis2dw12_emul_peek_lpmode(const struct emul *emul) { __ASSERT(emul, "emul is NULL"); @@ -200,10 +189,10 @@ uint8_t lis2dw12_emul_peek_lpmode(struct i2c_emul *emul) return (reg & LIS2DW12_ACC_LPMODE_MASK); } -static int lis2dw12_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, - int bytes) +static int lis2dw12_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) { - struct lis2dw12_emul_data *data = LIS2DW12_DATA_FROM_I2C_EMUL(emul); + struct lis2dw12_emul_data *data = emul->data; switch (reg) { case LIS2DW12_WHO_AM_I_REG: @@ -250,18 +239,12 @@ static int lis2dw12_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, static int emul_lis2dw12_init(const struct emul *emul, const struct device *parent) { - const struct lis2dw12_emul_cfg *lis2dw12_cfg = emul->cfg; - const struct i2c_common_emul_cfg *cfg = &(lis2dw12_cfg->common); struct lis2dw12_emul_data *data = emul->data; - data->common.emul.api = &i2c_common_emul_api; - data->common.emul.addr = cfg->addr; - data->common.emul.parent = emul; data->common.i2c = parent; - data->common.cfg = cfg; i2c_common_emul_init(&data->common); - return i2c_emul_register(parent, emul->dev_label, &data->common.emul); + return 0; } int lis2dw12_emul_set_accel_reading(const struct emul *emul, intv3_t reading) @@ -295,21 +278,27 @@ void lis2dw12_emul_clear_accel_reading(const struct emul *emul) data->status_reg &= ~LIS2DW12_STS_DRDY_UP; } -#define INIT_LIS2DW12(n) \ +#define INIT_LIS2DW12(n) \ static struct lis2dw12_emul_data lis2dw12_emul_data_##n = { \ .common = { \ .write_byte = lis2dw12_emul_write_byte, \ .read_byte = lis2dw12_emul_read_byte, \ }, \ - }; \ + }; \ static const struct lis2dw12_emul_cfg lis2dw12_emul_cfg_##n = { \ .common = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .addr = DT_INST_REG_ADDR(n), \ }, \ - }; \ - EMUL_DEFINE(emul_lis2dw12_init, DT_DRV_INST(n), \ - &lis2dw12_emul_cfg_##n, &lis2dw12_emul_data_##n) + }; \ + EMUL_DT_INST_DEFINE(n, emul_lis2dw12_init, &lis2dw12_emul_data_##n, \ + &lis2dw12_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(INIT_LIS2DW12) +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_lis2dw12_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/emul_ln9310.c b/zephyr/emul/emul_ln9310.c index f2f92154f4..bd6d41bce3 100644 --- a/zephyr/emul/emul_ln9310.c +++ b/zephyr/emul/emul_ln9310.c @@ -1,39 +1,36 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #define DT_DRV_COMPAT cros_ln9310_emul +#include <errno.h> #include <zephyr/device.h> #include <zephyr/devicetree/gpio.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c_emul.h> -#include <zephyr/drivers/emul.h> -#include <errno.h> #include <zephyr/sys/__assert.h> #include "driver/ln9310.h" #include "emul/emul_common_i2c.h" #include "emul/emul_ln9310.h" +#include "hooks.h" #include "i2c.h" +#include "emul/emul_stub_device.h" #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(ln9310_emul, CONFIG_LN9310_EMUL_LOG_LEVEL); -#define LN9310_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct ln9310_emul_data, common) - enum functional_mode { /* TODO shutdown_mode, */ /* TODO bypass, */ FUNCTIONAL_MODE_STANDBY = LN9310_SYS_STANDBY, - FUNCTIONAL_MODE_SWITCHING_21 = - LN9310_SYS_SWITCHING21_ACTIVE, - FUNCTIONAL_MODE_SWITCHING_31 = - LN9310_SYS_SWITCHING31_ACTIVE + FUNCTIONAL_MODE_SWITCHING_21 = LN9310_SYS_SWITCHING21_ACTIVE, + FUNCTIONAL_MODE_SWITCHING_31 = LN9310_SYS_SWITCHING31_ACTIVE }; struct ln9310_emul_data { @@ -251,20 +248,20 @@ enum battery_cell_type board_get_battery_cell_type(void) return data->battery_cell_type; } -static int ln9310_emul_start_write(struct i2c_emul *emul, int reg) +static int ln9310_emul_start_write(const struct emul *emul, int reg) { return 0; } -static int ln9310_emul_finish_write(struct i2c_emul *emul, int reg, int bytes) +static int ln9310_emul_finish_write(const struct emul *emul, int reg, int bytes) { return 0; } -static int ln9310_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, +static int ln9310_emul_write_byte(const struct emul *emul, int reg, uint8_t val, int bytes) { - struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + struct ln9310_emul_data *data = emul->data; __ASSERT(bytes == 1, "bytes 0x%x != 0x1 on reg 0x%x", bytes, reg); @@ -352,14 +349,14 @@ static int ln9310_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, return 0; } -static int ln9310_emul_start_read(struct i2c_emul *emul, int reg) +static int ln9310_emul_start_read(const struct emul *emul, int reg) { return 0; } -static int ln9310_emul_finish_read(struct i2c_emul *emul, int reg, int bytes) +static int ln9310_emul_finish_read(const struct emul *emul, int reg, int bytes) { - struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + struct ln9310_emul_data *data = emul->data; switch (reg) { case LN9310_REG_INT1: @@ -370,10 +367,10 @@ static int ln9310_emul_finish_read(struct i2c_emul *emul, int reg, int bytes) return 0; } -static int ln9310_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, +static int ln9310_emul_read_byte(const struct emul *emul, int reg, uint8_t *val, int bytes) { - struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + struct ln9310_emul_data *data = emul->data; __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); @@ -459,7 +456,7 @@ static int ln9310_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, return 0; } -static int ln9310_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, +static int ln9310_emul_access_reg(const struct emul *emul, int reg, int bytes, bool read) { return reg; @@ -468,19 +465,14 @@ static int ln9310_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, static int emul_ln9310_init(const struct emul *emul, const struct device *parent) { - const struct i2c_common_emul_cfg *cfg = emul->cfg; struct ln9310_emul_data *data = emul->data; - data->common.emul.api = &i2c_common_emul_api; - data->common.emul.addr = cfg->addr; - data->common.emul.parent = emul; data->common.i2c = parent; - data->common.cfg = cfg; i2c_common_emul_init(&data->common); singleton = emul; - return i2c_emul_register(parent, emul->dev_label, &data->common.emul); + return 0; } #define LN9310_GET_GPIO_INT_PORT(n) \ @@ -489,11 +481,11 @@ static int emul_ln9310_init(const struct emul *emul, #define LN9310_GET_GPIO_INT_PIN(n) \ DT_GPIO_PIN(DT_INST_PROP(n, pg_int_pin), gpios) -#define INIT_LN9310(n) \ - const struct ln9310_config_t ln9310_config = { \ - .i2c_port = NAMED_I2C(power), \ - .i2c_addr_flags = DT_INST_REG_ADDR(n), \ - }; \ +#define INIT_LN9310(n) \ + const struct ln9310_config_t ln9310_config = { \ + .i2c_port = I2C_PORT_NODELABEL(i2c0), \ + .i2c_addr_flags = DT_INST_REG_ADDR(n), \ + }; \ static struct ln9310_emul_data ln9310_emul_data_##n = { \ .common = { \ .start_write = ln9310_emul_start_write, \ @@ -506,13 +498,19 @@ static int emul_ln9310_init(const struct emul *emul, }, \ .gpio_int_port = LN9310_GET_GPIO_INT_PORT(n), \ .gpio_int_pin = LN9310_GET_GPIO_INT_PIN(n), \ - }; \ - static const struct i2c_common_emul_cfg ln9310_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(emul_ln9310_init, DT_DRV_INST(n), &ln9310_emul_cfg_##n, \ - &ln9310_emul_data_##n) + }; \ + static const struct i2c_common_emul_cfg ln9310_emul_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DT_INST_DEFINE(n, emul_ln9310_init, &ln9310_emul_data_##n, \ + &ln9310_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(INIT_LN9310) +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_ln9310_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/emul_pi3usb9201.c b/zephyr/emul/emul_pi3usb9201.c index 9115a84515..3b1193d9b1 100644 --- a/zephyr/emul/emul_pi3usb9201.c +++ b/zephyr/emul/emul_pi3usb9201.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,6 +11,8 @@ #include <zephyr/drivers/i2c_emul.h> #include "emul/emul_pi3usb9201.h" +#include "emul/emul_stub_device.h" +#include "emul/emul_common_i2c.h" #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(emul_pi3usb9201, LOG_LEVEL_DBG); @@ -20,6 +22,8 @@ LOG_MODULE_REGISTER(emul_pi3usb9201, LOG_LEVEL_DBG); /** Run-time data used by the emulator */ struct pi3usb9201_emul_data { + /** Common I2C data */ + struct i2c_common_emul_data common; /** I2C emulator detail */ struct i2c_emul emul; /** pi3usb9201 device being emulated */ @@ -32,50 +36,48 @@ struct pi3usb9201_emul_data { /** Static configuration for the emulator */ struct pi3usb9201_emul_cfg { - /** Label of the I2C bus this emulator connects to */ - const char *i2c_label; /** Pointer to run-time data */ struct pi3usb9201_emul_data *data; /** Address of pi3usb9201 on i2c bus */ uint16_t addr; }; -int pi3usb9201_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) +int pi3usb9201_emul_set_reg(const struct emul *emul, int reg, uint8_t val) { struct pi3usb9201_emul_data *data; if (!EMUL_REG_IS_VALID(reg)) return -EIO; - data = CONTAINER_OF(emul, struct pi3usb9201_emul_data, emul); + data = emul->data; data->reg[reg] = val; return 0; } -int pi3usb9201_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val) +int pi3usb9201_emul_get_reg(const struct emul *emul, int reg, uint8_t *val) { struct pi3usb9201_emul_data *data; if (!EMUL_REG_IS_VALID(reg)) return -EIO; - data = CONTAINER_OF(emul, struct pi3usb9201_emul_data, emul); + data = emul->data; *val = data->reg[reg]; return 0; } -static void pi3usb9201_emul_reset(struct i2c_emul *emul) +static void pi3usb9201_emul_reset(const struct emul *emul) { struct pi3usb9201_emul_data *data; - data = CONTAINER_OF(emul, struct pi3usb9201_emul_data, emul); + data = emul->data; - data->reg[PI3USB9201_REG_CTRL_1] = 0; - data->reg[PI3USB9201_REG_CTRL_2] = 0; + data->reg[PI3USB9201_REG_CTRL_1] = 0; + data->reg[PI3USB9201_REG_CTRL_2] = 0; data->reg[PI3USB9201_REG_CLIENT_STS] = 0; - data->reg[PI3USB9201_REG_HOST_STS] = 0; + data->reg[PI3USB9201_REG_HOST_STS] = 0; } /** @@ -91,13 +93,14 @@ static void pi3usb9201_emul_reset(struct i2c_emul *emul) * @retval 0 If successful * @retval -EIO General input / output error */ -static int pi3usb9201_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, - int num_msgs, int addr) +static int pi3usb9201_emul_transfer(const struct emul *emul, + struct i2c_msg *msgs, int num_msgs, + int addr) { const struct pi3usb9201_emul_cfg *cfg; struct pi3usb9201_emul_data *data; - data = CONTAINER_OF(emul, struct pi3usb9201_emul_data, emul); + data = emul->data; cfg = data->cfg; if (cfg->addr != addr) { @@ -109,18 +112,18 @@ static int pi3usb9201_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, i2c_dump_msgs("emul", msgs, num_msgs, addr); if (num_msgs == 1) { - if (!(((msgs[0].flags & I2C_MSG_RW_MASK) == I2C_MSG_WRITE) - && (msgs[0].len == 2))) { + if (!(((msgs[0].flags & I2C_MSG_RW_MASK) == I2C_MSG_WRITE) && + (msgs[0].len == 2))) { LOG_ERR("Unexpected write msgs"); return -EIO; } return pi3usb9201_emul_set_reg(emul, msgs[0].buf[0], msgs[0].buf[1]); } else if (num_msgs == 2) { - if (!(((msgs[0].flags & I2C_MSG_RW_MASK) == I2C_MSG_WRITE) - && (msgs[0].len == 1) - && ((msgs[1].flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) - && (msgs[1].len == 1))) { + if (!(((msgs[0].flags & I2C_MSG_RW_MASK) == I2C_MSG_WRITE) && + (msgs[0].len == 1) && + ((msgs[1].flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) && + (msgs[1].len == 1))) { LOG_ERR("Unexpected read msgs"); return -EIO; } @@ -130,7 +133,6 @@ static int pi3usb9201_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, LOG_ERR("Unexpected num_msgs"); return -EIO; } - } /* Device instantiation */ @@ -151,45 +153,29 @@ static struct i2c_emul_api pi3usb9201_emul_api = { * @return 0 indicating success (always) */ static int pi3usb9201_emul_init(const struct emul *emul, - const struct device *parent) + const struct device *parent) { const struct pi3usb9201_emul_cfg *cfg = emul->cfg; struct pi3usb9201_emul_data *data = cfg->data; - int ret; - data->emul.api = &pi3usb9201_emul_api; - data->emul.addr = cfg->addr; data->i2c = parent; data->cfg = cfg; - ret = i2c_emul_register(parent, emul->dev_label, &data->emul); - - pi3usb9201_emul_reset(&data->emul); + pi3usb9201_emul_reset(emul); - return ret; + return 0; } #define PI3USB9201_EMUL(n) \ static struct pi3usb9201_emul_data pi3usb9201_emul_data_##n = {}; \ static const struct pi3usb9201_emul_cfg pi3usb9201_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ .data = &pi3usb9201_emul_data_##n, \ .addr = DT_INST_REG_ADDR(n), \ }; \ - EMUL_DEFINE(pi3usb9201_emul_init, DT_DRV_INST(n), \ - &pi3usb9201_emul_cfg_##n, &pi3usb9201_emul_data_##n) + EMUL_DT_INST_DEFINE(n, pi3usb9201_emul_init, \ + &pi3usb9201_emul_data_##n, \ + &pi3usb9201_emul_cfg_##n, &pi3usb9201_emul_api) DT_INST_FOREACH_STATUS_OKAY(PI3USB9201_EMUL) -#define PI3USB9201_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &pi3usb9201_emul_data_##n.emul; - -struct i2c_emul *pi3usb9201_emul_get(int ord) -{ - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(PI3USB9201_EMUL_CASE) - - default: - return NULL; - } -} +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); diff --git a/zephyr/emul/emul_rt9490.c b/zephyr/emul/emul_rt9490.c new file mode 100644 index 0000000000..dbc2500e90 --- /dev/null +++ b/zephyr/emul/emul_rt9490.c @@ -0,0 +1,107 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/device.h> + +#include "driver/charger/rt9490.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_rt9490.h" +#include "emul/emul_stub_device.h" +#include "util.h" + +#define DT_DRV_COMPAT zephyr_rt9490_emul + +#define RT9490_REG_MAX 255 + +struct rt9490_data { + struct i2c_common_emul_data common; + uint8_t regs[RT9490_REG_MAX + 1]; +}; + +static const uint8_t default_values[RT9490_REG_MAX + 1] = { + [RT9490_REG_SAFETY_TMR_CTRL] = 0x3D, + [RT9490_REG_ADD_CTRL0] = 0x76, +}; + +void rt9490_emul_reset_regs(const struct emul *emul) +{ + struct rt9490_data *data = emul->data; + + memcpy(data->regs, default_values, RT9490_REG_MAX + 1); +} + +int rt9490_emul_peek_reg(const struct emul *emul, int reg) +{ + struct rt9490_data *data = emul->data; + uint8_t *regs = data->regs; + + if (!IN_RANGE(reg, 0, RT9490_REG_MAX)) { + return -1; + } + return regs[reg]; +} + +static int rt9490_emul_read(const struct emul *emul, int reg, uint8_t *val, + int bytes, void *unused_data) +{ + struct rt9490_data *data = emul->data; + uint8_t *regs = data->regs; + int pos = reg + bytes; + + if (!IN_RANGE(pos, 0, RT9490_REG_MAX)) { + return -1; + } + *val = regs[pos]; + + return 0; +} + +static int rt9490_emul_write(const struct emul *emul, int reg, uint8_t val, + int bytes, void *unused_data) +{ + struct rt9490_data *data = emul->data; + uint8_t *regs = data->regs; + int pos = reg + bytes - 1; + + if (!IN_RANGE(pos, 0, RT9490_REG_MAX) || !IN_RANGE(val, 0, UINT8_MAX)) { + return -1; + } + regs[pos] = val; + + return 0; +} + +static int rt9490_emul_init(const struct emul *emul, + const struct device *parent) +{ + struct rt9490_data *data = (struct rt9490_data *)emul->data; + struct i2c_common_emul_data *common_data = &data->common; + + i2c_common_emul_init(common_data); + i2c_common_emul_set_read_func(common_data, rt9490_emul_read, NULL); + i2c_common_emul_set_write_func(common_data, rt9490_emul_write, NULL); + + rt9490_emul_reset_regs(emul); + + return 0; +} + +#define INIT_RT9490_EMUL(n) \ + static struct i2c_common_emul_cfg common_cfg_##n; \ + static struct rt9490_data rt9490_data_##n; \ + static struct i2c_common_emul_cfg common_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &rt9490_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n) \ + }; \ + static struct rt9490_data rt9490_data_##n = { \ + .common = { .cfg = &common_cfg_##n } \ + }; \ + EMUL_DT_INST_DEFINE(n, rt9490_emul_init, &rt9490_data_##n, \ + &common_cfg_##n, &i2c_common_emul_api) + +DT_INST_FOREACH_STATUS_OKAY(INIT_RT9490_EMUL) + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); diff --git a/zephyr/emul/emul_rtc.c b/zephyr/emul/emul_rtc.c new file mode 100644 index 0000000000..45741a5277 --- /dev/null +++ b/zephyr/emul/emul_rtc.c @@ -0,0 +1,139 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT cros_ec_rtc_emul + +#include <zephyr/logging/log.h> +LOG_MODULE_REGISTER(emul_rtc); + +#include <zephyr/device.h> +#include <zephyr/drivers/emul.h> +#include <ec_commands.h> +#include <drivers/cros_rtc.h> +#include <zephyr/sys/__assert.h> + +#include "flash.h" + +struct cros_rtc_emul_data { + const struct device *rtc_dev; + uint32_t alarm_time; + cros_rtc_alarm_callback_t alarm_callback; + uint32_t value; +}; + +struct rtc_emul_cfg { + /** Pointer to run-time data */ + struct cros_rtc_emul_data *data; +}; + +#define RTC_DEV DT_CHOSEN(zephyr_rtc_controller) + +#define DRV_DATA(dev) ((struct cros_rtc_emul_data *)(dev)->data) + +static int cros_rtc_emul_configure(const struct device *dev, + cros_rtc_alarm_callback_t callback) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + + if (callback == NULL) { + return -EINVAL; + } + + data->alarm_callback = callback; + + return EC_SUCCESS; +} + +static int cros_rtc_emul_get_value(const struct device *dev, uint32_t *value) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + + *value = data->value; + + return EC_SUCCESS; +} + +static int cros_rtc_emul_set_value(const struct device *dev, uint32_t value) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + + data->value = value; + + return EC_SUCCESS; +} + +static int cros_rtc_emul_get_alarm(const struct device *dev, uint32_t *seconds, + uint32_t *microseconds) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + + *seconds = data->alarm_time; + *microseconds = 0; + + return EC_SUCCESS; +} + +static int cros_rtc_emul_reset_alarm(const struct device *dev) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + + data->alarm_time = 0; + + return EC_SUCCESS; +} + +static int cros_rtc_emul_set_alarm(const struct device *dev, uint32_t seconds, + uint32_t microseconds) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + int ret; + + ARG_UNUSED(microseconds); + + ret = cros_rtc_emul_reset_alarm(dev); + + if (ret < 0) { + return ret; + } + + data->alarm_time = seconds; + + if (ret < 0) { + return ret; + } + + return EC_SUCCESS; +} + +static const struct cros_rtc_driver_api emul_cros_rtc_driver_api = { + .configure = cros_rtc_emul_configure, + .get_value = cros_rtc_emul_get_value, + .set_value = cros_rtc_emul_set_value, + .get_alarm = cros_rtc_emul_get_alarm, + .set_alarm = cros_rtc_emul_set_alarm, + .reset_alarm = cros_rtc_emul_reset_alarm, +}; + +static int rtc_emul_init(const struct device *dev) +{ + struct cros_rtc_emul_data *data = DRV_DATA(dev); + + data->alarm_callback = NULL; + data->alarm_time = 0; + data->value = 0; + + return EC_SUCCESS; +} + +#define RTC_EMUL(n) \ + static struct cros_rtc_emul_data cros_rtc_emul_data_##n = {}; \ + static const struct rtc_emul_cfg rtc_emul_cfg_##n = { \ + .data = &cros_rtc_emul_data_##n, \ + }; \ + DEVICE_DT_INST_DEFINE(n, rtc_emul_init, NULL, &cros_rtc_emul_data_##n, \ + &rtc_emul_cfg_##n, PRE_KERNEL_1, \ + CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \ + &emul_cros_rtc_driver_api) +DT_INST_FOREACH_STATUS_OKAY(RTC_EMUL); diff --git a/zephyr/emul/emul_smart_battery.c b/zephyr/emul/emul_smart_battery.c index a6abd94054..b3e8d62bcc 100644 --- a/zephyr/emul/emul_smart_battery.c +++ b/zephyr/emul/emul_smart_battery.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,16 +13,14 @@ LOG_MODULE_REGISTER(smart_battery); #include <zephyr/drivers/emul.h> #include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c_emul.h> +#include <zephyr/ztest.h> #include "emul/emul_common_i2c.h" #include "emul/emul_smart_battery.h" #include "crc8.h" #include "battery_smart.h" - -#define SBAT_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct sbat_emul_data, common) +#include "emul/emul_stub_device.h" /** Run-time data used by the emulator */ struct sbat_emul_data { @@ -40,11 +38,11 @@ struct sbat_emul_data { }; /** Check description in emul_smart_battery.h */ -struct sbat_emul_bat_data *sbat_emul_get_bat_data(struct i2c_emul *emul) +struct sbat_emul_bat_data *sbat_emul_get_bat_data(const struct emul *emul) { struct sbat_emul_data *data; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; return &data->bat; } @@ -53,13 +51,13 @@ struct sbat_emul_bat_data *sbat_emul_get_bat_data(struct i2c_emul *emul) uint16_t sbat_emul_date_to_word(unsigned int day, unsigned int month, unsigned int year) { - year -= MANUFACTURE_DATE_YEAR_OFFSET; - year <<= MANUFACTURE_DATE_YEAR_SHIFT; - year &= MANUFACTURE_DATE_YEAR_MASK; + year -= MANUFACTURE_DATE_YEAR_OFFSET; + year <<= MANUFACTURE_DATE_YEAR_SHIFT; + year &= MANUFACTURE_DATE_YEAR_MASK; month <<= MANUFACTURE_DATE_MONTH_SHIFT; - month &= MANUFACTURE_DATE_MONTH_MASK; - day <<= MANUFACTURE_DATE_DAY_SHIFT; - day &= MANUFACTURE_DATE_DAY_MASK; + month &= MANUFACTURE_DATE_MONTH_MASK; + day <<= MANUFACTURE_DATE_DAY_SHIFT; + day &= MANUFACTURE_DATE_DAY_MASK; return day | month | year; } @@ -105,7 +103,7 @@ static uint16_t sbat_emul_10mw_to_ma(int mw, int mv) /* Smart battery use 10mW units, convert to mW */ mw *= 10; /* Multiple by 1000 to get mA instead of A */ - return 1000 * mw/mv; + return 1000 * mw / mv; } /** @@ -274,14 +272,12 @@ static int sbat_emul_read_at_rate_ok(struct sbat_emul_bat_data *bat, * * @return value which equals to computed status register */ -static uint16_t sbat_emul_read_status(struct i2c_emul *emul) +static uint16_t sbat_emul_read_status(const struct emul *emul) { uint16_t status, cap, rem_time, charge_percent; struct sbat_emul_bat_data *bat; - struct sbat_emul_data *data; - data = SBAT_DATA_FROM_I2C_EMUL(emul); - bat = &data->bat; + bat = sbat_emul_get_bat_data(emul); status = bat->status; @@ -329,15 +325,13 @@ static uint16_t sbat_emul_read_status(struct i2c_emul *emul) } /** Check description in emul_smart_battery.h */ -int sbat_emul_get_word_val(struct i2c_emul *emul, int cmd, uint16_t *val) +int sbat_emul_get_word_val(const struct emul *emul, int cmd, uint16_t *val) { struct sbat_emul_bat_data *bat; - struct sbat_emul_data *data; int mode_mw; int rate; - data = SBAT_DATA_FROM_I2C_EMUL(emul); - bat = &data->bat; + bat = sbat_emul_get_bat_data(emul); mode_mw = bat->mode & MODE_CAPACITY; switch (cmd) { @@ -466,13 +460,13 @@ int sbat_emul_get_word_val(struct i2c_emul *emul, int cmd, uint16_t *val) } /** Check description in emul_smart_battery.h */ -int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, +int sbat_emul_get_block_data(const struct emul *emul, int cmd, uint8_t **blk, int *len) { struct sbat_emul_bat_data *bat; struct sbat_emul_data *data; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; bat = &data->bat; switch (cmd) { @@ -492,6 +486,10 @@ int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, *blk = bat->mf_data; *len = bat->mf_data_len; return 0; + case SB_MANUFACTURE_INFO: + *blk = bat->mf_info; + *len = bat->mf_info_len; + return 0; default: /* Unknown command or return value is not word */ return 1; @@ -504,13 +502,15 @@ int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, * @param data Pointer to smart battery emulator data * @param cmd Command for which PEC is calculated */ -static void sbat_emul_append_pec(struct sbat_emul_data *data, int cmd) +static void sbat_emul_append_pec(const struct emul *emul, int cmd) { uint8_t pec; + struct sbat_emul_data *data = emul->data; + const struct i2c_common_emul_cfg *cfg = emul->cfg; if (BATTERY_SPEC_VERSION(data->bat.spec_info) == BATTERY_SPEC_VER_1_1_WITH_PEC) { - pec = sbat_emul_pec_head(data->common.cfg->addr, 1, cmd); + pec = sbat_emul_pec_head(cfg->addr, 1, cmd); pec = cros_crc8_arg(data->msg_buf, data->num_to_read, pec); data->msg_buf[data->num_to_read] = pec; data->num_to_read++; @@ -518,12 +518,12 @@ static void sbat_emul_append_pec(struct sbat_emul_data *data, int cmd) } /** Check description in emul_smart_battery.h */ -void sbat_emul_set_response(struct i2c_emul *emul, int cmd, uint8_t *buf, +void sbat_emul_set_response(const struct emul *emul, int cmd, uint8_t *buf, int len, bool fail) { struct sbat_emul_data *data; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (fail) { data->bat.error_code = STATUS_CODE_UNKNOWN_ERROR; @@ -534,7 +534,7 @@ void sbat_emul_set_response(struct i2c_emul *emul, int cmd, uint8_t *buf, data->num_to_read = MIN(len, MSG_BUF_LEN - 1); memcpy(data->msg_buf, buf, data->num_to_read); data->bat.error_code = STATUS_CODE_OK; - sbat_emul_append_pec(data, cmd); + sbat_emul_append_pec(emul, cmd); } /** @@ -552,14 +552,14 @@ void sbat_emul_set_response(struct i2c_emul *emul, int cmd, uint8_t *buf, * @return 0 on success * @return -EIO on error */ -static int sbat_emul_handle_read_msg(struct i2c_emul *emul, int reg) +static int sbat_emul_handle_read_msg(const struct emul *emul, int reg) { struct sbat_emul_data *data; uint16_t word; uint8_t *blk; int ret, len; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (data->cur_cmd == SBAT_EMUL_NO_CMD) { /* Unexpected read message without preceding command select */ @@ -579,7 +579,7 @@ static int sbat_emul_handle_read_msg(struct i2c_emul *emul, int reg) data->msg_buf[0] = word & 0xff; data->msg_buf[1] = (word >> 8) & 0xff; data->bat.error_code = STATUS_CODE_OK; - sbat_emul_append_pec(data, reg); + sbat_emul_append_pec(emul, reg); return 0; } @@ -594,7 +594,7 @@ static int sbat_emul_handle_read_msg(struct i2c_emul *emul, int reg) data->msg_buf[0] = len; memcpy(&data->msg_buf[1], blk, len); data->bat.error_code = STATUS_CODE_OK; - sbat_emul_append_pec(data, reg); + sbat_emul_append_pec(emul, reg); return 0; } @@ -615,7 +615,7 @@ static int sbat_emul_handle_read_msg(struct i2c_emul *emul, int reg) * @return 0 on success * @return -EIO on error */ -static int sbat_emul_finalize_write_msg(struct i2c_emul *emul, int reg, +static int sbat_emul_finalize_write_msg(const struct emul *emul, int reg, int bytes) { struct sbat_emul_bat_data *bat; @@ -623,7 +623,7 @@ static int sbat_emul_finalize_write_msg(struct i2c_emul *emul, int reg, uint16_t word; uint8_t pec; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; bat = &data->bat; /* @@ -659,8 +659,8 @@ static int sbat_emul_finalize_write_msg(struct i2c_emul *emul, int reg, pec = cros_crc8_arg(data->msg_buf, 3, pec); if (pec != data->msg_buf[3]) { data->bat.error_code = STATUS_CODE_UNKNOWN_ERROR; - LOG_ERR("Wrong PEC 0x%x != 0x%x", - pec, data->msg_buf[3]); + LOG_ERR("Wrong PEC 0x%x != 0x%x", pec, + data->msg_buf[3]); return -EIO; } @@ -709,12 +709,12 @@ static int sbat_emul_finalize_write_msg(struct i2c_emul *emul, int reg, * * @return 0 on success */ -static int sbat_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, +static int sbat_emul_write_byte(const struct emul *emul, int reg, uint8_t val, int bytes) { struct sbat_emul_data *data; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (bytes < MSG_BUF_LEN) { data->msg_buf[bytes] = val; @@ -734,12 +734,12 @@ static int sbat_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, * * @return 0 on success */ -static int sbat_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, +static int sbat_emul_read_byte(const struct emul *emul, int reg, uint8_t *val, int bytes) { struct sbat_emul_data *data; - data = SBAT_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (data->num_to_read == 0) { data->bat.error_code = STATUS_CODE_UNSUPPORTED; @@ -766,7 +766,7 @@ static int sbat_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, * * @return Currently accessed register */ -static int sbat_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, +static int sbat_emul_access_reg(const struct emul *emul, int reg, int bytes, bool read) { return reg; @@ -785,25 +785,18 @@ static int sbat_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, * * @return 0 indicating success (always) */ -static int sbat_emul_init(const struct emul *emul, - const struct device *parent) +static int sbat_emul_init(const struct emul *emul, const struct device *parent) { - const struct i2c_common_emul_cfg *cfg = emul->cfg; - struct i2c_common_emul_data *data = cfg->data; - int ret; + struct sbat_emul_data *data = emul->data; - data->emul.api = &i2c_common_emul_api; - data->emul.addr = cfg->addr; - data->i2c = parent; - data->cfg = cfg; - i2c_common_emul_init(data); + data->common.i2c = parent; - ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + i2c_common_emul_init(&data->common); - return ret; + return 0; } -#define SMART_BATTERY_EMUL(n) \ +#define SMART_BATTERY_EMUL(n) \ static struct sbat_emul_data sbat_emul_data_##n = { \ .bat = { \ .mf_access = DT_INST_PROP(n, mf_access), \ @@ -826,6 +819,7 @@ static int sbat_emul_init(const struct emul *emul, (DT_INST_PROP(n, primary_battery) * \ MODE_PRIMARY_BATTERY_SUPPORT), \ .design_mv = DT_INST_PROP(n, design_mv), \ + .default_design_mv = DT_INST_PROP(n, design_mv),\ .design_cap = DT_INST_PROP(n, design_cap), \ .temp = DT_INST_PROP(n, temperature), \ .volt = DT_INST_PROP(n, volt), \ @@ -833,7 +827,9 @@ static int sbat_emul_init(const struct emul *emul, .avg_cur = DT_INST_PROP(n, avg_cur), \ .max_error = DT_INST_PROP(n, max_error), \ .cap = DT_INST_PROP(n, cap), \ + .default_cap = DT_INST_PROP(n, cap), \ .full_cap = DT_INST_PROP(n, full_cap), \ + .default_full_cap = DT_INST_PROP(n, full_cap), \ .desired_charg_cur = DT_INST_PROP(n, \ desired_charg_cur), \ .desired_charg_volt = DT_INST_PROP(n, \ @@ -852,6 +848,9 @@ static int sbat_emul_init(const struct emul *emul, .dev_chem = DT_INST_PROP(n, dev_chem), \ .dev_chem_len = sizeof( \ DT_INST_PROP(n, dev_chem)) - 1, \ + .mf_info = DT_INST_PROP(n, mf_info), \ + .mf_info_len = sizeof( \ + DT_INST_PROP(n, mf_info)) - 1, \ .mf_date = 0, \ .cap_alarm = 0, \ .time_alarm = 0, \ @@ -869,29 +868,47 @@ static int sbat_emul_init(const struct emul *emul, .finish_read = NULL, \ .access_reg = sbat_emul_access_reg, \ }, \ - }; \ - \ - static const struct i2c_common_emul_cfg sbat_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .data = &sbat_emul_data_##n.common, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(sbat_emul_init, DT_DRV_INST(n), &sbat_emul_cfg_##n, \ - &sbat_emul_data_##n) + }; \ + \ + static const struct i2c_common_emul_cfg sbat_emul_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &sbat_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DT_INST_DEFINE(n, sbat_emul_init, &sbat_emul_data_##n, \ + &sbat_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(SMART_BATTERY_EMUL) -#define SMART_BATTERY_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &sbat_emul_data_##n.common.emul; +#define SMART_BATTERY_EMUL_CASE(n) \ + case DT_INST_DEP_ORD(n): \ + return sbat_emul_data_##n.common.emul.target; -/** Check description in emul_smart_battery.h */ -struct i2c_emul *sbat_emul_get_ptr(int ord) +static void emul_smart_battery_reset_capacity(const struct emul *emul) { - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(SMART_BATTERY_EMUL_CASE) + struct sbat_emul_data *bat_data = emul->data; + bat_data->bat.cap = bat_data->bat.default_cap; + bat_data->bat.full_cap = bat_data->bat.default_full_cap; + bat_data->bat.design_mv = bat_data->bat.default_design_mv; +} - default: - return NULL; - } +#define SBAT_EMUL_RESET_RULE_AFTER(n) \ + emul_smart_battery_reset_capacity(EMUL_DT_GET(DT_DRV_INST(n))) + +static void emul_sbat_reset(const struct ztest_unit_test *test, void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + + DT_INST_FOREACH_STATUS_OKAY(SBAT_EMUL_RESET_RULE_AFTER); +} + +ZTEST_RULE(emul_smart_battery_reset, NULL, emul_sbat_reset); + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_smart_battery_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; } diff --git a/zephyr/emul/emul_sn5s330.c b/zephyr/emul/emul_sn5s330.c index 8f8c3cd852..f957cd9e05 100644 --- a/zephyr/emul/emul_sn5s330.c +++ b/zephyr/emul/emul_sn5s330.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,14 +19,11 @@ #include "emul/emul_common_i2c.h" #include "emul/emul_sn5s330.h" #include "i2c.h" +#include "emul/emul_stub_device.h" #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(sn5s330_emul, CONFIG_SN5S330_EMUL_LOG_LEVEL); -#define SN5S330_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct sn5s330_emul_data, common) - struct sn5s330_emul_data { /** Common I2C data */ struct i2c_common_emul_data common; @@ -110,13 +107,6 @@ test_mockable_static void sn5s330_emul_interrupt_set_stub(void) /* Stub to be used by fff fakes during test */ } -struct i2c_emul *sn5s330_emul_to_i2c_emul(const struct emul *emul) -{ - struct sn5s330_emul_data *data = emul->data; - - return &(data->common.emul); -} - /* Workhorse for mapping i2c reg to internal emulator data access */ static uint8_t *sn5s330_emul_get_reg_ptr(struct sn5s330_emul_data *data, int reg) @@ -194,29 +184,29 @@ void sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, uint8_t *val) *val = *data_reg; } -static void sn5s330_emul_set_int_pin(struct i2c_emul *emul, bool val) +static void sn5s330_emul_set_int_pin(const struct emul *emul, bool val) { - struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + struct sn5s330_emul_data *data = emul->data; int res = gpio_emul_input_set(data->gpio_int_port, data->gpio_int_pin, val); __ASSERT_NO_MSG(res == 0); } -static void sn5s330_emul_assert_interrupt(struct i2c_emul *emul) +static void sn5s330_emul_assert_interrupt(const struct emul *emul) { sn5s330_emul_interrupt_set_stub(); sn5s330_emul_set_int_pin(emul, false); } -static void sn5s330_emul_deassert_interrupt(struct i2c_emul *emul) +static void sn5s330_emul_deassert_interrupt(const struct emul *emul) { sn5s330_emul_set_int_pin(emul, true); } -static int sn5s330_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, - int bytes) +static int sn5s330_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) { - struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + struct sn5s330_emul_data *data = emul->data; uint8_t *reg_to_read = sn5s330_emul_get_reg_ptr(data, reg); __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); @@ -225,10 +215,10 @@ static int sn5s330_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, return 0; } -static int sn5s330_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, - int bytes) +static int sn5s330_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) { - struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + struct sn5s330_emul_data *data = emul->data; uint8_t *reg_to_write; bool deassert_int = false; @@ -278,7 +268,6 @@ static int sn5s330_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, void sn5s330_emul_make_vbus_overcurrent(const struct emul *emul) { struct sn5s330_emul_data *data = emul->data; - struct i2c_emul *i2c_emul = &data->common.emul; data->int_status_reg1 |= SN5S330_ILIM_PP1_MASK; data->int_trip_rise_reg1 |= SN5S330_ILIM_PP1_MASK; @@ -287,13 +276,12 @@ void sn5s330_emul_make_vbus_overcurrent(const struct emul *emul) if (data->int_mask_rise_reg1 & SN5S330_ILIM_PP1_MASK) return; - sn5s330_emul_assert_interrupt(i2c_emul); + sn5s330_emul_assert_interrupt(emul); } void sn5s330_emul_lower_vbus_below_minv(const struct emul *emul) { struct sn5s330_emul_data *data = emul->data; - struct i2c_emul *i2c_emul = &data->common.emul; data->int_status_reg4 |= SN5S330_VSAFE0V_STAT; @@ -301,7 +289,7 @@ void sn5s330_emul_lower_vbus_below_minv(const struct emul *emul) if (data->int_status_reg4 & SN5S330_VSAFE0V_MASK) return; - sn5s330_emul_assert_interrupt(i2c_emul); + sn5s330_emul_assert_interrupt(emul); } void sn5s330_emul_reset(const struct emul *emul) @@ -311,7 +299,7 @@ void sn5s330_emul_reset(const struct emul *emul) const struct device *gpio_int_port = data->gpio_int_port; gpio_pin_t gpio_int_pin = data->gpio_int_pin; - sn5s330_emul_deassert_interrupt(&data->common.emul); + sn5s330_emul_deassert_interrupt(emul); /* * TODO(b/203364783): Some registers reset with set bits; this should be @@ -328,44 +316,44 @@ void sn5s330_emul_reset(const struct emul *emul) static int emul_sn5s330_init(const struct emul *emul, const struct device *parent) { - const struct sn5s330_emul_cfg *cfg = emul->cfg; struct sn5s330_emul_data *data = emul->data; - sn5s330_emul_deassert_interrupt(&data->common.emul); + sn5s330_emul_deassert_interrupt(emul); - data->common.emul.api = &i2c_common_emul_api; - data->common.emul.addr = cfg->common.addr; - data->common.emul.parent = emul; data->common.i2c = parent; - data->common.cfg = &cfg->common; i2c_common_emul_init(&data->common); - return i2c_emul_register(parent, emul->dev_label, &data->common.emul); + return 0; } #define SN5S330_GET_GPIO_INT_PORT(n) \ DEVICE_DT_GET(DT_GPIO_CTLR(DT_INST_PROP(n, int_pin), gpios)) -#define SN5S330_GET_GPIO_INT_PIN(n) \ - DT_GPIO_PIN(DT_INST_PROP(n, int_pin), gpios) +#define SN5S330_GET_GPIO_INT_PIN(n) DT_GPIO_PIN(DT_INST_PROP(n, int_pin), gpios) -#define INIT_SN5S330(n) \ - static struct sn5s330_emul_data sn5s330_emul_data_##n = { \ +#define INIT_SN5S330(n) \ + static struct sn5s330_emul_data sn5s330_emul_data_##n = { \ .common = { \ .write_byte = sn5s330_emul_write_byte, \ .read_byte = sn5s330_emul_read_byte, \ }, \ .gpio_int_port = SN5S330_GET_GPIO_INT_PORT(n), \ .gpio_int_pin = SN5S330_GET_GPIO_INT_PIN(n), \ - }; \ + }; \ static struct sn5s330_emul_cfg sn5s330_emul_cfg_##n = { \ .common = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .addr = DT_INST_REG_ADDR(n), \ }, \ - }; \ - EMUL_DEFINE(emul_sn5s330_init, DT_DRV_INST(n), &sn5s330_emul_cfg_##n, \ - &sn5s330_emul_data_##n) + }; \ + EMUL_DT_INST_DEFINE(n, emul_sn5s330_init, &sn5s330_emul_data_##n, \ + &sn5s330_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(INIT_SN5S330) +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_sn5s330_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/emul_syv682x.c b/zephyr/emul/emul_syv682x.c index 9f5ad865bb..8fb4bfc928 100644 --- a/zephyr/emul/emul_syv682x.c +++ b/zephyr/emul/emul_syv682x.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -16,10 +16,11 @@ LOG_MODULE_REGISTER(syv682x); #include <stdint.h> #include <string.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "emul/emul_common_i2c.h" #include "emul/emul_syv682x.h" +#include "emul/emul_stub_device.h" #define EMUL_REG_COUNT (SYV682X_CONTROL_4_REG + 1) #define EMUL_REG_IS_VALID(reg) (reg >= 0 && reg < EMUL_REG_COUNT) @@ -53,29 +54,18 @@ struct syv682x_emul_cfg { const struct i2c_common_emul_cfg common; }; -/* Gets the SYV682x data struct that contains an I2C emulator struct. */ -static struct syv682x_emul_data * -i2c_emul_to_syv682x_emul_data(const struct i2c_emul *emul) -{ - struct i2c_common_emul_data *i2c_common_data = - CONTAINER_OF(emul, struct i2c_common_emul_data, emul); - struct syv682x_emul_data *syv682x_data = - CONTAINER_OF(i2c_common_data, struct syv682x_emul_data, common); - return syv682x_data; -} - /* Asserts or deasserts the interrupt signal to the EC. */ static void syv682x_emul_set_alert(struct syv682x_emul_data *data, bool alert) { int res = gpio_emul_input_set(data->alert_gpio_port, - /* The signal is inverted. */ - data->alert_gpio_pin, !alert); + /* The signal is inverted. */ + data->alert_gpio_pin, !alert); __ASSERT_NO_MSG(res == 0); } -int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) +int syv682x_emul_set_reg(const struct emul *emul, int reg, uint8_t val) { - struct syv682x_emul_data *data = i2c_emul_to_syv682x_emul_data(emul); + struct syv682x_emul_data *data = emul->data; if (!EMUL_REG_IS_VALID(reg)) return -EIO; @@ -85,13 +75,13 @@ int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) return 0; } -void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, - uint8_t control_4) +void syv682x_emul_set_condition(const struct emul *emul, uint8_t status, + uint8_t control_4) { uint8_t control_4_interrupt = control_4 & SYV682X_CONTROL_4_INT_MASK; - struct syv682x_emul_data *data = i2c_emul_to_syv682x_emul_data(emul); + struct syv682x_emul_data *data = emul->data; int frs_en_gpio = gpio_emul_output_get(data->frs_en_gpio_port, - data->frs_en_gpio_pin); + data->frs_en_gpio_pin); __ASSERT_NO_MSG(frs_en_gpio >= 0); @@ -108,8 +98,8 @@ void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, data->reg[SYV682X_CONTROL_4_REG] |= control_4_interrupt; /* These conditions disable the power path. */ - if (status & (SYV682X_STATUS_TSD | SYV682X_STATUS_OVP | - SYV682X_STATUS_OC_HV)) { + if (status & + (SYV682X_STATUS_TSD | SYV682X_STATUS_OVP | SYV682X_STATUS_OC_HV)) { data->reg[SYV682X_CONTROL_1_REG] |= SYV682X_CONTROL_1_PWR_ENB; } @@ -123,18 +113,17 @@ void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, /* VBAT_OVP disconnects CC and VCONN. */ if (control_4_interrupt & SYV682X_CONTROL_4_VBAT_OVP) { - data->reg[SYV682X_CONTROL_4_REG] &= ~(SYV682X_CONTROL_4_CC1_BPS - | SYV682X_CONTROL_4_CC2_BPS - | SYV682X_CONTROL_4_VCONN1 - | SYV682X_CONTROL_4_VCONN2); + data->reg[SYV682X_CONTROL_4_REG] &= ~( + SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS | + SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2); } syv682x_emul_set_alert(data, status | control_4_interrupt); } -void syv682x_emul_set_busy_reads(struct i2c_emul *emul, int reads) +void syv682x_emul_set_busy_reads(const struct emul *emul, int reads) { - struct syv682x_emul_data *data = i2c_emul_to_syv682x_emul_data(emul); + struct syv682x_emul_data *data = emul->data; data->busy_read_count = reads; if (reads) data->reg[SYV682X_CONTROL_3_REG] |= SYV682X_BUSY; @@ -142,9 +131,9 @@ void syv682x_emul_set_busy_reads(struct i2c_emul *emul, int reads) data->reg[SYV682X_CONTROL_3_REG] &= ~SYV682X_BUSY; } -int syv682x_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val) +int syv682x_emul_get_reg(const struct emul *emul, int reg, uint8_t *val) { - struct syv682x_emul_data *data = i2c_emul_to_syv682x_emul_data(emul); + struct syv682x_emul_data *data = emul->data; if (!EMUL_REG_IS_VALID(reg)) return -EIO; @@ -154,10 +143,10 @@ int syv682x_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val) return 0; } -static int syv682x_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, - int bytes) +static int syv682x_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) { - struct syv682x_emul_data *data = i2c_emul_to_syv682x_emul_data(emul); + struct syv682x_emul_data *data = emul->data; zassert_equal(bytes, 1, "Write: bytes == %i at offset 0x%x", bytes, reg); @@ -183,10 +172,10 @@ static int syv682x_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, return syv682x_emul_set_reg(emul, reg, val); } -static int syv682x_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, - int bytes) +static int syv682x_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) { - struct syv682x_emul_data *data = i2c_emul_to_syv682x_emul_data(emul); + struct syv682x_emul_data *data = emul->data; int ret = syv682x_emul_get_reg(emul, reg, val); zassert_equal(bytes, 0, "Read: bytes == %i at offset 0x%x", bytes, reg); @@ -220,8 +209,10 @@ static int syv682x_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, return ret; } -static void syv682x_emul_reset(struct syv682x_emul_data *data) +static void syv682x_emul_reset(const struct emul *emul) { + struct syv682x_emul_data *data = emul->data; + memset(data->reg, 0, sizeof(data->reg)); syv682x_emul_set_alert(data, false); @@ -244,26 +235,19 @@ static void syv682x_emul_reset(struct syv682x_emul_data *data) * @return 0 on success or an error code on failure */ static int syv682x_emul_init(const struct emul *emul, - const struct device *parent) + const struct device *parent) { - const struct syv682x_emul_cfg *cfg = emul->cfg; struct syv682x_emul_data *data = emul->data; - data->cfg = cfg; - - data->common.emul.api = &i2c_common_emul_api; - data->common.emul.addr = cfg->common.addr; - data->common.emul.parent = emul; data->common.i2c = parent; - data->common.cfg = &cfg->common; i2c_common_emul_init(&data->common); - syv682x_emul_reset(data); - return i2c_emul_register(parent, emul->dev_label, &data->common.emul); + syv682x_emul_reset(emul); + return 0; } /* Device instantiation */ -#define SYV682X_EMUL(n) \ +#define SYV682X_EMUL(n) \ static struct syv682x_emul_data syv682x_emul_data_##n = { \ .common = { \ .write_byte = syv682x_emul_write_byte, \ @@ -277,36 +261,23 @@ static int syv682x_emul_init(const struct emul *emul, DT_INST_PROP(n, alert_gpio), gpios)), \ .alert_gpio_pin = DT_GPIO_PIN( \ DT_INST_PROP(n, alert_gpio), gpios), \ - }; \ + }; \ static const struct syv682x_emul_cfg syv682x_emul_cfg_##n = { \ .common = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .addr = DT_INST_REG_ADDR(n), \ }, \ - }; \ - EMUL_DEFINE(syv682x_emul_init, DT_DRV_INST(n), &syv682x_emul_cfg_##n, \ - &syv682x_emul_data_##n) + }; \ + EMUL_DT_INST_DEFINE(n, syv682x_emul_init, &syv682x_emul_data_##n, \ + &syv682x_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(SYV682X_EMUL) -#define SYV682X_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &syv682x_emul_data_##n.common.emul; - - -struct i2c_emul *syv682x_emul_get(int ord) -{ - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(SYV682X_EMUL_CASE) - - default: - return NULL; - } -} - #ifdef CONFIG_ZTEST_NEW_API + #define SYV682X_EMUL_RESET_RULE_BEFORE(n) \ - syv682x_emul_reset(&syv682x_emul_data_##n); + syv682x_emul_reset(EMUL_DT_GET(DT_DRV_INST(n))); + static void emul_syv682x_reset_before(const struct ztest_unit_test *test, void *data) { @@ -316,3 +287,11 @@ static void emul_syv682x_reset_before(const struct ztest_unit_test *test, } ZTEST_RULE(emul_syv682x_reset, emul_syv682x_reset_before, NULL); #endif /* CONFIG_ZTEST_NEW_API */ + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_syv682x_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/emul_tcs3400.c b/zephyr/emul/emul_tcs3400.c index 15a1bbe9c7..e87deebc35 100644 --- a/zephyr/emul/emul_tcs3400.c +++ b/zephyr/emul/emul_tcs3400.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,17 +13,14 @@ LOG_MODULE_REGISTER(emul_tcs); #include <zephyr/drivers/emul.h> #include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c_emul.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "emul/emul_common_i2c.h" #include "emul/emul_tcs3400.h" +#include "emul/emul_stub_device.h" #include "driver/als_tcs3400.h" -#define TCS_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct tcs_emul_data, common) - /** Run-time data used by the emulator */ struct tcs_emul_data { /** Common I2C data */ @@ -64,7 +61,7 @@ struct tcs_emul_data { }; /** Check description in emul_tcs3400.h */ -void tcs_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) +void tcs_emul_set_reg(const struct emul *emul, int reg, uint8_t val) { struct tcs_emul_data *data; @@ -73,12 +70,12 @@ void tcs_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) } reg -= TCS_EMUL_FIRST_REG; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->reg[reg] = val; } /** Check description in emul_tcs3400.h */ -uint8_t tcs_emul_get_reg(struct i2c_emul *emul, int reg) +uint8_t tcs_emul_get_reg(const struct emul *emul, int reg) { struct tcs_emul_data *data; @@ -86,18 +83,18 @@ uint8_t tcs_emul_get_reg(struct i2c_emul *emul, int reg) return 0; } - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; reg -= TCS_EMUL_FIRST_REG; return data->reg[reg]; } /** Check description in emul_tcs3400.h */ -int tcs_emul_get_val(struct i2c_emul *emul, enum tcs_emul_axis axis) +int tcs_emul_get_val(const struct emul *emul, enum tcs_emul_axis axis) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case TCS_EMUL_R: @@ -116,11 +113,11 @@ int tcs_emul_get_val(struct i2c_emul *emul, enum tcs_emul_axis axis) } /** Check description in emul_tcs3400.h */ -void tcs_emul_set_val(struct i2c_emul *emul, enum tcs_emul_axis axis, int val) +void tcs_emul_set_val(const struct emul *emul, enum tcs_emul_axis axis, int val) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; switch (axis) { case TCS_EMUL_R: @@ -142,59 +139,59 @@ void tcs_emul_set_val(struct i2c_emul *emul, enum tcs_emul_axis axis, int val) } /** Check description in emul_tcs3400.h */ -void tcs_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set) +void tcs_emul_set_err_on_ro_write(const struct emul *emul, bool set) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_ro_write = set; } /** Check description in emul_tcs3400.h */ -void tcs_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set) +void tcs_emul_set_err_on_rsvd_write(const struct emul *emul, bool set) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_rsvd_write = set; } /** Check description in emul_tcs3400.h */ -void tcs_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set) +void tcs_emul_set_err_on_msb_first(const struct emul *emul, bool set) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; data->error_on_msb_first = set; } /** Mask reserved bits in registers of TCS3400 */ static const uint8_t tcs_emul_rsvd_mask[] = { - [TCS_I2C_ENABLE - TCS_EMUL_FIRST_REG] = 0xa4, - [TCS_I2C_ATIME - TCS_EMUL_FIRST_REG] = 0x00, - [0x2] = 0xff, /* Reserved */ - [TCS_I2C_WTIME - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_AILTL - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_AILTH - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_AIHTL - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_AIHTH - TCS_EMUL_FIRST_REG] = 0x00, - [0x8 ... 0xb] = 0xff, /* Reserved */ - [TCS_I2C_PERS - TCS_EMUL_FIRST_REG] = 0xf0, - [TCS_I2C_CONFIG - TCS_EMUL_FIRST_REG] = 0x81, - [0xe] = 0xff, /* Reserved */ - [TCS_I2C_CONTROL - TCS_EMUL_FIRST_REG] = 0xfc, - [TCS_I2C_AUX - TCS_EMUL_FIRST_REG] = 0xdf, - [TCS_I2C_REVID - TCS_EMUL_FIRST_REG] = 0xf0, - [TCS_I2C_ID - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_STATUS - TCS_EMUL_FIRST_REG] = 0x6e, - [TCS_I2C_CDATAL - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_CDATAH - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_RDATAL - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_RDATAH - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_GDATAL - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_GDATAH - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_BDATAL - TCS_EMUL_FIRST_REG] = 0x00, - [TCS_I2C_BDATAH - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_ENABLE - TCS_EMUL_FIRST_REG] = 0xa4, + [TCS_I2C_ATIME - TCS_EMUL_FIRST_REG] = 0x00, + [0x2] = 0xff, /* Reserved */ + [TCS_I2C_WTIME - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_AILTL - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_AILTH - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_AIHTL - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_AIHTH - TCS_EMUL_FIRST_REG] = 0x00, + [0x8 ... 0xb] = 0xff, /* Reserved */ + [TCS_I2C_PERS - TCS_EMUL_FIRST_REG] = 0xf0, + [TCS_I2C_CONFIG - TCS_EMUL_FIRST_REG] = 0x81, + [0xe] = 0xff, /* Reserved */ + [TCS_I2C_CONTROL - TCS_EMUL_FIRST_REG] = 0xfc, + [TCS_I2C_AUX - TCS_EMUL_FIRST_REG] = 0xdf, + [TCS_I2C_REVID - TCS_EMUL_FIRST_REG] = 0xf0, + [TCS_I2C_ID - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_STATUS - TCS_EMUL_FIRST_REG] = 0x6e, + [TCS_I2C_CDATAL - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_CDATAH - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_RDATAL - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_RDATAH - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_GDATAL - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_GDATAH - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_BDATAL - TCS_EMUL_FIRST_REG] = 0x00, + [TCS_I2C_BDATAH - TCS_EMUL_FIRST_REG] = 0x00, }; /** @@ -202,34 +199,34 @@ static const uint8_t tcs_emul_rsvd_mask[] = { * * @param emul Pointer to TCS3400 emulator */ -static void tcs_emul_reset(struct i2c_emul *emul) +static void tcs_emul_reset(const struct emul *emul) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); - - data->reg[TCS_I2C_ENABLE - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_ATIME - TCS_EMUL_FIRST_REG] = 0xff; - data->reg[TCS_I2C_WTIME - TCS_EMUL_FIRST_REG] = 0xff; - data->reg[TCS_I2C_AILTL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_AILTH - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_AIHTL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_AIHTH - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_PERS - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_CONFIG - TCS_EMUL_FIRST_REG] = 0x40; + data = emul->data; + + data->reg[TCS_I2C_ENABLE - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_ATIME - TCS_EMUL_FIRST_REG] = 0xff; + data->reg[TCS_I2C_WTIME - TCS_EMUL_FIRST_REG] = 0xff; + data->reg[TCS_I2C_AILTL - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_AILTH - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_AIHTL - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_AIHTH - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_PERS - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_CONFIG - TCS_EMUL_FIRST_REG] = 0x40; data->reg[TCS_I2C_CONTROL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_AUX - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_REVID - TCS_EMUL_FIRST_REG] = data->revision; - data->reg[TCS_I2C_ID - TCS_EMUL_FIRST_REG] = data->id; - data->reg[TCS_I2C_STATUS - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_CDATAL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_CDATAH - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_RDATAL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_RDATAH - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_GDATAL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_GDATAH - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_BDATAL - TCS_EMUL_FIRST_REG] = 0x00; - data->reg[TCS_I2C_BDATAH - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_AUX - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_REVID - TCS_EMUL_FIRST_REG] = data->revision; + data->reg[TCS_I2C_ID - TCS_EMUL_FIRST_REG] = data->id; + data->reg[TCS_I2C_STATUS - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_CDATAL - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_CDATAH - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_RDATAL - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_RDATAH - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_GDATAL - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_GDATAH - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_BDATAL - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_BDATAH - TCS_EMUL_FIRST_REG] = 0x00; data->ir_select = false; } @@ -274,13 +271,13 @@ static int tcs_emul_get_cycles(uint8_t atime) * * @param emul Pointer to TCS3400 emulator */ -static void tcs_emul_clear_int(struct i2c_emul *emul) +static void tcs_emul_clear_int(const struct emul *emul) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; - data->reg[TCS_I2C_STATUS - TCS_EMUL_FIRST_REG] = 0x00; + data->reg[TCS_I2C_STATUS - TCS_EMUL_FIRST_REG] = 0x00; } /** @@ -296,12 +293,12 @@ static void tcs_emul_clear_int(struct i2c_emul *emul) * @return 0 on success * @return -EIO on error */ -static int tcs_emul_handle_write(struct i2c_emul *emul, int reg, int bytes) +static int tcs_emul_handle_write(const struct emul *emul, int reg, int bytes) { struct tcs_emul_data *data; uint8_t val; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; /* This write only selected register for I2C read message */ if (bytes < 2) { @@ -388,7 +385,7 @@ static int tcs_emul_handle_write(struct i2c_emul *emul, int reg, int bytes) * @return 0 on success * @return -EIO when accessing MSB before LSB */ -static int tcs_emul_get_reg_val(struct i2c_emul *emul, int reg, +static int tcs_emul_get_reg_val(const struct emul *emul, int reg, bool *lsb_read, bool lsb, unsigned int val) { struct tcs_emul_data *data; @@ -398,7 +395,7 @@ static int tcs_emul_get_reg_val(struct i2c_emul *emul, int reg, int cycles; int gain; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (lsb) { *lsb_read = 1; @@ -418,10 +415,10 @@ static int tcs_emul_get_reg_val(struct i2c_emul *emul, int reg, lsb_reg = (reg - TCS_EMUL_FIRST_REG) & ~(0x1); msb_reg = (reg - TCS_EMUL_FIRST_REG) | 0x1; - gain = tcs_emul_get_gain(data->reg[TCS_I2C_CONTROL - - TCS_EMUL_FIRST_REG]); - cycles = tcs_emul_get_cycles(data->reg[TCS_I2C_ATIME - - TCS_EMUL_FIRST_REG]); + gain = tcs_emul_get_gain( + data->reg[TCS_I2C_CONTROL - TCS_EMUL_FIRST_REG]); + cycles = tcs_emul_get_cycles( + data->reg[TCS_I2C_ATIME - TCS_EMUL_FIRST_REG]); /* * Internal value is with 256 cycles and x64 gain, so divide it to get * registers value @@ -452,14 +449,14 @@ static int tcs_emul_get_reg_val(struct i2c_emul *emul, int reg, * @return 0 on success * @return -EIO on error */ -static int tcs_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, +static int tcs_emul_handle_read(const struct emul *emul, int reg, uint8_t *buf, int bytes) { struct tcs_emul_data *data; unsigned int c_ir; int ret; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; reg += bytes; @@ -487,12 +484,12 @@ static int tcs_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, break; case TCS_I2C_RDATAL: /* Shouldn't fail for LSB */ - ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_r_read, - true, data->red); + ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_r_read, true, + data->red); break; case TCS_I2C_RDATAH: - ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_r_read, - false, data->red); + ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_r_read, false, + data->red); if (ret) { LOG_ERR("MSB R read before LSB R"); return -EIO; @@ -500,12 +497,12 @@ static int tcs_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, break; case TCS_I2C_GDATAL: /* Shouldn't fail for LSB */ - ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_g_read, - true, data->green); + ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_g_read, true, + data->green); break; case TCS_I2C_GDATAH: - ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_g_read, - false, data->green); + ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_g_read, false, + data->green); if (ret) { LOG_ERR("MSB G read before LSB G"); return -EIO; @@ -513,12 +510,12 @@ static int tcs_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, break; case TCS_I2C_BDATAL: /* Shouldn't fail for LSB */ - ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_b_read, - true, data->blue); + ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_b_read, true, + data->blue); break; case TCS_I2C_BDATAH: - ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_b_read, - false, data->blue); + ret = tcs_emul_get_reg_val(emul, reg, &data->lsb_b_read, false, + data->blue); if (ret) { LOG_ERR("MSB B read before LSB B"); return -EIO; @@ -547,12 +544,12 @@ static int tcs_emul_handle_read(struct i2c_emul *emul, int reg, uint8_t *buf, * @return 0 on success * @return -EIO on error */ -static int tcs_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, +static int tcs_emul_write_byte(const struct emul *emul, int reg, uint8_t val, int bytes) { struct tcs_emul_data *data; - data = TCS_DATA_FROM_I2C_EMUL(emul); + data = emul->data; if (bytes > 1) { LOG_ERR("Too long write command"); @@ -577,27 +574,20 @@ static int tcs_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, * * @return 0 indicating success (always) */ -static int tcs_emul_init(const struct emul *emul, - const struct device *parent) +static int tcs_emul_init(const struct emul *emul, const struct device *parent) { - const struct i2c_common_emul_cfg *cfg = emul->cfg; - struct i2c_common_emul_data *data = cfg->data; - int ret; + struct tcs_emul_data *data = emul->data; - data->emul.api = &i2c_common_emul_api; - data->emul.addr = cfg->addr; - data->i2c = parent; - data->cfg = cfg; - i2c_common_emul_init(data); + data->common.i2c = parent; - ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + i2c_common_emul_init(&data->common); - tcs_emul_reset(&data->emul); + tcs_emul_reset(emul); - return ret; + return 0; } -#define TCS3400_EMUL(n) \ +#define TCS3400_EMUL(n) \ static struct tcs_emul_data tcs_emul_data_##n = { \ .revision = DT_INST_PROP(n, revision), \ .id = DT_STRING_TOKEN(DT_DRV_INST(n), device_id), \ @@ -619,36 +609,22 @@ static int tcs_emul_init(const struct emul *emul, .finish_read = NULL, \ .access_reg = NULL, \ }, \ - }; \ - \ - static const struct i2c_common_emul_cfg tcs_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .data = &tcs_emul_data_##n.common, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(tcs_emul_init, DT_DRV_INST(n), &tcs_emul_cfg_##n, \ - &tcs_emul_data_##n) + }; \ + \ + static const struct i2c_common_emul_cfg tcs_emul_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &tcs_emul_data_##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DT_INST_DEFINE(n, tcs_emul_init, &tcs_emul_data_##n, \ + &tcs_emul_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(TCS3400_EMUL) -#define TCS3400_EMUL_CASE(n) \ - case DT_INST_DEP_ORD(n): return &tcs_emul_data_##n.common.emul; - -/** Check description in emul_tcs3400.h */ -struct i2c_emul *tcs_emul_get(int ord) -{ - switch (ord) { - DT_INST_FOREACH_STATUS_OKAY(TCS3400_EMUL_CASE) - - default: - return NULL; - } -} - #ifdef CONFIG_ZTEST_NEW_API #define TCS3400_EMUL_RESET_RULE_BEFORE(n) \ - tcs_emul_reset(&(tcs_emul_data_##n.common.emul)); + tcs_emul_reset(EMUL_DT_GET(DT_DRV_INST(n))); + static void emul_tcs3400_reset_rule_before(const struct ztest_unit_test *test, void *data) { @@ -658,3 +634,11 @@ static void emul_tcs3400_reset_rule_before(const struct ztest_unit_test *test, } ZTEST_RULE(emul_tcs3400_reset, emul_tcs3400_reset_rule_before, NULL); #endif /* CONFIG_ZTEST_NEW_API */ + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_tcs3400_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/i2c_mock.c b/zephyr/emul/i2c_mock.c index e7750d5b72..8601c87ee7 100644 --- a/zephyr/emul/i2c_mock.c +++ b/zephyr/emul/i2c_mock.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,9 +6,11 @@ #define DT_DRV_COMPAT cros_i2c_mock #include <zephyr/device.h> +#include <zephyr/logging/log.h> + #include "emul/emul_common_i2c.h" +#include "emul/emul_stub_device.h" -#include <zephyr/logging/log.h> LOG_MODULE_REGISTER(i2c_mock, CONFIG_I2C_MOCK_LOG_LEVEL); struct i2c_emul *i2c_mock_to_i2c_emul(const struct emul *emul) @@ -20,14 +22,12 @@ struct i2c_emul *i2c_mock_to_i2c_emul(const struct emul *emul) void i2c_mock_reset(const struct emul *emul) { - struct i2c_emul *i2c_emul = i2c_mock_to_i2c_emul(emul); - - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(emul->data, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(emul->data, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(emul->data, NULL, NULL); + i2c_common_emul_set_write_func(emul->data, NULL, NULL); } uint16_t i2c_mock_get_addr(const struct emul *emul) @@ -41,30 +41,36 @@ static const struct i2c_emul_api i2c_mock_api = { .transfer = i2c_common_emul_transfer, }; -static int i2c_mock_init(const struct emul *emul, - const struct device *parent) +static int i2c_mock_init(const struct emul *emul, const struct device *parent) { const struct i2c_common_emul_cfg *cfg = emul->cfg; struct i2c_common_emul_data *data = emul->data; data->emul.api = &i2c_mock_api; data->emul.addr = cfg->addr; - data->emul.parent = emul; + data->emul.target = emul; data->i2c = parent; data->cfg = cfg; i2c_common_emul_init(data); - return i2c_emul_register(parent, emul->dev_label, &data->emul); + return 0; } -#define INIT_I2C_MOCK(n) \ - static const struct i2c_common_emul_cfg i2c_mock_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - static struct i2c_common_emul_data i2c_mock_data_##n; \ - EMUL_DEFINE(i2c_mock_init, DT_DRV_INST(n), &i2c_mock_cfg_##n, \ - &i2c_mock_data_##n) +#define INIT_I2C_MOCK(n) \ + static const struct i2c_common_emul_cfg i2c_mock_cfg_##n = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + static struct i2c_common_emul_data i2c_mock_data_##n; \ + EMUL_DT_INST_DEFINE(n, i2c_mock_init, &i2c_mock_data_##n, \ + &i2c_mock_cfg_##n, &i2c_common_emul_api) DT_INST_FOREACH_STATUS_OKAY(INIT_I2C_MOCK) + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_i2c_mock_get_i2c_common_data(const struct emul *emul) +{ + return emul->data; +} diff --git a/zephyr/emul/include/flash_chip.h b/zephyr/emul/include/flash_chip.h index 0060935b98..947246867b 100644 --- a/zephyr/emul/include/flash_chip.h +++ b/zephyr/emul/include/flash_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,11 +6,11 @@ #ifndef __EMUL_INCLUDE_FLASH_CHIP_H #define __EMUL_INCLUDE_FLASH_CHIP_H -#define CONFIG_RO_STORAGE_OFF 0x0 -#define CONFIG_RW_STORAGE_OFF 0x0 -#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ -#define CONFIG_FLASH_ERASE_SIZE 0x10000 -#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE +#define CONFIG_RO_STORAGE_OFF 0x0 +#define CONFIG_RW_STORAGE_OFF 0x0 +#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ +#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ +#define CONFIG_FLASH_ERASE_SIZE 0x10000 +#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE #endif /* __EMUL_INCLUDE_FLASH_CHIP_H */ diff --git a/zephyr/emul/include/pwm_mock.h b/zephyr/emul/include/pwm_mock.h new file mode 100644 index 0000000000..7f5eb9eb89 --- /dev/null +++ b/zephyr/emul/include/pwm_mock.h @@ -0,0 +1,33 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __EMUL_INCLUDE_PWM_MOCK_H +#define __EMUL_INCLUDE_PWM_MOCK_H + +#include <zephyr/device.h> +#include <zephyr/drivers/pwm.h> + +/* + * Get pwm duty cycle + * + * @param dev pointer to hte pwm device + * @param channel channel id + * + * @return duty duty cycle in range [0, 100] or negative on error. + */ +int pwm_mock_get_duty(const struct device *dev, uint32_t channel); + +/** + * @brief Get the flags the PWM driver was set with. See the following header + * in upstream Zephyr for possible values: + * `include/zephyr/dt-bindings/pwm/pwm.h` + * + * @param dev Pointer to PWM device + * @param channel Unused + * @return pwm_flags_t PWM flags + */ +pwm_flags_t pwm_mock_get_flags(const struct device *dev, uint32_t channel); + +#endif /*__EMUL_INCLUDE_PWM_MOCK_H */ diff --git a/zephyr/emul/pwm_mock.c b/zephyr/emul/pwm_mock.c new file mode 100644 index 0000000000..0d32155d8f --- /dev/null +++ b/zephyr/emul/pwm_mock.c @@ -0,0 +1,80 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT cros_pwm_mock + +#include <zephyr/device.h> +#include <zephyr/devicetree.h> +#include <zephyr/kernel.h> +#include <zephyr/drivers/pwm.h> + +#include "pwm_mock.h" + +#define CYCLES_PER_SEC 1000000 + +struct pwm_mock_data { + uint32_t period_cycles; + uint32_t pulse_cycles; + pwm_flags_t pwm_flags; +}; + +static int pwm_mock_init(const struct device *dev) +{ + return 0; +} + +static int pwm_mock_set_cycles(const struct device *dev, uint32_t channel, + uint32_t period_cycles, uint32_t pulse_cycles, + pwm_flags_t flags) +{ + struct pwm_mock_data *const data = dev->data; + + data->period_cycles = period_cycles; + data->pulse_cycles = pulse_cycles; + data->pwm_flags = flags; + + return 0; +} + +static int pwm_mock_get_cycles_per_sec(const struct device *dev, + uint32_t channel, uint64_t *cycles) +{ + *cycles = CYCLES_PER_SEC; + + return 0; +} + +int pwm_mock_get_duty(const struct device *dev, uint32_t channel) +{ + struct pwm_mock_data *const data = dev->data; + + if (data->period_cycles == 0) { + return -EINVAL; + } + + return data->pulse_cycles * 100 / data->period_cycles; +} + +pwm_flags_t pwm_mock_get_flags(const struct device *dev, uint32_t channel) +{ + ARG_UNUSED(channel); + + struct pwm_mock_data *const data = dev->data; + + return data->pwm_flags; +} + +static const struct pwm_driver_api pwm_mock_api = { + .set_cycles = pwm_mock_set_cycles, + .get_cycles_per_sec = pwm_mock_get_cycles_per_sec, +}; + +#define INIT_PWM_MOCK(inst) \ + static struct pwm_mock_data pwm_mock_data##inst; \ + DEVICE_DT_INST_DEFINE(inst, &pwm_mock_init, NULL, \ + &pwm_mock_data##inst, NULL, PRE_KERNEL_1, \ + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &pwm_mock_api); +DT_INST_FOREACH_STATUS_OKAY(INIT_PWM_MOCK) diff --git a/zephyr/emul/tcpc/CMakeLists.txt b/zephyr/emul/tcpc/CMakeLists.txt index c6200bbfc3..b43d73ead3 100644 --- a/zephyr/emul/tcpc/CMakeLists.txt +++ b/zephyr/emul/tcpc/CMakeLists.txt @@ -1,11 +1,12 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. zephyr_library_sources_ifdef(CONFIG_EMUL_PS8XXX emul_ps8xxx.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI emul_tcpci.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI emul_tcpci_generic.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_COMMON emul_tcpci_partner_common.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_DRP emul_tcpci_partner_drp.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_SNK emul_tcpci_partner_snk.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_SRC emul_tcpci_partner_src.c) -zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_FAULTY_SNK emul_tcpci_partner_faulty_snk.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI_PARTNER_FAULTY_EXT emul_tcpci_partner_faulty_ext.c) diff --git a/zephyr/emul/tcpc/Kconfig b/zephyr/emul/tcpc/Kconfig index 127b12e00f..6866e7bab5 100644 --- a/zephyr/emul/tcpc/Kconfig +++ b/zephyr/emul/tcpc/Kconfig @@ -1,12 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -DT_COMPAT_TCPCI_EMUL := cros,tcpci-emul - menuconfig EMUL_TCPCI - bool "TCPCI emulator" - default $(dt_compat_enabled,$(DT_COMPAT_TCPCI_EMUL)) + bool "TCPCI common functionality" depends on I2C_EMUL help Enable the TCPCI emulator. This driver uses the emulated I2C bus. @@ -63,13 +60,13 @@ config EMUL_TCPCI_PARTNER_DRP emulator. API of dual role device emulator is available in zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h -config EMUL_TCPCI_PARTNER_FAULTY_SNK - bool "USB-C malfunctioning sink device emulator" +config EMUL_TCPCI_PARTNER_FAULTY_EXT + bool "USB-C malfunctioning device emulator" select EMUL_TCPCI_PARTNER_COMMON select EMUL_TCPCI_PARTNER_SNK help - Enable USB-C malfunctioning sink device emulator which may be attached - to TCPCI emulator. API of malfunctioning sink device emulator is - available in zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h + Enable USB-C malfunctioning device emulator which may be attached + to TCPCI emulator. API of malfunctioning device emulator is + available in zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h endif # EMUL_TCPCI diff --git a/zephyr/emul/tcpc/emul_ps8xxx.c b/zephyr/emul/tcpc/emul_ps8xxx.c index 2fc372c9a7..467a487802 100644 --- a/zephyr/emul/tcpc/emul_ps8xxx.c +++ b/zephyr/emul/tcpc/emul_ps8xxx.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,16 +12,18 @@ LOG_MODULE_REGISTER(ps8xxx_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <zephyr/drivers/emul.h> #include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c_emul.h> +#include <zephyr/ztest.h> #include "tcpm/tcpci.h" #include "emul/emul_common_i2c.h" #include "emul/tcpc/emul_ps8xxx.h" #include "emul/tcpc/emul_tcpci.h" +#include "emul/emul_stub_device.h" #include "driver/tcpm/ps8xxx.h" -#define PS8XXX_REG_MUX_IN_HPD_ASSERTION MUX_IN_HPD_ASSERTION_REG +#define PS8XXX_REG_MUX_IN_HPD_ASSERTION MUX_IN_HPD_ASSERTION_REG /** Run-time data used by the emulator */ struct ps8xxx_emul_data { @@ -32,8 +34,6 @@ struct ps8xxx_emul_data { /** Product ID of emulated device */ int prod_id; - /** Pointer to TCPCI emulator that is base for this emulator */ - const struct emul *tcpci_emul; /** Chip revision used by PS8805 */ uint8_t chip_rev; @@ -47,9 +47,6 @@ struct ps8xxx_emul_data { /** Constant configuration of the emulator */ struct ps8xxx_emul_cfg { - /** Phandle (name) of TCPCI emulator that is base for this emulator */ - const char *tcpci_emul; - /** Common I2C configuration used by "hidden" ports */ const struct i2c_common_emul_cfg p0_cfg; const struct i2c_common_emul_cfg p1_cfg; @@ -59,7 +56,8 @@ struct ps8xxx_emul_cfg { /** Check description in emul_ps8xxx.h */ void ps8xxx_emul_set_chip_rev(const struct emul *emul, uint8_t chip_rev) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; data->chip_rev = chip_rev; } @@ -67,7 +65,8 @@ void ps8xxx_emul_set_chip_rev(const struct emul *emul, uint8_t chip_rev) /** Check description in emul_ps8xxx.h */ void ps8xxx_emul_set_hw_rev(const struct emul *emul, uint16_t hw_rev) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; data->hw_rev = hw_rev; } @@ -75,7 +74,8 @@ void ps8xxx_emul_set_hw_rev(const struct emul *emul, uint16_t hw_rev) /** Check description in emul_ps8xxx.h */ void ps8xxx_emul_set_gpio_ctrl(const struct emul *emul, uint8_t gpio_ctrl) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; data->gpio_ctrl = gpio_ctrl; } @@ -83,7 +83,8 @@ void ps8xxx_emul_set_gpio_ctrl(const struct emul *emul, uint8_t gpio_ctrl) /** Check description in emul_ps8xxx.h */ uint8_t ps8xxx_emul_get_gpio_ctrl(const struct emul *emul) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; return data->gpio_ctrl; } @@ -91,7 +92,8 @@ uint8_t ps8xxx_emul_get_gpio_ctrl(const struct emul *emul) /** Check description in emul_ps8xxx.h */ uint8_t ps8xxx_emul_get_dci_cfg(const struct emul *emul) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; return data->dci_cfg; } @@ -99,7 +101,8 @@ uint8_t ps8xxx_emul_get_dci_cfg(const struct emul *emul) /** Check description in emul_ps8xxx.h */ int ps8xxx_emul_set_product_id(const struct emul *emul, uint16_t product_id) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; if (product_id != PS8805_PRODUCT_ID && product_id != PS8815_PRODUCT_ID) { @@ -108,7 +111,7 @@ int ps8xxx_emul_set_product_id(const struct emul *emul, uint16_t product_id) } data->prod_id = product_id; - tcpci_emul_set_reg(data->tcpci_emul, TCPC_REG_PRODUCT_ID, product_id); + tcpci_emul_set_reg(emul, TCPC_REG_PRODUCT_ID, product_id); return 0; } @@ -116,33 +119,29 @@ int ps8xxx_emul_set_product_id(const struct emul *emul, uint16_t product_id) /** Check description in emul_ps8xxx.h */ uint16_t ps8xxx_emul_get_product_id(const struct emul *emul) { - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; return data->prod_id; } -const struct emul *ps8xxx_emul_get_tcpci(const struct emul *emul) -{ - struct ps8xxx_emul_data *data = emul->data; - - return data->tcpci_emul; -} - /** Check description in emul_ps8xxx.h */ -struct i2c_emul *ps8xxx_emul_get_i2c_emul(const struct emul *emul, - enum ps8xxx_emul_port port) +struct i2c_common_emul_data * +ps8xxx_emul_get_i2c_common_data(const struct emul *emul, + enum ps8xxx_emul_port port) { const struct ps8xxx_emul_cfg *cfg = emul->cfg; - struct ps8xxx_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; switch (port) { case PS8XXX_EMUL_PORT_0: - return &data->p0_data.emul; + return &data->p0_data; case PS8XXX_EMUL_PORT_1: - return &data->p1_data.emul; + return &data->p1_data; case PS8XXX_EMUL_PORT_GPIO: if (cfg->gpio_cfg.addr != 0) { - return &data->gpio_data.emul; + return &data->gpio_data; } else { return NULL; } @@ -152,24 +151,23 @@ struct i2c_emul *ps8xxx_emul_get_i2c_emul(const struct emul *emul, } /** - * @brief Function called for each byte of read message + * @brief Function called for each byte of read message from TCPC chip * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure + * @param i2c_emul Pointer to PS8xxx emulator * @param reg First byte of last write message * @param val Pointer where byte to read should be stored - * @param bytes Number of bytes already readded + * @param bytes Number of bytes already read * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error + * @return 0 on success + * @return -EIO on invalid read request */ -static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_read_byte( - const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, uint8_t *val, int bytes) +static int ps8xxx_emul_tcpc_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) { uint16_t reg_val; + const struct i2c_emul *i2c_emul = emul->bus.i2c; + + LOG_DBG("PS8XXX TCPC 0x%x: read reg 0x%x", i2c_emul->addr, reg); switch (reg) { case PS8XXX_REG_FW_REV: @@ -182,36 +180,37 @@ static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_read_byte( if (bytes != 0) { LOG_ERR("Reading byte %d from 1 byte register 0x%x", bytes, reg); - return TCPCI_EMUL_ERROR; + return -EIO; } tcpci_emul_get_reg(emul, reg, ®_val); *val = reg_val & 0xff; - return TCPCI_EMUL_DONE; + return 0; default: - return TCPCI_EMUL_CONTINUE; + break; } + + return tcpci_emul_read_byte(emul, reg, val, bytes); } /** - * @brief Function called for each byte of write message + * @brief Function called for each byte of write message to TCPC chip * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure + * @param emul Pointer to PS8xxx emulator * @param reg First byte of write message * @param val Received byte of write message * @param bytes Number of bytes already received * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error + * @return 0 on success + * @return -EIO on invalid write request */ -static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_write_byte( - const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, uint8_t val, int bytes) +static int ps8xxx_emul_tcpc_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) { uint16_t prod_id; + struct i2c_emul *i2c_emul = emul->bus.i2c; + + LOG_DBG("PS8XXX TCPC 0x%x: write reg 0x%x", i2c_emul->addr, reg); tcpci_emul_get_reg(emul, TCPC_REG_PRODUCT_ID, &prod_id); @@ -219,7 +218,7 @@ static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_write_byte( case PS8XXX_REG_RP_DETECT_CONTROL: /* This register is present only on PS8815 */ if (prod_id != PS8815_PRODUCT_ID) { - return TCPCI_EMUL_CONTINUE; + break; } case PS8XXX_REG_I2C_DEBUGGING_ENABLE: case PS8XXX_REG_MUX_IN_HPD_ASSERTION: @@ -230,34 +229,35 @@ static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_write_byte( if (bytes != 1) { LOG_ERR("Writing byte %d to 1 byte register 0x%x", bytes, reg); - return TCPCI_EMUL_ERROR; + return -EIO; } tcpci_emul_set_reg(emul, reg, val); - return TCPCI_EMUL_DONE; + return 0; default: - return TCPCI_EMUL_CONTINUE; + break; } + + return tcpci_emul_write_byte(emul, reg, val, bytes); } /** - * @brief Function called on the end of write message + * @brief Function called on the end of write message to TCPC chip * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure + * @param emul Pointer to PS8xxx emulator * @param reg Register which is written * @param msg_len Length of handled I2C message * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error + * @return 0 on success + * @return -EIO on error */ -static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_handle_write( - const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, int msg_len) +static int ps8xxx_emul_tcpc_finish_write(const struct emul *emul, int reg, + int msg_len) { uint16_t prod_id; + struct i2c_emul *i2c_emul = emul->bus.i2c; + + LOG_DBG("PS8XXX TCPC 0x%x: finish write reg 0x%x", i2c_emul->addr, reg); tcpci_emul_get_reg(emul, TCPC_REG_PRODUCT_ID, &prod_id); @@ -265,7 +265,7 @@ static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_handle_write( case PS8XXX_REG_RP_DETECT_CONTROL: /* This register is present only on PS8815 */ if (prod_id != PS8815_PRODUCT_ID) { - return TCPCI_EMUL_CONTINUE; + break; } case PS8XXX_REG_I2C_DEBUGGING_ENABLE: case PS8XXX_REG_MUX_IN_HPD_ASSERTION: @@ -273,99 +273,80 @@ static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_handle_write( case PS8XXX_REG_BIST_CONT_MODE_BYTE1: case PS8XXX_REG_BIST_CONT_MODE_BYTE2: case PS8XXX_REG_BIST_CONT_MODE_CTR: - return TCPCI_EMUL_DONE; + return 0; default: - return TCPCI_EMUL_CONTINUE; + break; } + + return tcpci_emul_handle_write(emul, reg, msg_len); } /** - * @brief Function called on reset + * @brief Get currently accessed register, which always equals to selected + * register from TCPC chip. * * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure + * @param reg First byte of last write message + * @param bytes Number of bytes already handled from current message + * @param read If currently handled is read message + * + * @return Currently accessed register */ -static void ps8xxx_emul_tcpci_reset(const struct emul *emul, - struct tcpci_emul_dev_ops *ops) +static int ps8xxx_emul_tcpc_access_reg(const struct emul *emul, int reg, + int bytes, bool read) { - tcpci_emul_set_reg(emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, 0x31); - tcpci_emul_set_reg(emul, PS8XXX_REG_MUX_IN_HPD_ASSERTION, 0x00); - tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE0, 0xff); - tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE1, 0x0f); - tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE2, 0x00); - tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_CTR, 0x00); + return reg; } -/** TCPCI PS8xxx operations */ -static struct tcpci_emul_dev_ops ps8xxx_emul_ops = { - .read_byte = ps8xxx_emul_tcpci_read_byte, - .write_byte = ps8xxx_emul_tcpci_write_byte, - .handle_write = ps8xxx_emul_tcpci_handle_write, - .reset = ps8xxx_emul_tcpci_reset, -}; - /** - * @brief Get port associated with given "hidden" I2C device - * - * @param i2c_emul Pointer to "hidden" I2C device + * @brief Function called on reset * - * @return Port associated with given I2C device + * @param emul Pointer to PS8xxx emulator */ -static enum ps8xxx_emul_port ps8xxx_emul_get_port(struct i2c_emul *i2c_emul) +static int ps8xxx_emul_tcpc_reset(const struct emul *emul) { - const struct ps8xxx_emul_cfg *cfg; - const struct emul *emul; - - emul = i2c_emul->parent; - cfg = emul->cfg; - - if (cfg->p0_cfg.addr == i2c_emul->addr) { - return PS8XXX_EMUL_PORT_0; - } - - if (cfg->p1_cfg.addr == i2c_emul->addr) { - return PS8XXX_EMUL_PORT_1; - } - - if (cfg->gpio_cfg.addr != 0 && cfg->gpio_cfg.addr == i2c_emul->addr) { - return PS8XXX_EMUL_PORT_GPIO; - } + tcpci_emul_set_reg(emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, 0x31); + tcpci_emul_set_reg(emul, PS8XXX_REG_MUX_IN_HPD_ASSERTION, 0x00); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE0, 0xff); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE1, 0x0f); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE2, 0x00); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_CTR, 0x00); - return PS8XXX_EMUL_PORT_INVAL; + return tcpci_emul_reset(emul); } /** * @brief Function called for each byte of read message * - * @param i2c_emul Pointer to PS8xxx emulator + * @param emul Pointer to PS8xxx emulator * @param reg First byte of last write message * @param val Pointer where byte to read should be stored - * @param bytes Number of bytes already readded + * @param bytes Number of bytes already read * * @return 0 on success * @return -EIO on invalid read request */ -static int ps8xxx_emul_read_byte(struct i2c_emul *i2c_emul, int reg, - uint8_t *val, int bytes) +static int ps8xxx_emul_read_byte_workhorse(const struct emul *emul, int reg, + uint8_t *val, int bytes, + enum ps8xxx_emul_port port) { + struct tcpc_emul_data *tcpc_data; struct ps8xxx_emul_data *data; - enum ps8xxx_emul_port port; - const struct emul *emul; + struct i2c_emul *i2c_emul = emul->bus.i2c; uint16_t i2c_dbg_reg; - emul = i2c_emul->parent; - data = emul->data; + LOG_DBG("PS8XXX 0x%x: read reg 0x%x", i2c_emul->addr, reg); + + tcpc_data = emul->data; + data = tcpc_data->chip_data; - tcpci_emul_get_reg(data->tcpci_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, - &i2c_dbg_reg); + tcpci_emul_get_reg(emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, &i2c_dbg_reg); /* There is no need to enable I2C debug on PS8815 */ if (data->prod_id != PS8815_PRODUCT_ID && i2c_dbg_reg & 0x1) { LOG_ERR("Accessing hidden i2c address without enabling debug"); return -EIO; } - port = ps8xxx_emul_get_port(i2c_emul); - /* This is only 2 bytes register so handle it separately */ if (data->prod_id == PS8815_PRODUCT_ID && port == PS8XXX_EMUL_PORT_1 && reg == PS8815_P1_REG_HW_REVISION) { @@ -412,10 +393,31 @@ static int ps8xxx_emul_read_byte(struct i2c_emul *i2c_emul, int reg, return -EIO; } +static int ps8xxx_emul_p0_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) +{ + return ps8xxx_emul_read_byte_workhorse(emul, reg, val, bytes, + PS8XXX_EMUL_PORT_0); +} + +static int ps8xxx_emul_p1_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) +{ + return ps8xxx_emul_read_byte_workhorse(emul, reg, val, bytes, + PS8XXX_EMUL_PORT_1); +} + +static int ps8xxx_emul_gpio_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) +{ + return ps8xxx_emul_read_byte_workhorse(emul, reg, val, bytes, + PS8XXX_EMUL_PORT_GPIO); +} + /** * @brief Function called for each byte of write message * - * @param i2c_emul Pointer to PS8xxx emulator + * @param emul Pointer to PS8xxx emulator * @param reg First byte of write message * @param val Received byte of write message * @param bytes Number of bytes already received @@ -423,27 +425,27 @@ static int ps8xxx_emul_read_byte(struct i2c_emul *i2c_emul, int reg, * @return 0 on success * @return -EIO on invalid write request */ -static int ps8xxx_emul_write_byte(struct i2c_emul *i2c_emul, int reg, - uint8_t val, int bytes) +static int ps8xxx_emul_write_byte_workhorse(const struct emul *emul, int reg, + uint8_t val, int bytes, + enum ps8xxx_emul_port port) { struct ps8xxx_emul_data *data; - enum ps8xxx_emul_port port; - const struct emul *emul; + struct tcpc_emul_data *tcpc_data; + const struct i2c_emul *i2c_emul = emul->bus.i2c; uint16_t i2c_dbg_reg; - emul = i2c_emul->parent; - data = emul->data; + LOG_DBG("PS8XXX 0x%x: write reg 0x%x", i2c_emul->addr, reg); + + tcpc_data = emul->data; + data = tcpc_data->chip_data; - tcpci_emul_get_reg(data->tcpci_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, - &i2c_dbg_reg); + tcpci_emul_get_reg(emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, &i2c_dbg_reg); /* There is no need to enable I2C debug on PS8815 */ if (data->prod_id != PS8815_PRODUCT_ID && i2c_dbg_reg & 0x1) { LOG_ERR("Accessing hidden i2c address without enabling debug"); return -EIO; } - port = ps8xxx_emul_get_port(i2c_emul); - if (bytes != 1) { LOG_ERR("Writing more than one byte at once"); return -EIO; @@ -473,6 +475,77 @@ static int ps8xxx_emul_write_byte(struct i2c_emul *i2c_emul, int reg, return -EIO; } +static int ps8xxx_emul_p0_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + return ps8xxx_emul_write_byte_workhorse(emul, reg, val, bytes, + PS8XXX_EMUL_PORT_0); +} + +static int ps8xxx_emul_p1_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + return ps8xxx_emul_write_byte_workhorse(emul, reg, val, bytes, + PS8XXX_EMUL_PORT_1); +} + +static int ps8xxx_emul_gpio_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + return ps8xxx_emul_write_byte_workhorse(emul, reg, val, bytes, + PS8XXX_EMUL_PORT_GPIO); +} + +static int i2c_ps8xxx_emul_transfer(const struct emul *target, + struct i2c_msg *msgs, int num_msgs, + int addr) +{ + struct tcpc_emul_data *tcpc_data = target->data; + struct ps8xxx_emul_data *ps8_xxx_data = tcpc_data->chip_data; + const struct ps8xxx_emul_cfg *ps8_xxx_cfg = target->cfg; + struct i2c_common_emul_data *common_data; + + /* The chip itself */ + if (addr == tcpc_data->i2c_cfg.addr) { + const struct i2c_common_emul_cfg *common_cfg = + &tcpc_data->i2c_cfg; + common_data = &tcpc_data->tcpci_ctx->common; + + return i2c_common_emul_transfer_workhorse( + target, common_data, common_cfg, msgs, num_msgs, addr); + } + /* Subchips */ + else if (addr == ps8_xxx_cfg->gpio_cfg.addr) { + const struct i2c_common_emul_cfg *common_cfg = + &ps8_xxx_cfg->gpio_cfg; + common_data = &ps8_xxx_data->gpio_data; + + return i2c_common_emul_transfer_workhorse( + target, common_data, common_cfg, msgs, num_msgs, addr); + } else if (addr == ps8_xxx_cfg->p0_cfg.addr) { + const struct i2c_common_emul_cfg *common_cfg = + &ps8_xxx_cfg->p0_cfg; + common_data = &ps8_xxx_data->p0_data; + + return i2c_common_emul_transfer_workhorse( + target, common_data, common_cfg, msgs, num_msgs, addr); + } else if (addr == ps8_xxx_cfg->p1_cfg.addr) { + const struct i2c_common_emul_cfg *common_cfg = + &ps8_xxx_cfg->p1_cfg; + common_data = &ps8_xxx_data->p1_data; + + return i2c_common_emul_transfer_workhorse( + target, common_data, common_cfg, msgs, num_msgs, addr); + } + + LOG_ERR("Cannot map address %02x", addr); + return -EIO; +} + +struct i2c_emul_api i2c_ps8xxx_emul_api = { + .transfer = i2c_ps8xxx_emul_transfer, +}; + /** * @brief Set up a new PS8xxx emulator * @@ -488,100 +561,104 @@ static int ps8xxx_emul_write_byte(struct i2c_emul *i2c_emul, int reg, static int ps8xxx_emul_init(const struct emul *emul, const struct device *parent) { + struct tcpc_emul_data *tcpc_data = emul->data; + struct ps8xxx_emul_data *data = tcpc_data->chip_data; + struct tcpci_ctx *tcpci_ctx = tcpc_data->tcpci_ctx; const struct ps8xxx_emul_cfg *cfg = emul->cfg; - struct ps8xxx_emul_data *data = emul->data; const struct device *i2c_dev; - int ret; + int ret = 0; - data->tcpci_emul = emul_get_binding(cfg->tcpci_emul); i2c_dev = parent; - data->p0_data.emul.api = &i2c_common_emul_api; + tcpci_ctx->common.write_byte = ps8xxx_emul_tcpc_write_byte; + tcpci_ctx->common.finish_write = ps8xxx_emul_tcpc_finish_write; + tcpci_ctx->common.read_byte = ps8xxx_emul_tcpc_read_byte; + tcpci_ctx->common.access_reg = ps8xxx_emul_tcpc_access_reg; + + tcpci_emul_i2c_init(emul, i2c_dev); + + data->p0_data.emul.api = &i2c_ps8xxx_emul_api; data->p0_data.emul.addr = cfg->p0_cfg.addr; - data->p0_data.emul.parent = emul; + data->p0_data.emul.target = emul; data->p0_data.i2c = i2c_dev; data->p0_data.cfg = &cfg->p0_cfg; i2c_common_emul_init(&data->p0_data); - data->p1_data.emul.api = &i2c_common_emul_api; + data->p1_data.emul.api = &i2c_ps8xxx_emul_api; data->p1_data.emul.addr = cfg->p1_cfg.addr; - data->p1_data.emul.parent = emul; + data->p1_data.emul.target = emul; data->p1_data.i2c = i2c_dev; data->p1_data.cfg = &cfg->p1_cfg; i2c_common_emul_init(&data->p1_data); - ret = i2c_emul_register(i2c_dev, emul->dev_label, &data->p0_data.emul); - ret |= i2c_emul_register(i2c_dev, emul->dev_label, &data->p1_data.emul); + /* Have to manually register "hidden" addressed chips under overarching + * ps8xxx + * TODO(b/240564574): Call EMUL_DEFINE for each "hidden" sub-chip. + */ + ret |= i2c_emul_register(i2c_dev, &data->p0_data.emul); + ret |= i2c_emul_register(i2c_dev, &data->p1_data.emul); if (cfg->gpio_cfg.addr != 0) { - data->gpio_data.emul.api = &i2c_common_emul_api; + data->gpio_data.emul.api = &i2c_ps8xxx_emul_api; data->gpio_data.emul.addr = cfg->gpio_cfg.addr; - data->gpio_data.emul.parent = emul; + data->gpio_data.emul.target = emul; data->gpio_data.i2c = i2c_dev; data->gpio_data.cfg = &cfg->gpio_cfg; + ret |= i2c_emul_register(i2c_dev, &data->gpio_data.emul); i2c_common_emul_init(&data->gpio_data); - ret |= i2c_emul_register(i2c_dev, emul->dev_label, - &data->gpio_data.emul); } - tcpci_emul_set_dev_ops(data->tcpci_emul, &ps8xxx_emul_ops); - ps8xxx_emul_tcpci_reset(data->tcpci_emul, &ps8xxx_emul_ops); + ret |= ps8xxx_emul_tcpc_reset(emul); - tcpci_emul_set_reg(data->tcpci_emul, TCPC_REG_PRODUCT_ID, - data->prod_id); + tcpci_emul_set_reg(emul, TCPC_REG_PRODUCT_ID, data->prod_id); /* FW rev is never 0 in a working device. Set arbitrary FW rev. */ - tcpci_emul_set_reg(data->tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + tcpci_emul_set_reg(emul, PS8XXX_REG_FW_REV, 0x31); return ret; } -#define PS8XXX_EMUL(n) \ +#define PS8XXX_EMUL(n) \ static struct ps8xxx_emul_data ps8xxx_emul_data_##n = { \ .prod_id = PS8805_PRODUCT_ID, \ .p0_data = { \ - .write_byte = ps8xxx_emul_write_byte, \ - .read_byte = ps8xxx_emul_read_byte, \ + .write_byte = ps8xxx_emul_p0_write_byte, \ + .read_byte = ps8xxx_emul_p0_read_byte, \ }, \ .p1_data = { \ - .write_byte = ps8xxx_emul_write_byte, \ - .read_byte = ps8xxx_emul_read_byte, \ + .write_byte = ps8xxx_emul_p1_write_byte, \ + .read_byte = ps8xxx_emul_p1_read_byte, \ }, \ .gpio_data = { \ - .write_byte = ps8xxx_emul_write_byte, \ - .read_byte = ps8xxx_emul_read_byte, \ + .write_byte = ps8xxx_emul_gpio_write_byte, \ + .read_byte = ps8xxx_emul_gpio_read_byte, \ }, \ - }; \ - \ + }; \ + \ static const struct ps8xxx_emul_cfg ps8xxx_emul_cfg_##n = { \ - .tcpci_emul = DT_LABEL(DT_INST_PHANDLE(n, tcpci_i2c)), \ .p0_cfg = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .data = &ps8xxx_emul_data_##n.p0_data, \ .addr = DT_INST_PROP(n, p0_i2c_addr), \ }, \ .p1_cfg = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .data = &ps8xxx_emul_data_##n.p1_data, \ .addr = DT_INST_PROP(n, p1_i2c_addr), \ }, \ .gpio_cfg = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ .data = &ps8xxx_emul_data_##n.gpio_data, \ .addr = DT_INST_PROP(n, gpio_i2c_addr), \ }, \ - }; \ - EMUL_DEFINE(ps8xxx_emul_init, DT_DRV_INST(n), \ - &ps8xxx_emul_cfg_##n, &ps8xxx_emul_data_##n) + }; \ + TCPCI_EMUL_DEFINE(n, ps8xxx_emul_init, &ps8xxx_emul_cfg_##n, \ + &ps8xxx_emul_data_##n, &i2c_ps8xxx_emul_api) DT_INST_FOREACH_STATUS_OKAY(PS8XXX_EMUL) -#ifdef CONFIG_ZMAKE_NEW_API - +#ifdef CONFIG_ZTEST_NEW_API #define PS8XXX_EMUL_RESET_RULE_BEFORE(n) \ - ps8xxx_emul_tcpci_reset(&ps8xxx_emul_data_##n, &ps8xxx_emul_ops); + ps8xxx_emul_tcpc_reset(EMUL_DT_GET(DT_DRV_INST(n))); static void ps8xxx_emul_reset_rule_before(const struct ztest_unit_test *test, void *data) { @@ -589,5 +666,7 @@ static void ps8xxx_emul_reset_rule_before(const struct ztest_unit_test *test, ARG_UNUSED(data); DT_INST_FOREACH_STATUS_OKAY(PS8XXX_EMUL_RESET_RULE_BEFORE); } -ZTEST_RULE(ps8xxx_emul_reset, ps8xxx_emul_reset_rule_before, NULL); -#endif /* CONFIG_ZMAKE_NEW_API */ +ZTEST_RULE(PS8XXX_emul_reset, ps8xxx_emul_reset_rule_before, NULL); +#endif /* CONFIG_ZTEST_NEW_API */ + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); diff --git a/zephyr/emul/tcpc/emul_tcpci.c b/zephyr/emul/tcpc/emul_tcpci.c index ac547be3c3..e19f7a2726 100644 --- a/zephyr/emul/tcpc/emul_tcpci.c +++ b/zephyr/emul/tcpc/emul_tcpci.c @@ -1,10 +1,8 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#define DT_DRV_COMPAT cros_tcpci_emul - #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(tcpci_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); @@ -13,59 +11,14 @@ LOG_MODULE_REGISTER(tcpci_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <zephyr/drivers/i2c.h> #include <zephyr/drivers/i2c_emul.h> #include <zephyr/drivers/gpio/gpio_emul.h> -#include <ztest.h> +#include <zephyr/sys/byteorder.h> +#include <zephyr/ztest.h> #include "tcpm/tcpci.h" #include "emul/emul_common_i2c.h" #include "emul/tcpc/emul_tcpci.h" -#define TCPCI_DATA_FROM_I2C_EMUL(_emul) \ - CONTAINER_OF(CONTAINER_OF(_emul, struct i2c_common_emul_data, emul), \ - struct tcpci_emul_data, common) - -/** - * Number of emulated register. This include vendor registers defined in TCPCI - * specification - */ -#define TCPCI_EMUL_REG_COUNT 0x100 - - -/** Run-time data used by the emulator */ -struct tcpci_emul_data { - /** Common I2C data */ - struct i2c_common_emul_data common; - - /** Current state of all emulated TCPCI registers */ - uint8_t reg[TCPCI_EMUL_REG_COUNT]; - - /** Structures representing TX and RX buffers */ - struct tcpci_emul_msg *rx_msg; - struct tcpci_emul_msg *tx_msg; - - /** Data that should be written to register (except TX_BUFFER) */ - uint16_t write_data; - - /** Return error when trying to write to RO register */ - bool error_on_ro_write; - /** Return error when trying to write 1 to reserved bit */ - bool error_on_rsvd_write; - - /** User function called when alert line could change */ - tcpci_emul_alert_state_func alert_callback; - /** Data passed to alert_callback */ - void *alert_callback_data; - - /** Callbacks for specific TCPCI device emulator */ - struct tcpci_emul_dev_ops *dev_ops; - /** Callbacks for TCPCI partner */ - const struct tcpci_emul_partner_ops *partner; - - /** Reference to Alert# GPIO emulator. */ - const struct device *alert_gpio_port; - gpio_pin_t alert_gpio_pin; -}; - /** * @brief Returns number of bytes in specific register * @@ -75,7 +28,6 @@ struct tcpci_emul_data { */ static int tcpci_emul_reg_bytes(int reg) { - switch (reg) { case TCPC_REG_VENDOR_ID: case TCPC_REG_PRODUCT_ID: @@ -101,10 +53,58 @@ static int tcpci_emul_reg_bytes(int reg) return 1; } +/** + * @brief Get value of given register of TCPCI + * + * @param ctx Pointer to TCPCI context + * @param reg Register address + * @param val Pointer where value should be stored + * + * @return 0 on success + * @return -EINVAL when register is out of range defined in TCPCI specification + * or val is NULL + */ +static int get_reg(const struct tcpci_ctx *ctx, int reg, uint16_t *val) +{ + int byte; + + if (reg < 0 || reg > TCPCI_EMUL_REG_COUNT || val == NULL) { + return -EINVAL; + } + + *val = 0; + + byte = tcpci_emul_reg_bytes(reg); + if (byte == 2) { + *val = sys_get_le16(&ctx->reg[reg]); + } else { + *val = ctx->reg[reg]; + } + + return 0; +} + /** Check description in emul_tcpci.h */ -int tcpci_emul_set_reg(const struct emul *emul, int reg, uint16_t val) +int tcpci_emul_get_reg(const struct emul *emul, int reg, uint16_t *val) +{ + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; + + return get_reg(ctx, reg, val); +} + +/** + * @brief Set value of given register of TCPCI + * + * @param ctx Pointer to TCPCI context + * @param reg Register address which value will be changed + * @param val New value of the register + * + * @return 0 on success + * @return -EINVAL when register is out of range defined in TCPCI specification + */ +static int set_reg(struct tcpci_ctx *ctx, int reg, uint16_t val) { - struct tcpci_emul_data *data = emul->data; uint16_t update_alert = 0; uint16_t alert; int byte; @@ -130,82 +130,70 @@ int tcpci_emul_set_reg(const struct emul *emul, int reg, uint16_t val) } if (update_alert != 0) { - tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert); - tcpci_emul_set_reg(emul, TCPC_REG_ALERT, alert | update_alert); + get_reg(ctx, TCPC_REG_ALERT, &alert); + set_reg(ctx, TCPC_REG_ALERT, alert | update_alert); } - for (byte = tcpci_emul_reg_bytes(reg); byte > 0; byte--) { - data->reg[reg] = val & 0xff; - val >>= 8; - reg++; + byte = tcpci_emul_reg_bytes(reg); + if (byte == 2) { + sys_put_le16(val, &ctx->reg[reg]); + } else { + ctx->reg[reg] = val; } return 0; } /** Check description in emul_tcpci.h */ -int tcpci_emul_get_reg(const struct emul *emul, int reg, uint16_t *val) +int tcpci_emul_set_reg(const struct emul *emul, int reg, uint16_t val) { - struct tcpci_emul_data *data = emul->data; - int byte; - - if (reg < 0 || reg > TCPCI_EMUL_REG_COUNT || val == NULL) { - return -EINVAL; - } - - *val = 0; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; - byte = tcpci_emul_reg_bytes(reg); - for (byte -= 1; byte >= 0; byte--) { - *val <<= 8; - *val |= data->reg[reg + byte]; - } - - return 0; + return set_reg(ctx, reg, val); } /** * @brief Check if alert line should be active based on alert registers and * masks * - * @param emul Pointer to TCPCI emulator + * @param ctx Pointer to TCPCI context * * @return State of alert line */ -static bool tcpci_emul_check_int(const struct emul *emul) +static bool tcpci_emul_check_int(const struct tcpci_ctx *ctx) { - struct tcpci_emul_data *data = emul->data; uint16_t alert_mask; uint16_t alert; - tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert); - tcpci_emul_get_reg(emul, TCPC_REG_ALERT_MASK, &alert_mask); + get_reg(ctx, TCPC_REG_ALERT, &alert); + get_reg(ctx, TCPC_REG_ALERT_MASK, &alert_mask); /* * For nested interrupts alert group bit and alert register bit has to * be unmasked */ if (alert & alert_mask & TCPC_REG_ALERT_ALERT_EXT && - data->reg[TCPC_REG_ALERT_EXT] & - data->reg[TCPC_REG_ALERT_EXTENDED_MASK]) { + ctx->reg[TCPC_REG_ALERT_EXT] & + ctx->reg[TCPC_REG_ALERT_EXTENDED_MASK]) { return true; } if (alert & alert_mask & TCPC_REG_ALERT_EXT_STATUS && - data->reg[TCPC_REG_EXT_STATUS] & - data->reg[TCPC_REG_EXT_STATUS_MASK]) { + ctx->reg[TCPC_REG_EXT_STATUS] & + ctx->reg[TCPC_REG_EXT_STATUS_MASK]) { return true; } if (alert & alert_mask & TCPC_REG_ALERT_FAULT && - data->reg[TCPC_REG_FAULT_STATUS] & - data->reg[TCPC_REG_FAULT_STATUS_MASK]) { + ctx->reg[TCPC_REG_FAULT_STATUS] & + ctx->reg[TCPC_REG_FAULT_STATUS_MASK]) { return true; } if (alert & alert_mask & TCPC_REG_ALERT_POWER_STATUS && - data->reg[TCPC_REG_POWER_STATUS] & - data->reg[TCPC_REG_POWER_STATUS_MASK]) { + ctx->reg[TCPC_REG_POWER_STATUS] & + ctx->reg[TCPC_REG_POWER_STATUS_MASK]) { return true; } @@ -222,34 +210,34 @@ static bool tcpci_emul_check_int(const struct emul *emul) /** * @brief If alert callback is provided, call it with current alert line state * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return 0 for success, or non-0 for errors. */ static int tcpci_emul_alert_changed(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; int rc; - bool alert_is_active = tcpci_emul_check_int(emul); + bool alert_is_active = tcpci_emul_check_int(ctx); /** Trigger GPIO. */ - if (data->alert_gpio_port != NULL) { + if (ctx->alert_gpio_port != NULL) { /* Triggers on edge falling, so set to 0 when there is an alert. */ - rc = gpio_emul_input_set(data->alert_gpio_port, - data->alert_gpio_pin, + rc = gpio_emul_input_set(ctx->alert_gpio_port, + ctx->alert_gpio_pin, alert_is_active ? 0 : 1); if (rc != 0) return rc; } /* Nothing to do */ - if (data->alert_callback == NULL) { + if (ctx->alert_callback == NULL) { return 0; } - data->alert_callback(emul, alert_is_active, - data->alert_callback_data); + ctx->alert_callback(emul, alert_is_active, ctx->alert_callback_data); return 0; } @@ -257,31 +245,32 @@ static int tcpci_emul_alert_changed(const struct emul *emul) * @brief Load next rx message and inform partner which message was consumed * by TCPC * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return 0 when there is no new message to load * @return 1 when new rx message is loaded */ static int tcpci_emul_get_next_rx_msg(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; struct tcpci_emul_msg *consumed_msg; - if (data->rx_msg == NULL) { + if (ctx->rx_msg == NULL) { return 0; } - consumed_msg = data->rx_msg; - data->rx_msg = consumed_msg->next; + consumed_msg = ctx->rx_msg; + ctx->rx_msg = consumed_msg->next; /* Inform partner */ - if (data->partner && data->partner->rx_consumed) { - data->partner->rx_consumed(emul, data->partner, consumed_msg); + if (ctx->partner && ctx->partner->rx_consumed) { + ctx->partner->rx_consumed(emul, ctx->partner, consumed_msg); } /* Prepare new loaded message */ - if (data->rx_msg) { - data->rx_msg->idx = 0; + if (ctx->rx_msg) { + ctx->rx_msg->idx = 0; return 1; } @@ -293,17 +282,15 @@ static int tcpci_emul_get_next_rx_msg(const struct emul *emul) * @brief Reset mask registers that are reset upon receiving or transmitting * Hard Reset message. * - * @param emul Pointer to TCPCI emulator + * @param ctx Pointer to TCPCI context */ -static void tcpci_emul_reset_mask_regs(const struct emul *emul) +static void tcpci_emul_reset_mask_regs(struct tcpci_ctx *ctx) { - struct tcpci_emul_data *data = emul->data; - - data->reg[TCPC_REG_ALERT_MASK] = 0xff; - data->reg[TCPC_REG_ALERT_MASK + 1] = 0x7f; - data->reg[TCPC_REG_POWER_STATUS_MASK] = 0xff; - data->reg[TCPC_REG_EXT_STATUS_MASK] = 0x01; - data->reg[TCPC_REG_ALERT_EXTENDED_MASK] = 0x07; + ctx->reg[TCPC_REG_ALERT_MASK] = 0xff; + ctx->reg[TCPC_REG_ALERT_MASK + 1] = 0x7f; + ctx->reg[TCPC_REG_POWER_STATUS_MASK] = 0xff; + ctx->reg[TCPC_REG_EXT_STATUS_MASK] = 0x01; + ctx->reg[TCPC_REG_ALERT_EXTENDED_MASK] = 0x07; } /** @@ -311,11 +298,14 @@ static void tcpci_emul_reset_mask_regs(const struct emul *emul) * delivery (clear RECEIVE_DETECT register and clear already received * messages in buffer) * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator */ static void tcpci_emul_disable_pd_msg_delivery(const struct emul *emul) { - tcpci_emul_set_reg(emul, TCPC_REG_RX_DETECT, 0); + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; + + set_reg(ctx, TCPC_REG_RX_DETECT, 0); /* Clear received messages */ while (tcpci_emul_get_next_rx_msg(emul)) ; @@ -325,7 +315,8 @@ static void tcpci_emul_disable_pd_msg_delivery(const struct emul *emul) int tcpci_emul_add_rx_msg(const struct emul *emul, struct tcpci_emul_msg *rx_msg, bool alert) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t rx_detect_mask; uint16_t rx_detect; uint16_t dev_cap_2; @@ -333,13 +324,13 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, int rc; /* Acquire lock to prevent race conditions with TCPM accessing I2C */ - rc = i2c_common_emul_lock_data(&data->common.emul, K_FOREVER); + rc = i2c_common_emul_lock_data(&ctx->common, K_FOREVER); if (rc != 0) { LOG_ERR("Failed to acquire TCPCI lock"); return rc; } - switch (rx_msg->type) { + switch (rx_msg->sop_type) { case TCPCI_MSG_SOP: rx_detect_mask = TCPC_REG_RX_DETECT_SOP; break; @@ -362,65 +353,66 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, rx_detect_mask = TCPC_REG_RX_DETECT_CABLE_RST; break; default: - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return -EINVAL; } - tcpci_emul_get_reg(emul, TCPC_REG_RX_DETECT, &rx_detect); + get_reg(ctx, TCPC_REG_RX_DETECT, &rx_detect); if (!(rx_detect & rx_detect_mask)) { /* * TCPCI will not respond with GoodCRC, so from partner emulator * point of view it failed to send message */ - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return TCPCI_EMUL_TX_FAILED; } - tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert_reg); + get_reg(ctx, TCPC_REG_ALERT, &alert_reg); /* Handle HardReset */ - if (rx_msg->type == TCPCI_MSG_TX_HARD_RESET) { + if (rx_msg->sop_type == TCPCI_MSG_TX_HARD_RESET) { tcpci_emul_disable_pd_msg_delivery(emul); - tcpci_emul_reset_mask_regs(emul); + tcpci_emul_reset_mask_regs(ctx); alert_reg |= TCPC_REG_ALERT_RX_HARD_RST; - tcpci_emul_set_reg(emul, TCPC_REG_ALERT, alert_reg); + set_reg(ctx, TCPC_REG_ALERT, alert_reg); rc = tcpci_emul_alert_changed(emul); - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return rc; } /* Handle CableReset */ - if (rx_msg->type == TCPCI_MSG_CABLE_RESET) { + if (rx_msg->sop_type == TCPCI_MSG_CABLE_RESET) { tcpci_emul_disable_pd_msg_delivery(emul); /* Rest of CableReset handling is the same as SOP* message */ } - if (data->rx_msg == NULL) { - tcpci_emul_get_reg(emul, TCPC_REG_DEV_CAP_2, &dev_cap_2); + if (ctx->rx_msg == NULL) { + get_reg(ctx, TCPC_REG_DEV_CAP_2, &dev_cap_2); if ((!(dev_cap_2 & TCPC_REG_DEV_CAP_2_LONG_MSG) && - rx_msg->cnt > 31) || rx_msg->cnt > 265) { + rx_msg->cnt > 31) || + rx_msg->cnt > 265) { LOG_ERR("Too long first message (%d)", rx_msg->cnt); - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return -EINVAL; } - data->rx_msg = rx_msg; - } else if (data->rx_msg->next == NULL) { + ctx->rx_msg = rx_msg; + } else if (ctx->rx_msg->next == NULL) { if (rx_msg->cnt > 31) { LOG_ERR("Too long second message (%d)", rx_msg->cnt); - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return -EINVAL; } - data->rx_msg->next = rx_msg; + ctx->rx_msg->next = rx_msg; if (alert) { alert_reg |= TCPC_REG_ALERT_RX_BUF_OVF; } } else { LOG_ERR("Cannot setup third message"); - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return -EINVAL; } @@ -430,11 +422,11 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, } alert_reg |= TCPC_REG_ALERT_RX_STATUS; - tcpci_emul_set_reg(emul, TCPC_REG_ALERT, alert_reg); + set_reg(ctx, TCPC_REG_ALERT, alert_reg); rc = tcpci_emul_alert_changed(emul); if (rc != 0) { - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return rc; } } @@ -442,16 +434,17 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, rx_msg->next = NULL; rx_msg->idx = 0; - i2c_common_emul_unlock_data(&data->common.emul); + i2c_common_emul_unlock_data(&ctx->common); return TCPCI_EMUL_TX_SUCCESS; } /** Check description in emul_tcpci.h */ struct tcpci_emul_msg *tcpci_emul_get_tx_msg(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; - return data->tx_msg; + return ctx->tx_msg; } /** Check description in emul_tcpci.h */ @@ -461,43 +454,36 @@ void tcpci_emul_set_rev(const struct emul *emul, enum tcpci_emul_rev rev) case TCPCI_EMUL_REV1_0_VER1_0: tcpci_emul_set_reg(emul, TCPC_REG_PD_INT_REV, (TCPC_REG_PD_INT_REV_REV_1_0 << 8) | - TCPC_REG_PD_INT_REV_VER_1_0); + TCPC_REG_PD_INT_REV_VER_1_0); return; case TCPCI_EMUL_REV2_0_VER1_1: tcpci_emul_set_reg(emul, TCPC_REG_PD_INT_REV, (TCPC_REG_PD_INT_REV_REV_2_0 << 8) | - TCPC_REG_PD_INT_REV_VER_1_1); + TCPC_REG_PD_INT_REV_VER_1_1); return; } } /** Check description in emul_tcpci.h */ -void tcpci_emul_set_dev_ops(const struct emul *emul, - struct tcpci_emul_dev_ops *dev_ops) -{ - struct tcpci_emul_data *data = emul->data; - - data->dev_ops = dev_ops; -} - -/** Check description in emul_tcpci.h */ void tcpci_emul_set_alert_callback(const struct emul *emul, tcpci_emul_alert_state_func alert_callback, void *alert_callback_data) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; - data->alert_callback = alert_callback; - data->alert_callback_data = alert_callback_data; + ctx->alert_callback = alert_callback; + ctx->alert_callback_data = alert_callback_data; } /** Check description in emul_tcpci.h */ void tcpci_emul_set_partner_ops(const struct emul *emul, const struct tcpci_emul_partner_ops *partner) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; - data->partner = partner; + ctx->partner = partner; } /** @@ -508,9 +494,9 @@ void tcpci_emul_set_partner_ops(const struct emul *emul, * * @return Voltage visible at CC resistor side */ -static enum tcpc_cc_voltage_status tcpci_emul_detected_volt_for_res( - enum tcpc_cc_pull res, - enum tcpc_cc_voltage_status volt) +static enum tcpc_cc_voltage_status +tcpci_emul_detected_volt_for_res(enum tcpc_cc_pull res, + enum tcpc_cc_voltage_status volt) { switch (res) { case TYPEC_CC_RD: @@ -545,6 +531,8 @@ int tcpci_emul_connect_partner(const struct emul *emul, enum tcpc_cc_voltage_status partner_cc2, enum tcpc_cc_polarity polarity) { + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t cc_status, alert, role_ctrl, power_status; enum tcpc_cc_voltage_status cc1_v, cc2_v; enum tcpc_cc_pull cc1_r, cc2_r; @@ -557,7 +545,7 @@ int tcpci_emul_connect_partner(const struct emul *emul, cc2_v = partner_cc1; } - tcpci_emul_get_reg(emul, TCPC_REG_CC_STATUS, &cc_status); + get_reg(ctx, TCPC_REG_CC_STATUS, &cc_status); if (TCPC_REG_CC_STATUS_LOOK4CONNECTION(cc_status)) { /* Change resistors values in case of DRP toggling */ if (partner_power_role == PD_ROLE_SOURCE) { @@ -571,7 +559,7 @@ int tcpci_emul_connect_partner(const struct emul *emul, } } else { /* Use role control resistors values otherwise */ - tcpci_emul_get_reg(emul, TCPC_REG_ROLE_CTRL, &role_ctrl); + get_reg(ctx, TCPC_REG_ROLE_CTRL, &role_ctrl); cc1_r = TCPC_REG_ROLE_CTRL_CC1(role_ctrl); cc2_r = TCPC_REG_ROLE_CTRL_CC2(role_ctrl); } @@ -581,23 +569,20 @@ int tcpci_emul_connect_partner(const struct emul *emul, /* If CC status is TYPEC_CC_VOLT_RP_*, then BIT(2) is ignored */ cc_status = TCPC_REG_CC_STATUS_SET( - partner_power_role == PD_ROLE_SOURCE ? 1 : 0, - cc2_v, cc1_v); - tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, cc_status); - tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert); - tcpci_emul_set_reg(emul, TCPC_REG_ALERT, - alert | TCPC_REG_ALERT_CC_STATUS); + partner_power_role == PD_ROLE_SOURCE ? 1 : 0, cc2_v, cc1_v); + set_reg(ctx, TCPC_REG_CC_STATUS, cc_status); + get_reg(ctx, TCPC_REG_ALERT, &alert); + set_reg(ctx, TCPC_REG_ALERT, alert | TCPC_REG_ALERT_CC_STATUS); if (partner_power_role == PD_ROLE_SOURCE) { - tcpci_emul_get_reg(emul, TCPC_REG_POWER_STATUS, &power_status); + get_reg(ctx, TCPC_REG_POWER_STATUS, &power_status); if (power_status & TCPC_REG_POWER_STATUS_VBUS_DET) { /* * Set TCPCI emulator VBUS to present (connected, * above 4V) only if VBUS detection is enabled */ - tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_VBUS_PRES | - power_status); + set_reg(ctx, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_VBUS_PRES | power_status); } } @@ -609,32 +594,33 @@ int tcpci_emul_connect_partner(const struct emul *emul, /** Check description in emul_tcpci.h */ int tcpci_emul_disconnect_partner(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t power_status; uint16_t val; uint16_t term; int rc; tcpci_emul_disable_pd_msg_delivery(emul); - if (data->partner && data->partner->disconnect) { - data->partner->disconnect(emul, data->partner); + if (ctx->partner && ctx->partner->disconnect) { + ctx->partner->disconnect(emul, ctx->partner); } - data->partner = NULL; + ctx->partner = NULL; /* Set both CC lines to open to indicate disconnect. */ - rc = tcpci_emul_get_reg(emul, TCPC_REG_CC_STATUS, &val); + rc = get_reg(ctx, TCPC_REG_CC_STATUS, &val); if (rc != 0) return rc; term = TCPC_REG_CC_STATUS_TERM(val); - rc = tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, - TCPC_REG_CC_STATUS_SET(term, TYPEC_CC_VOLT_OPEN, - TYPEC_CC_VOLT_OPEN)); + rc = set_reg(ctx, TCPC_REG_CC_STATUS, + TCPC_REG_CC_STATUS_SET(term, TYPEC_CC_VOLT_OPEN, + TYPEC_CC_VOLT_OPEN)); if (rc != 0) return rc; - data->reg[TCPC_REG_ALERT] |= TCPC_REG_ALERT_CC_STATUS; + ctx->reg[TCPC_REG_ALERT] |= TCPC_REG_ALERT_CC_STATUS; rc = tcpci_emul_alert_changed(emul); if (rc != 0) return rc; @@ -644,10 +630,10 @@ int tcpci_emul_disconnect_partner(const struct emul *emul) */ /* Clear VBUS present in case if source partner is disconnected */ - tcpci_emul_get_reg(emul, TCPC_REG_POWER_STATUS, &power_status); + get_reg(ctx, TCPC_REG_POWER_STATUS, &power_status); if (power_status & TCPC_REG_POWER_STATUS_VBUS_PRES) { power_status &= ~TCPC_REG_POWER_STATUS_VBUS_PRES; - tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, power_status); + set_reg(ctx, TCPC_REG_POWER_STATUS, power_status); } return 0; @@ -657,6 +643,8 @@ int tcpci_emul_disconnect_partner(const struct emul *emul) void tcpci_emul_partner_msg_status(const struct emul *emul, enum tcpci_emul_tx_status status) { + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t alert; uint16_t tx_status_alert; @@ -679,110 +667,108 @@ void tcpci_emul_partner_msg_status(const struct emul *emul, return; } - tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert); - tcpci_emul_set_reg(emul, TCPC_REG_ALERT, alert | tx_status_alert); + get_reg(ctx, TCPC_REG_ALERT, &alert); + set_reg(ctx, TCPC_REG_ALERT, alert | tx_status_alert); tcpci_emul_alert_changed(emul); } /** Mask reserved bits in each register of TCPCI */ static const uint8_t tcpci_emul_rsvd_mask[] = { - [TCPC_REG_VENDOR_ID] = 0x00, - [TCPC_REG_VENDOR_ID + 1] = 0x00, - [TCPC_REG_PRODUCT_ID] = 0x00, - [TCPC_REG_PRODUCT_ID + 1] = 0x00, - [TCPC_REG_BCD_DEV] = 0x00, - [TCPC_REG_BCD_DEV + 1] = 0xff, - [TCPC_REG_TC_REV] = 0x00, - [TCPC_REG_TC_REV + 1] = 0x00, - [TCPC_REG_PD_REV] = 0x00, - [TCPC_REG_PD_REV + 1] = 0x00, - [TCPC_REG_PD_INT_REV] = 0x00, - [TCPC_REG_PD_INT_REV + 1] = 0x00, - [0x0c ... 0x0f] = 0xff, /* Reserved */ - [TCPC_REG_ALERT] = 0x00, - [TCPC_REG_ALERT + 1] = 0x00, - [TCPC_REG_ALERT_MASK] = 0x00, - [TCPC_REG_ALERT_MASK + 1] = 0x00, - [TCPC_REG_POWER_STATUS_MASK] = 0x00, - [TCPC_REG_FAULT_STATUS_MASK] = 0x00, - [TCPC_REG_EXT_STATUS_MASK] = 0xfe, - [TCPC_REG_ALERT_EXTENDED_MASK] = 0xf8, - [TCPC_REG_CONFIG_STD_OUTPUT] = 0x00, - [TCPC_REG_TCPC_CTRL] = 0x00, - [TCPC_REG_ROLE_CTRL] = 0x80, - [TCPC_REG_FAULT_CTRL] = 0x80, - [TCPC_REG_POWER_CTRL] = 0x00, - [TCPC_REG_CC_STATUS] = 0xc0, - [TCPC_REG_POWER_STATUS] = 0x00, - [TCPC_REG_FAULT_STATUS] = 0x00, - [TCPC_REG_EXT_STATUS] = 0xfe, - [TCPC_REG_ALERT_EXT] = 0xf8, - [0x22] = 0xff, /* Reserved */ - [TCPC_REG_COMMAND] = 0x00, - [TCPC_REG_DEV_CAP_1] = 0x00, - [TCPC_REG_DEV_CAP_1 + 1] = 0x00, - [TCPC_REG_DEV_CAP_2] = 0x80, - [TCPC_REG_DEV_CAP_2 + 1] = 0x00, - [TCPC_REG_STD_INPUT_CAP] = 0xe0, - [TCPC_REG_STD_OUTPUT_CAP] = 0x00, - [TCPC_REG_CONFIG_EXT_1] = 0xfc, - [0x2b] = 0xff, /* Reserved */ - [TCPC_REG_GENERIC_TIMER] = 0x00, - [TCPC_REG_GENERIC_TIMER + 1] = 0x00, - [TCPC_REG_MSG_HDR_INFO] = 0xe0, - [TCPC_REG_RX_DETECT] = 0x00, - [TCPC_REG_RX_BUFFER ... 0x4f] = 0x00, - [TCPC_REG_TRANSMIT ... 0x69] = 0x00, - [TCPC_REG_VBUS_VOLTAGE] = 0xf0, - [TCPC_REG_VBUS_VOLTAGE + 1] = 0x00, - [TCPC_REG_VBUS_SINK_DISCONNECT_THRESH] = 0x00, - [TCPC_REG_VBUS_SINK_DISCONNECT_THRESH + 1] = 0xfc, - [TCPC_REG_VBUS_STOP_DISCHARGE_THRESH] = 0x00, - [TCPC_REG_VBUS_STOP_DISCHARGE_THRESH + 1] = 0xfc, - [TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG] = 0x00, - [TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG + 1] = 0xfc, - [TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG] = 0x00, - [TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG + 1] = 0xfc, - [TCPC_REG_VBUS_NONDEFAULT_TARGET] = 0x00, - [TCPC_REG_VBUS_NONDEFAULT_TARGET + 1] = 0x00, - [0x7c ... 0x7f] = 0xff, /* Reserved */ - [0x80 ... TCPCI_EMUL_REG_COUNT - 1] = 0x00, + [TCPC_REG_VENDOR_ID] = 0x00, + [TCPC_REG_VENDOR_ID + 1] = 0x00, + [TCPC_REG_PRODUCT_ID] = 0x00, + [TCPC_REG_PRODUCT_ID + 1] = 0x00, + [TCPC_REG_BCD_DEV] = 0x00, + [TCPC_REG_BCD_DEV + 1] = 0xff, + [TCPC_REG_TC_REV] = 0x00, + [TCPC_REG_TC_REV + 1] = 0x00, + [TCPC_REG_PD_REV] = 0x00, + [TCPC_REG_PD_REV + 1] = 0x00, + [TCPC_REG_PD_INT_REV] = 0x00, + [TCPC_REG_PD_INT_REV + 1] = 0x00, + [0x0c ... 0x0f] = 0xff, /* Reserved */ + [TCPC_REG_ALERT] = 0x00, + [TCPC_REG_ALERT + 1] = 0x00, + [TCPC_REG_ALERT_MASK] = 0x00, + [TCPC_REG_ALERT_MASK + 1] = 0x00, + [TCPC_REG_POWER_STATUS_MASK] = 0x00, + [TCPC_REG_FAULT_STATUS_MASK] = 0x00, + [TCPC_REG_EXT_STATUS_MASK] = 0xfe, + [TCPC_REG_ALERT_EXTENDED_MASK] = 0xf8, + [TCPC_REG_CONFIG_STD_OUTPUT] = 0x00, + [TCPC_REG_TCPC_CTRL] = 0x00, + [TCPC_REG_ROLE_CTRL] = 0x80, + [TCPC_REG_FAULT_CTRL] = 0x80, + [TCPC_REG_POWER_CTRL] = 0x00, + [TCPC_REG_CC_STATUS] = 0xc0, + [TCPC_REG_POWER_STATUS] = 0x00, + [TCPC_REG_FAULT_STATUS] = 0x00, + [TCPC_REG_EXT_STATUS] = 0xfe, + [TCPC_REG_ALERT_EXT] = 0xf8, + [0x22] = 0xff, /* Reserved */ + [TCPC_REG_COMMAND] = 0x00, + [TCPC_REG_DEV_CAP_1] = 0x00, + [TCPC_REG_DEV_CAP_1 + 1] = 0x00, + [TCPC_REG_DEV_CAP_2] = 0x80, + [TCPC_REG_DEV_CAP_2 + 1] = 0x00, + [TCPC_REG_STD_INPUT_CAP] = 0xe0, + [TCPC_REG_STD_OUTPUT_CAP] = 0x00, + [TCPC_REG_CONFIG_EXT_1] = 0xfc, + [0x2b] = 0xff, /* Reserved */ + [TCPC_REG_GENERIC_TIMER] = 0x00, + [TCPC_REG_GENERIC_TIMER + 1] = 0x00, + [TCPC_REG_MSG_HDR_INFO] = 0xe0, + [TCPC_REG_RX_DETECT] = 0x00, + [TCPC_REG_RX_BUFFER... 0x4f] = 0x00, + [TCPC_REG_TRANSMIT... 0x69] = 0x00, + [TCPC_REG_VBUS_VOLTAGE] = 0xf0, + [TCPC_REG_VBUS_VOLTAGE + 1] = 0x00, + [TCPC_REG_VBUS_SINK_DISCONNECT_THRESH] = 0x00, + [TCPC_REG_VBUS_SINK_DISCONNECT_THRESH + 1] = 0xfc, + [TCPC_REG_VBUS_STOP_DISCHARGE_THRESH] = 0x00, + [TCPC_REG_VBUS_STOP_DISCHARGE_THRESH + 1] = 0xfc, + [TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG] = 0x00, + [TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG + 1] = 0xfc, + [TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG] = 0x00, + [TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG + 1] = 0xfc, + [TCPC_REG_VBUS_NONDEFAULT_TARGET] = 0x00, + [TCPC_REG_VBUS_NONDEFAULT_TARGET + 1] = 0x00, + [0x7c ... 0x7f] = 0xff, /* Reserved */ + [0x80 ... TCPCI_EMUL_REG_COUNT - 1] = 0x00, }; - /** * @brief Reset role control and header info registers to default values. * - * @param emul Pointer to TCPCI emulator + * @param ctx Pointer to TCPCI context */ -static void tcpci_emul_reset_role_ctrl(const struct emul *emul) +static void tcpci_emul_reset_role_ctrl(struct tcpci_ctx *ctx) { - struct tcpci_emul_data *data = emul->data; uint16_t dev_cap_1; - tcpci_emul_get_reg(emul, TCPC_REG_DEV_CAP_1, &dev_cap_1); + get_reg(ctx, TCPC_REG_DEV_CAP_1, &dev_cap_1); switch (dev_cap_1 & TCPC_REG_DEV_CAP_1_PWRROLE_MASK) { case TCPC_REG_DEV_CAP_1_PWRROLE_SRC_OR_SNK: case TCPC_REG_DEV_CAP_1_PWRROLE_SNK: case TCPC_REG_DEV_CAP_1_PWRROLE_SNK_ACC: - data->reg[TCPC_REG_ROLE_CTRL] = 0x0a; - data->reg[TCPC_REG_MSG_HDR_INFO] = 0x04; + ctx->reg[TCPC_REG_ROLE_CTRL] = 0x0a; + ctx->reg[TCPC_REG_MSG_HDR_INFO] = 0x04; break; case TCPC_REG_DEV_CAP_1_PWRROLE_SRC: /* Dead batter */ - data->reg[TCPC_REG_ROLE_CTRL] = 0x05; - data->reg[TCPC_REG_MSG_HDR_INFO] = 0x0d; + ctx->reg[TCPC_REG_ROLE_CTRL] = 0x05; + ctx->reg[TCPC_REG_MSG_HDR_INFO] = 0x0d; break; case TCPC_REG_DEV_CAP_1_PWRROLE_DRP: /* Dead batter and dbg acc ind */ - data->reg[TCPC_REG_ROLE_CTRL] = 0x4a; - data->reg[TCPC_REG_MSG_HDR_INFO] = 0x04; + ctx->reg[TCPC_REG_ROLE_CTRL] = 0x4a; + ctx->reg[TCPC_REG_MSG_HDR_INFO] = 0x04; break; case TCPC_REG_DEV_CAP_1_PWRROLE_SRC_SNK_DRP_ADPT_CBL: case TCPC_REG_DEV_CAP_1_PWRROLE_SRC_SNK_DRP: /* Dead batter and dbg acc ind */ - data->reg[TCPC_REG_ROLE_CTRL] = 0x4a; - data->reg[TCPC_REG_MSG_HDR_INFO] = 0x04; + ctx->reg[TCPC_REG_ROLE_CTRL] = 0x4a; + ctx->reg[TCPC_REG_MSG_HDR_INFO] = 0x04; break; } } @@ -794,46 +780,43 @@ static void tcpci_emul_reset_role_ctrl(const struct emul *emul) * @param emul Pointer to TCPCI emulator * @return 0 if successful */ -static int tcpci_emul_reset(const struct emul *emul) +int tcpci_emul_reset(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; - - data->reg[TCPC_REG_ALERT] = 0x00; - data->reg[TCPC_REG_ALERT + 1] = 0x00; - data->reg[TCPC_REG_FAULT_STATUS_MASK] = 0xff; - data->reg[TCPC_REG_CONFIG_STD_OUTPUT] = 0x60; - data->reg[TCPC_REG_TCPC_CTRL] = 0x00; - data->reg[TCPC_REG_FAULT_CTRL] = 0x00; - data->reg[TCPC_REG_POWER_CTRL] = 0x60; - data->reg[TCPC_REG_CC_STATUS] = 0x00; - data->reg[TCPC_REG_POWER_STATUS] = 0x08; - data->reg[TCPC_REG_FAULT_STATUS] = 0x80; - data->reg[TCPC_REG_EXT_STATUS] = 0x00; - data->reg[TCPC_REG_ALERT_EXT] = 0x00; - data->reg[TCPC_REG_COMMAND] = 0x00; - data->reg[TCPC_REG_CONFIG_EXT_1] = 0x00; - data->reg[TCPC_REG_GENERIC_TIMER] = 0x00; - data->reg[TCPC_REG_GENERIC_TIMER + 1] = 0x00; - data->reg[TCPC_REG_RX_DETECT] = 0x00; - data->reg[TCPC_REG_VBUS_VOLTAGE] = 0x00; - data->reg[TCPC_REG_VBUS_VOLTAGE + 1] = 0x00; - data->reg[TCPC_REG_VBUS_SINK_DISCONNECT_THRESH] = 0x8c; - data->reg[TCPC_REG_VBUS_SINK_DISCONNECT_THRESH + 1] = 0x00; - data->reg[TCPC_REG_VBUS_STOP_DISCHARGE_THRESH] = 0x20; - data->reg[TCPC_REG_VBUS_STOP_DISCHARGE_THRESH + 1] = 0x00; - data->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG] = 0x00; - data->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG + 1] = 0x00; - data->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG] = 0x00; - data->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG + 1] = 0x00; - data->reg[TCPC_REG_VBUS_NONDEFAULT_TARGET] = 0x00; - data->reg[TCPC_REG_VBUS_NONDEFAULT_TARGET + 1] = 0x00; - - tcpci_emul_reset_mask_regs(emul); - tcpci_emul_reset_role_ctrl(emul); - - if (data->dev_ops && data->dev_ops->reset) { - data->dev_ops->reset(emul, data->dev_ops); - } + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; + + ctx->reg[TCPC_REG_ALERT] = 0x00; + ctx->reg[TCPC_REG_ALERT + 1] = 0x00; + ctx->reg[TCPC_REG_FAULT_STATUS_MASK] = 0xff; + ctx->reg[TCPC_REG_CONFIG_STD_OUTPUT] = 0x60; + ctx->reg[TCPC_REG_TCPC_CTRL] = 0x00; + ctx->reg[TCPC_REG_FAULT_CTRL] = 0x00; + ctx->reg[TCPC_REG_POWER_CTRL] = 0x60; + ctx->reg[TCPC_REG_CC_STATUS] = 0x00; + ctx->reg[TCPC_REG_POWER_STATUS] = 0x08; + ctx->reg[TCPC_REG_FAULT_STATUS] = 0x80; + ctx->reg[TCPC_REG_EXT_STATUS] = 0x00; + ctx->reg[TCPC_REG_ALERT_EXT] = 0x00; + ctx->reg[TCPC_REG_COMMAND] = 0x00; + ctx->reg[TCPC_REG_CONFIG_EXT_1] = 0x00; + ctx->reg[TCPC_REG_GENERIC_TIMER] = 0x00; + ctx->reg[TCPC_REG_GENERIC_TIMER + 1] = 0x00; + ctx->reg[TCPC_REG_RX_DETECT] = 0x00; + ctx->reg[TCPC_REG_VBUS_VOLTAGE] = 0x00; + ctx->reg[TCPC_REG_VBUS_VOLTAGE + 1] = 0x00; + ctx->reg[TCPC_REG_VBUS_SINK_DISCONNECT_THRESH] = 0x8c; + ctx->reg[TCPC_REG_VBUS_SINK_DISCONNECT_THRESH + 1] = 0x00; + ctx->reg[TCPC_REG_VBUS_STOP_DISCHARGE_THRESH] = 0x20; + ctx->reg[TCPC_REG_VBUS_STOP_DISCHARGE_THRESH + 1] = 0x00; + ctx->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG] = 0x00; + ctx->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG + 1] = 0x00; + ctx->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG] = 0x00; + ctx->reg[TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG + 1] = 0x00; + ctx->reg[TCPC_REG_VBUS_NONDEFAULT_TARGET] = 0x00; + ctx->reg[TCPC_REG_VBUS_NONDEFAULT_TARGET + 1] = 0x00; + + tcpci_emul_reset_mask_regs(ctx); + tcpci_emul_reset_role_ctrl(ctx); return tcpci_emul_alert_changed(emul); } @@ -841,16 +824,18 @@ static int tcpci_emul_reset(const struct emul *emul) /** * @brief Set alert and fault registers to indicate i2c interface fault * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @return 0 if successful */ static int tcpci_emul_set_i2c_interface_err(const struct emul *emul) { + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t fault_status; - tcpci_emul_get_reg(emul, TCPC_REG_FAULT_STATUS, &fault_status); + get_reg(ctx, TCPC_REG_FAULT_STATUS, &fault_status); fault_status |= TCPC_REG_FAULT_STATUS_I2C_INTERFACE_ERR; - tcpci_emul_set_reg(emul, TCPC_REG_FAULT_STATUS, fault_status); + set_reg(ctx, TCPC_REG_FAULT_STATUS, fault_status); return tcpci_emul_alert_changed(emul); } @@ -858,7 +843,7 @@ static int tcpci_emul_set_i2c_interface_err(const struct emul *emul) /** * @brief Handle read from RX buffer registers for TCPCI rev 1.0 and rev 2.0 * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param reg First byte of last i2c write message * @param val Pointer where byte to read should be stored * @param bytes Number of bytes already readded @@ -869,10 +854,11 @@ static int tcpci_emul_set_i2c_interface_err(const struct emul *emul) static int tcpci_emul_handle_rx_buf(const struct emul *emul, int reg, uint8_t *val, int bytes) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; int is_rev1; - is_rev1 = data->reg[TCPC_REG_PD_INT_REV] == TCPC_REG_PD_INT_REV_REV_1_0; + is_rev1 = ctx->reg[TCPC_REG_PD_INT_REV] == TCPC_REG_PD_INT_REV_REV_1_0; if (!is_rev1 && reg != TCPC_REG_RX_BUFFER) { LOG_ERR("Register 0x%x defined only for revision 1.0", reg); @@ -882,7 +868,7 @@ static int tcpci_emul_handle_rx_buf(const struct emul *emul, int reg, switch (reg) { case TCPC_REG_RX_BUFFER: - if (data->rx_msg == NULL) { + if (ctx->rx_msg == NULL) { if (bytes < 2) { *val = 0; } else { @@ -894,16 +880,16 @@ static int tcpci_emul_handle_rx_buf(const struct emul *emul, int reg, } if (bytes == 0) { /* TCPCI message size count include type byte */ - *val = data->rx_msg->cnt + 1; + *val = ctx->rx_msg->cnt + 1; } else if (is_rev1) { LOG_ERR("Revision 1.0 has only byte count at 0x30"); tcpci_emul_set_i2c_interface_err(emul); return -EIO; } else if (bytes == 1) { - *val = data->rx_msg->type; - } else if (data->rx_msg->idx < data->rx_msg->cnt) { - *val = data->rx_msg->buf[data->rx_msg->idx]; - data->rx_msg->idx++; + *val = ctx->rx_msg->sop_type; + } else if (ctx->rx_msg->idx < ctx->rx_msg->cnt) { + *val = ctx->rx_msg->buf[ctx->rx_msg->idx]; + ctx->rx_msg->idx++; } else { LOG_ERR("Reading past RX buffer"); tcpci_emul_set_i2c_interface_err(emul); @@ -918,10 +904,10 @@ static int tcpci_emul_handle_rx_buf(const struct emul *emul, int reg, tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - if (data->rx_msg == NULL) { + if (ctx->rx_msg == NULL) { *val = 0; } else { - *val = data->rx_msg->type; + *val = ctx->rx_msg->sop_type; } break; @@ -932,24 +918,24 @@ static int tcpci_emul_handle_rx_buf(const struct emul *emul, int reg, tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - if (data->rx_msg == NULL) { + if (ctx->rx_msg == NULL) { LOG_ERR("Accessing RX buffer with no msg"); tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - *val = data->rx_msg->buf[bytes]; + *val = ctx->rx_msg->buf[bytes]; break; case TCPC_REG_RX_DATA: - if (data->rx_msg == NULL) { + if (ctx->rx_msg == NULL) { LOG_ERR("Accessing RX buffer with no msg"); tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - if (bytes < data->rx_msg->cnt - 2) { + if (bytes < ctx->rx_msg->cnt - 2) { /* rx_msg cnt include two bytes of header */ - *val = data->rx_msg->buf[bytes + 2]; - data->rx_msg->idx++; + *val = ctx->rx_msg->buf[bytes + 2]; + ctx->rx_msg->idx++; } else { LOG_ERR("Reading past RX buffer"); tcpci_emul_set_i2c_interface_err(emul); @@ -961,39 +947,12 @@ static int tcpci_emul_handle_rx_buf(const struct emul *emul, int reg, return 0; } -/** - * @brief Function called for each byte of read message - * - * @param i2c_emul Pointer to TCPCI emulator - * @param reg First byte of last write message - * @param val Pointer where byte to read should be stored - * @param bytes Number of bytes already readded - * - * @return 0 on success - */ -static int tcpci_emul_read_byte(struct i2c_emul *i2c_emul, int reg, - uint8_t *val, int bytes) +/** Check description in emul_tcpci.h */ +int tcpci_emul_read_byte(const struct emul *emul, int reg, uint8_t *val, + int bytes) { - struct tcpci_emul_data *data; - const struct emul *emul; - - emul = i2c_emul->parent; - data = TCPCI_DATA_FROM_I2C_EMUL(i2c_emul); - - LOG_DBG("TCPCI 0x%x: read reg 0x%x", i2c_emul->addr, reg); - - if (data->dev_ops && data->dev_ops->read_byte) { - switch (data->dev_ops->read_byte(emul, data->dev_ops, reg, val, - bytes)) { - case TCPCI_EMUL_CONTINUE: - break; - case TCPCI_EMUL_DONE: - return 0; - case TCPCI_EMUL_ERROR: - default: - return -EIO; - } - } + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; switch (reg) { /* 16 bits values */ @@ -1019,7 +978,7 @@ static int tcpci_emul_read_byte(struct i2c_emul *i2c_emul, int reg, tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - *val = data->reg[reg + bytes]; + *val = ctx->reg[reg + bytes]; break; /* 8 bits values */ @@ -1048,7 +1007,7 @@ static int tcpci_emul_read_byte(struct i2c_emul *i2c_emul, int reg, tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - *val = data->reg[reg]; + *val = ctx->reg[reg]; break; case TCPC_REG_RX_BUFFER: @@ -1066,43 +1025,15 @@ static int tcpci_emul_read_byte(struct i2c_emul *i2c_emul, int reg, return 0; } -/** - * @brief Function called for each byte of write message. Data are stored - * in write_data field of tcpci_emul_data or in tx_msg in case of - * writing to TX buffer. - * - * @param i2c_emul Pointer to TCPCI emulator - * @param reg First byte of write message - * @param val Received byte of write message - * @param bytes Number of bytes already received - * - * @return 0 on success - * @return -EIO on invalid write to TX buffer - */ -static int tcpci_emul_write_byte(struct i2c_emul *i2c_emul, int reg, - uint8_t val, int bytes) +/** Check description in emul_tcpci.h */ +int tcpci_emul_write_byte(const struct emul *emul, int reg, uint8_t val, + int bytes) { - struct tcpci_emul_data *data; - const struct emul *emul; int is_rev1; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; - emul = i2c_emul->parent; - data = TCPCI_DATA_FROM_I2C_EMUL(i2c_emul); - - if (data->dev_ops && data->dev_ops->write_byte) { - switch (data->dev_ops->write_byte(emul, data->dev_ops, reg, val, - bytes)) { - case TCPCI_EMUL_CONTINUE: - break; - case TCPCI_EMUL_DONE: - return 0; - case TCPCI_EMUL_ERROR: - default: - return -EIO; - } - } - - is_rev1 = data->reg[TCPC_REG_PD_INT_REV] == TCPC_REG_PD_INT_REV_REV_1_0; + is_rev1 = ctx->reg[TCPC_REG_PD_INT_REV] == TCPC_REG_PD_INT_REV_REV_1_0; switch (reg) { case TCPC_REG_TX_BUFFER: if (is_rev1) { @@ -1111,16 +1042,16 @@ static int tcpci_emul_write_byte(struct i2c_emul *i2c_emul, int reg, tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - data->tx_msg->idx = val; + ctx->tx_msg->idx = val; } if (bytes == 1) { - data->tx_msg->cnt = val; + ctx->tx_msg->cnt = val; } else { - if (data->tx_msg->cnt > 0) { - data->tx_msg->cnt--; - data->tx_msg->buf[data->tx_msg->idx] = val; - data->tx_msg->idx++; + if (ctx->tx_msg->cnt > 0) { + ctx->tx_msg->cnt--; + ctx->tx_msg->buf[ctx->tx_msg->idx] = val; + ctx->tx_msg->idx++; } else { LOG_ERR("Writing past TX buffer"); tcpci_emul_set_i2c_interface_err(emul); @@ -1146,7 +1077,7 @@ static int tcpci_emul_write_byte(struct i2c_emul *i2c_emul, int reg, tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - data->tx_msg->buf[bytes] = val; + ctx->tx_msg->buf[bytes] = val; return 0; case TCPC_REG_TX_HDR: @@ -1162,18 +1093,18 @@ static int tcpci_emul_write_byte(struct i2c_emul *i2c_emul, int reg, if (bytes > 1) { LOG_ERR("Writing byte %d to 2 byte register 0x%x", - bytes, reg); + bytes, reg); tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - data->tx_msg->buf[bytes] = val; + ctx->tx_msg->buf[bytes] = val; return 0; } if (bytes == 1) { - data->write_data = val; + ctx->write_data = val; } else if (bytes == 2) { - data->write_data |= (uint16_t)val << 8; + ctx->write_data |= (uint16_t)val << 8; } return 0; @@ -1182,43 +1113,44 @@ static int tcpci_emul_write_byte(struct i2c_emul *i2c_emul, int reg, /** * @brief Handle writes to command register * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return 0 on success * @return -EIO on unknown command value */ static int tcpci_emul_handle_command(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t role_ctrl; uint16_t pwr_ctrl; - switch (data->write_data & 0xff) { + switch (ctx->write_data & 0xff) { case TCPC_REG_COMMAND_RESET_TRANSMIT_BUF: - data->tx_msg->idx = 0; + ctx->tx_msg->idx = 0; break; case TCPC_REG_COMMAND_RESET_RECEIVE_BUF: - if (data->rx_msg) { - data->rx_msg->idx = 0; + if (ctx->rx_msg) { + ctx->rx_msg->idx = 0; } break; case TCPC_REG_COMMAND_LOOK4CONNECTION: - tcpci_emul_get_reg(emul, TCPC_REG_ROLE_CTRL, &role_ctrl); - tcpci_emul_get_reg(emul, TCPC_REG_POWER_CTRL, &pwr_ctrl); + get_reg(ctx, TCPC_REG_ROLE_CTRL, &role_ctrl); + get_reg(ctx, TCPC_REG_POWER_CTRL, &pwr_ctrl); /* * Start DRP toggling only if auto discharge is disabled, * DRP is enabled and CC1/2 are both Rp or Rd */ - if (!(pwr_ctrl & TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT) - && TCPC_REG_ROLE_CTRL_DRP(role_ctrl) && + if (!(pwr_ctrl & + TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT) && + TCPC_REG_ROLE_CTRL_DRP(role_ctrl) && (TCPC_REG_ROLE_CTRL_CC1(role_ctrl) == TCPC_REG_ROLE_CTRL_CC2(role_ctrl)) && (TCPC_REG_ROLE_CTRL_CC1(role_ctrl) == TYPEC_CC_RP || TCPC_REG_ROLE_CTRL_CC1(role_ctrl) == TYPEC_CC_RD)) { /* Set Look4Connection and clear CC1/2 state */ - tcpci_emul_set_reg( - emul, TCPC_REG_CC_STATUS, + set_reg(ctx, TCPC_REG_CC_STATUS, TCPC_REG_CC_STATUS_LOOK4CONNECTION_MASK); } break; @@ -1238,45 +1170,47 @@ static int tcpci_emul_handle_command(const struct emul *emul) * Set command register to allow easier inspection of last * command sent */ - tcpci_emul_set_reg(emul, TCPC_REG_COMMAND, data->write_data & 0xff); + set_reg(ctx, TCPC_REG_COMMAND, ctx->write_data & 0xff); return 0; } /** * @brief Handle write to transmit register * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return 0 on success * @return -EIO when sending SOP message with less than 2 bytes in TX buffer */ static int tcpci_emul_handle_transmit(const struct emul *emul) { - struct tcpci_emul_data *data = emul->data; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; enum tcpci_msg_type type; - data->tx_msg->cnt = data->tx_msg->idx; - data->tx_msg->type = TCPC_REG_TRANSMIT_TYPE(data->write_data); - data->tx_msg->idx = 0; + ctx->tx_msg->cnt = ctx->tx_msg->idx; + ctx->tx_msg->sop_type = TCPC_REG_TRANSMIT_TYPE(ctx->write_data); + ctx->tx_msg->idx = 0; - type = TCPC_REG_TRANSMIT_TYPE(data->write_data); + type = TCPC_REG_TRANSMIT_TYPE(ctx->write_data); - if (type < NUM_SOP_STAR_TYPES && data->tx_msg->cnt < 2) { + if (type < NUM_SOP_STAR_TYPES && ctx->tx_msg->cnt < 2) { LOG_ERR("Transmitting too short message (%d)", - data->tx_msg->cnt); + ctx->tx_msg->cnt); tcpci_emul_set_i2c_interface_err(emul); return -EIO; } - if (data->partner && data->partner->transmit) { - data->partner->transmit(emul, data->partner, data->tx_msg, type, - TCPC_REG_TRANSMIT_RETRY(data->write_data)); + if (ctx->partner && ctx->partner->transmit) { + ctx->partner->transmit( + emul, ctx->partner, ctx->tx_msg, type, + TCPC_REG_TRANSMIT_RETRY(ctx->write_data)); } switch (type) { case TCPCI_MSG_TX_HARD_RESET: tcpci_emul_disable_pd_msg_delivery(emul); - tcpci_emul_reset_mask_regs(emul); + tcpci_emul_reset_mask_regs(ctx); /* fallthrough */ case TCPCI_MSG_CABLE_RESET: /* @@ -1293,22 +1227,11 @@ static int tcpci_emul_handle_transmit(const struct emul *emul) return 0; } -/** - * @brief Handle I2C write message. It is checked if accessed register isn't RO - * and reserved bits are set to 0. - * - * @param i2c_emul Pointer to TCPCI emulator - * @param reg Register which is written - * @param msg_len Length of handled I2C message - * - * @return 0 on success - * @return -EIO on error - */ -static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, - int msg_len) +/** Check description in emul_tcpci.h */ +int tcpci_emul_handle_write(const struct emul *emul, int reg, int msg_len) { - struct tcpci_emul_data *data; - const struct emul *emul; + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; uint16_t rsvd_mask = 0; uint16_t alert_val; bool inform_partner = false; @@ -1324,43 +1247,24 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, /* Exclude register address byte from message length */ msg_len--; - emul = i2c_emul->parent; - data = TCPCI_DATA_FROM_I2C_EMUL(i2c_emul); - - LOG_DBG("TCPCI 0x%x: write reg 0x%x val 0x%x", i2c_emul->addr, reg, - data->write_data); - - if (data->dev_ops && data->dev_ops->handle_write) { - switch (data->dev_ops->handle_write(emul, data->dev_ops, reg, - msg_len)) { - case TCPCI_EMUL_CONTINUE: - break; - case TCPCI_EMUL_DONE: - return 0; - case TCPCI_EMUL_ERROR: - default: - return -EIO; - } - } - switch (reg) { /* Alert registers */ case TCPC_REG_ALERT: /* Overflow is cleared by Receive SOP message status */ - data->write_data &= ~TCPC_REG_ALERT_RX_BUF_OVF; - if (data->write_data & TCPC_REG_ALERT_RX_STATUS) { - data->write_data |= TCPC_REG_ALERT_RX_BUF_OVF; + ctx->write_data &= ~TCPC_REG_ALERT_RX_BUF_OVF; + if (ctx->write_data & TCPC_REG_ALERT_RX_STATUS) { + ctx->write_data |= TCPC_REG_ALERT_RX_BUF_OVF; /* Do not clear RX status if there is new message */ if (tcpci_emul_get_next_rx_msg(emul)) { - data->write_data &= ~TCPC_REG_ALERT_RX_STATUS; + ctx->write_data &= ~TCPC_REG_ALERT_RX_STATUS; } } /* fallthrough */ case TCPC_REG_FAULT_STATUS: case TCPC_REG_ALERT_EXT: /* Clear bits where TCPM set 1 */ - tcpci_emul_get_reg(emul, reg, &alert_val); - data->write_data = alert_val & (~data->write_data); + get_reg(ctx, reg, &alert_val); + ctx->write_data = alert_val & (~ctx->write_data); /* fallthrough */ case TCPC_REG_ALERT_MASK: case TCPC_REG_POWER_STATUS_MASK: @@ -1390,11 +1294,11 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, break; case TCPC_REG_CONFIG_EXT_1: - if (data->write_data & TCPC_REG_CONFIG_EXT_1_FR_SWAP_SNK_DIR && - ((data->reg[TCPC_REG_STD_INPUT_CAP] & + if (ctx->write_data & TCPC_REG_CONFIG_EXT_1_FR_SWAP_SNK_DIR && + ((ctx->reg[TCPC_REG_STD_INPUT_CAP] & TCPC_REG_STD_INPUT_CAP_SRC_FR_SWAP) == BIT(4)) && - data->reg[TCPC_REG_STD_OUTPUT_CAP] & - TCPC_REG_STD_OUTPUT_CAP_SNK_DISC_DET) { + ctx->reg[TCPC_REG_STD_OUTPUT_CAP] & + TCPC_REG_STD_OUTPUT_CAP_SNK_DISC_DET) { tcpci_emul_set_i2c_interface_err(emul); return 0; } @@ -1447,23 +1351,23 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, } /* Check reserved bits */ - if (data->error_on_rsvd_write && rsvd_mask & data->write_data) { + if (ctx->error_on_rsvd_write && rsvd_mask & ctx->write_data) { tcpci_emul_set_i2c_interface_err(emul); LOG_ERR("Writing 0x%x to reg 0x%x with rsvd bits mask 0x%x", - data->write_data, reg, rsvd_mask); + ctx->write_data, reg, rsvd_mask); return -EIO; } /* Check if I2C write message has correct length */ if (msg_len != reg_bytes) { tcpci_emul_set_i2c_interface_err(emul); - LOG_ERR("Writing byte %d to %d byte register 0x%x", - msg_len, reg_bytes, reg); + LOG_ERR("Writing byte %d to %d byte register 0x%x", msg_len, + reg_bytes, reg); return -EIO; } /* Set new value of register */ - tcpci_emul_set_reg(emul, reg, data->write_data); + set_reg(ctx, reg, ctx->write_data); if (alert_changed) { rc = tcpci_emul_alert_changed(emul); @@ -1471,119 +1375,22 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, return rc; } - if (inform_partner && data->partner && data->partner->control_change) { - data->partner->control_change(emul, data->partner); + if (inform_partner && ctx->partner && ctx->partner->control_change) { + ctx->partner->control_change(emul, ctx->partner); } return 0; } -/** - * @brief Get currently accessed register, which always equals to selected - * register. - * - * @param i2c_emul Pointer to TCPCI emulator - * @param reg First byte of last write message - * @param bytes Number of bytes already handled from current message - * @param read If currently handled is read message - * - * @return Currently accessed register - */ -static int tcpci_emul_access_reg(struct i2c_emul *i2c_emul, int reg, int bytes, - bool read) -{ - return reg; -} - -/* Device instantiation */ - /** Check description in emul_tcpci.h */ -struct i2c_emul *tcpci_emul_get_i2c_emul(const struct emul *emul) +void tcpci_emul_i2c_init(const struct emul *emul, const struct device *i2c_dev) { - struct tcpci_emul_data *data = emul->data; - - return &data->common.emul; -} + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *ctx = tcpc_data->tcpci_ctx; -/** - * @brief Set up a new TCPCI emulator - * - * This should be called for each TCPCI device that needs to be - * emulated. It registers it with the I2C emulation controller. - * - * @param emul Emulation information - * @param parent Device to emulate - * - * @return 0 indicating success (always) - */ -static int tcpci_emul_init(const struct emul *emul, const struct device *parent) -{ - const struct i2c_common_emul_cfg *cfg = emul->cfg; - struct tcpci_emul_data *data = emul->data; - int ret; - - data->common.emul.api = &i2c_common_emul_api; - data->common.emul.addr = cfg->addr; - data->common.emul.parent = emul; - data->common.i2c = parent; - data->common.cfg = cfg; - i2c_common_emul_init(&data->common); - - ret = i2c_emul_register(parent, emul->dev_label, &data->common.emul); - if (ret != 0) - return ret; - - return tcpci_emul_reset(emul); -} + ctx->common.emul.addr = tcpc_data->i2c_cfg.addr; + ctx->common.i2c = i2c_dev; + ctx->common.cfg = &tcpc_data->i2c_cfg; -#define TCPCI_EMUL(n) \ - uint8_t tcpci_emul_tx_buf_##n[128]; \ - static struct tcpci_emul_msg tcpci_emul_tx_msg_##n = { \ - .buf = tcpci_emul_tx_buf_##n, \ - }; \ - \ - static struct tcpci_emul_data tcpci_emul_data_##n = { \ - .tx_msg = &tcpci_emul_tx_msg_##n, \ - .error_on_ro_write = true, \ - .error_on_rsvd_write = true, \ - .common = { \ - .write_byte = tcpci_emul_write_byte, \ - .finish_write = tcpci_emul_handle_write, \ - .read_byte = tcpci_emul_read_byte, \ - .access_reg = tcpci_emul_access_reg, \ - }, \ - .alert_gpio_port = COND_CODE_1( \ - DT_INST_NODE_HAS_PROP(n, alert_gpio), \ - (DEVICE_DT_GET(DT_GPIO_CTLR( \ - DT_INST_PROP(n, alert_gpio), gpios))), \ - (NULL)), \ - .alert_gpio_pin = COND_CODE_1( \ - DT_INST_NODE_HAS_PROP(n, alert_gpio), \ - (DT_GPIO_PIN(DT_INST_PROP(n, alert_gpio), \ - gpios)), \ - (0)), \ - }; \ - \ - static const struct i2c_common_emul_cfg tcpci_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .dev_label = DT_INST_LABEL(n), \ - .data = &tcpci_emul_data_##n.common, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(tcpci_emul_init, DT_DRV_INST(n), \ - &tcpci_emul_cfg_##n, &tcpci_emul_data_##n) - -DT_INST_FOREACH_STATUS_OKAY(TCPCI_EMUL) - -#ifdef CONFIG_ZTEST_NEW_API -#define TCPCI_EMUL_RESET_RULE_BEFORE(n) \ - tcpci_emul_reset(&EMUL_REG_NAME(DT_DRV_INST(n))); -static void tcpci_emul_reset_rule_before(const struct ztest_unit_test *test, - void *data) -{ - ARG_UNUSED(test); - ARG_UNUSED(data); - DT_INST_FOREACH_STATUS_OKAY(TCPCI_EMUL_RESET_RULE_BEFORE); + i2c_common_emul_init(&ctx->common); } -ZTEST_RULE(tcpci_emul_reset, tcpci_emul_reset_rule_before, NULL); -#endif /* CONFIG_ZTEST_NEW_API */ diff --git a/zephyr/emul/tcpc/emul_tcpci_generic.c b/zephyr/emul/tcpc/emul_tcpci_generic.c new file mode 100644 index 0000000000..204e040ede --- /dev/null +++ b/zephyr/emul/tcpc/emul_tcpci_generic.c @@ -0,0 +1,185 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT cros_tcpci_generic_emul + +#include <zephyr/logging/log.h> +LOG_MODULE_REGISTER(tcpci_generic_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); + +#include <zephyr/device.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/i2c.h> +#include <zephyr/drivers/i2c_emul.h> +#include <zephyr/ztest.h> + +#include "tcpm/tcpci.h" +#include "emul/emul_stub_device.h" + +#include "emul/emul_common_i2c.h" +#include "emul/tcpc/emul_tcpci.h" + +/** + * @brief Function called for each byte of read message from TCPCI emulator + * + * @param emul Pointer to I2C TCPCI emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already read + * + * @return 0 on success + * @return -EIO on invalid read request + */ +static int tcpci_generic_emul_read_byte(const struct emul *emul, int reg, + uint8_t *val, int bytes) +{ + LOG_DBG("TCPCI Generic 0x%x: read reg 0x%x", emul->bus.i2c->addr, reg); + + return tcpci_emul_read_byte(emul, reg, val, bytes); +} + +/** + * @brief Function called for each byte of write message to TCPCI emulator + * + * @param emul Pointer to I2C TCPCI emulator + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return 0 on success + * @return -EIO on invalid write request + */ +static int tcpci_generic_emul_write_byte(const struct emul *emul, int reg, + uint8_t val, int bytes) +{ + LOG_DBG("TCPCI Generic 0x%x: write reg 0x%x", emul->bus.i2c->addr, reg); + + return tcpci_emul_write_byte(emul, reg, val, bytes); +} + +/** + * @brief Function called on the end of write message to TCPCI emulator + * + * @param emul Pointer to I2C TCPCI emulator + * @param reg Register which is written + * @param msg_len Length of handled I2C message + * + * @return 0 on success + * @return -EIO on error + */ +static int tcpci_generic_emul_finish_write(const struct emul *emul, int reg, + int msg_len) +{ + LOG_DBG("TCPCI Generic 0x%x: finish write reg 0x%x", + emul->bus.i2c->addr, reg); + + return tcpci_emul_handle_write(emul, reg, msg_len); +} + +/** + * @brief Get currently accessed register, which always equals to selected + * register from TCPCI emulator. + * + * @param emul Pointer to I2C TCPCI emulator + * @param reg First byte of last write message + * @param bytes Number of bytes already handled from current message + * @param read If currently handled is read message + * + * @return Currently accessed register + */ +static int tcpci_generic_emul_access_reg(const struct emul *emul, int reg, + int bytes, bool read) +{ + return reg; +} + +/** + * @brief Function called on reset + * + * @param emul Pointer to TCPC emulator + */ +static void tcpci_generic_emul_reset(const struct emul *emul) +{ + tcpci_emul_reset(emul); +} + +/** + * @brief Set up a new TCPCI generic emulator + * + * This should be called for each TCPCI Generic device that needs to be + * emulated. + * + * @param emul Emulation information + * @param parent Device to emulate + * + * @return 0 indicating success (always) + */ +static int tcpci_generic_emul_init(const struct emul *emul, + const struct device *parent) +{ + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *tcpci_ctx = tcpc_data->tcpci_ctx; + const struct device *i2c_dev; + + i2c_dev = parent; + + tcpci_ctx->common.write_byte = tcpci_generic_emul_write_byte; + tcpci_ctx->common.finish_write = tcpci_generic_emul_finish_write; + tcpci_ctx->common.read_byte = tcpci_generic_emul_read_byte; + tcpci_ctx->common.access_reg = tcpci_generic_emul_access_reg; + + tcpci_emul_i2c_init(emul, i2c_dev); + + tcpci_generic_emul_reset(emul); + + return 0; +} + +static int i2c_tcpci_generic_emul_transfer(const struct emul *target, + struct i2c_msg *msgs, int num_msgs, + int addr) +{ + struct tcpc_emul_data *tcpc_data = target->data; + struct tcpci_ctx *tcpci_ctx = tcpc_data->tcpci_ctx; + + return i2c_common_emul_transfer_workhorse(target, &tcpci_ctx->common, + &tcpc_data->i2c_cfg, msgs, + num_msgs, addr); +} + +struct i2c_emul_api i2c_tcpci_generic_emul_api = { + .transfer = i2c_tcpci_generic_emul_transfer, +}; + +#define TCPCI_GENERIC_EMUL(n) \ + TCPCI_EMUL_DEFINE(n, tcpci_generic_emul_init, NULL, NULL, \ + &i2c_tcpci_generic_emul_api) + +DT_INST_FOREACH_STATUS_OKAY(TCPCI_GENERIC_EMUL) + +#ifdef CONFIG_ZTEST_NEW_API +#define TCPCI_GENERIC_EMUL_RESET_RULE_BEFORE(n) \ + tcpci_generic_emul_reset(EMUL_DT_GET(DT_DRV_INST(n))); +static void +tcpci_generic_emul_reset_rule_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + DT_INST_FOREACH_STATUS_OKAY(TCPCI_GENERIC_EMUL_RESET_RULE_BEFORE); +} +ZTEST_RULE(tcpci_generic_emul_reset, tcpci_generic_emul_reset_rule_before, + NULL); +#endif /* CONFIG_ZTEST_NEW_API */ + +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +struct i2c_common_emul_data * +emul_tcpci_generic_get_i2c_common_data(const struct emul *emul) +{ + struct tcpc_emul_data *tcpc_data = emul->data; + struct tcpci_ctx *tcpci_ctx = tcpc_data->tcpci_ctx; + + return &tcpci_ctx->common; +} diff --git a/zephyr/emul/tcpc/emul_tcpci_partner_common.c b/zephyr/emul/tcpc/emul_tcpci_partner_common.c index 49c5278908..4d6467378e 100644 --- a/zephyr/emul/tcpc/emul_tcpci_partner_common.c +++ b/zephyr/emul/tcpc/emul_tcpci_partner_common.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,18 +8,21 @@ LOG_MODULE_REGISTER(tcpci_partner, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <stdlib.h> #include <zephyr/sys/byteorder.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "emul/tcpc/emul_tcpci_partner_common.h" #include "emul/tcpc/emul_tcpci.h" #include "usb_pd.h" +#include "util.h" /** Length of PDO, RDO and BIST request object in SOP message in bytes */ -#define TCPCI_MSG_DO_LEN 4 +#define TCPCI_MSG_DO_LEN 4 /** Length of header in SOP message in bytes */ -#define TCPCI_MSG_HEADER_LEN 2 +#define TCPCI_MSG_HEADER_LEN 2 +/** Length of extended header in bytes */ +#define TCPCI_MSG_EXT_HEADER_LEN 2 void tcpci_partner_common_hard_reset_as_role(struct tcpci_partner_data *data, enum pd_power_role power_role) @@ -27,33 +30,104 @@ void tcpci_partner_common_hard_reset_as_role(struct tcpci_partner_data *data, data->power_role = power_role; data->data_role = power_role == PD_ROLE_SOURCE ? PD_ROLE_DFP : PD_ROLE_UFP; + data->displayport_configured = false; + data->entered_svid = 0; + atomic_clear(&data->mode_enter_attempts); } -struct tcpci_partner_msg *tcpci_partner_alloc_msg(int data_objects) +/** + * @brief Allocate space for a PD message. Do not call directly; use + * tcpci_partner_alloc_standard_msg() or + * tcpci_partner_alloc_extended_msg() depending on the type of message. + * + * @param size Size of the message in bytes, including header(s) + * + * @return Pointer to new message on success + * @return NULL on error + */ +static struct tcpci_partner_msg *tcpci_partner_alloc_msg_helper(size_t size) { struct tcpci_partner_msg *new_msg; - size_t size = TCPCI_MSG_HEADER_LEN + TCPCI_MSG_DO_LEN * data_objects; - new_msg = malloc(sizeof(struct tcpci_partner_msg)); + new_msg = calloc(1, sizeof(struct tcpci_partner_msg)); if (new_msg == NULL) { return NULL; } - new_msg->msg.buf = malloc(size); + new_msg->msg.buf = calloc(1, size); if (new_msg->msg.buf == NULL) { free(new_msg); return NULL; } /* Set default message type to SOP */ - new_msg->msg.type = TCPCI_MSG_SOP; + new_msg->msg.sop_type = TCPCI_MSG_SOP; new_msg->msg.cnt = size; - new_msg->data_objects = data_objects; return new_msg; } /** + * @brief Allocate space for a standard (non-extended) message, containing the + * specified number of data objects. + * + * @param num_data_objects Number of 32-bit DOs this message contains, if data + * message. Pass 0 if control message. + * @return struct tcpci_partner_msg* if successful + * @return NULL in case of error + */ +static struct tcpci_partner_msg * +tcpci_partner_alloc_standard_msg(int num_data_objects) +{ + struct tcpci_partner_msg *msg = tcpci_partner_alloc_msg_helper( + TCPCI_MSG_HEADER_LEN + TCPCI_MSG_DO_LEN * num_data_objects); + + if (msg) { + msg->data_objects = num_data_objects; + } + + return msg; +} + +/** + * @brief Allocate space for an extended message, containing a payload of + * specified size + * + * @param payload_size Size of extended message payload. Do not count either + * message header. + * @return struct tcpci_partner_msg* if successful + * @return NULL in case of error + */ +static struct tcpci_partner_msg * +tcpci_partner_alloc_extended_msg(size_t payload_size) +{ + /* Currently, the emulators only support extended messages that can fit + * into a single chunk. Enforce that here. + */ + + __ASSERT(payload_size <= PD_MAX_EXTENDED_MSG_CHUNK_LEN, + "Message must fit into a single chunk"); + + struct tcpci_partner_msg *msg = tcpci_partner_alloc_msg_helper( + TCPCI_MSG_HEADER_LEN + TCPCI_MSG_EXT_HEADER_LEN + payload_size); + + if (msg) { + msg->extended = true; + + /* Update the number of data objects with the number of 4-byte + * words in the payload, rounding up. This includes the 2-byte + * Extended Message Header (USB-PD spec Rev 3.0, V1.1, + * section 6.2.1.2.1) + */ + + msg->data_objects = DIV_ROUND_UP( + payload_size + TCPCI_MSG_EXT_HEADER_LEN, 4); + } + + return msg; +} + +/** * @brief Alloc and append message to log if collect_msg_log flag is set * * @param data Pointer to TCPCI partner emulator @@ -64,10 +138,8 @@ struct tcpci_partner_msg *tcpci_partner_alloc_msg(int data_objects) * @return Pointer to message status */ static enum tcpci_emul_tx_status *tcpci_partner_log_msg( - struct tcpci_partner_data *data, - const struct tcpci_emul_msg *msg, - enum tcpci_partner_msg_sender sender, - enum tcpci_emul_tx_status status) + struct tcpci_partner_data *data, const struct tcpci_emul_msg *msg, + enum tcpci_partner_msg_sender sender, enum tcpci_emul_tx_status status) { struct tcpci_partner_log_msg *log_msg; int cnt; @@ -91,7 +163,7 @@ static enum tcpci_emul_tx_status *tcpci_partner_log_msg( } log_msg->cnt = cnt; - log_msg->sop = msg->type; + log_msg->sop = msg->sop_type; log_msg->time = k_uptime_get(); log_msg->sender = sender; log_msg->status = status; @@ -121,12 +193,24 @@ void tcpci_partner_free_msg(struct tcpci_partner_msg *msg) void tcpci_partner_set_header(struct tcpci_partner_data *data, struct tcpci_partner_msg *msg) { + uint16_t msg_id; + uint16_t header; + /* Header msg id has only 3 bits and wraps around after 8 messages */ - uint16_t msg_id = data->msg_id & 0x7; - uint16_t header = PD_HEADER(msg->type, data->power_role, - data->data_role, msg_id, msg->data_objects, - data->rev, 0 /* ext */); - data->msg_id++; + if (msg->msg.sop_type == TCPCI_MSG_SOP) { + msg_id = data->sop_msg_id & 0x7; + header = PD_HEADER(msg->type, data->power_role, data->data_role, + msg_id, msg->data_objects, data->rev, + msg->extended); + data->sop_msg_id++; + } else if (msg->msg.sop_type == TCPCI_MSG_SOP_PRIME) { + msg_id = data->sop_prime_msg_id & 0x7; + header = PD_HEADER(msg->type, PD_PLUG_FROM_CABLE, 0, msg_id, + msg->data_objects, data->rev, msg->extended); + data->sop_prime_msg_id++; + } else { + return; + } msg->msg.buf[1] = (header >> 8) & 0xff; msg->msg.buf[0] = header & 0xff; @@ -276,8 +360,8 @@ int tcpci_partner_send_msg(struct tcpci_partner_data *data, return ret; } - prev_msg = SYS_SLIST_PEEK_HEAD_CONTAINER(&data->to_send, prev_msg, - node); + prev_msg = + SYS_SLIST_PEEK_HEAD_CONTAINER(&data->to_send, prev_msg, node); /* Current message should be sent first */ if (prev_msg == NULL || prev_msg->time > msg->time) { sys_slist_prepend(&data->to_send, &msg->node); @@ -287,7 +371,8 @@ int tcpci_partner_send_msg(struct tcpci_partner_data *data, } SYS_SLIST_FOR_EACH_CONTAINER_SAFE(&data->to_send, prev_msg, next_msg, - node) { + node) + { /* * If we reach tail or next message should be sent after new * message, insert new message to the list. @@ -306,12 +391,11 @@ int tcpci_partner_send_msg(struct tcpci_partner_data *data, } int tcpci_partner_send_control_msg(struct tcpci_partner_data *data, - enum pd_ctrl_msg_type type, - uint64_t delay) + enum pd_ctrl_msg_type type, uint64_t delay) { struct tcpci_partner_msg *msg; - msg = tcpci_partner_alloc_msg(0); + msg = tcpci_partner_alloc_standard_msg(0); if (msg == NULL) { return -ENOMEM; } @@ -329,14 +413,13 @@ int tcpci_partner_send_control_msg(struct tcpci_partner_data *data, } int tcpci_partner_send_data_msg(struct tcpci_partner_data *data, - enum pd_data_msg_type type, - uint32_t *data_obj, int data_obj_num, - uint64_t delay) + enum pd_data_msg_type type, uint32_t *data_obj, + int data_obj_num, uint64_t delay) { struct tcpci_partner_msg *msg; int addr; - msg = tcpci_partner_alloc_msg(data_obj_num); + msg = tcpci_partner_alloc_standard_msg(data_obj_num); if (msg == NULL) { return -ENOMEM; } @@ -352,6 +435,36 @@ int tcpci_partner_send_data_msg(struct tcpci_partner_data *data, return tcpci_partner_send_msg(data, msg, delay); } +/* Note: Cables can send from both SOP' and SOP'', so accept a type argument */ +int tcpci_cable_send_data_msg(struct tcpci_partner_data *data, + enum pd_data_msg_type type, uint32_t *data_obj, + int data_obj_num, enum tcpci_msg_type sop_type, + uint64_t delay) +{ + struct tcpci_partner_msg *msg; + int addr; + + /* TODO(b/243151272): Add SOP'' support */ + if (sop_type != TCPCI_MSG_SOP_PRIME) + return -EINVAL; + + msg = tcpci_partner_alloc_standard_msg(data_obj_num); + if (msg == NULL) { + return -ENOMEM; + } + + for (int i = 0; i < data_obj_num; i++) { + /* Address of given data object in message buffer */ + addr = TCPCI_MSG_HEADER_LEN + i * TCPCI_MSG_DO_LEN; + sys_put_le32(data_obj[i], msg->msg.buf + addr); + } + + msg->msg.sop_type = sop_type; + msg->type = type; + + return tcpci_partner_send_msg(data, msg, delay); +} + int tcpci_partner_clear_msg_queue(struct tcpci_partner_data *data) { struct tcpci_partner_msg *msg; @@ -384,8 +497,10 @@ int tcpci_partner_clear_msg_queue(struct tcpci_partner_data *data) static void tcpci_partner_common_reset(struct tcpci_partner_data *data) { tcpci_partner_clear_msg_queue(data); - data->msg_id = 0; - data->recv_msg_id = -1; + data->sop_msg_id = 0; + data->sop_prime_msg_id = 0; + data->sop_recv_msg_id = -1; + data->sop_prime_recv_msg_id = -1; data->in_soft_reset = false; data->vconn_role = PD_ROLE_VCONN_OFF; tcpci_partner_stop_sender_response_timer(data); @@ -416,8 +531,8 @@ void tcpci_partner_common_send_hard_reset(struct tcpci_partner_data *data) tcpci_partner_common_hard_reset(data); - msg = tcpci_partner_alloc_msg(0); - msg->msg.type = TCPCI_MSG_TX_HARD_RESET; + msg = tcpci_partner_alloc_standard_msg(0); + msg->msg.sop_type = TCPCI_MSG_TX_HARD_RESET; tcpci_partner_send_msg(data, msg, 0); } @@ -425,8 +540,10 @@ void tcpci_partner_common_send_hard_reset(struct tcpci_partner_data *data) void tcpci_partner_common_send_soft_reset(struct tcpci_partner_data *data) { /* Reset counters */ - data->msg_id = 0; - data->recv_msg_id = -1; + data->sop_msg_id = 0; + data->sop_prime_msg_id = 0; + data->sop_recv_msg_id = -1; + data->sop_prime_recv_msg_id = -1; tcpci_partner_common_clear_ams_ctrl_msg(data); @@ -437,6 +554,55 @@ void tcpci_partner_common_send_soft_reset(struct tcpci_partner_data *data) tcpci_partner_start_sender_response_timer(data); } +int tcpci_partner_send_extended_msg(struct tcpci_partner_data *data, + enum pd_ext_msg_type type, uint64_t delay, + uint8_t *payload, size_t payload_size) +{ + struct tcpci_partner_msg *msg; + + msg = tcpci_partner_alloc_extended_msg(payload_size); + if (msg == NULL) { + return -ENOMEM; + } + + msg->type = type; + + /* Apply extended message header. We currently do not support + * multiple chunks. + */ + + sys_put_le16(PD_EXT_HEADER(0, 0, payload_size), &msg->msg.buf[2]); + + /* Copy in payload */ + memcpy(&msg->msg.buf[4], payload, payload_size); + + return tcpci_partner_send_msg(data, msg, delay); +} + +/** Check description in emul_common_tcpci_partner.h */ +void tcpci_partner_common_send_get_battery_capabilities( + struct tcpci_partner_data *data, int battery_index) +{ + __ASSERT(battery_index >= 0 && battery_index < PD_BATT_MAX, + "Battery index out of range"); + __ASSERT(data->battery_capabilities.index < 0, + "Get Battery Capabilities request already in progress"); + + LOG_INF("Send battery cap request"); + + /* Get_Battery_Cap message payload */ + uint8_t payload[1] = { [0] = battery_index }; + + /* Keep track which battery we requested capabilities for */ + data->battery_capabilities.index = battery_index; + int ret = tcpci_partner_send_extended_msg(data, PD_EXT_GET_BATTERY_CAP, + 0, payload, sizeof(payload)); + if (ret) { + LOG_ERR("Send battery capacity result: %d", ret); + } + tcpci_partner_start_sender_response_timer(data); +} + /** * @brief Handler for response timeout * @@ -445,9 +611,8 @@ void tcpci_partner_common_send_soft_reset(struct tcpci_partner_data *data) static void tcpci_partner_sender_response_timeout(struct k_work *work) { struct k_work_delayable *dwork = k_work_delayable_from_work(work); - struct tcpci_partner_data *data = - CONTAINER_OF(dwork, struct tcpci_partner_data, - sender_response_timeout); + struct tcpci_partner_data *data = CONTAINER_OF( + dwork, struct tcpci_partner_data, sender_response_timeout); if (k_mutex_lock(&data->transmit_mutex, K_NO_WAIT) != 0) { /* @@ -520,13 +685,180 @@ tcpci_partner_common_vdm_handler(struct tcpci_partner_data *data, data->modes_vdos, 0); } return TCPCI_PARTNER_COMMON_MSG_HANDLED; - /* TODO(b/219562077): Support DP mode entry. */ + case CMD_ENTER_MODE: + /* Partner emulator only supports entering one mode */ + if (data->enter_mode_vdos > 0 && + (PD_VDO_VID(vdm_header) == + PD_VDO_VID(data->enter_mode_vdm[0]))) { + /* Squirrel away the SVID if we're sending ACK */ + if (PD_VDO_CMDT(data->enter_mode_vdm[0]) == + CMDT_RSP_ACK) + data->entered_svid = PD_VDO_VID(vdm_header); + + tcpci_partner_send_data_msg(data, PD_DATA_VENDOR_DEF, + data->enter_mode_vdm, + data->enter_mode_vdos, 0); + } + atomic_inc(&data->mode_enter_attempts); + return TCPCI_PARTNER_COMMON_MSG_HANDLED; + case CMD_EXIT_MODE: + /* Only exit a SVID we know we entered */ + if (PD_VDO_VID(vdm_header) == data->entered_svid) { + uint32_t response_vdm_header; + + response_vdm_header = + VDO(PD_VDO_VID(vdm_header), true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_EXIT_MODE); + tcpci_partner_send_data_msg(data, PD_DATA_VENDOR_DEF, + &response_vdm_header, 1, 0); + } else { + uint32_t response_vdm_header; + + response_vdm_header = + VDO(PD_VDO_VID(vdm_header), true, + VDO_CMDT(CMDT_RSP_NAK) | CMD_EXIT_MODE); + tcpci_partner_send_data_msg(data, PD_DATA_VENDOR_DEF, + &response_vdm_header, 1, 0); + } + data->displayport_configured = false; + return TCPCI_PARTNER_COMMON_MSG_HANDLED; + case CMD_DP_STATUS: + if (data->dp_status_vdos > 0 && + (PD_VDO_VID(vdm_header) == USB_SID_DISPLAYPORT)) { + tcpci_partner_send_data_msg(data, PD_DATA_VENDOR_DEF, + data->dp_status_vdm, + data->dp_status_vdos, 0); + } + return TCPCI_PARTNER_COMMON_MSG_HANDLED; + case CMD_DP_CONFIG: + if (data->dp_config_vdos > 0 && + (PD_VDO_VID(vdm_header) == USB_SID_DISPLAYPORT)) { + tcpci_partner_send_data_msg(data, PD_DATA_VENDOR_DEF, + data->dp_config_vdm, + data->dp_config_vdos, 0); + data->displayport_configured = true; + } + return TCPCI_PARTNER_COMMON_MSG_HANDLED; default: /* TCPCI r. 2.0: Ignore unsupported commands. */ return TCPCI_PARTNER_COMMON_MSG_HANDLED; } } +static enum tcpci_partner_handler_res +tcpci_partner_common_cable_handler(struct tcpci_partner_data *data, + const struct tcpci_emul_msg *message, + enum tcpci_msg_type sop_type) +{ + uint32_t vdm_header = sys_get_le32(message->buf + TCPCI_MSG_HEADER_LEN); + uint32_t response_vdm_header; + uint16_t header = sys_get_le16(&message->buf[0]); + + /* TODO(b/243151272): Add soft reset support */ + /* Ensure we are replying to a VDM */ + if (PD_HEADER_CNT(header) == 0 || + PD_HEADER_TYPE(header) != PD_DATA_VENDOR_DEF || + PD_HEADER_EXT(header) != 0) + return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; + + /* + * Ignore any VDMs which are not sent by an initiator. As a cable, we + * never expect to be the initiator processing ACKs. + * TODO(b/225397796): Validate VDM fields more thoroughly. + */ + if (PD_VDO_CMDT(vdm_header) != CMDT_INIT || !PD_VDO_SVDM(vdm_header)) { + return TCPCI_PARTNER_COMMON_MSG_HANDLED; + } + + /* If we have no cable, we must not GoodCRC */ + if (data->cable == NULL) + return TCPCI_PARTNER_COMMON_MSG_NO_GOODCRC; + + /* TODO(b/243151272): Add SOP'' support */ + if (sop_type == TCPCI_MSG_SOP_PRIME_PRIME) { + return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; + } + + switch (PD_VDO_CMD(vdm_header)) { + case CMD_DISCOVER_IDENT: + if (data->cable->identity_vdos > 0) { + tcpci_cable_send_data_msg(data, PD_DATA_VENDOR_DEF, + data->cable->identity_vdm, + data->cable->identity_vdos, + TCPCI_MSG_SOP_PRIME, 0); + return TCPCI_PARTNER_COMMON_MSG_HANDLED; + } + /* A cable with no identity shouldn't GoodCRC */ + return TCPCI_PARTNER_COMMON_MSG_NO_GOODCRC; + default: + /* + * Cable must support VDMs, so generate a NAK on unfamiliar + * commands + */ + response_vdm_header = + VDO(PD_VDO_VID(vdm_header), true, + VDO_CMDT(CMDT_RSP_NAK) | PD_VDO_CMD(vdm_header)); + tcpci_cable_send_data_msg(data, PD_DATA_VENDOR_DEF, + &response_vdm_header, 1, sop_type, 0); + + return TCPCI_PARTNER_COMMON_MSG_HANDLED; + } +} + +/** + * @brief Handle a received Battery Capability message from the TCPC. Save the + * contents to the emulator data struct for analysis. + * + * @param data Emulator state + * @param message Received PD message + * @return enum tcpci_partner_handler_res + */ +static enum tcpci_partner_handler_res +tcpci_partner_common_battery_capability_handler( + struct tcpci_partner_data *data, const struct tcpci_emul_msg *message) +{ + uint16_t header = sys_get_le16(&message->buf[0]); + uint16_t ext_header = sys_get_le16(&message->buf[2]); + + /* Validate message header */ + __ASSERT(PD_HEADER_TYPE(header) == PD_EXT_BATTERY_CAP, + "wrong message type"); + __ASSERT(PD_EXT_HEADER_DATA_SIZE(ext_header) == 9, + "Data size mismatch"); + + int index = data->battery_capabilities.index; + + data->battery_capabilities.index = -1; + + if (index < 0) { + LOG_ERR("Received a Battery Capability message but it was " + "never requested"); + return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; + } + + __ASSERT(index < PD_BATT_MAX, "Battery index out of range"); + + data->battery_capabilities.bcdb[index] = (struct pd_bcdb){ + .vid = sys_get_le16(&message->buf[4]), + .pid = sys_get_le16(&message->buf[6]), + .design_cap = sys_get_le16(&message->buf[8]), + .last_full_charge_cap = sys_get_le16(&message->buf[10]), + .battery_type = message->buf[12], + }; + + data->battery_capabilities.have_response[index] = true; + + LOG_INF("Saved data for battery index (%d): vid=%04x, pid=%04x, " + "cap=%u, last_cap=%u, type=%02x", + index, data->battery_capabilities.bcdb[index].vid, + data->battery_capabilities.bcdb[index].pid, + data->battery_capabilities.bcdb[index].design_cap, + data->battery_capabilities.bcdb[index].last_full_charge_cap, + data->battery_capabilities.bcdb[index].battery_type); + + return TCPCI_PARTNER_COMMON_MSG_HANDLED; +} + static void tcpci_partner_common_set_vconn(struct tcpci_partner_data *data, enum pd_vconn_role role) { @@ -641,9 +973,9 @@ tcpi_partner_common_handle_accept(struct tcpci_partner_data *data) * @param TCPCI_PARTNER_COMMON_MSG_HARD_RESET Message was handled by sending * hard reset */ -static enum tcpci_partner_handler_res tcpci_partner_common_sop_msg_handler( - struct tcpci_partner_data *data, - const struct tcpci_emul_msg *tx_msg) +static enum tcpci_partner_handler_res +tcpci_partner_common_sop_msg_handler(struct tcpci_partner_data *data, + const struct tcpci_emul_msg *tx_msg) { struct tcpci_partner_extension *ext; uint16_t header; @@ -655,15 +987,41 @@ static enum tcpci_partner_handler_res tcpci_partner_common_sop_msg_handler( header = sys_get_le16(tx_msg->buf); msg_type = PD_HEADER_TYPE(header); - if (PD_HEADER_ID(header) == data->recv_msg_id && + if (PD_HEADER_ID(header) == data->sop_recv_msg_id && msg_type != PD_CTRL_SOFT_RESET) { /* Repeated message mark as handled */ return TCPCI_PARTNER_COMMON_MSG_HANDLED; } + data->sop_recv_msg_id = PD_HEADER_ID(header); + + if (PD_HEADER_EXT(header)) { + /* Extended message */ + + if (PD_HEADER_REV(header) < PD_REV30) { + LOG_ERR("Received extended message but current PD rev " + "(0x%x) does not support them.", + PD_HEADER_REV(header)); + return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; + } + + switch (PD_HEADER_TYPE(header)) { + case PD_EXT_GET_BATTERY_CAP: + /* Not implemented */ + LOG_INF("Got PD_EXT_GET_BATTERY_CAP"); + return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; + case PD_EXT_BATTERY_CAP: + /* Received a Battery Capabilities response */ + LOG_INF("Got PD_EXT_BATTERY_CAP"); - data->recv_msg_id = PD_HEADER_ID(header); + return tcpci_partner_common_battery_capability_handler( + data, tx_msg); + default: + return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; + } + } if (PD_HEADER_CNT(header)) { + /* Data message */ switch (PD_HEADER_TYPE(header)) { case PD_DATA_VENDOR_DEF: return tcpci_partner_common_vdm_handler(data, tx_msg); @@ -681,7 +1039,7 @@ static enum tcpci_partner_handler_res tcpci_partner_common_sop_msg_handler( /* Handle control message */ switch (PD_HEADER_TYPE(header)) { case PD_CTRL_SOFT_RESET: - data->msg_id = 0; + data->sop_msg_id = 0; tcpci_partner_send_control_msg(data, PD_CTRL_ACCEPT, 0); for (ext = data->extensions; ext != NULL; ext = ext->next) { @@ -781,6 +1139,9 @@ void tcpci_partner_common_disconnect(struct tcpci_partner_data *data) tcpci_partner_clear_msg_queue(data); tcpci_partner_stop_sender_response_timer(data); data->tcpci_emul = NULL; + data->displayport_configured = false; + data->entered_svid = 0; + atomic_clear(&data->mode_enter_attempts); } int tcpci_partner_common_enable_pd_logging(struct tcpci_partner_data *data, @@ -816,8 +1177,10 @@ static char *tcpci_partner_sender_names[] = { * * @return Number of written bytes */ -static __printf_like(4, 5) int tcpci_partner_print_to_buf( - char *buf, const int buf_len, int start, const char *fmt, ...) +static __printf_like(4, 5) int tcpci_partner_print_to_buf(char *buf, + const int buf_len, + int start, + const char *fmt, ...) { va_list ap; int ret; @@ -853,7 +1216,8 @@ void tcpci_partner_common_print_logged_msgs(struct tcpci_partner_data *data) chars_in += tcpci_partner_print_to_buf(buf, buf_len, chars_in, "===PD messages log:\n"); - SYS_SLIST_FOR_EACH_CONTAINER(&data->msg_log, msg, node) { + SYS_SLIST_FOR_EACH_CONTAINER(&data->msg_log, msg, node) + { /* * If there is too many messages to keep them in local buffer, * accept possibility of lines interleaving on console and print @@ -863,27 +1227,27 @@ void tcpci_partner_common_print_logged_msgs(struct tcpci_partner_data *data) LOG_PRINTK("%s", buf); chars_in = 0; } - chars_in += tcpci_partner_print_to_buf(buf, buf_len, chars_in, - "\tAt %lld Msg SOP %d from %s (status 0x%x):\n", - msg->time, msg->sop, - tcpci_partner_sender_names[msg->sender], - msg->status); + chars_in += tcpci_partner_print_to_buf( + buf, buf_len, chars_in, + "\tAt %lld Msg SOP %d from %s (status 0x%x):\n", + msg->time, msg->sop, + tcpci_partner_sender_names[msg->sender], msg->status); header = sys_get_le16(msg->buf); + chars_in += tcpci_partner_print_to_buf( + buf, buf_len, chars_in, + "\t\text=%d;cnt=%d;id=%d;pr=%d;dr=%d;rev=%d;type=%d\n", + PD_HEADER_EXT(header), PD_HEADER_CNT(header), + PD_HEADER_ID(header), PD_HEADER_PROLE(header), + PD_HEADER_DROLE(header), PD_HEADER_REV(header), + PD_HEADER_TYPE(header)); chars_in += tcpci_partner_print_to_buf(buf, buf_len, chars_in, - "\t\text=%d;cnt=%d;id=%d;pr=%d;dr=%d;rev=%d;type=%d\n", - PD_HEADER_EXT(header), PD_HEADER_CNT(header), - PD_HEADER_ID(header), PD_HEADER_PROLE(header), - PD_HEADER_DROLE(header), PD_HEADER_REV(header), - PD_HEADER_TYPE(header)); - chars_in += tcpci_partner_print_to_buf(buf, buf_len, chars_in, - "\t\t"); + "\t\t"); for (i = 0; i < msg->cnt; i++) { chars_in += tcpci_partner_print_to_buf( - buf, buf_len, chars_in, - "%02x ", msg->buf[i]); + buf, buf_len, chars_in, "%02x ", msg->buf[i]); } chars_in += tcpci_partner_print_to_buf(buf, buf_len, chars_in, - "\n"); + "\n"); } LOG_PRINTK("%s===\n", buf); @@ -920,11 +1284,10 @@ void tcpci_partner_common_set_ams_ctrl_msg(struct tcpci_partner_data *data, enum pd_ctrl_msg_type msg_type) { /* Make sure we handle one CTRL request at a time */ - zassert_equal( - data->cur_ams_ctrl_req, PD_CTRL_INVALID, - "More than one CTRL msg handled in parallel" - " cur_ams_ctrl_req=%d, msg_type=%d", - data->cur_ams_ctrl_req, msg_type); + zassert_equal(data->cur_ams_ctrl_req, PD_CTRL_INVALID, + "More than one CTRL msg handled in parallel" + " cur_ams_ctrl_req=%d, msg_type=%d", + data->cur_ams_ctrl_req, msg_type); data->cur_ams_ctrl_req = msg_type; } @@ -955,7 +1318,6 @@ void tcpci_partner_received_msg_status(struct tcpci_partner_data *data, LOG_WRN("Changing status of received message more than once"); } *data->received_msg_status = status; - } /** @@ -971,8 +1333,7 @@ void tcpci_partner_received_msg_status(struct tcpci_partner_data *data, static void tcpci_partner_transmit_op(const struct emul *emul, const struct tcpci_emul_partner_ops *ops, const struct tcpci_emul_msg *tx_msg, - enum tcpci_msg_type type, - int retry) + enum tcpci_msg_type type, int retry) { struct tcpci_partner_data *data = CONTAINER_OF(ops, struct tcpci_partner_data, ops); @@ -980,9 +1341,8 @@ static void tcpci_partner_transmit_op(const struct emul *emul, struct tcpci_partner_extension *ext; int ret; - data->received_msg_status = - tcpci_partner_log_msg(data, tx_msg, TCPCI_PARTNER_SENDER_TCPM, - TCPCI_EMUL_TX_UNKNOWN); + data->received_msg_status = tcpci_partner_log_msg( + data, tx_msg, TCPCI_PARTNER_SENDER_TCPM, TCPCI_EMUL_TX_UNKNOWN); ret = k_mutex_lock(&data->transmit_mutex, K_FOREVER); if (ret) { @@ -1002,8 +1362,8 @@ static void tcpci_partner_transmit_op(const struct emul *emul, goto message_handled; } - /* Skip handling of none SOP messages */ - if (type != TCPCI_MSG_SOP) { + /* Skip handling of non-SOP/SOP'/SOP'' messages */ + if (type > TCPCI_MSG_SOP_PRIME_PRIME) { /* Never send GoodCRC for cable reset */ if (data->send_goodcrc && type != TCPCI_MSG_CABLE_RESET) { tcpci_partner_received_msg_status( @@ -1013,10 +1373,22 @@ static void tcpci_partner_transmit_op(const struct emul *emul, } /* Call common SOP handler */ - processed = tcpci_partner_common_sop_msg_handler(data, tx_msg); - /* Always send GoodCRC for messages handled by common handler */ - if (data->send_goodcrc || - processed != TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED) { + if (type == TCPCI_MSG_SOP) { + processed = tcpci_partner_common_sop_msg_handler(data, tx_msg); + } else { + processed = + tcpci_partner_common_cable_handler(data, tx_msg, type); + } + if (processed == TCPCI_PARTNER_COMMON_MSG_NO_GOODCRC) { + /* + * Fail message send if common handler knows message shouldn't + * transit successfully. + */ + tcpci_partner_received_msg_status(data, TCPCI_EMUL_TX_FAILED); + goto message_handled; + } else if (data->send_goodcrc || + processed != TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED) { + /* Always send GoodCRC for messages handled by common handler */ tcpci_partner_received_msg_status(data, TCPCI_EMUL_TX_SUCCESS); } @@ -1036,8 +1408,7 @@ static void tcpci_partner_transmit_op(const struct emul *emul, } /* Send reject for not handled messages (PD rev 2.0) */ - tcpci_partner_send_control_msg(data, - PD_CTRL_REJECT, 0); + tcpci_partner_send_control_msg(data, PD_CTRL_REJECT, 0); message_handled: k_mutex_unlock(&data->transmit_mutex); @@ -1051,14 +1422,13 @@ message_handled: * @param ops Pointer to partner operations structure * @param rx_msg Message that was consumed by TCPM */ -static void tcpci_partner_rx_consumed_op( - const struct emul *emul, - const struct tcpci_emul_partner_ops *ops, - const struct tcpci_emul_msg *rx_msg) +static void +tcpci_partner_rx_consumed_op(const struct emul *emul, + const struct tcpci_emul_partner_ops *ops, + const struct tcpci_emul_msg *rx_msg) { - struct tcpci_partner_msg *msg = CONTAINER_OF(rx_msg, - struct tcpci_partner_msg, - msg); + struct tcpci_partner_msg *msg = + CONTAINER_OF(rx_msg, struct tcpci_partner_msg, msg); tcpci_partner_free_msg(msg); } @@ -1069,9 +1439,9 @@ static void tcpci_partner_rx_consumed_op( * @param emul Pointer to TCPCI emulator * @param ops Pointer to partner operations structure */ -static void tcpci_partner_disconnect_op( - const struct emul *emul, - const struct tcpci_emul_partner_ops *ops) +static void +tcpci_partner_disconnect_op(const struct emul *emul, + const struct tcpci_emul_partner_ops *ops) { struct tcpci_partner_data *data = CONTAINER_OF(ops, struct tcpci_partner_data, ops); @@ -1113,9 +1483,20 @@ int tcpci_partner_connect_to_tcpci(struct tcpci_partner_data *data, data->tcpci_emul = NULL; } + /* Clear any received battery capability info */ + tcpci_partner_reset_battery_capability_state(data); + return ret; } +void tcpci_partner_reset_battery_capability_state( + struct tcpci_partner_data *data) +{ + memset(&data->battery_capabilities, 0, + sizeof(data->battery_capabilities)); + data->battery_capabilities.index = -1; +} + void tcpci_partner_init(struct tcpci_partner_data *data, enum pd_rev_type rev) { k_timer_init(&data->delayed_send, tcpci_partner_delayed_send_timer, @@ -1144,4 +1525,13 @@ void tcpci_partner_init(struct tcpci_partner_data *data, enum pd_rev_type rev) data->ops.rx_consumed = tcpci_partner_rx_consumed_op; data->ops.control_change = NULL; data->ops.disconnect = tcpci_partner_disconnect_op; + data->displayport_configured = false; + data->entered_svid = 0; + atomic_clear(&data->mode_enter_attempts); + + /* Reset the data structure used to store battery capability responses + */ + tcpci_partner_reset_battery_capability_state(data); + + data->cable = NULL; } diff --git a/zephyr/emul/tcpc/emul_tcpci_partner_drp.c b/zephyr/emul/tcpc/emul_tcpci_partner_drp.c index 6c3abdac78..277957282d 100644 --- a/zephyr/emul/tcpc/emul_tcpci_partner_drp.c +++ b/zephyr/emul/tcpc/emul_tcpci_partner_drp.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ LOG_MODULE_REGISTER(tcpci_drp_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <zephyr/sys/byteorder.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "common.h" #include "emul/tcpc/emul_tcpci.h" @@ -28,10 +28,10 @@ LOG_MODULE_REGISTER(tcpci_drp_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); * @return TCPCI_PARTNER_COMMON_MSG_HANDLED Message was handled * @return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED Message wasn't handled */ -static enum tcpci_partner_handler_res tcpci_drp_emul_handle_sop_msg( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data, - const struct tcpci_emul_msg *msg) +static enum tcpci_partner_handler_res +tcpci_drp_emul_handle_sop_msg(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data, + const struct tcpci_emul_msg *msg) { struct tcpci_drp_emul_data *data = CONTAINER_OF(ext, struct tcpci_drp_emul_data, ext); @@ -46,9 +46,8 @@ static enum tcpci_partner_handler_res tcpci_drp_emul_handle_sop_msg( case PD_DATA_REQUEST: if (common_data->power_role == PD_ROLE_SINK) { /* As sink we shouldn't accept request */ - tcpci_partner_send_control_msg(common_data, - PD_CTRL_REJECT, - 0); + tcpci_partner_send_control_msg( + common_data, PD_CTRL_REJECT, 0); return TCPCI_PARTNER_COMMON_MSG_HANDLED; } /* As source, let source handler to handle this */ @@ -66,8 +65,7 @@ static enum tcpci_partner_handler_res tcpci_drp_emul_handle_sop_msg( switch (PD_HEADER_TYPE(header)) { case PD_CTRL_PR_SWAP: tcpci_partner_send_control_msg(common_data, - PD_CTRL_ACCEPT, - 0); + PD_CTRL_ACCEPT, 0); data->in_pwr_swap = true; return TCPCI_PARTNER_COMMON_MSG_HANDLED; case PD_CTRL_PS_RDY: @@ -77,8 +75,8 @@ static enum tcpci_partner_handler_res tcpci_drp_emul_handle_sop_msg( data->in_pwr_swap = false; /* Reset counters */ - common_data->msg_id = 0; - common_data->recv_msg_id = -1; + common_data->sop_msg_id = 0; + common_data->sop_recv_msg_id = -1; /* Perform power role swap */ if (common_data->power_role == PD_ROLE_SOURCE) { @@ -140,12 +138,12 @@ struct tcpci_partner_extension_ops tcpci_drp_emul_ops = { .connect = NULL, }; -struct tcpci_partner_extension *tcpci_drp_emul_init( - struct tcpci_drp_emul_data *data, - struct tcpci_partner_data *common_data, - enum pd_power_role power_role, - struct tcpci_partner_extension *src_ext, - struct tcpci_partner_extension *snk_ext) +struct tcpci_partner_extension * +tcpci_drp_emul_init(struct tcpci_drp_emul_data *data, + struct tcpci_partner_data *common_data, + enum pd_power_role power_role, + struct tcpci_partner_extension *src_ext, + struct tcpci_partner_extension *snk_ext) { struct tcpci_partner_extension *drp_ext = &data->ext; struct tcpci_src_emul_data *src_data = diff --git a/zephyr/emul/tcpc/emul_tcpci_partner_faulty_snk.c b/zephyr/emul/tcpc/emul_tcpci_partner_faulty_ext.c index c71b4bc833..fc4cd06b82 100644 --- a/zephyr/emul/tcpc/emul_tcpci_partner_faulty_snk.c +++ b/zephyr/emul/tcpc/emul_tcpci_partner_faulty_ext.c @@ -1,35 +1,34 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/logging/log.h> -LOG_MODULE_REGISTER(tcpci_faulty_snk_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); +LOG_MODULE_REGISTER(tcpci_faulty_ext, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <zephyr/sys/byteorder.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "common.h" #include "emul/tcpc/emul_tcpci.h" #include "emul/tcpc/emul_tcpci_partner_common.h" -#include "emul/tcpc/emul_tcpci_partner_faulty_snk.h" -#include "emul/tcpc/emul_tcpci_partner_snk.h" +#include "emul/tcpc/emul_tcpci_partner_faulty_ext.h" #include "usb_pd.h" /** * @brief Reduce number of times to repeat action. If count reaches zero, action * is removed from queue. * - * @param data Pointer to USB-C malfunctioning sink device extension data + * @param data Pointer to USB-C malfunctioning device extension data */ -static void tcpci_faulty_snk_emul_reduce_action_count( - struct tcpci_faulty_snk_emul_data *data) +static void +tcpci_faulty_ext_reduce_action_count(struct tcpci_faulty_ext_data *data) { - struct tcpci_faulty_snk_action *action; + struct tcpci_faulty_ext_action *action; action = k_fifo_peek_head(&data->action_list); - if (action->count == TCPCI_FAULTY_SNK_INFINITE_ACTION) { + if (action->count == TCPCI_FAULTY_EXT_INFINITE_ACTION) { return; } @@ -42,15 +41,13 @@ static void tcpci_faulty_snk_emul_reduce_action_count( k_fifo_get(&data->action_list, K_FOREVER); } -void tcpci_faulty_snk_emul_append_action( - struct tcpci_faulty_snk_emul_data *data, - struct tcpci_faulty_snk_action *action) +void tcpci_faulty_ext_append_action(struct tcpci_faulty_ext_data *data, + struct tcpci_faulty_ext_action *action) { k_fifo_put(&data->action_list, action); } -void tcpci_faulty_snk_emul_clear_actions_list( - struct tcpci_faulty_snk_emul_data *data) +void tcpci_faulty_ext_clear_actions_list(struct tcpci_faulty_ext_data *data) { while (!k_fifo_is_empty(&data->action_list)) { k_fifo_get(&data->action_list, K_FOREVER); @@ -60,21 +57,21 @@ void tcpci_faulty_snk_emul_clear_actions_list( /** * @brief Handle SOP messages as TCPCI malfunctioning device * - * @param ext Pointer to USB-C malfunctioning sink device emulator extension + * @param ext Pointer to USB-C malfunctioning device emulator extension * @param common_data Pointer to USB-C device emulator common data * @param msg Pointer to received message * * @return TCPCI_PARTNER_COMMON_MSG_HANDLED Message was handled * @return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED Message wasn't handled */ -static enum tcpci_partner_handler_res tcpci_faulty_snk_emul_handle_sop_msg( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data, - const struct tcpci_emul_msg *msg) +static enum tcpci_partner_handler_res +tcpci_faulty_ext_handle_sop_msg(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data, + const struct tcpci_emul_msg *msg) { - struct tcpci_faulty_snk_emul_data *data = - CONTAINER_OF(ext, struct tcpci_faulty_snk_emul_data, ext); - struct tcpci_faulty_snk_action *action; + struct tcpci_faulty_ext_data *data = + CONTAINER_OF(ext, struct tcpci_faulty_ext_data, ext); + struct tcpci_faulty_ext_action *action; uint16_t header; action = k_fifo_peek_head(&data->action_list); @@ -93,30 +90,29 @@ static enum tcpci_partner_handler_res tcpci_faulty_snk_emul_handle_sop_msg( switch (PD_HEADER_TYPE(header)) { case PD_DATA_SOURCE_CAP: if (action->action_mask & - TCPCI_FAULTY_SNK_FAIL_SRC_CAP) { + TCPCI_FAULTY_EXT_FAIL_SRC_CAP) { /* Fail is not sending GoodCRC from partner */ tcpci_partner_received_msg_status( common_data, TCPCI_EMUL_TX_FAILED); - tcpci_faulty_snk_emul_reduce_action_count(data); + tcpci_faulty_ext_reduce_action_count(data); return TCPCI_PARTNER_COMMON_MSG_HANDLED; } if (action->action_mask & - TCPCI_FAULTY_SNK_DISCARD_SRC_CAP) { + TCPCI_FAULTY_EXT_DISCARD_SRC_CAP) { /* Discard because partner is sending message */ tcpci_partner_received_msg_status( common_data, TCPCI_EMUL_TX_DISCARDED); tcpci_partner_send_control_msg( - common_data, - PD_CTRL_ACCEPT, 0); - tcpci_faulty_snk_emul_reduce_action_count(data); + common_data, PD_CTRL_ACCEPT, 0); + tcpci_faulty_ext_reduce_action_count(data); return TCPCI_PARTNER_COMMON_MSG_HANDLED; } if (action->action_mask & - TCPCI_FAULTY_SNK_IGNORE_SRC_CAP) { + TCPCI_FAULTY_EXT_IGNORE_SRC_CAP) { /* Send only GoodCRC */ tcpci_partner_received_msg_status( common_data, TCPCI_EMUL_TX_SUCCESS); - tcpci_faulty_snk_emul_reduce_action_count(data); + tcpci_faulty_ext_reduce_action_count(data); return TCPCI_PARTNER_COMMON_MSG_HANDLED; } } @@ -131,27 +127,27 @@ static enum tcpci_partner_handler_res tcpci_faulty_snk_emul_handle_sop_msg( return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; } -/** USB-C malfunctioning sink device extension callbacks */ -struct tcpci_partner_extension_ops tcpci_faulty_snk_emul_ops = { - .sop_msg_handler = tcpci_faulty_snk_emul_handle_sop_msg, +/** USB-C malfunctioning device extension callbacks */ +struct tcpci_partner_extension_ops tcpci_faulty_ext_ops = { + .sop_msg_handler = tcpci_faulty_ext_handle_sop_msg, .hard_reset = NULL, .soft_reset = NULL, .disconnect = NULL, .connect = NULL, }; -struct tcpci_partner_extension *tcpci_faulty_snk_emul_init( - struct tcpci_faulty_snk_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext) +struct tcpci_partner_extension * +tcpci_faulty_ext_init(struct tcpci_faulty_ext_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext) { - struct tcpci_partner_extension *snk_ext = &data->ext; + struct tcpci_partner_extension *faulty_ext = &data->ext; k_fifo_init(&data->action_list); common_data->send_goodcrc = false; - snk_ext->next = ext; - snk_ext->ops = &tcpci_faulty_snk_emul_ops; + faulty_ext->next = ext; + faulty_ext->ops = &tcpci_faulty_ext_ops; - return snk_ext; + return faulty_ext; } diff --git a/zephyr/emul/tcpc/emul_tcpci_partner_snk.c b/zephyr/emul/tcpc/emul_tcpci_partner_snk.c index 7ae3662170..8d0fe1fa1e 100644 --- a/zephyr/emul/tcpc/emul_tcpci_partner_snk.c +++ b/zephyr/emul/tcpc/emul_tcpci_partner_snk.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ LOG_MODULE_REGISTER(tcpci_snk_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <zephyr/sys/byteorder.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "common.h" #include "emul/tcpc/emul_tcpci.h" @@ -16,9 +16,9 @@ LOG_MODULE_REGISTER(tcpci_snk_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include "usb_pd.h" /** Length of PDO, RDO and BIST request object in SOP message in bytes */ -#define TCPCI_MSG_DO_LEN 4 +#define TCPCI_MSG_DO_LEN 4 /** Length of header in SOP message in bytes */ -#define TCPCI_MSG_HEADER_LEN 2 +#define TCPCI_MSG_HEADER_LEN 2 /** * @brief Get number of PDOs that will be present in sink capability message @@ -51,18 +51,17 @@ static int tcpci_snk_emul_num_of_pdos(struct tcpci_snk_emul_data *data) * @return -ENOMEM when there is no free memory for message * @return -EINVAL on TCPCI emulator add RX message error */ -static int tcpci_snk_emul_send_capability_msg( - struct tcpci_snk_emul_data *data, - struct tcpci_partner_data *common_data, - uint64_t delay) +static int +tcpci_snk_emul_send_capability_msg(struct tcpci_snk_emul_data *data, + struct tcpci_partner_data *common_data, + uint64_t delay) { int pdos; /* Find number of PDOs */ pdos = tcpci_snk_emul_num_of_pdos(data); - return tcpci_partner_send_data_msg(common_data, - PD_DATA_SINK_CAP, + return tcpci_partner_send_data_msg(common_data, PD_DATA_SINK_CAP, data->pdo, pdos, delay); } @@ -95,8 +94,8 @@ static int tcpci_snk_emul_are_pdos_complementary(uint32_t src_pdo, /* Voltage doesn't match */ return -1; } - missing_current = PDO_FIXED_CURRENT(snk_pdo) - - PDO_FIXED_CURRENT(src_pdo); + missing_current = + PDO_FIXED_CURRENT(snk_pdo) - PDO_FIXED_CURRENT(src_pdo); break; case PDO_TYPE_BATTERY: if ((PDO_BATT_MIN_VOLTAGE(snk_pdo) < @@ -111,8 +110,8 @@ static int tcpci_snk_emul_are_pdos_complementary(uint32_t src_pdo, * = P / V * 5 [A] = P / V * 500 * 10[mA] */ missing_current = (PDO_BATT_MAX_POWER(snk_pdo) - - PDO_BATT_MAX_POWER(src_pdo)) * 500 / - PDO_BATT_MAX_VOLTAGE(src_pdo); + PDO_BATT_MAX_POWER(src_pdo)) * + 500 / PDO_BATT_MAX_VOLTAGE(src_pdo); break; case PDO_TYPE_VARIABLE: if ((PDO_VAR_MIN_VOLTAGE(snk_pdo) < @@ -147,8 +146,8 @@ static int tcpci_snk_emul_are_pdos_complementary(uint32_t src_pdo, * @return PDO on success * @return 0 when there is no PDO of given index in message */ -static uint32_t tcpci_snk_emul_get_pdo_from_cap( - const struct tcpci_emul_msg *msg, int pdo_num) +static uint32_t +tcpci_snk_emul_get_pdo_from_cap(const struct tcpci_emul_msg *msg, int pdo_num) { int addr; @@ -240,10 +239,10 @@ static uint32_t tcpci_snk_emul_create_rdo(uint32_t src_pdo, uint32_t snk_pdo, * @param common_data Pointer to common TCPCI partner data * @param msg Source capability message */ -static void tcpci_snk_emul_handle_source_cap( - struct tcpci_snk_emul_data *data, - struct tcpci_partner_data *common_data, - const struct tcpci_emul_msg *msg) +static void +tcpci_snk_emul_handle_source_cap(struct tcpci_snk_emul_data *data, + struct tcpci_partner_data *common_data, + const struct tcpci_emul_msg *msg) { uint32_t rdo = 0; uint32_t pdo; @@ -263,17 +262,22 @@ static void tcpci_snk_emul_handle_source_cap( snk_pdos = tcpci_snk_emul_num_of_pdos(data); src_pdos = (msg->cnt - TCPCI_MSG_HEADER_LEN) / TCPCI_MSG_DO_LEN; + /* + * Store the 5V fixed PDO for future reference (required to be index 0 + * by spec) + */ + data->last_5v_source_cap = tcpci_snk_emul_get_pdo_from_cap(msg, 0); + /* Find if any source PDO satisfy any sink PDO */ for (int pdo_num = 0; pdo_num < src_pdos; pdo_num++) { pdo = tcpci_snk_emul_get_pdo_from_cap(msg, pdo_num); for (int i = skip_first_pdo; i < snk_pdos; i++) { missing_current = tcpci_snk_emul_are_pdos_complementary( - pdo, data->pdo[i]); + pdo, data->pdo[i]); if (missing_current == 0) { - rdo = tcpci_snk_emul_create_rdo(pdo, - data->pdo[i], - pdo_num + 1); + rdo = tcpci_snk_emul_create_rdo( + pdo, data->pdo[i], pdo_num + 1); break; } } @@ -350,6 +354,11 @@ void tcpci_snk_emul_clear_alert_received(struct tcpci_snk_emul_data *data) data->alert_received = false; } +void tcpci_snk_emul_clear_last_5v_cap(struct tcpci_snk_emul_data *data) +{ + data->last_5v_source_cap = 0; +} + /** * @brief Handle SOP messages as TCPCI sink device. It handles source cap, * get sink cap and ping messages. Accept, Reject and PS_RDY are handled @@ -363,10 +372,10 @@ void tcpci_snk_emul_clear_alert_received(struct tcpci_snk_emul_data *data) * @param TCPCI_PARTNER_COMMON_MSG_HANDLED Message was handled * @param TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED Message wasn't handled */ -static enum tcpci_partner_handler_res tcpci_snk_emul_handle_sop_msg( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data, - const struct tcpci_emul_msg *msg) +static enum tcpci_partner_handler_res +tcpci_snk_emul_handle_sop_msg(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data, + const struct tcpci_emul_msg *msg) { struct tcpci_snk_emul_data *data = CONTAINER_OF(ext, struct tcpci_snk_emul_data, ext); @@ -404,20 +413,19 @@ static enum tcpci_partner_handler_res tcpci_snk_emul_handle_sop_msg( __ASSERT(data->wait_for_ps_rdy, "Unexpected PS RDY message"); tcpci_snk_emul_stop_partner_transition_timer( - data, common_data); + data, common_data); data->pd_completed = true; return TCPCI_PARTNER_COMMON_MSG_HANDLED; case PD_CTRL_REJECT: tcpci_partner_stop_sender_response_timer(common_data); /* Request rejected. Ask for capabilities again. */ - tcpci_partner_send_control_msg(common_data, - PD_CTRL_GET_SOURCE_CAP, - 0); + tcpci_partner_send_control_msg( + common_data, PD_CTRL_GET_SOURCE_CAP, 0); return TCPCI_PARTNER_COMMON_MSG_HANDLED; case PD_CTRL_ACCEPT: tcpci_partner_stop_sender_response_timer(common_data); tcpci_snk_emul_start_partner_transition_timer( - data, common_data); + data, common_data); return TCPCI_PARTNER_COMMON_MSG_HANDLED; default: return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; @@ -459,9 +467,9 @@ static void tcpci_snk_emul_hard_reset(struct tcpci_partner_extension *ext, * @return 0 on success * @return negative on TCPCI connect error */ -static int tcpci_snk_emul_connect_to_tcpci( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data) +static int +tcpci_snk_emul_connect_to_tcpci(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data) { struct tcpci_snk_emul_data *data = CONTAINER_OF(ext, struct tcpci_snk_emul_data, ext); @@ -489,10 +497,10 @@ struct tcpci_partner_extension_ops tcpci_snk_emul_ops = { .connect = tcpci_snk_emul_connect_to_tcpci, }; -struct tcpci_partner_extension *tcpci_snk_emul_init( - struct tcpci_snk_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext) +struct tcpci_partner_extension * +tcpci_snk_emul_init(struct tcpci_snk_emul_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext) { struct tcpci_partner_extension *snk_ext = &data->ext; diff --git a/zephyr/emul/tcpc/emul_tcpci_partner_src.c b/zephyr/emul/tcpc/emul_tcpci_partner_src.c index 8efc4327c8..c81d69c25f 100644 --- a/zephyr/emul/tcpc/emul_tcpci_partner_src.c +++ b/zephyr/emul/tcpc/emul_tcpci_partner_src.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ LOG_MODULE_REGISTER(tcpci_src_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <zephyr/sys/byteorder.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "common.h" #include "emul/tcpc/emul_tcpci_partner_common.h" @@ -35,11 +35,11 @@ static void tcpci_src_emul_start_source_capability_custom_time( * * @param data Pointer to USB-C source device emulator data */ -static void tcpci_src_emul_start_source_capability_timer( - struct tcpci_src_emul_data *data) +static void +tcpci_src_emul_start_source_capability_timer(struct tcpci_src_emul_data *data) { tcpci_src_emul_start_source_capability_custom_time( - data, TCPCI_SOURCE_CAPABILITY_TIMEOUT); + data, TCPCI_SOURCE_CAPABILITY_TIMEOUT); } /** @@ -47,8 +47,8 @@ static void tcpci_src_emul_start_source_capability_timer( * * @param data Pointer to USB-C source device emulator data */ -static void tcpci_src_emul_stop_source_capability_timer( - struct tcpci_src_emul_data *data) +static void +tcpci_src_emul_stop_source_capability_timer(struct tcpci_src_emul_data *data) { k_work_cancel_delayable(&data->source_capability_timeout); } @@ -66,21 +66,19 @@ int tcpci_src_emul_send_capability_msg(struct tcpci_src_emul_data *data, } } - return tcpci_partner_send_data_msg(common_data, - PD_DATA_SOURCE_CAP, + return tcpci_partner_send_data_msg(common_data, PD_DATA_SOURCE_CAP, data->pdo, pdos, delay); } int tcpci_src_emul_send_capability_msg_with_timer( struct tcpci_src_emul_data *data, - struct tcpci_partner_data *common_data, - uint64_t delay) + struct tcpci_partner_data *common_data, uint64_t delay) { int ret; if (delay > 0) { tcpci_src_emul_start_source_capability_custom_time( - data, K_MSEC(delay)); + data, K_MSEC(delay)); return TCPCI_EMUL_TX_SUCCESS; } @@ -119,10 +117,10 @@ void tcpci_src_emul_clear_status_received(struct tcpci_src_emul_data *data) * @param TCPCI_PARTNER_COMMON_MSG_HANDLED Message was handled * @param TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED Message wasn't handled */ -static enum tcpci_partner_handler_res tcpci_src_emul_handle_sop_msg( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data, - const struct tcpci_emul_msg *msg) +static enum tcpci_partner_handler_res +tcpci_src_emul_handle_sop_msg(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data, + const struct tcpci_emul_msg *msg) { struct tcpci_src_emul_data *data = CONTAINER_OF(ext, struct tcpci_src_emul_data, ext); @@ -171,9 +169,8 @@ static enum tcpci_partner_handler_res tcpci_src_emul_handle_sop_msg( return TCPCI_PARTNER_COMMON_MSG_HANDLED; case PD_CTRL_GET_REVISION: rmdo = 0x31000000; - tcpci_partner_send_data_msg(common_data, - PD_DATA_REVISION, - &rmdo, 1, 0); + tcpci_partner_send_data_msg( + common_data, PD_DATA_REVISION, &rmdo, 1, 0); return TCPCI_PARTNER_COMMON_MSG_HANDLED; default: return TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED; @@ -189,9 +186,8 @@ static enum tcpci_partner_handler_res tcpci_src_emul_handle_sop_msg( static void tcpci_src_emul_source_capability_timeout(struct k_work *work) { struct k_work_delayable *dwork = k_work_delayable_from_work(work); - struct tcpci_src_emul_data *data = - CONTAINER_OF(dwork, struct tcpci_src_emul_data, - source_capability_timeout); + struct tcpci_src_emul_data *data = CONTAINER_OF( + dwork, struct tcpci_src_emul_data, source_capability_timeout); struct tcpci_partner_data *common_data = data->common_data; if (k_mutex_lock(&common_data->transmit_mutex, K_NO_WAIT) != 0) { @@ -278,9 +274,9 @@ static void tcpci_src_emul_disconnect(struct tcpci_partner_extension *ext, * @return 0 on success * @return negative on TCPCI connect error */ -static int tcpci_src_emul_connect_to_tcpci( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data) +static int +tcpci_src_emul_connect_to_tcpci(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data) { struct tcpci_src_emul_data *data = CONTAINER_OF(ext, struct tcpci_src_emul_data, ext); @@ -298,15 +294,14 @@ static int tcpci_src_emul_connect_to_tcpci( * capabilities, but it is permit. Timeout is obligatory for power swap. */ tcpci_src_emul_send_capability_msg_with_timer( - data, common_data, - TCPCI_SWAP_SOURCE_START_TIMEOUT_MS); + data, common_data, TCPCI_SWAP_SOURCE_START_TIMEOUT_MS); return 0; } -#define PDO_FIXED_FLAGS_MASK \ - (PDO_FIXED_DUAL_ROLE | PDO_FIXED_UNCONSTRAINED | \ - PDO_FIXED_COMM_CAP | PDO_FIXED_DATA_SWAP) +#define PDO_FIXED_FLAGS_MASK \ + (PDO_FIXED_DUAL_ROLE | PDO_FIXED_UNCONSTRAINED | PDO_FIXED_COMM_CAP | \ + PDO_FIXED_DATA_SWAP) enum check_pdos_res tcpci_src_emul_check_pdos(struct tcpci_src_emul_data *data) { @@ -411,10 +406,10 @@ struct tcpci_partner_extension_ops tcpci_src_emul_ops = { .connect = tcpci_src_emul_connect_to_tcpci, }; -struct tcpci_partner_extension *tcpci_src_emul_init( - struct tcpci_src_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext) +struct tcpci_partner_extension * +tcpci_src_emul_init(struct tcpci_src_emul_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext) { struct tcpci_partner_extension *src_ext = &data->ext; diff --git a/zephyr/fake/CMakeLists.txt b/zephyr/fake/CMakeLists.txt new file mode 100644 index 0000000000..6b9f16bc20 --- /dev/null +++ b/zephyr/fake/CMakeLists.txt @@ -0,0 +1,7 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +zephyr_library_sources_ifdef(CONFIG_SYSTEM_FAKE system_fake.c) + +cros_ec_library_include_directories(include) diff --git a/zephyr/fake/Kconfig b/zephyr/fake/Kconfig new file mode 100644 index 0000000000..c5f6fef669 --- /dev/null +++ b/zephyr/fake/Kconfig @@ -0,0 +1,11 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config SYSTEM_FAKE + bool "Use a fake system module" + help + This provides a fake implementation of some of the hooks used by + common/system.c so that EC reboots can be faked. + + It should only be included in tests. diff --git a/zephyr/fake/include/system_fake.h b/zephyr/fake/include/system_fake.h new file mode 100644 index 0000000000..b80624e289 --- /dev/null +++ b/zephyr/fake/include/system_fake.h @@ -0,0 +1,23 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_FAKE_SYSTEM_FAKE_H +#define ZEPHYR_FAKE_SYSTEM_FAKE_H + +#include <setjmp.h> + +#include "ec_commands.h" + +/** + * @brief Set the current image copy. + */ +void system_set_shrspi_image_copy(enum ec_image new_image_copy); + +/** + * @brief Set the fake environment + */ +void system_fake_setenv(jmp_buf *env); + +#endif /* ZEPHYR_FAKE_SYSTEM_FAKE_H */ diff --git a/zephyr/fake/system_fake.c b/zephyr/fake/system_fake.c new file mode 100644 index 0000000000..75beb62b23 --- /dev/null +++ b/zephyr/fake/system_fake.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <setjmp.h> + +#include "system.h" +#include "system_fake.h" + +static enum ec_image shrspi_image_copy = EC_IMAGE_RO; + +/* setjmp environment to use for reboot (NULL if none) */ +static jmp_buf *jump_env; + +void system_fake_setenv(jmp_buf *env) +{ + jump_env = env; +} + +void system_jump_to_booter(void) +{ + if (jump_env) + longjmp(*jump_env, 1); +} + +uint32_t system_get_lfw_address(void) +{ + uint32_t jump_addr = (uint32_t)system_jump_to_booter; + + return jump_addr; +} + +enum ec_image system_get_shrspi_image_copy(void) +{ + return shrspi_image_copy; +} + +void system_set_shrspi_image_copy(enum ec_image new_image_copy) +{ + shrspi_image_copy = new_image_copy; +} + +void system_set_image_copy(enum ec_image copy) +{ +} diff --git a/zephyr/firmware_builder.py b/zephyr/firmware_builder.py index 21767d635a..436760361a 100755 --- a/zephyr/firmware_builder.py +++ b/zephyr/firmware_builder.py @@ -1,6 +1,6 @@ #!/usr/bin/env python3 # -*- coding: utf-8 -*- -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Build and test all of the Zephyr boards. @@ -12,73 +12,120 @@ import argparse import multiprocessing import pathlib import re +import shlex import subprocess import sys -from google.protobuf import json_format # pylint: disable=import-error import zmake.project - from chromite.api.gen_sdk.chromite.api import firmware_pb2 +from google.protobuf import json_format # pylint: disable=import-error - -DEFAULT_BUNDLE_DIRECTORY = '/tmp/artifact_bundles' -DEFAULT_BUNDLE_METADATA_FILE = '/tmp/artifact_bundle_metadata' +DEFAULT_BUNDLE_DIRECTORY = "/tmp/artifact_bundles" +DEFAULT_BUNDLE_METADATA_FILE = "/tmp/artifact_bundle_metadata" + +# Boards that we want to track the coverage of our own files specifically. +SPECIAL_BOARDS = ["herobrine"] + + +def log_cmd(cmd): + """Log subprocess command.""" + print(" ".join(shlex.quote(str(x)) for x in cmd)) + sys.stdout.flush() + + +def run_twister(platform_ec, code_coverage=False, extra_args=None): + """Build the tests using twister.""" + cmd = [ + platform_ec / "twister", + "--outdir", + platform_ec / "twister-out", + "-v", + "-i", + "-p", + "native_posix", + "-p", + "unit_testing", + "--no-upload-cros-rdb", + ] + + if extra_args: + cmd.extend(extra_args) + + if code_coverage: + # Tell Twister to collect coverage data. We must specify an explicit platform + # type in this case, as well. + cmd.extend( + [ + "--coverage", + ] + ) + log_cmd(cmd) + subprocess.run(cmd, check=True, cwd=platform_ec, stdin=subprocess.DEVNULL) def build(opts): """Builds all Zephyr firmware targets""" metric_list = firmware_pb2.FwBuildMetricList() - cmd = ['zmake', '-D', 'build', '-a'] + zephyr_dir = pathlib.Path(__file__).parent.resolve() + platform_ec = zephyr_dir.parent + subprocess.run( + [platform_ec / "util" / "check_clang_format.py"], + check=True, + cwd=platform_ec, + stdin=subprocess.DEVNULL, + ) + + cmd = ["zmake", "-D", "build", "-a"] if opts.code_coverage: - cmd.append('--coverage') - subprocess.run(cmd, cwd=pathlib.Path(__file__).parent, check=True) + cmd.append("--coverage") + log_cmd(cmd) + subprocess.run(cmd, cwd=zephyr_dir, check=True, stdin=subprocess.DEVNULL) if not opts.code_coverage: - zephyr_dir = pathlib.Path(__file__).parent - platform_ec = zephyr_dir.resolve().parent for project in zmake.project.find_projects(zephyr_dir).values(): if project.config.is_test: continue build_dir = ( - platform_ec / 'build' / 'zephyr' / project.config.project_name + platform_ec / "build" / "zephyr" / project.config.project_name ) metric = metric_list.value.add() metric.target_name = project.config.project_name metric.platform_name = project.config.zephyr_board for (variant, _) in project.iter_builds(): - build_log = build_dir / f'build-{variant}' / 'build.log' + build_log = build_dir / f"build-{variant}" / "build.log" parse_buildlog(build_log, metric, variant.upper()) - with open(opts.metrics, 'w') as file: + with open(opts.metrics, "w") as file: file.write(json_format.MessageToJson(metric_list)) - return 0 + + run_twister(platform_ec, opts.code_coverage, ["--build-only"]) UNITS = { - 'B': 1, - 'KB': 1024, - 'MB': 1024 * 1024, - 'GB': 1024 * 1024 * 1024, + "B": 1, + "KB": 1024, + "MB": 1024 * 1024, + "GB": 1024 * 1024 * 1024, } def parse_buildlog(filename, metric, variant): """Parse the build.log generated by zmake to find the size of the image.""" - with open(filename, 'r') as infile: + with open(filename, "r") as infile: # Skip over all lines until the memory report is found while True: line = infile.readline() if not line: return - if line.startswith('Memory region'): + if line.startswith("Memory region"): break for line in infile.readlines(): # Skip any lines that are not part of the report - if not line.startswith(' '): + if not line.startswith(" "): continue parts = line.split() fw_section = metric.fw_section.add() - fw_section.region = variant + '_' + parts[0][:-1] + fw_section.region = variant + "_" + parts[0][:-1] fw_section.used = int(parts[1]) * UNITS[parts[2]] fw_section.total = int(parts[3]) * UNITS[parts[4]] fw_section.track_on_gerrit = False @@ -112,7 +159,7 @@ def write_metadata(opts, info): bundle_metadata_file = ( opts.metadata if opts.metadata else DEFAULT_BUNDLE_METADATA_FILE ) - with open(bundle_metadata_file, 'w') as file: + with open(bundle_metadata_file, "w") as file: file.write(json_format.MessageToJson(info)) @@ -121,18 +168,29 @@ def bundle_coverage(opts): info = firmware_pb2.FirmwareArtifactInfo() info.bcs_version_info.version_string = opts.bcs_version bundle_dir = get_bundle_dir(opts) - zephyr_dir = pathlib.Path(__file__).parent - platform_ec = zephyr_dir.resolve().parent - build_dir = platform_ec / 'build' / 'zephyr' - tarball_name = 'coverage.tbz2' + zephyr_dir = pathlib.Path(__file__).parent.resolve() + platform_ec = zephyr_dir.parent + build_dir = platform_ec / "build" / "zephyr" + tarball_name = "coverage.tbz2" tarball_path = bundle_dir / tarball_name - cmd = ['tar', 'cvfj', tarball_path, 'lcov.info'] - subprocess.run(cmd, cwd=build_dir, check=True) + cmd = ["tar", "cvfj", tarball_path, "lcov.info"] + log_cmd(cmd) + subprocess.run(cmd, cwd=build_dir, check=True, stdin=subprocess.DEVNULL) meta = info.objects.add() meta.file_name = tarball_name meta.lcov_info.type = ( firmware_pb2.FirmwareArtifactInfo.LcovTarballInfo.LcovType.LCOV ) + (bundle_dir / "html").mkdir(exist_ok=True) + cmd = ["mv", "lcov_rpt"] + for board in SPECIAL_BOARDS: + cmd.append(board + "_rpt") + cmd.append(bundle_dir / "html/") + log_cmd(cmd) + subprocess.run(cmd, cwd=build_dir, check=True, stdin=subprocess.DEVNULL) + meta = info.objects.add() + meta.file_name = "html" + meta.coverage_html.SetInParent() write_metadata(opts, info) @@ -142,19 +200,22 @@ def bundle_firmware(opts): info = firmware_pb2.FirmwareArtifactInfo() info.bcs_version_info.version_string = opts.bcs_version bundle_dir = get_bundle_dir(opts) - zephyr_dir = pathlib.Path(__file__).parent - platform_ec = zephyr_dir.resolve().parent + zephyr_dir = pathlib.Path(__file__).parent.resolve() + platform_ec = zephyr_dir.parent for project in zmake.project.find_projects(zephyr_dir).values(): if project.config.is_test: continue build_dir = ( - platform_ec / 'build' / 'zephyr' / project.config.project_name + platform_ec / "build" / "zephyr" / project.config.project_name ) - artifacts_dir = build_dir / 'output' - tarball_name = f'{project.config.project_name}.firmware.tbz2' + artifacts_dir = build_dir / "output" + tarball_name = f"{project.config.project_name}.firmware.tbz2" tarball_path = bundle_dir.joinpath(tarball_name) - cmd = ['tar', 'cvfj', tarball_path, '.'] - subprocess.run(cmd, cwd=artifacts_dir, check=True) + cmd = ["tar", "cvfj", tarball_path, "."] + log_cmd(cmd) + subprocess.run( + cmd, cwd=artifacts_dir, check=True, stdin=subprocess.DEVNULL + ) meta = info.objects.add() meta.file_name = tarball_name meta.tarball_info.type = ( @@ -174,50 +235,296 @@ def test(opts): # Run zmake tests to ensure we have a fully working zmake before # proceeding. - subprocess.run([zephyr_dir / 'zmake' / 'run_tests.sh'], check=True) + subprocess.run( + [zephyr_dir / "zmake" / "run_tests.sh"], + check=True, + cwd=zephyr_dir, + stdin=subprocess.DEVNULL, + ) - # Run formatting checks on all BUILD.py files. - config_files = zephyr_dir.rglob('**/BUILD.py') - subprocess.run(['black', '--diff', '--check', *config_files], check=True) + # Twister-based tests + platform_ec = zephyr_dir.parent + third_party = platform_ec.parent.parent / "third_party" + run_twister(platform_ec, opts.code_coverage, ["--test-only"]) - cmd = ['zmake', '-D', 'test', '-a', '--no-rebuild'] if opts.code_coverage: - cmd.append('--coverage') - ret = subprocess.run(cmd, check=True).returncode - if ret: - return ret - if opts.code_coverage: - platform_ec = zephyr_dir.parent - build_dir = platform_ec / 'build' / 'zephyr' + build_dir = platform_ec / "build" / "zephyr" # Merge lcov files here because bundle failures are "infra" failures. + output = subprocess.run( + [ + "/usr/bin/lcov", + "--summary", + platform_ec / "twister-out" / "coverage.info", + ], + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary("EC_ZEPHYR_TESTS", metrics, output) + + cmd = ["make", "test-coverage", f"-j{opts.cpus}"] + log_cmd(cmd) + subprocess.run( + cmd, cwd=platform_ec, check=True, stdin=subprocess.DEVNULL + ) + + output = subprocess.run( + [ + "/usr/bin/lcov", + "--summary", + platform_ec / "build/coverage/lcov.info", + ], + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary("EC_LEGACY_TESTS", metrics, output) + cmd = [ - '/usr/bin/lcov', - '-o', - build_dir / 'lcov.info', - '--rc', - 'lcov_branch_coverage=1', - '-a', - build_dir / 'all_tests.info', - '-a', - build_dir / 'all_builds.info', + "/usr/bin/lcov", + "-o", + build_dir / "all_tests.info", + "--rc", + "lcov_branch_coverage=1", + "-a", + platform_ec / "build/coverage/lcov.info", + "-a", + platform_ec / "twister-out" / "coverage.info", ] + log_cmd(cmd) output = subprocess.run( - cmd, cwd=pathlib.Path(__file__).parent, check=True, - stdout=subprocess.PIPE, universal_newlines=True).stdout - _extract_lcov_summary('EC_ZEPHYR_MERGED', metrics, output) + cmd, + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary("ALL_TESTS", metrics, output) + cmd = [ + "/usr/bin/lcov", + "-o", + build_dir / "zephyr_merged.info", + "--rc", + "lcov_branch_coverage=1", + "-a", + build_dir / "all_builds.info", + "-a", + build_dir / "all_tests.info", + ] + log_cmd(cmd) output = subprocess.run( - ['/usr/bin/lcov', '--summary', build_dir / 'all_tests.info'], - cwd=pathlib.Path(__file__).parent, check=True, - stdout=subprocess.PIPE, universal_newlines=True).stdout - _extract_lcov_summary('EC_ZEPHYR_TESTS', metrics, output) + cmd, + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary("EC_ZEPHYR_MERGED", metrics, output) - with open(opts.metrics, 'w') as file: - file.write(json_format.MessageToJson(metrics)) - return 0 + cmd = [ + "/usr/bin/lcov", + "-o", + build_dir / "lcov_unfiltered.info", + "--rc", + "lcov_branch_coverage=1", + "-a", + build_dir / "zephyr_merged.info", + "-a", + platform_ec / "build/coverage/lcov.info", + ] + log_cmd(cmd) + subprocess.run( + cmd, + cwd=zephyr_dir, + check=True, + stdin=subprocess.DEVNULL, + ) + + test_patterns = [ + platform_ec / "test/**", + platform_ec / "private/fingerprint/google-fpalg/mcutest/**", + zephyr_dir / "test/**", + zephyr_dir / "emul/**", + zephyr_dir / "mock/**", + third_party / "zephyr/main/subsys/emul/**", + third_party / "zephyr/main/subsys/testsuite/**", + ] + + generated_and_system_patterns = [ + platform_ec / "build/**", + platform_ec / "twister-out*/**", + "/usr/include/**", + "/usr/lib/**", + ] + + cmd = [ + "/usr/bin/lcov", + "-o", + build_dir / "lcov.info", + "--rc", + "lcov_branch_coverage=1", + "-r", + build_dir / "lcov_unfiltered.info", + ] + generated_and_system_patterns + log_cmd(cmd) + output = subprocess.run( + cmd, + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary("ALL_MERGED", metrics, output) + + # Create an info file without any test code, just for the metric. + cmd = [ + "/usr/bin/lcov", + "-o", + build_dir / "lcov_no_tests.info", + "--rc", + "lcov_branch_coverage=1", + "-r", + build_dir / "lcov.info", + ] + test_patterns + log_cmd(cmd) + output = subprocess.run( + cmd, + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary("ALL_FILTERED", metrics, output) + + subprocess.run( + [ + "/usr/bin/genhtml", + "--branch-coverage", + "-q", + "-o", + build_dir / "lcov_rpt", + "-t", + "All boards and tests merged", + "-s", + build_dir / "lcov.info", + ], + cwd=zephyr_dir, + check=True, + stdin=subprocess.DEVNULL, + ) + + for board in SPECIAL_BOARDS: + # Merge board coverage with tests + cmd = [ + "/usr/bin/lcov", + "-o", + build_dir / (board + "_merged.info"), + "--rc", + "lcov_branch_coverage=1", + "-a", + build_dir / "all_tests.info", + "-a", + build_dir / board / "output/zephyr.info", + ] + log_cmd(cmd) + subprocess.run( + cmd, + cwd=zephyr_dir, + check=True, + stdin=subprocess.DEVNULL, + ) + # Exclude file patterns we don't want + cmd = ( + [ + "/usr/bin/lcov", + "-o", + build_dir / (board + "_filtered.info"), + "--rc", + "lcov_branch_coverage=1", + "-r", + build_dir / (board + "_merged.info"), + # Exclude third_party code (specifically zephyr) + third_party / "**", + # These are questionable, but they are essentially untestable + zephyr_dir / "drivers/**", + zephyr_dir / "include/drivers/**", + zephyr_dir / "projects/**", + zephyr_dir / "shim/chip/**", + zephyr_dir / "shim/chip/npcx/npcx_monitor/**", + zephyr_dir / "shim/core/**", + ] + + generated_and_system_patterns + + test_patterns + ) + log_cmd(cmd) + subprocess.run( + cmd, + cwd=zephyr_dir, + check=True, + stdin=subprocess.DEVNULL, + ) + # Then keep only files present in the board build + filenames = set() + with open( + build_dir / board / "output/zephyr.info", "r" + ) as board_cov: + for line in board_cov.readlines(): + if line.startswith("SF:"): + filenames.add(line[3:-1]) + cmd = [ + "/usr/bin/lcov", + "-o", + build_dir / (board + "_final.info"), + "--rc", + "lcov_branch_coverage=1", + "-e", + build_dir / (board + "_filtered.info"), + ] + list(filenames) + log_cmd(cmd) + output = subprocess.run( + cmd, + cwd=zephyr_dir, + check=True, + stdout=subprocess.PIPE, + universal_newlines=True, + stdin=subprocess.DEVNULL, + ).stdout + _extract_lcov_summary(f"BOARD_{board}".upper(), metrics, output) + subprocess.run( + [ + "/usr/bin/genhtml", + "--branch-coverage", + "-q", + "-o", + build_dir / (board + "_rpt"), + "-t", + f"{board} ec code only", + "-s", + build_dir / (board + "_final.info"), + ], + cwd=zephyr_dir, + check=True, + stdin=subprocess.DEVNULL, + ) + + with open(opts.metrics, "w") as file: + file.write(json_format.MessageToJson(metrics)) # type: ignore + + +COVERAGE_RE = re.compile( + r"lines\.*: *([0-9\.]+)% \(([0-9]+) of ([0-9]+) lines\)" +) -COVERAGE_RE = re.compile(r'lines\.*: *([0-9\.]+)% \(([0-9]+) of ([0-9]+) lines\)') def _extract_lcov_summary(name, metrics, output): re_match = COVERAGE_RE.search(output) if re_match: @@ -227,16 +534,18 @@ def _extract_lcov_summary(name, metrics, output): metric.covered_lines = int(re_match.group(2)) metric.total_lines = int(re_match.group(3)) + def main(args): """Builds and tests all of the Zephyr targets and reports build metrics""" opts = parse_args(args) - if not hasattr(opts, 'func'): - print('Must select a valid sub command!') + if not hasattr(opts, "func"): + print("Must select a valid sub command!") return -1 # Run selected sub command function - return opts.func(opts) + opts.func(opts) + return 0 def parse_args(args): @@ -244,70 +553,70 @@ def parse_args(args): parser = argparse.ArgumentParser(description=__doc__) parser.add_argument( - '--cpus', + "--cpus", default=multiprocessing.cpu_count(), - help='The number of cores to use.', + help="The number of cores to use.", ) parser.add_argument( - '--metrics', - dest='metrics', + "--metrics", + dest="metrics", required=True, - help='File to write the json-encoded MetricsList proto message.', + help="File to write the json-encoded MetricsList proto message.", ) parser.add_argument( - '--metadata', + "--metadata", required=False, help=( - 'Full pathname for the file in which to write build artifact ' - 'metadata.' + "Full pathname for the file in which to write build artifact " + "metadata." ), ) parser.add_argument( - '--output-dir', + "--output-dir", required=False, help=( - 'Full pathname for the directory in which to bundle build ' - 'artifacts.' + "Full pathname for the directory in which to bundle build " + "artifacts." ), ) parser.add_argument( - '--code-coverage', + "--code-coverage", required=False, - action='store_true', - help='Build host-based unit tests for code coverage.', + action="store_true", + help="Build host-based unit tests for code coverage.", ) parser.add_argument( - '--bcs-version', - dest='bcs_version', - default='', + "--bcs-version", + dest="bcs_version", + default="", required=False, # TODO(b/180008931): make this required=True. - help='BCS version to include in metadata.', + help="BCS version to include in metadata.", ) # Would make this required=True, but not available until 3.7 sub_cmds = parser.add_subparsers() - build_cmd = sub_cmds.add_parser('build', help='Builds all firmware targets') + build_cmd = sub_cmds.add_parser("build", help="Builds all firmware targets") build_cmd.set_defaults(func=build) build_cmd = sub_cmds.add_parser( - 'bundle', - help='Creates a tarball containing build ' - 'artifacts from all firmware targets', + "bundle", + help="Creates a tarball containing build " + "artifacts from all firmware targets", ) build_cmd.set_defaults(func=bundle) - test_cmd = sub_cmds.add_parser('test', help='Runs all firmware unit tests') + test_cmd = sub_cmds.add_parser("test", help="Runs all firmware unit tests") test_cmd.set_defaults(func=test) return parser.parse_args(args) -if __name__ == '__main__': +if __name__ == "__main__": sys.exit(main(sys.argv[1:])) diff --git a/zephyr/fpu.cmake b/zephyr/fpu.cmake index 5f1c698b15..4cda364572 100644 --- a/zephyr/fpu.cmake +++ b/zephyr/fpu.cmake @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/gcov.tmpl.sh b/zephyr/gcov.tmpl.sh index 96bd82ab51..b9dd0e7865 100755 --- a/zephyr/gcov.tmpl.sh +++ b/zephyr/gcov.tmpl.sh @@ -1,6 +1,6 @@ #!/bin/bash # -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/hayato_get_cfg.sh b/zephyr/hayato_get_cfg.sh index 5ebe3dc364..1ab1be7a4f 100755 --- a/zephyr/hayato_get_cfg.sh +++ b/zephyr/hayato_get_cfg.sh @@ -1,5 +1,5 @@ #!/bin/bash -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/include/ap_power/ap_power.h b/zephyr/include/ap_power/ap_power.h index 182e81ca4d..05387d8431 100644 --- a/zephyr/include/ap_power/ap_power.h +++ b/zephyr/include/ap_power/ap_power.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,16 @@ * * Defines the API for AP event notification, * the API to register and receive notification callbacks when - * application processor (AP) events happen + * application processor (AP) events happen. + * + * When the Zephyr based AP power sequence config is enabled, + * the callbacks are almost all invoked within the context + * of the power sequence task, so the state is stable + * during the callback. The only exception to this is AP_POWER_RESET, which is + * invoked as a result of receiving a PLTRST# virtual wire signal (if enabled). + * + * When the legacy power sequence config is enabled, the callbacks are invoked + * from the HOOK_CHIPSET notifications. */ #ifndef __AP_POWER_AP_POWER_H__ @@ -87,6 +96,36 @@ enum ap_power_events { AP_POWER_HARD_OFF = BIT(8), /** Software reset occurred */ AP_POWER_RESET = BIT(9), + /** + * AP power state is now known. + * + * Prior to this event, the state of the AP is unknown + * and invalid. When this event is sent, the state is known + * and can be queried. Used by clients when their + * initialization depends upon the initial state of the AP. + */ + AP_POWER_INITIALIZED = BIT(10), + + /** + * S0ix suspend starts. + */ + AP_POWER_S0IX_SUSPEND_START = BIT(11), + /** + * Transitioning from s0 to s0ix. + */ + AP_POWER_S0IX_SUSPEND = BIT(12), + /** + * Transitioning from s0ix to s0. + */ + AP_POWER_S0IX_RESUME = BIT(13), + /** + * si0x resume complete. + */ + AP_POWER_S0IX_RESUME_COMPLETE = BIT(14), + /** + * Reset s0ix tracking. + */ + AP_POWER_S0IX_RESET_TRACKING = BIT(15), }; /** @@ -113,12 +152,12 @@ typedef void (*ap_power_ev_callback_handler_t)(struct ap_power_ev_callback *cb, * are unique pointers of struct ap_power_ev_callback. * The storage must be static. * - * ap_power_ev_init_callback can be used to initialise this structure. + * ap_power_ev_init_callback can be used to initialize this structure. */ struct ap_power_ev_callback { - sys_snode_t node; /* Only usable by AP power event code */ + sys_snode_t node; /* Only usable by AP power event code */ ap_power_ev_callback_handler_t handler; - enum ap_power_events events; /* Events to listen for */ + enum ap_power_events events; /* Events to listen for */ }; /** @endcond */ @@ -129,9 +168,10 @@ struct ap_power_ev_callback { * @param handler The function pointer to call. * @param events The bitmask of events to be called for. */ -static inline void ap_power_ev_init_callback(struct ap_power_ev_callback *cb, - ap_power_ev_callback_handler_t handler, - enum ap_power_events events) +static inline void +ap_power_ev_init_callback(struct ap_power_ev_callback *cb, + ap_power_ev_callback_handler_t handler, + enum ap_power_events events) { __ASSERT(cb, "Callback pointer should not be NULL"); __ASSERT(handler, "Callback handler pointer should not be NULL"); diff --git a/zephyr/include/ap_power/ap_power_espi.h b/zephyr/include/ap_power/ap_power_espi.h new file mode 100644 index 0000000000..2c295054f3 --- /dev/null +++ b/zephyr/include/ap_power/ap_power_espi.h @@ -0,0 +1,35 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * @brief API for power signal ESPI callback. + */ + +#ifndef __AP_POWER_AP_POWER_ESPI_H__ +#define __AP_POWER_AP_POWER_ESPI_H__ + +#include <zephyr/drivers/espi.h> + +/** + * @brief ESPI callback for power signal handling. + * + * This callback must be registered for the bus events indicated below + * as part of the common ESPI initialisation and configuration. + * + * @param dev ESPI device + * @param cb Callback structure + * @param event ESPI event data + */ +void power_signal_espi_cb(const struct device *dev, struct espi_callback *cb, + struct espi_event event); + +/* + * The ESPI bus events required for the power signal ESPI callback. + */ +#define POWER_SIGNAL_ESPI_BUS_EVENTS \ + (ESPI_BUS_EVENT_CHANNEL_READY | ESPI_BUS_EVENT_VWIRE_RECEIVED) + +#endif /* __AP_POWER_AP_POWER_ESPI_H__ */ diff --git a/zephyr/include/ap_power/ap_power_events.h b/zephyr/include/ap_power/ap_power_events.h index 6181deb2bd..8a6a9764de 100644 --- a/zephyr/include/ap_power/ap_power_events.h +++ b/zephyr/include/ap_power/ap_power_events.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/ap_power/ap_power_interface.h b/zephyr/include/ap_power/ap_power_interface.h index b82ef053f7..d2808f6075 100644 --- a/zephyr/include/ap_power/ap_power_interface.h +++ b/zephyr/include/ap_power/ap_power_interface.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -34,6 +34,8 @@ * is hibernated or all the VRs are turned off. */ enum power_states_ndsx { + /* Power state machine is not ready; AP state is unknown. */ + SYS_POWER_STATE_UNINIT, /* * Actual power states */ @@ -87,17 +89,17 @@ enum power_states_ndsx { * @brief Represents the state of the AP as a mask. */ enum ap_power_state_mask { - AP_POWER_STATE_HARD_OFF = BIT(0), /* Hard off (G3) */ - AP_POWER_STATE_SOFT_OFF = BIT(1), /* Soft off (S5, S4) */ - AP_POWER_STATE_SUSPEND = BIT(2), /* Suspend (S3) */ - AP_POWER_STATE_ON = BIT(3), /* On (S0) */ - AP_POWER_STATE_STANDBY = BIT(4), /* Standby (S0ix) */ + AP_POWER_STATE_HARD_OFF = BIT(0), /* Hard off (G3) */ + AP_POWER_STATE_SOFT_OFF = BIT(1), /* Soft off (S5, S4) */ + AP_POWER_STATE_SUSPEND = BIT(2), /* Suspend (S3) */ + AP_POWER_STATE_ON = BIT(3), /* On (S0) */ + AP_POWER_STATE_STANDBY = BIT(4), /* Standby (S0ix) */ /* Common combinations, any off state */ - AP_POWER_STATE_ANY_OFF = (AP_POWER_STATE_HARD_OFF | - AP_POWER_STATE_SOFT_OFF), + AP_POWER_STATE_ANY_OFF = + (AP_POWER_STATE_HARD_OFF | AP_POWER_STATE_SOFT_OFF), /* This combination covers any kind of suspend i.e. S3 or S0ix. */ - AP_POWER_STATE_ANY_SUSPEND = (AP_POWER_STATE_SUSPEND | - AP_POWER_STATE_STANDBY), + AP_POWER_STATE_ANY_SUSPEND = + (AP_POWER_STATE_SUSPEND | AP_POWER_STATE_STANDBY), }; /** diff --git a/zephyr/include/ap_power/ap_pwrseq.h b/zephyr/include/ap_power/ap_pwrseq.h index c83a8b5695..9e1ffd27e8 100644 --- a/zephyr/include/ap_power/ap_pwrseq.h +++ b/zephyr/include/ap_power/ap_pwrseq.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,4 +9,5 @@ /** Starts the AP power sequence thread */ void ap_pwrseq_task_start(void); +void ap_pwrseq_wake(void); #endif /* __AP_POWER_AP_PWRSEQ_H__ */ diff --git a/zephyr/include/cros/binman.dtsi b/zephyr/include/cros/binman.dtsi index d33092ee44..167fd69d1c 100644 --- a/zephyr/include/cros/binman.dtsi +++ b/zephyr/include/cros/binman.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ #address-cells = <1>; #size-cells = <1>; binman { - filename = "zephyr.bin"; + filename = "ec.bin"; pad-byte = <0x1d>; wp-ro { compatible = "cros-ec,flash-layout"; diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi index 4631e64f6f..e9ecf9e716 100644 --- a/zephyr/include/cros/ite/it8xxx2.dtsi +++ b/zephyr/include/cros/ite/it8xxx2.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -77,13 +77,11 @@ fiu0: cros-flash@80000000 { compatible = "ite,it8xxx2-cros-flash"; reg = <0x80000000 0x100000>; - label = "FLASH"; }; cros_kb_raw: cros-kb-raw@f01d00 { compatible = "ite,it8xxx2-cros-kb-raw"; reg = <0x00f01d00 0x29>; - label = "CROS_KB_RAW_0"; interrupt-parent = <&intc>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; wucctrl = <&wuc_wu30 /* KSI[0] */ @@ -108,5 +106,7 @@ offset = <0x60000>; size = <0x60000>; }; + pad-byte = <0xff>; + pad-after = <0x40000>; }; }; diff --git a/zephyr/include/cros/microchip/mec1727.dtsi b/zephyr/include/cros/microchip/mec1727.dtsi index 340cff1956..5f84a1a99e 100644 --- a/zephyr/include/cros/microchip/mec1727.dtsi +++ b/zephyr/include/cros/microchip/mec1727.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -75,6 +75,5 @@ fiu0: cros-flash { compatible = "microchip,xec-cros-flash"; - label = "INTERNAL_FLASH"; }; }; diff --git a/zephyr/include/cros/microchip/mec172x.dtsi b/zephyr/include/cros/microchip/mec172x.dtsi index 6833fa57d0..e2cb0ff1c2 100644 --- a/zephyr/include/cros/microchip/mec172x.dtsi +++ b/zephyr/include/cros/microchip/mec172x.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -69,9 +69,8 @@ }; }; - fiu0: cros-flash{ + fiu0: cros-flash { compatible = "microchip,xec-cros-flash"; - label = "INTERNAL_FLASH"; }; /* diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 094f5ff901..69f29367f5 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 The Chromium OS Authors + * Copyright 2021 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ @@ -68,9 +68,8 @@ }; }; - fiu0: cros-flash{ + fiu0: cros-flash { compatible = "nuvoton,npcx-cros-flash"; - label = "INTERNAL_FLASH"; }; soc { @@ -78,7 +77,6 @@ cros_kb_raw: cros-kb-raw@400a3000 { compatible = "nuvoton,npcx-cros-kb-raw"; reg = <0x400a3000 0x2000>; - label = "CROS_KB_RAW_0"; interrupts = <49 4>; clocks = <&pcc NPCX_CLOCK_BUS_APB1 NPCX_PWDWN_CTL1 0>; wui_maps = <&wui_io31 &wui_io30 &wui_io27 &wui_io26 @@ -89,7 +87,6 @@ compatible = "nuvoton,npcx-cros-mtc"; reg = <0x400b7000 0x2000>; mtc-alarm = <&wui_mtc>; - label = "MTC"; }; shi: shi@4000f000 { diff --git a/zephyr/include/cros/nuvoton/npcx7.dtsi b/zephyr/include/cros/nuvoton/npcx7.dtsi index 00683fe8ff..ca69343054 100644 --- a/zephyr/include/cros/nuvoton/npcx7.dtsi +++ b/zephyr/include/cros/nuvoton/npcx7.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 The Chromium OS Authors + * Copyright 2021 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/zephyr/include/cros/nuvoton/npcx9.dtsi b/zephyr/include/cros/nuvoton/npcx9.dtsi index de492d3306..864ce20269 100644 --- a/zephyr/include/cros/nuvoton/npcx9.dtsi +++ b/zephyr/include/cros/nuvoton/npcx9.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 The Chromium OS Authors + * Copyright 2021 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/zephyr/include/cros/thermistor/thermistor.dtsi b/zephyr/include/cros/thermistor/thermistor.dtsi index 033d5639e2..fb86c4f79a 100644 --- a/zephyr/include/cros/thermistor/thermistor.dtsi +++ b/zephyr/include/cros/thermistor/thermistor.dtsi @@ -1,5 +1,5 @@ / { - thermistor_3V3_30K9_47K_4050B: thermistor-3V3-30K9-47K-4050B { + /omit-if-no-ref/ thermistor_3V3_30K9_47K_4050B: thermistor-3V3-30K9-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <11>; @@ -64,8 +64,7 @@ }; }; - - thermistor_3V0_22K6_47K_4050B: thermistor-3V0-22K6-47K-4050B { + /omit-if-no-ref/ thermistor_3V0_22K6_47K_4050B: thermistor-3V0-22K6-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <11>; @@ -145,7 +144,7 @@ }; }; - thermistor_3V3_13K7_47K_4050B: thermistor-3V3-13K7-47K-4050B { + /omit-if-no-ref/ thermistor_3V3_13K7_47K_4050B: thermistor-3V3-13K7-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <13>; @@ -226,7 +225,7 @@ }; - thermistor_3V3_51K1_47K_4050B: thermistor-3V3-51K1-47K-4050B { + /omit-if-no-ref/ thermistor_3V3_51K1_47K_4050B: thermistor-3V3-51K1-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <11>; @@ -305,4 +304,86 @@ sample-index = <12>; }; }; + + /omit-if-no-ref/ thermistor_3V3_30K9_47K_NCP15WB: + thermistor-3V3-30K9-47K-NCP15WB { + status = "disabled"; + compatible = "cros-ec,thermistor"; + scaling-factor = <11>; + num-pairs = <13>; + steinhart-reference-mv = <3300>; + steinhart-reference-res = <30900>; + + /* + * Data derived from Steinhart-Hart equation in a resistor + * divider circuit with Vdd=3300mV, R = 30.9Kohm, + * and Murata NCP15WB-series thermistor + * (B = 4050, T0 = 298.15 K, nominal resistance (R0) = 47Kohm). + */ + sample-datum-0 { + milivolt = <(2761 / 11)>; + temp = <0>; + sample-index = <0>; + }; + sample-datum-1 { + milivolt = <(2492 / 11)>; + temp = <10>; + sample-index = <1>; + }; + sample-datum-2 { + milivolt = <(2167 / 11)>; + temp = <20>; + sample-index = <2>; + }; + sample-datum-3 { + milivolt = <(1812 / 11)>; + temp = <30>; + sample-index = <3>; + }; + sample-datum-4 { + milivolt = <(1462 / 11)>; + temp = <40>; + sample-index = <4>; + }; + sample-datum-5 { + milivolt = <(1146 / 11)>; + temp = <50>; + sample-index = <5>; + }; + sample-datum-6 { + milivolt = <(878 / 11)>; + temp = <60>; + sample-index = <6>; + }; + sample-datum-7 { + milivolt = <(665 / 11)>; + temp = <70>; + sample-index = <7>; + }; + sample-datum-8 { + milivolt = <(500 / 11)>; + temp = <80>; + sample-index = <8>; + }; + sample-datum-9 { + milivolt = <(434 / 11)>; + temp = <85>; + sample-index = <9>; + }; + sample-datum-10 { + milivolt = <( 376 / 11)>; + temp = <90>; + sample-index = <10>; + }; + sample-datum-11 { + milivolt = <( 326 / 11)>; + temp = <95>; + sample-index = <11>; + }; + sample-datum-12 { + milivolt = <( 283 / 11)>; + temp = <100>; + sample-index = <12>; + }; + }; }; diff --git a/zephyr/include/drivers/cros_displight.h b/zephyr/include/drivers/cros_displight.h index 83c8577c7e..340d51f60d 100644 --- a/zephyr/include/drivers/cros_displight.h +++ b/zephyr/include/drivers/cros_displight.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_flash.h b/zephyr/include/drivers/cros_flash.h index 1bad6bb682..267649476b 100644 --- a/zephyr/include/drivers/cros_flash.h +++ b/zephyr/include/drivers/cros_flash.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -45,8 +45,8 @@ typedef int (*cros_flash_api_physical_erase)(const struct device *dev, typedef int (*cros_flash_api_physical_get_protect)(const struct device *dev, int bank); -typedef uint32_t -(*cros_flash_api_physical_get_protect_flags)(const struct device *dev); +typedef uint32_t (*cros_flash_api_physical_get_protect_flags)( + const struct device *dev); typedef int (*cros_flash_api_physical_protect_at_boot)(const struct device *dev, uint32_t new_flags); @@ -55,12 +55,11 @@ typedef int (*cros_flash_api_physical_protect_now)(const struct device *dev, int all); typedef int (*cros_flash_api_physical_get_jedec_id)(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device); + uint8_t *manufacturer, + uint16_t *device); typedef int (*cros_flash_api_physical_get_status)(const struct device *dev, - uint8_t *sr1, - uint8_t *sr2); + uint8_t *sr1, uint8_t *sr2); __subsystem struct cros_flash_driver_api { cros_flash_api_init init; @@ -183,6 +182,7 @@ z_impl_cros_flash_physical_get_protect(const struct device *dev, int bank) return api->physical_get_protect(dev, bank); } +/* clang-format off */ /** * @brief Return flash protect state flags from the physical layer. * @@ -192,6 +192,7 @@ z_impl_cros_flash_physical_get_protect(const struct device *dev, int bank) */ __syscall uint32_t cros_flash_physical_get_protect_flags(const struct device *dev); +/* clang-format on */ static inline uint32_t z_impl_cros_flash_physical_get_protect_flags(const struct device *dev) @@ -269,13 +270,12 @@ z_impl_cros_flash_physical_protect_now(const struct device *dev, int all) * @retval -ENOTSUP Not supported api function. */ __syscall int cros_flash_physical_get_jedec_id(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device); + uint8_t *manufacturer, + uint16_t *device); static inline int z_impl_cros_flash_physical_get_jedec_id(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device) + uint8_t *manufacturer, uint16_t *device) { const struct cros_flash_driver_api *api = (const struct cros_flash_driver_api *)dev->api; @@ -297,11 +297,11 @@ z_impl_cros_flash_physical_get_jedec_id(const struct device *dev, * @retval -ENOTSUP Not supported api function. */ __syscall int cros_flash_physical_get_status(const struct device *dev, - uint8_t *sr1, uint8_t *sr2); + uint8_t *sr1, uint8_t *sr2); static inline int -z_impl_cros_flash_physical_get_status(const struct device *dev, - uint8_t *sr1, uint8_t *sr2) +z_impl_cros_flash_physical_get_status(const struct device *dev, uint8_t *sr1, + uint8_t *sr2) { const struct cros_flash_driver_api *api = (const struct cros_flash_driver_api *)dev->api; diff --git a/zephyr/include/drivers/cros_kb_raw.h b/zephyr/include/drivers/cros_kb_raw.h index db2d00bf76..d370a3bbde 100644 --- a/zephyr/include/drivers/cros_kb_raw.h +++ b/zephyr/include/drivers/cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_rtc.h b/zephyr/include/drivers/cros_rtc.h index 343cf0405e..3a0f332b98 100644 --- a/zephyr/include/drivers/cros_rtc.h +++ b/zephyr/include/drivers/cros_rtc.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_shi.h b/zephyr/include/drivers/cros_shi.h index 3d14e2c34f..3eb3038a45 100644 --- a/zephyr/include/drivers/cros_shi.h +++ b/zephyr/include/drivers/cros_shi.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_system.h b/zephyr/include/drivers/cros_system.h index 5b3d12ea58..5105d97cc9 100644 --- a/zephyr/include/drivers/cros_system.h +++ b/zephyr/include/drivers/cros_system.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/battery.h b/zephyr/include/dt-bindings/battery.h index c87de79b45..e6465e2a9b 100644 --- a/zephyr/include/dt-bindings/battery.h +++ b/zephyr/include/dt-bindings/battery.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The ChromiumOS Authors. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,11 +10,11 @@ * Macros used by LED devicetree files (led.dts) to define battery-level * range. */ -#define BATTERY_LEVEL_EMPTY 0 -#define BATTERY_LEVEL_SHUTDOWN 3 -#define BATTERY_LEVEL_CRITICAL 5 -#define BATTERY_LEVEL_LOW 10 -#define BATTERY_LEVEL_NEAR_FULL 97 -#define BATTERY_LEVEL_FULL 100 +#define BATTERY_LEVEL_EMPTY 0 +#define BATTERY_LEVEL_SHUTDOWN 3 +#define BATTERY_LEVEL_CRITICAL 5 +#define BATTERY_LEVEL_LOW 10 +#define BATTERY_LEVEL_NEAR_FULL 97 +#define BATTERY_LEVEL_FULL 100 #endif /* DT_BINDINGS_BATTERY_H_ */ diff --git a/zephyr/include/dt-bindings/charger/intersil_isl9241.h b/zephyr/include/dt-bindings/charger/intersil_isl9241.h index 5a2742570e..cbb550a5dd 100644 --- a/zephyr/include/dt-bindings/charger/intersil_isl9241.h +++ b/zephyr/include/dt-bindings/charger/intersil_isl9241.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,10 +9,10 @@ #define SWITCHING_FREQ_1420KHZ 0 #define SWITCHING_FREQ_1180KHZ 1 #define SWITCHING_FREQ_1020KHZ 2 -#define SWITCHING_FREQ_890KHZ 3 -#define SWITCHING_FREQ_808KHZ 4 -#define SWITCHING_FREQ_724KHZ 5 -#define SWITCHING_FREQ_656KHZ 6 -#define SWITCHING_FREQ_600KHZ 7 +#define SWITCHING_FREQ_890KHZ 3 +#define SWITCHING_FREQ_808KHZ 4 +#define SWITCHING_FREQ_724KHZ 5 +#define SWITCHING_FREQ_656KHZ 6 +#define SWITCHING_FREQ_600KHZ 7 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CHARGER_INTERSIL_ISL9241_H_ */ diff --git a/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h index f88efed949..53769f5dbf 100644 --- a/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h +++ b/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h index 41b6c6b3b6..b520e154da 100644 --- a/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h +++ b/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/gpio_defines.h b/zephyr/include/dt-bindings/gpio_defines.h index fd63b5ac4a..16da598363 100644 --- a/zephyr/include/dt-bindings/gpio_defines.h +++ b/zephyr/include/dt-bindings/gpio_defines.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,31 +21,31 @@ */ /** Enables pin as input. */ -#define GPIO_INPUT (1U << 16) +#define GPIO_INPUT (1U << 16) /** Enables pin as output, no change to the output state. */ -#define GPIO_OUTPUT (1U << 17) +#define GPIO_OUTPUT (1U << 17) /* Initializes output to a low state. */ -#define GPIO_OUTPUT_INIT_LOW (1U << 18) +#define GPIO_OUTPUT_INIT_LOW (1U << 18) /* Initializes output to a high state. */ -#define GPIO_OUTPUT_INIT_HIGH (1U << 19) +#define GPIO_OUTPUT_INIT_HIGH (1U << 19) /* Initializes output based on logic level */ #define GPIO_OUTPUT_INIT_LOGICAL (1U << 20) /* Configures GPIO pin as output and initializes it to a low state. */ -#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW) +#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW) /* Configures GPIO pin as output and initializes it to a high state. */ -#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH) +#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH) /* Configures GPIO pin as input with pull-up. */ -#define GPIO_INPUT_PULL_UP (GPIO_INPUT | GPIO_PULL_UP) +#define GPIO_INPUT_PULL_UP (GPIO_INPUT | GPIO_PULL_UP) /* Configures GPIO pin as input with pull-down. */ -#define GPIO_INPUT_PULL_DOWN (GPIO_INPUT | GPIO_PULL_DOWN) +#define GPIO_INPUT_PULL_DOWN (GPIO_INPUT | GPIO_PULL_DOWN) /** Configures GPIO pin as ODR output and initializes it to a low state. */ #define GPIO_ODR_LOW (GPIO_OUTPUT_LOW | GPIO_OPEN_DRAIN) @@ -61,17 +61,17 @@ */ /** Disables GPIO pin interrupt. */ -#define GPIO_INT_DISABLE (1U << 21) +#define GPIO_INT_DISABLE (1U << 21) /* Enables GPIO pin interrupt. */ -#define GPIO_INT_ENABLE (1U << 22) +#define GPIO_INT_ENABLE (1U << 22) /* GPIO interrupt is sensitive to logical levels. * * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_LEVELS_LOGICAL (1U << 23) +#define GPIO_INT_LEVELS_LOGICAL (1U << 23) /* GPIO interrupt is edge sensitive. * @@ -80,7 +80,7 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_EDGE (1U << 24) +#define GPIO_INT_EDGE (1U << 24) /* Trigger detection when input state is (or transitions to) physical low or * logical 0 level. @@ -88,7 +88,7 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_LOW_0 (1U << 25) +#define GPIO_INT_LOW_0 (1U << 25) /* Trigger detection on input state is (or transitions to) physical high or * logical 1 level. @@ -96,69 +96,57 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_HIGH_1 (1U << 26) +#define GPIO_INT_HIGH_1 (1U << 26) /** Configures GPIO interrupt to be triggered on pin rising edge and enables it. */ -#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin falling edge and enables * it. */ -#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin rising or falling edge and * enables it. */ -#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0 | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_BOTH \ + (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_LOW_0 | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin physical level low and * enables it. */ -#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin physical level high and * enables it. */ -#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin state change to logical * level 0 and enables it. */ -#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_EDGE_TO_INACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_EDGE | \ + GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin state change to logical * level 1 and enables it. */ -#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_TO_ACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_EDGE | \ + GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin logical level 0 and enables * it. */ -#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_LOW_0) +#define GPIO_INT_LEVEL_INACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin logical level 1 and enables * it. */ -#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_LEVEL_ACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_HIGH_1) #endif /* DT_BINDINGS_GPIO_DEFINES_H_ */ diff --git a/zephyr/include/dt-bindings/motionsense/utils.h b/zephyr/include/dt-bindings/motionsense/utils.h index 7f0e5f5fc8..f7a3a31927 100644 --- a/zephyr/include/dt-bindings/motionsense/utils.h +++ b/zephyr/include/dt-bindings/motionsense/utils.h @@ -7,8 +7,8 @@ #ifndef DT_BINDINGS_UTILS_H #define DT_BINDINGS_UTILS_H -#define BIT(x) (1U << (x)) -#define ROUND_UP_FLAG BIT(31) -#define USEC_PER_MSEC 1000 +#define BIT(x) (1U << (x)) +#define ROUND_UP_FLAG BIT(31) +#define USEC_PER_MSEC 1000 #endif /* DT_BINDINGS_UTILS_H */ diff --git a/zephyr/include/dt-bindings/usb_pd_tcpm.h b/zephyr/include/dt-bindings/usb_pd_tcpm.h index 2b0902d097..93e5165140 100644 --- a/zephyr/include/dt-bindings/usb_pd_tcpm.h +++ b/zephyr/include/dt-bindings/usb_pd_tcpm.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -24,14 +24,14 @@ * Bit 7 --> TCPC controls FRS (even when CONFIG_USB_PD_FRS_TCPC is off) * Bit 8 --> TCPC enable VBUS monitoring */ -#define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) -#define TCPC_FLAGS_ALERT_OD BIT(1) -#define TCPC_FLAGS_RESET_ACTIVE_HIGH BIT(2) -#define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) -#define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) -#define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) -#define TCPC_FLAGS_CONTROL_VCONN BIT(6) -#define TCPC_FLAGS_CONTROL_FRS BIT(7) -#define TCPC_FLAGS_VBUS_MONITOR BIT(8) +#define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) +#define TCPC_FLAGS_ALERT_OD BIT(1) +#define TCPC_FLAGS_RESET_ACTIVE_HIGH BIT(2) +#define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) +#define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) +#define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) +#define TCPC_FLAGS_CONTROL_VCONN BIT(6) +#define TCPC_FLAGS_CONTROL_FRS BIT(7) +#define TCPC_FLAGS_VBUS_MONITOR BIT(8) #endif diff --git a/zephyr/include/dt-bindings/usbc_mux.h b/zephyr/include/dt-bindings/usbc_mux.h index 8cfe38340f..1d91542814 100644 --- a/zephyr/include/dt-bindings/usbc_mux.h +++ b/zephyr/include/dt-bindings/usbc_mux.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,5 +14,6 @@ #define USB_MUX_FLAG_NOT_TCPC BIT(0) /* TCPC/MUX device used only as MUX */ #define USB_MUX_FLAG_SET_WITHOUT_FLIP BIT(1) /* SET should not flip */ #define USB_MUX_FLAG_RESETS_IN_G3 BIT(2) /* Mux chip will reset in G3 */ +#define USB_MUX_FLAG_POLARITY_INVERTED BIT(3) /* Mux polarity is inverted */ #endif /* DT_BINDINGS_USBC_MUX_H_ */ diff --git a/zephyr/include/dt-bindings/wake_mask_event_defines.h b/zephyr/include/dt-bindings/wake_mask_event_defines.h index 168c8425e5..f9df35701e 100644 --- a/zephyr/include/dt-bindings/wake_mask_event_defines.h +++ b/zephyr/include/dt-bindings/wake_mask_event_defines.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,52 +19,52 @@ * defined in this file. */ -#define MKBP_EVENT_KEY_MATRIX BIT(0) -#define MKBP_EVENT_HOST_EVENT BIT(1) -#define MKBP_EVENT_SENSOR_FIFO BIT(2) -#define MKBP_EVENT_BUTTON BIT(3) -#define MKBP_EVENT_SWITCH BIT(4) -#define MKBP_EVENT_FINGERPRINT BIT(5) -#define MKBP_EVENT_SYSRQ BIT(6) -#define MKBP_EVENT_HOST_EVENT64 BIT(7) -#define MKBP_EVENT_CEC_EVENT BIT(8) -#define MKBP_EVENT_CEC_MESSAGE BIT(9) -#define MKBP_EVENT_DP_ALT_MODE_ENTERED BIT(10) -#define MKBP_EVENT_ONLINE_CALIBRATION BIT(11) -#define MKBP_EVENT_PCHG BIT(12) +#define MKBP_EVENT_KEY_MATRIX BIT(0) +#define MKBP_EVENT_HOST_EVENT BIT(1) +#define MKBP_EVENT_SENSOR_FIFO BIT(2) +#define MKBP_EVENT_BUTTON BIT(3) +#define MKBP_EVENT_SWITCH BIT(4) +#define MKBP_EVENT_FINGERPRINT BIT(5) +#define MKBP_EVENT_SYSRQ BIT(6) +#define MKBP_EVENT_HOST_EVENT64 BIT(7) +#define MKBP_EVENT_CEC_EVENT BIT(8) +#define MKBP_EVENT_CEC_MESSAGE BIT(9) +#define MKBP_EVENT_DP_ALT_MODE_ENTERED BIT(10) +#define MKBP_EVENT_ONLINE_CALIBRATION BIT(11) +#define MKBP_EVENT_PCHG BIT(12) -#define HOST_EVENT_NONE 0 -#define HOST_EVENT_LID_CLOSED BIT(0) -#define HOST_EVENT_LID_OPEN BIT(1) -#define HOST_EVENT_POWER_BUTTON BIT(2) -#define HOST_EVENT_AC_CONNECTED BIT(3) -#define HOST_EVENT_AC_DISCONNECTED BIT(4) -#define HOST_EVENT_BATTERY_LOW BIT(5) -#define HOST_EVENT_BATTERY_CRITICAL BIT(6) -#define HOST_EVENT_BATTERY BIT(7) -#define HOST_EVENT_THERMAL_THRESHOLD BIT(8) -#define HOST_EVENT_DEVICE BIT(9) -#define HOST_EVENT_THERMAL BIT(10) -#define HOST_EVENT_USB_CHARGER BIT(11) -#define HOST_EVENT_KEY_PRESSED BIT(12) -#define HOST_EVENT_INTERFACE_READY BIT(13) -#define HOST_EVENT_KEYBOARD_RECOVERY BIT(14) -#define HOST_EVENT_THERMAL_SHUTDOWN BIT(15) -#define HOST_EVENT_BATTERY_SHUTDOWN BIT(16) -#define HOST_EVENT_THROTTLE_START BIT(17) -#define HOST_EVENT_THROTTLE_STOP BIT(18) -#define HOST_EVENT_HANG_DETECT BIT(19) -#define HOST_EVENT_HANG_REBOOT BIT(20) -#define HOST_EVENT_PD_MCU BIT(21) -#define HOST_EVENT_BATTERY_STATUS BIT(22) -#define HOST_EVENT_PANIC BIT(23) -#define HOST_EVENT_KEYBOARD_FASTBOOT BIT(24) -#define HOST_EVENT_RTC BIT(25) -#define HOST_EVENT_MKBP BIT(26) -#define HOST_EVENT_USB_MUX BIT(27) -#define HOST_EVENT_MODE_CHANGE BIT(28) -#define HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT BIT(29) -#define HOST_EVENT_WOV BIT(30) -#define HOST_EVENT_INVALID BIT(31) +#define HOST_EVENT_NONE 0 +#define HOST_EVENT_LID_CLOSED BIT(0) +#define HOST_EVENT_LID_OPEN BIT(1) +#define HOST_EVENT_POWER_BUTTON BIT(2) +#define HOST_EVENT_AC_CONNECTED BIT(3) +#define HOST_EVENT_AC_DISCONNECTED BIT(4) +#define HOST_EVENT_BATTERY_LOW BIT(5) +#define HOST_EVENT_BATTERY_CRITICAL BIT(6) +#define HOST_EVENT_BATTERY BIT(7) +#define HOST_EVENT_THERMAL_THRESHOLD BIT(8) +#define HOST_EVENT_DEVICE BIT(9) +#define HOST_EVENT_THERMAL BIT(10) +#define HOST_EVENT_USB_CHARGER BIT(11) +#define HOST_EVENT_KEY_PRESSED BIT(12) +#define HOST_EVENT_INTERFACE_READY BIT(13) +#define HOST_EVENT_KEYBOARD_RECOVERY BIT(14) +#define HOST_EVENT_THERMAL_SHUTDOWN BIT(15) +#define HOST_EVENT_BATTERY_SHUTDOWN BIT(16) +#define HOST_EVENT_THROTTLE_START BIT(17) +#define HOST_EVENT_THROTTLE_STOP BIT(18) +#define HOST_EVENT_HANG_DETECT BIT(19) +#define HOST_EVENT_HANG_REBOOT BIT(20) +#define HOST_EVENT_PD_MCU BIT(21) +#define HOST_EVENT_BATTERY_STATUS BIT(22) +#define HOST_EVENT_PANIC BIT(23) +#define HOST_EVENT_KEYBOARD_FASTBOOT BIT(24) +#define HOST_EVENT_RTC BIT(25) +#define HOST_EVENT_MKBP BIT(26) +#define HOST_EVENT_USB_MUX BIT(27) +#define HOST_EVENT_MODE_CHANGE BIT(28) +#define HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT BIT(29) +#define HOST_EVENT_WOV BIT(30) +#define HOST_EVENT_INVALID BIT(31) #endif /* DT_BINDINGS_WAKE_MASK_EVENT_DEFINES_H_ */ diff --git a/zephyr/include/emul/emul_bb_retimer.h b/zephyr/include/emul/emul_bb_retimer.h index 9c6a73c3f4..9db2dd565e 100644 --- a/zephyr/include/emul/emul_bb_retimer.h +++ b/zephyr/include/emul/emul_bb_retimer.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -37,22 +37,13 @@ */ /** - * @brief Get pointer to BB retimer emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to BB retimer emulator - */ -struct i2c_emul *bb_emul_get(int ord); - -/** * @brief Set value of given register of BB retimer * * @param emul Pointer to BB retimer emulator * @param reg Register address which value will be changed * @param val New value of the register */ -void bb_emul_set_reg(struct i2c_emul *emul, int reg, uint32_t val); +void bb_emul_set_reg(const struct emul *emul, int reg, uint32_t val); /** * @brief Get value of given register of BB retimer @@ -62,7 +53,7 @@ void bb_emul_set_reg(struct i2c_emul *emul, int reg, uint32_t val); * * @return Value of the register */ -uint32_t bb_emul_get_reg(struct i2c_emul *emul, int reg); +uint32_t bb_emul_get_reg(const struct emul *emul, int reg); /** * @brief Set if error should be generated when read only register is being @@ -71,7 +62,7 @@ uint32_t bb_emul_get_reg(struct i2c_emul *emul, int reg); * @param emul Pointer to BB retimer emulator * @param set Check for this error */ -void bb_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void bb_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -80,7 +71,16 @@ void bb_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BB retimer emulator * @param set Check for this error */ -void bb_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void bb_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); + +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to bb retimer emulator + * @return Pointer to i2c_common_emul_data for emul argument + */ +struct i2c_common_emul_data * +emul_bb_retimer_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/emul_bma255.h b/zephyr/include/emul/emul_bma255.h index 158d29cf97..44a56a86f7 100644 --- a/zephyr/include/emul/emul_bma255.h +++ b/zephyr/include/emul/emul_bma255.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,25 +47,16 @@ * Axis argument used in @ref bma_emul_set_acc @ref bma_emul_get_acc * @ref bma_emul_set_off and @ref bma_emul_get_off */ -#define BMA_EMUL_AXIS_X 0 -#define BMA_EMUL_AXIS_Y 1 -#define BMA_EMUL_AXIS_Z 2 +#define BMA_EMUL_AXIS_X 0 +#define BMA_EMUL_AXIS_Y 1 +#define BMA_EMUL_AXIS_Z 2 /** * Acceleration 1g in internal emulator units. It is helpful for using * functions @ref bma_emul_set_acc @ref bma_emul_get_acc * @ref bma_emul_set_off and @ref bma_emul_get_off */ -#define BMA_EMUL_1G BIT(10) - -/** - * @brief Get pointer to BMA255 emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to BMA255 emulator - */ -struct i2c_emul *bma_emul_get(int ord); +#define BMA_EMUL_1G BIT(10) /** * @brief Set value of given register of BMA255 @@ -74,7 +65,7 @@ struct i2c_emul *bma_emul_get(int ord); * @param reg Register address which value will be changed * @param val New value of the register */ -void bma_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +void bma_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of BMA255 @@ -84,7 +75,7 @@ void bma_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return Value of the register */ -uint8_t bma_emul_get_reg(struct i2c_emul *emul, int reg); +uint8_t bma_emul_get_reg(const struct emul *emul, int reg); /** * @brief Get internal value of offset for given axis @@ -94,7 +85,7 @@ uint8_t bma_emul_get_reg(struct i2c_emul *emul, int reg); * * @return Offset of given axis. LSB is 0.97mg */ -int16_t bma_emul_get_off(struct i2c_emul *emul, int axis); +int16_t bma_emul_get_off(const struct emul *emul, int axis); /** * @brief Set internal value of offset for given axis @@ -103,7 +94,7 @@ int16_t bma_emul_get_off(struct i2c_emul *emul, int axis); * @param axis Axis to access: 0 - X, 1 - Y, 2 - Z * @param val New value of offset. LSB is 0.97mg */ -void bma_emul_set_off(struct i2c_emul *emul, int axis, int16_t val); +void bma_emul_set_off(const struct emul *emul, int axis, int16_t val); /** * @brief Get internal value of accelerometer for given axis @@ -113,7 +104,7 @@ void bma_emul_set_off(struct i2c_emul *emul, int axis, int16_t val); * * @return Acceleration of given axis. LSB is 0.97mg */ -int16_t bma_emul_get_acc(struct i2c_emul *emul, int axis); +int16_t bma_emul_get_acc(const struct emul *emul, int axis); /** * @brief Set internal value of accelerometr for given axis @@ -122,7 +113,7 @@ int16_t bma_emul_get_acc(struct i2c_emul *emul, int axis); * @param axis Axis to access: 0 - X, 1 - Y, 2 - Z * @param val New value of accelerometer axis. LSB is 0.97mg */ -void bma_emul_set_acc(struct i2c_emul *emul, int axis, int16_t val); +void bma_emul_set_acc(const struct emul *emul, int axis, int16_t val); /** * @brief Set if error should be generated when fast compensation is triggered @@ -131,7 +122,7 @@ void bma_emul_set_acc(struct i2c_emul *emul, int axis, int16_t val); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_cal_nrdy(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_cal_nrdy(const struct emul *emul, bool set); /** * @brief Set if error should be generated when fast compensation is triggered @@ -140,7 +131,7 @@ void bma_emul_set_err_on_cal_nrdy(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_cal_bad_range(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_cal_bad_range(const struct emul *emul, bool set); /** * @brief Set if error should be generated when read only register is being @@ -149,7 +140,7 @@ void bma_emul_set_err_on_cal_bad_range(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -158,7 +149,7 @@ void bma_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when MSB register is accessed before @@ -167,7 +158,7 @@ void bma_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_msb_first(const struct emul *emul, bool set); /** * @brief Function calculate register that should be accessed when I2C message @@ -182,7 +173,16 @@ void bma_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set); * * @retval Register address that should be accessed */ -int bma_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, bool read); +int bma_emul_access_reg(const struct emul *emul, int reg, int bytes, bool read); + +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to BMA emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_bma_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/emul_bmi.h b/zephyr/include/emul/emul_bmi.h index b04278bd5e..c7a07ba4bf 100644 --- a/zephyr/include/emul/emul_bmi.h +++ b/zephyr/include/emul/emul_bmi.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -60,49 +60,49 @@ enum bmi_emul_axis { }; /** BMI emulator models */ -#define BMI_EMUL_160 1 -#define BMI_EMUL_260 2 +#define BMI_EMUL_160 1 +#define BMI_EMUL_260 2 /** Last register supported by emulator */ -#define BMI_EMUL_MAX_REG 0x80 +#define BMI_EMUL_MAX_REG 0x80 /** Maximum number of registers that can be backed in NVM */ -#define BMI_EMUL_MAX_NVM_REGS 10 +#define BMI_EMUL_MAX_NVM_REGS 10 /** Headers used in FIFO frames */ -#define BMI_EMUL_FIFO_HEAD_SKIP 0x40 -#define BMI_EMUL_FIFO_HEAD_TIME 0x44 -#define BMI_EMUL_FIFO_HEAD_CONFIG 0x48 -#define BMI_EMUL_FIFO_HEAD_EMPTY 0x80 -#define BMI_EMUL_FIFO_HEAD_DATA 0x80 -#define BMI_EMUL_FIFO_HEAD_DATA_MAG BIT(4) -#define BMI_EMUL_FIFO_HEAD_DATA_GYR BIT(3) -#define BMI_EMUL_FIFO_HEAD_DATA_ACC BIT(2) -#define BMI_EMUL_FIFO_HEAD_DATA_TAG_MASK 0x03 +#define BMI_EMUL_FIFO_HEAD_SKIP 0x40 +#define BMI_EMUL_FIFO_HEAD_TIME 0x44 +#define BMI_EMUL_FIFO_HEAD_CONFIG 0x48 +#define BMI_EMUL_FIFO_HEAD_EMPTY 0x80 +#define BMI_EMUL_FIFO_HEAD_DATA 0x80 +#define BMI_EMUL_FIFO_HEAD_DATA_MAG BIT(4) +#define BMI_EMUL_FIFO_HEAD_DATA_GYR BIT(3) +#define BMI_EMUL_FIFO_HEAD_DATA_ACC BIT(2) +#define BMI_EMUL_FIFO_HEAD_DATA_TAG_MASK 0x03 /** * Acceleration 1g in internal emulator units. It is helpful for using * functions @ref bmi_emul_set_value @ref bmi_emul_get_value * @ref bmi_emul_set_off and @ref bmi_emul_get_off */ -#define BMI_EMUL_1G BIT(14) +#define BMI_EMUL_1G BIT(14) /** * Gyroscope 125°/s in internal emulator units. It is helpful for using * functions @ref bmi_emul_set_value @ref bmi_emul_get_value * @ref bmi_emul_set_off and @ref bmi_emul_get_off */ -#define BMI_EMUL_125_DEG_S BIT(15) +#define BMI_EMUL_125_DEG_S BIT(15) /** Type of frames that can be added to the emulator frames list */ -#define BMI_EMUL_FRAME_CONFIG BIT(0) -#define BMI_EMUL_FRAME_ACC BIT(1) -#define BMI_EMUL_FRAME_MAG BIT(2) -#define BMI_EMUL_FRAME_GYR BIT(3) +#define BMI_EMUL_FRAME_CONFIG BIT(0) +#define BMI_EMUL_FRAME_ACC BIT(1) +#define BMI_EMUL_FRAME_MAG BIT(2) +#define BMI_EMUL_FRAME_GYR BIT(3) /** * Code returned by model specific handle_read and handle_write functions, when * RO register is accessed on write or WO register is accessed on read */ -#define BMI_EMUL_ACCESS_E 1 +#define BMI_EMUL_ACCESS_E 1 /** Structure used to describe single FIFO frame */ struct bmi_emul_frame { @@ -147,7 +147,8 @@ struct bmi_emul_type_data { * * @return Register address that will be accessed */ - int (*access_reg)(struct i2c_emul *emul, int reg, int byte, bool read); + int (*access_reg)(const struct emul *emul, int reg, int byte, + bool read); /** * @brief Model specific write function. It should modify state of @@ -163,7 +164,7 @@ struct bmi_emul_type_data { * @return BMI_EMUL_ACCESS_E on RO register access * @return other on error */ - int (*handle_write)(uint8_t *regs, struct i2c_emul *emul, int reg, + int (*handle_write)(uint8_t *regs, const struct emul *emul, int reg, int byte, uint8_t val); /** * @brief Model specific read function. It should modify state of @@ -179,16 +180,29 @@ struct bmi_emul_type_data { * @return BMI_EMUL_ACCESS_E on WO register access * @return other on error */ - int (*handle_read)(uint8_t *regs, struct i2c_emul *emul, int reg, + int (*handle_read)(uint8_t *regs, const struct emul *emul, int reg, int byte, char *buf); /** + * @brief Model specific finish read function. It should modify state of + * emulator if required. + * + * @param regs Pointer to array of emulator's registers + * @param emul Pointer to BMI emulator + * @param reg Selected register + * @param bytes Number of bytes read + * + * @return 0 on success + */ + int (*finish_read)(uint8_t *regs, const struct emul *emul, int reg, + int bytes); + /** * @brief Model specific reset function. It should modify state of * emulator to imitate after reset conditions. * * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ - void (*reset)(uint8_t *regs, struct i2c_emul *emul); + void (*reset)(uint8_t *regs, const struct emul *emul); /** Array of reserved bits mask for each register */ const uint8_t *rsvd_mask; @@ -220,22 +234,13 @@ const struct bmi_emul_type_data *get_bmi160_emul_type_data(void); const struct bmi_emul_type_data *get_bmi260_emul_type_data(void); /** - * @brief Get pointer to BMI emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to BMI emulator - */ -struct i2c_emul *bmi_emul_get(int ord); - -/** * @brief Set value of given register of BMI * * @param emul Pointer to BMI emulator * @param reg Register address which value will be changed * @param val New value of the register */ -void bmi_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +void bmi_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of BMI @@ -245,7 +250,7 @@ void bmi_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return Value of the register */ -uint8_t bmi_emul_get_reg(struct i2c_emul *emul, int reg); +uint8_t bmi_emul_get_reg(const struct emul *emul, int reg); /** * @brief Get internal value of offset for given axis and sensor @@ -256,7 +261,7 @@ uint8_t bmi_emul_get_reg(struct i2c_emul *emul, int reg); * @return Offset of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -int16_t bmi_emul_get_off(struct i2c_emul *emul, enum bmi_emul_axis axis); +int16_t bmi_emul_get_off(const struct emul *emul, enum bmi_emul_axis axis); /** * @brief Set internal value of offset for given axis and sensor @@ -266,7 +271,7 @@ int16_t bmi_emul_get_off(struct i2c_emul *emul, enum bmi_emul_axis axis); * @param val New value of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, +void bmi_emul_set_off(const struct emul *emul, enum bmi_emul_axis axis, int16_t val); /** @@ -278,7 +283,7 @@ void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, * @return Sensor value of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -int32_t bmi_emul_get_value(struct i2c_emul *emul, enum bmi_emul_axis axis); +int32_t bmi_emul_get_value(const struct emul *emul, enum bmi_emul_axis axis); /** * @brief Set internal value of sensor for given axis @@ -288,7 +293,7 @@ int32_t bmi_emul_get_value(struct i2c_emul *emul, enum bmi_emul_axis axis); * @param val New value of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -void bmi_emul_set_value(struct i2c_emul *emul, enum bmi_emul_axis axis, +void bmi_emul_set_value(const struct emul *emul, enum bmi_emul_axis axis, int32_t val); /** @@ -298,7 +303,7 @@ void bmi_emul_set_value(struct i2c_emul *emul, enum bmi_emul_axis axis, * @param emul Pointer to BMI emulator * @param set Check for this error */ -void bmi_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void bmi_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -307,7 +312,7 @@ void bmi_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param set Check for this error */ -void bmi_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void bmi_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when write only register is read @@ -315,7 +320,7 @@ void bmi_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param set Check for this error */ -void bmi_emul_set_err_on_wo_read(struct i2c_emul *emul, bool set); +void bmi_emul_set_err_on_wo_read(const struct emul *emul, bool set); /** * @brief Set if effect of simulated command should take place after simulated @@ -324,7 +329,7 @@ void bmi_emul_set_err_on_wo_read(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param set Simulate command execution time */ -void bmi_emul_simulate_cmd_exec_time(struct i2c_emul *emul, bool set); +void bmi_emul_simulate_cmd_exec_time(const struct emul *emul, bool set); /** * @brief Set number of skipped frames. It will generate skip frame on next @@ -333,7 +338,7 @@ void bmi_emul_simulate_cmd_exec_time(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param skip Number of skipped frames */ -void bmi_emul_set_skipped_frames(struct i2c_emul *emul, uint8_t skip); +void bmi_emul_set_skipped_frames(const struct emul *emul, uint8_t skip); /** * @brief Clear all FIFO frames, set current frame to empty and reset fifo_skip @@ -343,14 +348,14 @@ void bmi_emul_set_skipped_frames(struct i2c_emul *emul, uint8_t skip); * @param tag_time Indicate if sensor time should be included in empty frame * @param header Indicate if header should be included in frame */ -void bmi_emul_flush_fifo(struct i2c_emul *emul, bool tag_time, bool header); +void bmi_emul_flush_fifo(const struct emul *emul, bool tag_time, bool header); /** * @brief Restore registers backed by NVM, reset sensor time and flush FIFO * * @param emul Pointer to BMI emulator */ -void bmi_emul_reset_common(struct i2c_emul *emul, bool tag_time, bool header); +void bmi_emul_reset_common(const struct emul *emul, bool tag_time, bool header); /** * @brief Set command end time to @p time ms from now @@ -358,14 +363,14 @@ void bmi_emul_reset_common(struct i2c_emul *emul, bool tag_time, bool header); * @param emul Pointer to BMI emulator * @param time After this amount of ms command should end */ -void bmi_emul_set_cmd_end_time(struct i2c_emul *emul, int time); +void bmi_emul_set_cmd_end_time(const struct emul *emul, int time); /** * @brief Check if command should end * * @param emul Pointer to BMI emulator */ -bool bmi_emul_is_cmd_end(struct i2c_emul *emul); +bool bmi_emul_is_cmd_end(const struct emul *emul); /** * @brief Append FIFO @p frame to the emulator list of frames. It can be read @@ -376,7 +381,8 @@ bool bmi_emul_is_cmd_end(struct i2c_emul *emul); * emulator may use this frame (until flush of FIFO or reading * it out through I2C) */ -void bmi_emul_append_frame(struct i2c_emul *emul, struct bmi_emul_frame *frame); +void bmi_emul_append_frame(const struct emul *emul, + struct bmi_emul_frame *frame); /** * @brief Get length of all frames that are on the emulator list of frames. @@ -385,7 +391,7 @@ void bmi_emul_append_frame(struct i2c_emul *emul, struct bmi_emul_frame *frame); * @param tag_time Indicate if sensor time should be included in empty frame * @param header Indicate if header should be included in frame */ -uint16_t bmi_emul_fifo_len(struct i2c_emul *emul, bool tag_time, bool header); +uint16_t bmi_emul_fifo_len(const struct emul *emul, bool tag_time, bool header); /** * @brief Get next byte that should be returned on FIFO data access. @@ -400,9 +406,8 @@ uint16_t bmi_emul_fifo_len(struct i2c_emul *emul, bool tag_time, bool header); * * @return FIFO data byte */ -uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, - bool tag_time, bool header, int acc_shift, - int gyr_shift); +uint8_t bmi_emul_get_fifo_data(const struct emul *emul, int byte, bool tag_time, + bool header, int acc_shift, int gyr_shift); /** * @brief Saves current internal state of sensors to emulator's registers. @@ -419,10 +424,18 @@ uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, * @param gyr_off_en Indicate if gyroscope offset should be included to * sensor data value */ -void bmi_emul_state_to_reg(struct i2c_emul *emul, int acc_shift, +void bmi_emul_state_to_reg(const struct emul *emul, int acc_shift, int gyr_shift, int acc_reg, int gyr_reg, int sensortime_reg, bool acc_off_en, bool gyr_off_en); +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to BMI emulator + * @return Pointer to i2c_common_emul_data for emul argument + */ +struct i2c_common_emul_data * +emul_bmi_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/emul_clock_control.h b/zephyr/include/emul/emul_clock_control.h index 1b3846b0f1..716bec5655 100644 --- a/zephyr/include/emul/emul_clock_control.h +++ b/zephyr/include/emul/emul_clock_control.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/emul/emul_common_i2c.h b/zephyr/include/emul/emul_common_i2c.h index 676308b027..1388e9bbcb 100644 --- a/zephyr/include/emul/emul_common_i2c.h +++ b/zephyr/include/emul/emul_common_i2c.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -49,8 +49,8 @@ * Special register values used in @ref i2c_common_emul_set_read_fail_reg and * @ref i2c_common_emul_set_write_fail_reg */ -#define I2C_COMMON_EMUL_FAIL_ALL_REG (-1) -#define I2C_COMMON_EMUL_NO_FAIL_REG (-2) +#define I2C_COMMON_EMUL_FAIL_ALL_REG (-1) +#define I2C_COMMON_EMUL_NO_FAIL_REG (-2) /** * Describe if there is no ongoing I2C message or if there is message handled @@ -67,20 +67,21 @@ enum i2c_common_emul_msg_state { * @brief Function type that is used by I2C device emulator for first byte of * I2C write message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_start_write_func)(struct i2c_emul *emul, int reg); +typedef int (*i2c_common_emul_start_write_func)(const struct emul *target, + int reg); /** * @brief Function type that is used by I2C device emulator at the end of * I2C write message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * @param bytes Number of bytes received from the I2C write message @@ -88,14 +89,14 @@ typedef int (*i2c_common_emul_start_write_func)(struct i2c_emul *emul, int reg); * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_finish_write_func)(struct i2c_emul *emul, int reg, - int bytes); +typedef int (*i2c_common_emul_finish_write_func)(const struct emul *target, + int reg, int bytes); /** * @brief Function type that is used by I2C device emulator on each byte of * I2C write message (except first byte). * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * @param val Value of current byte @@ -105,27 +106,28 @@ typedef int (*i2c_common_emul_finish_write_func)(struct i2c_emul *emul, int reg, * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_write_byte_func)(struct i2c_emul *emul, int reg, - uint8_t val, int bytes); +typedef int (*i2c_common_emul_write_byte_func)(const struct emul *target, + int reg, uint8_t val, int bytes); /** * @brief Function type that is used by I2C device emulator before first byte of * I2C read message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_start_read_func)(struct i2c_emul *emul, int reg); +typedef int (*i2c_common_emul_start_read_func)(const struct emul *target, + int reg); /** * @brief Function type that is used by I2C device emulator at the end of * I2C read message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * @param bytes Number of bytes responeded to the I2C read message @@ -133,14 +135,14 @@ typedef int (*i2c_common_emul_start_read_func)(struct i2c_emul *emul, int reg); * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_finish_read_func)(struct i2c_emul *emul, int reg, - int bytes); +typedef int (*i2c_common_emul_finish_read_func)(const struct emul *target, + int reg, int bytes); /** * @brief Function type that is used by I2C device emulator on each byte of * I2C read message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * @param val Pointer to buffer where current response byte should be stored @@ -150,8 +152,8 @@ typedef int (*i2c_common_emul_finish_read_func)(struct i2c_emul *emul, int reg, * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_read_byte_func)(struct i2c_emul *emul, int reg, - uint8_t *val, int bytes); +typedef int (*i2c_common_emul_read_byte_func)(const struct emul *target, + int reg, uint8_t *val, int bytes); /** * @brief Function type that is used by I2C device emulator to select register @@ -159,7 +161,7 @@ typedef int (*i2c_common_emul_read_byte_func)(struct i2c_emul *emul, int reg, * @ref i2c_common_emul_set_read_fail_reg and * @ref i2c_common_emul_set_write_fail_reg * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read/write command (first byte * of last I2C write message) * @param bytes Number of bytes already processed in the I2C message handler @@ -169,14 +171,14 @@ typedef int (*i2c_common_emul_read_byte_func)(struct i2c_emul *emul, int reg, * @return Register address that should be compared with user-defined fail * register */ -typedef int (*i2c_common_emul_access_reg_func)(struct i2c_emul *emul, int reg, - int bytes, bool read); +typedef int (*i2c_common_emul_access_reg_func)(const struct emul *target, + int reg, int bytes, bool read); /** * @brief Custom function type that is used as user-defined callback in read * I2C messages handling. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * @param val Pointer to buffer where current response byte should be stored @@ -188,14 +190,14 @@ typedef int (*i2c_common_emul_access_reg_func)(struct i2c_emul *emul, int reg, * @return 1 continue with normal emulator handler * @return negative on error */ -typedef int (*i2c_common_emul_read_func)(struct i2c_emul *emul, int reg, +typedef int (*i2c_common_emul_read_func)(const struct emul *target, int reg, uint8_t *val, int bytes, void *data); /** * @brief Custom function type that is used as user-defined callback in write * I2C messages handling. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * @param val Value of current byte @@ -207,13 +209,11 @@ typedef int (*i2c_common_emul_read_func)(struct i2c_emul *emul, int reg, * @return 1 continue with normal emulator handler * @return negative on error */ -typedef int (*i2c_common_emul_write_func)(struct i2c_emul *emul, int reg, +typedef int (*i2c_common_emul_write_func)(const struct emul *target, int reg, uint8_t val, int bytes, void *data); /** Static configuration, common for all i2c emulators */ struct i2c_common_emul_cfg { - /** Label of the I2C bus this emulator connects to */ - const char *i2c_label; /** Label of the I2C device being emulated */ const char *dev_label; /** Pointer to run-time data */ @@ -283,31 +283,32 @@ extern struct i2c_emul_api i2c_common_emul_api; * @brief Lock access to emulator properties. After acquiring lock, user * may change emulator behaviour in multi-thread setup. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param timeout Timeout in getting lock * * @return k_mutex_lock return code */ -int i2c_common_emul_lock_data(struct i2c_emul *emul, k_timeout_t timeout); +int i2c_common_emul_lock_data(struct i2c_common_emul_data *common_data, + k_timeout_t timeout); /** * @brief Unlock access to emulator properties. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * * @return k_mutex_unlock return code */ -int i2c_common_emul_unlock_data(struct i2c_emul *emul); +int i2c_common_emul_unlock_data(struct i2c_common_emul_data *common_data); /** * @brief Set write handler for I2C messages. This function is called before * generic handler. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param func Pointer to custom function * @param data User data passed on call of custom function */ -void i2c_common_emul_set_write_func(struct i2c_emul *emul, +void i2c_common_emul_set_write_func(struct i2c_common_emul_data *common_data, i2c_common_emul_write_func func, void *data); @@ -315,30 +316,32 @@ void i2c_common_emul_set_write_func(struct i2c_emul *emul, * @brief Set read handler for I2C messages. This function is called before * generic handler. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param func Pointer to custom function * @param data User data passed on call of custom function */ -void i2c_common_emul_set_read_func(struct i2c_emul *emul, +void i2c_common_emul_set_read_func(struct i2c_common_emul_data *common_data, i2c_common_emul_read_func func, void *data); /** * @brief Setup fail on read of given register of emulator * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param reg Register address or one of special values * (I2C_COMMON_EMUL_FAIL_ALL_REG, I2C_COMMON_EMUL_NO_FAIL_REG) */ -void i2c_common_emul_set_read_fail_reg(struct i2c_emul *emul, int reg); +void i2c_common_emul_set_read_fail_reg(struct i2c_common_emul_data *common_data, + int reg); /** * @brief Setup fail on write of given register of emulator * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param reg Register address or one of special values * (I2C_COMMON_EMUL_FAIL_ALL_REG, I2C_COMMON_EMUL_NO_FAIL_REG) */ -void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg); +void i2c_common_emul_set_write_fail_reg( + struct i2c_common_emul_data *common_data, int reg); /** * @biref Emulate an I2C transfer to an emulator @@ -347,7 +350,7 @@ void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg); * I2C message, calling user custom functions, failing on reading/writing * registers selected by user and calling device specific functions. * - * @param emul I2C emulation information + * @param target The target peripheral emulated * @param msgs List of messages to process * @param num_msgs Number of messages to process * @param addr Address of the I2C target device @@ -355,9 +358,15 @@ void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg); * @retval 0 If successful * @retval -EIO General input / output error */ -int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, +int i2c_common_emul_transfer(const struct emul *target, struct i2c_msg *msgs, int num_msgs, int addr); +int i2c_common_emul_transfer_workhorse(const struct emul *target, + struct i2c_common_emul_data *data, + const struct i2c_common_emul_cfg *cfg, + struct i2c_msg *msgs, int num_msgs, + int addr); + /** * @brief Initialize common emulator data structure * diff --git a/zephyr/include/emul/emul_flash.h b/zephyr/include/emul/emul_flash.h new file mode 100644 index 0000000000..8148d4df96 --- /dev/null +++ b/zephyr/include/emul/emul_flash.h @@ -0,0 +1,22 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for Cros flash emulator + */ + +#ifndef ZEPHYR_INCLUDE_EMUL_EMUL_FLASH_H_ +#define ZEPHYR_INCLUDE_EMUL_EMUL_FLASH_H_ + +#include <ec_commands.h> + +/** + * @brief Reset the protection. + */ +void cros_flash_emul_protect_reset(void); + +#endif /* ZEPHYR_INCLUDE_EMUL_EMUL_FLASH_H_ */ diff --git a/zephyr/include/emul/emul_isl923x.h b/zephyr/include/emul/emul_isl923x.h index 5842cdcf02..e41cf26f87 100644 --- a/zephyr/include/emul/emul_isl923x.h +++ b/zephyr/include/emul/emul_isl923x.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,14 +19,13 @@ const struct device *isl923x_emul_get_parent(const struct emul *emulator); /** - * @brief Get the I2C emulator struct - * - * This is generally coupled with calls to i2c_common_emul_* functions. + * @brief Get pointer to emulator i2c_common_emul_cfg * * @param emulator The emulator to look-up - * @return Pointer to the I2C emulator struct + * @return Pointer to the i2c_common_emul_cfg struct */ -struct i2c_emul *isl923x_emul_get_i2c_emul(const struct emul *emulator); +const struct i2c_common_emul_cfg * +isl923x_emul_get_cfg(const struct emul *emulator); /** * @brief Reset all registers @@ -94,6 +93,15 @@ void raa489000_emul_set_acok_pin(const struct emul *emulator, uint16_t value); * @param reg The address of the register to query * @return The 16-bit value of the register */ -uint16_t isl923x_emul_peek_reg(struct i2c_emul *i2c_emul, int reg); +uint16_t isl923x_emul_peek_reg(const struct emul *emul, int reg); + +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to ISL923X emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_isl923x_get_i2c_common_data(const struct emul *emul); #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_ISL923X_H_ */ diff --git a/zephyr/include/emul/emul_kb_raw.h b/zephyr/include/emul/emul_kb_raw.h index ba4ea8e58f..1660ccefd4 100644 --- a/zephyr/include/emul/emul_kb_raw.h +++ b/zephyr/include/emul/emul_kb_raw.h @@ -1,8 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <stdint.h> + /** * @file * @@ -36,6 +38,13 @@ int emul_kb_raw_set_kbstate(const struct device *dev, uint8_t row, uint8_t col, int pressed); /** + * @brief Resets the keyboard to its initial state. + * + * @param dev Pointer to kb_raw emulator device. + */ +void emul_kb_raw_reset(const struct device *dev); + +/** * @} */ diff --git a/zephyr/include/emul/emul_lis2dw12.h b/zephyr/include/emul/emul_lis2dw12.h index c61751183e..5410a54cdd 100644 --- a/zephyr/include/emul/emul_lis2dw12.h +++ b/zephyr/include/emul/emul_lis2dw12.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,14 +10,6 @@ #include <zephyr/drivers/i2c_emul.h> /** - * @brief The the i2c emulator pointer from the top level emul. - * - * @param emul The emulator to query - * @return Pointer to the i2c emulator struct - */ -struct i2c_emul *lis2dw12_emul_to_i2c_emul(const struct emul *emul); - -/** * @brief Reset the state of the lis2dw12 emulator. * * @param emul The emulator to reset. @@ -54,7 +46,7 @@ uint32_t lis2dw12_emul_get_soft_reset_count(const struct emul *emul); * @param reg The register to access * @return The value of the register */ -uint8_t lis2dw12_emul_peek_reg(struct i2c_emul *emul, int reg); +uint8_t lis2dw12_emul_peek_reg(const struct emul *emul, int reg); /** * @brief Retrieves the ODR[3:0] bits from CRTL1 register @@ -62,7 +54,7 @@ uint8_t lis2dw12_emul_peek_reg(struct i2c_emul *emul, int reg); * @param emul The emulator to query * @return The ODR bits, right-aligned */ -uint8_t lis2dw12_emul_peek_odr(struct i2c_emul *emul); +uint8_t lis2dw12_emul_peek_odr(const struct emul *emul); /** * @brief Retrieves the MODE[1:0] bits from CRTL1 register @@ -70,7 +62,7 @@ uint8_t lis2dw12_emul_peek_odr(struct i2c_emul *emul); * @param emul The emulator to query * @return The MODE bits, right-aligned */ -uint8_t lis2dw12_emul_peek_mode(struct i2c_emul *emul); +uint8_t lis2dw12_emul_peek_mode(const struct emul *emul); /** * @brief Retrieves the LPMODE[1:0] bits from CRTL1 register @@ -78,7 +70,7 @@ uint8_t lis2dw12_emul_peek_mode(struct i2c_emul *emul); * @param emul The emulator to query * @return The LPMODE bits, right-aligned */ -uint8_t lis2dw12_emul_peek_lpmode(struct i2c_emul *emul); +uint8_t lis2dw12_emul_peek_lpmode(const struct emul *emul); /** * @brief Updates the current 3-axis acceleromter reading and @@ -87,8 +79,7 @@ uint8_t lis2dw12_emul_peek_lpmode(struct i2c_emul *emul); * @param reading array of int X, Y, and Z readings. * @return 0 on success, or -EINVAL if readings are out of bounds. */ -int lis2dw12_emul_set_accel_reading(const struct emul *emul, - intv3_t reading); +int lis2dw12_emul_set_accel_reading(const struct emul *emul, intv3_t reading); /** * @brief Clears the current accelerometer reading and resets the @@ -97,4 +88,13 @@ int lis2dw12_emul_set_accel_reading(const struct emul *emul, */ void lis2dw12_emul_clear_accel_reading(const struct emul *emul); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to LIS2DW12 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_lis2dw12_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_LIS2DW12_H_ */ diff --git a/zephyr/include/emul/emul_ln9310.h b/zephyr/include/emul/emul_ln9310.h index 6f34a15f93..0c0e61003e 100644 --- a/zephyr/include/emul/emul_ln9310.h +++ b/zephyr/include/emul/emul_ln9310.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -80,4 +80,13 @@ bool ln9310_emul_is_init(const struct emul *emulator); */ struct i2c_emul *ln9310_emul_get_i2c_emul(const struct emul *emulator); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to LN9310 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_ln9310_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_LN9310_H_ */ diff --git a/zephyr/include/emul/emul_pi3usb9201.h b/zephyr/include/emul/emul_pi3usb9201.h index 93e87c20e0..05feff567f 100644 --- a/zephyr/include/emul/emul_pi3usb9201.h +++ b/zephyr/include/emul/emul_pi3usb9201.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,15 +22,6 @@ #define PI3USB9201_REG_HOST_STS 0x3 /** - * @brief Get pointer to pi3usb9201 emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to pi3usb9201 emulator - */ -struct i2c_emul *pi3usb9201_emul_get(int ord); - -/** * @brief Set value of given register of pi3usb9201 * * @param emul Pointer to pi3usb9201 emulator @@ -39,7 +30,7 @@ struct i2c_emul *pi3usb9201_emul_get(int ord); * * @return 0 on success or error */ -int pi3usb9201_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +int pi3usb9201_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of pi3usb9201 @@ -50,6 +41,6 @@ int pi3usb9201_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return 0 on success or error */ -int pi3usb9201_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val); +int pi3usb9201_emul_get_reg(const struct emul *emul, int reg, uint8_t *val); #endif /* __EMUL_PI3USB9201_H */ diff --git a/zephyr/include/emul/emul_rt9490.h b/zephyr/include/emul/emul_rt9490.h new file mode 100644 index 0000000000..0cb4f7b076 --- /dev/null +++ b/zephyr/include/emul/emul_rt9490.h @@ -0,0 +1,15 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef EMUL_RT9490_H +#define EMUL_RT9490_H + +#include <zephyr/drivers/emul.h> + +void rt9490_emul_reset_regs(const struct emul *emul); + +int rt9490_emul_peek_reg(const struct emul *emul, int reg); + +#endif diff --git a/zephyr/include/emul/emul_smart_battery.h b/zephyr/include/emul/emul_smart_battery.h index 034cb6915b..826e817992 100644 --- a/zephyr/include/emul/emul_smart_battery.h +++ b/zephyr/include/emul/emul_smart_battery.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,6 +17,8 @@ #include <zephyr/drivers/i2c_emul.h> #include <stdint.h> +#include "emul/emul_common_i2c.h" + /** * @brief Smart Battery emulator backend API * @defgroup sbat_emul Smart Battery emulator @@ -38,11 +40,11 @@ */ /* Value used to indicate that no command is selected */ -#define SBAT_EMUL_NO_CMD -1 +#define SBAT_EMUL_NO_CMD -1 /* Maximum size of data that can be returned in SMBus block transaction */ -#define MAX_BLOCK_SIZE 32 +#define MAX_BLOCK_SIZE 32 /* Maximum length of command to send is maximum size of data + len byte + PEC */ -#define MSG_BUF_LEN (MAX_BLOCK_SIZE + 2) +#define MSG_BUF_LEN (MAX_BLOCK_SIZE + 2) /** @brief Emulated smart battery properties */ struct sbat_emul_bat_data { @@ -65,6 +67,8 @@ struct sbat_emul_bat_data { uint16_t error_code; /** Design battery voltage in mV */ uint16_t design_mv; + /** Default Design battery voltage in mV */ + const uint16_t default_design_mv; /** Battery temperature at the moment in Kelvins */ uint16_t temp; /** Battery voltage at the moment in mV */ @@ -77,8 +81,12 @@ struct sbat_emul_bat_data { uint16_t max_error; /** Capacity of the battery at the moment in mAh */ uint16_t cap; + /** Default capacity of the battery at the moment in mAh */ + const uint16_t default_cap; /** Full capacity of the battery in mAh */ uint16_t full_cap; + /** Default full capacity of the battery at the moment in mAh */ + const uint16_t default_full_cap; /** Design battery capacity in mAh */ uint16_t design_cap; /** Charging current requested by battery */ @@ -111,25 +119,20 @@ struct sbat_emul_bat_data { uint8_t mf_data[MAX_BLOCK_SIZE]; /** Manufacturer data length */ int mf_data_len; + /** Manufacture info */ + uint8_t mf_info[MAX_BLOCK_SIZE]; + /** Manufacture info length */ + int mf_info_len; }; /** - * @brief Get pointer to smart battery emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to smart battery emulator - */ -struct i2c_emul *sbat_emul_get_ptr(int ord); - -/** * @brief Function which allows to get properties of emulated smart battery * * @param emul Pointer to smart battery emulator * * @return Pointer to smart battery properties */ -struct sbat_emul_bat_data *sbat_emul_get_bat_data(struct i2c_emul *emul); +struct sbat_emul_bat_data *sbat_emul_get_bat_data(const struct emul *emul); /** * @brief Convert date to format used by smart battery @@ -156,7 +159,7 @@ uint16_t sbat_emul_date_to_word(unsigned int day, unsigned int month, * @return 1 if command is unknown or return type different then word * @return negative on error while reading value */ -int sbat_emul_get_word_val(struct i2c_emul *emul, int cmd, uint16_t *val); +int sbat_emul_get_word_val(const struct emul *emul, int cmd, uint16_t *val); /** * @brief Function which gets return value for read commands that returns block @@ -171,7 +174,7 @@ int sbat_emul_get_word_val(struct i2c_emul *emul, int cmd, uint16_t *val); * @return 1 if command is unknown or return type different then word * @return negative on error while reading value */ -int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, +int sbat_emul_get_block_data(const struct emul *emul, int cmd, uint8_t **blk, int *len); /** @@ -184,10 +187,19 @@ int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, * @param len Length of the response * @param fail If emulator should fail to send response */ -void sbat_emul_set_response(struct i2c_emul *emul, int cmd, uint8_t *buf, +void sbat_emul_set_response(const struct emul *emul, int cmd, uint8_t *buf, int len, bool fail); /** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to smart_battery emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_smart_battery_get_i2c_common_data(const struct emul *emul); + +/** * @} */ diff --git a/zephyr/include/emul/emul_sn5s330.h b/zephyr/include/emul/emul_sn5s330.h index cc5576819e..77141e679b 100644 --- a/zephyr/include/emul/emul_sn5s330.h +++ b/zephyr/include/emul/emul_sn5s330.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,4 +47,13 @@ void sn5s330_emul_make_vbus_overcurrent(const struct emul *emul); */ void sn5s330_emul_lower_vbus_below_minv(const struct emul *emul); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to SN5S330 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_sn5s330_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_SN5S330_H_ */ diff --git a/zephyr/include/emul/emul_stub_device.h b/zephyr/include/emul/emul_stub_device.h new file mode 100644 index 0000000000..8eb8a60a28 --- /dev/null +++ b/zephyr/include/emul/emul_stub_device.h @@ -0,0 +1,42 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_INCLUDE_EMUL_STUB_DEVICE_H_ +#define ZEPHYR_INCLUDE_EMUL_STUB_DEVICE_H_ + +#include <zephyr/device.h> +#include <zephyr/devicetree.h> + +/* + * Needed for emulators without corresponding DEVICE_DT_DEFINE drivers + */ + +struct emul_stub_dev_data { + /* Stub */ +}; +struct emul_stub_dev_config { + /* Stub */ +}; +struct emul_stub_dev_api { + /* Stub */ +}; + +/* For every instance of a DT_DRV_COMPAT stub out a device for that instance */ +#define EMUL_STUB_DEVICE(n) \ + __maybe_unused static int emul_init_stub_##n(const struct device *dev) \ + { \ + ARG_UNUSED(dev); \ + return 0; \ + } \ + \ + /* Since this is only stub, allocate the structs once. */ \ + static struct emul_stub_dev_data stub_data_##n; \ + static struct emul_stub_dev_config stub_config_##n; \ + static struct emul_stub_dev_api stub_api_##n; \ + DEVICE_DT_INST_DEFINE(n, &emul_init_stub_##n, NULL, &stub_data_##n, \ + &stub_config_##n, POST_KERNEL, 1, \ + &stub_api_##n); + +#endif /* ZEPHYR_INCLUDE_EMUL_STUB_DEVICE_H_ */ diff --git a/zephyr/include/emul/emul_syv682x.h b/zephyr/include/emul/emul_syv682x.h index f08960ccac..78ee2406eb 100644 --- a/zephyr/include/emul/emul_syv682x.h +++ b/zephyr/include/emul/emul_syv682x.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,100 +17,91 @@ /* Register info copied from syv682.h */ /* SYV682x register addresses */ -#define SYV682X_STATUS_REG 0x00 -#define SYV682X_CONTROL_1_REG 0x01 -#define SYV682X_CONTROL_2_REG 0x02 -#define SYV682X_CONTROL_3_REG 0x03 -#define SYV682X_CONTROL_4_REG 0x04 +#define SYV682X_STATUS_REG 0x00 +#define SYV682X_CONTROL_1_REG 0x01 +#define SYV682X_CONTROL_2_REG 0x02 +#define SYV682X_CONTROL_3_REG 0x03 +#define SYV682X_CONTROL_4_REG 0x04 /* Status Register */ -#define SYV682X_STATUS_OC_HV BIT(7) -#define SYV682X_STATUS_RVS BIT(6) -#define SYV682X_STATUS_OC_5V BIT(5) -#define SYV682X_STATUS_OVP BIT(4) -#define SYV682X_STATUS_FRS BIT(3) -#define SYV682X_STATUS_TSD BIT(2) +#define SYV682X_STATUS_OC_HV BIT(7) +#define SYV682X_STATUS_RVS BIT(6) +#define SYV682X_STATUS_OC_5V BIT(5) +#define SYV682X_STATUS_OVP BIT(4) +#define SYV682X_STATUS_FRS BIT(3) +#define SYV682X_STATUS_TSD BIT(2) #define SYV682X_STATUS_VSAFE_5V BIT(1) #define SYV682X_STATUS_VSAFE_0V BIT(0) #define SYV682X_STATUS_INT_MASK 0xfc -#define SYV682X_STATUS_NONE 0 +#define SYV682X_STATUS_NONE 0 /* Control Register 1 */ -#define SYV682X_CONTROL_1_CH_SEL BIT(1) -#define SYV682X_CONTROL_1_HV_DR BIT(2) -#define SYV682X_CONTROL_1_PWR_ENB BIT(7) - -#define SYV682X_5V_ILIM_MASK 0x18 -#define SYV682X_5V_ILIM_BIT_SHIFT 3 -#define SYV682X_5V_ILIM_1_25 0 -#define SYV682X_5V_ILIM_1_75 1 -#define SYV682X_5V_ILIM_2_25 2 -#define SYV682X_5V_ILIM_3_30 3 - -#define SYV682X_HV_ILIM_MASK 0x60 -#define SYV682X_HV_ILIM_BIT_SHIFT 5 -#define SYV682X_HV_ILIM_1_25 0 -#define SYV682X_HV_ILIM_1_75 1 -#define SYV682X_HV_ILIM_3_30 2 -#define SYV682X_HV_ILIM_5_50 3 +#define SYV682X_CONTROL_1_CH_SEL BIT(1) +#define SYV682X_CONTROL_1_HV_DR BIT(2) +#define SYV682X_CONTROL_1_PWR_ENB BIT(7) + +#define SYV682X_5V_ILIM_MASK 0x18 +#define SYV682X_5V_ILIM_BIT_SHIFT 3 +#define SYV682X_5V_ILIM_1_25 0 +#define SYV682X_5V_ILIM_1_75 1 +#define SYV682X_5V_ILIM_2_25 2 +#define SYV682X_5V_ILIM_3_30 3 + +#define SYV682X_HV_ILIM_MASK 0x60 +#define SYV682X_HV_ILIM_BIT_SHIFT 5 +#define SYV682X_HV_ILIM_1_25 0 +#define SYV682X_HV_ILIM_1_75 1 +#define SYV682X_HV_ILIM_3_30 2 +#define SYV682X_HV_ILIM_5_50 3 /* Control Register 2 */ -#define SYV682X_OC_DELAY_MASK GENMASK(7, 6) -#define SYV682X_OC_DELAY_SHIFT 6 -#define SYV682X_OC_DELAY_1MS 0 -#define SYV682X_OC_DELAY_10MS 1 -#define SYV682X_OC_DELAY_50MS 2 -#define SYV682X_OC_DELAY_100MS 3 -#define SYV682X_DSG_TIME_MASK GENMASK(5, 4) -#define SYV682X_DSG_TIME_SHIFT 4 -#define SYV682X_DSG_TIME_50MS 0 -#define SYV682X_DSG_TIME_100MS 1 -#define SYV682X_DSG_TIME_200MS 2 -#define SYV682X_DSG_TIME_400MS 3 -#define SYV682X_DSG_RON_MASK GENMASK(3, 2) -#define SYV682X_DSG_RON_SHIFT 2 -#define SYV682X_DSG_RON_200_OHM 0 -#define SYV682X_DSG_RON_400_OHM 1 -#define SYV682X_DSG_RON_800_OHM 2 -#define SYV682X_DSG_RON_1600_OHM 3 -#define SYV682X_CONTROL_2_SDSG BIT(1) -#define SYV682X_CONTROL_2_FDSG BIT(0) +#define SYV682X_OC_DELAY_MASK GENMASK(7, 6) +#define SYV682X_OC_DELAY_SHIFT 6 +#define SYV682X_OC_DELAY_1MS 0 +#define SYV682X_OC_DELAY_10MS 1 +#define SYV682X_OC_DELAY_50MS 2 +#define SYV682X_OC_DELAY_100MS 3 +#define SYV682X_DSG_TIME_MASK GENMASK(5, 4) +#define SYV682X_DSG_TIME_SHIFT 4 +#define SYV682X_DSG_TIME_50MS 0 +#define SYV682X_DSG_TIME_100MS 1 +#define SYV682X_DSG_TIME_200MS 2 +#define SYV682X_DSG_TIME_400MS 3 +#define SYV682X_DSG_RON_MASK GENMASK(3, 2) +#define SYV682X_DSG_RON_SHIFT 2 +#define SYV682X_DSG_RON_200_OHM 0 +#define SYV682X_DSG_RON_400_OHM 1 +#define SYV682X_DSG_RON_800_OHM 2 +#define SYV682X_DSG_RON_1600_OHM 3 +#define SYV682X_CONTROL_2_SDSG BIT(1) +#define SYV682X_CONTROL_2_FDSG BIT(0) /* Control Register 3 */ -#define SYV682X_BUSY BIT(7) -#define SYV682X_RVS_MASK BIT(3) -#define SYV682X_RST_REG BIT(0) -#define SYV682X_OVP_MASK 0x70 -#define SYV682X_OVP_BIT_SHIFT 4 -#define SYV682X_OVP_06_0 0 -#define SYV682X_OVP_08_0 1 -#define SYV682X_OVP_11_1 2 -#define SYV682X_OVP_12_1 3 -#define SYV682X_OVP_14_2 4 -#define SYV682X_OVP_17_9 5 -#define SYV682X_OVP_21_6 6 -#define SYV682X_OVP_23_7 7 -#define SYV682X_CONTROL_3_NONE 0 +#define SYV682X_BUSY BIT(7) +#define SYV682X_RVS_MASK BIT(3) +#define SYV682X_RST_REG BIT(0) +#define SYV682X_OVP_MASK 0x70 +#define SYV682X_OVP_BIT_SHIFT 4 +#define SYV682X_OVP_06_0 0 +#define SYV682X_OVP_08_0 1 +#define SYV682X_OVP_11_1 2 +#define SYV682X_OVP_12_1 3 +#define SYV682X_OVP_14_2 4 +#define SYV682X_OVP_17_9 5 +#define SYV682X_OVP_21_6 6 +#define SYV682X_OVP_23_7 7 +#define SYV682X_CONTROL_3_NONE 0 /* Control Register 4 */ -#define SYV682X_CONTROL_4_CC1_BPS BIT(7) -#define SYV682X_CONTROL_4_CC2_BPS BIT(6) -#define SYV682X_CONTROL_4_VCONN1 BIT(5) -#define SYV682X_CONTROL_4_VCONN2 BIT(4) -#define SYV682X_CONTROL_4_VBAT_OVP BIT(3) -#define SYV682X_CONTROL_4_VCONN_OCP BIT(2) -#define SYV682X_CONTROL_4_CC_FRS BIT(1) -#define SYV682X_CONTROL_4_INT_MASK 0x0c -#define SYV682X_CONTROL_4_NONE 0 - -/** - * @brief Get pointer to SYV682x emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to smart battery emulator - */ -struct i2c_emul *syv682x_emul_get(int ord); +#define SYV682X_CONTROL_4_CC1_BPS BIT(7) +#define SYV682X_CONTROL_4_CC2_BPS BIT(6) +#define SYV682X_CONTROL_4_VCONN1 BIT(5) +#define SYV682X_CONTROL_4_VCONN2 BIT(4) +#define SYV682X_CONTROL_4_VBAT_OVP BIT(3) +#define SYV682X_CONTROL_4_VCONN_OCP BIT(2) +#define SYV682X_CONTROL_4_CC_FRS BIT(1) +#define SYV682X_CONTROL_4_INT_MASK 0x0c +#define SYV682X_CONTROL_4_NONE 0 /** * @brief Set the underlying interrupt conditions affecting the SYV682x @@ -122,8 +113,8 @@ struct i2c_emul *syv682x_emul_get(int ord); * conditions; only the bits in SYV682X_CONTROL_4_INT_MASK have * an effect. */ -void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, - uint8_t control_4); +void syv682x_emul_set_condition(const struct emul *emul, uint8_t status, + uint8_t control_4); /** * @brief Cause CONTROL_3[BUSY] to be set for a number of reads. This bit @@ -133,7 +124,7 @@ void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, * @param emul SYV682x emulator * @param reads The number of reads of CONTROL_3 to keep BUSY set for */ -void syv682x_emul_set_busy_reads(struct i2c_emul *emul, int reads); +void syv682x_emul_set_busy_reads(const struct emul *emul, int reads); /** * @brief Set value of a register of SYV682x @@ -144,7 +135,7 @@ void syv682x_emul_set_busy_reads(struct i2c_emul *emul, int reads); * * @return 0 on success, error code on error */ -int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +int syv682x_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of a register of SYV682x @@ -155,6 +146,15 @@ int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return 0 on success, error code on error */ -int syv682x_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val); +int syv682x_emul_get_reg(const struct emul *emul, int reg, uint8_t *val); + +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to SYV682X emulator + * @return common_data Pointer to i2c_common_emul_data + */ +struct i2c_common_emul_data * +emul_syv682x_get_i2c_common_data(const struct emul *emul); #endif /* __EMUL_SYV682X_H */ diff --git a/zephyr/include/emul/emul_tcs3400.h b/zephyr/include/emul/emul_tcs3400.h index a026f2624a..9daf8bce16 100644 --- a/zephyr/include/emul/emul_tcs3400.h +++ b/zephyr/include/emul/emul_tcs3400.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -43,19 +43,19 @@ * light, value obtainded with 128 cycles will be two times smaller than value * obtained with 256 cycles. */ -#define TCS_EMUL_MAX_CYCLES 256 +#define TCS_EMUL_MAX_CYCLES 256 /** * Maximum gain supported by TCS3400. Value read from sensor is multiplied by * gain selected in CONTROL register. */ -#define TCS_EMUL_MAX_GAIN 64 +#define TCS_EMUL_MAX_GAIN 64 /** * Emulator units are value returned with gain x64 and 256 integration cycles. * Max value is 1024 returned when gain is x1 and 1 integration cycle. Max value * represented in emulator units is 1024 * 64 * 256 */ -#define TCS_EMUL_MAX_VALUE (1024 * TCS_EMUL_MAX_GAIN * TCS_EMUL_MAX_CYCLES) +#define TCS_EMUL_MAX_VALUE (1024 * TCS_EMUL_MAX_GAIN * TCS_EMUL_MAX_CYCLES) /** Axis argument used in @ref tcs_emul_set_val @ref tcs_emul_get_val */ enum tcs_emul_axis { @@ -70,18 +70,9 @@ enum tcs_emul_axis { * Emulator saves only those registers in memory. IR select is stored sparately * and other registers are write only. */ -#define TCS_EMUL_FIRST_REG TCS_I2C_ENABLE -#define TCS_EMUL_LAST_REG TCS_I2C_BDATAH -#define TCS_EMUL_REG_COUNT (TCS_EMUL_LAST_REG - TCS_EMUL_FIRST_REG + 1) - -/** - * @brief Get pointer to TCS3400 emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to TCS3400 emulator - */ -struct i2c_emul *tcs_emul_get(int ord); +#define TCS_EMUL_FIRST_REG TCS_I2C_ENABLE +#define TCS_EMUL_LAST_REG TCS_I2C_BDATAH +#define TCS_EMUL_REG_COUNT (TCS_EMUL_LAST_REG - TCS_EMUL_FIRST_REG + 1) /** * @brief Set value of given register of TCS3400 @@ -90,7 +81,7 @@ struct i2c_emul *tcs_emul_get(int ord); * @param reg Register address which value will be changed * @param val New value of the register */ -void tcs_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +void tcs_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of TCS3400 @@ -100,7 +91,7 @@ void tcs_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return Value of the register */ -uint8_t tcs_emul_get_reg(struct i2c_emul *emul, int reg); +uint8_t tcs_emul_get_reg(const struct emul *emul, int reg); /** * @brief Get internal value of light sensor for given axis @@ -110,7 +101,7 @@ uint8_t tcs_emul_get_reg(struct i2c_emul *emul, int reg); * * @return Value of given axis with gain x64 and 256 integration cycles */ -int tcs_emul_get_val(struct i2c_emul *emul, enum tcs_emul_axis axis); +int tcs_emul_get_val(const struct emul *emul, enum tcs_emul_axis axis); /** * @brief Set internal value of light sensor for given axis @@ -120,7 +111,8 @@ int tcs_emul_get_val(struct i2c_emul *emul, enum tcs_emul_axis axis); * @param val New value of light sensor for given axis with gain x64 and * 256 integration cycles */ -void tcs_emul_set_val(struct i2c_emul *emul, enum tcs_emul_axis axis, int val); +void tcs_emul_set_val(const struct emul *emul, enum tcs_emul_axis axis, + int val); /** * @brief Set if error should be generated when read only register is being @@ -129,7 +121,7 @@ void tcs_emul_set_val(struct i2c_emul *emul, enum tcs_emul_axis axis, int val); * @param emul Pointer to TCS3400 emulator * @param set Check for this error */ -void tcs_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void tcs_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -138,7 +130,7 @@ void tcs_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to TCS3400 emulator * @param set Check for this error */ -void tcs_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void tcs_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when MSB register is accessed before @@ -147,7 +139,16 @@ void tcs_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); * @param emul Pointer to TCS3400 emulator * @param set Check for this error */ -void tcs_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set); +void tcs_emul_set_err_on_msb_first(const struct emul *emul, bool set); + +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to tcs3400 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_tcs3400_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/i2c_mock.h b/zephyr/include/emul/i2c_mock.h index e52c4e7440..e5c359a3fd 100644 --- a/zephyr/include/emul/i2c_mock.h +++ b/zephyr/include/emul/i2c_mock.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -32,4 +32,13 @@ struct i2c_emul *i2c_mock_to_i2c_emul(const struct emul *emul); */ uint16_t i2c_mock_get_addr(const struct emul *emul); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to i2c_mock emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_i2c_mock_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_I2C_MOCK_H_ */ diff --git a/zephyr/include/emul/tcpc/emul_ps8xxx.h b/zephyr/include/emul/tcpc/emul_ps8xxx.h index aff21e94c7..6e96af571b 100644 --- a/zephyr/include/emul/tcpc/emul_ps8xxx.h +++ b/zephyr/include/emul/tcpc/emul_ps8xxx.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,19 +47,20 @@ enum ps8xxx_emul_port { }; /* For now all devices supported by this emulator has the same FW rev reg */ -#define PS8XXX_REG_FW_REV 0x82 +#define PS8XXX_REG_FW_REV 0x82 /** - * @brief Get pointer to specific "hidden" I2C device + * @brief Get pointer to i2c_common_data for specific "hidden" I2C device * * @param emul Pointer to PS8xxx emulator * @param port Select which "hidden" I2C device should be obtained * * @return NULL if given "hidden" I2C device cannot be found - * @return pointer to "hidden" I2C device + * @return pointer to "hidden" device i2c_common_emul_data */ -struct i2c_emul *ps8xxx_emul_get_i2c_emul(const struct emul *emul, - enum ps8xxx_emul_port port); +struct i2c_common_emul_data * +ps8xxx_emul_get_i2c_common_data(const struct emul *emul, + enum ps8xxx_emul_port port); /** * @brief Get pointer to TCPCI emulator that is base for PS8xxx emulator diff --git a/zephyr/include/emul/tcpc/emul_tcpci.h b/zephyr/include/emul/tcpc/emul_tcpci.h index dd225c5f6e..8175b9ce96 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci.h +++ b/zephyr/include/emul/tcpc/emul_tcpci.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,27 +17,13 @@ #include <zephyr/drivers/i2c_emul.h> #include <usb_pd_tcpm.h> +#include "emul/emul_common_i2c.h" + /** - * @brief TCPCI emulator backend API - * @defgroup tcpci_emul TCPCI emulator - * @{ - * - * TCPCI emulator supports access to its registers using I2C messages. - * It follows Type-C Port Controller Interface Specification. It is possible - * to use this emulator as base for implementation of specific TCPC emulator - * which follows TCPCI specification. Emulator allows to set callbacks - * on change of CC status or transmitting message to implement partner emulator. - * There is also callback used to inform about alert line state change. - * Application may alter emulator state: - * - * - call @ref tcpci_emul_set_reg and @ref tcpci_emul_get_reg to set and get - * value of TCPCI registers - * - call functions from emul_common_i2c.h to setup custom handlers for I2C - * messages - * - call @ref tcpci_emul_add_rx_msg to setup received SOP messages - * - call @ref tcpci_emul_get_tx_msg to examine sended message - * - call @ref tcpci_emul_set_rev to set revision of emulated TCPCI + * Number of emulated register. This include vendor registers defined in TCPCI + * specification */ +#define TCPCI_EMUL_REG_COUNT 0x100 /** SOP message structure */ struct tcpci_emul_msg { @@ -46,7 +32,7 @@ struct tcpci_emul_msg { /** Number of bytes in buf */ int cnt; /** Type of message (SOP, SOP', etc) */ - uint8_t type; + uint8_t sop_type; /** Index used to mark accessed byte */ int idx; /** Pointer to optional second message */ @@ -64,6 +50,80 @@ struct tcpci_emul_msg { typedef void (*tcpci_emul_alert_state_func)(const struct emul *emul, bool alert, void *data); +/** Run-time data used by the emulator */ +struct tcpci_ctx { + /** Common I2C data for TCPC */ + struct i2c_common_emul_data common; + + /** Current state of all emulated TCPCI registers */ + uint8_t reg[TCPCI_EMUL_REG_COUNT]; + + /** Structures representing TX and RX buffers */ + struct tcpci_emul_msg *rx_msg; + struct tcpci_emul_msg *tx_msg; + + /** Data that should be written to register (except TX_BUFFER) */ + uint16_t write_data; + + /** Return error when trying to write to RO register */ + bool error_on_ro_write; + /** Return error when trying to write 1 to reserved bit */ + bool error_on_rsvd_write; + + /** User function called when alert line could change */ + tcpci_emul_alert_state_func alert_callback; + /** Data passed to alert_callback */ + void *alert_callback_data; + + /** Callbacks for TCPCI partner */ + const struct tcpci_emul_partner_ops *partner; + + /** Reference to Alert# GPIO emulator. */ + const struct device *alert_gpio_port; + gpio_pin_t alert_gpio_pin; +}; + +/** Run-time data used by the emulator */ +struct tcpc_emul_data { + /** Pointer to the common TCPCI emulator context */ + struct tcpci_ctx *tcpci_ctx; + + /** Pointer to chip specific data */ + void *chip_data; + + const struct i2c_common_emul_cfg i2c_cfg; +}; + +#define TCPCI_EMUL_DEFINE(n, init, cfg_ptr, chip_data_ptr, bus_api) \ + static uint8_t tcpci_emul_tx_buf_##n[128]; \ + static struct tcpci_emul_msg tcpci_emul_tx_msg_##n = { \ + .buf = tcpci_emul_tx_buf_##n, \ + }; \ + static struct tcpci_ctx tcpci_ctx##n = { \ + .tx_msg = &tcpci_emul_tx_msg_##n, \ + .error_on_ro_write = true, \ + .error_on_rsvd_write = true, \ + .alert_gpio_port = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, alert_gpio), \ + (DEVICE_DT_GET(DT_GPIO_CTLR( \ + DT_INST_PROP(n, alert_gpio), gpios))), \ + (NULL)), \ + .alert_gpio_pin = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, alert_gpio), \ + (DT_GPIO_PIN(DT_INST_PROP(n, alert_gpio), gpios)), \ + (0)), \ + }; \ + static struct tcpc_emul_data tcpc_emul_data_##n = { \ + .tcpci_ctx = &tcpci_ctx##n, \ + .chip_data = chip_data_ptr, \ + .i2c_cfg = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &tcpci_ctx##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }, \ + }; \ + EMUL_DT_INST_DEFINE(n, init, &tcpc_emul_data_##n, cfg_ptr, bus_api) + /** Response from TCPCI specific device operations */ enum tcpci_emul_ops_resp { TCPCI_EMUL_CONTINUE = 0, @@ -72,10 +132,7 @@ enum tcpci_emul_ops_resp { }; /** Revisions supported by TCPCI emaluator */ -enum tcpci_emul_rev { - TCPCI_EMUL_REV1_0_VER1_0 = 0, - TCPCI_EMUL_REV2_0_VER1_1 -}; +enum tcpci_emul_rev { TCPCI_EMUL_REV1_0_VER1_0 = 0, TCPCI_EMUL_REV2_0_VER1_1 }; /** Status of TX message send to TCPCI emulator partner */ enum tcpci_emul_tx_status { @@ -90,67 +147,6 @@ enum tcpci_emul_tx_status { TCPCI_EMUL_TX_UNKNOWN }; -/** TCPCI specific device operations. Not all of them need to be implemented. */ -struct tcpci_emul_dev_ops { - /** - * @brief Function called for each byte of read message - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - * @param reg First byte of last write message - * @param val Pointer where byte to read should be stored - * @param bytes Number of bytes already readded - * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error - */ - enum tcpci_emul_ops_resp (*read_byte)(const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, uint8_t *val, int bytes); - - /** - * @brief Function called for each byte of write message - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - * @param reg First byte of write message - * @param val Received byte of write message - * @param bytes Number of bytes already received - * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error - */ - enum tcpci_emul_ops_resp (*write_byte)(const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, uint8_t val, int bytes); - - /** - * @brief Function called on the end of write message - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - * @param reg Register which is written - * @param msg_len Length of handled I2C message - * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error - */ - enum tcpci_emul_ops_resp (*handle_write)(const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, int msg_len); - - /** - * @brief Function called on reset - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - */ - void (*reset)(const struct emul *emul, struct tcpci_emul_dev_ops *ops); -}; - /** TCPCI partner operations. Not all of them need to be implemented. */ struct tcpci_emul_partner_ops { /** @@ -166,8 +162,7 @@ struct tcpci_emul_partner_ops { void (*transmit)(const struct emul *emul, const struct tcpci_emul_partner_ops *ops, const struct tcpci_emul_msg *tx_msg, - enum tcpci_msg_type type, - int retry); + enum tcpci_msg_type type, int retry); /** * @brief Function called when control settings change to allow partner @@ -201,18 +196,9 @@ struct tcpci_emul_partner_ops { }; /** - * @brief Get i2c_emul for TCPCI emulator - * - * @param emul Pointer to TCPCI emulator - * - * @return Pointer to I2C TCPCI emulator - */ -struct i2c_emul *tcpci_emul_get_i2c_emul(const struct emul *emul); - -/** * @brief Set value of given register of TCPCI * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param reg Register address which value will be changed * @param val New value of the register * @@ -222,6 +208,68 @@ struct i2c_emul *tcpci_emul_get_i2c_emul(const struct emul *emul); int tcpci_emul_set_reg(const struct emul *emul, int reg, uint16_t val); /** + * @brief Function called for each byte of read message from TCPCI + * + * @param emul Pointer to TCPC emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already readded + * + * @return 0 on success + */ +int tcpci_emul_read_byte(const struct emul *emul, int reg, uint8_t *val, + int bytes); + +/** + * @brief Function called for each byte of write message from TCPCI. + * Data are stored in write_data field of tcpci_emul_data or in tx_msg + * in case of writing to TX buffer. + * + * @param emul Pointer to TCPC emulator + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return 0 on success + * @return -EIO on invalid write to TX buffer + */ +int tcpci_emul_write_byte(const struct emul *emul, int reg, uint8_t val, + int bytes); + +/** + * @brief Handle I2C write message. It is checked if accessed register isn't RO + * and reserved bits are set to 0. + * + * @param emul Pointer to TCPC emulator + * @param reg Register which is written + * @param msg_len Length of handled I2C message + * + * @return 0 on success + * @return -EIO on error + */ +int tcpci_emul_handle_write(const struct emul *emul, int reg, int msg_len); + +/** + * @brief Set up a new TCPCI emulator + * + * This should be called for each TCPC device that needs to be + * registered on the I2C bus. + * + * @param emul Pointer to TCPC emulator + * @param parent Pointer to emulated I2C bus + */ +void tcpci_emul_i2c_init(const struct emul *emul, const struct device *i2c_dev); + +/** + * @brief Reset registers to default values. Vendor and reserved registers + * are not changed. + * + * @param emul Pointer to TCPC emulator + * @return 0 if successful + */ +int tcpci_emul_reset(const struct emul *emul); + +/** * @brief Get value of given register of TCPCI * * @param emul Pointer to TCPCI emulator @@ -237,7 +285,7 @@ int tcpci_emul_get_reg(const struct emul *emul, int reg, uint16_t *val); /** * @brief Add up to two SOP RX messages * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param rx_msg Pointer to message that is added * @param alert Select if alert register should be updated * @@ -255,7 +303,7 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, /** * @brief Get SOP TX message to examine what was sended by TCPM * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return Pointer to TX message */ @@ -264,24 +312,15 @@ struct tcpci_emul_msg *tcpci_emul_get_tx_msg(const struct emul *emul); /** * @brief Set TCPCI revision in PD_INT_REV register * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param rev Requested revision */ void tcpci_emul_set_rev(const struct emul *emul, enum tcpci_emul_rev rev); /** - * @brief Set callbacks for specific TCPC device emulator - * - * @param emul Pointer to TCPCI emulator - * @param dev_ops Pointer to callbacks - */ -void tcpci_emul_set_dev_ops(const struct emul *emul, - struct tcpci_emul_dev_ops *dev_ops); - -/** * @brief Set callback which is called when alert register is changed * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param alert_callback Pointer to callback * @param alert_callback_data Pointer to data passed to callback as an argument */ @@ -292,7 +331,7 @@ void tcpci_emul_set_alert_callback(const struct emul *emul, /** * @brief Set callbacks for port partner device emulator * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param partner Pointer to callbacks */ void tcpci_emul_set_partner_ops(const struct emul *emul, @@ -301,7 +340,7 @@ void tcpci_emul_set_partner_ops(const struct emul *emul, /** * @brief Emulate connection of specific device to emulated TCPCI * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param partner_power_role Power role of connected partner (sink or source) * @param partner_cc1 Voltage on partner CC1 line (usually Rd or Rp) * @param partner_cc2 Voltage on partner CC2 line (usually open or Ra if active @@ -321,7 +360,7 @@ int tcpci_emul_connect_partner(const struct emul *emul, /** @brief Emulate the disconnection of the partner device to emulated TCPCI * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return 0 on success */ @@ -330,13 +369,22 @@ int tcpci_emul_disconnect_partner(const struct emul *emul); /** * @brief Allows port partner to select if message was received correctly * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param status Status of sended message */ void tcpci_emul_partner_msg_status(const struct emul *emul, enum tcpci_emul_tx_status status); /** + * @brief Gets the common data associated with the tcpci chip overall + * + * @param emul Pointer to TCPC emulator + * @return Pointer to struct i2c_common_emul_data + */ +struct i2c_common_emul_data * +emul_tcpci_generic_get_i2c_common_data(const struct emul *emul); + +/** * @} */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h index 4988c48576..fb715a47dc 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,6 +14,7 @@ #include <zephyr/drivers/emul.h> #include <zephyr/kernel.h> +#include <zephyr/sys/atomic.h> #include <stdbool.h> #include <stdint.h> @@ -31,21 +32,20 @@ */ /** Timeout for other side to respond to PD message */ -#define TCPCI_PARTNER_RESPONSE_TIMEOUT_MS 30 -#define TCPCI_PARTNER_RESPONSE_TIMEOUT \ - K_MSEC(TCPCI_PARTNER_RESPONSE_TIMEOUT_MS) +#define TCPCI_PARTNER_RESPONSE_TIMEOUT_MS 30 +#define TCPCI_PARTNER_RESPONSE_TIMEOUT K_MSEC(TCPCI_PARTNER_RESPONSE_TIMEOUT_MS) /** Timeout for source to transition to requested state after accept */ -#define TCPCI_PARTNER_TRANSITION_TIMEOUT_MS 550 -#define TCPCI_PARTNER_TRANSITION_TIMEOUT \ - K_MSEC(TCPCI_PARTNER_TRANSITION_TIMEOUT_MS) +#define TCPCI_PARTNER_TRANSITION_TIMEOUT_MS 550 +#define TCPCI_PARTNER_TRANSITION_TIMEOUT \ + K_MSEC(TCPCI_PARTNER_TRANSITION_TIMEOUT_MS) /** Timeout for source to send capability again after failure */ -#define TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS 150 -#define TCPCI_SOURCE_CAPABILITY_TIMEOUT \ - K_MSEC(TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS) +#define TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS 150 +#define TCPCI_SOURCE_CAPABILITY_TIMEOUT \ + K_MSEC(TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS) /** Timeout for source to send capability message after power swap */ -#define TCPCI_SWAP_SOURCE_START_TIMEOUT_MS 20 -#define TCPCI_SWAP_SOURCE_START_TIMEOUT \ - K_MSEC(TCPCI_SWAP_SOURCE_START_TIMEOUT_MS) +#define TCPCI_SWAP_SOURCE_START_TIMEOUT_MS 20 +#define TCPCI_SWAP_SOURCE_START_TIMEOUT \ + K_MSEC(TCPCI_SWAP_SOURCE_START_TIMEOUT_MS) /** Common data for TCPCI partner device emulators */ struct tcpci_partner_data { @@ -64,9 +64,13 @@ struct tcpci_partner_data { /** Mutex for to_send queue */ struct k_mutex to_send_mutex; /** Next SOP message id */ - int msg_id; + int sop_msg_id; + /** Next SOP' message id */ + int sop_prime_msg_id; /** Last received message id */ - int recv_msg_id; + int sop_recv_msg_id; + /** Last received SOP' message id */ + int sop_prime_recv_msg_id; /** Power role (used in message header) */ enum pd_power_role power_role; /** Data role (used in message header) */ @@ -100,7 +104,7 @@ struct tcpci_partner_data { */ bool in_soft_reset; /** Current AMS Control request being handled */ - enum pd_ctrl_msg_type cur_ams_ctrl_req; + enum pd_ctrl_msg_type cur_ams_ctrl_req; /** * If common code should send GoodCRC for each message. If false, * then one of extensions should call tcpci_emul_partner_msg_status(). @@ -129,6 +133,15 @@ struct tcpci_partner_data { * any status to received message. */ enum tcpci_emul_tx_status *received_msg_status; + /** Whether port partner is configured in DisplayPort mode */ + bool displayport_configured; + /** The number of Enter Mode REQs received since connection + * or the last Hard Reset, whichever was more recent. + */ + atomic_t mode_enter_attempts; + /* SVID of entered mode (0 if no mode is entered) */ + uint16_t entered_svid; + /* VDMs with which the partner responds to discovery REQs. The VDM * buffers include the VDM header, and the VDO counts include 1 for the * VDM header. This structure has space for the mode response for a @@ -140,6 +153,49 @@ struct tcpci_partner_data { int svids_vdos; uint32_t modes_vdm[VDO_MAX_SIZE]; int modes_vdos; + /* VDMs sent when responding to a mode entry command */ + uint32_t enter_mode_vdm[VDO_MAX_SIZE]; + int enter_mode_vdos; + /* VDMs sent when responding to DisplayPort status update command */ + uint32_t dp_status_vdm[VDO_MAX_SIZE]; + int dp_status_vdos; + /* VDMs sent when responding to DisplayPort config command */ + uint32_t dp_config_vdm[VDO_MAX_SIZE]; + int dp_config_vdos; + struct { + /* Index of the last battery we requested capabilities for. The + * BCDB response does not include the index so we need to track + * it manually. -1 indicates no outstanding request. + */ + int index; + /* Stores Battery Capability Data Blocks (BCDBs) requested and + * received from the TCPM for later analysis. See USB-PD spec + * Rev 3.1, Ver 1.3 section 6.5.5 + */ + struct pd_bcdb bcdb[PD_BATT_MAX]; + /* Stores a boolean status for each battery index indicating + * whether we have received a BCDB response for that battery. + */ + bool have_response[PD_BATT_MAX]; + } battery_capabilities; + + /* + * Cable which is "plugged in" to this port partner + * Note: Much as in real life, cable should be attached before the port + * partner can be plugged in to properly discover its information. + * For tests, this means this poitner should be set before connecting + * the source or sink partner. + */ + struct tcpci_cable_data *cable; +}; + +struct tcpci_cable_data { + /* + * Identity VDM ACKs which the cable is expected to send + * These include the VDM header + */ + uint32_t identity_vdm[VDO_MAX_SIZE]; + int identity_vdos; }; /** Structure of message used by TCPCI partner emulator */ @@ -150,10 +206,17 @@ struct tcpci_partner_msg { struct tcpci_emul_msg msg; /** Time when message should be sent if message is delayed */ uint64_t time; - /** Type of the message */ + /** Message type that is placed in the Message Header. Its meaning + * depends on the class of message: + * - for Control Messages, see `enum pd_ctrl_msg_type` + * - for Data Messages, see `enum pd_data_msg_type` + * - for Extended Messages, see `enum pd_ext_msg_type` + */ int type; /** Number of data objects */ int data_objects; + /** True if this is an extended message */ + bool extended; }; /** Identify sender of logged PD message */ @@ -184,7 +247,8 @@ struct tcpci_partner_log_msg { enum tcpci_partner_handler_res { TCPCI_PARTNER_COMMON_MSG_HANDLED, TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED, - TCPCI_PARTNER_COMMON_MSG_HARD_RESET + TCPCI_PARTNER_COMMON_MSG_HARD_RESET, + TCPCI_PARTNER_COMMON_MSG_NO_GOODCRC, }; /** Structure of TCPCI partner extension */ @@ -230,9 +294,8 @@ struct tcpci_partner_extension_ops { * @param ext Pointer to partner extension * @param common_data Pointer to TCPCI partner emulator */ - void (*hard_reset)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + void (*hard_reset)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); /** * @brief Function called when SoftReset message is received @@ -240,9 +303,8 @@ struct tcpci_partner_extension_ops { * @param ext Pointer to partner extension * @param common_data Pointer to TCPCI partner emulator */ - void (*soft_reset)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + void (*soft_reset)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); /** * @brief Function called when partner emulator is disconnected from @@ -251,9 +313,8 @@ struct tcpci_partner_extension_ops { * @param ext Pointer to partner extension * @param common_data Pointer to TCPCI partner emulator */ - void (*disconnect)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + void (*disconnect)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); /** * @brief Function called when partner emulator is connected to TCPM. @@ -265,9 +326,8 @@ struct tcpci_partner_extension_ops { * @return Negative value on error * @return 0 on success */ - int (*connect)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + int (*connect)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); }; /** @@ -280,17 +340,6 @@ struct tcpci_partner_extension_ops { void tcpci_partner_init(struct tcpci_partner_data *data, enum pd_rev_type rev); /** - * @brief Allocate message with space for header and given number of data - * objects. Type of message is set to TCPCI_MSG_SOP by default. - * - * @param data_objects Number of data objects in message - * - * @return Pointer to new message on success - * @return NULL on error - */ -struct tcpci_partner_msg *tcpci_partner_alloc_msg(int data_objects); - -/** * @brief Free message's memory * * @param msg Pointer to message @@ -336,8 +385,7 @@ int tcpci_partner_send_msg(struct tcpci_partner_data *data, * @return negative on failure */ int tcpci_partner_send_control_msg(struct tcpci_partner_data *data, - enum pd_ctrl_msg_type type, - uint64_t delay); + enum pd_ctrl_msg_type type, uint64_t delay); /** * @brief Send data message with optional delay. Data objects are copied to @@ -356,9 +404,22 @@ int tcpci_partner_send_control_msg(struct tcpci_partner_data *data, * @return negative on failure */ int tcpci_partner_send_data_msg(struct tcpci_partner_data *data, - enum pd_data_msg_type type, - uint32_t *data_obj, int data_obj_num, - uint64_t delay); + enum pd_data_msg_type type, uint32_t *data_obj, + int data_obj_num, uint64_t delay); + +/** + * @brief Send an extended PD message to the port partner + * + * @param data Pointer to TCPCI partner emulator + * @param type Extended message type + * @param delay Message send delay in milliseconds, or zero for no delay. + * @param payload Pointer to data payload. Does not include any headers. + * @param payload_size Number of bytes in above payload + * @return negative on failure, 0 on success + */ +int tcpci_partner_send_extended_msg(struct tcpci_partner_data *data, + enum pd_ext_msg_type type, uint64_t delay, + uint8_t *payload, size_t payload_size); /** * @brief Remove all messages that are in delayed message queue @@ -387,6 +448,25 @@ void tcpci_partner_common_send_hard_reset(struct tcpci_partner_data *data); void tcpci_partner_common_send_soft_reset(struct tcpci_partner_data *data); /** + * @brief Send a Get Battery Capabilities request to the TCPM + * + * @param data Pointer to TCPCI partner emulator + * @param battery_index Request capability info on this battery. Must + * be (0 <= battery_index < PD_BATT_MAX) + */ +void tcpci_partner_common_send_get_battery_capabilities( + struct tcpci_partner_data *data, int battery_index); + +/** + * @brief Resets the data structure used for tracking battery capability + * requests and responses. + * + * @param data Emulator state + */ +void tcpci_partner_reset_battery_capability_state( + struct tcpci_partner_data *data); + +/** * @brief Start sender response timer for TCPCI_PARTNER_RESPONSE_TIMEOUT_MS. * If @ref tcpci_partner_stop_sender_response_timer wasn't called before * timeout, @ref tcpci_partner_sender_response_timeout is called. diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h index fcc8d6a85a..e4f58fcd37 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -55,12 +55,12 @@ struct tcpci_drp_emul_data { * * @return Pointer to USB-C DRP extension */ -struct tcpci_partner_extension *tcpci_drp_emul_init( - struct tcpci_drp_emul_data *data, - struct tcpci_partner_data *common_data, - enum pd_power_role power_role, - struct tcpci_partner_extension *src_ext, - struct tcpci_partner_extension *snk_ext); +struct tcpci_partner_extension * +tcpci_drp_emul_init(struct tcpci_drp_emul_data *data, + struct tcpci_partner_data *common_data, + enum pd_power_role power_role, + struct tcpci_partner_extension *src_ext, + struct tcpci_partner_extension *snk_ext); /** * @brief Set correct flags for first capabilities PDO to indicate that this diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h new file mode 100644 index 0000000000..f0627c95bd --- /dev/null +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h @@ -0,0 +1,101 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for USB-C malfunctioning device emulator + */ + +#ifndef __EMUL_TCPCI_PARTNER_FAULTY_EXT_H +#define __EMUL_TCPCI_PARTNER_FAULTY_EXT_H + +#include <zephyr/drivers/emul.h> +#include "emul/tcpc/emul_tcpci.h" +#include "emul/tcpc/emul_tcpci_partner_common.h" +#include "usb_pd.h" + +/** + * @brief USB-C malfunctioning device extension backend API + * @defgroup tcpci_faulty_ext USB-C malfunctioning device extension + * @{ + * + * USB-C malfunctioning device extension can be used with TCPCI partner + * emulator. It can be configured to not respond to source capability message + * (by not sending GoodCRC or Request after GoodCRC). + */ + +/** Structure describing malfunctioning emulator data */ +struct tcpci_faulty_ext_data { + struct tcpci_partner_extension ext; + /* List of action to perform */ + struct k_fifo action_list; +}; + +/** Actions that can be performed by malfunctioning emulator */ +enum tcpci_faulty_ext_action_type { + /** + * Fail to receive SourceCapabilities message. From TCPM point of view, + * GoodCRC message is not received. + */ + TCPCI_FAULTY_EXT_FAIL_SRC_CAP = BIT(0), + /** + * Ignore to respond to SourceCapabilities message with Request message. + * From TCPM point of view, GoodCRC message is received, but Request is + * missing. + */ + TCPCI_FAULTY_EXT_IGNORE_SRC_CAP = BIT(1), + /** Discard SourceCapabilities message and send Accept message */ + TCPCI_FAULTY_EXT_DISCARD_SRC_CAP = BIT(2), +}; + +/** Structure to put in malfunctioning emulator action list */ +struct tcpci_faulty_ext_action { + /* Reserved for FIFO */ + void *fifo_reserved; + /* Actions that emulator should perform */ + uint32_t action_mask; + /* Number of times to repeat action */ + int count; +}; + +/* Count of actions which is treated by emulator as infinite */ +#define TCPCI_FAULTY_EXT_INFINITE_ACTION 0 + +/** + * @brief Initialise USB-C malfunctioning device data structure + * + * @param data Pointer to USB-C malfunctioning device emulator data + * @param common_data Pointer to USB-C device emulator common data + * @param ext Pointer to next USB-C emulator extension + * + * @return Pointer to USB-C malfunctioning extension + */ +struct tcpci_partner_extension * +tcpci_faulty_ext_init(struct tcpci_faulty_ext_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext); + +/** + * @brief Add action to perform by USB-C malfunctioning extension + * + * @param data Pointer to USB-C malfunctioning device extension data + * @param action Non standard behavior to perform by emulator + */ +void tcpci_faulty_ext_append_action(struct tcpci_faulty_ext_data *data, + struct tcpci_faulty_ext_action *action); + +/** + * @brief Clear all actions of USB-C malfunctioning extension + * + * @param data Pointer to USB-C malfunctioning device extension data + */ +void tcpci_faulty_ext_clear_actions_list(struct tcpci_faulty_ext_data *data); + +/** + * @} + */ + +#endif /* __EMUL_TCPCI_PARTNER_FAULTY_EXT_H */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h deleted file mode 100644 index 8334f5f01d..0000000000 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * - * @brief Backend API for USB-C malfunctioning sink device emulator - */ - -#ifndef __EMUL_TCPCI_PARTNER_FAULTY_SNK_H -#define __EMUL_TCPCI_PARTNER_FAULTY_SNK_H - -#include <zephyr/drivers/emul.h> -#include "emul/tcpc/emul_tcpci.h" -#include "emul/tcpc/emul_tcpci_partner_common.h" -#include "emul/tcpc/emul_tcpci_partner_snk.h" -#include "usb_pd.h" - -/** - * @brief USB-C malfunctioning sink device extension backend API - * @defgroup tcpci_faulty_snk_emul USB-C malfunctioning sink device extension - * @{ - * - * USB-C malfunctioning sink device extension can be used with TCPCI partner - * emulator. It can be configured to not respond to source capability message - * (by not sending GoodCRC or Request after GoodCRC). - */ - -/** Structure describing malfunctioning sink emulator data */ -struct tcpci_faulty_snk_emul_data { - struct tcpci_partner_extension ext; - /* List of action to perform */ - struct k_fifo action_list; -}; - -/** Actions that can be performed by malfunctioning sink emulator */ -enum tcpci_faulty_snk_action_type { - /** - * Fail to receive SourceCapabilities message. From TCPM point of view, - * GoodCRC message is not received. - */ - TCPCI_FAULTY_SNK_FAIL_SRC_CAP = BIT(0), - /** - * Ignore to respond to SourceCapabilities message with Request message. - * From TCPM point of view, GoodCRC message is received, but Request is - * missing. - */ - TCPCI_FAULTY_SNK_IGNORE_SRC_CAP = BIT(1), - /** Discard SourceCapabilities message and send Accept message */ - TCPCI_FAULTY_SNK_DISCARD_SRC_CAP = BIT(2), -}; - -/** Structure to put in malfunctioning sink emulator action list */ -struct tcpci_faulty_snk_action { - /* Reserved for FIFO */ - void *fifo_reserved; - /* Actions that emulator should perform */ - uint32_t action_mask; - /* Number of times to repeat action */ - int count; -}; - -/* Count of actions which is treated by emulator as infinite */ -#define TCPCI_FAULTY_SNK_INFINITE_ACTION 0 - -/** - * @brief Initialise USB-C malfunctioning sink device data structure - * - * @param data Pointer to USB-C malfunctioning sink device emulator data - * @param common_data Pointer to USB-C device emulator common data - * @param ext Pointer to next USB-C emulator extension - * - * @return Pointer to USB-C malfunctioning sink extension - */ -struct tcpci_partner_extension *tcpci_faulty_snk_emul_init( - struct tcpci_faulty_snk_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext); - -/** - * @brief Add action to perform by USB-C malfunctioning sink extension - * - * @param data Pointer to USB-C malfunctioning sink device extension data - * @param action Non standard behavior to perform by emulator - */ -void tcpci_faulty_snk_emul_append_action( - struct tcpci_faulty_snk_emul_data *data, - struct tcpci_faulty_snk_action *action); - -/** - * @brief Clear all actions of USB-C malfunctioning sink extension - * - * @param data Pointer to USB-C malfunctioning sink device extension data - */ -void tcpci_faulty_snk_emul_clear_actions_list( - struct tcpci_faulty_snk_emul_data *data); - -/** - * @} - */ - -#endif /* __EMUL_TCPCI_PARTNER_FAULTY_SNK_H */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h index 5e23a770da..584458942b 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -41,6 +41,8 @@ struct tcpci_snk_emul_data { bool ping_received; /** PD_DATA_ALERT message received */ bool alert_received; + /** Last received 5V fixed source cap */ + uint32_t last_5v_source_cap; }; /** @@ -53,10 +55,10 @@ struct tcpci_snk_emul_data { * * @return Pointer to USB-C sink extension */ -struct tcpci_partner_extension *tcpci_snk_emul_init( - struct tcpci_snk_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext); +struct tcpci_partner_extension * +tcpci_snk_emul_init(struct tcpci_snk_emul_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext); /** * @brief Clear the ping received flag. @@ -73,6 +75,13 @@ void tcpci_snk_emul_clear_ping_received(struct tcpci_snk_emul_data *sink_data); void tcpci_snk_emul_clear_alert_received(struct tcpci_snk_emul_data *sink_data); /** + * @brief Clear the last received 5V fixed source cap. + * + * @param sink_data + */ +void tcpci_snk_emul_clear_last_5v_cap(struct tcpci_snk_emul_data *sink_data); + +/** * @} */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h index 00f592ae2f..e72d0e4135 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -95,10 +95,10 @@ enum check_pdos_res tcpci_src_emul_check_pdos(struct tcpci_src_emul_data *data); * * @return Pointer to USB-C source extension */ -struct tcpci_partner_extension *tcpci_src_emul_init( - struct tcpci_src_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext); +struct tcpci_partner_extension * +tcpci_src_emul_init(struct tcpci_src_emul_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext); /** * @brief Send capability message constructed from source device emulator PDOs @@ -134,9 +134,7 @@ int tcpci_src_emul_send_capability_msg(struct tcpci_src_emul_data *data, */ int tcpci_src_emul_send_capability_msg_with_timer( struct tcpci_src_emul_data *data, - struct tcpci_partner_data *common_data, - uint64_t delay); - + struct tcpci_partner_data *common_data, uint64_t delay); /** * @brief Clear the alert received flag. diff --git a/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h b/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h index f26d3ac69f..418ae39d3a 100644 --- a/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h +++ b/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/soc/microchip_xec/reg_def_cros.h b/zephyr/include/soc/microchip_xec/reg_def_cros.h index 4cc66be47d..b4b849a90d 100644 --- a/zephyr/include/soc/microchip_xec/reg_def_cros.h +++ b/zephyr/include/soc/microchip_xec/reg_def_cros.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,29 +13,29 @@ /* RTC register structure */ struct rtc_hw { -__IOM uint8_t SECV; /*!< (@ 0x0000) RTC seconds value */ -__IOM uint8_t SECA; /*!< (@ 0x0001) RTC seconds alarm */ -__IOM uint8_t MINV; /*!< (@ 0x0002) RTC minutes value */ -__IOM uint8_t MINA; /*!< (@ 0x0003) RTC minutes alarm */ -__IOM uint8_t HRSV; /*!< (@ 0x0004) RTC hours value, AM/PM indicator */ -__IOM uint8_t HRSA; /*!< (@ 0x0005) RTC hours alarm */ -__IOM uint8_t DOWV; /*!< (@ 0x0006) RTC day of week value */ -__IOM uint8_t DOMV; /*!< (@ 0x0007) RTC day of month value */ -__IOM uint8_t MONV; /*!< (@ 0x0008) RTC month value */ -__IOM uint8_t YEARV; /*!< (@ 0x0009) RTC Year value */ -__IOM uint8_t REGA; /*!< (@ 0x000A) RTC register A */ -__IOM uint8_t REGB; /*!< (@ 0x000B) RTC register B */ -__IOM uint8_t REGC; /*!< (@ 0x000C) RTC register C */ -__IOM uint8_t REGD; /*!< (@ 0x000D) RTC register D */ -__IM uint16_t RESERVED; -__IOM uint8_t CTRL; /*!< (@ 0x0010) RTC control */ -__IM uint8_t RESERVED1; -__IM uint16_t RESERVED2; -__IOM uint8_t WKA; /*!< (@ 0x0014) RTC week alarm */ -__IM uint8_t RESERVED3; -__IM uint16_t RESERVED4; -__IOM uint32_t DLSF; /*!< (@ 0x0018) RTC daylight savings forward */ -__IOM uint32_t DLSB; /*!< (@ 0x001C) RTC daylight savings backward */ + __IOM uint8_t SECV; /*!< (@ 0x0000) RTC seconds value */ + __IOM uint8_t SECA; /*!< (@ 0x0001) RTC seconds alarm */ + __IOM uint8_t MINV; /*!< (@ 0x0002) RTC minutes value */ + __IOM uint8_t MINA; /*!< (@ 0x0003) RTC minutes alarm */ + __IOM uint8_t HRSV; /*!< (@ 0x0004) RTC hours value, AM/PM indicator */ + __IOM uint8_t HRSA; /*!< (@ 0x0005) RTC hours alarm */ + __IOM uint8_t DOWV; /*!< (@ 0x0006) RTC day of week value */ + __IOM uint8_t DOMV; /*!< (@ 0x0007) RTC day of month value */ + __IOM uint8_t MONV; /*!< (@ 0x0008) RTC month value */ + __IOM uint8_t YEARV; /*!< (@ 0x0009) RTC Year value */ + __IOM uint8_t REGA; /*!< (@ 0x000A) RTC register A */ + __IOM uint8_t REGB; /*!< (@ 0x000B) RTC register B */ + __IOM uint8_t REGC; /*!< (@ 0x000C) RTC register C */ + __IOM uint8_t REGD; /*!< (@ 0x000D) RTC register D */ + __IM uint16_t RESERVED; + __IOM uint8_t CTRL; /*!< (@ 0x0010) RTC control */ + __IM uint8_t RESERVED1; + __IM uint16_t RESERVED2; + __IOM uint8_t WKA; /*!< (@ 0x0014) RTC week alarm */ + __IM uint8_t RESERVED3; + __IM uint16_t RESERVED4; + __IOM uint32_t DLSF; /*!< (@ 0x0018) RTC daylight savings forward */ + __IOM uint32_t DLSB; /*!< (@ 0x001C) RTC daylight savings backward */ }; #endif /* _MICROCHIP_XEC_REG_DEF_CROS_H */ diff --git a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h index c4d176851d..180c2e50a3 100644 --- a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h +++ b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h @@ -40,21 +40,21 @@ struct kbs_reg { }; /* KBS register fields */ -#define NPCX_KBSBUFINDX 0 -#define NPCX_KBSEVT_KBSDONE 0 -#define NPCX_KBSEVT_KBSERR 1 -#define NPCX_KBSCTL_START 0 -#define NPCX_KBSCTL_KBSMODE 1 -#define NPCX_KBSCTL_KBSIEN 2 -#define NPCX_KBSCTL_KBSINC 3 -#define NPCX_KBSCTL_KBHDRV_FIELD FIELD(6, 2) -#define NPCX_KBSCFGINDX 0 +#define NPCX_KBSBUFINDX 0 +#define NPCX_KBSEVT_KBSDONE 0 +#define NPCX_KBSEVT_KBSERR 1 +#define NPCX_KBSCTL_START 0 +#define NPCX_KBSCTL_KBSMODE 1 +#define NPCX_KBSCTL_KBSIEN 2 +#define NPCX_KBSCTL_KBSINC 3 +#define NPCX_KBSCTL_KBHDRV_FIELD FIELD(6, 2) +#define NPCX_KBSCFGINDX 0 /* Index of 'Automatic Scan' configuration register */ -#define KBS_CFG_INDX_DLY1 0 /* Keyboard Scan Delay T1 Byte */ -#define KBS_CFG_INDX_DLY2 1 /* Keyboard Scan Delay T2 Byte */ -#define KBS_CFG_INDX_RTYTO 2 /* Keyboard Scan Retry Timeout */ -#define KBS_CFG_INDX_CNUM 3 /* Keyboard Scan Columns Number */ -#define KBS_CFG_INDX_CDIV 4 /* Keyboard Scan Clock Divisor */ +#define KBS_CFG_INDX_DLY1 0 /* Keyboard Scan Delay T1 Byte */ +#define KBS_CFG_INDX_DLY2 1 /* Keyboard Scan Delay T2 Byte */ +#define KBS_CFG_INDX_RTYTO 2 /* Keyboard Scan Retry Timeout */ +#define KBS_CFG_INDX_CNUM 3 /* Keyboard Scan Columns Number */ +#define KBS_CFG_INDX_CDIV 4 /* Keyboard Scan Clock Divisor */ /* * Monotonic Counter (MTC) device registers @@ -67,8 +67,8 @@ struct mtc_reg { }; /* MTC register fields */ -#define NPCX_WTC_PTO 30 -#define NPCX_WTC_WIE 31 +#define NPCX_WTC_PTO 30 +#define NPCX_WTC_WIE 31 /* SHI (Serial Host Interface) registers */ struct shi_reg { @@ -109,48 +109,48 @@ struct shi_reg { }; /* SHI register fields */ -#define NPCX_SHICFG1_EN 0 -#define NPCX_SHICFG1_MODE 1 -#define NPCX_SHICFG1_WEN 2 -#define NPCX_SHICFG1_AUTIBF 3 -#define NPCX_SHICFG1_AUTOBE 4 -#define NPCX_SHICFG1_DAS 5 -#define NPCX_SHICFG1_CPOL 6 -#define NPCX_SHICFG1_IWRAP 7 -#define NPCX_SHICFG2_SIMUL 0 -#define NPCX_SHICFG2_BUSY 1 -#define NPCX_SHICFG2_ONESHOT 2 -#define NPCX_SHICFG2_SLWU 3 -#define NPCX_SHICFG2_REEN 4 -#define NPCX_SHICFG2_RESTART 5 -#define NPCX_SHICFG2_REEVEN 6 -#define NPCX_EVENABLE_OBEEN 0 -#define NPCX_EVENABLE_OBHEEN 1 -#define NPCX_EVENABLE_IBFEN 2 -#define NPCX_EVENABLE_IBHFEN 3 -#define NPCX_EVENABLE_EOREN 4 -#define NPCX_EVENABLE_EOWEN 5 -#define NPCX_EVENABLE_STSREN 6 -#define NPCX_EVENABLE_IBOREN 7 -#define NPCX_EVSTAT_OBE 0 -#define NPCX_EVSTAT_OBHE 1 -#define NPCX_EVSTAT_IBF 2 -#define NPCX_EVSTAT_IBHF 3 -#define NPCX_EVSTAT_EOR 4 -#define NPCX_EVSTAT_EOW 5 -#define NPCX_EVSTAT_STSR 6 -#define NPCX_EVSTAT_IBOR 7 -#define NPCX_STATUS_OBES 6 -#define NPCX_STATUS_IBFS 7 -#define NPCX_SHICFG3_OBUFLVLDIS 7 -#define NPCX_SHICFG4_IBUFLVLDIS 7 -#define NPCX_SHICFG5_IBUFLVL2 FIELD(0, 6) -#define NPCX_SHICFG5_IBUFLVL2DIS 7 -#define NPCX_EVSTAT2_IBHF2 0 -#define NPCX_EVSTAT2_CSNRE 1 -#define NPCX_EVSTAT2_CSNFE 2 -#define NPCX_EVENABLE2_IBHF2EN 0 -#define NPCX_EVENABLE2_CSNREEN 1 -#define NPCX_EVENABLE2_CSNFEEN 2 +#define NPCX_SHICFG1_EN 0 +#define NPCX_SHICFG1_MODE 1 +#define NPCX_SHICFG1_WEN 2 +#define NPCX_SHICFG1_AUTIBF 3 +#define NPCX_SHICFG1_AUTOBE 4 +#define NPCX_SHICFG1_DAS 5 +#define NPCX_SHICFG1_CPOL 6 +#define NPCX_SHICFG1_IWRAP 7 +#define NPCX_SHICFG2_SIMUL 0 +#define NPCX_SHICFG2_BUSY 1 +#define NPCX_SHICFG2_ONESHOT 2 +#define NPCX_SHICFG2_SLWU 3 +#define NPCX_SHICFG2_REEN 4 +#define NPCX_SHICFG2_RESTART 5 +#define NPCX_SHICFG2_REEVEN 6 +#define NPCX_EVENABLE_OBEEN 0 +#define NPCX_EVENABLE_OBHEEN 1 +#define NPCX_EVENABLE_IBFEN 2 +#define NPCX_EVENABLE_IBHFEN 3 +#define NPCX_EVENABLE_EOREN 4 +#define NPCX_EVENABLE_EOWEN 5 +#define NPCX_EVENABLE_STSREN 6 +#define NPCX_EVENABLE_IBOREN 7 +#define NPCX_EVSTAT_OBE 0 +#define NPCX_EVSTAT_OBHE 1 +#define NPCX_EVSTAT_IBF 2 +#define NPCX_EVSTAT_IBHF 3 +#define NPCX_EVSTAT_EOR 4 +#define NPCX_EVSTAT_EOW 5 +#define NPCX_EVSTAT_STSR 6 +#define NPCX_EVSTAT_IBOR 7 +#define NPCX_STATUS_OBES 6 +#define NPCX_STATUS_IBFS 7 +#define NPCX_SHICFG3_OBUFLVLDIS 7 +#define NPCX_SHICFG4_IBUFLVLDIS 7 +#define NPCX_SHICFG5_IBUFLVL2 FIELD(0, 6) +#define NPCX_SHICFG5_IBUFLVL2DIS 7 +#define NPCX_EVSTAT2_IBHF2 0 +#define NPCX_EVSTAT2_CSNRE 1 +#define NPCX_EVSTAT2_CSNFE 2 +#define NPCX_EVENABLE2_IBHF2EN 0 +#define NPCX_EVENABLE2_CSNREEN 1 +#define NPCX_EVENABLE2_CSNFEEN 2 #endif /* _NUVOTON_NPCX_REG_DEF_CROS_H */ diff --git a/zephyr/linker/CMakeLists.txt b/zephyr/linker/CMakeLists.txt index 982e2b0218..94544d454b 100644 --- a/zephyr/linker/CMakeLists.txt +++ b/zephyr/linker/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/linker/fixed-sections.ld b/zephyr/linker/fixed-sections.ld index 5046823713..d4dcadcf0d 100644 --- a/zephyr/linker/fixed-sections.ld +++ b/zephyr/linker/fixed-sections.ld @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/linker/image_size.ld b/zephyr/linker/image_size.ld index b1e401ae7f..4a0c854f05 100644 --- a/zephyr/linker/image_size.ld +++ b/zephyr/linker/image_size.ld @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/linker/iram_text.ld b/zephyr/linker/iram_text.ld index 3ea3f4db7e..f01c3509da 100644 --- a/zephyr/linker/iram_text.ld +++ b/zephyr/linker/iram_text.ld @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ /* This code taken from core/cortex-m/ec.lds.S */ -#if defined(CONFIG_PLATFORM_EC_MPU) +#if defined(CONFIG_MPU) /* MPU regions must be aligned to a 32-byte boundary */ #define _IRAM_ALIGN 32 #else diff --git a/zephyr/linker/mchp-xec-lfw.ld b/zephyr/linker/mchp-xec-lfw.ld index 4c28f16bdf..6774c956a5 100644 --- a/zephyr/linker/mchp-xec-lfw.ld +++ b/zephyr/linker/mchp-xec-lfw.ld @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/linker/npcx-lfw.ld b/zephyr/linker/npcx-lfw.ld index a6de1df65a..e69c4c2aa5 100644 --- a/zephyr/linker/npcx-lfw.ld +++ b/zephyr/linker/npcx-lfw.ld @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/mock/CMakeLists.txt b/zephyr/mock/CMakeLists.txt new file mode 100644 index 0000000000..69add3ae3e --- /dev/null +++ b/zephyr/mock/CMakeLists.txt @@ -0,0 +1,7 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +zephyr_library_sources_ifdef(CONFIG_POWER_SEQUENCE_MOCK power.c) + +cros_ec_library_include_directories(include) diff --git a/zephyr/mock/Kconfig b/zephyr/mock/Kconfig new file mode 100644 index 0000000000..3d6e3f98dd --- /dev/null +++ b/zephyr/mock/Kconfig @@ -0,0 +1,11 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config POWER_SEQUENCE_MOCK + bool "Use a mocked power sequence driver." + help + A simplified power sequence driver that invokes startup/shutdown + and suspend/resume hooks in appropriate state transitions. Any + request that comes in mid sequence is pended and ran after final + state is reached. diff --git a/zephyr/mock/include/mock/power.h b/zephyr/mock/include/mock/power.h new file mode 100644 index 0000000000..9f04053241 --- /dev/null +++ b/zephyr/mock/include/mock/power.h @@ -0,0 +1,26 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_TEST_MOCK_POWER_H +#define ZEPHYR_TEST_MOCK_POWER_H + +#include <zephyr/fff.h> +#include "power.h" + +/* Mocks for ec/power/common.c and board specific implementations */ +DECLARE_FAKE_VALUE_FUNC(enum power_state, power_handle_state, enum power_state); +DECLARE_FAKE_VOID_FUNC(chipset_force_shutdown, enum chipset_shutdown_reason); +DECLARE_FAKE_VOID_FUNC(chipset_power_on); +DECLARE_FAKE_VALUE_FUNC(int, command_power, int, const char **); + +enum power_state power_handle_state_custom_fake(enum power_state state); + +void chipset_force_shutdown_custom_fake(enum chipset_shutdown_reason reason); + +void chipset_power_on_custom_fake(void); + +int command_power_custom_fake(int argc, const char **argv); + +#endif /* ZEPHYR_TEST_MOCK_POWER_H */ diff --git a/zephyr/mock/power.c b/zephyr/mock/power.c new file mode 100644 index 0000000000..fc82cc7250 --- /dev/null +++ b/zephyr/mock/power.c @@ -0,0 +1,264 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> +#include <zephyr/ztest.h> + +#include "hooks.h" +#include "lid_switch.h" +#include "power.h" +#include "task.h" +#include "util.h" + +#include "mock/power.h" + +LOG_MODULE_REGISTER(mock_power); + +/* Mocks for ec/power/common.c and board specific implementations */ +DEFINE_FAKE_VALUE_FUNC(enum power_state, power_handle_state, enum power_state); +DEFINE_FAKE_VOID_FUNC(chipset_force_shutdown, enum chipset_shutdown_reason); +DEFINE_FAKE_VOID_FUNC(chipset_power_on); +DEFINE_FAKE_VALUE_FUNC(int, command_power, int, const char **); + +#define MOCK_POWER_LIST(FAKE) \ + { \ + FAKE(power_handle_state); \ + FAKE(chipset_force_shutdown); \ + FAKE(chipset_power_on); \ + FAKE(command_power); \ + } + +/** + * @brief Reset all the fakes before each test. + */ +static void mock_power_rule_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + + MOCK_POWER_LIST(RESET_FAKE); + + FFF_RESET_HISTORY(); + + power_handle_state_fake.custom_fake = power_handle_state_custom_fake; + chipset_force_shutdown_fake.custom_fake = + chipset_force_shutdown_custom_fake; + chipset_power_on_fake.custom_fake = chipset_power_on_custom_fake; + command_power_fake.custom_fake = command_power_custom_fake; +} + +ZTEST_RULE(mock_power_rule, mock_power_rule_before, NULL); + +enum power_request_t { + POWER_REQ_NONE, + POWER_REQ_OFF, + POWER_REQ_ON, + POWER_REQ_COUNT, +}; + +static const char *power_req_name[POWER_REQ_COUNT] = { + "none", + "OFF", + "ON", +}; + +static enum power_request_t current_power_request = POWER_REQ_NONE; +static enum power_request_t pending_power_request = POWER_REQ_NONE; + +void handle_power_request(enum power_request_t req) +{ + if (current_power_request == POWER_REQ_NONE) { + current_power_request = req; + } else if (current_power_request != req) { + LOG_INF("MOCK: Handling %s, pend %s request", + power_req_name[current_power_request], + power_req_name[req]); + pending_power_request = req; + } +} + +void power_request_complete(void) +{ + current_power_request = pending_power_request; + pending_power_request = POWER_REQ_NONE; +} + +void chipset_force_shutdown_custom_fake(enum chipset_shutdown_reason reason) +{ + LOG_INF("MOCK %s(%d)", __func__, reason); + handle_power_request(POWER_REQ_OFF); + task_wake(TASK_ID_CHIPSET); +} + +void chipset_power_on_custom_fake(void) +{ + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) { + handle_power_request(POWER_REQ_ON); + task_wake(TASK_ID_CHIPSET); + } +} + +/* Power states that we can report */ +enum power_state_t { + PSTATE_UNKNOWN, + PSTATE_OFF, + PSTATE_ON, + PSTATE_COUNT, +}; + +static const char *const state_name[] = { + "unknown", + "OFF", + "ON", +}; + +int command_power_custom_fake(int argc, const char **argv) +{ + int v, req; + + if (argc < 2) { + enum power_state_t state; + + state = PSTATE_UNKNOWN; + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + state = PSTATE_OFF; + if (chipset_in_state(CHIPSET_STATE_ON)) + state = PSTATE_ON; + ccprintf("%s\n", state_name[state]); + + return EC_SUCCESS; + } + + if (!parse_bool(argv[1], &v)) { + return EC_ERROR_PARAM1; + } + req = v ? POWER_REQ_ON : POWER_REQ_OFF; + handle_power_request(req); + LOG_INF("MOCK: Requesting power %s\n", power_req_name[req]); + task_wake(TASK_ID_CHIPSET); + + return EC_SUCCESS; +} + +static void mock_lid_event(void) +{ + /* Power task only cares about lid-open events */ + if (!lid_is_open()) { + return; + } + + LOG_INF("MOCK: lid opened %s\n", power_req_name[POWER_REQ_ON]); + handle_power_request(POWER_REQ_ON); + task_wake(TASK_ID_CHIPSET); +} +DECLARE_HOOK(HOOK_LID_CHANGE, mock_lid_event, HOOK_PRIO_DEFAULT); + +enum power_state power_handle_state_custom_fake(enum power_state state) +{ + enum power_state new_state = state; + enum power_request_t request = current_power_request; + + switch (state) { + /* Steady states */ + case POWER_G3: + if (current_power_request == POWER_REQ_ON) { + new_state = POWER_G3S5; + } else if (current_power_request == POWER_REQ_OFF) { + new_state = state; + power_request_complete(); + } + break; + case POWER_S5: /* System is soft-off */ + if (current_power_request == POWER_REQ_ON) { + new_state = POWER_S5S3; + } else if (current_power_request == POWER_REQ_OFF) { + /* S5 timeout should transition to G3 */ + } + break; + case POWER_S3: /* Suspend; RAM on, processor is asleep */ + if (current_power_request == POWER_REQ_ON) { + new_state = POWER_S3S0; + } else if (current_power_request == POWER_REQ_OFF) { + new_state = POWER_S3S5; + } + break; + case POWER_S0: /* System is on */ + if (current_power_request == POWER_REQ_ON) { + new_state = state; + power_request_complete(); + + sleep_notify_transition(SLEEP_NOTIFY_RESUME, + HOOK_CHIPSET_RESUME); + } else if (current_power_request == POWER_REQ_OFF) { + new_state = POWER_S0S3; + } + break; + case POWER_S4: /* System is suspended to disk */ +#ifdef CONFIG_POWER_S0IX + case POWER_S0ix: +#endif + new_state = state; + break; + /* Transitions */ + case POWER_S3S0: /* S3 -> S0 */ +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif + hook_notify(HOOK_CHIPSET_RESUME); + sleep_resume_transition(); + power_request_complete(); + disable_sleep(SLEEP_MASK_AP_RUN); + new_state = POWER_S0; + break; + case POWER_S0S3: /* S0 -> S3 */ + sleep_notify_transition(SLEEP_NOTIFY_SUSPEND, + HOOK_CHIPSET_SUSPEND); + hook_notify(HOOK_CHIPSET_SUSPEND); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif + sleep_suspend_transition(); + enable_sleep(SLEEP_MASK_AP_RUN); + new_state = POWER_S3; + break; + case POWER_S5S3: /* S5 -> S3 (skips S4 on non-Intel systems) */ + hook_notify(HOOK_CHIPSET_PRE_INIT); + hook_notify(HOOK_CHIPSET_STARTUP); + sleep_reset_tracking(); + new_state = POWER_S3; + break; + case POWER_S3S5: /* S3 -> S5 (skips S4 on non-Intel systems) */ + hook_notify(HOOK_CHIPSET_SHUTDOWN); + hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); + new_state = POWER_S5; + break; + case POWER_G3S5: /* G3 -> S5 (at system init time) */ + new_state = POWER_S5; + break; + case POWER_S5G3: /* S5 -> G3 */ + new_state = POWER_G3; + break; +#ifdef CONFIG_POWER_S0IX + case POWER_S0ixS0: /* S0ix -> S0 */ + new_state = POWER_S0; + break; + case POWER_S0S0ix: /* S0 -> S0ix */ + new_state = POWER_S0ix; + break; +#endif + case POWER_S5S4: /* S5 -> S4 */ + case POWER_S4S3: /* S4 -> S3 */ + case POWER_S3S4: /* S3 -> S4 */ + case POWER_S4S5: /* S4 -> S5 */ + default: + break; + } + + LOG_INF("MOCK: power request=%u, state=%u -> new_state=%u\n", request, + state, new_state); + + return new_state; +} diff --git a/zephyr/module.yml b/zephyr/module.yml index 66bfcd8d9f..7988a425e5 100644 --- a/zephyr/module.yml +++ b/zephyr/module.yml @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/.pylintrc b/zephyr/projects/.pylintrc index 9ca0b5f8c9..f4609e3781 100644 --- a/zephyr/projects/.pylintrc +++ b/zephyr/projects/.pylintrc @@ -1,15 +1,3 @@ -[MASTER] -init-hook='import sys; sys.path.append("/usr/lib64/python3.6/site-packages")' - -[MESSAGES CONTROL] - -disable=bad-continuation,bad-whitespace,format,fixme - -[format] - -max-line-length=88 -string-quote=double - [BASIC] additional-builtins= here, @@ -19,3 +7,21 @@ additional-builtins= register_npcx_project, register_raw_project, good-names=BUILD + +# cros lint doesn't inherit the pylintrc from the parent dir. +# These settings are copied from platform/ec/pylintrc +[MESSAGES CONTROL] + +disable= + bad-continuation, + bad-whitespace, + # These have nothing to do with black, they are just annoying + fixme, + too-many-arguments, + too-many-statements, + too-many-branches, + too-many-locals + +[format] + +string-quote=double diff --git a/zephyr/projects/brya/BUILD.py b/zephyr/projects/brya/BUILD.py index d044a11ae7..9991335ca7 100644 --- a/zephyr/projects/brya/BUILD.py +++ b/zephyr/projects/brya/BUILD.py @@ -1,11 +1,13 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Define zmake projects for brya.""" -def register_npcx9_variant(project_name, extra_dts_overlays=(), extra_kconfig_files=()): +def register_npcx9_variant( + project_name, extra_dts_overlays=(), extra_kconfig_files=() +): """Register a variant of a brya, even though this is not named as such.""" return register_npcx_project( project_name=project_name, @@ -13,7 +15,6 @@ def register_npcx9_variant(project_name, extra_dts_overlays=(), extra_kconfig_fi dts_overlays=[ "adc.dts", "battery.dts", - "cbi_eeprom.dts", "fan.dts", "gpio.dts", "i2c.dts", @@ -40,8 +41,3 @@ brya = register_npcx9_variant( extra_dts_overlays=[here / "brya.dts"], extra_kconfig_files=[here / "prj_brya.conf"], ) - -ghost = brya.variant( - project_name="ghost", - kconfig_files=[here / "prj_ghost.conf"], -) diff --git a/zephyr/projects/brya/CMakeLists.txt b/zephyr/projects/brya/CMakeLists.txt index 0cb61eb838..11c1a8386f 100644 --- a/zephyr/projects/brya/CMakeLists.txt +++ b/zephyr/projects/brya/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(brya) set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/brya" CACHE PATH diff --git a/zephyr/projects/brya/Kconfig b/zephyr/projects/brya/Kconfig index 111476eb42..4dd8e23443 100644 --- a/zephyr/projects/brya/Kconfig +++ b/zephyr/projects/brya/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/brya/adc.dts b/zephyr/projects/brya/adc.dts index e1502b2389..f3f0d1e064 100644 --- a/zephyr/projects/brya/adc.dts +++ b/zephyr/projects/brya/adc.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,22 +8,18 @@ compatible = "named-adc-channels"; adc_ddr_soc: ddr_soc { - label = "TEMP_DDR_SOC"; enum-name = "ADC_TEMP_SENSOR_1_DDR_SOC"; io-channels = <&adc0 0>; }; adc_ambient: ambient { - label = "TEMP_AMBIENT"; enum-name = "ADC_TEMP_SENSOR_2_AMBIENT"; io-channels = <&adc0 1>; }; adc_charger: charger { - label = "TEMP_CHARGER"; enum-name = "ADC_TEMP_SENSOR_3_CHARGER"; io-channels = <&adc0 6>; }; adc_wwan: wwan { - label = "TEMP_WWAN"; enum-name = "ADC_TEMP_SENSOR_4_WWAN"; io-channels = <&adc0 7>; }; diff --git a/zephyr/projects/brya/battery.dts b/zephyr/projects/brya/battery.dts index 1de6b3aa4a..4844d88d92 100644 --- a/zephyr/projects/brya/battery.dts +++ b/zephyr/projects/brya/battery.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/brya/battery_present.c b/zephyr/projects/brya/battery_present.c index 5dc587293c..c487a01f36 100644 --- a/zephyr/projects/brya/battery_present.c +++ b/zephyr/projects/brya/battery_present.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/brya/brya.dts b/zephyr/projects/brya/brya.dts index 4182da6c32..4b0490afa9 100644 --- a/zephyr/projects/brya/brya.dts +++ b/zephyr/projects/brya/brya.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/brya/cbi_eeprom.dts b/zephyr/projects/brya/cbi_eeprom.dts deleted file mode 100644 index 95a6806f31..0000000000 --- a/zephyr/projects/brya/cbi_eeprom.dts +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -&i2c7_0 { - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - label = "EEPROM_CBI"; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; diff --git a/zephyr/projects/brya/fan.dts b/zephyr/projects/brya/fan.dts index e67845757f..aa6dcfde7d 100644 --- a/zephyr/projects/brya/fan.dts +++ b/zephyr/projects/brya/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm5 0 PWM_KHZ(1) PWM_POLARITY_NORMAL>; - pwm-frequency = <1000>; rpm_min = <2200>; rpm_start = <2200>; rpm_max = <4200>; diff --git a/zephyr/projects/brya/gpio.dts b/zephyr/projects/brya/gpio.dts index 2b853f4d3b..6c6a2ac054 100644 --- a/zephyr/projects/brya/gpio.dts +++ b/zephyr/projects/brya/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -132,10 +132,12 @@ gpio_pg_ec_dsw_pwrok: pg_ec_dsw_pwrok { gpios = <&gpioc 7 GPIO_INPUT>; enum-name = "GPIO_PG_EC_DSW_PWROK"; + alias = "GPIO_SEQ_EC_DSW_PWROK"; }; en_s5_rails { gpios = <&gpiob 6 GPIO_OUTPUT_LOW>; enum-name = "GPIO_EN_S5_RAILS"; + alias = "GPIO_TEMP_SENSOR_POWER"; }; sys_rst_odl { gpios = <&gpioc 5 GPIO_ODR_HIGH>; @@ -272,116 +274,68 @@ }; usb_c0_oc_odl { gpios = <&ioex_port1 4 GPIO_ODR_HIGH>; - enum-name = "IOEX_USB_C0_OC_ODL"; no-auto-init; }; - usb_c0_frs_en { + usb_c0_frs_en: usb_c0_frs_en { gpios = <&ioex_port1 6 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C0_FRS_EN"; no-auto-init; }; usb_c0_rt_rst_odl: usb_c0_rt_rst_odl { gpios = <&ioex_port1 7 GPIO_ODR_LOW>; - enum-name = "IOEX_USB_C0_RT_RST_ODL"; no-auto-init; }; usb_c2_rt_rst_odl: usb_c2_rt_rst_odl { gpios = <&ioex_port2 2 GPIO_ODR_LOW>; - enum-name = "IOEX_USB_C2_RT_RST_ODL"; no-auto-init; }; usb_c1_oc_odl { gpios = <&ioex_port2 3 GPIO_ODR_HIGH>; - enum-name = "IOEX_USB_C1_OC_ODL"; no-auto-init; }; usb_c2_oc_odl { gpios = <&ioex_port2 4 GPIO_ODR_HIGH>; - enum-name = "IOEX_USB_C2_OC_ODL"; no-auto-init; }; - usb_c2_frs_en { + usb_c2_frs_en: usb_c2_frs_en { gpios = <&ioex_port2 6 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C2_FRS_EN"; no-auto-init; }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; }; usba-port-enable-list { compatible = "cros-ec,usba-port-enable-pins"; enable-pins = <&gpio_en_pp5000_usba_r>; }; - - vsby-psl-in-list { - /* Use PSL_IN1/2/3 as detection pins from hibernate mode */ - psl-in-pads = <&psl_in1 &psl_in2 &psl_in3>; - status = "okay"; - }; -}; - -&i2c1_0 { - status = "okay"; - pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; - pinctrl-names = "default"; - - nct3808_0_P1: nct3808_0_P1@70 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x70>; - label = "NCT3808_0_P1"; - - ioex_port1: gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT3808_0_P1_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xdc>; - pinmux_mask = <0xff>; - }; - }; - - nct3808_0_P2: nct3808_0_P2@74 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x74>; - label = "NCT3808_0_P2"; - - ioex_port2: gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT3808_0_P2_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xdc>; - pinmux_mask = <0xff>; - }; - }; - - nct3808_alert_1 { - compatible = "nuvoton,nct38xx-gpio-alert"; - irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; - nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>; - label = "NCT3808_ALERT_1"; - }; }; /* Power switch logic input pads */ /* LID_OPEN_OD */ -&psl_in1 { - flag = <NPCX_PSL_RISING_EDGE>; +&psl_in1_gpd2 { + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; /* ACOK_EC_OD */ -&psl_in2 { - flag = <NPCX_PSL_RISING_EDGE>; +&psl_in2_gp00 { + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; /* GSC_EC_PWR_BTN_ODL */ -&psl_in3 { - flag = <NPCX_PSL_FALLING_EDGE>; +&psl_in3_gp01 { + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01>; }; diff --git a/zephyr/projects/brya/i2c.dts b/zephyr/projects/brya/i2c.dts index 6567e27bf0..7284d80870 100644 --- a/zephyr/projects/brya/i2c.dts +++ b/zephyr/projects/brya/i2c.dts @@ -1,60 +1,50 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ + #include <dt-bindings/usb_pd_tcpm.h> + / { named-i2c-ports { compatible = "named-i2c-ports"; i2c_sensor: sensor { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_SENSOR"; + enum-names = "I2C_PORT_SENSOR"; }; tcpc0_2: tcpc0_2 { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_USB_C0_C2_TCPC"; + enum-names = "I2C_PORT_USB_C0_C2_TCPC"; }; tcpc1: tcpc1 { i2c-port = <&i2c4_1>; - enum-name = "I2C_PORT_USB_C1_TCPC"; + enum-names = "I2C_PORT_USB_C1_TCPC"; dynamic-speed; }; - ppc0_2: ppc0_2 { + c0_c2_bc12: c0_c2_bc12 { i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_USB_C0_C2_PPC"; + enum-names = "I2C_PORT_USB_C0_C2_PPC", + "I2C_PORT_USB_C0_C2_BC12"; }; - ppc1: ppc1 { + c1_bc12: c1_bc12 { i2c-port = <&i2c6_1>; - enum-name = "I2C_PORT_USB_C1_PPC"; + enum-names = "I2C_PORT_USB_C1_PPC", + "I2C_PORT_USB_C1_BC12"; dynamic-speed; }; retimer0_2: retimer0_2 { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_USB_C0_C2_MUX"; + enum-names = "I2C_PORT_USB_C0_C2_MUX"; }; battery { i2c-port = <&i2c5_0>; - enum-name = "I2C_PORT_BATTERY"; - }; - eeprom { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_BATTERY"; }; i2c_charger: charger { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_CHARGER"; - }; - c1_bc12: c1_bc12 { - i2c-port = <&i2c6_1>; - enum-name = "I2C_PORT_USB_C1_BC12"; - }; - c0_c2_bc12: c0_c2_bc12 { - i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_USB_C0_C2_BC12"; - }; - mp2964 { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_MP2964"; + enum-names = "I2C_PORT_CHARGER", + "I2C_PORT_EEPROM", + "I2C_PORT_MP2964"; }; }; }; @@ -75,6 +65,67 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; pinctrl-names = "default"; + + tcpc_port0: nct38xx@70 { + compatible = "nuvoton,nct38xx"; + reg = <0x70>; + gpio-dev = <&nct3808_0_P1>; + tcpc-flags = <( + TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>; + }; + + nct3808_0_P1: nct3808_0_P1@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT3808_0_P1"; + + ioex_port1: gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3808_0_P1_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xdc>; + pinmux_mask = <0xff>; + }; + }; + + tcpc_port2: nct38xx@74 { + compatible = "nuvoton,nct38xx"; + reg = <0x74>; + gpio-dev = <&nct3808_0_P2>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + }; + + nct3808_0_P2: nct3808_0_P2@74 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x74>; + label = "NCT3808_0_P2"; + + ioex_port2: gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3808_0_P2_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xdc>; + pinmux_mask = <0xff>; + }; + }; + + nct3808_alert_1 { + compatible = "nuvoton,nct38xx-gpio-alert"; + irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>; + label = "NCT3808_ALERT_1"; + }; }; &i2c_ctrl1 { @@ -86,6 +137,34 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; pinctrl-names = "default"; + + ppc_port0: syv682x@40 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x40>; + frs_en_gpio = <&usb_c0_frs_en>; + }; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + + ppc_port2: syv682x@42 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x42>; + frs_en_gpio = <&usb_c2_frs_en>; + }; + + bc12_port2: pi3usb9201@5d { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5d>; + irq = <&int_usb_c2_bc12>; + }; }; &i2c_ctrl2 { @@ -97,6 +176,20 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; pinctrl-names = "default"; + + usb_c0_bb_retimer: jhl8040r-c0@56 { + compatible = "intel,jhl8040r"; + reg = <0x56>; + int-pin = <&usb_c0_rt_int_odl>; + reset-pin = <&usb_c0_rt_rst_odl>; + }; + + usb_c2_bb_retimer: jhl8040r-c2@57 { + compatible = "intel,jhl8040r"; + reg = <0x57>; + int-pin = <&usb_c2_rt_int_odl>; + reset-pin = <&usb_c2_rt_rst_odl>; + }; }; &i2c_ctrl3 { @@ -108,6 +201,16 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>; pinctrl-names = "default"; + + tcpc_port1: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + tcpc-flags = <( + TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | + TCPC_FLAGS_CONTROL_VCONN | + TCPC_FLAGS_CONTROL_FRS)>; + }; }; &i2c_ctrl4 { @@ -130,6 +233,19 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>; pinctrl-names = "default"; + + ppc_port1: nx20p348x@72 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x72>; + }; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c1_bc12>; + }; }; &i2c_ctrl6 { @@ -147,6 +263,21 @@ reg = <0x20>; label = "I2C_ADDR_MP2964_FLAGS"; }; + + charger: bq25710@9 { + compatible = "ti,bq25710"; + status = "okay"; + reg = <0x9>; + }; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; }; &i2c_ctrl7 { diff --git a/zephyr/projects/brya/include/gpio_map.h b/zephyr/projects/brya/include/gpio_map.h deleted file mode 100644 index 98f3463132..0000000000 --- a/zephyr/projects/brya/include/gpio_map.h +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <zephyr/devicetree.h> -#include <gpio_signal.h> - -#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED - -#define GPIO_SEQ_EC_DSW_PWROK GPIO_PG_EC_DSW_PWROK - -/* TODO(fabiobaltieri): make this a named-temp-sensors property, deprecate the - * Kconfig option. - */ -#define GPIO_TEMP_SENSOR_POWER GPIO_EN_S5_RAILS - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/brya/interrupts.dts b/zephyr/projects/brya/interrupts.dts index 7132c12f77..1adca3e035 100644 --- a/zephyr/projects/brya/interrupts.dts +++ b/zephyr/projects/brya/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/brya/kblight_hooks.c b/zephyr/projects/brya/kblight_hooks.c index e00d8953db..d6d795f28e 100644 --- a/zephyr/projects/brya/kblight_hooks.c +++ b/zephyr/projects/brya/kblight_hooks.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/brya/keyboard.dts b/zephyr/projects/brya/keyboard.dts index 4f06764810..91fad2db92 100644 --- a/zephyr/projects/brya/keyboard.dts +++ b/zephyr/projects/brya/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,6 @@ kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm3 0 PWM_HZ(2400) PWM_POLARITY_NORMAL>; - frequency = <2400>; }; }; @@ -41,6 +40,8 @@ &kso10_gp07 &kso11_gp06 &kso12_gp05 + &kso13_gp04 + &kso14_gp82 >; pinctrl-names = "default"; }; diff --git a/zephyr/projects/brya/motionsense.dts b/zephyr/projects/brya/motionsense.dts index dd3f479042..78b5d2387e 100644 --- a/zephyr/projects/brya/motionsense.dts +++ b/zephyr/projects/brya/motionsense.dts @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 The Chromium OS Authors + * Copyright 2022 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ @@ -29,11 +29,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; mutex_lis2dw12: lis2dw12-mutex { - label = "LIS2DW12_MUTEX"; }; mutex_lsm6dso: lsm6dso-mutex { - label = "LSM6DSO_MUTEX"; }; }; @@ -67,7 +65,12 @@ status = "okay"; }; - lsm6dso_data: lsm6dso-drv-data { + lsm6dso_accel_data: lsm6dso-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + lsm6dso_gyro_data: lsm6dso-drv-data { compatible = "cros-ec,drvdata-lsm6dso"; status = "okay"; }; @@ -139,7 +142,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -147,7 +150,6 @@ compatible = "cros-ec,lis2dw12"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&mutex_lis2dw12>; @@ -160,11 +162,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -174,25 +174,22 @@ compatible = "cros-ec,lsm6dso-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_lsm6dso>; port = <&i2c_sensor>; rot-standard-ref = <&base_rot_ref>; default-range = <4>; - drv-data = <&lsm6dso_data>; + drv-data = <&lsm6dso_accel_data>; i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS"; configs { compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(13000 | ROUND_UP_FLAG)>; ec-rate = <(100 * USEC_PER_MSEC)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; ec-rate = <(100 * USEC_PER_MSEC)>; }; @@ -203,14 +200,13 @@ compatible = "cros-ec,lsm6dso-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_lsm6dso>; port = <&i2c_sensor>; rot-standard-ref = <&base_rot_ref>; default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */ - drv-data = <&lsm6dso_data>; + drv-data = <&lsm6dso_gyro_data>; i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS"; }; @@ -218,7 +214,6 @@ compatible = "cros-ec,tcs3400-clear"; status = "okay"; - label = "Clear Light"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_CAMERA"; port = <&i2c_sensor>; @@ -230,7 +225,6 @@ "cros-ec,motionsense-sensor-config"; ec-s0 { /* Run ALS sensor in S0 */ - label = "SENSOR_CONFIG_EC_S0"; odr = <1000>; }; }; @@ -240,7 +234,6 @@ compatible = "cros-ec,tcs3400-rgb"; status = "okay"; - label = "RGB Light"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_CAMERA"; default-range = <0x10000>; /* scale = 1x, uscale = 0 */ diff --git a/zephyr/projects/brya/prj.conf b/zephyr/projects/brya/prj.conf index 7ce897ae5f..19b523261b 100644 --- a/zephyr/projects/brya/prj.conf +++ b/zephyr/projects/brya/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -35,9 +35,9 @@ CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y # eSPI CONFIG_ESPI=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5=y -CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US=150 +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US=150 # I2C CONFIG_I2C=y @@ -86,9 +86,6 @@ CONFIG_PLATFORM_EC_TEMP_SENSOR=y CONFIG_PLATFORM_EC_THERMISTOR=y CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y -# Miscellaneous configs -CONFIG_PLATFORM_EC_HIBERNATE_PSL=y - # MKBP event CONFIG_PLATFORM_EC_MKBP_EVENT=y CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y diff --git a/zephyr/projects/brya/prj_brya.conf b/zephyr/projects/brya/prj_brya.conf index 48f98f479d..5aaf86a8c9 100644 --- a/zephyr/projects/brya/prj_brya.conf +++ b/zephyr/projects/brya/prj_brya.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/brya/pwm_leds.dts b/zephyr/projects/brya/pwm_leds.dts index 4f5157317d..4321b4bd34 100644 --- a/zephyr/projects/brya/pwm_leds.dts +++ b/zephyr/projects/brya/pwm_leds.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,7 +20,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0 &pwm_led1>; - frequency = <4800>; /*<amber white>*/ color-map-red = <0 0>; diff --git a/zephyr/projects/brya/temp_sensors.dts b/zephyr/projects/brya/temp_sensors.dts index f4505a3bc1..ae436a2c6b 100644 --- a/zephyr/projects/brya/temp_sensors.dts +++ b/zephyr/projects/brya/temp_sensors.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,58 +6,66 @@ #include <cros/thermistor/thermistor.dtsi> / { + temp_ddr_soc: ddr_soc { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_ddr_soc>; + }; + + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_ambient>; + }; + + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_charger>; + }; + + temp_wwan: wwan { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_wwan>; + }; + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; ddr_soc { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_30K9_47K_4050B>; - label = "DDR and SOC"; - enum-name = "TEMP_SENSOR_1_DDR_SOC"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_ddr_soc>; + sensor = <&temp_ddr_soc>; }; + ambient { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_30K9_47K_4050B>; - label = "Ambient"; - enum-name = "TEMP_SENSOR_2_AMBIENT"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_ambient>; + sensor = <&temp_ambient>; }; + charger { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_30K9_47K_4050B>; - label = "Charger"; - enum-name = "TEMP_SENSOR_3_CHARGER"; temp_fan_off = <35>; temp_fan_max = <65>; temp_host_high = <105>; temp_host_halt = <120>; temp_host_release_high = <90>; - adc = <&adc_charger>; + sensor = <&temp_charger>; }; + wwan { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_30K9_47K_4050B>; - label = "WWAN"; - enum-name = "TEMP_SENSOR_4_WWAN"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <130>; temp_host_halt = <130>; temp_host_release_high = <100>; - adc = <&adc_wwan>; + sensor = <&temp_wwan>; }; }; }; diff --git a/zephyr/projects/brya/usbc.dts b/zephyr/projects/brya/usbc.dts index 181acd837e..1be9ac94ac 100644 --- a/zephyr/projects/brya/usbc.dts +++ b/zephyr/projects/brya/usbc.dts @@ -1,10 +1,8 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ - #include <dt-bindings/usb_pd_tcpm.h> - / { usbc { #address-cells = <1>; @@ -13,37 +11,17 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c0_bc12>; - port = <&c0_c2_bc12>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; - tcpc { - compatible = "nuvoton,nct38xx"; - gpio-dev = <&nct3808_0_P1>; - port = <&tcpc0_2>; - i2c-addr-flags = "NCT38XX_I2C_ADDR1_1_FLAGS"; - tcpc-flags = <( - TCPC_FLAGS_TCPCI_REV2_0 | - TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>; + bc12 = <&bc12_port0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c0_bb_retimer + &virtual_mux_c0>; }; - chg { - compatible = "ti,bq25710"; - status = "okay"; - port = <&i2c_charger>; - }; - usb-muxes = <&usb_c0_bb_retimer &virtual_mux_c0>; + ppc = <&ppc_port0>; }; port0-muxes { - usb_c0_bb_retimer: jhl8040r-c0 { - compatible = "intel,jhl8040r"; - port = <&retimer0_2>; - i2c-addr-flags = <0x56>; - int-pin = <&usb_c0_rt_int_odl>; - reset-pin = <&usb_c0_rt_rst_odl>; - }; virtual_mux_c0: virtual-mux-c0 { compatible = "cros-ec,usbc-mux-virtual"; }; @@ -52,24 +30,13 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c1_bc12>; - port = <&c1_bc12>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + bc12 = <&bc12_port1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_c1 &tcpci_mux_c1>; }; - tcpc { - compatible = "parade,ps8xxx"; - port = <&tcpc1>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - tcpc-flags = <( - TCPC_FLAGS_TCPCI_REV2_0 | - TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | - TCPC_FLAGS_CONTROL_VCONN | - TCPC_FLAGS_CONTROL_FRS)>; - }; - usb-muxes = <&virtual_mux_c1 &tcpci_mux_c1>; + ppc = <&ppc_port1>; }; port1-muxes { tcpci_mux_c1: tcpci-mux-c1 { @@ -84,30 +51,16 @@ port2@2 { compatible = "named-usbc-port"; reg = <2>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c2_bc12>; - port = <&c0_c2_bc12>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_1_FLAGS"; - }; - tcpc { - compatible = "nuvoton,nct38xx"; - gpio-dev = <&nct3808_0_P2>; - port = <&tcpc0_2>; - i2c-addr-flags = "NCT38XX_I2C_ADDR2_1_FLAGS"; - tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + bc12 = <&bc12_port2>; + tcpc = <&tcpc_port2>; + usb-mux-chain-2 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c2_bb_retimer + &virtual_mux_c2>; }; - usb-muxes = <&usb_c2_bb_retimer &virtual_mux_c2>; + ppc = <&ppc_port2>; }; port2-muxes { - usb_c2_bb_retimer: jhl8040r-c2 { - compatible = "intel,jhl8040r"; - port = <&retimer0_2>; - i2c-addr-flags = <0x57>; - int-pin = <&usb_c2_rt_int_odl>; - reset-pin = <&usb_c2_rt_rst_odl>; - }; virtual_mux_c2: virtual-mux-c2 { compatible = "cros-ec,usbc-mux-virtual"; }; diff --git a/zephyr/projects/corsola/BUILD.py b/zephyr/projects/corsola/BUILD.py index 83ad865cb1..32ccd9ebf1 100644 --- a/zephyr/projects/corsola/BUILD.py +++ b/zephyr/projects/corsola/BUILD.py @@ -1,15 +1,15 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Define zmake projects for corsola.""" -# Default chip is it8xxx2, some variants will use NPCX9X. +# Default chip is it81202bx, some variants will use NPCX9X. def register_corsola_project( project_name, - chip="it8xxx2", + chip="it81202bx", extra_dts_overlays=(), extra_kconfig_files=(), ): @@ -39,12 +39,14 @@ register_corsola_project( here / "gpio_krabby.dts", here / "i2c_krabby.dts", here / "interrupts_krabby.dts", - here / "cbi_eeprom.dts", here / "led_krabby.dts", here / "motionsense_krabby.dts", here / "usbc_krabby.dts", ], - extra_kconfig_files=[here / "prj_krabby.conf"], + extra_kconfig_files=[ + here / "prj_it81202_base.conf", + here / "prj_krabby.conf", + ], ) register_corsola_project( @@ -56,7 +58,6 @@ register_corsola_project( here / "host_interface_npcx.dts", here / "i2c_kingler.dts", here / "interrupts_kingler.dts", - here / "cbi_eeprom.dts", here / "gpio_kingler.dts", here / "npcx_keyboard.dts", here / "led_kingler.dts", @@ -64,7 +65,10 @@ register_corsola_project( here / "usbc_kingler.dts", here / "default_gpio_pinctrl_kingler.dts", ], - extra_kconfig_files=[here / "prj_kingler.conf"], + extra_kconfig_files=[ + here / "prj_npcx993_base.conf", + here / "prj_kingler.conf", + ], ) register_corsola_project( @@ -76,9 +80,10 @@ register_corsola_project( here / "host_interface_npcx.dts", here / "i2c_kingler.dts", here / "interrupts_kingler.dts", - here / "cbi_eeprom.dts", + here / "cbi_steelix.dts", here / "gpio_steelix.dts", here / "npcx_keyboard.dts", + here / "keyboard_steelix.dts", here / "led_steelix.dts", here / "motionsense_kingler.dts", here / "motionsense_steelix.dts", @@ -87,7 +92,47 @@ register_corsola_project( here / "default_gpio_pinctrl_kingler.dts", ], extra_kconfig_files=[ - here / "prj_kingler.conf", + here / "prj_npcx993_base.conf", here / "prj_steelix.conf", ], ) + + +register_corsola_project( + "tentacruel", + extra_dts_overlays=[ + here / "adc_tentacruel.dts", + here / "battery_tentacruel.dts", + here / "cbi_tentacruel.dts", + here / "gpio_tentacruel.dts", + here / "i2c_tentacruel.dts", + here / "interrupts_tentacruel.dts", + here / "led_tentacruel.dts", + here / "motionsense_tentacruel.dts", + here / "usbc_tentacruel.dts", + here / "thermistor_tentacruel.dts", + ], + extra_kconfig_files=[ + here / "prj_it81202_base.conf", + here / "prj_tentacruel.conf", + ], +) + +register_corsola_project( + "magikarp", + extra_dts_overlays=[ + here / "adc_magikarp.dts", + here / "battery_magikarp.dts", + here / "cbi_magikarp.dts", + here / "gpio_magikarp.dts", + here / "i2c_magikarp.dts", + here / "interrupts_magikarp.dts", + here / "led_magikarp.dts", + here / "motionsense_magikarp.dts", + here / "usbc_magikarp.dts", + ], + extra_kconfig_files=[ + here / "prj_it81202_base.conf", + here / "prj_magikarp.conf", + ], +) diff --git a/zephyr/projects/corsola/CMakeLists.txt b/zephyr/projects/corsola/CMakeLists.txt index 2bd50910ee..f92bb2b702 100644 --- a/zephyr/projects/corsola/CMakeLists.txt +++ b/zephyr/projects/corsola/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") cros_ec_library_include_directories(include) @@ -24,8 +24,6 @@ if(DEFINED CONFIG_BOARD_KRABBY) zephyr_library_sources("src/krabby/hooks.c" "src/krabby/charger_workaround.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C "src/krabby/i2c.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON - "src/krabby/led.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/krabby/usb_pd_policy.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC @@ -43,6 +41,7 @@ elseif(DEFINED CONFIG_BOARD_KINGLER) "src/kingler/button.c") elseif(DEFINED CONFIG_BOARD_STEELIX) project(steelix) + zephyr_library_sources("src/kingler/board_steelix.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C "src/kingler/i2c.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON "src/kingler/led_steelix.c") @@ -50,5 +49,28 @@ elseif(DEFINED CONFIG_BOARD_STEELIX) "src/kingler/usb_pd_policy.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/kingler/usbc_config.c") + +elseif(DEFINED CONFIG_BOARD_TENTACRUEL) + project(tentacruel) + zephyr_library_sources("src/krabby/hooks.c" + "src/krabby/charger_workaround.c" + "src/krabby/sensor_tentacruel.c" + "src/krabby/temp_tentacruel.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C "src/krabby/i2c.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/krabby/usb_pd_policy.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/krabby/usbc_config_tentacruel.c") + +elseif(DEFINED CONFIG_BOARD_MAGIKARP) + project(magikarp) + zephyr_library_sources("src/krabby/hooks.c" + "src/krabby/sensor_magikarp.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C "src/krabby/i2c.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/krabby/usb_pd_policy.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/krabby/usbc_config.c") + endif() diff --git a/zephyr/projects/corsola/Kconfig b/zephyr/projects/corsola/Kconfig index b05d68acc1..4f66601c20 100644 --- a/zephyr/projects/corsola/Kconfig +++ b/zephyr/projects/corsola/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -20,6 +20,18 @@ config BOARD_STEELIX Build Google Steelix variant board. Steelix is a variant of Kingler and has MediaTek MT8186 SoC with NPCX993FA0BX EC. +config BOARD_TENTACRUEL + bool "Google Tentacruel Board" + help + Build Google Tentacruel variant board. Tentacruel is a variant of Krabby + and has MediaTek MT8186 SoC with ITE it81202-bx EC. + +config BOARD_MAGIKARP + bool "Google Magikarp Board" + help + Build Google Magikarp variant board. Magikarp is a variant of Krabby + and has MediaTek MT8186 SoC with ITE it81202-bx EC. + config VARIANT_CORSOLA_DB_DETECTION bool "Corsola Platform Runtime Daughter Board Detection" depends on PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG diff --git a/zephyr/projects/corsola/adc_kingler.dts b/zephyr/projects/corsola/adc_kingler.dts index e7e70caa70..7b69abe48a 100644 --- a/zephyr/projects/corsola/adc_kingler.dts +++ b/zephyr/projects/corsola/adc_kingler.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,7 +12,6 @@ compatible = "named-adc-channels"; adc_charger_pmon_r { - label = "ADC_CHARGER_PMON_R"; enum-name = "ADC_PSYS"; io-channels = <&adc0 0>; /* @@ -21,17 +20,14 @@ mul = <21043>; }; adc_ec_id0 { - label = "ADC_EC_ID0"; enum-name = "ADC_ID_0"; io-channels = <&adc0 1>; }; adc_ec_id1 { - label = "ADC_EC_ID1"; enum-name = "ADC_ID_1"; io-channels = <&adc0 2>; }; adc_charger_amon_r { - label = "ADC_AMON_R"; enum-name = "ADC_AMON_BMON"; io-channels = <&adc0 3>; mul = <1000>; diff --git a/zephyr/projects/corsola/adc_krabby.dts b/zephyr/projects/corsola/adc_krabby.dts index 68336f0a70..be65e9eea7 100644 --- a/zephyr/projects/corsola/adc_krabby.dts +++ b/zephyr/projects/corsola/adc_krabby.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,23 +8,19 @@ compatible = "named-adc-channels"; adc_vbus_c0 { - label = "VBUS_C0"; enum-name = "ADC_VBUS_C0"; io-channels = <&adc0 0>; mul = <10>; }; adc_board_id0 { - label = "BOARD_ID_0"; enum-name = "ADC_BOARD_ID_0"; io-channels = <&adc0 1>; }; adc_board_id1 { - label = "BOARD_ID_1"; enum-name = "ADC_BOARD_ID_1"; io-channels = <&adc0 2>; }; adc_vbus_c1 { - label = "VBUS_C1"; enum-name = "ADC_VBUS_C1"; io-channels = <&adc0 7>; mul = <10>; diff --git a/zephyr/projects/corsola/adc_magikarp.dts b/zephyr/projects/corsola/adc_magikarp.dts new file mode 100644 index 0000000000..358af6f0f4 --- /dev/null +++ b/zephyr/projects/corsola/adc_magikarp.dts @@ -0,0 +1,63 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + named-adc-channels { + compatible = "named-adc-channels"; + adc_vbus_c0 { + enum-name = "ADC_VBUS_C0"; + io-channels = <&adc0 0>; + mul = <10>; + }; + adc_board_id0 { + enum-name = "ADC_BOARD_ID_0"; + io-channels = <&adc0 1>; + }; + adc_board_id1 { + enum-name = "ADC_BOARD_ID_1"; + io-channels = <&adc0 2>; + }; + adc_vbus_c1 { + enum-name = "ADC_VBUS_C1"; + io-channels = <&adc0 7>; + mul = <10>; + }; + adc_ambient: ambient { + enum-name = "ADC_TEMP_SENSOR_2_AMBIENT"; + io-channels = <&adc0 5>; + }; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_ch0_gpi0_default + &adc0_ch1_gpi1_default + &adc0_ch2_gpi2_default + &adc0_ch5_gpi5_default + &adc0_ch7_gpi7_default>; + pinctrl-names = "default"; +}; + +/ { + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_NCP15WB>; + adc = <&adc_ambient>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + ambient { + sensor = <&temp_ambient>; + }; + }; +}; + +&thermistor_3V3_30K9_47K_NCP15WB { + status = "okay"; +}; diff --git a/zephyr/projects/corsola/adc_tentacruel.dts b/zephyr/projects/corsola/adc_tentacruel.dts new file mode 100644 index 0000000000..1b5e849589 --- /dev/null +++ b/zephyr/projects/corsola/adc_tentacruel.dts @@ -0,0 +1,66 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + named-adc-channels { + compatible = "named-adc-channels"; + adc_vbus_c0 { + enum-name = "ADC_VBUS_C0"; + io-channels = <&adc0 0>; + mul = <10>; + }; + adc_board_id0 { + enum-name = "ADC_BOARD_ID_0"; + io-channels = <&adc0 1>; + }; + adc_board_id1 { + enum-name = "ADC_BOARD_ID_1"; + io-channels = <&adc0 2>; + }; + adc_vbus_c1 { + enum-name = "ADC_VBUS_C1"; + io-channels = <&adc0 7>; + mul = <10>; + }; + adc_ambient: ambient { + enum-name = "ADC_TEMP_SENSOR_2_AMBIENT"; + io-channels = <&adc0 5>; + }; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_ch0_gpi0_default + &adc0_ch1_gpi1_default + &adc0_ch2_gpi2_default + &adc0_ch5_gpi5_default + &adc0_ch7_gpi7_default>; + pinctrl-names = "default"; +}; + +/ { + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_NCP15WB>; + adc = <&adc_ambient>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + ambient { + sensor = <&temp_ambient>; + }; + temp_charger: charger { + sensor = <&charger>; + }; + }; +}; + +&thermistor_3V3_30K9_47K_NCP15WB { + status = "okay"; +}; diff --git a/zephyr/projects/corsola/battery_kingler.dts b/zephyr/projects/corsola/battery_kingler.dts index 63d3b7ea21..b01fb8a46d 100644 --- a/zephyr/projects/corsola/battery_kingler.dts +++ b/zephyr/projects/corsola/battery_kingler.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/battery_krabby.dts b/zephyr/projects/corsola/battery_krabby.dts index f80550c76b..ce41859182 100644 --- a/zephyr/projects/corsola/battery_krabby.dts +++ b/zephyr/projects/corsola/battery_krabby.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ / { batteries { default_battery: c235 { - compatible = "as3gwrc3ka,c235-41", "battery-smart"; + compatible = "celxpert,c235-41", "battery-smart"; }; }; }; diff --git a/zephyr/projects/corsola/battery_magikarp.dts b/zephyr/projects/corsola/battery_magikarp.dts new file mode 100644 index 0000000000..bbdd6ac0c5 --- /dev/null +++ b/zephyr/projects/corsola/battery_magikarp.dts @@ -0,0 +1,12 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: smp_c31n1915 { + compatible = "smp,c31n1915", "battery-smart"; + }; + }; +}; diff --git a/zephyr/projects/corsola/battery_steelix.dts b/zephyr/projects/corsola/battery_steelix.dts index 63d3b7ea21..594c83478c 100644 --- a/zephyr/projects/corsola/battery_steelix.dts +++ b/zephyr/projects/corsola/battery_steelix.dts @@ -1,15 +1,24 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { batteries { - default_battery: smp_l20m3pg2 { - compatible = "smp,l20m3pg2", "battery-smart"; + default_battery: byd_l22b3pg0 { + compatible = "byd,l22b3pg0", "battery-smart"; }; - lgc_l20l3pg2 { - compatible = "lgc,l20l3pg2", "battery-smart"; + celxpert_l22c3pg0 { + compatible = "celxpert,l22c3pg0", "battery-smart"; + }; + cosmx_l22x3pg0 { + compatible = "cosmx,l22x3pg0", "battery-smart"; + }; + smp_l22m3pg0 { + compatible = "smp,l22m3pg0", "battery-smart"; + }; + sunwoda_l22d3pg0 { + compatible = "sunwoda,l22d3pg0", "battery-smart"; }; }; }; diff --git a/zephyr/projects/corsola/battery_tentacruel.dts b/zephyr/projects/corsola/battery_tentacruel.dts new file mode 100644 index 0000000000..f116c20a51 --- /dev/null +++ b/zephyr/projects/corsola/battery_tentacruel.dts @@ -0,0 +1,12 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: dynapack_c140254 { + compatible = "dynapack,c140254", "battery-smart"; + }; + }; +}; diff --git a/zephyr/projects/corsola/cbi_eeprom.dts b/zephyr/projects/corsola/cbi_eeprom.dts deleted file mode 100644 index 7f95e2ed6d..0000000000 --- a/zephyr/projects/corsola/cbi_eeprom.dts +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - - &i2c_pwr_cbi { - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - label = "EEPROM_CBI"; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; diff --git a/zephyr/projects/corsola/cbi_magikarp.dts b/zephyr/projects/corsola/cbi_magikarp.dts new file mode 100644 index 0000000000..5eac6b82c6 --- /dev/null +++ b/zephyr/projects/corsola/cbi_magikarp.dts @@ -0,0 +1,36 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* magikarp-specific fw_config fields. */ + magikarp-fw-config { + compatible = "cros-ec,cbi-fw-config"; + /* + * FW_CONFIG field to describe mainboard orientation in chassis. + */ + base-gyro { + enum-name = "FW_BASE_GYRO"; + start = <0>; + size = <2>; + + None { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_BASE_NONE"; + value = <0>; + }; + icm42607 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_BASE_ICM42607"; + value = <1>; + default; + }; + bmi323 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_BASE_BMI323"; + value = <2>; + }; + }; + }; +}; diff --git a/zephyr/projects/corsola/cbi_steelix.dts b/zephyr/projects/corsola/cbi_steelix.dts new file mode 100644 index 0000000000..e282eb25ab --- /dev/null +++ b/zephyr/projects/corsola/cbi_steelix.dts @@ -0,0 +1,54 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + steelix-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + /* + * FW_CONFIG field to indicate the device is clamshell + * or convertible. + */ + form_factor { + enum-name = "FORM_FACTOR"; + start = <13>; + size = <3>; + + convertible { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "CONVERTIBLE"; + value = <1>; + }; + clamshell { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "CLAMSHELL"; + value = <0>; + }; + }; + + /* FW_CONFIG field to indicate which DB is attached. */ + db_config: db { + enum-name = "DB"; + start = <0>; + size = <4>; + + sub-board-1 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "DB_NONE"; + value = <0>; + }; + sub-board-2 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "DB_USBA_HDMI"; + value = <1>; + }; + sub-board-3 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "DB_USBA_HDMI_LTE"; + value = <2>; + }; + }; + }; +}; diff --git a/zephyr/projects/corsola/cbi_tentacruel.dts b/zephyr/projects/corsola/cbi_tentacruel.dts new file mode 100644 index 0000000000..2cd4594417 --- /dev/null +++ b/zephyr/projects/corsola/cbi_tentacruel.dts @@ -0,0 +1,36 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* tentacruel-specific fw_config fields. */ + tentacruel-fw-config { + compatible = "cros-ec,cbi-fw-config"; + /* + * FW_CONFIG field to describe mainboard orientation in chassis. + */ + base-gyro { + enum-name = "FW_BASE_GYRO"; + start = <8>; + size = <2>; + + None { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_BASE_NONE"; + value = <0>; + }; + icm42607 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_BASE_ICM42607"; + value = <1>; + default; + }; + bmi323 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_BASE_BMI323"; + value = <2>; + }; + }; + }; +}; diff --git a/zephyr/projects/corsola/common.dts b/zephyr/projects/corsola/common.dts index 52c8eeddf2..001dcc7ce3 100644 --- a/zephyr/projects/corsola/common.dts +++ b/zephyr/projects/corsola/common.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/default_gpio_pinctrl_kingler.dts b/zephyr/projects/corsola/default_gpio_pinctrl_kingler.dts index d25b388726..604658a145 100644 --- a/zephyr/projects/corsola/default_gpio_pinctrl_kingler.dts +++ b/zephyr/projects/corsola/default_gpio_pinctrl_kingler.dts @@ -1,44 +1,44 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ /* Adds the &alt1_no_lpc_espi setting over the NPCX9 default setting. */ &{/def-io-conf-list} { - pinctrl-0 = <&alt0_gpio_no_spip - &alt0_gpio_no_fpip - &alt1_no_pwrgd - &alt1_no_lpc_espi - &alta_no_peci_en - &altd_npsl_in1_sl - &altd_npsl_in2_sl - &altd_psl_in3_sl - &altd_psl_in4_sl - &alt7_no_ksi0_sl - &alt7_no_ksi1_sl - &alt7_no_ksi2_sl - &alt7_no_ksi3_sl - &alt7_no_ksi4_sl - &alt7_no_ksi5_sl - &alt7_no_ksi6_sl - &alt7_no_ksi7_sl - &alt8_no_kso00_sl - &alt8_no_kso01_sl - &alt8_no_kso02_sl - &alt8_no_kso03_sl - &alt8_no_kso04_sl - &alt8_no_kso05_sl - &alt8_no_kso06_sl - &alt8_no_kso07_sl - &alt9_no_kso08_sl - &alt9_no_kso09_sl - &alt9_no_kso10_sl - &alt9_no_kso11_sl - &alt9_no_kso12_sl - &alt9_no_kso13_sl - &alt9_no_kso14_sl - &alt9_no_kso15_sl - &alta_no_kso16_sl - &alta_no_kso17_sl - &altg_psl_gpo_sl>; + pinmux = <&alt0_gpio_no_spip + &alt0_gpio_no_fpip + &alt1_no_pwrgd + &alt1_no_lpc_espi + &alta_no_peci_en + &altd_npsl_in1_sl + &altd_npsl_in2_sl + &altd_psl_in3_sl + &altd_psl_in4_sl + &alt7_no_ksi0_sl + &alt7_no_ksi1_sl + &alt7_no_ksi2_sl + &alt7_no_ksi3_sl + &alt7_no_ksi4_sl + &alt7_no_ksi5_sl + &alt7_no_ksi6_sl + &alt7_no_ksi7_sl + &alt8_no_kso00_sl + &alt8_no_kso01_sl + &alt8_no_kso02_sl + &alt8_no_kso03_sl + &alt8_no_kso04_sl + &alt8_no_kso05_sl + &alt8_no_kso06_sl + &alt8_no_kso07_sl + &alt9_no_kso08_sl + &alt9_no_kso09_sl + &alt9_no_kso10_sl + &alt9_no_kso11_sl + &alt9_no_kso12_sl + &alt9_no_kso13_sl + &alt9_no_kso14_sl + &alt9_no_kso15_sl + &alta_no_kso16_sl + &alta_no_kso17_sl + &altg_psl_gpo_sl>; }; diff --git a/zephyr/projects/corsola/gpio_kingler.dts b/zephyr/projects/corsola/gpio_kingler.dts index 0199f985fa..d3a4c1be90 100644 --- a/zephyr/projects/corsola/gpio_kingler.dts +++ b/zephyr/projects/corsola/gpio_kingler.dts @@ -1,10 +1,11 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; gpio-wp = &gpio_ec_wp_l; gpio-kbd-kso2 = &gpio_ec_kso_02_inv; }; @@ -12,34 +13,36 @@ named-gpios { compatible = "named-gpios"; + /* + * In npcx9 series, gpio46, gpio47, and the whole gpio5 port + * belong to VHIF power well. On kingler, it is connencted to + * 1.8V. + */ base_imu_int_l: base_imu_int_l { - gpios = <&gpio5 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio5 6 GPIO_INPUT>; }; spi_ap_clk_ec { - gpios = <&gpio5 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio5 5 GPIO_INPUT>; }; spi_ap_cs_ec_l { - gpios = <&gpio5 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio5 3 GPIO_INPUT>; }; spi_ap_do_ec_di { - gpios = <&gpio4 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio4 6 GPIO_INPUT>; }; spi_ap_di_ec_do { - gpios = <&gpio4 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio4 7 GPIO_INPUT>; }; ap_ec_warm_rst_req: ap_ec_warm_rst_req { - gpios = <&gpio5 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_HIGH)>; + gpios = <&gpio5 1 (GPIO_INPUT | GPIO_ACTIVE_HIGH)>; enum-name = "GPIO_AP_EC_WARM_RST_REQ"; }; ap_ec_wdtrst_l: ap_ec_wdtrst_l { - gpios = <&gpio5 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_LOW)>; + gpios = <&gpio5 2 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_EC_WDTRST_L"; }; ap_in_sleep_l: ap_in_sleep_l { - gpios = <&gpio5 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_LOW)>; + gpios = <&gpio5 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_IN_SLEEP_L"; }; gpio_en_ulp: en_ulp { @@ -85,8 +88,12 @@ ec_pen_chg_dis_odl { gpios = <&gpioe 4 GPIO_INPUT>; }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpio8 0 GPIO_OUTPUT_LOW>; + }; gpio_ec_wp_l: ec_wp_odl { - gpios = <&gpioe 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + gpios = <&gpioe 3 (GPIO_INPUT | GPIO_ACTIVE_LOW | + GPIO_VOLTAGE_1P8)>; }; lid_accel_int_l { gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; @@ -108,7 +115,6 @@ }; ec_entering_rw { gpios = <&gpio0 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; }; charger_prochot_odl { gpios = <&gpiob 1 GPIO_INPUT>; @@ -138,13 +144,17 @@ gpio_x_ec_gpio2: x_ec_gpio2 { gpios = <&gpiod 4 GPIO_INPUT>; }; + /* + * In npcx9 series, gpio93-97, the whole gpioa port, and gpiob0 + * belong to VSPI power rail. On kingler, it is connencted to + * 1.8V. + */ ap_sysrst_odl_r: ap_sysrst_odl_r { - gpios = <&gpioa 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_LOW)>; + gpios = <&gpioa 1 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_EC_SYSRST_ODL"; }; gpio_ap_xhci_init_done: ap_xhci_init_done { - gpios = <&gpioa 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpioa 3 GPIO_INPUT>; }; gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { gpios = <&gpio6 7 GPIO_INPUT>; @@ -172,9 +182,8 @@ gpio_usb_c0_tcpc_rst: usb_c0_tcpc_rst { gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; }; - en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus_x { + en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { gpios = <&gpio6 0 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP5000_USB_A0_VBUS"; }; gpio_hdmi_prsnt_odl: hdmi_prsnt_odl { gpios = <&gpio3 7 GPIO_INPUT>; @@ -193,7 +202,7 @@ gpios = <&gpioc 7 GPIO_INPUT>; }; ec_ap_dp_hpd_odl: ec_ap_dp_hpd_odl { - gpios = <&gpio6 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio6 1 GPIO_ODR_HIGH>; }; ec_pmic_en_odl { gpios = <&gpio7 4 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; @@ -211,6 +220,10 @@ gpios = <&gpioe 5 GPIO_INPUT>; enum-name = "GPIO_CCD_MODE_ODL"; }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; }; /* @@ -233,12 +246,4 @@ &int_lid_open >; }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_ioe3 /* GPIOE3 GPIO_EC_WP_L */ - &lvol_io40 /* GPIO40 GPIO_EC_BL_EN_OD */ - >; - }; }; diff --git a/zephyr/projects/corsola/gpio_krabby.dts b/zephyr/projects/corsola/gpio_krabby.dts index 7246e8a40c..32498ab606 100644 --- a/zephyr/projects/corsola/gpio_krabby.dts +++ b/zephyr/projects/corsola/gpio_krabby.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,6 +7,7 @@ / { aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; gpio-wp = &ec_flash_wp_odl; }; @@ -56,6 +57,9 @@ gpios = <&gpioe 5 GPIO_INPUT>; enum-name = "GPIO_AC_PRESENT"; }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpioc 3 GPIO_OUTPUT_LOW>; + }; ec_flash_wp_odl: ec_flash_wp_odl { gpios = <&gpioi 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | GPIO_ACTIVE_LOW)>; @@ -111,7 +115,6 @@ }; en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { gpios = <&gpiob 7 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP5000_USB_A0_VBUS"; }; usb_c0_ppc_frsinfo: usb_c0_ppc_frsinfo { gpios = <&gpiof 0 GPIO_INPUT>; @@ -183,7 +186,6 @@ <&gpioa 3 GPIO_INPUT_PULL_DOWN>, <&gpioa 6 GPIO_INPUT_PULL_DOWN>, <&gpioa 7 GPIO_INPUT_PULL_DOWN>, - <&gpioc 3 GPIO_INPUT_PULL_DOWN>, <&gpiod 7 GPIO_INPUT_PULL_DOWN>, <&gpiof 1 GPIO_INPUT_PULL_DOWN>, <&gpioh 0 GPIO_INPUT_PULL_DOWN>, diff --git a/zephyr/projects/corsola/gpio_magikarp.dts b/zephyr/projects/corsola/gpio_magikarp.dts new file mode 100644 index 0000000000..aeaeab2431 --- /dev/null +++ b/zephyr/projects/corsola/gpio_magikarp.dts @@ -0,0 +1,238 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/gpio_defines.h> + +/ { + aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; + gpio-wp = &ec_flash_wp_odl; + }; + + named-gpios { + compatible = "named-gpios"; + + power_button_l: power_button_l { + gpios = <&gpioe 4 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + lid_open: lid_open { + gpios = <&gpioe 2 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + tablet_mode_l: tablet_mode_l { + gpios = <&gpioj 7 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + ap_ec_warm_rst_req: ap_ec_warm_rst_req { + gpios = <&gpiod 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_HIGH)>; + enum-name = "GPIO_AP_EC_WARM_RST_REQ"; + }; + ap_in_sleep_l: ap_in_sleep_l { + gpios = <&gpiob 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_AP_IN_SLEEP_L"; + }; + base_imu_int_l: base_imu_int_l { + gpios = <&gpiom 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + lid_accel_int_l: lid_accel_int_l { + gpios = <&gpiom 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + volume_down_l: volume_down_l { + gpios = <&gpiod 5 GPIO_INPUT>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + volume_up_l: volume_up_l { + gpios = <&gpiod 6 GPIO_INPUT>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + gpio_ap_xhci_init_done: ap_xhci_init_done { + gpios = <&gpioj 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ac_present: ac_present { + gpios = <&gpioe 5 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpioc 3 GPIO_OUTPUT_LOW>; + }; + ec_flash_wp_odl: ec_flash_wp_odl { + gpios = <&gpioi 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + }; + spi0_cs: spi0_cs { + gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_x_ec_gpio2: x_ec_gpio2 { + gpios = <&gpiob 2 GPIO_INPUT>; + }; + usb_c0_ppc_bc12_int_odl: usb_c0_ppc_bc12_int_odl { + gpios = <&gpiod 1 GPIO_INPUT>; + }; + usb_c1_bc12_charger_int_odl: usb_c1_bc12_charger_int_odl { + gpios = <&gpioj 4 GPIO_INPUT>; + }; + ec_pmic_en_odl: ec_pmic_en_odl { + gpios = <&gpiod 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_PMIC_EN_ODL"; + }; + en_pp5000_z2: en_pp5000_z2 { + gpios = <&gpioc 6 GPIO_OUTPUT_HIGH>; + }; + gpio_en_ulp: en_ulp { + gpios = <&gpioe 3 GPIO_OUTPUT_LOW>; + }; + sys_rst_odl: sys_rst_odl { + gpios = <&gpiog 1 GPIO_ODR_LOW>; + enum-name = "GPIO_SYS_RST_ODL"; + }; + gpio_ec_bl_en_od: ec_bl_en_od { + gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; + }; + ap_sysrst_odl_r: ap_ec_sysrst_odl { + gpios = <&gpioj 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_AP_EC_SYSRST_ODL"; + }; + ap_ec_wdtrst_l: ap_ec_wdtrst_l { + gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_AP_EC_WDTRST_L"; + }; + ec_int_l: ec_int_l { + gpios = <&gpioe 6 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_INT_L"; + }; + dp_aux_path_sel: dp_aux_path_sel { + gpios = <&gpiog 0 GPIO_OUTPUT_HIGH>; + }; + ec_ap_dp_hpd_odl: ec_ap_dp_hpd_odl { + gpios = <&gpioj 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + }; + en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { + gpios = <&gpiob 7 GPIO_OUTPUT_LOW>; + }; + usb_c0_ppc_frsinfo: usb_c0_ppc_frsinfo { + gpios = <&gpiof 0 GPIO_INPUT>; + }; + ec_batt_pres_odl: ec_batt_pres_odl { + gpios = <&gpioc 0 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + en_ec_id_odl: en_ec_id_odl { + gpios = <&gpioh 5 GPIO_ODR_HIGH>; + }; + entering_rw: entering_rw { + gpios = <&gpioc 5 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENTERING_RW"; + }; + gpio_en_5v_usm: en_5v_usm { + gpios = <&gpiog 3 GPIO_OUTPUT_LOW>; + }; + usb_a0_fault_odl: usb_a0_fault_odl { + gpios = <&gpioj 6 GPIO_INPUT>; + }; + gpio_ec_x_gpio1: ec_x_gpio1 { + gpios = <&gpioh 4 GPIO_OUTPUT_LOW>; + }; + gpio_ec_x_gpio3: ec_x_gpio3 { + gpios = <&gpioj 1 GPIO_OUTPUT_LOW>; + }; + gpio_hdmi_prsnt_odl: hdmi_prsnt_odl { + gpios = <&gpioj 3 GPIO_INPUT>; + }; + gpio_packet_mode_en: packet_mode_en { + gpios = <&gpiod 4 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + ccd_mode_odl { + gpios = <&gpioc 4 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + }; + + /* + * aliases for sub-board GPIOs + */ + aliases { + gpio-en-hdmi-pwr = &gpio_ec_x_gpio1; + gpio-usb-c1-frs-en = &gpio_ec_x_gpio1; + gpio-usb-c1-ppc-int-odl = &gpio_x_ec_gpio2; + gpio-ps185-ec-dp-hpd = &gpio_x_ec_gpio2; + gpio-usb-c1-dp-in-hpd = &gpio_ec_x_gpio3; + gpio-ps185-pwrdn-odl = &gpio_ec_x_gpio3; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-irqs = <&int_ac_present + &int_power_button + &int_lid_open>; + }; + + unused-pins { + compatible = "unused-gpios"; + + unused-gpios = + /* pg_pp5000_z2_od */ + <&gpiod 2 GPIO_INPUT>, + /* pg_mt6315_proc_b_odl */ + <&gpioe 1 GPIO_INPUT>, + /* ec_pen_chg_dis_odl */ + <&gpioh 3 GPIO_ODR_HIGH>, + /* unnamed nc pins */ + <&gpioa 3 GPIO_INPUT_PULL_DOWN>, + <&gpioa 6 GPIO_INPUT_PULL_DOWN>, + <&gpioa 7 GPIO_INPUT_PULL_DOWN>, + <&gpiof 1 GPIO_INPUT_PULL_DOWN>, + /* reserved for b:241345809 */ + <&gpiod 7 GPIO_OUTPUT_LOW>, + <&gpiog 2 GPIO_INPUT_PULL_DOWN>, + <&gpioh 0 GPIO_INPUT_PULL_DOWN>, + <&gpioh 6 GPIO_INPUT_PULL_DOWN>, + <&gpioi 3 GPIO_INPUT_PULL_DOWN>, + <&gpioi 6 GPIO_INPUT_PULL_DOWN>, + <&gpiom 6 (GPIO_INPUT_PULL_DOWN | GPIO_VOLTAGE_1P8)>, + /* spi_clk_gpg6 */ + <&gpiog 6 GPIO_INPUT_PULL_UP>, + /* spi_mosi_gpg4 */ + <&gpiog 4 GPIO_OUTPUT_LOW>, + /* spi_miso_gpg5 */ + <&gpiog 5 GPIO_OUTPUT_LOW>, + /* spi_cs_gpg7 */ + <&gpiog 7 GPIO_OUTPUT_LOW>; + }; +}; + +&pinctrl { + /* I2C property setting */ + i2c0_clk_gpb3_default: i2c0_clk_gpb3_default { + gpio-voltage = "1v8"; + }; + i2c0_data_gpb4_default: i2c0_data_gpb4_default { + gpio-voltage = "1v8"; + }; + i2c3_clk_gpf2_default: i2c3_clk_gpf2_default { + gpio-voltage = "1v8"; + }; + i2c3_data_gpf3_default: i2c3_data_gpf3_default { + gpio-voltage = "1v8"; + }; + /* SHI property setting */ + shi_mosi_gpm0_default: shi_mosi_gpm0_default { + gpio-voltage = "1v8"; + }; + shi_miso_gpm1_default: shi_miso_gpm1_default { + gpio-voltage = "1v8"; + }; + shi_clk_gpm4_default: shi_clk_gpm4_default { + gpio-voltage = "1v8"; + }; + shi_cs_gpm5_default: shi_cs_gpm5_default { + gpio-voltage = "1v8"; + }; +}; diff --git a/zephyr/projects/corsola/gpio_steelix.dts b/zephyr/projects/corsola/gpio_steelix.dts index 3e0375564f..299d809583 100644 --- a/zephyr/projects/corsola/gpio_steelix.dts +++ b/zephyr/projects/corsola/gpio_steelix.dts @@ -1,10 +1,11 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; gpio-wp = &gpio_ec_wp_l; gpio-kbd-kso2 = &gpio_ec_kso_02_inv; }; @@ -12,34 +13,36 @@ named-gpios { compatible = "named-gpios"; + /* + * In npcx9 series, gpio46, gpio47, and the whole gpio5 port + * belong to VHIF power well. On steelix, it is connencted to + * 1.8V. + */ base_imu_int_l: base_imu_int_l { - gpios = <&gpio5 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio5 6 GPIO_INPUT>; }; spi_ap_clk_ec { - gpios = <&gpio5 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio5 5 GPIO_INPUT>; }; spi_ap_cs_ec_l { - gpios = <&gpio5 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio5 3 GPIO_INPUT>; }; spi_ap_do_ec_di { - gpios = <&gpio4 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio4 6 GPIO_INPUT>; }; spi_ap_di_ec_do { - gpios = <&gpio4 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio4 7 GPIO_INPUT>; }; ap_ec_warm_rst_req: ap_ec_warm_rst_req { - gpios = <&gpio5 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_HIGH)>; + gpios = <&gpio5 1 (GPIO_INPUT | GPIO_ACTIVE_HIGH)>; enum-name = "GPIO_AP_EC_WARM_RST_REQ"; }; ap_ec_wdtrst_l: ap_ec_wdtrst_l { - gpios = <&gpio5 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_LOW)>; + gpios = <&gpio5 2 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_EC_WDTRST_L"; }; ap_in_sleep_l: ap_in_sleep_l { - gpios = <&gpio5 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_LOW)>; + gpios = <&gpio5 4 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_IN_SLEEP_L"; }; gpio_en_ulp: en_ulp { @@ -84,7 +87,6 @@ }; en_pp5000_usb_a1_vbus: en_pp5000_usb_a1_vbus_x { gpios = <&gpiof 5 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP5000_USB_A1_VBUS"; }; usb_a1_fault_odl { gpios = <&gpiof 4 GPIO_INPUT>; @@ -92,8 +94,12 @@ ec_pen_chg_dis_odl { gpios = <&gpioe 4 GPIO_INPUT>; }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpio8 0 GPIO_OUTPUT_LOW>; + }; gpio_ec_wp_l: ec_wp_odl { - gpios = <&gpioe 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + gpios = <&gpioe 3 (GPIO_INPUT | GPIO_ACTIVE_LOW | + GPIO_VOLTAGE_1P8)>; }; lid_accel_int_l { gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; @@ -115,7 +121,6 @@ }; ec_entering_rw { gpios = <&gpio0 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; }; charger_prochot_odl { gpios = <&gpiob 1 GPIO_INPUT>; @@ -145,13 +150,17 @@ gpio_x_ec_gpio2: x_ec_gpio2 { gpios = <&gpiod 4 GPIO_INPUT>; }; + /* + * In npcx9 series, gpio93-97, the whole gpioa port, and gpiob0 + * belong to VSPI power well. On steelix, it is connencted to + * 1.8V. + */ ap_sysrst_odl_r: ap_sysrst_odl_r { - gpios = <&gpioa 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | - GPIO_ACTIVE_LOW)>; + gpios = <&gpioa 1 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_EC_SYSRST_ODL"; }; gpio_ap_xhci_init_done: ap_xhci_init_done { - gpios = <&gpioa 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + gpios = <&gpioa 3 GPIO_INPUT>; }; gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { gpios = <&gpio6 7 GPIO_INPUT>; @@ -179,9 +188,8 @@ gpio_usb_c0_tcpc_rst: usb_c0_tcpc_rst { gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; }; - en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus_x { + en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { gpios = <&gpio6 0 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_EN_PP5000_USB_A0_VBUS"; }; gpio_hdmi_prsnt_odl: hdmi_prsnt_odl { gpios = <&gpio3 7 GPIO_INPUT>; @@ -200,7 +208,7 @@ gpios = <&gpioc 7 GPIO_INPUT>; }; ec_ap_dp_hpd_odl: ec_ap_dp_hpd_odl { - gpios = <&gpio6 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + gpios = <&gpio6 1 GPIO_ODR_HIGH>; }; ec_pmic_en_odl { gpios = <&gpio7 4 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; @@ -218,6 +226,10 @@ gpios = <&gpioe 5 GPIO_INPUT>; enum-name = "GPIO_CCD_MODE_ODL"; }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; }; /* @@ -240,12 +252,4 @@ &int_lid_open >; }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_ioe3 /* GPIOE3 GPIO_EC_WP_L */ - &lvol_io40 /* GPIO40 GPIO_EC_BL_EN_OD */ - >; - }; }; diff --git a/zephyr/projects/corsola/gpio_tentacruel.dts b/zephyr/projects/corsola/gpio_tentacruel.dts new file mode 100644 index 0000000000..75607cb561 --- /dev/null +++ b/zephyr/projects/corsola/gpio_tentacruel.dts @@ -0,0 +1,239 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/gpio_defines.h> + +/ { + aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; + gpio-wp = &ec_flash_wp_odl; + }; + + named-gpios { + compatible = "named-gpios"; + + power_button_l: power_button_l { + gpios = <&gpioe 4 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + lid_open: lid_open { + gpios = <&gpioe 2 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + tablet_mode_l: tablet_mode_l { + gpios = <&gpioj 7 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + ap_ec_warm_rst_req: ap_ec_warm_rst_req { + gpios = <&gpiod 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_HIGH)>; + enum-name = "GPIO_AP_EC_WARM_RST_REQ"; + }; + ap_in_sleep_l: ap_in_sleep_l { + gpios = <&gpiob 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_AP_IN_SLEEP_L"; + }; + base_imu_int_l: base_imu_int_l { + gpios = <&gpiom 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + lid_accel_int_l: lid_accel_int_l { + gpios = <&gpiom 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + volume_down_l: volume_down_l { + gpios = <&gpiod 5 GPIO_INPUT>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + volume_up_l: volume_up_l { + gpios = <&gpiod 6 GPIO_INPUT>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + gpio_ap_xhci_init_done: ap_xhci_init_done { + gpios = <&gpioj 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ac_present: ac_present { + gpios = <&gpioe 5 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpioc 3 GPIO_OUTPUT_LOW>; + }; + ec_flash_wp_odl: ec_flash_wp_odl { + gpios = <&gpioi 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + }; + spi0_cs: spi0_cs { + gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_x_ec_gpio2: x_ec_gpio2 { + gpios = <&gpiob 2 GPIO_INPUT>; + }; + usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { + gpios = <&gpiod 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; + }; + usb_c0_bc12_int_odl: usb_c0_bc12_int_odl { + gpios = <&gpiof 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_BC12_INT_ODL"; + }; + usb_c1_bc12_charger_int_odl: usb_c1_bc12_charger_int_odl { + gpios = <&gpioj 4 GPIO_INPUT>; + }; + ec_pmic_en_odl: ec_pmic_en_odl { + gpios = <&gpiod 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_PMIC_EN_ODL"; + }; + en_pp5000_z2: en_pp5000_z2 { + gpios = <&gpioc 6 GPIO_OUTPUT_HIGH>; + }; + gpio_en_ulp: en_ulp { + gpios = <&gpioe 3 GPIO_OUTPUT_LOW>; + }; + sys_rst_odl: sys_rst_odl { + gpios = <&gpiog 1 GPIO_ODR_LOW>; + enum-name = "GPIO_SYS_RST_ODL"; + }; + gpio_ec_bl_en_od: ec_bl_en_od { + gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; + }; + ap_sysrst_odl_r: ap_ec_sysrst_odl { + gpios = <&gpioj 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_AP_EC_SYSRST_ODL"; + }; + ap_ec_wdtrst_l: ap_ec_wdtrst_l { + gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; + enum-name = "GPIO_AP_EC_WDTRST_L"; + }; + ec_int_l: ec_int_l { + gpios = <&gpioe 6 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_INT_L"; + }; + dp_aux_path_sel: dp_aux_path_sel { + gpios = <&gpiog 0 GPIO_OUTPUT_HIGH>; + }; + ec_ap_dp_hpd_odl: ec_ap_dp_hpd_odl { + gpios = <&gpioj 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + }; + en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { + gpios = <&gpiob 7 GPIO_OUTPUT_LOW>; + }; + usb_c0_frs_en: usb_c0_frs_en { + gpios = <&gpiof 0 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_USB_C0_FRS_EN"; + }; + ec_batt_pres_odl: ec_batt_pres_odl { + gpios = <&gpioc 0 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + en_ec_id_odl: en_ec_id_odl { + gpios = <&gpioh 5 GPIO_ODR_HIGH>; + }; + entering_rw: entering_rw { + gpios = <&gpioc 5 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENTERING_RW"; + }; + gpio_en_5v_usm: en_5v_usm { + gpios = <&gpiog 3 GPIO_OUTPUT_LOW>; + }; + usb_a0_fault_odl: usb_a0_fault_odl { + gpios = <&gpioj 6 GPIO_INPUT>; + }; + gpio_ec_x_gpio1: ec_x_gpio1 { + gpios = <&gpioh 4 GPIO_OUTPUT_LOW>; + }; + gpio_ec_x_gpio3: ec_x_gpio3 { + gpios = <&gpioj 1 GPIO_OUTPUT_LOW>; + }; + gpio_hdmi_prsnt_odl: hdmi_prsnt_odl { + gpios = <&gpioj 3 GPIO_INPUT>; + }; + gpio_packet_mode_en: packet_mode_en { + gpios = <&gpiod 4 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + }; + + /* + * aliases for sub-board GPIOs + */ + aliases { + gpio-en-hdmi-pwr = &gpio_ec_x_gpio1; + gpio-usb-c1-frs-en = &gpio_ec_x_gpio1; + gpio-usb-c1-ppc-int-odl = &gpio_x_ec_gpio2; + gpio-ps185-ec-dp-hpd = &gpio_x_ec_gpio2; + gpio-usb-c1-dp-in-hpd = &gpio_ec_x_gpio3; + gpio-ps185-pwrdn-odl = &gpio_ec_x_gpio3; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-irqs = <&int_ac_present + &int_power_button + &int_lid_open>; + }; + + unused-pins { + compatible = "unused-gpios"; + + unused-gpios = + /* pg_pp5000_z2_od */ + <&gpiod 2 GPIO_INPUT>, + /* pg_mt6315_proc_b_odl */ + <&gpioe 1 GPIO_INPUT>, + /* ec_pen_chg_dis_odl */ + <&gpioh 3 GPIO_ODR_HIGH>, + /* ccd_mode_odl */ + <&gpioc 4 GPIO_INPUT>, + /* unnamed nc pins */ + <&gpioa 3 GPIO_INPUT_PULL_DOWN>, + <&gpioa 6 GPIO_INPUT_PULL_DOWN>, + <&gpioa 7 GPIO_INPUT_PULL_DOWN>, + <&gpiod 7 GPIO_INPUT_PULL_DOWN>, + <&gpioh 0 GPIO_INPUT_PULL_DOWN>, + <&gpioh 6 GPIO_INPUT_PULL_DOWN>, + <&gpioi 3 GPIO_INPUT_PULL_DOWN>, + <&gpioi 6 GPIO_INPUT_PULL_DOWN>, + <&gpiom 6 (GPIO_INPUT_PULL_DOWN | GPIO_VOLTAGE_1P8)>, + /* spi_clk_gpg6 */ + <&gpiog 6 GPIO_INPUT_PULL_UP>, + /* spi_mosi_gpg4 */ + <&gpiog 4 GPIO_OUTPUT_LOW>, + /* spi_miso_gpg5 */ + <&gpiog 5 GPIO_OUTPUT_LOW>, + /* spi_cs_gpg7 */ + <&gpiog 7 GPIO_OUTPUT_LOW>; + }; +}; + +&pinctrl { + /* I2C property setting */ + i2c0_clk_gpb3_default: i2c0_clk_gpb3_default { + gpio-voltage = "1v8"; + }; + i2c0_data_gpb4_default: i2c0_data_gpb4_default { + gpio-voltage = "1v8"; + }; + i2c3_clk_gpf2_default: i2c3_clk_gpf2_default { + gpio-voltage = "1v8"; + }; + i2c3_data_gpf3_default: i2c3_data_gpf3_default { + gpio-voltage = "1v8"; + }; + /* SHI property setting */ + shi_mosi_gpm0_default: shi_mosi_gpm0_default { + gpio-voltage = "1v8"; + }; + shi_miso_gpm1_default: shi_miso_gpm1_default { + gpio-voltage = "1v8"; + }; + shi_clk_gpm4_default: shi_clk_gpm4_default { + gpio-voltage = "1v8"; + }; + shi_cs_gpm5_default: shi_cs_gpm5_default { + gpio-voltage = "1v8"; + }; +}; diff --git a/zephyr/projects/corsola/host_interface_npcx.dts b/zephyr/projects/corsola/host_interface_npcx.dts index 9c6a498940..14efa3c6b2 100644 --- a/zephyr/projects/corsola/host_interface_npcx.dts +++ b/zephyr/projects/corsola/host_interface_npcx.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/i2c_kingler.dts b/zephyr/projects/corsola/i2c_kingler.dts index c832e55d2e..4bcbeb6950 100644 --- a/zephyr/projects/corsola/i2c_kingler.dts +++ b/zephyr/projects/corsola/i2c_kingler.dts @@ -1,8 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <dt-bindings/usb_pd_tcpm.h> + /* * Kingler and Steelix use the same dts, take care of this when modify it. */ @@ -13,42 +15,29 @@ i2c_sensor: sensor { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_SENSOR"; + enum-names = "I2C_PORT_SENSOR"; }; i2c_usb_c0: usb-c0 { i2c-port = <&i2c1_0>; remote-port = <7>; - enum-name = "I2C_PORT_USB_C0"; + enum-names = "I2C_PORT_USB_C0"; }; i2c_usb_c1: usb-c1 { i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_USB_C1"; - }; - tcpc1 { - i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_USB_C1_TCPC"; - }; - ppc1 { - i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_USB_C1_PPC"; - }; - eeprom { - i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_USB_C1", + "I2C_PORT_USB_C1_TCPC", + "I2C_PORT_USB_C1_PPC"; }; i2c_charger: charger { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_POWER"; + enum-names = "I2C_PORT_POWER", + "I2C_PORT_EEPROM"; }; battery { i2c-port = <&i2c5_0>; remote-port = <1>; - enum-name = "I2C_PORT_BATTERY"; - }; - virtual-battery { - i2c-port = <&i2c5_0>; - remote-port = <1>; - enum-name = "I2C_PORT_VIRTUAL_BATTERY"; + enum-names = "I2C_PORT_BATTERY", + "I2C_PORT_VIRTUAL_BATTERY"; }; }; }; @@ -71,6 +60,30 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + + tcpc_port0: anx7447-tcpc@2c { + compatible = "anologix,anx7447-tcpc"; + status = "okay"; + reg = <0x2c>; + tcpc-flags = <( + TCPC_FLAGS_VBUS_MONITOR | + TCPC_FLAGS_ALERT_OD | + TCPC_FLAGS_CONTROL_VCONN | + TCPC_FLAGS_CONTROL_FRS)>; + }; + + ppc_port0: nx20p348x@72 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x72>; + }; }; &i2c_ctrl1 { @@ -83,18 +96,60 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; pinctrl-names = "default"; + + bc12_port1: rt1718s-bc12@40 { + compatible = "richtek,rt1718s-bc12"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port1: rt1718s-tcpc@40 { + compatible = "richtek,rt1718s-tcpc"; + reg = <0x40>; + tcpc-flags = <( + TCPC_FLAGS_ALERT_OD | + TCPC_FLAGS_CONTROL_VCONN | + TCPC_FLAGS_CONTROL_FRS)>; + }; + + ppc_port1: nx20p348x@72 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x72>; + }; + + ps8743_mux_1: ps8743-mux-1@10 { + compatible = "parade,ps8743"; + reg = <0x10>; + board-init = "ps8743_mux_1_board_init"; + }; }; &i2c_ctrl2 { status = "okay"; }; -i2c_pwr_cbi: &i2c3_0 { +&i2c3_0 { label = "I2C_PWR_CBI"; status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; pinctrl-names = "default"; + + charger: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; }; &i2c_ctrl3 { diff --git a/zephyr/projects/corsola/i2c_krabby.dts b/zephyr/projects/corsola/i2c_krabby.dts index 75cf3834eb..4b3c46ffe4 100644 --- a/zephyr/projects/corsola/i2c_krabby.dts +++ b/zephyr/projects/corsola/i2c_krabby.dts @@ -1,103 +1,21 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -/ { - named-i2c-ports { - compatible = "named-i2c-ports"; +#include "i2c_krabby_tentacruel.dtsi" - battery { - i2c-port = <&i2c1>; - remote-port = <1>; - enum-name = "I2C_PORT_BATTERY"; - }; - virtual-battery { - i2c-port = <&i2c1>; - enum-name = "I2C_PORT_VIRTUAL_BATTERY"; - }; - eeprom { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_EEPROM"; - }; - i2c_charger: charger { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_CHARGER"; - }; - i2c_sensor: sensor { - i2c-port = <&i2c3>; - enum-name = "I2C_PORT_SENSOR"; - }; - i2c_usb_c0: usb-c0 { - i2c-port = <&i2c2>; - enum-name = "I2C_PORT_USB_C0"; - }; - i2c_usb_c1: usb-c1 { - i2c-port = <&i2c4>; - enum-name = "I2C_PORT_USB_C1"; - }; - i2c_usb_mux0: usb-mux0 { - i2c-port = <&i2c2>; - enum-name = "I2C_PORT_USB_MUX0"; - }; - i2c_usb_mux1: usb-mux1 { - i2c-port = <&i2c4>; - enum-name = "I2C_PORT_USB_MUX1"; - }; +&i2c0 { + charger: rt9490@53 { + compatible = "richtek,rt9490"; + status = "okay"; + reg = <0x53>; }; - -}; - -i2c_pwr_cbi: &i2c0 { - /* EC_I2C_PWR_CBI */ - label = "I2C_PWR_CBI"; - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c0_clk_gpb3_default - &i2c0_data_gpb4_default>; - pinctrl-names = "default"; -}; - -&i2c1 { - /* EC_I2C_BATTERY */ - label = "I2C_BATTERY"; - status = "okay"; - clock-frequency = <50000>; - pinctrl-0 = <&i2c1_clk_gpc1_default - &i2c1_data_gpc2_default>; - pinctrl-names = "default"; -}; - -&i2c2 { - /* EC_I2C_USB_C0 */ - label = "I2C_USB_C0"; - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c2_clk_gpf6_default - &i2c2_data_gpf7_default>; - pinctrl-names = "default"; -}; - -&i2c3 { - /* EC_I2C_SENSOR */ - label = "I2C_SENSOR"; - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - scl-gpios = <&gpiof 2 0>; - sda-gpios = <&gpiof 3 0>; - pinctrl-0 = <&i2c3_clk_gpf2_default - &i2c3_data_gpf3_default>; - pinctrl-names = "default"; - prescale-scl-low = <1>; }; &i2c4 { - /* EC_I2C_USB_C1 */ - label = "I2C_USB_C1"; - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c4_clk_gpe0_default - &i2c4_data_gpe7_default>; - pinctrl-names = "default"; - prescale-scl-low = <1>; + tusb1064_mux_1: tusb1064-mux-1@44 { + compatible = "ti,tusb1064"; + reg = <0x44>; + }; }; diff --git a/zephyr/projects/corsola/i2c_krabby_tentacruel.dtsi b/zephyr/projects/corsola/i2c_krabby_tentacruel.dtsi new file mode 100644 index 0000000000..377eaafbca --- /dev/null +++ b/zephyr/projects/corsola/i2c_krabby_tentacruel.dtsi @@ -0,0 +1,136 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-i2c-ports { + compatible = "named-i2c-ports"; + + battery { + i2c-port = <&i2c1>; + remote-port = <1>; + enum-names = "I2C_PORT_BATTERY", + "I2C_PORT_VIRTUAL_BATTERY"; + }; + i2c_charger: charger { + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_CHARGER", + "I2C_PORT_EEPROM"; + }; + i2c_sensor: sensor { + i2c-port = <&i2c3>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_usb_c0: usb-c0 { + i2c-port = <&i2c2>; + enum-names = "I2C_PORT_USB_C0", + "I2C_PORT_USB_MUX0"; + }; + i2c_usb_c1: usb-c1 { + i2c-port = <&i2c4>; + enum-names = "I2C_PORT_USB_C1", + "I2C_PORT_USB_MUX1"; + }; + }; + +}; + +&pinctrl { + i2c3_clk_gpf2_sleep: i2c3_clk_gpf2_sleep { + pinmuxs = <&pinctrlf 2 IT8XXX2_ALT_DEFAULT>; + }; + i2c3_data_gpf3_sleep: i2c3_data_gpf3_sleep { + pinmuxs = <&pinctrlf 3 IT8XXX2_ALT_DEFAULT>; + }; +}; + +&i2c0 { + /* EC_I2C_PWR_CBI */ + label = "I2C_PWR_CBI"; + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c0_clk_gpb3_default + &i2c0_data_gpb4_default>; + pinctrl-names = "default"; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; + + bc12_port1: rt9490-bc12@53 { + compatible = "richtek,rt9490-bc12"; + status = "okay"; + reg = <0x53>; + irq = <&int_usb_c1_bc12_charger>; + }; +}; + +&i2c1 { + /* EC_I2C_BATTERY */ + label = "I2C_BATTERY"; + status = "okay"; + clock-frequency = <50000>; + pinctrl-0 = <&i2c1_clk_gpc1_default + &i2c1_data_gpc2_default>; + pinctrl-names = "default"; +}; + +&i2c2 { + /* EC_I2C_USB_C0 */ + label = "I2C_USB_C0"; + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c2_clk_gpf6_default + &i2c2_data_gpf7_default>; + pinctrl-names = "default"; + + bc12_ppc_port0: rt1739@70 { + compatible = "richtek,rt1739"; + status = "okay"; + reg = <0x70>; + }; + + it5205_mux_0: it5205-mux-0@48 { + compatible = "ite,it5205"; + reg = <0x48>; + }; +}; + +&i2c3 { + /* EC_I2C_SENSOR */ + label = "I2C_SENSOR"; + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + scl-gpios = <&gpiof 2 0>; + sda-gpios = <&gpiof 3 0>; + pinctrl-0 = <&i2c3_clk_gpf2_default + &i2c3_data_gpf3_default>; + pinctrl-1 = <&i2c3_clk_gpf2_sleep + &i2c3_data_gpf3_sleep>; + pinctrl-names = "default", "sleep"; + prescale-scl-low = <1>; +}; + +&i2c4 { + /* EC_I2C_USB_C1 */ + label = "I2C_USB_C1"; + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c4_clk_gpe0_default + &i2c4_data_gpe7_default>; + pinctrl-names = "default"; + prescale-scl-low = <1>; + + ppc_port1: syv682x@40 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x40>; + frs_en_gpio = <&gpio_ec_x_gpio1>; + }; +}; diff --git a/zephyr/projects/corsola/i2c_magikarp.dts b/zephyr/projects/corsola/i2c_magikarp.dts new file mode 100644 index 0000000000..2039398974 --- /dev/null +++ b/zephyr/projects/corsola/i2c_magikarp.dts @@ -0,0 +1,21 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c_krabby_tentacruel.dtsi" + +&i2c0 { + charger: rt9490@53 { + compatible = "richtek,rt9490"; + status = "okay"; + reg = <0x53>; + }; +}; + +&i2c4 { + ps8743_mux_1: ps8743-mux-1@10 { + compatible = "parade,ps8743"; + reg = <0x10>; + }; +}; diff --git a/zephyr/projects/corsola/i2c_tentacruel.dts b/zephyr/projects/corsola/i2c_tentacruel.dts new file mode 100644 index 0000000000..e40dc02318 --- /dev/null +++ b/zephyr/projects/corsola/i2c_tentacruel.dts @@ -0,0 +1,37 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c_krabby_tentacruel.dtsi" + +&i2c0 { + charger: rt9490@53 { + compatible = "richtek,rt9490"; + status = "okay"; + reg = <0x53>; + thermistor = <&thermistor_rt9490>; + }; +}; + +&i2c2 { + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + ppc_port0: syv682x@40 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x40>; + frs_en_gpio = <&usb_c0_frs_en>; + }; +}; + +&i2c4 { + ps8743_mux_1: ps8743-mux-1@10 { + compatible = "parade,ps8743"; + reg = <0x10>; + }; +}; diff --git a/zephyr/projects/corsola/include/baseboard_usbc_config.h b/zephyr/projects/corsola/include/baseboard_usbc_config.h index eb09a86865..a29fd93f54 100644 --- a/zephyr/projects/corsola/include/baseboard_usbc_config.h +++ b/zephyr/projects/corsola/include/baseboard_usbc_config.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,20 +8,19 @@ #ifndef __CROS_EC_BASEBOARD_USBC_CONFIG_H #define __CROS_EC_BASEBOARD_USBC_CONFIG_H +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1718S +#define GPIO_EN_USB_C1_SINK RT1718S_GPIO1 +#define GPIO_EN_USB_C1_SOURCE RT1718S_GPIO2 +#define GPIO_EN_USB_C1_FRS RT1718S_GPIO3 +#endif + void ppc_interrupt(enum gpio_signal signal); /* USB-A ports */ -enum usba_port { - USBA_PORT_A0 = 0, - USBA_PORT_COUNT -}; +enum usba_port { USBA_PORT_A0 = 0, USBA_PORT_COUNT }; /* USB-C ports */ -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); /** diff --git a/zephyr/projects/corsola/include/gpio_map.h b/zephyr/projects/corsola/include/gpio_map.h deleted file mode 100644 index 562671b685..0000000000 --- a/zephyr/projects/corsola/include/gpio_map.h +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - - -#include <zephyr/devicetree.h> -#include <gpio_signal.h> - -#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED - -#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1718S -#define GPIO_EN_USB_C1_SINK RT1718S_GPIO1 -#define GPIO_EN_USB_C1_SOURCE RT1718S_GPIO2 -#define GPIO_EN_USB_C1_FRS RT1718S_GPIO3 -#endif - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/corsola/include/i2c_map.h b/zephyr/projects/corsola/include/i2c_map.h deleted file mode 100644 index e2f6c53ed2..0000000000 --- a/zephyr/projects/corsola/include/i2c_map.h +++ /dev/null @@ -1,13 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_I2C_MAP_H -#define __ZEPHYR_I2C_MAP_H - -#include <zephyr/devicetree.h> - -#include "i2c/i2c.h" - -#endif /* __ZEPHYR_I2C_MAP_H */ diff --git a/zephyr/projects/corsola/include/variant_db_detection.h b/zephyr/projects/corsola/include/variant_db_detection.h index 40853016f8..285ff327f2 100644 --- a/zephyr/projects/corsola/include/variant_db_detection.h +++ b/zephyr/projects/corsola/include/variant_db_detection.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,8 @@ #define __CROS_EC_CORSOLA_DB_DETECTION_H enum corsola_db_type { - CORSOLA_DB_NONE = -1, + CORSOLA_DB_UNINIT = -1, + CORSOLA_DB_NONE, CORSOLA_DB_TYPEC, CORSOLA_DB_HDMI, CORSOLA_DB_COUNT, diff --git a/zephyr/projects/corsola/interrupts_kingler.dts b/zephyr/projects/corsola/interrupts_kingler.dts index b33251624d..38b8c2e24d 100644 --- a/zephyr/projects/corsola/interrupts_kingler.dts +++ b/zephyr/projects/corsola/interrupts_kingler.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/interrupts_krabby.dts b/zephyr/projects/corsola/interrupts_krabby.dts index 900ce1611e..7f2df00937 100644 --- a/zephyr/projects/corsola/interrupts_krabby.dts +++ b/zephyr/projects/corsola/interrupts_krabby.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/interrupts_magikarp.dts b/zephyr/projects/corsola/interrupts_magikarp.dts new file mode 100644 index 0000000000..06458e1063 --- /dev/null +++ b/zephyr/projects/corsola/interrupts_magikarp.dts @@ -0,0 +1,105 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + int-wp = &int_wp; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_power_button: power_button { + irq-pin = <&power_button_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_volume_up: volume_up { + irq-pin = <&volume_up_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_volume_down: volume_down { + irq-pin = <&volume_down_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_warm_rst: warm_rst { + irq-pin = <&ap_ec_warm_rst_req>; + flags = <GPIO_INT_EDGE_RISING>; + handler = "chipset_reset_request_interrupt"; + }; + int_ap_in_sleep: ap_in_sleep { + irq-pin = <&ap_in_sleep_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; + int_ap_in_rst: ap_in_rst { + irq-pin = <&ap_sysrst_odl_r>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; + int_ap_wdtrst: ap_wdtrst { + irq-pin = <&ap_ec_wdtrst_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "chipset_watchdog_interrupt"; + }; + int_tablet_mode: tablet_mode { + irq-pin = <&tablet_mode_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "gmr_tablet_switch_isr"; + }; + int_base_imu: base_imu { + irq-pin = <&base_imu_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "motion_interrupt"; + }; + int_lid_imu: lid_imu { + irq-pin = <&lid_accel_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "lis2dw12_interrupt"; + }; + int_ac_present: ac_present { + irq-pin = <&ac_present>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "extpower_interrupt"; + }; + int_usba: usba { + irq-pin = <&gpio_ap_xhci_init_done>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "usb_a0_interrupt"; + }; + int_wp: wp { + irq-pin = <&ec_flash_wp_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "switch_interrupt"; + }; + int_spi0_cs: spi0_cs { + irq-pin = <&spi0_cs>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "spi_event"; + }; + int_x_ec_gpio2: x_ec_gpio2 { + irq-pin = <&gpio_x_ec_gpio2>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "x_ec_interrupt"; + }; + int_usb_c0_ppc_bc12: usb_c0_ppc_bc12 { + irq-pin = <&usb_c0_ppc_bc12_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "c0_bc12_interrupt"; + }; + int_usb_c1_bc12_charger: usb_c1_bc12_charger { + irq-pin = <&usb_c1_bc12_charger_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "rt9490_bc12_dt_interrupt"; + }; + }; +}; diff --git a/zephyr/projects/corsola/interrupts_tentacruel.dts b/zephyr/projects/corsola/interrupts_tentacruel.dts new file mode 100644 index 0000000000..c35461304e --- /dev/null +++ b/zephyr/projects/corsola/interrupts_tentacruel.dts @@ -0,0 +1,110 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + int-wp = &int_wp; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_power_button: power_button { + irq-pin = <&power_button_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_volume_up: volume_up { + irq-pin = <&volume_up_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_volume_down: volume_down { + irq-pin = <&volume_down_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_warm_rst: warm_rst { + irq-pin = <&ap_ec_warm_rst_req>; + flags = <GPIO_INT_EDGE_RISING>; + handler = "chipset_reset_request_interrupt"; + }; + int_ap_in_sleep: ap_in_sleep { + irq-pin = <&ap_in_sleep_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; + int_ap_in_rst: ap_in_rst { + irq-pin = <&ap_sysrst_odl_r>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_signal_interrupt"; + }; + int_ap_wdtrst: ap_wdtrst { + irq-pin = <&ap_ec_wdtrst_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "chipset_watchdog_interrupt"; + }; + int_tablet_mode: tablet_mode { + irq-pin = <&tablet_mode_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "gmr_tablet_switch_isr"; + }; + int_base_imu: base_imu { + irq-pin = <&base_imu_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "motion_interrupt"; + }; + int_lid_imu: lid_imu { + irq-pin = <&lid_accel_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "lis2dw12_interrupt"; + }; + int_ac_present: ac_present { + irq-pin = <&ac_present>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "extpower_interrupt"; + }; + int_usba: usba { + irq-pin = <&gpio_ap_xhci_init_done>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "usb_a0_interrupt"; + }; + int_wp: wp { + irq-pin = <&ec_flash_wp_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "switch_interrupt"; + }; + int_spi0_cs: spi0_cs { + irq-pin = <&spi0_cs>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "spi_event"; + }; + int_x_ec_gpio2: x_ec_gpio2 { + irq-pin = <&gpio_x_ec_gpio2>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "x_ec_interrupt"; + }; + int_usb_c0_ppc: usb_c0_ppc { + irq-pin = <&usb_c0_ppc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c0_bc12: usb_c0_bc12 { + irq-pin = <&usb_c0_bc12_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "bc12_interrupt"; + }; + int_usb_c1_bc12_charger: usb_c1_bc12_charger { + irq-pin = <&usb_c1_bc12_charger_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "rt9490_bc12_dt_interrupt"; + }; + }; +}; diff --git a/zephyr/projects/corsola/keyboard_steelix.dts b/zephyr/projects/corsola/keyboard_steelix.dts new file mode 100644 index 0000000000..9a0dca3e05 --- /dev/null +++ b/zephyr/projects/corsola/keyboard_steelix.dts @@ -0,0 +1,29 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + cros-keyscan { + compatible = "cros-keyscan"; + + debounce-down = <15000>; + debounce-up = <15000>; + + actual-key-mask = < + 0x1c /* C0 */ + 0xff /* C1 */ + 0xff /* C2 */ + 0xff /* C3 */ + 0xff /* C4 */ + 0xf5 /* C5 */ + 0xff /* C6 */ + 0xa4 /* C7 */ + 0xff /* C8 */ + 0xfe /* C9 */ + 0x55 /* C10 */ + 0xfa /* C11 */ + 0xca /* C12 */ + >; + }; +}; diff --git a/zephyr/projects/corsola/led_it81202_base.dtsi b/zephyr/projects/corsola/led_it81202_base.dtsi new file mode 100644 index 0000000000..dce7bb4f95 --- /dev/null +++ b/zephyr/projects/corsola/led_it81202_base.dtsi @@ -0,0 +1,184 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <dt-bindings/battery.h> + +/ { + led_colors: led-colors { + compatible = "cros-ec,led-policy"; + + bat-power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + + color-0 { + led-color = <&color_battery_amber>; + }; + }; + + bat-power-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = <&color_battery_white>; + }; + }; + + bat-power-state-discharge { + charge-state = "PWR_STATE_DISCHARGE"; + + color-0 { + led-color = <&color_battery_off>; + }; + }; + + bat-power-state-discharge-s0-bat-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>; + + color-0 { + led-color = <&color_battery_amber>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <3000>; + }; + }; + + bat-power-state-error { + charge-state = "PWR_STATE_ERROR"; + + color-0 { + led-color = <&color_battery_amber>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <1000>; + }; + }; + + pwr-power-state-off { + color-0 { + led-color = <&color_power_off>; + }; + }; + + pwr-power-state-on { + chipset-state = "POWER_S0"; + + color-0 { + led-color = <&color_power_white>; + }; + }; + + pwr-power-state-s3 { + chipset-state = "POWER_S3"; + + color-0 { + led-color = <&color_power_white>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_power_off>; + period-ms = <3000>; + }; + }; + }; + + pwmleds { + compatible = "cros-ec,pwm-pin-config"; + + /* NOTE: &pwm number needs same with channel number */ + led_power_white: ec_led1_odl { + #led-pin-cells = <1>; + pwms = <&pwm0 + PWM_CHANNEL_0 + PWM_HZ(324) + PWM_POLARITY_INVERTED>; + }; + led_battery_amber: ec_led2_odl { + #led-pin-cells = <1>; + pwms = <&pwm1 + PWM_CHANNEL_1 + PWM_HZ(324) + PWM_POLARITY_INVERTED>; + }; + led_battery_white: ec_led3_odl { + #led-pin-cells = <1>; + pwms = <&pwm2 + PWM_CHANNEL_2 + PWM_HZ(324) + PWM_POLARITY_INVERTED>; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + color_power_off: color-power-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_POWER_LED"; + led-pins = <&led_power_white 0>; + }; + + color_power_white: color-power-white { + led-color = "LED_WHITE"; + br-color = "EC_LED_COLOR_WHITE"; + led-id = "EC_LED_ID_POWER_LED"; + led-pins = <&led_power_white 100>; + }; + + color_battery_off: color-battery-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&led_battery_amber 0>, + <&led_battery_white 0>; + }; + + color_battery_amber: color-battery-amber { + led-color = "LED_AMBER"; + br-color = "EC_LED_COLOR_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&led_battery_amber 100>, + <&led_battery_white 0>; + }; + + color_battery_white: color-battery-white { + led-color = "LED_WHITE"; + br-color = "EC_LED_COLOR_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&led_battery_amber 0>, + <&led_battery_white 100>; + }; + }; +}; + +/* LED1 */ +&pwm0 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm0_gpa0_default>; + pinctrl-names = "default"; +}; + +/* LED2 */ +&pwm1 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm1_gpa1_default>; + pinctrl-names = "default"; +}; + +/* LED3 */ +&pwm2 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm2_gpa2_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/corsola/led_kingler.dts b/zephyr/projects/corsola/led_kingler.dts index 56a54862e6..92f6c4d4fe 100644 --- a/zephyr/projects/corsola/led_kingler.dts +++ b/zephyr/projects/corsola/led_kingler.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,7 +17,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0>; - frequency = <100>; color-map-red = <100 0 0>; color-map-green = < 0 100 0>; diff --git a/zephyr/projects/corsola/led_krabby.dts b/zephyr/projects/corsola/led_krabby.dts index 9ee879b404..b16bff3cac 100644 --- a/zephyr/projects/corsola/led_krabby.dts +++ b/zephyr/projects/corsola/led_krabby.dts @@ -1,44 +1,5 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ - -/ { - pwmleds { - compatible = "pwm-leds"; - /* NOTE: &pwm number needs same with channel number */ - led_power_white: ec_led1_odl { - pwms = <&pwm0 PWM_CHANNEL_0 PWM_HZ(324) PWM_POLARITY_INVERTED>; - }; - led_battery_amber: ec_led2_odl { - pwms = <&pwm1 PWM_CHANNEL_1 PWM_HZ(324) PWM_POLARITY_INVERTED>; - }; - led_battery_white: ec_led3_odl { - pwms = <&pwm2 PWM_CHANNEL_2 PWM_HZ(324) PWM_POLARITY_INVERTED>; - }; - }; -}; - -/* LED1 */ -&pwm0 { - status = "okay"; - prescaler-cx = <PWM_PRESCALER_C4>; - pinctrl-0 = <&pwm0_gpa0_default>; - pinctrl-names = "default"; -}; - -/* LED2 */ -&pwm1 { - status = "okay"; - prescaler-cx = <PWM_PRESCALER_C4>; - pinctrl-0 = <&pwm1_gpa1_default>; - pinctrl-names = "default"; -}; - -/* LED3 */ -&pwm2 { - status = "okay"; - prescaler-cx = <PWM_PRESCALER_C4>; - pinctrl-0 = <&pwm2_gpa2_default>; - pinctrl-names = "default"; -}; +#include "led_it81202_base.dtsi" diff --git a/zephyr/projects/corsola/led_magikarp.dts b/zephyr/projects/corsola/led_magikarp.dts new file mode 100644 index 0000000000..0e2b0aca52 --- /dev/null +++ b/zephyr/projects/corsola/led_magikarp.dts @@ -0,0 +1,136 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "led_it81202_base.dtsi" + +/ { + led_colors: led-colors { + compatible = "cros-ec,led-policy"; + + /* Magikarp LED bat charge */ + bat-power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + /* Battery percent range (>= Empty, <= 94%) */ + batt-lvl = <BATTERY_LEVEL_EMPTY + (BATTERY_LEVEL_NEAR_FULL - 3)>; + color-0 { + led-color = <&color_battery_amber>; + }; + }; + + bat-power-state-charge-near-full { + charge-state = "PWR_STATE_CHARGE"; + /* Battery percent range (>= 95%, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_NEAR_FULL - 2) + BATTERY_LEVEL_FULL>; + color-0 { + led-color = <&color_battery_white>; + }; + }; + + /* Magikarp LED bat discharge */ + bat-power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= 11%, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>; + + color-0 { + led-color = <&color_battery_white>; + }; + }; + + + bat-power-state-discharge-s0-bat-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= Empty, <= 10%) */ + batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>; + + color-0 { + led-color = <&color_battery_amber>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <3000>; + }; + }; + + bat-power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + color-0 { + led-color = <&color_battery_white>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <3000>; + }; + }; + + bat-power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + color-0 { + led-color = <&color_battery_off>; + }; + }; + + /* Magikarp LED bat error */ + bat-power-state-error { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S0"; + + color-0 { + led-color = <&color_battery_amber>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <1000>; + }; + }; + + bat-power-state-error-s3 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S3"; + + color-0 { + led-color = <&color_battery_white>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <3000>; + }; + }; + + bat-power-state-error-s5 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_battery_off>; + }; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + /* Overwrite Power LED white to off */ + color_power_white: color-power-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_POWER_LED"; + led-pins = <&led_power_white 0>; + }; + }; +}; diff --git a/zephyr/projects/corsola/led_steelix.dts b/zephyr/projects/corsola/led_steelix.dts index 31d17958d4..6a25929327 100644 --- a/zephyr/projects/corsola/led_steelix.dts +++ b/zephyr/projects/corsola/led_steelix.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/led_tentacruel.dts b/zephyr/projects/corsola/led_tentacruel.dts new file mode 100644 index 0000000000..5569a956f6 --- /dev/null +++ b/zephyr/projects/corsola/led_tentacruel.dts @@ -0,0 +1,118 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "led_it81202_base.dtsi" + +/ { + led_colors: led-colors { + compatible = "cros-ec,led-policy"; + + /* Tentacruel LED bat charge */ + bat-power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + /* Battery percent range (>= Empty, <= 94%) */ + batt-lvl = <BATTERY_LEVEL_EMPTY + (BATTERY_LEVEL_NEAR_FULL - 3)>; + color-0 { + led-color = <&color_battery_amber>; + }; + }; + + bat-power-state-charge-near-full { + charge-state = "PWR_STATE_CHARGE"; + /* Battery percent range (>= 95%, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_NEAR_FULL - 2) + BATTERY_LEVEL_FULL>; + color-0 { + led-color = <&color_battery_white>; + }; + }; + + /* Tentacruel LED bat discharge */ + bat-power-state-discharge { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= 11%, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>; + + color-0 { + led-color = <&color_battery_white>; + }; + }; + + bat-power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + color-0 { + led-color = <&color_battery_white>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <3000>; + }; + }; + + bat-power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + color-0 { + led-color = <&color_battery_off>; + }; + }; + + /* Tentacruel LED bat error */ + bat-power-state-error { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S0"; + + color-0 { + led-color = <&color_battery_amber>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <1000>; + }; + }; + + bat-power-state-error-s3 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S3"; + + color-0 { + led-color = <&color_battery_white>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_off>; + period-ms = <3000>; + }; + }; + + bat-power-state-error-s5 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_battery_off>; + }; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + /* Overwrite Power LED white to off */ + color_power_white: color-power-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_POWER_LED"; + led-pins = <&led_power_white 0>; + }; + }; +}; diff --git a/zephyr/projects/corsola/motionsense_kingler.dts b/zephyr/projects/corsola/motionsense_kingler.dts index 4667635da0..a7f674e01f 100644 --- a/zephyr/projects/corsola/motionsense_kingler.dts +++ b/zephyr/projects/corsola/motionsense_kingler.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -29,10 +29,8 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; base_mutex: base-mutex { - label = "BASE_MUTEX"; }; }; @@ -73,7 +71,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -81,7 +79,6 @@ compatible = "cros-ec,bma4xx"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -93,11 +90,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(12500 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(12500 | ROUND_UP_FLAG)>; }; }; @@ -107,7 +102,6 @@ compatible = "cros-ec,bmi3xx-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; @@ -118,12 +112,10 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(12500 | ROUND_UP_FLAG)>; ec-rate = <(100 * USEC_PER_MSEC)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(12500 | ROUND_UP_FLAG)>; ec-rate = <0>; }; @@ -134,7 +126,6 @@ compatible = "cros-ec,bmi3xx-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; diff --git a/zephyr/projects/corsola/motionsense_krabby.dts b/zephyr/projects/corsola/motionsense_krabby.dts index d369db460a..1c7d5b2df4 100644 --- a/zephyr/projects/corsola/motionsense_krabby.dts +++ b/zephyr/projects/corsola/motionsense_krabby.dts @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,11 +27,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; base_mutex: icm42607-mutex { - label = "ICM42607_MUTEX"; }; }; @@ -74,7 +72,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -82,7 +80,6 @@ compatible = "cros-ec,lis2dw12"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -94,11 +91,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -108,7 +103,6 @@ compatible = "cros-ec,icm42607-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; @@ -119,11 +113,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -133,7 +125,6 @@ compatible = "cros-ec,icm42607-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; diff --git a/zephyr/projects/corsola/motionsense_magikarp.dts b/zephyr/projects/corsola/motionsense_magikarp.dts new file mode 100644 index 0000000000..92e73bd2c6 --- /dev/null +++ b/zephyr/projects/corsola/motionsense_magikarp.dts @@ -0,0 +1,199 @@ +/* Copyright 2020 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * motion sense's <>_INT_EVENT is handled + * by alias. Using the alias, each driver creates + * its own <>_INT_EVENT. + */ + icm42607-int = &base_accel; + lis2dw12-int = &lid_accel; + bmi3xx-int = &base_accel; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + lid_mutex: lid-mutex { + }; + + base_mutex: icm42607-mutex { + }; + + base_mutex_bmi323: bmi323-mutex { + }; + }; + + /* Rotation matrix used by drivers. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <1 0 0 + 0 1 0 + 0 0 (-1)>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <1 0 0 + 0 1 0 + 0 0 1>; + }; + + base_rot_ref_bmi: base-rotation-ref-bmi { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + icm42607_data: icm42607-drv-data { + compatible = "cros-ec,drvdata-icm42607"; + status = "okay"; + }; + + lis2dw12_data: lis2dw12-drv-data { + compatible = "cros-ec,drvdata-lis2dw12"; + status = "okay"; + }; + + bmi323_data: bmi323-drv-data { + compatible = "cros-ec,drvdata-bmi3xx"; + status = "okay"; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,lis2dw12"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&lis2dw12_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,icm42607-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&icm42607_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_gyro: base-gyro { + compatible = "cros-ec,icm42607-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&icm42607_data>; + }; + }; + + motionsense-sensor-alt { + alt_base_accel: alt-base-accel { + compatible = "cros-ec,bmi3xx-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex_bmi323>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref_bmi>; + drv-data = <&bmi323_data>; + alternate-for = <&base_accel>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + alt_base_gyro: alt-base-gyro { + compatible = "cros-ec,bmi3xx-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex_bmi323>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref_bmi>; + drv-data = <&bmi323_data>; + alternate-for = <&base_gyro>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_base_imu &int_lid_imu>; + }; +}; diff --git a/zephyr/projects/corsola/motionsense_steelix.dts b/zephyr/projects/corsola/motionsense_steelix.dts index 70aa3679fb..c8cbc95e48 100644 --- a/zephyr/projects/corsola/motionsense_steelix.dts +++ b/zephyr/projects/corsola/motionsense_steelix.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/motionsense_tentacruel.dts b/zephyr/projects/corsola/motionsense_tentacruel.dts new file mode 100644 index 0000000000..68b2c023df --- /dev/null +++ b/zephyr/projects/corsola/motionsense_tentacruel.dts @@ -0,0 +1,199 @@ +/* Copyright 2020 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * motion sense's <>_INT_EVENT is handled + * by alias. Using the alias, each driver creates + * its own <>_INT_EVENT. + */ + icm42607-int = &base_accel; + lis2dw12-int = &lid_accel; + bmi3xx-int = &base_accel; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + lid_mutex: lid-mutex { + }; + + base_mutex: icm42607-mutex { + }; + + base_mutex_bmi323: bmi323-mutex { + }; + }; + + /* Rotation matrix used by drivers. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <1 0 0 + 0 1 0 + 0 0 1>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <1 0 0 + 0 1 0 + 0 0 1>; + }; + + base_rot_ref_bmi: base-rotation-ref-bmi { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + icm42607_data: icm42607-drv-data { + compatible = "cros-ec,drvdata-icm42607"; + status = "okay"; + }; + + lis2dw12_data: lis2dw12-drv-data { + compatible = "cros-ec,drvdata-lis2dw12"; + status = "okay"; + }; + + bmi323_data: bmi323-drv-data { + compatible = "cros-ec,drvdata-bmi3xx"; + status = "okay"; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,lis2dw12"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&lis2dw12_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,icm42607-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&icm42607_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_gyro: base-gyro { + compatible = "cros-ec,icm42607-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&icm42607_data>; + }; + }; + + motionsense-sensor-alt { + alt_base_accel: alt-base-accel { + compatible = "cros-ec,bmi3xx-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex_bmi323>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref_bmi>; + drv-data = <&bmi323_data>; + alternate-for = <&base_accel>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + alt_base_gyro: alt-base-gyro { + compatible = "cros-ec,bmi3xx-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex_bmi323>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref_bmi>; + drv-data = <&bmi323_data>; + alternate-for = <&base_gyro>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_base_imu &int_lid_imu>; + }; +}; diff --git a/zephyr/projects/corsola/npcx_keyboard.dts b/zephyr/projects/corsola/npcx_keyboard.dts index d3fd354b8f..f9e46de1f2 100644 --- a/zephyr/projects/corsola/npcx_keyboard.dts +++ b/zephyr/projects/corsola/npcx_keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/power_signal.dts b/zephyr/projects/corsola/power_signal.dts index 2603a53bb4..181d7cf96e 100644 --- a/zephyr/projects/corsola/power_signal.dts +++ b/zephyr/projects/corsola/power_signal.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/prj.conf b/zephyr/projects/corsola/prj.conf index b26c01461e..110b91bbbb 100644 --- a/zephyr/projects/corsola/prj.conf +++ b/zephyr/projects/corsola/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # @@ -6,6 +6,33 @@ # http://google3/hardware/standards/usb/ CONFIG_PLATFORM_EC_USB_PID=0x505C +# CROS EC +CONFIG_CROS_EC=y +CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_SWITCH=y +CONFIG_SHIMMED_TASKS=y + +# AP SoC configuration +CONFIG_AP=y +CONFIG_AP_ARM_MTK_MT8186=y + +# Variant config +CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + +# Shell features +CONFIG_KERNEL_SHELL=y +CONFIG_SHELL_HELP=y +CONFIG_SHELL_HISTORY=y +CONFIG_SHELL_TAB=y +CONFIG_SHELL_TAB_AUTOCOMPLETION=y + +# CBI +CONFIG_EEPROM=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_SHELL=n +CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y +CONFIG_PLATFORM_EC_CBI_EEPROM=y + # I2C CONFIG_I2C=y @@ -24,14 +51,51 @@ CONFIG_PLATFORM_EC_VBOOT_EFS2=y # USB CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=n CONFIG_PLATFORM_EC_USB_PD_USB4=n -# TODO(b/226411332): fix single task USB_CHG for Corsola -CONFIG_PLATFORM_EC_USB_CHARGER_SINGLE_TASK=n +CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB_CUSTOM_HOOK=y + +# USB-C +CONFIG_PLATFORM_EC_USBC=y +CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y +CONFIG_PLATFORM_EC_USB_PD_DPS=y +CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO=y +CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO_CUSTOM=y +CONFIG_PLATFORM_EC_USB_PD_FRS=y # Power Seq CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK=y +CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y +CONFIG_PLATFORM_EC_POWERSEQ=y CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y +CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y # Optional features CONFIG_FLASH_SHELL=n + +# EEPROM +CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y + +# Host Commands +CONFIG_PLATFORM_EC_HOSTCMD=y + +# Battery +CONFIG_PLATFORM_EC_BATTERY=y +CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y +CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y +CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y +CONFIG_PLATFORM_EC_BATTERY_SMART=y +CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV=9000 +CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y +CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY=y + +# Charger +CONFIG_PLATFORM_EC_BC12_CLIENT_MODE_ONLY_PI3USB9201=y +CONFIG_PLATFORM_EC_CHARGER=y +CONFIG_PLATFORM_EC_CHARGE_MANAGER=y + +# Button +CONFIG_PLATFORM_EC_CMD_BUTTON=y +CONFIG_PLATFORM_EC_POWER_BUTTON=y +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y diff --git a/zephyr/projects/corsola/prj_it81202_base.conf b/zephyr/projects/corsola/prj_it81202_base.conf new file mode 100644 index 0000000000..38e0acd7a8 --- /dev/null +++ b/zephyr/projects/corsola/prj_it81202_base.conf @@ -0,0 +1,92 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Bring up options +CONFIG_SHELL_HISTORY_BUFFER=256 +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y +CONFIG_PLATFORM_EC_BRINGUP=y + +# Power Sequencing +CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y + +# Lid Switch +CONFIG_PLATFORM_EC_LID_SWITCH=y + +# Charger +CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=y +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y +CONFIG_PLATFORM_EC_CHARGER_RT9490=y +CONFIG_PLATFORM_EC_CHARGER_MAINTAIN_VBAT=y +CONFIG_PLATFORM_EC_CHARGER_OTG=y +CONFIG_PLATFORM_EC_CHARGER_PSYS=y +CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y +# BOARD_RS2 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +# BOARD_RS1 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 +CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_DUMP=y + +# Host Commands +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y +CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y + +# LED +CONFIG_PLATFORM_EC_LED_DT=y + +# PWM +CONFIG_PWM=y +CONFIG_PWM_SHELL=n + +# Sensors +CONFIG_PLATFORM_EC_MOTIONSENSE=y +CONFIG_PLATFORM_EC_ACCEL_FIFO=y +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y +CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y +CONFIG_PLATFORM_EC_TABLET_MODE=y +CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y +CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 + +# Sensor Drivers +CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y +CONFIG_PLATFORM_EC_ACCELGYRO_ICM42607=y +CONFIG_PLATFORM_EC_ACCELGYRO_ICM_COMM_I2C=y + +# Tasks +CONFIG_TASK_CHARGER_STACK_SIZE=1024 +CONFIG_TASK_CHIPSET_STACK_SIZE=1440 +CONFIG_TASK_MOTIONSENSE_STACK_SIZE=1024 +CONFIG_TASK_PD_STACK_SIZE=1280 + +# USB-A +CONFIG_PLATFORM_EC_USBA=y + +# USB-C +CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n +CONFIG_PLATFORM_EC_SMBUS_PEC=y +CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y +CONFIG_PLATFORM_EC_USBC_PPC_RT1739=y +CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y +CONFIG_PLATFORM_EC_USBC_PPC_SYV682X=y +CONFIG_PLATFORM_EC_USB_MUX_IT5205=y +CONFIG_PLATFORM_EC_USB_MUX_TUSB546=y +CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y +CONFIG_PLATFORM_EC_USB_PD_FRS_PPC=y +CONFIG_PLATFORM_EC_USB_PD_LOGGING=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT=y +CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=n + +# TODO(b/180980668): bring these features up +CONFIG_LTO=n +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n diff --git a/zephyr/projects/corsola/prj_kingler.conf b/zephyr/projects/corsola/prj_kingler.conf index 525d94a886..d7de991e93 100644 --- a/zephyr/projects/corsola/prj_kingler.conf +++ b/zephyr/projects/corsola/prj_kingler.conf @@ -1,139 +1,12 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# Cros EC -CONFIG_CROS_EC=y -CONFIG_PLATFORM_EC=y -CONFIG_PLATFORM_EC_BRINGUP=y -CONFIG_SHIMMED_TASKS=y -CONFIG_PLATFORM_EC_SWITCH=y - # Variant config CONFIG_BOARD_KINGLER=y -CONFIG_VARIANT_CORSOLA_DB_DETECTION=y - -# Shell features -CONFIG_KERNEL_SHELL=y -CONFIG_SHELL_HELP=y -CONFIG_SHELL_TAB=y -CONFIG_SHELL_TAB_AUTOCOMPLETION=y -CONFIG_SHELL_HISTORY=y - -# Bring up options -CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y - -# ADC -CONFIG_ADC=y -CONFIG_PLATFORM_EC_ADC=y - -# Battery -CONFIG_PLATFORM_EC_BATTERY=y -CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y -CONFIG_PLATFORM_EC_BATTERY_SMART=y -CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y -CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y -CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y -CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY=y - -# CBI -CONFIG_EEPROM=y -CONFIG_EEPROM_AT24=y -CONFIG_EEPROM_SHELL=n -CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y -CONFIG_PLATFORM_EC_CBI_EEPROM=y - -# Charger -CONFIG_PLATFORM_EC_CHARGER=y -CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y -CONFIG_PLATFORM_EC_CHARGER_ISL9238C=y -CONFIG_PLATFORM_EC_CHARGER_PSYS=y -CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 -CONFIG_PLATFORM_EC_CHARGE_MANAGER=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y -CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y - -# Host command -CONFIG_PLATFORM_EC_HOSTCMD=y - -# PWM -CONFIG_PWM=y -CONFIG_PWM_SHELL=n # LED -CONFIG_PLATFORM_EC_LED_COMMON=y -CONFIG_PLATFORM_EC_LED_ONOFF_STATES=y CONFIG_PLATFORM_EC_LED_PWM=y -# Math -CONFIG_PLATFORM_EC_MATH_UTIL=y - -# Power sequencing -CONFIG_AP=y -CONFIG_AP_ARM_MTK_MT8186=y -CONFIG_PLATFORM_EC_POWERSEQ_MT8186=y -CONFIG_PLATFORM_EC_POWERSEQ=y -CONFIG_PLATFORM_EC_POWERSEQ_S4=n -CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n - -# Button -CONFIG_PLATFORM_EC_POWER_BUTTON=y -CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y -CONFIG_PLATFORM_EC_BUTTONS_RUNTIME_CONFIG=y - -# Sensors -CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y -CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y -CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y -CONFIG_PLATFORM_EC_ACCEL_FIFO=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y -CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y -CONFIG_PLATFORM_EC_LID_ANGLE=y -CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y -CONFIG_PLATFORM_EC_LID_SWITCH=y -CONFIG_PLATFORM_EC_MOTIONSENSE=y -CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y -CONFIG_PLATFORM_EC_TABLET_MODE=y -CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y - -# USBA -CONFIG_PLATFORM_EC_USBA=y - -# USBC -CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y -CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n -CONFIG_PLATFORM_EC_USBC=y -CONFIG_PLATFORM_EC_USBC_PPC=y -CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y -CONFIG_PLATFORM_EC_USBC_PPC_RT1718S=y -CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y -CONFIG_PLATFORM_EC_USB_MUX_PS8743=y -CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y -CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO=y -CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO_CUSTOM=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y -CONFIG_PLATFORM_EC_USB_PD_FRS=y -CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_LOGGING=y -CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL=y -CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL=2 -CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1718S=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_SBU=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_BY_BOARD=y - -# External power -CONFIG_PLATFORM_EC_BACKLIGHT_LID=n -CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y - # Keyboard -CONFIG_CROS_KB_RAW_NPCX=y -CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE=y - -CONFIG_SYSCON=y - -CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2=y diff --git a/zephyr/projects/corsola/prj_krabby.conf b/zephyr/projects/corsola/prj_krabby.conf index 741f07b436..c4cde05c16 100644 --- a/zephyr/projects/corsola/prj_krabby.conf +++ b/zephyr/projects/corsola/prj_krabby.conf @@ -1,140 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -CONFIG_CROS_EC=y -CONFIG_PLATFORM_EC=y -CONFIG_SHIMMED_TASKS=y - +# Variant config CONFIG_BOARD_KRABBY=y -# AP SoC configuration -CONFIG_AP=y -CONFIG_AP_ARM_MTK_MT8186=y - -# Bring up options -CONFIG_KERNEL_SHELL=y -CONFIG_SHELL_HISTORY_BUFFER=256 -CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y -CONFIG_PLATFORM_EC_BRINGUP=y - -# VARIANT config -CONFIG_VARIANT_CORSOLA_DB_DETECTION=y - -# CBI -CONFIG_EEPROM=y -CONFIG_EEPROM_AT24=y -CONFIG_EEPROM_SHELL=n -CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y -CONFIG_PLATFORM_EC_CBI_EEPROM=y - -# Power Sequencing -CONFIG_PLATFORM_EC_POWERSEQ=y -CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n -CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y -CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y - -# Lid Switch -CONFIG_PLATFORM_EC_LID_SWITCH=y - -# Battery -CONFIG_PLATFORM_EC_BATTERY=y -CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y -CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y -CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y -CONFIG_PLATFORM_EC_BATTERY_SMART=y -CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV=9000 -CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED=y -CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY=y - -# Charger -CONFIG_PLATFORM_EC_CHARGER=y -CONFIG_PLATFORM_EC_CHARGE_MANAGER=y -CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=y -CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y -CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y -CONFIG_PLATFORM_EC_CHARGER_RT9490=y -CONFIG_PLATFORM_EC_CHARGER_MAINTAIN_VBAT=y -CONFIG_PLATFORM_EC_CHARGER_OTG=y -CONFIG_PLATFORM_EC_CHARGER_PSYS=y -CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y -# BOARD_RS2 -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 -# BOARD_RS1 -CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 -CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_DUMP=y - -# Host Commands -CONFIG_PLATFORM_EC_HOSTCMD=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y -CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y -CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y - -# LED -CONFIG_PLATFORM_EC_LED_COMMON=y -CONFIG_PLATFORM_EC_LED_ONOFF_STATES=y -CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW=10 - # Keyboard -CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y -CONFIG_PLATFORM_EC_CMD_BUTTON=y - -# Sensors -CONFIG_PLATFORM_EC_MOTIONSENSE=y -CONFIG_PLATFORM_EC_ACCEL_FIFO=y -CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y -CONFIG_PLATFORM_EC_LID_ANGLE=y -CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y -CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y -CONFIG_PLATFORM_EC_SWITCH=y -CONFIG_PLATFORM_EC_TABLET_MODE=y -CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y - -# Sensor Drivers -CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y -CONFIG_PLATFORM_EC_ACCELGYRO_ICM42607=y -CONFIG_PLATFORM_EC_ACCELGYRO_ICM_COMM_I2C=y - -# Tasks -CONFIG_TASK_CHARGER_STACK_SIZE=1024 -CONFIG_TASK_CHIPSET_STACK_SIZE=1440 -CONFIG_TASK_MOTIONSENSE_STACK_SIZE=1024 -CONFIG_TASK_PD_STACK_SIZE=1280 - -# USB-A -CONFIG_PLATFORM_EC_USBA=y - -# USB-C -CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n -CONFIG_PLATFORM_EC_SMBUS_PEC=y -CONFIG_PLATFORM_EC_USBC=y -CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y -CONFIG_PLATFORM_EC_USBC_PPC_RT1739=y -CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y -CONFIG_PLATFORM_EC_USBC_PPC_SYV682X=y -CONFIG_PLATFORM_EC_USB_MUX_IT5205=y -CONFIG_PLATFORM_EC_USB_MUX_TUSB546=y -CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y -CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO=y -CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO_CUSTOM=y -CONFIG_PLATFORM_EC_USB_PD_FRS=y -CONFIG_PLATFORM_EC_USB_PD_FRS_PPC=y -CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT=2 -CONFIG_PLATFORM_EC_USB_PD_LOGGING=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_ADC_EACH_PORT=y -CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB_CUSTOM_HOOK=y -CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=n -CONFIG_PLATFORM_EC_USB_PD_USB32_DRD=n -CONFIG_PLATFORM_EC_USB_PD_USB4=n -CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n - -# TODO(b/180980668): bring these features up -CONFIG_LTO=n -CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2=y diff --git a/zephyr/projects/corsola/prj_magikarp.conf b/zephyr/projects/corsola/prj_magikarp.conf new file mode 100644 index 0000000000..72d7ea59f7 --- /dev/null +++ b/zephyr/projects/corsola/prj_magikarp.conf @@ -0,0 +1,22 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Variant config +CONFIG_BOARD_MAGIKARP=y + +# USB-C +CONFIG_PLATFORM_EC_USB_MUX_TUSB546=n +CONFIG_PLATFORM_EC_USB_MUX_PS8743=y + +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y + +# Sensor +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y + +# Temperature sensors +CONFIG_PLATFORM_EC_TEMP_SENSOR=y +CONFIG_PLATFORM_EC_THERMISTOR=y diff --git a/zephyr/projects/corsola/prj_npcx993_base.conf b/zephyr/projects/corsola/prj_npcx993_base.conf new file mode 100644 index 0000000000..f3b220898e --- /dev/null +++ b/zephyr/projects/corsola/prj_npcx993_base.conf @@ -0,0 +1,95 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + + +# Bring up options +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y + +# Debug options and features; can be disabled to save memory or once bringup +# is complete. +CONFIG_SHELL_MINIMAL=n +CONFIG_LOG=y +CONFIG_LOG_MODE_MINIMAL=y + +# ADC +CONFIG_ADC=y + +# Charger +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_ISL9238C=y +CONFIG_PLATFORM_EC_CHARGER_PSYS=y +CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 +CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y + +# PWM +CONFIG_PWM=y +CONFIG_PWM_SHELL=n + +# LED +CONFIG_PLATFORM_EC_LED_COMMON=y +CONFIG_PLATFORM_EC_LED_ONOFF_STATES=y + +# Math +CONFIG_PLATFORM_EC_MATH_UTIL=y + +# Power sequencing +CONFIG_PLATFORM_EC_POWERSEQ_MT8186=y +CONFIG_PLATFORM_EC_POWERSEQ_S4=n + +# Button +CONFIG_PLATFORM_EC_BUTTONS_RUNTIME_CONFIG=y + +# Sensors +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y +CONFIG_PLATFORM_EC_ACCEL_FIFO=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y +CONFIG_PLATFORM_EC_LID_SWITCH=y +CONFIG_PLATFORM_EC_MOTIONSENSE=y +CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y +CONFIG_PLATFORM_EC_TABLET_MODE=y +CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y + +# USBA +CONFIG_PLATFORM_EC_USBA=y + +# USBC +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y +CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n +CONFIG_PLATFORM_EC_PD_POWER_SUPPLY_TURN_OFF_DELAY=15000 +CONFIG_PLATFORM_EC_PD_POWER_SUPPLY_TURN_ON_DELAY=15000 +CONFIG_PLATFORM_EC_USBC_PPC=y +CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y +CONFIG_PLATFORM_EC_USBC_PPC_RT1718S=y +CONFIG_PLATFORM_EC_USB_MUX_PS8743=y +CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y +CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_LOGGING=y +CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL=y +CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL=2 +CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447_AUX_PU_PD=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1718S=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_SBU=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_BY_BOARD=y + +# External power +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n + +# Keyboard +CONFIG_CROS_KB_RAW_NPCX=y +CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE=y + +CONFIG_SYSCON=y + +CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n diff --git a/zephyr/projects/corsola/prj_steelix.conf b/zephyr/projects/corsola/prj_steelix.conf index 48971c9ed4..265a1a4cc4 100644 --- a/zephyr/projects/corsola/prj_steelix.conf +++ b/zephyr/projects/corsola/prj_steelix.conf @@ -1,13 +1,21 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # Variant config -CONFIG_BOARD_KINGLER=n CONFIG_BOARD_STEELIX=y # steelix only use D2, drop the workaround config for H1 CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=n -# LED -CONFIG_PLATFORM_EC_LED_PWM=n +# Motion sensor +CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y + +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_STRICT_DEBOUNCE=y + +# USBC +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=3250 +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=65000 diff --git a/zephyr/projects/corsola/prj_tentacruel.conf b/zephyr/projects/corsola/prj_tentacruel.conf new file mode 100644 index 0000000000..71cc9d9694 --- /dev/null +++ b/zephyr/projects/corsola/prj_tentacruel.conf @@ -0,0 +1,26 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Variant config +CONFIG_BOARD_TENTACRUEL=y + +# USB-C +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y +CONFIG_PLATFORM_EC_USB_MUX_TUSB546=n +CONFIG_PLATFORM_EC_USB_MUX_PS8743=y + +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y + +# Sensor +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y + +# Temperature sensors +CONFIG_PLATFORM_EC_TEMP_SENSOR=y +CONFIG_PLATFORM_EC_THERMISTOR=y + +# Battery +CONFIG_PLATFORM_EC_CHARGER_PROFILE_OVERRIDE=y diff --git a/zephyr/projects/corsola/src/board_chipset.c b/zephyr/projects/corsola/src/board_chipset.c index ca8f3b0507..54e96bc631 100644 --- a/zephyr/projects/corsola/src/board_chipset.c +++ b/zephyr/projects/corsola/src/board_chipset.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/src/hibernate.c b/zephyr/projects/corsola/src/hibernate.c index afd22fd3e7..56c085e077 100644 --- a/zephyr/projects/corsola/src/hibernate.c +++ b/zephyr/projects/corsola/src/hibernate.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/src/kingler/board_steelix.c b/zephyr/projects/corsola/src/kingler/board_steelix.c new file mode 100644 index 0000000000..c8ba0e7e74 --- /dev/null +++ b/zephyr/projects/corsola/src/kingler/board_steelix.c @@ -0,0 +1,51 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Board re-init for Rusty board + * Rusty shares the firmware with Steelix. + * Steelix is convertible but Rusty is clamshell + * so some functions should be disabled for clamshell. + */ +#include <zephyr/logging/log.h> +#include <zephyr/drivers/gpio.h> + +#include "cros_cbi.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "motion_sense.h" +#include "tablet_mode.h" + +LOG_MODULE_REGISTER(board_init, LOG_LEVEL_ERR); + +static bool board_is_clamshell; + +static void board_setup_init(void) +{ + int ret; + uint32_t val; + + ret = cros_cbi_get_fw_config(FORM_FACTOR, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FORM_FACTOR); + return; + } + if (val == CLAMSHELL) { + board_is_clamshell = true; + motion_sensor_count = 0; + gmr_tablet_switch_disable(); + } +} +DECLARE_HOOK(HOOK_INIT, board_setup_init, HOOK_PRIO_PRE_DEFAULT); + +static void disable_base_imu_irq(void) +{ + if (board_is_clamshell) { + gpio_disable_dt_interrupt( + GPIO_INT_FROM_NODELABEL(int_base_imu)); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(base_imu_int_l), + GPIO_INPUT | GPIO_PULL_UP); + } +} +DECLARE_HOOK(HOOK_INIT, disable_base_imu_irq, HOOK_PRIO_POST_DEFAULT); diff --git a/zephyr/projects/corsola/src/kingler/button.c b/zephyr/projects/corsola/src/kingler/button.c index d10d771950..920069bef6 100644 --- a/zephyr/projects/corsola/src/kingler/button.c +++ b/zephyr/projects/corsola/src/kingler/button.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/src/kingler/i2c.c b/zephyr/projects/corsola/src/kingler/i2c.c index 6236d42714..f2bbff3749 100644 --- a/zephyr/projects/corsola/src/kingler/i2c.c +++ b/zephyr/projects/corsola/src/kingler/i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,6 +12,10 @@ int board_allow_i2c_passthru(const struct i2c_cmd_desc_t *cmd_desc) { return (i2c_get_device_for_port(cmd_desc->port) == - i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY)); + i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY) || + i2c_get_device_for_port(cmd_desc->port) == + i2c_get_device_for_port(I2C_PORT_EEPROM) || + i2c_get_device_for_port(cmd_desc->port) == + i2c_get_device_for_port(I2C_PORT_USB_C0)); } #endif diff --git a/zephyr/projects/corsola/src/kingler/led.c b/zephyr/projects/corsola/src/kingler/led.c index 045ddb5be1..4e2c5b12fb 100644 --- a/zephyr/projects/corsola/src/kingler/led.c +++ b/zephyr/projects/corsola/src/kingler/led.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -13,20 +13,25 @@ __override const int led_charge_lvl_1 = 5; __override const int led_charge_lvl_2 = 97; __override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_RED, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_RED, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_GREEN, 2 * LED_ONE_SEC} }, -}; + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_RED, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_GREEN, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S0_BAT_LOW] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 3 * LED_ONE_SEC } }, + [STATE_DISCHARGE_S3] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_RED, 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_RED, 2 * LED_ONE_SEC }, + { EC_LED_COLOR_GREEN, + 2 * LED_ONE_SEC } }, + }; __override void led_set_color_battery(enum ec_led_colors color) { diff --git a/zephyr/projects/corsola/src/kingler/led_steelix.c b/zephyr/projects/corsola/src/kingler/led_steelix.c index 2d2e1431a1..87b76128e8 100644 --- a/zephyr/projects/corsola/src/kingler/led_steelix.c +++ b/zephyr/projects/corsola/src/kingler/led_steelix.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -10,6 +10,7 @@ #include "board_led.h" #include "common.h" +#include "cros_cbi.h" #include "led_common.h" #include "led_onoff_states.h" #include "util.h" @@ -28,29 +29,36 @@ static const struct board_led_pwm_dt_channel board_led_power_white = __override const int led_charge_lvl_1 = 5; __override const int led_charge_lvl_2 = 97; __override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_RED, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_RED, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_GREEN, 2 * LED_ONE_SEC} }, -}; + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_RED, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_GREEN, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S0_BAT_LOW] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S3] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_RED, 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_RED, 2 * LED_ONE_SEC }, + { EC_LED_COLOR_GREEN, + 2 * LED_ONE_SEC } }, + }; __override const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 3 * LED_ONE_SEC}, - {LED_OFF, 0.5 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 3 * LED_ONE_SEC}, - {LED_OFF, 0.5 * LED_ONE_SEC} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, -}; + led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { + [PWR_LED_STATE_ON] = { { EC_LED_COLOR_WHITE, LED_INDEFINITE } }, + [PWR_LED_STATE_SUSPEND_AC] = { { EC_LED_COLOR_WHITE, + 3 * LED_ONE_SEC }, + { LED_OFF, 0.5 * LED_ONE_SEC } }, + [PWR_LED_STATE_SUSPEND_NO_AC] = { { EC_LED_COLOR_WHITE, + 3 * LED_ONE_SEC }, + { LED_OFF, + 0.5 * LED_ONE_SEC } }, + [PWR_LED_STATE_OFF] = { { LED_OFF, LED_INDEFINITE } }, + }; const enum ec_led_id supported_led_ids[] = { EC_LED_ID_BATTERY_LED, @@ -72,8 +80,8 @@ static void board_led_pwm_set_duty(const struct board_led_pwm_dt_channel *ch, pulse_ns = DIV_ROUND_NEAREST(BOARD_LED_PWM_PERIOD_NS * percent, 100); - LOG_DBG("Board LED PWM %s set percent (%d), pulse %d", - ch->dev->name, percent, pulse_ns); + LOG_DBG("Board LED PWM %s set percent (%d), pulse %d", ch->dev->name, + percent, pulse_ns); rv = pwm_set(ch->dev, ch->channel, BOARD_LED_PWM_PERIOD_NS, pulse_ns, ch->flags); @@ -82,6 +90,20 @@ static void board_led_pwm_set_duty(const struct board_led_pwm_dt_channel *ch, } } +static bool device_is_clamshell(void) +{ + int ret; + uint32_t val; + + ret = cros_cbi_get_fw_config(FORM_FACTOR, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FORM_FACTOR); + return false; + } + + return val == CLAMSHELL; +} + __override void led_set_color_battery(enum ec_led_colors color) { switch (color) { @@ -106,13 +128,17 @@ __override void led_set_color_battery(enum ec_led_colors color) __override void led_set_color_power(enum ec_led_colors color) { - switch (color) { - case EC_LED_COLOR_WHITE: - board_led_pwm_set_duty(&board_led_power_white, 100); - break; - default: + if (device_is_clamshell()) { board_led_pwm_set_duty(&board_led_power_white, 0); - break; + } else { + switch (color) { + case EC_LED_COLOR_WHITE: + board_led_pwm_set_duty(&board_led_power_white, 100); + break; + default: + board_led_pwm_set_duty(&board_led_power_white, 0); + break; + } } } @@ -123,7 +149,11 @@ void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) brightness_range[EC_LED_COLOR_GREEN] = 1; brightness_range[EC_LED_COLOR_AMBER] = 1; } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = 1; + if (device_is_clamshell()) { + brightness_range[EC_LED_COLOR_WHITE] = 0; + } else { + brightness_range[EC_LED_COLOR_WHITE] = 1; + } } } diff --git a/zephyr/projects/corsola/src/kingler/usb_pd_policy.c b/zephyr/projects/corsola/src/kingler/usb_pd_policy.c index 51a05598b9..3de2857ad1 100644 --- a/zephyr/projects/corsola/src/kingler/usb_pd_policy.c +++ b/zephyr/projects/corsola/src/kingler/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,8 +14,8 @@ #include "baseboard_usbc_config.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) void pd_power_supply_reset(int port) { @@ -39,7 +39,6 @@ void pd_power_supply_reset(int port) pd_send_host_event(PD_EVENT_POWER_CHANGE); } - int pd_set_power_supply_ready(int port) { int rv; diff --git a/zephyr/projects/corsola/src/kingler/usbc_config.c b/zephyr/projects/corsola/src/kingler/usbc_config.c index 42aa0a31d6..8c0ca86454 100644 --- a/zephyr/projects/corsola/src/kingler/usbc_config.c +++ b/zephyr/projects/corsola/src/kingler/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -31,57 +31,16 @@ #endif #include "gpio.h" - -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) - -struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = AN7447_TCPC0_I2C_ADDR_FLAGS, - }, - .drv = &anx7447_tcpm_drv, - /* Alert is active-low, open-drain */ - .flags = TCPC_FLAGS_ALERT_OD | TCPC_FLAGS_VBUS_MONITOR | - TCPC_FLAGS_CONTROL_FRS, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = RT1718S_I2C_ADDR2_FLAGS, - }, - .drv = &rt1718s_tcpm_drv, - /* Alert is active-low, open-drain */ - .flags = TCPC_FLAGS_ALERT_OD | TCPC_FLAGS_VBUS_MONITOR | - TCPC_FLAGS_CONTROL_FRS, - } -}; - -struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = NX20P3483_ADDR2_FLAGS, - .drv = &nx20p348x_drv - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = NX20P3483_ADDR2_FLAGS, - .drv = &nx20p348x_drv - } -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) /* USB Mux */ /* USB Mux C1 : board_init of PS8743 */ -static int ps8743_tune_mux(const struct usb_mux *me) +int ps8743_mux_1_board_init(const struct usb_mux *me) { - ps8743_tune_usb_eq(me, - PS8743_USB_EQ_TX_3_6_DB, - PS8743_USB_EQ_RX_16_0_DB); + ps8743_tune_usb_eq(me, PS8743_USB_EQ_TX_3_6_DB, + PS8743_USB_EQ_RX_16_0_DB); return EC_SUCCESS; } @@ -90,61 +49,13 @@ void board_usb_mux_init(void) { if (corsola_get_db_type() == CORSOLA_DB_TYPEC) { /* Disable DCI function. This is not needed for ARM. */ - ps8743_field_update(&usb_muxes[1], - PS8743_REG_DCI_CONFIG_2, - PS8743_AUTO_DCI_MODE_MASK, - PS8743_AUTO_DCI_MODE_FORCE_USB); + ps8743_field_update(usb_muxes[1].mux, PS8743_REG_DCI_CONFIG_2, + PS8743_AUTO_DCI_MODE_MASK, + PS8743_AUTO_DCI_MODE_FORCE_USB); } } DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); -const struct usb_mux usbc0_virtual_mux = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -const struct usb_mux usbc1_virtual_mux = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &anx7447_usb_mux_driver, - .hpd_update = &anx7447_tcpc_update_hpd_status, - .next_mux = &usbc0_virtual_mux, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, - .driver = &ps8743_usb_mux_driver, - .next_mux = &usbc1_virtual_mux, - .board_init = &ps8743_tune_mux, - }, -}; - -struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USBC_PORT_C0] = { - .drv = &pi3usb9201_drv, - }, - [USBC_PORT_C1] = { - .drv = &rt1718s_bc12_drv, - } -}; - -const struct pi3usb9201_config_t - pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C1] = { /* unused */ } -}; - void board_tcpc_init(void) { /* Only reset TCPC if not sysjump */ @@ -169,7 +80,7 @@ void board_tcpc_init(void) */ for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port) { usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); } } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_POST_I2C); @@ -188,20 +99,28 @@ __override int board_rt1718s_init(int port) /* gpio1 low, gpio2 output high when receiving frs signal */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, - RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, 0)); + RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, + 0)); RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, - RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); + RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, + 0xFF)); /* Trigger GPIO 1/2 change when FRS signal received */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL3, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | + RETURN_ERROR(rt1718s_update_bits8( + port, RT1718S_FRS_CTRL3, + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1)); /* Set FRS signal detect time to 46.875us */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL1, - RT1718S_FRS_CTRL1_FRSWAPRX_MASK, - 0xFF)); + RT1718S_FRS_CTRL1_FRSWAPRX_MASK, + 0xFF)); + + /* Disable BC1.2 SRC mode */ + RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_RT2_BC12_SRC_FUNC, + RT1718S_RT2_BC12_SRC_FUNC_BC12_SRC_EN, + 0)); return EC_SUCCESS; } @@ -215,13 +134,12 @@ __override int board_rt1718s_set_frs_enable(int port, int enable) * FRS path. */ rt1718s_gpio_set_flags(port, GPIO_EN_USB_C1_FRS, - enable ? GPIO_OUT_HIGH : GPIO_OUT_LOW); + enable ? GPIO_OUT_HIGH : GPIO_OUT_LOW); return EC_SUCCESS; } void board_reset_pd_mcu(void) { - CPRINTS("Resetting TCPCs..."); /* reset C0 ANX3447 */ /* Assert reset */ @@ -315,15 +233,15 @@ uint16_t tcpc_get_alert_status(void) uint16_t status = 0; if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_int_odl))) { + GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_int_odl))) { if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst))) { + GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst))) { status |= PD_STATUS_TCPC_ALERT_0; } } if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_int_odl))) { + GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_int_odl))) { return status |= PD_STATUS_TCPC_ALERT_1; } return status; diff --git a/zephyr/projects/corsola/src/krabby/battery.c b/zephyr/projects/corsola/src/krabby/battery.c deleted file mode 100644 index 0c0efc8200..0000000000 --- a/zephyr/projects/corsola/src/krabby/battery.c +++ /dev/null @@ -1,46 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "battery.h" -#include "battery_fuel_gauge.h" -#include "battery_smart.h" -#include "charge_manager.h" -#include "chipset.h" -#include "hooks.h" -#include "system.h" -#include "usb_pd.h" - -const struct board_batt_params board_battery_info[] = { - [BATTERY_C235] = { - .fuel_gauge = { - .manuf_name = "AS3GWRc3KA", - .device_name = "C235-41", - .ship_mode = { - .reg_addr = 0x0, - .reg_data = { 0x10, 0x10 }, - }, - .fet = { - .reg_addr = 0x99, - .reg_mask = 0x0c, - .disconnect_val = 0x0c, - } - }, - .batt_info = { - .voltage_max = 8800, - .voltage_normal = 7700, - .voltage_min = 6000, - .precharge_current = 256, - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = 0, - .discharging_max_c = 60, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_C235; diff --git a/zephyr/projects/corsola/src/krabby/charger_workaround.c b/zephyr/projects/corsola/src/krabby/charger_workaround.c index 373917db56..dda91fccb5 100644 --- a/zephyr/projects/corsola/src/krabby/charger_workaround.c +++ b/zephyr/projects/corsola/src/krabby/charger_workaround.c @@ -1,22 +1,30 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <zephyr/sys/util.h> + #include "charger.h" #include "driver/charger/rt9490.h" #include "hooks.h" #include "i2c.h" #include "system.h" +/* + * This workaround and the board id checks only apply to krabby and early + * tentacruel devices. + * Newer project should have all of these fixed. + */ +BUILD_ASSERT(IS_ENABLED(CONFIG_BOARD_KRABBY) || + IS_ENABLED(CONFIG_BOARD_TENTACRUEL) || IS_ENABLED(CONFIG_TEST)); + static void enter_hidden_mode(void) { i2c_write8(chg_chips[CHARGER_SOLO].i2c_port, - chg_chips[CHARGER_SOLO].i2c_addr_flags, - 0xF1, 0x69); + chg_chips[CHARGER_SOLO].i2c_addr_flags, 0xF1, 0x69); i2c_write8(chg_chips[CHARGER_SOLO].i2c_port, - chg_chips[CHARGER_SOLO].i2c_addr_flags, - 0xF2, 0x96); + chg_chips[CHARGER_SOLO].i2c_addr_flags, 0xF2, 0x96); } /* b/194967754#comment5: work around for IBUS ADC unstable issue */ @@ -28,48 +36,33 @@ static void ibus_adc_workaround(void) i2c_update8(chg_chips[CHARGER_SOLO].i2c_port, chg_chips[CHARGER_SOLO].i2c_addr_flags, - RT9490_REG_ADC_CHANNEL0, - RT9490_VSYS_ADC_DIS, - MASK_SET); + RT9490_REG_ADC_CHANNEL0, RT9490_VSYS_ADC_DIS, MASK_SET); enter_hidden_mode(); /* undocumented registers... */ i2c_write8(chg_chips[CHARGER_SOLO].i2c_port, - chg_chips[CHARGER_SOLO].i2c_addr_flags, - 0x52, 0xC4); + chg_chips[CHARGER_SOLO].i2c_addr_flags, 0x52, 0xC4); i2c_update8(chg_chips[CHARGER_SOLO].i2c_port, chg_chips[CHARGER_SOLO].i2c_addr_flags, - RT9490_REG_ADC_CHANNEL0, - RT9490_VSYS_ADC_DIS, - MASK_CLR); + RT9490_REG_ADC_CHANNEL0, RT9490_VSYS_ADC_DIS, MASK_CLR); } /* b/214880220#comment44: lock i2c at 400khz */ static void i2c_speed_workaround(void) { - /* - * This workaround can be applied to all version of RT9490 in our cases - * no need to identify chip version. - */ + if (system_get_board_version() >= 3) { + return; + } + enter_hidden_mode(); /* Set to Auto mode, default run at 400kHz */ i2c_write8(chg_chips[CHARGER_SOLO].i2c_port, - chg_chips[CHARGER_SOLO].i2c_addr_flags, - 0x71, 0x22); + chg_chips[CHARGER_SOLO].i2c_addr_flags, 0x71, 0x22); /* Manually select for 400kHz, valid only when 0x71[7] == 1 */ i2c_write8(chg_chips[CHARGER_SOLO].i2c_port, - chg_chips[CHARGER_SOLO].i2c_addr_flags, - 0xF7, 0x14); -} - -static void pwm_freq_workaround(void) -{ - /* Reduce SW freq from 1.5MHz to 1MHz - * for 10% higher current rating b/215294785 - */ - rt9490_enable_pwm_1mhz(CHARGER_SOLO, true); + chg_chips[CHARGER_SOLO].i2c_addr_flags, 0xF7, 0x14); } static void eoc_deglitch_workaround(void) @@ -81,16 +74,27 @@ static void eoc_deglitch_workaround(void) /* set end-of-charge deglitch time to 2ms */ i2c_update8(chg_chips[CHARGER_SOLO].i2c_port, chg_chips[CHARGER_SOLO].i2c_addr_flags, - RT9490_REG_ADD_CTRL0, - RT9490_TD_EOC, - MASK_CLR); + RT9490_REG_ADD_CTRL0, RT9490_TD_EOC, MASK_CLR); +} + +static void disable_safety_timer(void) +{ + if (system_get_board_version() >= 2) { + return; + } + /* Disable charge timer */ + i2c_write8(chg_chips[CHARGER_SOLO].i2c_port, + chg_chips[CHARGER_SOLO].i2c_addr_flags, + RT9490_REG_SAFETY_TMR_CTRL, + RT9490_EN_TRICHG_TMR | RT9490_EN_PRECHG_TMR | + RT9490_EN_FASTCHG_TMR); } static void board_rt9490_workaround(void) { ibus_adc_workaround(); i2c_speed_workaround(); - pwm_freq_workaround(); eoc_deglitch_workaround(); + disable_safety_timer(); } DECLARE_HOOK(HOOK_INIT, board_rt9490_workaround, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/corsola/src/krabby/hooks.c b/zephyr/projects/corsola/src/krabby/hooks.c index 9fae7c8bb5..1eb4f600f2 100644 --- a/zephyr/projects/corsola/src/krabby/hooks.c +++ b/zephyr/projects/corsola/src/krabby/hooks.c @@ -1,10 +1,11 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/init.h> #include <zephyr/drivers/gpio.h> +#include <zephyr/drivers/pinctrl.h> #include <ap_power/ap_power.h> #include "charger.h" @@ -13,22 +14,21 @@ #include "gpio.h" #include "hooks.h" +#define I2C3_NODE DT_NODELABEL(i2c3) +PINCTRL_DT_DEFINE(I2C3_NODE); + static void board_i2c3_ctrl(bool enable) { - if (DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(DT_NODELABEL(i2c3), - scl_gpios, 0)) == DEVICE_DT_GET(DT_NODELABEL(gpiof))) { - /* - * TODO(b/226296649): - * Use pinctrl APIs to enable/disable an interface. - */ - struct gctrl_it8xxx2_regs *const gctrl_base = - (struct gctrl_it8xxx2_regs *) - DT_REG_ADDR(DT_NODELABEL(gctrl)); + if (DEVICE_DT_GET( + DT_GPIO_CTLR_BY_IDX(DT_NODELABEL(i2c3), scl_gpios, 0)) == + DEVICE_DT_GET(DT_NODELABEL(gpiof))) { + const struct pinctrl_dev_config *pcfg = + PINCTRL_DT_DEV_CONFIG_GET(I2C3_NODE); if (enable) { - gctrl_base->GCTRL_PMER3 |= IT8XXX2_GCTRL_SMB3PSEL; + pinctrl_apply_state(pcfg, PINCTRL_STATE_DEFAULT); } else { - gctrl_base->GCTRL_PMER3 &= ~IT8XXX2_GCTRL_SMB3PSEL; + pinctrl_apply_state(pcfg, PINCTRL_STATE_SLEEP); } } } diff --git a/zephyr/projects/corsola/src/krabby/i2c.c b/zephyr/projects/corsola/src/krabby/i2c.c index 3b5108e115..a83af77dbd 100644 --- a/zephyr/projects/corsola/src/krabby/i2c.c +++ b/zephyr/projects/corsola/src/krabby/i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,6 +12,8 @@ int board_allow_i2c_passthru(const struct i2c_cmd_desc_t *cmd_desc) { return (i2c_get_device_for_port(cmd_desc->port) == - i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY)); + i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY) || + i2c_get_device_for_port(cmd_desc->port) == + i2c_get_device_for_port(I2C_PORT_EEPROM)); } #endif diff --git a/zephyr/projects/corsola/src/krabby/led.c b/zephyr/projects/corsola/src/krabby/led.c deleted file mode 100644 index c001615402..0000000000 --- a/zephyr/projects/corsola/src/krabby/led.c +++ /dev/null @@ -1,147 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/drivers/pwm.h> -#include <zephyr/logging/log.h> - -#include "board_led.h" -#include "common.h" -#include "led_common.h" -#include "led_onoff_states.h" -#include "util.h" - -LOG_MODULE_REGISTER(board_led, LOG_LEVEL_ERR); - -/*If we need pwm output in ITE chip power saving mode, then we should set - * frequency <= 324Hz. - */ -#define BOARD_LED_PWM_PERIOD_NS BOARD_LED_HZ_TO_PERIOD_NS(324) - -static const struct board_led_pwm_dt_channel board_led_power_white = - BOARD_LED_PWM_DT_CHANNEL_INITIALIZER(DT_NODELABEL(led_power_white)); -static const struct board_led_pwm_dt_channel board_led_battery_amber = - BOARD_LED_PWM_DT_CHANNEL_INITIALIZER(DT_NODELABEL(led_battery_amber)); -static const struct board_led_pwm_dt_channel board_led_battery_white = - BOARD_LED_PWM_DT_CHANNEL_INITIALIZER(DT_NODELABEL(led_battery_white)); - -__override const int led_charge_lvl_1 = 5; -__override const int led_charge_lvl_2 = 95; - -__override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_WHITE, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC} }, -}; - -__override const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, -}; - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_BATTERY_LED, - EC_LED_ID_POWER_LED, -}; - -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -static void board_led_pwm_set_duty(const struct board_led_pwm_dt_channel *ch, - int percent) -{ - uint32_t pulse_ns; - int rv; - - if (!device_is_ready(ch->dev)) { - LOG_ERR("PWM device %s not ready", ch->dev->name); - return; - } - - pulse_ns = DIV_ROUND_NEAREST(BOARD_LED_PWM_PERIOD_NS * percent, 100); - - LOG_DBG("Board LED PWM %s set percent (%d), pulse %d", - ch->dev->name, percent, pulse_ns); - - rv = pwm_set(ch->dev, ch->channel, BOARD_LED_PWM_PERIOD_NS, pulse_ns, - ch->flags); - if (rv) { - LOG_ERR("pwm_set() failed %s (%d)", ch->dev->name, rv); - } -} - -__override void led_set_color_battery(enum ec_led_colors color) -{ - switch (color) { - case EC_LED_COLOR_AMBER: - board_led_pwm_set_duty(&board_led_battery_amber, 100); - board_led_pwm_set_duty(&board_led_battery_white, 0); - break; - case EC_LED_COLOR_WHITE: - board_led_pwm_set_duty(&board_led_battery_amber, 0); - board_led_pwm_set_duty(&board_led_battery_white, 100); - break; - default: - board_led_pwm_set_duty(&board_led_battery_amber, 0); - board_led_pwm_set_duty(&board_led_battery_white, 0); - break; - } -} - -__override void led_set_color_power(enum ec_led_colors color) -{ - switch (color) { - case EC_LED_COLOR_WHITE: - board_led_pwm_set_duty(&board_led_power_white, 100); - break; - default: - board_led_pwm_set_duty(&board_led_power_white, 0); - break; - } -} - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - brightness_range[EC_LED_COLOR_AMBER] = 1; - brightness_range[EC_LED_COLOR_WHITE] = 1; - } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = 1; - } -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - if (brightness[EC_LED_COLOR_AMBER] != 0) { - led_set_color_battery(EC_LED_COLOR_AMBER); - } else if (brightness[EC_LED_COLOR_WHITE] != 0) { - led_set_color_battery(EC_LED_COLOR_WHITE); - } else { - led_set_color_battery(LED_OFF); - } - } else if (led_id == EC_LED_ID_POWER_LED) { - if (brightness[EC_LED_COLOR_WHITE] != 0) { - led_set_color_power(EC_LED_COLOR_WHITE); - } else { - led_set_color_power(LED_OFF); - } - } - - return EC_SUCCESS; -} diff --git a/zephyr/projects/corsola/src/krabby/sensor_magikarp.c b/zephyr/projects/corsola/src/krabby/sensor_magikarp.c new file mode 100644 index 0000000000..269bc26fae --- /dev/null +++ b/zephyr/projects/corsola/src/krabby/sensor_magikarp.c @@ -0,0 +1,41 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "accelgyro.h" +#include "cros_cbi.h" +#include "driver/accelgyro_bmi323.h" +#include "driver/accelgyro_icm42607.h" +#include "hooks.h" +#include "motionsense_sensors.h" + +void motion_interrupt(enum gpio_signal signal) +{ + uint32_t val; + + cros_cbi_get_fw_config(FW_BASE_GYRO, &val); + if (val == FW_BASE_ICM42607) { + icm42607_interrupt(signal); + } else if (val == FW_BASE_BMI323) { + bmi3xx_interrupt(signal); + } +} + +static void motionsense_init(void) +{ + uint32_t val; + + cros_cbi_get_fw_config(FW_BASE_GYRO, &val); + if (val == FW_BASE_ICM42607) { + ccprints("BASE ACCEL is ICM42607"); + } else if (val == FW_BASE_BMI323) { + MOTIONSENSE_ENABLE_ALTERNATE(alt_base_accel); + MOTIONSENSE_ENABLE_ALTERNATE(alt_base_gyro); + ccprints("BASE ACCEL IS BMI323"); + } else { + ccprints("no motionsense"); + } +} +DECLARE_HOOK(HOOK_INIT, motionsense_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/corsola/src/krabby/sensor_tentacruel.c b/zephyr/projects/corsola/src/krabby/sensor_tentacruel.c new file mode 100644 index 0000000000..269bc26fae --- /dev/null +++ b/zephyr/projects/corsola/src/krabby/sensor_tentacruel.c @@ -0,0 +1,41 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "accelgyro.h" +#include "cros_cbi.h" +#include "driver/accelgyro_bmi323.h" +#include "driver/accelgyro_icm42607.h" +#include "hooks.h" +#include "motionsense_sensors.h" + +void motion_interrupt(enum gpio_signal signal) +{ + uint32_t val; + + cros_cbi_get_fw_config(FW_BASE_GYRO, &val); + if (val == FW_BASE_ICM42607) { + icm42607_interrupt(signal); + } else if (val == FW_BASE_BMI323) { + bmi3xx_interrupt(signal); + } +} + +static void motionsense_init(void) +{ + uint32_t val; + + cros_cbi_get_fw_config(FW_BASE_GYRO, &val); + if (val == FW_BASE_ICM42607) { + ccprints("BASE ACCEL is ICM42607"); + } else if (val == FW_BASE_BMI323) { + MOTIONSENSE_ENABLE_ALTERNATE(alt_base_accel); + MOTIONSENSE_ENABLE_ALTERNATE(alt_base_gyro); + ccprints("BASE ACCEL IS BMI323"); + } else { + ccprints("no motionsense"); + } +} +DECLARE_HOOK(HOOK_INIT, motionsense_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/corsola/src/krabby/temp_tentacruel.c b/zephyr/projects/corsola/src/krabby/temp_tentacruel.c new file mode 100644 index 0000000000..53a8312be6 --- /dev/null +++ b/zephyr/projects/corsola/src/krabby/temp_tentacruel.c @@ -0,0 +1,126 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charger.h" +#include "charge_state.h" +#include "common.h" +#include "config.h" +#include "console.h" +#include "driver/charger/rt9490.h" +#include "hooks.h" +#include "temp_sensor/temp_sensor.h" +#include "thermal.h" +#include "util.h" + +#define NUM_CURRENT_LEVELS ARRAY_SIZE(current_table) +#define TEMP_THRESHOLD 55 +#define TEMP_BUFF_SIZE 60 +#define KEEP_TIME 5 + +/* calculate current average temperature */ +static int average_tempature(void) +{ + static int temp_history_buffer[TEMP_BUFF_SIZE]; + static int buff_ptr; + static int temp_sum; + static int past_temp; + static int avg_temp; + int cur_temp, t; + + temp_sensor_read(TEMP_SENSOR_ID(DT_NODELABEL(temp_charger)), &t); + cur_temp = K_TO_C(t); + past_temp = temp_history_buffer[buff_ptr]; + temp_history_buffer[buff_ptr] = cur_temp; + temp_sum = temp_sum + temp_history_buffer[buff_ptr] - past_temp; + buff_ptr++; + if (buff_ptr >= TEMP_BUFF_SIZE) { + buff_ptr = 0; + } + /* Calculate per minute temperature. + * It's expected low temperature when the first 60 seconds. + */ + avg_temp = temp_sum / TEMP_BUFF_SIZE; + return avg_temp; +} + +static int current_level; + +/* Limit charging current table : 3600/3000/2400/1800 + * note this should be in descending order. + */ +static uint16_t current_table[] = { + 3600, + 3000, + 2400, + 1800, +}; + +/* Called by hook task every hook second (1 sec) */ +static void current_update(void) +{ + int temp; + static uint8_t uptime; + static uint8_t dntime; + + temp = average_tempature(); + if (charge_get_state() == PWR_STATE_DISCHARGE) { + current_level = 0; + uptime = 0; + dntime = 0; + return; + } + if (temp >= TEMP_THRESHOLD) { + dntime = 0; + if (uptime < KEEP_TIME) { + uptime++; + } else { + uptime = 0; + current_level++; + } + } else if (current_level != 0 && temp < TEMP_THRESHOLD) { + uptime = 0; + if (dntime < KEEP_TIME) { + dntime++; + } else { + dntime = 0; + current_level--; + } + } else { + uptime = 0; + dntime = 0; + } + if (current_level > NUM_CURRENT_LEVELS) { + current_level = NUM_CURRENT_LEVELS; + } +} +DECLARE_HOOK(HOOK_SECOND, current_update, HOOK_PRIO_DEFAULT); + +int charger_profile_override(struct charge_state_data *curr) +{ + /* + * Precharge must be executed when communication is failed on + * dead battery. + */ + if (!(curr->batt.flags & BATT_FLAG_RESPONSIVE)) + return 0; + if (current_level != 0) { + if (curr->requested_current > current_table[current_level - 1]) + curr->requested_current = + current_table[current_level - 1]; + } + return 0; +} + +enum ec_status charger_profile_override_get_param(uint32_t param, + uint32_t *value) +{ + return EC_RES_INVALID_PARAM; +} + +enum ec_status charger_profile_override_set_param(uint32_t param, + uint32_t value) +{ + return EC_RES_INVALID_PARAM; +} diff --git a/zephyr/projects/corsola/src/krabby/usb_pd_policy.c b/zephyr/projects/corsola/src/krabby/usb_pd_policy.c index 5f9ae83a19..8f2a2c3515 100644 --- a/zephyr/projects/corsola/src/krabby/usb_pd_policy.c +++ b/zephyr/projects/corsola/src/krabby/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/src/krabby/usbc_config.c b/zephyr/projects/corsola/src/krabby/usbc_config.c index 73ecd2f7bd..01686119cc 100644 --- a/zephyr/projects/corsola/src/krabby/usbc_config.c +++ b/zephyr/projects/corsola/src/krabby/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,25 +23,15 @@ #include "variant_db_detection.h" -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) void c0_bc12_interrupt(enum gpio_signal signal) { rt1739_interrupt(0); } -static void board_sub_bc12_init(void) -{ - if (corsola_get_db_type() == CORSOLA_DB_HDMI) { - /* If this is not a Type-C subboard, disable the task. */ - task_disable_task(TASK_ID_USB_CHG_P1); - } -} -/* Must be done after I2C and subboard */ -DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_POST_I2C); - static void board_usbc_init(void) { gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc_bc12)); @@ -58,12 +48,12 @@ void ppc_interrupt(enum gpio_signal signal) int ppc_get_alert_status(int port) { if (port == 0) { - return gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(usb_c0_ppc_bc12_int_odl)) == 0; + return gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + usb_c0_ppc_bc12_int_odl)) == 0; } if (port == 1 && corsola_get_db_type() == CORSOLA_DB_TYPEC) { - return gpio_pin_get_dt( - GPIO_DT_FROM_ALIAS(gpio_usb_c1_ppc_int_odl)) == 0; + return gpio_pin_get_dt(GPIO_DT_FROM_ALIAS( + gpio_usb_c1_ppc_int_odl)) == 0; } return 0; @@ -73,15 +63,19 @@ const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) { const static struct cc_para_t cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - }; + { + .rising_time = + IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = + IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + { + .rising_time = + IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = + IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + }; return &cc_parameter[port]; } @@ -169,10 +163,10 @@ int board_set_active_charge_port(int port) enum adc_channel board_get_vbus_adc(int port) { if (port == 0) { - return ADC_VBUS_C0; + return ADC_VBUS_C0; } if (port == 1) { - return ADC_VBUS_C1; + return ADC_VBUS_C1; } CPRINTSUSB("Unknown vbus adc port id: %d", port); return ADC_VBUS_C0; diff --git a/zephyr/projects/corsola/src/krabby/usbc_config_tentacruel.c b/zephyr/projects/corsola/src/krabby/usbc_config_tentacruel.c new file mode 100644 index 0000000000..691a28d50f --- /dev/null +++ b/zephyr/projects/corsola/src/krabby/usbc_config_tentacruel.c @@ -0,0 +1,223 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Tentacruel board-specific USB-C configuration */ + +#include "adc.h" +#include "baseboard_usbc_config.h" +#include "bc12/pi3usb9201_public.h" +#include "charge_manager.h" +#include "charger.h" +#include "console.h" +#include "cros_board_info.h" +#include "driver/charger/rt9490.h" +#include "driver/ppc/rt1739.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/usb_mux/ps8743.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "ppc/syv682x_public.h" +#include "usb_mux/it5205_public.h" +#include "usbc_ppc.h" +#include "usbc/ppc.h" + +#include "variant_db_detection.h" +#include <zephyr/logging/log.h> + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) + +LOG_MODULE_REGISTER(alt_dev_replacement); + +#define BOARD_VERSION_UNKNOWN 0xffffffff + +/* Check board version to decide which ppc/bc12 is used. */ +static bool board_has_syv_ppc(void) +{ + static uint32_t board_version = BOARD_VERSION_UNKNOWN; + + if (board_version == BOARD_VERSION_UNKNOWN) { + if (cbi_get_board_version(&board_version) != EC_SUCCESS) { + LOG_ERR("Failed to get board version."); + board_version = 0; + } + } + + return (board_version >= 3); +} + +static void check_alternate_devices(void) +{ + /* Configure the PPC driver */ + if (board_has_syv_ppc()) + /* Arg is the USB port number */ + PPC_ENABLE_ALTERNATE(0); +} +DECLARE_HOOK(HOOK_INIT, check_alternate_devices, HOOK_PRIO_DEFAULT); + +void bc12_interrupt(enum gpio_signal signal) +{ + usb_charger_task_set_event(0, USB_CHG_EVENT_BC12); +} + +static void board_usbc_init(void) +{ + if (board_has_syv_ppc()) { + /* Enable PPC interrupts. */ + gpio_enable_dt_interrupt( + GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); + + /* Enable BC1.2 interrupts. */ + gpio_enable_dt_interrupt( + GPIO_INT_FROM_NODELABEL(int_usb_c0_bc12)); + } else { + gpio_enable_dt_interrupt( + GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); + } +} +DECLARE_HOOK(HOOK_INIT, board_usbc_init, HOOK_PRIO_POST_DEFAULT); + +void ppc_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_SIGNAL(DT_NODELABEL(usb_c0_ppc_int_odl))) { + if (board_has_syv_ppc()) { + syv682x_interrupt(0); + } else { + rt1739_interrupt(0); + } + } + if (signal == GPIO_SIGNAL(DT_ALIAS(gpio_usb_c1_ppc_int_odl))) { + syv682x_interrupt(1); + } +} + +int ppc_get_alert_status(int port) +{ + if (port == 0) { + return gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(usb_c0_ppc_int_odl)) == 0; + } + if (port == 1 && corsola_get_db_type() == CORSOLA_DB_TYPEC) { + return gpio_pin_get_dt(GPIO_DT_FROM_ALIAS( + gpio_usb_c1_ppc_int_odl)) == 0; + } + + return 0; +} + +const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) +{ + const static struct cc_para_t + cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { + { + .rising_time = + IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = + IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + { + .rising_time = + IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = + IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + }; + + return &cc_parameter[port]; +} + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* TODO: check correct operation for Corsola */ +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ + return 0; +} + +void board_reset_pd_mcu(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ +} + +int board_set_active_charge_port(int port) +{ + int i; + int is_valid_port = (port >= 0 && port < board_get_usb_pd_port_count()); + + if (!is_valid_port && port != CHARGE_PORT_NONE) { + return EC_ERROR_INVAL; + } + + if (port == CHARGE_PORT_NONE) { + CPRINTS("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) { + CPRINTS("Disabling C%d as sink failed.", i); + } + } + + return EC_SUCCESS; + } + + /* Check if the port is sourcing VBUS. */ + if (ppc_is_sourcing_vbus(port)) { + CPRINTS("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTS("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) { + continue; + } + + if (ppc_vbus_sink_enable(i, 0)) { + CPRINTS("C%d: sink path disable failed.", i); + } + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTS("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +#ifdef CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT +enum adc_channel board_get_vbus_adc(int port) +{ + if (port == 0) { + return ADC_VBUS_C0; + } + if (port == 1) { + return ADC_VBUS_C1; + } + CPRINTSUSB("Unknown vbus adc port id: %d", port); + return ADC_VBUS_C0; +} +#endif /* CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT */ diff --git a/zephyr/projects/corsola/src/regulator.c b/zephyr/projects/corsola/src/regulator.c deleted file mode 100644 index 35670bda82..0000000000 --- a/zephyr/projects/corsola/src/regulator.c +++ /dev/null @@ -1,46 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "common.h" -#include "bc12/mt6360_public.h" - -/* SD Card */ -int board_regulator_get_info(uint32_t index, char *name, - uint16_t *num_voltages, uint16_t *voltages_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_info(id, name, num_voltages, - voltages_mv); -} - -int board_regulator_enable(uint32_t index, uint8_t enable) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_enable(id, enable); -} - -int board_regulator_is_enabled(uint32_t index, uint8_t *enabled) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_is_enabled(id, enabled); -} - -int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, - uint32_t max_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_set_voltage(id, min_mv, max_mv); -} - -int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_voltage(id, voltage_mv); -} diff --git a/zephyr/projects/corsola/src/usb_pd_policy.c b/zephyr/projects/corsola/src/usb_pd_policy.c index c9015de776..6aa1381c1d 100644 --- a/zephyr/projects/corsola/src/usb_pd_policy.c +++ b/zephyr/projects/corsola/src/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,8 +20,8 @@ #error Corsola reference must have at least one 3.0 A port #endif -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) static int active_aux_port = -1; @@ -78,7 +78,6 @@ void svdm_set_hpd_gpio(int port, int en) } } - __override int svdm_dp_config(int port, uint32_t *payload) { int opos = pd_alt_mode(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT); @@ -101,11 +100,11 @@ __override int svdm_dp_config(int port, uint32_t *payload) * (3) plug a monitor to the port-1 dongle. */ - payload[0] = VDO(USB_SID_DISPLAYPORT, 1, - CMD_DP_CONFIG | VDO_OPOS(opos)); - payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ - 1, /* DPv1.3 signaling */ - 2); /* UFP connected */ + payload[0] = + VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ return 2; }; @@ -122,9 +121,9 @@ __override void svdm_dp_post_config(int port) */ if (port == active_aux_port) { usb_mux_set(port, mux_mode, USB_SWITCH_CONNECT, - polarity_rm_dts(pd_get_polarity(port))); + polarity_rm_dts(pd_get_polarity(port))); usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); } dp_flags[port] |= DP_FLAGS_DP_ON; @@ -165,17 +164,14 @@ __override int svdm_dp_attention(int port, uint32_t *payload) if (lvl) { set_dp_aux_path_sel(port); - usb_mux_set(port, USB_PD_MUX_DOCK, - USB_SWITCH_CONNECT, + usb_mux_set(port, USB_PD_MUX_DOCK, USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); } else { - usb_mux_set(port, USB_PD_MUX_USB_ENABLED, - USB_SWITCH_CONNECT, + usb_mux_set(port, USB_PD_MUX_USB_ENABLED, USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); } - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) { + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && (irq || lvl)) { /* * Wake up the AP. IRQ or level high indicates a DP sink is now * present. @@ -185,14 +181,6 @@ __override int svdm_dp_attention(int port, uint32_t *payload) } } - /* Its initial DP status message prior to config */ - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) { - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - } - return 1; - } - #ifdef CONFIG_USB_PD_DP_HPD_GPIO if (irq && !lvl) { /* diff --git a/zephyr/projects/corsola/src/usbc_config.c b/zephyr/projects/corsola/src/usbc_config.c index 1f927dbc21..daf3e5a5cc 100644 --- a/zephyr/projects/corsola/src/usbc_config.c +++ b/zephyr/projects/corsola/src/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -32,12 +32,13 @@ #include "usb_mux.h" #include "usb_pd_tcpm.h" #include "usb_tc_sm.h" +#include "usbc/usb_muxes.h" #include "usbc_ppc.h" #include "variant_db_detection.h" -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) /* a flag for indicating the tasks are inited. */ static bool tasks_inited; @@ -59,6 +60,8 @@ __override uint8_t board_get_usb_pd_port_count(void) } else { return CONFIG_USB_PD_PORT_MAX_COUNT - 1; } + } else if (corsola_get_db_type() == CORSOLA_DB_NONE) { + return CONFIG_USB_PD_PORT_MAX_COUNT - 1; } return CONFIG_USB_PD_PORT_MAX_COUNT; @@ -67,9 +70,10 @@ __override uint8_t board_get_usb_pd_port_count(void) /* USB-A */ void usb_a0_interrupt(enum gpio_signal signal) { - enum usb_charge_mode mode = gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_ap_xhci_init_done)) ? - USB_CHARGE_MODE_ENABLED : USB_CHARGE_MODE_DISABLED; + enum usb_charge_mode mode = gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_ap_xhci_init_done)) ? + USB_CHARGE_MODE_ENABLED : + USB_CHARGE_MODE_DISABLED; const int xhci_stat = gpio_get_level(signal); @@ -96,16 +100,15 @@ void usb_a0_interrupt(enum gpio_signal signal) __override enum pd_dual_role_states pd_get_drp_state_in_s0(void) { - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_ap_xhci_init_done))) { + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_ap_xhci_init_done))) { return PD_DRP_TOGGLE_ON; } else { return PD_DRP_FORCE_SINK; } } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { charge_set_input_current_limit( MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); @@ -127,8 +130,8 @@ int debounced_hpd; static void ps185_hdmi_hpd_deferred(void) { - const int new_hpd = gpio_pin_get_dt( - GPIO_DT_FROM_ALIAS(gpio_ps185_ec_dp_hpd)); + const int new_hpd = + gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_ps185_ec_dp_hpd)); /* HPD status not changed, probably a glitch, just return. */ if (debounced_hpd == new_hpd) { @@ -155,8 +158,7 @@ static void ps185_hdmi_hpd_deferred(void) 0, /* power low? ... no */ (!!DP_FLAGS_DP_ON)); /* update C1 virtual mux */ - usb_mux_set(USBC_PORT_C1, - USB_PD_MUX_DP_ENABLED, + usb_mux_set(USBC_PORT_C1, USB_PD_MUX_DP_ENABLED, USB_SWITCH_DISCONNECT, 0 /* polarity, don't care */); @@ -171,8 +173,8 @@ DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); static void ps185_hdmi_hpd_disconnect_deferred(void) { - const int new_hpd = gpio_pin_get_dt( - GPIO_DT_FROM_ALIAS(gpio_ps185_ec_dp_hpd)); + const int new_hpd = + gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_ps185_ec_dp_hpd)); if (debounced_hpd == new_hpd && !new_hpd) { dp_status[USBC_PORT_C1] = @@ -188,7 +190,6 @@ static void ps185_hdmi_hpd_disconnect_deferred(void) USB_SWITCH_DISCONNECT, 0 /* polarity, don't care */); } - } DECLARE_DEFERRED(ps185_hdmi_hpd_disconnect_deferred); @@ -256,6 +257,11 @@ static void baseboard_x_ec_gpio2_init(void) static struct tcpm_drv virtual_tcpc_drv = { 0 }; static struct bc12_drv virtual_bc12_drv = { 0 }; + /* no sub board */ + if (corsola_get_db_type() == CORSOLA_DB_NONE) { + return; + } + /* type-c: USB_C1_PPC_INT_ODL / hdmi: PS185_EC_DP_HPD */ gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_x_ec_gpio2)); @@ -281,11 +287,7 @@ static void baseboard_x_ec_gpio2_init(void) bc12_ports[USBC_PORT_C1] = (const struct bc12_config){ .drv = &virtual_bc12_drv }; /* Use virtual mux to notify AP the mainlink direction. */ - usb_muxes[USBC_PORT_C1] = (struct usb_mux){ - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }; + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_1_hdmi_db); /* * If a HDMI DB is attached, C1 port tasks will be exiting in that diff --git a/zephyr/projects/corsola/src/variant_db_detection.c b/zephyr/projects/corsola/src/variant_db_detection.c index e5058bdcd5..6099d86bdd 100644 --- a/zephyr/projects/corsola/src/variant_db_detection.c +++ b/zephyr/projects/corsola/src/variant_db_detection.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,13 +7,14 @@ #include <zephyr/drivers/gpio.h> #include "console.h" +#include "cros_cbi.h" #include "gpio/gpio_int.h" #include "hooks.h" #include "variant_db_detection.h" -#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) static void corsola_db_config(enum corsola_db_type type) { @@ -21,7 +22,7 @@ static void corsola_db_config(enum corsola_db_type type) case CORSOLA_DB_HDMI: /* EC_X_GPIO1 */ gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_en_hdmi_pwr), - GPIO_OUTPUT_HIGH); + GPIO_OUTPUT_HIGH); /* X_EC_GPIO2 */ gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_ps185_ec_dp_hpd), GPIO_INPUT); @@ -29,7 +30,7 @@ static void corsola_db_config(enum corsola_db_type type) GPIO_INT_FROM_NODELABEL(int_x_ec_gpio2)); /* EC_X_GPIO3 */ gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_ps185_pwrdn_odl), - GPIO_OUTPUT_HIGH | GPIO_OPEN_DRAIN); + GPIO_OUTPUT_HIGH | GPIO_OPEN_DRAIN); return; case CORSOLA_DB_TYPEC: /* EC_X_GPIO1 */ @@ -42,9 +43,17 @@ static void corsola_db_config(enum corsola_db_type type) gpio_enable_dt_interrupt( GPIO_INT_FROM_NODELABEL(int_x_ec_gpio2)); /* EC_X_GPIO3 */ - gpio_pin_configure_dt( - GPIO_DT_FROM_ALIAS(gpio_usb_c1_dp_in_hpd), - GPIO_OUTPUT_LOW); + gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_dp_in_hpd), + GPIO_OUTPUT_LOW); + return; + case CORSOLA_DB_NONE: + /* Set floating pins as input with PU to prevent leakage */ + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_x_gpio1), + GPIO_INPUT | GPIO_PULL_UP); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_x_ec_gpio2), + GPIO_INPUT | GPIO_PULL_UP); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_x_gpio3), + GPIO_INPUT | GPIO_PULL_UP); return; default: break; @@ -53,9 +62,13 @@ static void corsola_db_config(enum corsola_db_type type) enum corsola_db_type corsola_get_db_type(void) { - static enum corsola_db_type db = CORSOLA_DB_NONE; +#if DT_NODE_EXISTS(DT_NODELABEL(db_config)) + int ret; + uint32_t val; +#endif + static enum corsola_db_type db = CORSOLA_DB_UNINIT; - if (db != CORSOLA_DB_NONE) { + if (db != CORSOLA_DB_UNINIT) { return db; } @@ -65,9 +78,33 @@ enum corsola_db_type corsola_get_db_type(void) db = CORSOLA_DB_TYPEC; } +/* Detect for no sub board case by FW_CONFIG */ +#if DT_NODE_EXISTS(DT_NODELABEL(db_config)) + ret = cros_cbi_get_fw_config(DB, &val); + if (ret != 0) { + CPRINTS("Error retrieving CBI FW_CONFIG field %d", DB); + } else if (val == DB_NONE) { + db = CORSOLA_DB_NONE; + } +#endif + corsola_db_config(db); - CPRINTS("Detect %s DB", db == CORSOLA_DB_HDMI ? "HDMI" : "TYPEC"); + switch (db) { + case CORSOLA_DB_NONE: + CPRINTS("Detect %s DB", "NONE"); + break; + case CORSOLA_DB_TYPEC: + CPRINTS("Detect %s DB", "TYPEC"); + break; + case CORSOLA_DB_HDMI: + CPRINTS("Detect %s DB", "HDMI"); + break; + default: + CPRINTS("DB UNINIT"); + break; + } + return db; } diff --git a/zephyr/projects/corsola/thermistor_tentacruel.dts b/zephyr/projects/corsola/thermistor_tentacruel.dts new file mode 100644 index 0000000000..f9e5306f24 --- /dev/null +++ b/zephyr/projects/corsola/thermistor_tentacruel.dts @@ -0,0 +1,140 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + thermistor_rt9490: thermistor-rt9490 { + status = "okay"; + compatible = "cros-ec,thermistor"; + scaling-factor = <3>; + num-pairs = <21>; + steinhart-reference-mv = <4900>; + steinhart-reference-res = <10000>; + + sample-datum-0 { + milivolt = <(731 / 3)>; + temp = <0>; + sample-index = <0>; + }; + + sample-datum-1 { + milivolt = <(708 / 3)>; + temp = <5>; + sample-index = <1>; + }; + + sample-datum-2 { + milivolt = <(682 / 3)>; + temp = <10>; + sample-index = <2>; + }; + + sample-datum-3 { + milivolt = <(653 / 3)>; + temp = <15>; + sample-index = <3>; + }; + + sample-datum-4 { + milivolt = <(622 / 3)>; + temp = <20>; + sample-index = <4>; + }; + + sample-datum-5 { + milivolt = <(589 / 3)>; + temp = <25>; + sample-index = <5>; + }; + + sample-datum-6 { + milivolt = <(554 / 3)>; + temp = <30>; + sample-index = <6>; + }; + + sample-datum-7 { + milivolt = <(519 / 3)>; + temp = <35>; + sample-index = <7>; + }; + + sample-datum-8 { + milivolt = <(483 / 3)>; + temp = <40>; + sample-index = <8>; + }; + + sample-datum-9 { + milivolt = <(446 / 3)>; + temp = <45>; + sample-index = <9>; + }; + + sample-datum-10 { + milivolt = <(411 / 3)>; + temp = <50>; + sample-index = <10>; + }; + sample-datum-11 { + milivolt = <(376 / 3)>; + temp = <55>; + sample-index = <11>; + }; + + sample-datum-12 { + milivolt = <(343 / 3)>; + temp = <60>; + sample-index = <12>; + }; + + sample-datum-13 { + milivolt = <(312 / 3)>; + temp = <65>; + sample-index = <13>; + }; + + sample-datum-14 { + milivolt = <(284 / 3)>; + temp = <70>; + sample-index = <14>; + }; + + sample-datum-15 { + milivolt = <(257 / 3)>; + temp = <75>; + sample-index = <15>; + }; + + sample-datum-16 { + milivolt = <(232 / 3)>; + temp = <80>; + sample-index = <16>; + }; + + sample-datum-17 { + milivolt = <(209 / 3)>; + temp = <85>; + sample-index = <17>; + }; + + sample-datum-18 { + milivolt = <(188 / 3)>; + temp = <90>; + sample-index = <18>; + }; + + sample-datum-19 { + milivolt = <(169 / 3)>; + temp = <95>; + sample-index = <19>; + }; + + sample-datum-20 { + milivolt = <(152 / 3)>; + temp = <100>; + sample-index = <20>; + }; + }; +}; diff --git a/zephyr/projects/corsola/usba.dts b/zephyr/projects/corsola/usba.dts index 13c900b1b6..2ecb3b7d5a 100644 --- a/zephyr/projects/corsola/usba.dts +++ b/zephyr/projects/corsola/usba.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/usba_steelix.dts b/zephyr/projects/corsola/usba_steelix.dts index 0671457fe9..0ddd67f664 100644 --- a/zephyr/projects/corsola/usba_steelix.dts +++ b/zephyr/projects/corsola/usba_steelix.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/corsola/usbc_kingler.dts b/zephyr/projects/corsola/usbc_kingler.dts index 6703498ad5..18bc6ce303 100644 --- a/zephyr/projects/corsola/usbc_kingler.dts +++ b/zephyr/projects/corsola/usbc_kingler.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,23 +8,49 @@ #address-cells = <1>; #size-cells = <0>; - /* TODO(b/227359727): kingler: convert USB-C configuration to - * devicetree - */ port0@0 { compatible = "named-usbc-port"; reg = <0>; + bc12 = <&bc12_port0>; + tcpc = <&tcpc_port0>; + ppc = <&ppc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&anx7447_mux_0 &virtual_mux_0>; + }; + }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_charger>; + port0-muxes { + anx7447_mux_0: anx7447-mux-0 { + compatible = "analogix,usbc-mux-anx7447"; + }; + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; }; }; port1@1 { compatible = "named-usbc-port"; reg = <1>; + bc12 = <&bc12_port1>; + tcpc = <&tcpc_port1>; + ppc = <&ppc_port1>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&ps8743_mux_1 &virtual_mux_1>; + }; + usb_mux_chain_1_hdmi_db: usb-mux-chain-1-hdmi-db { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; }; }; }; diff --git a/zephyr/projects/corsola/usbc_krabby.dts b/zephyr/projects/corsola/usbc_krabby.dts index 2156782dbc..a72864da35 100644 --- a/zephyr/projects/corsola/usbc_krabby.dts +++ b/zephyr/projects/corsola/usbc_krabby.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,32 +11,16 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "richtek,rt1739-bc12"; - status = "okay"; + bc12 = <&bc12_ppc_port0>; + ppc = <&bc12_ppc_port0>; + tcpc = <&usbpd0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&it5205_mux_0 &virtual_mux_0>; }; - ppc { - compatible = "richtek,rt1739-ppc"; - status = "okay"; - port = <&i2c_usb_c0>; - i2c-addr-flags = "RT1739_ADDR1_FLAGS"; - }; - tcpc { - compatible = "ite,it8xxx2-tcpc"; - }; - chg { - compatible = "richtek,rt9490"; - status = "okay"; - port = <&i2c_charger>; - }; - usb-muxes = <&it5205_mux_0 &virtual_mux_0>; }; port0-muxes { - it5205_mux_0: it5205-mux-0 { - compatible = "ite,it5205"; - port = <&i2c_usb_mux0>; - i2c-addr-flags = "IT5205_I2C_ADDR1_FLAGS"; - }; virtual_mux_0: virtual-mux-0 { compatible = "cros-ec,usbc-mux-virtual"; }; @@ -45,32 +29,31 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "richtek,rt9490-bc12"; - status = "okay"; - irq = <&int_usb_c1_bc12_charger>; - }; - ppc { - compatible = "silergy,syv682x"; - status = "okay"; - port = <&i2c_usb_c1>; - i2c-addr-flags = "SYV682X_ADDR0_FLAGS"; - frs_en_gpio = <&gpio_ec_x_gpio1>; - }; - tcpc { - compatible = "ite,it8xxx2-tcpc"; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&usbpd1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&tusb1064_mux_1 &virtual_mux_1>; + }; + usb_mux_chain_1_hdmi_db: usb-mux-chain-1-hdmi-db { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; }; - usb-muxes = <&tusb1064_mux_1 &virtual_mux_1>; }; port1-muxes { - tusb1064_mux_1: tusb1064-mux-1 { - compatible = "ti,tusb1064"; - port = <&i2c_usb_mux1>; - i2c-addr-flags = "TUSB1064_I2C_ADDR0_FLAGS"; - }; virtual_mux_1: virtual-mux-1 { compatible = "cros-ec,usbc-mux-virtual"; }; }; }; }; + +&usbpd0 { + status = "okay"; +}; + +&usbpd1 { + status = "okay"; +}; diff --git a/zephyr/projects/corsola/usbc_magikarp.dts b/zephyr/projects/corsola/usbc_magikarp.dts new file mode 100644 index 0000000000..0e0473cd86 --- /dev/null +++ b/zephyr/projects/corsola/usbc_magikarp.dts @@ -0,0 +1,59 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_ppc_port0>; + ppc = <&bc12_ppc_port0>; + tcpc = <&usbpd0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&it5205_mux_0 &virtual_mux_0>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&usbpd1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&ps8743_mux_1 &virtual_mux_1>; + }; + usb_mux_chain_1_hdmi_db: usb-mux-chain-1-hdmi-db { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + }; +}; + +&usbpd0 { + status = "okay"; +}; + +&usbpd1 { + status = "okay"; +}; diff --git a/zephyr/projects/corsola/usbc_tentacruel.dts b/zephyr/projects/corsola/usbc_tentacruel.dts new file mode 100644 index 0000000000..bb105a8e08 --- /dev/null +++ b/zephyr/projects/corsola/usbc_tentacruel.dts @@ -0,0 +1,60 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_port0>; + ppc = <&bc12_ppc_port0>; + ppc_alt = <&ppc_port0>; + tcpc = <&usbpd0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&it5205_mux_0 &virtual_mux_0>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&usbpd1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&ps8743_mux_1 &virtual_mux_1>; + }; + usb_mux_chain_1_hdmi_db: usb-mux-chain-1-hdmi-db { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + }; +}; + +&usbpd0 { + status = "okay"; +}; + +&usbpd1 { + status = "okay"; +}; diff --git a/zephyr/projects/herobrine/BUILD.py b/zephyr/projects/herobrine/BUILD.py index 2a15441c55..b8bbdb0ce7 100644 --- a/zephyr/projects/herobrine/BUILD.py +++ b/zephyr/projects/herobrine/BUILD.py @@ -1,11 +1,13 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Define zmake projects for herobrine.""" -def register_variant(project_name, extra_dts_overlays=(), extra_kconfig_files=()): +def register_variant( + project_name, extra_dts_overlays=(), extra_kconfig_files=() +): """Register a variant of herobrine.""" register_npcx_project( project_name=project_name, @@ -14,7 +16,6 @@ def register_variant(project_name, extra_dts_overlays=(), extra_kconfig_files=() # Common to all projects. here / "adc.dts", here / "common.dts", - here / "i2c.dts", here / "interrupts.dts", here / "keyboard.dts", here / "default_gpio_pinctrl.dts", @@ -31,11 +32,28 @@ def register_variant(project_name, extra_dts_overlays=(), extra_kconfig_files=() register_variant( + project_name="evoker", + extra_dts_overlays=[ + here / "display.dts", + here / "battery_evoker.dts", + here / "gpio_evoker.dts", + here / "i2c_evoker.dts", + here / "led_pins_evoker.dts", + here / "led_policy_evoker.dts", + here / "motionsense_evoker.dts", + here / "switchcap.dts", + here / "usbc_evoker.dts", + ], + extra_kconfig_files=[here / "prj_evoker.conf"], +) + +register_variant( project_name="herobrine", extra_dts_overlays=[ here / "display.dts", here / "battery_herobrine.dts", here / "gpio.dts", + here / "i2c_herobrine.dts", here / "led_pins_herobrine.dts", here / "led_policy_herobrine.dts", here / "motionsense.dts", @@ -45,12 +63,12 @@ register_variant( extra_kconfig_files=[here / "prj_herobrine.conf"], ) - register_variant( project_name="hoglin", extra_dts_overlays=[ here / "battery_hoglin.dts", here / "gpio_hoglin.dts", + here / "i2c_hoglin.dts", here / "led_pins_hoglin.dts", here / "led_policy_hoglin.dts", here / "motionsense_hoglin.dts", @@ -60,12 +78,12 @@ register_variant( extra_kconfig_files=[here / "prj_hoglin.conf"], ) - register_variant( project_name="villager", extra_dts_overlays=[ here / "battery_villager.dts", here / "gpio_villager.dts", + here / "i2c_villager.dts", here / "led_pins_villager.dts", here / "led_policy_villager.dts", here / "motionsense_villager.dts", @@ -74,3 +92,18 @@ register_variant( ], extra_kconfig_files=[here / "prj_villager.conf"], ) + +register_variant( + project_name="zoglin", + extra_dts_overlays=[ + here / "battery_hoglin.dts", + here / "gpio_hoglin.dts", + here / "i2c_hoglin.dts", + here / "led_pins_hoglin.dts", + here / "led_policy_hoglin.dts", + here / "motionsense_hoglin.dts", + here / "switchcap_hoglin.dts", + here / "usbc_hoglin.dts", + ], + extra_kconfig_files=[here / "prj_zoglin.conf"], +) diff --git a/zephyr/projects/herobrine/CMakeLists.txt b/zephyr/projects/herobrine/CMakeLists.txt index 537fa5ef68..75aae3419e 100644 --- a/zephyr/projects/herobrine/CMakeLists.txt +++ b/zephyr/projects/herobrine/CMakeLists.txt @@ -1,13 +1,18 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") cros_ec_library_include_directories(include) +# Common Herobrine implementation +zephyr_library_sources( + "src/board_chipset.c" +) + # Board specific implementation zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usbc_config.c" @@ -15,7 +20,9 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C "src/i2c.c") -if(DEFINED CONFIG_BOARD_HEROBRINE) +if(DEFINED CONFIG_BOARD_EVOKER) + project(evoker) +elseif(DEFINED CONFIG_BOARD_HEROBRINE) project(herobrine) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/herobrine/alt_dev_replacement.c") @@ -23,4 +30,6 @@ elseif(DEFINED CONFIG_BOARD_HOGLIN) project(hoglin) elseif(DEFINED CONFIG_BOARD_VILLAGER) project(villager) +elseif(DEFINED CONFIG_BOARD_ZOGLIN) + project(zoglin) endif() diff --git a/zephyr/projects/herobrine/Kconfig b/zephyr/projects/herobrine/Kconfig index 902e81a49a..383d5a08ee 100644 --- a/zephyr/projects/herobrine/Kconfig +++ b/zephyr/projects/herobrine/Kconfig @@ -1,7 +1,13 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. +config BOARD_EVOKER + bool "Evoker Board" + help + Build the Evoker board. The board is based on the Herobrine + reference design. + config BOARD_HEROBRINE bool "Google Herobrine Baseboard" help @@ -20,4 +26,10 @@ config BOARD_VILLAGER Build the Villager board. The board is based on the Herobrine reference design. +config BOARD_ZOGLIN + bool "Qualcomm Zoglin Baseboard" + help + Build Qualcomm Zoglin reference board. The board uses Nuvoton + NPCX9 chip as the EC. + source "Kconfig.zephyr" diff --git a/zephyr/projects/herobrine/adc.dts b/zephyr/projects/herobrine/adc.dts index bbb50cccab..16a5434e9d 100644 --- a/zephyr/projects/herobrine/adc.dts +++ b/zephyr/projects/herobrine/adc.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,14 +10,12 @@ compatible = "named-adc-channels"; vbus { - label = "VBUS"; enum-name = "ADC_VBUS"; io-channels = <&adc0 1>; /* Measure VBUS through a 1/10 voltage divider */ mul = <10>; }; amon_bmon { - label = "AMON_BMON"; enum-name = "ADC_AMON_BMON"; io-channels = <&adc0 2>; /* @@ -29,7 +27,6 @@ div = <18>; }; psys { - label = "PSYS"; enum-name = "ADC_PSYS"; io-channels = <&adc0 3>; /* diff --git a/zephyr/projects/herobrine/battery_evoker.dts b/zephyr/projects/herobrine/battery_evoker.dts new file mode 100644 index 0000000000..0e09616c1d --- /dev/null +++ b/zephyr/projects/herobrine/battery_evoker.dts @@ -0,0 +1,15 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: pc_vp_bp153 { + compatible = "smp,pc-vp-bp153", "battery-smart"; + }; + ap16l5j { + compatible = "panasonic,ap16l5j", "battery-smart"; + }; + }; +}; diff --git a/zephyr/projects/herobrine/battery_herobrine.dts b/zephyr/projects/herobrine/battery_herobrine.dts index 764c3fb5ed..b347ec4c3c 100644 --- a/zephyr/projects/herobrine/battery_herobrine.dts +++ b/zephyr/projects/herobrine/battery_herobrine.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/battery_hoglin.dts b/zephyr/projects/herobrine/battery_hoglin.dts index 79fc6ca296..11180c3988 100644 --- a/zephyr/projects/herobrine/battery_hoglin.dts +++ b/zephyr/projects/herobrine/battery_hoglin.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/battery_villager.dts b/zephyr/projects/herobrine/battery_villager.dts index 2fe9a93774..dafd473a6e 100644 --- a/zephyr/projects/herobrine/battery_villager.dts +++ b/zephyr/projects/herobrine/battery_villager.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/common.dts b/zephyr/projects/herobrine/common.dts index aeb99c5377..a722f1dfa2 100644 --- a/zephyr/projects/herobrine/common.dts +++ b/zephyr/projects/herobrine/common.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/default_gpio_pinctrl.dts b/zephyr/projects/herobrine/default_gpio_pinctrl.dts index d25b388726..604658a145 100644 --- a/zephyr/projects/herobrine/default_gpio_pinctrl.dts +++ b/zephyr/projects/herobrine/default_gpio_pinctrl.dts @@ -1,44 +1,44 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ /* Adds the &alt1_no_lpc_espi setting over the NPCX9 default setting. */ &{/def-io-conf-list} { - pinctrl-0 = <&alt0_gpio_no_spip - &alt0_gpio_no_fpip - &alt1_no_pwrgd - &alt1_no_lpc_espi - &alta_no_peci_en - &altd_npsl_in1_sl - &altd_npsl_in2_sl - &altd_psl_in3_sl - &altd_psl_in4_sl - &alt7_no_ksi0_sl - &alt7_no_ksi1_sl - &alt7_no_ksi2_sl - &alt7_no_ksi3_sl - &alt7_no_ksi4_sl - &alt7_no_ksi5_sl - &alt7_no_ksi6_sl - &alt7_no_ksi7_sl - &alt8_no_kso00_sl - &alt8_no_kso01_sl - &alt8_no_kso02_sl - &alt8_no_kso03_sl - &alt8_no_kso04_sl - &alt8_no_kso05_sl - &alt8_no_kso06_sl - &alt8_no_kso07_sl - &alt9_no_kso08_sl - &alt9_no_kso09_sl - &alt9_no_kso10_sl - &alt9_no_kso11_sl - &alt9_no_kso12_sl - &alt9_no_kso13_sl - &alt9_no_kso14_sl - &alt9_no_kso15_sl - &alta_no_kso16_sl - &alta_no_kso17_sl - &altg_psl_gpo_sl>; + pinmux = <&alt0_gpio_no_spip + &alt0_gpio_no_fpip + &alt1_no_pwrgd + &alt1_no_lpc_espi + &alta_no_peci_en + &altd_npsl_in1_sl + &altd_npsl_in2_sl + &altd_psl_in3_sl + &altd_psl_in4_sl + &alt7_no_ksi0_sl + &alt7_no_ksi1_sl + &alt7_no_ksi2_sl + &alt7_no_ksi3_sl + &alt7_no_ksi4_sl + &alt7_no_ksi5_sl + &alt7_no_ksi6_sl + &alt7_no_ksi7_sl + &alt8_no_kso00_sl + &alt8_no_kso01_sl + &alt8_no_kso02_sl + &alt8_no_kso03_sl + &alt8_no_kso04_sl + &alt8_no_kso05_sl + &alt8_no_kso06_sl + &alt8_no_kso07_sl + &alt9_no_kso08_sl + &alt9_no_kso09_sl + &alt9_no_kso10_sl + &alt9_no_kso11_sl + &alt9_no_kso12_sl + &alt9_no_kso13_sl + &alt9_no_kso14_sl + &alt9_no_kso15_sl + &alta_no_kso16_sl + &alta_no_kso17_sl + &altg_psl_gpo_sl>; }; diff --git a/zephyr/projects/herobrine/display.dts b/zephyr/projects/herobrine/display.dts index 6f28e7e81a..65d3a2d91b 100644 --- a/zephyr/projects/herobrine/display.dts +++ b/zephyr/projects/herobrine/display.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,6 @@ displight { compatible = "cros-ec,displight"; pwms = <&pwm5 0 PWM_HZ(4800) PWM_POLARITY_NORMAL>; - frequency = <4800>; generic-pwm-channel = <1>; }; }; diff --git a/zephyr/projects/herobrine/gpio.dts b/zephyr/projects/herobrine/gpio.dts index ba958150e0..a355aaf099 100644 --- a/zephyr/projects/herobrine/gpio.dts +++ b/zephyr/projects/herobrine/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -227,6 +227,12 @@ arm_x86 { gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; }; + ec-i2c-sensor-scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; gpio_ec_kso_02_inv: ec_kso_02_inv { gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; }; @@ -237,20 +243,6 @@ enable-pins = <&gpio_en_usb_a_5v>; }; - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_iob3 /* EC_I2C_SENSOR_SCL */ - &lvol_iob2 /* EC_I2C_SENSOR_SDA */ - >; - }; - - vsby-psl-in-list { - /* Use PSL_IN1/2/3/4 as detection pins from hibernate mode */ - psl-in-pads = <&psl_in1 &psl_in2 &psl_in3 &psl_in4>; - status = "okay"; - }; - sku { compatible = "cros-ec,gpio-id"; @@ -305,22 +297,33 @@ }; /* Power switch logic input pads */ -&psl_in1 { +&psl_in1_gpd2 { /* ACOK_OD */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in2 { +&psl_in2_gp00 { /* EC_PWR_BTN_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; }; -&psl_in3 { +&psl_in3_gp01 { /* LID_OPEN_EC */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in4 { +&psl_in4_gp02 { /* RTC_EC_WAKE_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; }; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01 &psl_in4_gp02>; +};
\ No newline at end of file diff --git a/zephyr/projects/herobrine/gpio_evoker.dts b/zephyr/projects/herobrine/gpio_evoker.dts new file mode 100644 index 0000000000..c27cfba47d --- /dev/null +++ b/zephyr/projects/herobrine/gpio_evoker.dts @@ -0,0 +1,327 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + gpio-wp = &gpio_ec_wp_odl; + gpio-kbd-kso2 = &gpio_ec_kso_02_inv; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_usb_c0_pd_int_odl: usb_c0_pd_int_odl { + gpios = <&gpioe 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PD_INT_ODL"; + }; + gpio_usb_c1_pd_int_odl: usb_c1_pd_int_odl { + gpios = <&gpiof 5 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PD_INT_ODL"; + }; + gpio_usb_c0_swctl_int_odl: usb_c0_swctl_int_odl { + gpios = <&gpio0 3 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_SWCTL_INT_ODL"; + }; + gpio_usb_c1_swctl_int_odl: usb_c1_swctl_int_odl { + gpios = <&gpio4 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_SWCTL_INT_ODL"; + }; + gpio_usb_c0_bc12_int_l: usb_c0_bc12_int_l { + gpios = <&gpio6 1 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_c1_bc12_int_l: usb_c1_bc12_int_l { + gpios = <&gpio8 2 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_a0_oc_odl: usb_a0_oc_odl { + gpios = <&gpiof 4 GPIO_INPUT_PULL_UP>; + }; + gpio_chg_acok_od: chg_acok_od { + gpios = <&gpiod 2 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + }; + gpio_ec_pwr_btn_odl: ec_pwr_btn_odl { + gpios = <&gpio0 0 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_ec_voldn_btn_odl: ec_voldn_btn_odl { + gpios = <&gpio6 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_ec_volup_btn_odl: ec_volup_btn_odl { + gpios = <&gpioc 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + gpio_ec_wp_odl: ec_wp_odl { + gpios = <&gpiod 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_lid_open_ec: lid_open_ec { + gpios = <&gpio0 1 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_ap_rst_l: ap_rst_l { + gpios = <&gpio5 1 GPIO_INPUT>; + enum-name = "GPIO_AP_RST_L"; + }; + gpio_ps_hold: ps_hold { + gpios = <&gpioa 6 GPIO_INPUT_PULL_DOWN>; + enum-name = "GPIO_PS_HOLD"; + }; + gpio_ap_suspend: ap_suspend { + gpios = <&gpio5 7 GPIO_INPUT>; + enum-name = "GPIO_AP_SUSPEND"; + }; + gpio_mb_power_good: mb_power_good { + gpios = <&gpio3 7 GPIO_INPUT_PULL_DOWN>; + enum-name = "GPIO_POWER_GOOD"; + }; + gpio_warm_reset_l: warm_reset_l { + gpios = <&gpiob 0 GPIO_INPUT>; + enum-name = "GPIO_WARM_RESET_L"; + }; + ap_ec_spi_cs_l { + gpios = <&gpio5 3 GPIO_INPUT_PULL_DOWN>; + }; + gpio_tablet_mode_l: tablet_mode_l { + gpios = <&gpioc 6 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + gpio_accel_gyro_int_l: accel_gyro_int_l { + gpios = <&gpioa 3 GPIO_INPUT>; + }; + gpio_rtc_ec_wake_odl: rtc_ec_wake_odl { + gpios = <&gpio0 2 GPIO_INPUT>; + }; + ec_entering_rw { + gpios = <&gpio7 2 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENTERING_RW"; + }; + ccd_mode_odl { + gpios = <&gpio6 3 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + ec_batt_pres_odl { + gpios = <&gpioe 5 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + ec_gsc_packet_mode { + gpios = <&gpio8 3 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + pmic_resin_l { + gpios = <&gpioa 0 GPIO_ODR_HIGH>; + enum-name = "GPIO_PMIC_RESIN_L"; + }; + pmic_kpd_pwr_odl { + gpios = <&gpioa 2 GPIO_ODR_HIGH>; + enum-name = "GPIO_PMIC_KPD_PWR_ODL"; + }; + ap_ec_int_l { + gpios = <&gpio5 6 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_switchcap_on: switchcap_on { + gpios = <&gpiod 5 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_SWITCHCAP_ON"; + }; + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpio7 3 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_EN_PP5000"; + }; + ec_bl_disable_l { + /* Enable EC-controlled backlight; + * disable it initially. + */ + gpios = <&gpiob 6 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + lid_accel_int_l { + gpios = <&gpioa 1 GPIO_INPUT>; + }; + tp_int_gate { + gpios = <&gpio7 4 GPIO_OUTPUT_LOW>; + }; + gpio_usb_c0_pd_rst_l: usb_c0_pd_rst_l { + gpios = <&gpiof 1 GPIO_OUTPUT_HIGH>; + }; + gpio_usb_c1_pd_rst_l: usb_c1_pd_rst_l { + gpios = <&gpioe 4 GPIO_OUTPUT_HIGH>; + }; + gpio_dp_mux_oe_l: dp_mux_oe_l { + gpios = <&gpiob 1 GPIO_ODR_HIGH>; + }; + gpio_dp_mux_sel: dp_mux_sel { + gpios = <&gpio4 5 GPIO_OUTPUT_LOW>; + }; + gpio_dp_hot_plug_det_r: dp_hot_plug_det_r { + gpios = <&gpio9 5 GPIO_OUTPUT_LOW>; + }; + gpio_en_usb_a_5v: en_usb_a_5v { + gpios = <&gpiof 0 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_EN_USB_A_5V"; + }; + usb_a_cdp_ilim_en_l { + gpios = <&gpio7 5 GPIO_OUTPUT_HIGH>; + }; + gpio_usb_c0_frs_en: usb_c0_frs_en { + gpios = <&gpioc 5 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_USB_C0_FRS_EN"; + }; + gpio_usb_c1_frs_en: usb_c1_frs_en { + gpios = <&gpioc 1 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_USB_C1_FRS_EN"; + }; + gpio_ec_chg_led_y_c0: ec_chg_led_y_c0 { + #led-pin-cells = <1>; + gpios = <&gpio6 0 GPIO_OUTPUT_LOW>; + }; + gpio_ec_chg_led_w_c0: ec_chg_led_w_c0 { + #led-pin-cells = <1>; + gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; + }; + gpio_ec_chg_led_w_c1: ec_chg_led_w_c1 { + #led-pin-cells = <1>; + gpios = <&gpioc 3 GPIO_OUTPUT_LOW>; + }; + gpio_ec_chg_led_r_c0: ec_chg_led_r_c0 { + #led-pin-cells = <1>; + gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; + }; + ap_ec_spi_mosi { + gpios = <&gpio4 6 GPIO_INPUT_PULL_DOWN>; + }; + ap_ec_spi_miso { + gpios = <&gpio4 7 GPIO_INPUT_PULL_DOWN>; + }; + ap_ec_spi_clk { + gpios = <&gpio5 5 GPIO_INPUT_PULL_DOWN>; + }; + gpio_brd_id0: brd_id0 { + gpios = <&gpio9 4 GPIO_INPUT>; + enum-name = "GPIO_BOARD_VERSION1"; + }; + gpio_brd_id1: brd_id1 { + gpios = <&gpio9 7 GPIO_INPUT>; + enum-name = "GPIO_BOARD_VERSION2"; + }; + gpio_brd_id2: brd_id2 { + gpios = <&gpioa 5 GPIO_INPUT>; + enum-name = "GPIO_BOARD_VERSION3"; + }; + gpio_sku_id0: sku_id0 { + gpios = <&gpio6 7 GPIO_INPUT>; + }; + gpio_sku_id1: sku_id1 { + gpios = <&gpio7 0 GPIO_INPUT>; + }; + gpio_sku_id2: sku_id2 { + gpios = <&gpioe 1 GPIO_INPUT>; + }; + gpio_switchcap_pg: src_vph_pwr_pg { + gpios = <&gpioe 2 GPIO_INPUT_PULL_DOWN>; + enum-name = "GPIO_SWITCHCAP_PG"; + }; + arm_x86 { + gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; + }; + ec-i2c-sensor-scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; + }; + }; + + usba-port-enable-list { + compatible = "cros-ec,usba-port-enable-pins"; + enable-pins = <&gpio_en_usb_a_5v>; + }; + + sku { + compatible = "cros-ec,gpio-id"; + + bits = < + &gpio_sku_id0 + &gpio_sku_id1 + &gpio_sku_id2 + >; + + system = "ternary"; + }; + + board { + compatible = "cros-ec,gpio-id"; + + bits = < + &gpio_brd_id0 + &gpio_brd_id1 + &gpio_brd_id2 + >; + + system = "ternary"; + }; + + unused-pins { + compatible = "unused-gpios"; + unused-gpios = + <&gpio5 2 0>, + <&gpio5 4 0>, + <&gpio7 6 0>, + <&gpiod 1 0>, + <&gpiod 0 0>, + <&gpioe 3 0>, + <&gpio0 4 0>, + <&gpiod 6 0>, + <&gpio3 2 0>, + <&gpio3 5 0>, + <&gpiod 7 0>, + <&gpio8 6 0>, + <&gpiod 4 0>, + <&gpio4 1 0>, + <&gpio3 4 0>, + <&gpioc 7 0>, + <&gpioa 4 0>, + <&gpio9 6 0>, + <&gpio9 3 0>, + <&gpioa 7 0>, + <&gpio5 0 0>, + <&gpio8 1 0>, + <&gpiob 7 0>; + }; +}; + +/* Power switch logic input pads */ +&psl_in1_gpd2 { + /* ACOK_OD */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in2_gp00 { + /* EC_PWR_BTN_ODL */ + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +&psl_in3_gp01 { + /* LID_OPEN_EC */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in4_gp02 { + /* RTC_EC_WAKE_ODL */ + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01 &psl_in4_gp02>; +}; diff --git a/zephyr/projects/herobrine/gpio_hoglin.dts b/zephyr/projects/herobrine/gpio_hoglin.dts index f0b8a43586..cb7babc9cf 100644 --- a/zephyr/projects/herobrine/gpio_hoglin.dts +++ b/zephyr/projects/herobrine/gpio_hoglin.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -225,6 +225,12 @@ arm_x86 { gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; }; + ec-i2c-sensor-scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; gpio_ec_kso_02_inv: ec_kso_02_inv { gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; }; @@ -235,20 +241,6 @@ enable-pins = <&gpio_en_usb_a_5v>; }; - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_iob3 /* EC_I2C_SENSOR_SCL */ - &lvol_iob2 /* EC_I2C_SENSOR_SDA */ - >; - }; - - vsby-psl-in-list { - /* Use PSL_IN1/2/3/4 as detection pins from hibernate mode */ - psl-in-pads = <&psl_in1 &psl_in2 &psl_in3 &psl_in4>; - status = "okay"; - }; - sku { compatible = "cros-ec,gpio-id"; @@ -303,22 +295,33 @@ }; /* Power switch logic input pads */ -&psl_in1 { +&psl_in1_gpd2 { /* ACOK_OD */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in2 { +&psl_in2_gp00 { /* EC_PWR_BTN_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; }; -&psl_in3 { +&psl_in3_gp01 { /* LID_OPEN_EC */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in4 { +&psl_in4_gp02 { /* RTC_EC_WAKE_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01 &psl_in4_gp02>; }; diff --git a/zephyr/projects/herobrine/gpio_villager.dts b/zephyr/projects/herobrine/gpio_villager.dts index 7b8d2adcb5..1e7625ff6a 100644 --- a/zephyr/projects/herobrine/gpio_villager.dts +++ b/zephyr/projects/herobrine/gpio_villager.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -219,6 +219,12 @@ arm_x86 { gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; }; + ec-i2c-sensor-scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; gpio_ec_kso_02_inv: ec_kso_02_inv { gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; }; @@ -229,20 +235,6 @@ enable-pins = <&gpio_en_usb_a_5v>; }; - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_iob3 /* EC_I2C_SENSOR_SCL */ - &lvol_iob2 /* EC_I2C_SENSOR_SDA */ - >; - }; - - vsby-psl-in-list { - /* Use PSL_IN1/2/3/4 as detection pins from hibernate mode */ - psl-in-pads = <&psl_in1 &psl_in2 &psl_in3 &psl_in4>; - status = "okay"; - }; - sku { compatible = "cros-ec,gpio-id"; @@ -299,22 +291,33 @@ }; /* Power switch logic input pads */ -&psl_in1 { +&psl_in1_gpd2 { /* ACOK_OD */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in2 { +&psl_in2_gp00 { /* EC_PWR_BTN_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; }; -&psl_in3 { +&psl_in3_gp01 { /* LID_OPEN_EC */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in4 { +&psl_in4_gp02 { /* RTC_EC_WAKE_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01 &psl_in4_gp02>; }; diff --git a/zephyr/projects/herobrine/i2c.dts b/zephyr/projects/herobrine/i2c_common.dtsi index 5aed893596..b1ed0242c0 100644 --- a/zephyr/projects/herobrine/i2c.dts +++ b/zephyr/projects/herobrine/i2c_common.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,48 +20,33 @@ i2c_power: power { i2c-port = <&i2c0_0>; remote-port = <0>; - enum-name = "I2C_PORT_POWER"; - }; - battery { - i2c-port = <&i2c0_0>; - remote-port = <0>; - enum-name = "I2C_PORT_BATTERY"; - }; - virtual-battery { - i2c-port = <&i2c0_0>; - remote-port = <0>; - enum-name = "I2C_PORT_VIRTUAL_BATTERY"; - }; - i2c_charger: charger { - i2c-port = <&i2c0_0>; - remote-port = <0>; - enum-name = "I2C_PORT_CHARGER"; + enum-names = "I2C_PORT_POWER", + "I2C_PORT_BATTERY", + "I2C_PORT_VIRTUAL_BATTERY", + "I2C_PORT_CHARGER"; }; i2c_tcpc0: tcpc0 { i2c-port = <&i2c1_0>; dynamic-speed; - enum-name = "I2C_PORT_TCPC0"; + enum-names = "I2C_PORT_TCPC0"; }; i2c_tcpc1: tcpc1 { i2c-port = <&i2c2_0>; dynamic-speed; - enum-name = "I2C_PORT_TCPC1"; + enum-names = "I2C_PORT_TCPC1"; }; rtc { i2c-port = <&i2c4_1>; - enum-name = "I2C_PORT_RTC"; + enum-names = "I2C_PORT_RTC"; }; i2c_eeprom: eeprom { i2c-port = <&i2c5_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_EEPROM"; }; i2c_sensor: sensor { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_SENSOR"; - }; - accel { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_ACCEL"; + enum-names = "I2C_PORT_SENSOR", + "I2C_PORT_ACCEL"; }; }; @@ -74,6 +59,19 @@ clock-frequency = <I2C_BITRATE_STANDARD>; pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + + charger: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; }; &i2c_ctrl0 { @@ -119,7 +117,6 @@ pcf85063a: pcf85063a@51 { compatible = "nxp,rtc-pcf85063a"; reg = <0x51>; - label = "RTC_PCF85063A"; int-pin = <&gpio_rtc_ec_wake_odl>; }; }; @@ -134,6 +131,13 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>; pinctrl-names = "default"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c1_bc12>; + }; }; &i2c_ctrl5 { diff --git a/zephyr/projects/herobrine/i2c_evoker.dts b/zephyr/projects/herobrine/i2c_evoker.dts new file mode 100644 index 0000000000..7023d08c8d --- /dev/null +++ b/zephyr/projects/herobrine/i2c_evoker.dts @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c_common.dtsi" + +&i2c1_0 { + ppc_port0: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c0_frs_en>; + }; + + ppc_port0_alt: sn5s330@40 { + compatible = "ti,sn5s330"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port0: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + }; +}; + +&i2c2_0 { + ppc_port1: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c1_frs_en>; + }; + + ppc_port1_alt: sn5s330@40 { + compatible = "ti,sn5s330"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port1: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + }; +}; diff --git a/zephyr/projects/herobrine/i2c_herobrine.dts b/zephyr/projects/herobrine/i2c_herobrine.dts new file mode 100644 index 0000000000..92c68f4215 --- /dev/null +++ b/zephyr/projects/herobrine/i2c_herobrine.dts @@ -0,0 +1,39 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c_common.dtsi" + +&i2c1_0 { + ppc_port0: sn5s330@40 { + compatible = "ti,sn5s330"; + status = "okay"; + reg = <0x40>; + }; + + ppc_port0_alt: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c0_frs_en>; + }; + + tcpc_port0: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + }; +}; + +&i2c2_0 { + ppc_port1: sn5s330@40 { + compatible = "ti,sn5s330"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port1: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + }; +}; diff --git a/zephyr/projects/herobrine/i2c_hoglin.dts b/zephyr/projects/herobrine/i2c_hoglin.dts new file mode 100644 index 0000000000..504dbb9248 --- /dev/null +++ b/zephyr/projects/herobrine/i2c_hoglin.dts @@ -0,0 +1,34 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c_common.dtsi" + +&i2c1_0 { + ppc_port0: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c0_frs_en>; + }; + + tcpc_port0: ps8xxx@1b { + compatible = "parade,ps8xxx"; + reg = <0x1b>; + }; +}; + +&i2c2_0 { + ppc_port1: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c1_frs_en>; + }; + + tcpc_port1: ps8xxx@1b { + compatible = "parade,ps8xxx"; + reg = <0x1b>; + }; +}; diff --git a/zephyr/projects/herobrine/i2c_villager.dts b/zephyr/projects/herobrine/i2c_villager.dts new file mode 100644 index 0000000000..efdf88ac38 --- /dev/null +++ b/zephyr/projects/herobrine/i2c_villager.dts @@ -0,0 +1,34 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c_common.dtsi" + +&i2c1_0 { + ppc_port0: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c0_frs_en>; + }; + + tcpc_port0: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + }; +}; + +&i2c2_0 { + ppc_port1: syv682x@41 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x41>; + frs_en_gpio = <&gpio_usb_c1_frs_en>; + }; + + tcpc_port1: ps8xxx@b { + compatible = "parade,ps8xxx"; + reg = <0xb>; + }; +}; diff --git a/zephyr/projects/herobrine/include/board_chipset.h b/zephyr/projects/herobrine/include/board_chipset.h new file mode 100644 index 0000000000..8350ef10ff --- /dev/null +++ b/zephyr/projects/herobrine/include/board_chipset.h @@ -0,0 +1,11 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_HEROBRINE_BOARD_CHIPSET_H +#define __CROS_EC_HEROBRINE_BOARD_CHIPSET_H + +__test_only void reset_pp5000_inited(void); + +#endif /* __CROS_EC_HEROBRINE_BOARD_CHIPSET_H */ diff --git a/zephyr/projects/herobrine/include/gpio_map.h b/zephyr/projects/herobrine/include/gpio_map.h deleted file mode 100644 index c2b81fe5c6..0000000000 --- a/zephyr/projects/herobrine/include/gpio_map.h +++ /dev/null @@ -1,9 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/herobrine/interrupts.dts b/zephyr/projects/herobrine/interrupts.dts index 23902a7d05..82650bfc51 100644 --- a/zephyr/projects/herobrine/interrupts.dts +++ b/zephyr/projects/herobrine/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/keyboard.dts b/zephyr/projects/herobrine/keyboard.dts index 202b61bb4f..3b7e830f2f 100644 --- a/zephyr/projects/herobrine/keyboard.dts +++ b/zephyr/projects/herobrine/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,6 @@ kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm3 0 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; generic-pwm-channel = <0>; }; }; diff --git a/zephyr/projects/herobrine/led_pins_evoker.dts b/zephyr/projects/herobrine/led_pins_evoker.dts new file mode 100644 index 0000000000..ff2dc0e36c --- /dev/null +++ b/zephyr/projects/herobrine/led_pins_evoker.dts @@ -0,0 +1,54 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + gpio-led-pins { + compatible = "cros-ec,gpio-led-pins"; + + color_power_off: color-power-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_POWER_LED"; + led-pins = <&gpio_ec_chg_led_w_c1 0>; + }; + + color_power_white: color-power-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_POWER_LED"; + led-pins = <&gpio_ec_chg_led_w_c1 1>; + }; + + color_battery_off: color-battery-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&gpio_ec_chg_led_y_c0 0>, + <&gpio_ec_chg_led_w_c0 0>, + <&gpio_ec_chg_led_r_c0 0>; + }; + + color_battery_amber: color-battery-amber { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&gpio_ec_chg_led_y_c0 1>, + <&gpio_ec_chg_led_w_c0 0>, + <&gpio_ec_chg_led_r_c0 0>; + }; + + color_battery_white: color-battery-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&gpio_ec_chg_led_y_c0 0>, + <&gpio_ec_chg_led_w_c0 1>, + <&gpio_ec_chg_led_r_c0 0>; + }; + + color_battery_red: color-battery-red { + led-color = "LED_RED"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&gpio_ec_chg_led_y_c0 0>, + <&gpio_ec_chg_led_w_c0 0>, + <&gpio_ec_chg_led_r_c0 1>; + }; + }; +}; diff --git a/zephyr/projects/herobrine/led_pins_herobrine.dts b/zephyr/projects/herobrine/led_pins_herobrine.dts index cdc5f03904..c509ab1a64 100644 --- a/zephyr/projects/herobrine/led_pins_herobrine.dts +++ b/zephyr/projects/herobrine/led_pins_herobrine.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/led_pins_hoglin.dts b/zephyr/projects/herobrine/led_pins_hoglin.dts index 8603b4e61d..7b125c5cac 100644 --- a/zephyr/projects/herobrine/led_pins_hoglin.dts +++ b/zephyr/projects/herobrine/led_pins_hoglin.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/led_pins_villager.dts b/zephyr/projects/herobrine/led_pins_villager.dts index 67a1d1926c..b0913cdbce 100644 --- a/zephyr/projects/herobrine/led_pins_villager.dts +++ b/zephyr/projects/herobrine/led_pins_villager.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/led_policy_evoker.dts b/zephyr/projects/herobrine/led_policy_evoker.dts new file mode 100644 index 0000000000..fc17755ede --- /dev/null +++ b/zephyr/projects/herobrine/led_policy_evoker.dts @@ -0,0 +1,86 @@ +#include <dt-bindings/battery.h> + +/ { + led-colors { + compatible = "cros-ec,led-policy"; + + battery-state-charge { + charge-state = "PWR_STATE_CHARGE"; + + color-0 { + led-color = <&color_battery_amber>; + }; + }; + + battery-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = <&color_battery_white>; + }; + }; + + battery-state-discharge { + charge-state = "PWR_STATE_DISCHARGE"; + + color-0 { + led-color = <&color_battery_off>; + }; + }; + + battery-state-error { + charge-state = "PWR_STATE_ERROR"; + + color-0 { + led-color = <&color_battery_red>; + }; + }; + + /* force idle mode */ + battery-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; + + /* Red 1 sec, White 1 sec */ + color-0 { + led-color = <&color_battery_red>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_battery_white>; + period-ms = <1000>; + }; + }; + + pwr-power-state-s0 { + chipset-state = "POWER_S0"; + + color-0 { + led-color = <&color_power_white>; + }; + }; + + power-state-s3 { + chipset-state = "POWER_S3"; + + /* white LED - on 1 sec, off 1 sec */ + color-0 { + led-color = <&color_power_white>; + period-ms = <1000>; + }; + + color-1 { + led-color = <&color_power_off>; + period-ms = <1000>; + }; + }; + + power-state-s5 { + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_power_off>; + }; + }; + }; +}; diff --git a/zephyr/projects/herobrine/led_policy_herobrine.dts b/zephyr/projects/herobrine/led_policy_herobrine.dts index 7e296e6a3a..13e5306deb 100644 --- a/zephyr/projects/herobrine/led_policy_herobrine.dts +++ b/zephyr/projects/herobrine/led_policy_herobrine.dts @@ -2,7 +2,7 @@ / { led-colors { - compatible = "cros-ec,led-colors"; + compatible = "cros-ec,led-policy"; power-state-charge-left { charge-state = "PWR_STATE_CHARGE"; @@ -133,10 +133,9 @@ }; }; - power-state-idle-forced-left { - charge-state = "PWR_STATE_IDLE"; + power-state-forced-idle-left { + charge-state = "PWR_STATE_FORCED_IDLE"; charge-port = <1>; /* Left port */ - extra-flag = "LED_CHFLAG_FORCE_IDLE"; /* Turn off the right LED */ color-0 { @@ -153,10 +152,9 @@ }; }; - power-state-idle-forced-right { - charge-state = "PWR_STATE_IDLE"; + power-state-forced-idle-right { + charge-state = "PWR_STATE_FORCED_IDLE"; charge-port = <0>; /* Right port */ - extra-flag = "LED_CHFLAG_FORCE_IDLE"; /* Turn off the left LED */ color-0 { @@ -173,10 +171,9 @@ }; }; - power-state-idle-default-left { + power-state-idle-left { charge-state = "PWR_STATE_IDLE"; charge-port = <1>; /* Left port */ - extra-flag = "LED_CHFLAG_DEFAULT"; /* Turn off the right LED */ color-0 { @@ -188,10 +185,9 @@ }; }; - power-state-idle-default-right { + power-state-idle-right { charge-state = "PWR_STATE_IDLE"; charge-port = <0>; /* Right port */ - extra-flag = "LED_CHFLAG_DEFAULT"; /* Turn off the left LED */ color-0 { diff --git a/zephyr/projects/herobrine/led_policy_hoglin.dts b/zephyr/projects/herobrine/led_policy_hoglin.dts index 80ee9f7829..043dfbcaa5 100644 --- a/zephyr/projects/herobrine/led_policy_hoglin.dts +++ b/zephyr/projects/herobrine/led_policy_hoglin.dts @@ -1,11 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { led-colors { - compatible = "cros-ec,led-colors"; + compatible = "cros-ec,led-policy"; power-state-charge { charge-state = "PWR_STATE_CHARGE"; @@ -70,9 +70,8 @@ }; }; - power-state-idle-forced { - charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_FORCE_IDLE"; + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; /* Red 2 sec, Blue 2 sec */ color-0 { @@ -87,7 +86,6 @@ power-state-idle-default { charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_DEFAULT"; color-0 { led-color = <&color_red>; diff --git a/zephyr/projects/herobrine/led_policy_villager.dts b/zephyr/projects/herobrine/led_policy_villager.dts index 46b0193e61..f8996a3f4b 100644 --- a/zephyr/projects/herobrine/led_policy_villager.dts +++ b/zephyr/projects/herobrine/led_policy_villager.dts @@ -1,11 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { led-colors { - compatible = "cros-ec,led-colors"; + compatible = "cros-ec,led-policy"; power-state-charge { charge-state = "PWR_STATE_CHARGE"; @@ -70,9 +70,8 @@ }; }; - power-state-idle-forced { - charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_FORCE_IDLE"; + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; /* Blue 2 sec, Amber 2 sec */ color-0 { @@ -85,9 +84,8 @@ }; }; - power-state-idle-default { + power-state-idle { charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_DEFAULT"; color-0 { led-color = <&color_blue>; diff --git a/zephyr/projects/herobrine/motionsense.dts b/zephyr/projects/herobrine/motionsense.dts index 1d36fcbf47..1955f43284 100644 --- a/zephyr/projects/herobrine/motionsense.dts +++ b/zephyr/projects/herobrine/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,11 +27,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; mutex_bmi260: bmi260-mutex { - label = "BMI260_MUTEX"; }; }; @@ -40,8 +38,8 @@ compatible = "cros-ec,motionsense-rotation-ref"; lid_rot_ref: lid-rotation-ref { mat33 = <0 1 0 - (-1) 0 0 - 0 0 1>; + 1 0 0 + 0 0 (-1)>; }; base_rot_ref: base-rotation-ref { @@ -134,7 +132,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -142,7 +140,6 @@ compatible = "cros-ec,bma255"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -155,11 +152,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -169,7 +164,6 @@ compatible = "cros-ec,bmi260-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; @@ -180,11 +174,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -194,7 +186,6 @@ compatible = "cros-ec,bmi260-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; @@ -207,7 +198,6 @@ compatible = "cros-ec,tcs3400-clear"; status = "okay"; - label = "Clear Light"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_CAMERA"; port = <&i2c_sensor>; @@ -219,7 +209,6 @@ "cros-ec,motionsense-sensor-config"; ec-s0 { /* Run ALS sensor in S0 */ - label = "SENSOR_CONFIG_EC_S0"; odr = <1000>; }; }; @@ -229,7 +218,6 @@ compatible = "cros-ec,tcs3400-rgb"; status = "okay"; - label = "RGB Light"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_CAMERA"; default-range = <0x10000>; /* scale = 1x, uscale = 0 */ diff --git a/zephyr/projects/herobrine/motionsense_evoker.dts b/zephyr/projects/herobrine/motionsense_evoker.dts new file mode 100644 index 0000000000..aa7646e0b3 --- /dev/null +++ b/zephyr/projects/herobrine/motionsense_evoker.dts @@ -0,0 +1,148 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * motion sense's <>_INT_EVENT is handled + * by alias. Using the alias, each driver creates + * its own <>_INT_EVENT. + */ + bmi260-int = &base_accel; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + lid_mutex: lid-mutex { + }; + + mutex_bmi260: bmi260-mutex { + }; + }; + + /* Rotation matrix used by drivers. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <(-1) 0 0 + 0 (-1) 0 + 0 0 1>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + bma4xx_data: bma4xx-drv-data { + compatible = "cros-ec,drvdata-bma4xx"; + status = "okay"; + }; + + bmi260_data: bmi260-drv-data { + compatible = "cros-ec,drvdata-bmi260"; + status = "okay"; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,bma4xx"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&bma4xx_data>; + i2c-spi-addr-flags = "BMA4_I2C_ADDR_PRIMARY"; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,bmi260-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&mutex_bmi260>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&bmi260_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base-gyro { + compatible = "cros-ec,bmi260-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&mutex_bmi260>; + port = <&i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&bmi260_data>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_accel_gyro>; + /* list of sensors in force mode */ + accel-force-mode-sensors = <&lid_accel>; + }; +}; diff --git a/zephyr/projects/herobrine/motionsense_hoglin.dts b/zephyr/projects/herobrine/motionsense_hoglin.dts index 3f67347e10..c3935178ff 100644 --- a/zephyr/projects/herobrine/motionsense_hoglin.dts +++ b/zephyr/projects/herobrine/motionsense_hoglin.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,11 +27,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; mutex_bmi260: bmi260-mutex { - label = "BMI260_MUTEX"; }; }; @@ -134,7 +132,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -142,7 +140,6 @@ compatible = "cros-ec,bma4xx"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -155,11 +152,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -169,7 +164,6 @@ compatible = "cros-ec,bmi260-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; @@ -180,11 +174,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -194,7 +186,6 @@ compatible = "cros-ec,bmi260-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; @@ -207,7 +198,6 @@ compatible = "cros-ec,tcs3400-clear"; status = "okay"; - label = "Clear Light"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_CAMERA"; port = <&i2c_sensor>; @@ -219,7 +209,6 @@ "cros-ec,motionsense-sensor-config"; ec-s0 { /* Run ALS sensor in S0 */ - label = "SENSOR_CONFIG_EC_S0"; odr = <1000>; }; }; @@ -229,7 +218,6 @@ compatible = "cros-ec,tcs3400-rgb"; status = "okay"; - label = "RGB Light"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_CAMERA"; default-range = <0x10000>; /* scale = 1x, uscale = 0 */ diff --git a/zephyr/projects/herobrine/motionsense_villager.dts b/zephyr/projects/herobrine/motionsense_villager.dts index 92cc051a8e..31d00e04a5 100644 --- a/zephyr/projects/herobrine/motionsense_villager.dts +++ b/zephyr/projects/herobrine/motionsense_villager.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -26,11 +26,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; mutex_bmi260: bmi260-mutex { - label = "BMI260_MUTEX"; }; }; @@ -73,7 +71,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -81,7 +79,6 @@ compatible = "cros-ec,kx022"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -94,11 +91,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -108,7 +103,6 @@ compatible = "cros-ec,bmi260-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; @@ -119,11 +113,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -133,7 +125,6 @@ compatible = "cros-ec,bmi260-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; diff --git a/zephyr/projects/herobrine/prj.conf b/zephyr/projects/herobrine/prj.conf index e16d5c7899..2b13023f2d 100644 --- a/zephyr/projects/herobrine/prj.conf +++ b/zephyr/projects/herobrine/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -26,9 +26,6 @@ CONFIG_SHELL_HISTORY=y CONFIG_SHELL_TAB=y CONFIG_SHELL_TAB_AUTOCOMPLETION=y -# Miscellaneous configs -CONFIG_PLATFORM_EC_HIBERNATE_PSL=y - # LED CONFIG_PLATFORM_EC_LED_COMMON=n CONFIG_PLATFORM_EC_LED_DT=y @@ -69,7 +66,6 @@ CONFIG_PLATFORM_EC_CMD_BUTTON=y CONFIG_CROS_KB_RAW_NPCX=y # ADC -CONFIG_PLATFORM_EC_ADC=y CONFIG_ADC=y CONFIG_ADC_SHELL=n @@ -114,7 +110,10 @@ CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y +CONFIG_PLATFORM_EC_USB_PD_DPS=y CONFIG_PLATFORM_EC_USB_PD_REV30=y +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805=y CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n diff --git a/zephyr/projects/herobrine/prj_evoker.conf b/zephyr/projects/herobrine/prj_evoker.conf new file mode 100644 index 0000000000..6a57333bfd --- /dev/null +++ b/zephyr/projects/herobrine/prj_evoker.conf @@ -0,0 +1,12 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Evoker board-specific Kconfig settings. +CONFIG_BOARD_EVOKER=y + +# Disable type-c port sourcing 3A +CONFIG_PLATFORM_EC_CONFIG_USB_PD_3A_PORTS=0 + +CONFIG_PLATFORM_EC_ACCEL_BMA255=n +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y diff --git a/zephyr/projects/herobrine/prj_herobrine.conf b/zephyr/projects/herobrine/prj_herobrine.conf index 3c7eddbae6..bf39f65692 100644 --- a/zephyr/projects/herobrine/prj_herobrine.conf +++ b/zephyr/projects/herobrine/prj_herobrine.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/herobrine/prj_hoglin.conf b/zephyr/projects/herobrine/prj_hoglin.conf index 370e942f45..c6e20937c0 100644 --- a/zephyr/projects/herobrine/prj_hoglin.conf +++ b/zephyr/projects/herobrine/prj_hoglin.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/herobrine/prj_villager.conf b/zephyr/projects/herobrine/prj_villager.conf index 34c366a36f..35eebe6d99 100644 --- a/zephyr/projects/herobrine/prj_villager.conf +++ b/zephyr/projects/herobrine/prj_villager.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/herobrine/prj_zoglin.conf b/zephyr/projects/herobrine/prj_zoglin.conf new file mode 100644 index 0000000000..7f96cf6c79 --- /dev/null +++ b/zephyr/projects/herobrine/prj_zoglin.conf @@ -0,0 +1,15 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zoglin reference-board-specific Kconfig settings. +CONFIG_BOARD_ZOGLIN=y +CONFIG_PLATFORM_EC_ACCEL_BMA255=n +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y + +# Sensors +CONFIG_PLATFORM_EC_ALS=y + +# Sensor Drivers +CONFIG_PLATFORM_EC_ALS_TCS3400=y +CONFIG_PLATFORM_EC_ALS_TCS3400_EMULATED_IRQ_EVENT=y diff --git a/zephyr/projects/herobrine/src/board_chipset.c b/zephyr/projects/herobrine/src/board_chipset.c new file mode 100644 index 0000000000..6a58eee99e --- /dev/null +++ b/zephyr/projects/herobrine/src/board_chipset.c @@ -0,0 +1,83 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Herobrine chipset-specific configuration */ + +#include "charger.h" +#include "common.h" +#include "console.h" +#include "battery.h" +#include "gpio.h" +#include "hooks.h" +#include "timer.h" +#include "usb_pd.h" + +#include "board_chipset.h" + +#define CPRINTS(format, args...) cprints(CC_HOOK, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_HOOK, format, ##args) + +/* + * A window of PD negotiation. It starts from the Type-C state reaching + * Attached.SNK, and ends when the PD contract is created. The VBUS may be + * raised anytime in this window. + * + * The current implementation is the worst case scenario: every message the PD + * negotiation is received at the last moment before timeout. More extra time + * is added to compensate the delay internally, like the decision of the DPM. + * + * TODO(waihong): Cancel this timer when the PD contract is negotiated. + */ +#define PD_READY_TIMEOUT \ + (PD_T_SINK_WAIT_CAP + PD_T_SENDER_RESPONSE + PD_T_SINK_TRANSITION + \ + 20 * MSEC) + +#define PD_READY_POLL_DELAY (10 * MSEC) + +static timestamp_t pd_ready_timeout; + +static bool pp5000_inited; + +__test_only void reset_pp5000_inited(void) +{ + pp5000_inited = false; +} + +/* Called on USB PD connected */ +static void board_usb_pd_connect(void) +{ + int soc = -1; + + /* First boot, battery unattached or low SOC */ + if (!pp5000_inited && + ((battery_state_of_charge_abs(&soc) != EC_SUCCESS || + soc < charger_get_min_bat_pct_for_power_on()))) { + pd_ready_timeout = get_time(); + pd_ready_timeout.val += PD_READY_TIMEOUT; + } +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_pd_connect, HOOK_PRIO_DEFAULT); + +static void wait_pd_ready(void) +{ + CPRINTS("Wait PD negotiated VBUS transition %u", + pd_ready_timeout.le.lo); + while (pd_ready_timeout.val && get_time().val < pd_ready_timeout.val) + usleep(PD_READY_POLL_DELAY); +} + +/* Called on AP S5 -> S3 transition */ +static void board_chipset_pre_init(void) +{ + if (!pp5000_inited) { + if (pd_ready_timeout.val) { + wait_pd_ready(); + } + CPRINTS("Enable 5V rail"); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pp5000_s5), 1); + pp5000_inited = true; + } +} +DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, board_chipset_pre_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c b/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c index 1b5c1e3d92..00acd509f4 100644 --- a/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c +++ b/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,7 +12,7 @@ LOG_MODULE_REGISTER(alt_dev_replacement); #define BOARD_VERSION_UNKNOWN 0xffffffff /* Check board version to decide which ppc is used. */ -static bool board_has_syv_ppc(void) +static bool board_has_alt_ppc(void) { static uint32_t board_version = BOARD_VERSION_UNKNOWN; @@ -29,7 +29,8 @@ static bool board_has_syv_ppc(void) static void check_alternate_devices(void) { /* Configure the PPC driver */ - if (board_has_syv_ppc()) - PPC_ENABLE_ALTERNATE(ppc_port0_syv); + if (board_has_alt_ppc()) + /* Arg is the USB port number */ + PPC_ENABLE_ALTERNATE(0); } DECLARE_HOOK(HOOK_INIT, check_alternate_devices, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/herobrine/src/i2c.c b/zephyr/projects/herobrine/src/i2c.c index 3f9abe4674..88b722c42d 100644 --- a/zephyr/projects/herobrine/src/i2c.c +++ b/zephyr/projects/herobrine/src/i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/src/usb_pd_policy.c b/zephyr/projects/herobrine/src/usb_pd_policy.c index a2e353d7d4..adc517d3cb 100644 --- a/zephyr/projects/herobrine/src/usb_pd_policy.c +++ b/zephyr/projects/herobrine/src/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,8 +13,8 @@ #include "usbc_ppc.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) int pd_check_vconn_swap(int port) { @@ -94,11 +94,11 @@ __override int svdm_dp_config(int port, uint32_t *payload) * (3) plug a monitor to the port-1 dongle. */ - payload[0] = VDO(USB_SID_DISPLAYPORT, 1, - CMD_DP_CONFIG | VDO_OPOS(opos)); - payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ - 1, /* DPv1.3 signaling */ - 2); /* UFP connected */ + payload[0] = + VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ return 2; }; @@ -176,8 +176,7 @@ __override int svdm_dp_attention(int port, uint32_t *payload) * because of the board USB-C topology (limited to 2 * lanes DP). */ - usb_mux_set(port, USB_PD_MUX_DOCK, - USB_SWITCH_CONNECT, + usb_mux_set(port, USB_PD_MUX_DOCK, USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); } else { /* Disconnect the DP port selection mux. */ @@ -189,13 +188,11 @@ __override int svdm_dp_attention(int port, uint32_t *payload) ppc_set_sbu(port, 0); /* Disconnect the DP but keep the USB SS lines in TCPC chip. */ - usb_mux_set(port, USB_PD_MUX_USB_ENABLED, - USB_SWITCH_CONNECT, + usb_mux_set(port, USB_PD_MUX_USB_ENABLED, USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); } - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && (irq || lvl)) /* * Wake up the AP. IRQ or level high indicates a DP sink is now * present. @@ -222,8 +219,8 @@ __override int svdm_dp_attention(int port, uint32_t *payload) CPRINTS("C%d: Recv IRQ. HPD->1", port); /* Set the minimum time delay (2ms) for the next HPD IRQ */ - svdm_hpd_deadline[port] = get_time().val + - HPD_USTREAM_DEBOUNCE_LVL; + svdm_hpd_deadline[port] = + get_time().val + HPD_USTREAM_DEBOUNCE_LVL; } else if (irq & !lvl) { CPRINTF("ERR:HPD:IRQ&LOW\n"); return 0; @@ -231,8 +228,8 @@ __override int svdm_dp_attention(int port, uint32_t *payload) CPRINTS("C%d: Recv lvl. HPD->%d", port, lvl); gpio_pin_set_dt(hpd, lvl); /* Set the minimum time delay (2ms) for the next HPD IRQ */ - svdm_hpd_deadline[port] = get_time().val + - HPD_USTREAM_DEBOUNCE_LVL; + svdm_hpd_deadline[port] = + get_time().val + HPD_USTREAM_DEBOUNCE_LVL; } return 1; @@ -248,10 +245,10 @@ __override void svdm_exit_dp_mode(int port) /* Signal AP for the HPD low event */ usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); CPRINTS("C%d: DP exit. HPD->0", port); - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_dp_hot_plug_det_r), 0); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_hot_plug_det_r), + 0); } } #endif /* CONFIG_USB_PD_ALT_MODE_DFP */ diff --git a/zephyr/projects/herobrine/src/usbc_config.c b/zephyr/projects/herobrine/src/usbc_config.c index 41319a75e9..f040ab12cb 100644 --- a/zephyr/projects/herobrine/src/usbc_config.c +++ b/zephyr/projects/herobrine/src/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -28,9 +28,8 @@ #include "usbc_ppc.h" #include "usbc/ppc.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) - +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) /* GPIO Interrupt Handlers */ void tcpc_alert_event(enum gpio_signal signal) @@ -54,9 +53,9 @@ void tcpc_alert_event(enum gpio_signal signal) static void usba_oc_deferred(void) { /* Use next number after all USB-C ports to indicate the USB-A port */ - board_overcurrent_event(CONFIG_USB_PD_PORT_MAX_COUNT, - !gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_a0_oc_odl))); + board_overcurrent_event( + CONFIG_USB_PD_PORT_MAX_COUNT, + !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_a0_oc_odl))); } DECLARE_DEFERRED(usba_oc_deferred); @@ -148,7 +147,7 @@ void board_tcpc_init(void) */ for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port) usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_POST_I2C); @@ -194,8 +193,7 @@ void board_overcurrent_event(int port, int is_overcurrented) int board_set_active_charge_port(int port) { - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; if (!is_real_port && port != CHARGE_PORT_NONE) @@ -223,7 +221,6 @@ int board_set_active_charge_port(int port) return EC_ERROR_INVAL; } - CPRINTS("New charge port: p%d", port); /* @@ -247,23 +244,21 @@ int board_set_active_charge_port(int port) return EC_SUCCESS; } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { /* * Ignore lower charge ceiling on PD transition if our battery is * critical, as we may brownout. */ - if (supplier == CHARGE_SUPPLIER_PD && - charge_ma < 1500 && + if (supplier == CHARGE_SUPPLIER_PD && charge_ma < 1500 && charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) { CPRINTS("Using max ilim %d", max_ma); charge_ma = max_ma; } - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); } uint16_t tcpc_get_alert_status(void) @@ -272,11 +267,11 @@ uint16_t tcpc_get_alert_status(void) if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_int_odl))) if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l))) + GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l))) status |= PD_STATUS_TCPC_ALERT_0; if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_int_odl))) if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l))) + GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l))) status |= PD_STATUS_TCPC_ALERT_1; return status; diff --git a/zephyr/projects/herobrine/switchcap.dts b/zephyr/projects/herobrine/switchcap.dts index b246274a7a..ed200a0c6f 100644 --- a/zephyr/projects/herobrine/switchcap.dts +++ b/zephyr/projects/herobrine/switchcap.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/herobrine/switchcap_hoglin.dts b/zephyr/projects/herobrine/switchcap_hoglin.dts index 37e1a27e2c..7c083667a1 100644 --- a/zephyr/projects/herobrine/switchcap_hoglin.dts +++ b/zephyr/projects/herobrine/switchcap_hoglin.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,5 +7,6 @@ switchcap { compatible = "switchcap-gpio"; enable-pin = <&gpio_switchcap_on>; + poff-delay-ms = <550>; }; }; diff --git a/zephyr/projects/herobrine/usbc_evoker.dts b/zephyr/projects/herobrine/usbc_evoker.dts new file mode 100644 index 0000000000..20bd48382f --- /dev/null +++ b/zephyr/projects/herobrine/usbc_evoker.dts @@ -0,0 +1,42 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_port0>; + ppc = <&ppc_port0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_0>; + }; + }; + usb_mux_0: usb-mux-0 { + compatible = "parade,usbc-mux-ps8xxx"; + }; + + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_1>; + }; + }; + usb_mux_1: usb-mux-1 { + compatible = "parade,usbc-mux-ps8xxx"; + }; + }; +}; diff --git a/zephyr/projects/herobrine/usbc_herobrine.dts b/zephyr/projects/herobrine/usbc_herobrine.dts index 153dc44f89..675286ecd7 100644 --- a/zephyr/projects/herobrine/usbc_herobrine.dts +++ b/zephyr/projects/herobrine/usbc_herobrine.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,31 +11,15 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c0_bc12>; - port = <&i2c_power>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + bc12 = <&bc12_port0>; + ppc = <&ppc_port0>; + ppc_alt = <&ppc_port0_alt>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_0>; }; - ppc_port0: ppc { - compatible = "ti,sn5s330"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "SN5S330_ADDR0_FLAGS"; - }; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_charger>; - }; - usb-muxes = <&usb_mux_0>; }; usb_mux_0: usb-mux-0 { compatible = "parade,usbc-mux-ps8xxx"; @@ -44,39 +28,16 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c1_bc12>; - port = <&i2c_eeprom>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; - ppc { - compatible = "ti,sn5s330"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "SN5S330_ADDR0_FLAGS"; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_1>; }; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; - usb-muxes = <&usb_mux_1>; }; usb_mux_1: usb-mux-1 { compatible = "parade,usbc-mux-ps8xxx"; }; }; - usbc-alt-chips { - ppc_port0_syv: ppc-port0 { - compatible = "silergy,syv682x"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "SYV682X_ADDR1_FLAGS"; - frs_en_gpio = <&gpio_usb_c0_frs_en>; - alternate-for = <&ppc_port0>; - }; - }; }; diff --git a/zephyr/projects/herobrine/usbc_hoglin.dts b/zephyr/projects/herobrine/usbc_hoglin.dts index 68b262f8ef..20bd48382f 100644 --- a/zephyr/projects/herobrine/usbc_hoglin.dts +++ b/zephyr/projects/herobrine/usbc_hoglin.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,32 +11,14 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c0_bc12>; - port = <&i2c_power>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + bc12 = <&bc12_port0>; + ppc = <&ppc_port0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_0>; }; - ppc_port0: ppc { - compatible = "silergy,syv682x"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "SYV682X_ADDR1_FLAGS"; - frs_en_gpio = <&gpio_usb_c0_frs_en>; - }; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "PS8XXX_I2C_ADDR2_FLAGS"; - }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_charger>; - }; - usb-muxes = <&usb_mux_0>; }; usb_mux_0: usb-mux-0 { compatible = "parade,usbc-mux-ps8xxx"; @@ -45,27 +27,13 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c1_bc12>; - port = <&i2c_eeprom>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_2_FLAGS"; - }; - ppc_port1: ppc { - compatible = "silergy,syv682x"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "SYV682X_ADDR1_FLAGS"; - frs_en_gpio = <&gpio_usb_c1_frs_en>; - }; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "PS8XXX_I2C_ADDR2_FLAGS"; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_1>; }; - usb-muxes = <&usb_mux_1>; }; usb_mux_1: usb-mux-1 { compatible = "parade,usbc-mux-ps8xxx"; diff --git a/zephyr/projects/herobrine/usbc_villager.dts b/zephyr/projects/herobrine/usbc_villager.dts index 90dd88412c..20bd48382f 100644 --- a/zephyr/projects/herobrine/usbc_villager.dts +++ b/zephyr/projects/herobrine/usbc_villager.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,32 +11,14 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c0_bc12>; - port = <&i2c_power>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + bc12 = <&bc12_port0>; + ppc = <&ppc_port0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_0>; }; - ppc { - compatible = "silergy,syv682x"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "SYV682X_ADDR1_FLAGS"; - frs_en_gpio = <&gpio_usb_c0_frs_en>; - }; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_charger>; - }; - usb-muxes = <&usb_mux_0>; }; usb_mux_0: usb-mux-0 { compatible = "parade,usbc-mux-ps8xxx"; @@ -45,27 +27,13 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c1_bc12>; - port = <&i2c_eeprom>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; - ppc { - compatible = "silergy,syv682x"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "SYV682X_ADDR1_FLAGS"; - frs_en_gpio = <&gpio_usb_c1_frs_en>; - }; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; + bc12 = <&bc12_port1>; + ppc = <&ppc_port1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_mux_1>; }; - usb-muxes = <&usb_mux_1>; }; usb_mux_1: usb-mux-1 { compatible = "parade,usbc-mux-ps8xxx"; diff --git a/zephyr/projects/intelrvp/BUILD.py b/zephyr/projects/intelrvp/BUILD.py index 755b6479a6..e6e617ea23 100644 --- a/zephyr/projects/intelrvp/BUILD.py +++ b/zephyr/projects/intelrvp/BUILD.py @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -43,7 +43,6 @@ register_intelrvp_project( chip="npcx9m7f", extra_dts_overlays=[ here / "adlrvp/adlrvp_npcx/adlrvp_npcx.dts", - here / "adlrvp/adlrvp_npcx/cbi_eeprom.dts", here / "adlrvp/adlrvp_npcx/fan.dts", here / "adlrvp/adlrvp_npcx/gpio.dts", here / "adlrvp/adlrvp_npcx/interrupts.dts", @@ -62,17 +61,18 @@ register_intelrvp_project( project_name="mtlrvpp_npcx", chip="npcx9m3f", extra_dts_overlays=[ - here / "adlrvp/adlrvp_npcx/cbi_eeprom.dts", here / "mtlrvp/mtlrvpp_npcx/fan.dts", here / "mtlrvp/mtlrvpp_npcx/gpio.dts", here / "mtlrvp/mtlrvpp_npcx/keyboard.dts", here / "mtlrvp/mtlrvpp_npcx/interrupts.dts", here / "mtlrvp/ioex.dts", here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts", + here / "mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts", here / "adlrvp/adlrvp_npcx/temp_sensor.dts", + here / "mtlrvp/usbc.dts", ], extra_kconfig_files=[ - here / "legacy_ec_pwrseq.conf", + here / "zephyr_ap_pwrseq.conf", here / "mtlrvp/mtlrvpp_npcx/prj.conf", ], ) diff --git a/zephyr/projects/intelrvp/CMakeLists.txt b/zephyr/projects/intelrvp/CMakeLists.txt index f8a76be55d..25b3af3931 100644 --- a/zephyr/projects/intelrvp/CMakeLists.txt +++ b/zephyr/projects/intelrvp/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(intelrvp) cros_ec_library_include_directories(include) @@ -26,4 +26,7 @@ endif() if(DEFINED CONFIG_BOARD_MTLRVP_NPCX) add_subdirectory(mtlrvp) zephyr_library_sources("src/intelrvp.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usb_pd_policy_mecc_1_1.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/chg_usb_pd_mecc_1_1.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/chg_usb_pd.c") endif() diff --git a/zephyr/projects/intelrvp/Kconfig b/zephyr/projects/intelrvp/Kconfig index 1c8ec22073..c51c54847b 100644 --- a/zephyr/projects/intelrvp/Kconfig +++ b/zephyr/projects/intelrvp/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt index bd961ff89d..71dee29552 100644 --- a/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt +++ b/zephyr/projects/intelrvp/adlrvp/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts index 418b68a8d7..79723beabd 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/adlrvp_npcx.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,37 +20,28 @@ named-i2c-ports { compatible = "named-i2c-ports"; - battery { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_BATTERY"; - }; i2c_charger: charger { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_CHARGER"; - }; - eeprom { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_EEPROM"; - }; - port80 { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_PORT80"; + enum-names = "I2C_PORT_BATTERY", + "I2C_PORT_CHARGER", + "I2C_PORT_EEPROM", + "I2C_PORT_PORT80"; }; typec_0: typec-0 { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_TYPEC_0"; + enum-names = "I2C_PORT_TYPEC_0"; }; typec_1: typec-1 { i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_TYPEC_1"; + enum-names = "I2C_PORT_TYPEC_1"; }; typec_2: typec-2 { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_TYPEC_2"; + enum-names = "I2C_PORT_TYPEC_2"; }; typec_3: typec-3 { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_TYPEC_3"; + enum-names = "I2C_PORT_TYPEC_3"; }; }; @@ -58,22 +49,18 @@ compatible = "named-adc-channels"; adc_ambient: ambient { - label = "ADC_TEMP_SNS_AMBIENT"; enum-name = "ADC_TEMP_SENSOR_1"; io-channels = <&adc0 3>; }; adc_ddr: ddr { - label = "ADC_TEMP_SNS_DDR"; enum-name = "ADC_TEMP_SENSOR_2"; io-channels = <&adc0 4>; }; adc_skin: skin { - label = "ADC_TEMP_SNS_SKIN"; enum-name = "ADC_TEMP_SENSOR_3"; io-channels = <&adc0 2>; }; adc_vr: vr { - label = "ADC_TEMP_SNS_VR"; enum-name = "ADC_TEMP_SENSOR_4"; io-channels = <&adc0 1>; }; @@ -130,6 +117,21 @@ reg = <0x38>; label = "MAX695X_SEVEN_SEG_DISPLAY"; }; + + charger: isl9241@9 { + compatible = "intersil,isl9241"; + status = "okay"; + reg = <0x9>; + }; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; }; &i2c_ctrl7 { @@ -142,6 +144,25 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; pinctrl-names = "default"; + + tcpc_port0: fusb302@22 { + compatible = "fairchild,fusb302"; + reg = <0x22>; + }; + + usb_c0_soc_side_bb_retimer: jhl8040r-c0-soc-side@54 { + compatible = "intel,jhl8040r"; + reg = <0x54>; + reset-pin = <&usb_c0_bb_retimer_rst>; + ls-en-pin = <&usb_c0_bb_retimer_ls_en>; + }; + + usb_c0_bb_retimer: jhl8040r-c0@56 { + compatible = "intel,jhl8040r"; + reg = <0x56>; + reset-pin = <&usb_c0_bb_retimer_rst>; + ls-en-pin = <&usb_c0_bb_retimer_ls_en>; + }; }; &i2c_ctrl0 { @@ -154,6 +175,25 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; pinctrl-names = "default"; + + tcpc_port1: fusb302@22 { + compatible = "fairchild,fusb302"; + reg = <0x22>; + }; + + usb_c1_soc_side_bb_retimer: jhl8040r-c1-soc-side@55 { + compatible = "intel,jhl8040r"; + reg = <0x55>; + reset-pin = <&usb_c1_bb_retimer_rst>; + ls-en-pin = <&usb_c1_bb_retimer_ls_en>; + }; + + usb_c1_bb_retimer: jhl8040r-c1@57 { + compatible = "intel,jhl8040r"; + reg = <0x57>; + reset-pin = <&usb_c1_bb_retimer_rst>; + ls-en-pin = <&usb_c1_bb_retimer_ls_en>; + }; }; &i2c_ctrl2 { @@ -166,6 +206,18 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; pinctrl-names = "default"; + + tcpc_port2: fusb302@22 { + compatible = "fairchild,fusb302"; + reg = <0x22>; + }; + + usb_c2_bb_retimer: jhl8040r-c2@58 { + compatible = "intel,jhl8040r"; + reg = <0x58>; + reset-pin = <&usb_c2_bb_retimer_rst>; + ls-en-pin = <&usb_c2_bb_retimer_ls_en>; + }; }; &i2c_ctrl1 { @@ -178,6 +230,18 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; pinctrl-names = "default"; + + tcpc_port3: fusb302@22 { + compatible = "fairchild,fusb302"; + reg = <0x22>; + }; + + usb_c3_bb_retimer: jhl8040r-c3@59 { + compatible = "intel,jhl8040r"; + reg = <0x59>; + reset-pin = <&usb_c3_bb_retimer_rst>; + ls-en-pin = <&usb_c3_bb_retimer_ls_en>; + }; }; &i2c_ctrl3 { diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/cbi_eeprom.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/cbi_eeprom.dts deleted file mode 100644 index efded14c3e..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/cbi_eeprom.dts +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -&i2c7_0 { - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - label = "EEPROM_CBI"; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts index 23f72dde94..8babe53903 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm3 0 PWM_KHZ(30) PWM_POLARITY_NORMAL>; - pwm-frequency = <30000>; rpm_min = <3000>; rpm_start = <3000>; rpm_max = <10000>; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts index 7e1cb9c704..1d38fc877c 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -124,6 +124,7 @@ ec-ds3 { gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; enum-name = "GPIO_EN_PP3300_A"; + alias = "GPIO_TEMP_SENSOR_POWER"; }; pch-pwrok-ec { gpios = <&gpioa 0 GPIO_INPUT>; @@ -319,11 +320,9 @@ }; usb-c2-usb-mux-cntrl-1 { gpios = <&ioex_c2_port 4 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_USB_MUX_CNTRL_1"; }; usb-c2-usb-mux-cntrl-0 { gpios = <&ioex_c2_port 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C2_USB_MUX_CNTRL_0"; }; usb_c3_bb_retimer_rst: usb-c3-bb-retimer-rst { gpios = <&ioex_c3_port 0 GPIO_OUTPUT_LOW>; @@ -337,5 +336,9 @@ gpios = <&ioex_c3_port 8 GPIO_OUTPUT_HIGH>; enum-name = "IOEX_USB_C2_C3_OC"; }; + /* unimplemented GPIOs */ + en-pp5000 { + enum-name = "GPIO_EN_PP5000"; + }; }; }; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts index e0992ef3b3..d7bb40fad2 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts index e735234128..81d6e82f48 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf index 32919ea399..2c98fd9330 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts index 50a08a300e..eb1576dbff 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/pwm_leds.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,10 +7,10 @@ pwmleds { compatible = "pwm-leds"; pwm_led0: pwm_led_0 { - pwms = <&pwm4 0 0 PWM_POLARITY_INVERTED>; + pwms = <&pwm4 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; }; pwm_led1: pwm_led_1 { - pwms = <&pwm5 0 0 PWM_POLARITY_INVERTED>; + pwms = <&pwm5 0 PWM_HZ(4800) PWM_POLARITY_INVERTED>; }; }; @@ -18,7 +18,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0 &pwm_led1>; - frequency = <4800>; color-map-green = <100>; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts index a2fcacc1e1..93ecaa02f6 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/temp_sensor.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,19 +6,36 @@ #include <cros/thermistor/thermistor.dtsi> / { + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V0_22K6_47K_4050B>; + adc = <&adc_ambient>; + }; + temp_ddr: ddr { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V0_22K6_47K_4050B>; + adc = <&adc_ddr>; + }; + temp_skin: skin { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V0_22K6_47K_4050B>; + adc = <&adc_skin>; + }; + temp_vr: vr { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V0_22K6_47K_4050B>; + adc = <&adc_vr>; + }; + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; ambient { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - label = "Ambient"; - enum-name = "TEMP_SENSOR_1"; temp_fan_off = <15>; temp_fan_max = <50>; temp_host_high = <75>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_ambient>; + sensor = <&temp_ambient>; }; /* @@ -30,7 +47,6 @@ * compatible = "cros-ec,temp-sensor-thermistor", * "cros-ec,temp-sensor"; * thermistor = < >; - * label = "Battery"; * enum-name = ""; * temp_fan_off = <15>; * temp_fan_max = <50>; @@ -42,43 +58,28 @@ */ ddr { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - label = "DDR"; - enum-name = "TEMP_SENSOR_2"; temp_fan_off = <15>; temp_fan_max = <50>; temp_host_high = <75>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_ddr>; + sensor = <&temp_ddr>; }; skin { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - label = "Skin"; - enum-name = "TEMP_SENSOR_3"; temp_fan_off = <15>; temp_fan_max = <50>; temp_host_high = <75>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_skin>; + sensor = <&temp_skin>; }; vr { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V0_22K6_47K_4050B>; - label = "VR"; - enum-name = "TEMP_SENSOR_4"; temp_fan_off = <15>; temp_fan_max = <50>; temp_host_high = <75>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_vr>; + sensor = <&temp_vr>; }; }; }; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts index cd7c2b050f..471a1f52e9 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,27 +10,22 @@ usbc_port0: port0@0 { compatible = "named-usbc-port"; reg = <0>; - tcpc { - compatible = "fairchild,fusb302"; - status = "okay"; - port = <&typec_0>; - i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb_mux_chain_0: usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c0_bb_retimer + &virtual_mux_c0>; }; - chg { - compatible = "intersil,isl9241"; - status = "okay"; - port = <&i2c_charger>; + usb_mux_alt_chain_0: usb-mux-alt-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&usb_c0_bb_retimer + &usb_c0_soc_side_bb_retimer + &virtual_mux_c0>; }; - usb-muxes = <&usb_c0_bb_retimer &virtual_mux_c0>; }; port0-muxes { - usb_c0_bb_retimer: jhl8040r-c0 { - compatible = "intel,jhl8040r"; - port = <&typec_0>; - i2c-addr-flags = <0x56>; - reset-pin = <&usb_c0_bb_retimer_rst>; - ls-en-pin = <&usb_c0_bb_retimer_ls_en>; - }; virtual_mux_c0: virtual-mux-c0 { compatible = "cros-ec,usbc-mux-virtual"; }; @@ -39,22 +34,21 @@ usbc_port1: port1@1 { compatible = "named-usbc-port"; reg = <1>; - tcpc { - compatible = "fairchild,fusb302"; - status = "okay"; - port = <&typec_1>; - i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; + tcpc = <&tcpc_port1>; + usb_mux_chain_1: usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c1_bb_retimer + &virtual_mux_c1>; + }; + usb_mux_alt_chain_1: usb-mux-alt-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&usb_c1_bb_retimer + &usb_c1_soc_side_bb_retimer + &virtual_mux_c1>; }; - usb-muxes = <&usb_c1_bb_retimer &virtual_mux_c1>; }; port1-muxes { - usb_c1_bb_retimer: jhl8040r-c1 { - compatible = "intel,jhl8040r"; - port = <&typec_1>; - i2c-addr-flags = <0x57>; - reset-pin = <&usb_c1_bb_retimer_rst>; - ls-en-pin = <&usb_c1_bb_retimer_ls_en>; - }; virtual_mux_c1: virtual-mux-c1 { compatible = "cros-ec,usbc-mux-virtual"; }; @@ -63,22 +57,14 @@ port2@2 { compatible = "named-usbc-port"; reg = <2>; - tcpc { - compatible = "fairchild,fusb302"; - status = "okay"; - port = <&typec_2>; - i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; + tcpc = <&tcpc_port2>; + usb_mux_chain_2: usb-mux-chain-2 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c2_bb_retimer + &virtual_mux_c2>; }; - usb-muxes = <&usb_c2_bb_retimer &virtual_mux_c2>; }; port2-muxes { - usb_c2_bb_retimer: jhl8040r-c2 { - compatible = "intel,jhl8040r"; - port = <&typec_2>; - i2c-addr-flags = <0x58>; - reset-pin = <&usb_c2_bb_retimer_rst>; - ls-en-pin = <&usb_c2_bb_retimer_ls_en>; - }; virtual_mux_c2: virtual-mux-c2 { compatible = "cros-ec,usbc-mux-virtual"; }; @@ -87,22 +73,14 @@ port3@3 { compatible = "named-usbc-port"; reg = <3>; - tcpc { - compatible = "fairchild,fusb302"; - status = "okay"; - port = <&typec_3>; - i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; + tcpc = <&tcpc_port3>; + usb_mux_chain_3: usb-mux-chain-3 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c3_bb_retimer + &virtual_mux_c3>; }; - usb-muxes = <&usb_c3_bb_retimer &virtual_mux_c3>; }; port3-muxes { - usb_c3_bb_retimer: jhl8040r-c3 { - compatible = "intel,jhl8040r"; - port = <&typec_3>; - i2c-addr-flags = <0x59>; - reset-pin = <&usb_c3_bb_retimer_rst>; - ls-en-pin = <&usb_c3_bb_retimer_ls_en>; - }; virtual_mux_c3: virtual-mux-c3 { compatible = "cros-ec,usbc-mux-virtual"; }; diff --git a/zephyr/projects/intelrvp/adlrvp/battery.dts b/zephyr/projects/intelrvp/adlrvp/battery.dts index 10b43d6baa..1de4111791 100644 --- a/zephyr/projects/intelrvp/adlrvp/battery.dts +++ b/zephyr/projects/intelrvp/adlrvp/battery.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h b/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h index 0061b11110..135fd4ef4f 100644 --- a/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h +++ b/zephyr/projects/intelrvp/adlrvp/include/adlrvp_zephyr.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,27 +10,25 @@ #include "config.h" +#define I2C_ADDR_FUSB302_TCPC_AIC 0x22 +#define I2C_ADDR_SN5S330_TCPC_AIC_PPC 0x40 -#define I2C_ADDR_FUSB302_TCPC_AIC 0x22 -#define I2C_ADDR_SN5S330_TCPC_AIC_PPC 0x40 - -#define I2C_ADDR_PCA9675_TCPC_AIC_IOEX 0x21 - +#define I2C_ADDR_PCA9675_TCPC_AIC_IOEX 0x21 /* SOC side BB retimers (dual retimer config) */ -#define I2C_PORT0_BB_RETIMER_SOC_ADDR 0x54 +#define I2C_PORT0_BB_RETIMER_SOC_ADDR 0x54 #if defined(HAS_TASK_PD_C1) -#define I2C_PORT1_BB_RETIMER_SOC_ADDR 0x55 +#define I2C_PORT1_BB_RETIMER_SOC_ADDR 0x55 #endif -#define ADLM_LP4_RVP1_SKU_BOARD_ID 0x01 -#define ADLM_LP5_RVP2_SKU_BOARD_ID 0x02 -#define ADLM_LP5_RVP3_SKU_BOARD_ID 0x03 -#define ADLN_LP5_ERB_SKU_BOARD_ID 0x06 -#define ADLN_LP5_RVP_SKU_BOARD_ID 0x07 -#define ADLP_DDR5_RVP_SKU_BOARD_ID 0x12 -#define ADLP_LP5_T4_RVP_SKU_BOARD_ID 0x13 -#define ADL_RVP_BOARD_ID(id) ((id) & 0x3F) +#define ADLM_LP4_RVP1_SKU_BOARD_ID 0x01 +#define ADLM_LP5_RVP2_SKU_BOARD_ID 0x02 +#define ADLM_LP5_RVP3_SKU_BOARD_ID 0x03 +#define ADLN_LP5_ERB_SKU_BOARD_ID 0x06 +#define ADLN_LP5_RVP_SKU_BOARD_ID 0x07 +#define ADLP_DDR5_RVP_SKU_BOARD_ID 0x12 +#define ADLP_LP5_T4_RVP_SKU_BOARD_ID 0x13 +#define ADL_RVP_BOARD_ID(id) ((id)&0x3F) #define CONFIG_BATTERY_TYPE_NO_AUTO_DETECT diff --git a/zephyr/projects/intelrvp/adlrvp/ioex.dts b/zephyr/projects/intelrvp/adlrvp/ioex.dts index 93117de943..3e2227dacb 100644 --- a/zephyr/projects/intelrvp/adlrvp/ioex.dts +++ b/zephyr/projects/intelrvp/adlrvp/ioex.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/adlrvp/prj.conf b/zephyr/projects/intelrvp/adlrvp/prj.conf index 357b0bee66..1314277bc8 100644 --- a/zephyr/projects/intelrvp/adlrvp/prj.conf +++ b/zephyr/projects/intelrvp/adlrvp/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -71,4 +71,4 @@ CONFIG_GPIO_PCA95XX=y CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=y # eSPI -CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US=150 +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US=150 diff --git a/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c b/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c index bcb9bba1a8..ce5196c60d 100644 --- a/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c +++ b/zephyr/projects/intelrvp/adlrvp/src/adlrvp.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -29,9 +29,8 @@ #include "usbc_ppc.h" #include "util.h" - -#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ## args) -#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ##args) +#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ##args) /* TCPC AIC GPIO Configuration */ const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = { @@ -96,27 +95,6 @@ struct ppc_config_t ppc_chips[] = { BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); -/* USB Mux Configuration for Soc side BB-Retimers for Dual retimer config */ -static struct usb_mux soc_side_bb_retimer0_usb_mux = { - .usb_port = TYPE_C_PORT_0, - .next_mux = USB_MUX_NEXT_POINTER(DT_NODELABEL(usbc_port0), 0), - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_TYPEC_0, - .i2c_addr_flags = I2C_PORT0_BB_RETIMER_SOC_ADDR, -}; - -#if defined(HAS_TASK_PD_C1) -static struct usb_mux soc_side_bb_retimer1_usb_mux = { - .usb_port = TYPE_C_PORT_1, - .next_mux = USB_MUX_NEXT_POINTER(DT_NODELABEL(usbc_port1), 0), - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_TYPEC_1, - .i2c_addr_flags = I2C_PORT1_BB_RETIMER_SOC_ADDR, -}; -#endif - /* Cache BB retimer power state */ static bool cache_bb_enable[CONFIG_USB_PD_PORT_MAX_COUNT]; @@ -124,8 +102,8 @@ void board_overcurrent_event(int port, int is_overcurrented) { /* Port 0 & 1 and 2 & 3 share same line for over current indication */ #if defined(HAS_TASK_PD_C2) - enum ioex_signal oc_signal = port < TYPE_C_PORT_2 ? - IOEX_USB_C0_C1_OC : IOEX_USB_C2_C3_OC; + enum ioex_signal oc_signal = port < TYPE_C_PORT_2 ? IOEX_USB_C0_C1_OC : + IOEX_USB_C2_C3_OC; #else enum ioex_signal oc_signal = IOEX_USB_C0_C1_OC; #endif @@ -211,11 +189,11 @@ void set_charger_system_voltage(void) * on AC or AC+battery */ if (extpower_is_present() && battery_is_present()) { - bq25710_set_min_system_voltage(CHARGER_SOLO, - battery_get_info()->voltage_min); + bq25710_set_min_system_voltage( + CHARGER_SOLO, battery_get_info()->voltage_min); } else { - bq25710_set_min_system_voltage(CHARGER_SOLO, - battery_get_info()->voltage_max); + bq25710_set_min_system_voltage( + CHARGER_SOLO, battery_get_info()->voltage_max); } break; @@ -224,8 +202,7 @@ void set_charger_system_voltage(void) break; } } -DECLARE_HOOK(HOOK_AC_CHANGE, set_charger_system_voltage, - HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_AC_CHANGE, set_charger_system_voltage, HOOK_PRIO_DEFAULT); static void configure_charger(void) { @@ -246,26 +223,29 @@ static void configure_charger(void) static void configure_retimer_usbmux(void) { + struct usb_mux *mux; + switch (ADL_RVP_BOARD_ID(board_get_version())) { case ADLN_LP5_ERB_SKU_BOARD_ID: case ADLN_LP5_RVP_SKU_BOARD_ID: /* enable TUSB1044RNQR redriver on Port0 */ - usb_muxes[TYPE_C_PORT_0].i2c_addr_flags = - TUSB1064_I2C_ADDR14_FLAGS; - usb_muxes[TYPE_C_PORT_0].driver = - &tusb1064_usb_mux_driver; - usb_muxes[TYPE_C_PORT_0].hpd_update = tusb1044_hpd_update; + mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_0), 0); + mux->i2c_addr_flags = TUSB1064_I2C_ADDR14_FLAGS; + mux->driver = &tusb1064_usb_mux_driver; + mux->hpd_update = tusb1044_hpd_update; #if defined(HAS_TASK_PD_C1) - usb_muxes[TYPE_C_PORT_1].driver = NULL; - usb_muxes[TYPE_C_PORT_1].hpd_update = NULL; + mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_1), 0); + mux->driver = NULL; + mux->hpd_update = NULL; #endif break; case ADLP_LP5_T4_RVP_SKU_BOARD_ID: /* No retimer on Port-2 */ #if defined(HAS_TASK_PD_C2) - usb_muxes[TYPE_C_PORT_2].driver = NULL; + mux = USB_MUX_POINTER(DT_NODELABEL(usb_mux_chain_2), 0); + mux->driver = NULL; #endif break; @@ -275,15 +255,13 @@ static void configure_retimer_usbmux(void) * Change the default usb mux config on runtime to support * dual retimer topology. */ - usb_muxes[TYPE_C_PORT_0].next_mux - = &soc_side_bb_retimer0_usb_mux; + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_alt_chain_0); #if defined(HAS_TASK_PD_C1) - usb_muxes[TYPE_C_PORT_1].next_mux - = &soc_side_bb_retimer1_usb_mux; + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_alt_chain_1); #endif break; - /* Add additional board SKUs */ + /* Add additional board SKUs */ default: break; @@ -357,8 +335,7 @@ __override int board_get_version(void) * This loop retries to ensure rail is settled and read is successful */ for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) { - - rv = gpio_pin_get_dt(&bom_id_config[0]); + rv = gpio_pin_get_dt(&bom_id_config[0]); if (rv >= 0) break; @@ -374,21 +351,21 @@ __override int board_get_version(void) * BOM ID [2] : IOEX[0] * BOM ID [1:0] : IOEX[15:14] */ - bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; + bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1; bom_id |= gpio_pin_get_dt(&bom_id_config[2]); /* * FAB ID [1:0] : IOEX[2:1] + 1 */ - fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; + fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; fab_id |= gpio_pin_get_dt(&fab_id_config[1]); fab_id += 1; /* * BOARD ID[5:0] : IOEX[13:8] */ - board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; + board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4; board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3; board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2; @@ -450,4 +427,4 @@ static int board_pre_task_peripheral_init(const struct device *unused) return 0; } SYS_INIT(board_pre_task_peripheral_init, APPLICATION, - CONFIG_APPLICATION_INIT_PRIORITY); + CONFIG_APPLICATION_INIT_PRIORITY); diff --git a/zephyr/projects/intelrvp/include/gpio_map.h b/zephyr/projects/intelrvp/include/gpio_map.h deleted file mode 100644 index 3263007880..0000000000 --- a/zephyr/projects/intelrvp/include/gpio_map.h +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#define GPIO_EN_PP5000 GPIO_UNIMPLEMENTED -#define GPIO_TEMP_SENSOR_POWER GPIO_EN_PP3300_A - -/* TODO: Implement GPIO_ENTERING_RW in IOEX */ -#ifdef CONFIG_BOARD_MTLRVP_NPCX -#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED -#endif /* CONFIG_BOARD_MTLRVP_NPCK */ - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/intelrvp/include/intel_rvp_board_id.h b/zephyr/projects/intelrvp/include/intel_rvp_board_id.h index a527b19364..7825b272e3 100644 --- a/zephyr/projects/intelrvp/include/intel_rvp_board_id.h +++ b/zephyr/projects/intelrvp/include/intel_rvp_board_id.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/include/intelrvp.h b/zephyr/projects/intelrvp/include/intelrvp.h index ad6d12ae6f..9b6dc98485 100644 --- a/zephyr/projects/intelrvp/include/intelrvp.h +++ b/zephyr/projects/intelrvp/include/intelrvp.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,7 +10,7 @@ #include "stdbool.h" /* RVP ID read retry count */ -#define RVP_VERSION_READ_RETRY_CNT 2 +#define RVP_VERSION_READ_RETRY_CNT 2 #define DC_JACK_MAX_VOLTAGE_MV 19000 diff --git a/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf b/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf index cdcfbc2b13..331afb637d 100644 --- a/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf +++ b/zephyr/projects/intelrvp/legacy_ec_pwrseq.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -9,5 +9,4 @@ CONFIG_PLATFORM_EC_POWERSEQ_INTEL=y CONFIG_PLATFORM_EC_POWERSEQ_RSMRST_DELAY=y CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y CONFIG_PLATFORM_EC_POWERSEQ_S4=y -CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y CONFIG_PLATFORM_EC_THROTTLE_AP=y diff --git a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt b/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt index 75015a1068..c6729af776 100644 --- a/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt +++ b/zephyr/projects/intelrvp/mtlrvp/CMakeLists.txt @@ -1,5 +1,6 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. zephyr_library_sources("src/mtlrvp.c") +zephyr_library_sources("src/board_power.c") diff --git a/zephyr/projects/intelrvp/mtlrvp/ioex.dts b/zephyr/projects/intelrvp/mtlrvp/ioex.dts index bf79b12570..7d2f4b5820 100644 --- a/zephyr/projects/intelrvp/mtlrvp/ioex.dts +++ b/zephyr/projects/intelrvp/mtlrvp/ioex.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ /* IOEX_KBD_GPIO IT8801 */ ioex-kbd-gpio { compatible = "cros,ioex-chip"; - i2c-port = <&battery>; + i2c-port = <&i2c_charger>; i2c-addr = <0x39>; drv = "it8801_ioexpander_drv"; flags = <0x00>; @@ -30,4 +30,42 @@ ngpios = <8>; }; }; + /* IOEX_C2_CCGXXF */ + ioex-c2 { + compatible = "cros,ioex-chip"; + i2c-port = <&typec_aic2>; + i2c-addr = <0x0B>; + drv = "ccgxxf_ioexpander_drv"; + flags = <0x00>; + #address-cells = <1>; + #size-cells = <0>; + ioex_c2_port0: ioex-c2-port@0 { + compatible = "cros,ioex-port"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + ioex_c2_port1: ioex-c2-port@1 { + compatible = "cros,ioex-port"; + reg = <1>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + ioex_c2_port2: ioex-c2-port@2 { + compatible = "cros,ioex-port"; + reg = <2>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + ioex_c2_port3: ioex-c2-port@3 { + compatible = "cros,ioex-port"; + reg = <3>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + }; + }; }; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts index 99c2cf10d0..cf85dd3413 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm3 0 PWM_KHZ(30) PWM_POLARITY_NORMAL>; - pwm-frequency = <30000>; rpm_min = <3200>; rpm_start = <2200>; rpm_max = <6600>; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts index 49a40c6a54..77b4cf0573 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,7 +20,7 @@ enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; }; rsmrst_pwrgd: rsmrst-pwrgd { - gpios = <&gpio6 6 GPIO_INPUT>; /* 1.8V */ + gpios = <&gpio6 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; enum-name = "GPIO_PG_EC_RSMRST_ODL"; }; pch_slp_s0_n: pch-slp-s0-n-ec { @@ -53,32 +53,33 @@ gpio_wp: wp-l { gpios = <&gpiod 5 GPIO_INPUT>; }; - std-adp-prsnt { + std_adp_prsnt: std-adp-prsnt { gpios = <&gpioc 6 GPIO_INPUT>; + enum-name = "GPIO_DC_JACK_PRESENT"; }; bc_acok: bc-acok-ec { gpios = <&gpio0 2 GPIO_INPUT>; enum-name = "GPIO_AC_PRESENT"; }; - usbc-tcpc-alrt-p0 { + usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 { gpios = <&gpio4 0 GPIO_INPUT>; }; /* NOTE: Netname is USBC_TCPC_PPC_ALRT_P0 */ - usb-c0-c1-tcpc-rst-odl { + usb_c0_c1_tcpc_rst_odl: usb-c0-c1-tcpc-rst-odl { gpios = <&gpiod 0 GPIO_ODR_HIGH>; }; /* NOTE: Netname is USBC_TCPC_ALRT_P1 */ - usbc-tcpc-ppc-alrt-p0 { + usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 { gpios = <&gpiod 1 GPIO_INPUT>; }; - usbc-tcpc-ppc-alrt-p1 { + usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 { gpios = <&gpioe 4 GPIO_INPUT>; }; - usbc-tcpc-alrt-p2 { + usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 { gpios = <&gpio9 1 GPIO_INPUT>; }; /* NOTE: Netname is USBC_TCPC_PPC_ALRT_P3 */ - usbc-tcpc-ppc-alrt-p3 { + usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 { gpios = <&gpiof 3 GPIO_INPUT>; }; gpio_ec_pch_wake_odl: pch-wake-n { @@ -97,11 +98,11 @@ gpios = <&gpio6 0 GPIO_INPUT>; enum-name = "GPIO_CPU_PROCHOT"; }; - sys-rst-odl-ec { + sys_rst_odl: sys-rst-odl-ec { gpios = <&gpioc 5 GPIO_ODR_HIGH>; enum-name = "GPIO_SYS_RESET_L"; }; - pm-rsmrst-r-n { + ec_pch_rsmrst_l: pm-rsmrst-r-n { gpios = <&gpioa 4 GPIO_OUTPUT_LOW>; /* 1.8V */ enum-name = "GPIO_PCH_RSMRST_L"; }; @@ -112,11 +113,12 @@ ec_spi_oe_mecc: ec-spi-oe-mecc-r { gpios = <&gpioa 7 GPIO_OUTPUT_LOW>; /* 1.8V */ }; - ec-ds3-r { + en_pp3300_a: ec-ds3-r { gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; enum-name = "GPIO_EN_PP3300_A"; + alias = "GPIO_TEMP_SENSOR_POWER"; }; - pch-pwrok-ec-r { + ec_pch_pwrok_od: pch-pwrok-ec-r { gpios = <&gpiod 3 GPIO_ODR_LOW>; enum-name = "GPIO_PCH_PWROK"; }; @@ -142,8 +144,9 @@ gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; }; /* NOTE: Netname is USBC_TCPC_ALRT_P3 */ - ccd-mode-odl { + ccd_mode_odl: ccd-mode-odl { gpios = <&gpio9 2 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; }; smb-bs-clk { gpios = <&gpiob 3 GPIO_INPUT>; @@ -158,10 +161,10 @@ gpios = <&gpiob 4 GPIO_INPUT>; }; usbc-tcpc-i2c-clk-aic2 { - gpios = <&gpio9 0 GPIO_INPUT>; + gpios = <&gpio9 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; usbc-tcpc-i2c-data-aic2 { - gpios = <&gpio8 7 GPIO_INPUT>; + gpios = <&gpio8 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; /* Unused 1.8V pins */ i3c-1-sda-r { @@ -189,22 +192,22 @@ gpios = <&gpioa 6 GPIO_INPUT>; }; sml1-clk-mecc { - gpios = <&gpio3 3 GPIO_INPUT>; + gpios = <&gpio3 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; sml1-data-mecc { - gpios = <&gpio3 6 GPIO_INPUT>; + gpios = <&gpio3 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; sml1-alert { - gpios = <&gpioc 7 GPIO_INPUT>; + gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; smb-pch-alrt { gpios = <&gpioa 3 GPIO_INPUT>; }; smb-pch-data { - gpios = <&gpioc 1 GPIO_INPUT>; + gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; smb-pch-clk { - gpios = <&gpioc 2 GPIO_INPUT>; + gpios = <&gpioc 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; /* Unused 3.3V pins */ cpu-cat-err-mecc { @@ -255,7 +258,7 @@ tp-gpiof1 { gpios = <&gpiof 1 GPIO_INPUT>; }; - usbc-tcpc-ppc-alrt-p2 { + usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 { gpios = <&gpiof 2 GPIO_INPUT>; }; tp-gpiof4 { @@ -285,80 +288,79 @@ }; /* USB C IOEX configuration */ - usb-c0-hbr-ls-en { + usb_c0_hb_retimer_ls_en: usb-c0-hbr-ls-en { gpios = <&ioex_c0 2 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C0_HBR_LS_EN"; + no-auto-init; }; - usb-c0-hbr-rst { + usb_c0_hb_retimer_rst: usb-c0-hbr-rst { gpios = <&ioex_c0 3 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C0_HBR_RST"; + no-auto-init; }; - usb-c1-hbr-ls-en { + usb_c1_hb_retimer_ls_en: usb-c1-hbr-ls-en { gpios = <&ioex_c1 2 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C1_HBR_LS_EN"; + no-auto-init; }; - usb-c1-hbr-rst { + usb_c1_hb_retimer_rst: usb-c1-hbr-rst { gpios = <&ioex_c1 3 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_C1_HBR_RST"; + no-auto-init; }; usb-c0-mux-oe-n { gpios = <&ioex_c0 4 GPIO_OUTPUT_LOW>; + no-auto-init; }; usb-c0-mux-sbu-sel-0 { gpios = <&ioex_c0 6 GPIO_OUTPUT_HIGH>; + enum-name = "IOEX_USB_C0_MUX_SBU_SEL_0"; + no-auto-init; }; usb-c0-mux-sbu-sel-1 { gpios = <&ioex_c1 4 GPIO_OUTPUT_LOW>; - }; - }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_io66 /* RSMRET_PWRGD */ - &lvol_io90 /* I2C1_SCL0 */ - &lvol_io87 /* I2C1_SDA0 */ - &lvol_io33 /* SML1_CLK_MECC */ - &lvol_io36 /* SML1_DATA_MECC */ - &lvol_ioc7 /* SML1_ALERT */ - &lvol_ioc1 /* SMB_PCH_DATA */ - &lvol_ioc2 /* SMB_PCH_CLK */ - >; - }; -}; - -&i2c0_0 { - nct38xx_C0:nct38xx_C0@70 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x70>; - label = "NCT38XX_C0"; - - ioex_c0:gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT38XX_C0_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xff>; - pinmux_mask = <0xf7>; - }; - }; - - nct38xx_C1:nct38xx_C1@70 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x70>; - label = "NCT38XX_C1"; - - ioex_c1:gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT38XX_C1_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xff>; - pinmux_mask = <0xf7>; + enum-name = "IOEX_USB_C0_MUX_SBU_SEL_1"; + no-auto-init; + }; + usb-c0-c1-prochot-n { + gpios = <&ioex_c1 6 GPIO_INPUT>; + no-auto-init; + }; + dg-bssb-sbu-sel { + gpios = <&ioex_c2_port1 4 GPIO_INPUT>; + no-auto-init; + }; + usb_c2_hb_retimer_rst: usb-c2-hbr-rst { + gpios = <&ioex_c2_port1 1 (GPIO_ODR_LOW | \ + GPIO_VOLTAGE_1P8)>; + enum-name = "IOEX_USB_C2_HBR_RST"; + no-auto-init; + }; + usb_c2_hb_retimer_ls_en: usb-c2-hbr-ls-en { + gpios = <&ioex_c2_port2 0 (GPIO_ODR_LOW | \ + GPIO_VOLTAGE_1P8)>; + enum-name = "IOEX_USB_C2_HBR_LS_EN"; + no-auto-init; + }; + usb_c3_hb_retimer_rst: usb-c3-hbr-rst { + gpios = <&ioex_c2_port1 3 (GPIO_ODR_LOW | \ + GPIO_VOLTAGE_1P8)>; + enum-name = "IOEX_USB_C3_HBR_RST"; + no-auto-init; + }; + usb_c3_hb_retimer_ls_en: usb-c3-hbr-ls-en { + gpios = <&ioex_c2_port3 3 (GPIO_ODR_LOW | \ + GPIO_VOLTAGE_1P8)>; + enum-name = "IOEX_USB_C3_HBR_LS_EN"; + no-auto-init; + }; + usb-c2-c3-prochot-n { + gpios = <&ioex_c2_port0 0 GPIO_INPUT>; + no-auto-init; + }; + /* unimplemented GPIOs */ + en-pp5000 { + enum-name = "GPIO_EN_PP5000"; }; }; }; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts index 234acb3447..b120f6c05e 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,25 +21,40 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "extpower_interrupt"; }; - int_slp_s0: slp_s0 { - irq-pin = <&pch_slp_s0_n>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_rsmrst_pwrgd: rsmrst_pwrgd { - irq-pin = <&rsmrst_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_all_sys_pwrgd: all_sys_pwrgd { - irq-pin = <&all_sys_pwrgd>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; int_ioex_kbd_intr_n: ioex_kbd_intr_n { irq-pin = <&ioex_kbd_intr_n>; flags = <GPIO_INT_EDGE_FALLING>; handler = "io_expander_it8801_interrupt"; }; + int_usb_c0_c1_tcpc: usb_c0_tcpc { + irq-pin = <&usbc_tcpc_alrt_p0>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_usb_c0_ppc: usb_c0_ppc { + irq-pin = <&usbc_tcpc_ppc_alrt_p0>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c1_ppc: usb_c1_ppc { + irq-pin = <&usbc_tcpc_ppc_alrt_p1>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c2_tcpc: usb_c2_tcpc { + irq-pin = <&usbc_tcpc_alrt_p2>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_usb_c3_tcpc: usb_c3_tcpc { + irq-pin = <&usbc_tcpc_alrt_p3>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_ccd_mode: ccd_mode { + irq-pin = <&ccd_mode_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "board_connect_c0_sbu"; + }; }; }; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts index e735234128..81d6e82f48 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts index 8ff2efd460..86a46e3e7a 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx.dts @@ -1,8 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ + #include <dt-bindings/usb_pd_tcpm.h> + / { chosen { cros,rtc = &mtc; @@ -20,33 +22,21 @@ named-i2c-ports { compatible = "named-i2c-ports"; - battery: battery { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_BATTERY"; - }; - charger { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_CHARGER"; - }; - eeprom { + i2c_charger: charger { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_EEPROM"; - }; - keyboard { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_KB_DISCRETE"; - }; - port80 { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_PORT80"; + enum-names = "I2C_PORT_CHARGER", + "I2C_PORT_BATTERY", + "I2C_PORT_EEPROM", + "I2C_PORT_KB_DISCRETE", + "I2C_PORT_PORT80"; }; typec_aic1: typec-aic1{ i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_TYPEC_AIC_1"; + enum-names = "I2C_PORT_TYPEC_AIC_1"; }; typec_aic2: typec-aic2{ - i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_TYPEC_AIC_2"; + i2c-port = <&i2c1_0>; + enum-names = "I2C_PORT_TYPEC_AIC_2"; }; }; @@ -54,22 +44,18 @@ compatible = "named-adc-channels"; adc_ambient: ambient { - label = "ADC_TEMP_SNS_AMBIENT"; enum-name = "ADC_TEMP_SENSOR_1"; io-channels = <&adc0 3>; }; adc_ddr: ddr { - label = "ADC_TEMP_SNS_DDR"; enum-name = "ADC_TEMP_SENSOR_2"; io-channels = <&adc0 4>; }; adc_skin: skin { - label = "ADC_TEMP_SNS_SKIN"; enum-name = "ADC_TEMP_SENSOR_3"; io-channels = <&adc0 2>; }; adc_vr: vr { - label = "ADC_TEMP_SNS_VR"; enum-name = "ADC_TEMP_SENSOR_4"; io-channels = <&adc0 1>; }; @@ -78,6 +64,7 @@ /* charger */ &i2c7_0 { + label = "I2C_CHARGER"; status = "okay"; clock-frequency = <I2C_BITRATE_STANDARD>; pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; @@ -116,7 +103,6 @@ kb_discrete: ite-it8801@39 { compatible = "ite,it8801"; reg = <0x39>; - label = "KEYBOARD_DISCRETE"; }; seven_seg_display: max695x-seven-seg-display@38 { @@ -124,6 +110,21 @@ reg = <0x38>; label = "MAX695X_SEVEN_SEG_DISPLAY"; }; + + charger: isl9241@9 { + compatible = "intersil,isl9241"; + status = "okay"; + reg = <0x9>; + }; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; }; /* host interface */ @@ -139,10 +140,86 @@ /* typec_aic1 */ &i2c0_0 { + label = "I2C_USB_C0_C1_TCPC"; status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; pinctrl-names = "default"; + + tcpc_port0: nct38xx@73 { + compatible = "nuvoton,nct38xx"; + reg = <0x73>; + gpio-dev = <&nct38xx_c0>; + tcpc-flags = <( + TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>; + }; + + nct38xx_c0: nct38xx_c0@73 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x73>; + label = "NCT38XX_C0"; + + ioex_c0:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT38XX_C0_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xdc>; + pinmux_mask = <0xff>; + }; + }; + + tcpc_port1: nct38xx@77 { + compatible = "nuvoton,nct38xx"; + reg = <0x77>; + gpio-dev = <&nct38xx_c1>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + }; + + nct38xx_c1: nct38xx_c1@77 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x77>; + label = "NCT38XX_C1"; + + ioex_c1:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT38XX_C1_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xdc>; + pinmux_mask = <0xff>; + }; + }; + + nct38xx_alert_0 { + compatible = "nuvoton,nct38xx-gpio-alert"; + irq-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; + nct38xx-dev = <&nct38xx_c0 &nct38xx_c1>; + label = "NCT38XX_ALERT_1"; + }; + + usb_c0_hb_retimer: jhl8040r-c0@56 { + compatible = "intel,jhl8040r"; + reg = <0x56>; + reset-pin = <&usb_c0_hb_retimer_rst>; + ls-en-pin = <&usb_c0_hb_retimer_ls_en>; + }; + + usb_c1_hb_retimer: jhl8040r-c1@57 { + compatible = "intel,jhl8040r"; + reg = <0x57>; + reset-pin = <&usb_c1_hb_retimer_rst>; + ls-en-pin = <&usb_c1_hb_retimer_ls_en>; + }; }; &i2c_ctrl0 { @@ -150,14 +227,39 @@ }; /* typec_aic2 */ -&i2c2_0 { +&i2c1_0 { + label = "I2C_USB_C2_C3_TCPC"; status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; + pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; pinctrl-names = "default"; + + tcpc_port2: ccgxxf@b { + compatible = "cypress,ccgxxf"; + reg = <0xb>; + }; + + tcpc_port3: ccgxxf@1b { + compatible = "cypress,ccgxxf"; + reg = <0x1b>; + }; + + usb_c2_hb_retimer: jhl8040r-c2@58 { + compatible = "intel,jhl8040r"; + reg = <0x58>; + reset-pin = <&usb_c2_hb_retimer_rst>; + ls-en-pin = <&usb_c2_hb_retimer_ls_en>; + }; + + usb_c3_hb_retimer: jhl8040r-c3@59 { + compatible = "intel,jhl8040r"; + reg = <0x59>; + reset-pin = <&usb_c3_hb_retimer_rst>; + ls-en-pin = <&usb_c3_hb_retimer_ls_en>; + }; }; -&i2c_ctrl2 { +&i2c_ctrl1 { status = "okay"; }; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts index 57b41bd9d2..42745d328b 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/mtlrvp_npcx_power_signals.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -98,15 +98,27 @@ * Because the power signals directly reference the GPIOs, * the correspinding named-gpios need to have no-auto-init set. */ -&sys_pwrok_ec { +&en_pp3300_a { no-auto-init; }; &rsmrst_pwrgd { no-auto-init; }; -&all_sys_pwrgd { +&ec_pch_rsmrst_l { no-auto-init; }; &pch_slp_s0_n { no-auto-init; }; +&ec_pch_pwrok_od { + no-auto-init; +}; +&sys_pwrok_ec { + no-auto-init; +}; +&sys_rst_odl { + no-auto-init; +}; +&all_sys_pwrgd { + no-auto-init; +}; diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf index 9a90e99a38..45b101a7ac 100644 --- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf +++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/intelrvp/mtlrvp/prj.conf b/zephyr/projects/intelrvp/mtlrvp/prj.conf index 607bf3a9d1..5781a274c5 100644 --- a/zephyr/projects/intelrvp/mtlrvp/prj.conf +++ b/zephyr/projects/intelrvp/mtlrvp/prj.conf @@ -1,30 +1,40 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # Power Sequencing CONFIG_AP_X86_INTEL_MTL=y +CONFIG_X86_NON_DSX_PWRSEQ_MTL=y CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n -CONFIG_PLATFORM_EC_POWERSEQ_METEORLAKE=y # Battery CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y +CONFIG_PLATFORM_EC_BATTERY_V2=y # CBI CONFIG_EEPROM=y CONFIG_EEPROM_AT24=y CONFIG_EEPROM_SHELL=n CONFIG_PLATFORM_EC_CBI_EEPROM=y +CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK=y +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y -# USB-C and charging -# Below config are disabled to successfully compile battery conf -# This will be enabled in upcoming CL -CONFIG_PLATFORM_EC_USBC=n -CONFIG_PLATFORM_EC_CHARGER=n +# Disable BC1.2 +CONFIG_PLATFORM_EC_USB_CHARGER=n + +# Charger +CONFIG_PLATFORM_EC_CHARGER=y +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=5 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 +CONFIG_PLATFORM_EC_CHARGE_RAMP_HW=n +CONFIG_PLATFORM_EC_CHARGER_ISL9241=y +CONFIG_PLATFORM_EC_DEDICATED_CHARGE_PORT=y # IOEX CONFIG_PLATFORM_EC_IOEX_CROS_DRV=y +CONFIG_PLATFORM_EC_IOEX_CCGXXF=y CONFIG_GPIO_PCA95XX=y CONFIG_GPIO_NCT38XX=y CONFIG_PLATFORM_EC_IOEX_IT8801=y @@ -39,8 +49,31 @@ CONFIG_PLATFORM_EC_THERMISTOR=y CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y # USB CONFIG +CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y +CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y +CONFIG_PLATFORM_EC_USB_MUX_TASK=y +CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y +CONFIG_PLATFORM_EC_USBC_PPC=y +CONFIG_PLATFORM_EC_USB_PD_PPC=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_CCGXXF=y CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y +CONFIG_PLATFORM_EC_USB_PD_TRY_SRC=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_SBU=y +CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=y +CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB=y +CONFIG_PLATFORM_EC_USBC_VCONN=y +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y +CONFIG_PLATFORM_EC_USB_PD_USB4=y +CONFIG_PLATFORM_EC_USB_PD_INT_SHARED=y +CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED=y +CONFIG_PLATFORM_EC_USB_PD_PORT_1_SHARED=y # 7-Segment Display CONFIG_PLATFORM_EC_MAX695X_SEVEN_SEGMENT_DISPLAY=y diff --git a/zephyr/projects/intelrvp/mtlrvp/src/board_power.c b/zephyr/projects/intelrvp/mtlrvp/src/board_power.c index 6e5253ac55..301402bf0f 100644 --- a/zephyr/projects/intelrvp/mtlrvp/src/board_power.c +++ b/zephyr/projects/intelrvp/mtlrvp/src/board_power.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,8 +47,9 @@ void board_ap_power_action_g3_s5(void) /* Turn on the PP3300_PRIM rail. */ power_signal_set(PWR_EN_PP3300_A, 1); - if (!power_wait_signals_timeout(IN_PGOOD_ALL_CORE, - AP_PWRSEQ_DT_VALUE(wait_signal_timeout))) { + if (!power_wait_signals_timeout( + IN_PGOOD_ALL_CORE, + AP_PWRSEQ_DT_VALUE(wait_signal_timeout))) { ap_power_ev_send_callbacks(AP_POWER_PRE_INIT); } } diff --git a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c b/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c index 0839f453b5..9d96a08712 100644 --- a/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c +++ b/zephyr/projects/intelrvp/mtlrvp/src/mtlrvp.c @@ -1,19 +1,172 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "battery.h" +#include "battery_fuel_gauge.h" +#include "charger.h" #include "common.h" #include "console.h" +#include "driver/retimer/bb_retimer_public.h" +#include "driver/tcpm/ccgxxf.h" +#include "driver/tcpm/nct38xx.h" +#include "driver/tcpm/tcpci.h" +#include "extpower.h" #include "gpio.h" +#include "gpio/gpio_int.h" +#include "hooks.h" #include "i2c.h" #include "intelrvp.h" #include "intel_rvp_board_id.h" +#include "ioexpander.h" +#include "isl9241.h" #include "keyboard_raw.h" #include "power/meteorlake.h" +#include "sn5s330.h" +#include "system.h" +#include "task.h" +#include "tusb1064.h" +#include "usb_mux.h" +#include "usbc_ppc.h" +#include "util.h" -#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ## args) -#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_COMMAND, format, ##args) +#define CPRINTS(format, args...) cprints(CC_COMMAND, format, ##args) + +/*******************************************************************/ +/* USB-C Configuration Start */ + +/* PPC */ +#define I2C_ADDR_SN5S330_P0 0x40 +#define I2C_ADDR_SN5S330_P1 0x41 + +/* IOEX ports */ +enum ioex_port { + IOEX_KBD = 0, +#if defined(HAS_TASK_PD_C2) + IOEX_C2_CCGXXF, +#endif + IOEX_COUNT +}; + +/* USB-C ports */ +enum usbc_port { + USBC_PORT_C0 = 0, + USBC_PORT_C1, +#if defined(HAS_TASK_PD_C2) + USBC_PORT_C2, + USBC_PORT_C3, +#endif + USBC_PORT_COUNT +}; +BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); + +/* USB-C PPC configuration */ +struct ppc_config_t ppc_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_TYPEC_AIC_1, + .i2c_addr_flags = I2C_ADDR_SN5S330_P0, + .drv = &sn5s330_drv, + }, + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_TYPEC_AIC_1, + .i2c_addr_flags = I2C_ADDR_SN5S330_P1, + .drv = &sn5s330_drv, + }, +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* TCPC AIC GPIO Configuration */ +const struct tcpc_aic_gpio_config_t tcpc_aic_gpios[] = { + [USBC_PORT_C0] = { + .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)), + .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p0)), + .ppc_intr_handler = sn5s330_interrupt, + }, + [USBC_PORT_C1] = { + .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p0)), + .ppc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_ppc_alrt_p1)), + .ppc_intr_handler = sn5s330_interrupt, + }, +#if defined(HAS_TASK_PD_C2) + [USBC_PORT_C2] = { + .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p2)), + /* No PPC alert for CCGXXF */ + }, + [USBC_PORT_C3] = { + .tcpc_alert = GPIO_SIGNAL(DT_NODELABEL(usbc_tcpc_alrt_p3)), + /* No PPC alert for CCGXXF */ + }, +#endif +}; +BUILD_ASSERT(ARRAY_SIZE(tcpc_aic_gpios) == CONFIG_USB_PD_PORT_MAX_COUNT); + +static void board_connect_c0_sbu_deferred(void) +{ + enum pd_power_role prole; + + if (gpio_get_level(GPIO_CCD_MODE_ODL)) { + CPRINTS("Default AUX line connected"); + /* Default set the SBU lines to AUX mode */ + ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 0); + ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 1); + } else { + prole = pd_get_power_role(USBC_PORT_C0); + CPRINTS("%s debug device is attached", + prole == PD_ROLE_SINK ? "Servo V4C/SuzyQ" : "Intel"); + + if (prole == PD_ROLE_SINK) { + /* Set the SBU lines to Google CCD mode */ + ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 1); + ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 1); + } else { + /* Set the SBU lines to Intel CCD mode */ + ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_1, 0); + ioex_set_level(IOEX_USB_C0_MUX_SBU_SEL_0, 0); + } + } +} +DECLARE_DEFERRED(board_connect_c0_sbu_deferred); + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* + * TODO: Meteorlake PCH does not use Physical GPIO for over current + * error, hence Send 'Over Current Virtual Wire' eSPI signal. + */ +} + +void board_reset_pd_mcu(void) +{ + /* Reset NCT38XX TCPC */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_c1_tcpc_rst_odl), 0); + msleep(NCT38XX_RESET_HOLD_DELAY_MS); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(usb_c0_c1_tcpc_rst_odl), 1); + nct38xx_reset_notify(0); + nct38xx_reset_notify(1); + + if (NCT3807_RESET_POST_DELAY_MS != 0) { + msleep(NCT3807_RESET_POST_DELAY_MS); + } + + /* NCT38XX chip uses gpio ioex */ + gpio_reset_port(DEVICE_DT_GET(DT_NODELABEL(ioex_c0))); + gpio_reset_port(DEVICE_DT_GET(DT_NODELABEL(ioex_c1))); + +#if defined(HAS_TASK_PD_C2) + /* Reset the ccgxxf ports only resetting 1 is required */ + ccgxxf_reset(USBC_PORT_C2); + + /* CCGXXF has ioex on port 2 */ + ioex_init(IOEX_C2_CCGXXF); +#endif +} + +void board_connect_c0_sbu(enum gpio_signal signal) +{ + hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0); +} /******************************************************************************/ /* KSO mapping for discrete keyboard */ @@ -65,8 +218,7 @@ __override int board_get_version(void) * This loop retries to ensure rail is settled and read is successful */ for (i = 0; i < RVP_VERSION_READ_RETRY_CNT; i++) { - - rv = gpio_pin_get_dt(&bom_id_config[0]); + rv = gpio_pin_get_dt(&bom_id_config[0]); if (rv >= 0) break; @@ -82,20 +234,20 @@ __override int board_get_version(void) * BOM ID [2] : IOEX[0] * BOM ID [1:0] : IOEX[15:14] */ - bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; + bom_id = gpio_pin_get_dt(&bom_id_config[0]) << 2; bom_id |= gpio_pin_get_dt(&bom_id_config[1]) << 1; bom_id |= gpio_pin_get_dt(&bom_id_config[2]); /* * FAB ID [1:0] : IOEX[2:1] + 1 */ - fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; + fab_id = gpio_pin_get_dt(&fab_id_config[0]) << 1; fab_id |= gpio_pin_get_dt(&fab_id_config[1]); fab_id += 1; /* * BOARD ID[5:0] : IOEX[13:8] */ - board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; + board_id = gpio_pin_get_dt(&board_id_config[0]) << 5; board_id |= gpio_pin_get_dt(&board_id_config[1]) << 4; board_id |= gpio_pin_get_dt(&board_id_config[2]) << 3; board_id |= gpio_pin_get_dt(&board_id_config[3]) << 2; @@ -107,3 +259,73 @@ __override int board_get_version(void) mtlrvp_board_id = board_id | (fab_id << 8); return mtlrvp_board_id; } + +static void board_int_init(void) +{ + /* Enable PPC interrupts. */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc)); + + /* Enable TCPC interrupts. */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_c1_tcpc)); +#if defined(HAS_TASK_PD_C2) + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c2_tcpc)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c3_tcpc)); +#endif + + /* Enable CCD Mode interrupt */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_ccd_mode)); +} + +static int board_pre_task_peripheral_init(const struct device *unused) +{ + ARG_UNUSED(unused); + + /* Only reset tcpc/pd if not sysjump */ + if (!system_jumped_late()) { + /* Initialize tcpc and all ioex */ + board_reset_pd_mcu(); + } + + /* Initialize all interrupts */ + board_int_init(); + + /* Make sure SBU are routed to CCD or AUX based on CCD status at init */ + board_connect_c0_sbu_deferred(); + + return 0; +} +SYS_INIT(board_pre_task_peripheral_init, APPLICATION, + CONFIG_APPLICATION_INIT_PRIORITY); + +/* + * Since MTLRVP has both PPC and TCPC ports override to check if the port + * is a PPC or non PPC port + */ +__override bool pd_check_vbus_level(int port, enum vbus_level level) +{ + if (!board_port_has_ppc(port)) { + return tcpm_check_vbus_level(port, level); + } else if (level == VBUS_PRESENT) { + return pd_snk_is_vbus_provided(port); + } else { + return !pd_snk_is_vbus_provided(port); + } +} + +__override bool board_port_has_ppc(int port) +{ + bool ppc_port; + + switch (port) { + case USBC_PORT_C0: + case USBC_PORT_C1: + ppc_port = true; + break; + default: + ppc_port = false; + break; + } + + return ppc_port; +} diff --git a/zephyr/projects/intelrvp/mtlrvp/usbc.dts b/zephyr/projects/intelrvp/mtlrvp/usbc.dts new file mode 100644 index 0000000000..e4f3bdc465 --- /dev/null +++ b/zephyr/projects/intelrvp/mtlrvp/usbc.dts @@ -0,0 +1,76 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + #address-cells = <1>; + #size-cells = <0>; + + usbc_port0: port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c0_hb_retimer + &virtual_mux_c0>; + }; + }; + port0-muxes { + virtual_mux_c0: virtual-mux-c0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + + usbc_port1: port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + tcpc = <&tcpc_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c1_hb_retimer + &virtual_mux_c1>; + }; + }; + port1-muxes { + virtual_mux_c1: virtual-mux-c1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + + usbc_port2: port2@2 { + compatible = "named-usbc-port"; + reg = <2>; + tcpc = <&tcpc_port2>; + usb-mux-chain-2 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c2_hb_retimer + &virtual_mux_c2>; + }; + }; + port2-muxes { + virtual_mux_c2: virtual-mux-c2 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + + usbc_port3: port3@3 { + compatible = "named-usbc-port"; + reg = <3>; + tcpc = <&tcpc_port3>; + usb-mux-chain-3 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c3_hb_retimer + &virtual_mux_c3>; + }; + }; + port3-muxes { + virtual_mux_c3: virtual-mux-c3 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + }; +}; diff --git a/zephyr/projects/intelrvp/prj.conf b/zephyr/projects/intelrvp/prj.conf index 51b9245200..a7dcdc77dd 100644 --- a/zephyr/projects/intelrvp/prj.conf +++ b/zephyr/projects/intelrvp/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -22,6 +22,9 @@ CONFIG_PLATFORM_EC_BATTERY_TYPE_NO_AUTO_DETECT=y CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT=15000 CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=15001 +#Power Sequencing +CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y + # Host command CONFIG_PLATFORM_EC_HOSTCMD_AP_RESET=y @@ -34,9 +37,9 @@ CONFIG_I2C=y # eSPI CONFIG_ESPI=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y # Keyboard CONFIG_PLATFORM_EC_KEYBOARD=y @@ -50,6 +53,17 @@ CONFIG_PLATFORM_EC_CMD_BUTTON=n CONFIG_SENSOR=y CONFIG_SENSOR_SHELL=n +# Shell Commands +CONFIG_SHELL_HELP=y +CONFIG_SHELL_HISTORY=y +CONFIG_SHELL_TAB=y +CONFIG_SHELL_TAB_AUTOCOMPLETION=y +CONFIG_KERNEL_SHELL=y + +# Logging +CONFIG_LOG=y +CONFIG_LOG_MODE_MINIMAL=y + # TODO # Below conf are disabled to compile successfully # These will be enabled in upcoming CLs diff --git a/zephyr/projects/intelrvp/src/chg_usb_pd.c b/zephyr/projects/intelrvp/src/chg_usb_pd.c new file mode 100644 index 0000000000..63a1853b4d --- /dev/null +++ b/zephyr/projects/intelrvp/src/chg_usb_pd.c @@ -0,0 +1,129 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Common USB PD charge configuration */ + +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "gpio.h" +#include "hooks.h" +#include "intelrvp.h" +#include "tcpm/tcpci.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) + +bool is_typec_port(int port) +{ +#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 + return !(port == DEDICATED_CHARGE_PORT || port == CHARGE_PORT_NONE); +#else + return !(port == CHARGE_PORT_NONE); +#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 */ +} + +static inline int board_dc_jack_present(void) +{ +#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 + return gpio_get_level(GPIO_DC_JACK_PRESENT); +#else + return 0; +#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 */ +} + +static void board_dc_jack_handle(void) +{ +#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 + struct charge_port_info charge_dc_jack; + + /* System is booted from DC Jack */ + if (board_dc_jack_present()) { + charge_dc_jack.current = + (PD_MAX_POWER_MW * 1000) / DC_JACK_MAX_VOLTAGE_MV; + charge_dc_jack.voltage = DC_JACK_MAX_VOLTAGE_MV; + } else { + charge_dc_jack.current = 0; + charge_dc_jack.voltage = USB_CHARGER_VOLTAGE_MV; + } + + charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, + DEDICATED_CHARGE_PORT, &charge_dc_jack); +#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 */ +} + +void board_dc_jack_interrupt(enum gpio_signal signal) +{ + board_dc_jack_handle(); +} + +static void board_charge_init(void) +{ + int port, supplier; + struct charge_port_info charge_init = { + .current = 0, + .voltage = USB_CHARGER_VOLTAGE_MV, + }; + + /* Initialize all charge suppliers to seed the charge manager */ + for (port = 0; port < CHARGE_PORT_COUNT; port++) { + for (supplier = 0; supplier < CHARGE_SUPPLIER_COUNT; + supplier++) { + charge_manager_update_charge(supplier, port, + &charge_init); + } + } + + board_dc_jack_handle(); +} +DECLARE_HOOK(HOOK_INIT, board_charge_init, HOOK_PRIO_DEFAULT); + +int board_set_active_charge_port(int port) +{ + int i; + /* charge port is a realy physical port */ + int is_real_port = (port >= 0 && port < CHARGE_PORT_COUNT); + /* check if we are source vbus on that port */ + int source = board_vbus_source_enabled(port); + + if (is_real_port && source) { + CPRINTS("Skip enable p%d", port); + return EC_ERROR_INVAL; + } + +#if CONFIG_DEDICATED_CHARGE_PORT_COUNT > 0 + /* + * Do not enable Type-C port if the DC Jack is present. + * When the Type-C is active port, hardware circuit will + * block DC jack from enabling +VADP_OUT. + */ + if (port != DEDICATED_CHARGE_PORT && board_dc_jack_present()) { + CPRINTS("DC Jack present, Skip enable p%d", port); + return EC_ERROR_INVAL; + } +#endif /* CONFIG_DEDICATED_CHARGE_PORT_COUNT */ + + /* Make sure non-charging ports are disabled */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + if (i != port) { + board_charging_enable(i, 0); + } + } + + /* Enable charging port */ + if (is_typec_port(port)) { + board_charging_enable(port, 1); + } + + CPRINTS("New chg p%d", port); + + return EC_SUCCESS; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) +{ + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} diff --git a/zephyr/projects/intelrvp/src/chg_usb_pd_mecc_1_1.c b/zephyr/projects/intelrvp/src/chg_usb_pd_mecc_1_1.c new file mode 100644 index 0000000000..45fbbc6f65 --- /dev/null +++ b/zephyr/projects/intelrvp/src/chg_usb_pd_mecc_1_1.c @@ -0,0 +1,92 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Intel-RVP family-specific configuration */ + +#include "console.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "include/gpio.h" +#include "intelrvp.h" +#include "ioexpander.h" +#include "system.h" +#include "tcpm/tcpci.h" +#include "usbc_ppc.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) + +void tcpc_alert_event(enum gpio_signal signal) +{ + int i; + + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* No alerts for embedded TCPC */ + if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED) { + continue; + } + + if (signal == tcpc_aic_gpios[i].tcpc_alert) { + schedule_deferred_pd_interrupt(i); + break; + } + } +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + int i; + + /* Check which port has the ALERT line set */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* No alerts for embdeded TCPC */ + if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED) { + continue; + } + + if (!gpio_get_level(tcpc_aic_gpios[i].tcpc_alert)) { + status |= PD_STATUS_TCPC_ALERT_0 << i; + } + } + + return status; +} + +int ppc_get_alert_status(int port) +{ + return tcpc_aic_gpios[port].ppc_intr_handler && + !gpio_get_level(tcpc_aic_gpios[port].ppc_alert); +} + +/* PPC support routines */ +void ppc_interrupt(enum gpio_signal signal) +{ + int i; + + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + if (tcpc_aic_gpios[i].ppc_intr_handler && + signal == tcpc_aic_gpios[i].ppc_alert) { + tcpc_aic_gpios[i].ppc_intr_handler(i); + break; + } + } +} + +void board_charging_enable(int port, int enable) +{ + int rv; + + if (tcpc_aic_gpios[port].ppc_intr_handler) { + rv = ppc_vbus_sink_enable(port, enable); + } else { + rv = tcpc_config[port].drv->set_snk_ctrl(port, enable); + } + + if (rv) { + CPRINTS("C%d: sink path %s failed", port, + enable ? "en" : "dis"); + } +} diff --git a/zephyr/projects/intelrvp/src/intel_rvp_board_id.c b/zephyr/projects/intelrvp/src/intel_rvp_board_id.c index d4172a468e..77d4e93afd 100644 --- a/zephyr/projects/intelrvp/src/intel_rvp_board_id.c +++ b/zephyr/projects/intelrvp/src/intel_rvp_board_id.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,25 +9,22 @@ #define DT_DRV_COMPAT intel_rvp_board_id BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) <= 1, - "Unsupported RVP Board ID instance"); + "Unsupported RVP Board ID instance"); #define RVP_ID_GPIO_DT_SPEC_GET(idx, node_id, prop) \ GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx), -#define RVP_ID_CONFIG_LIST(node_id, prop) \ - LISTIFY(DT_PROP_LEN(node_id, prop), \ - RVP_ID_GPIO_DT_SPEC_GET, (), node_id, prop) +#define RVP_ID_CONFIG_LIST(node_id, prop) \ + LISTIFY(DT_PROP_LEN(node_id, prop), RVP_ID_GPIO_DT_SPEC_GET, (), \ + node_id, prop) #if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) -const struct gpio_dt_spec bom_id_config[] = { - RVP_ID_CONFIG_LIST(DT_DRV_INST(0), bom_gpios) -}; +const struct gpio_dt_spec bom_id_config[] = { RVP_ID_CONFIG_LIST(DT_DRV_INST(0), + bom_gpios) }; -const struct gpio_dt_spec fab_id_config[] = { - RVP_ID_CONFIG_LIST(DT_DRV_INST(0), fab_gpios) -}; +const struct gpio_dt_spec fab_id_config[] = { RVP_ID_CONFIG_LIST(DT_DRV_INST(0), + fab_gpios) }; -const struct gpio_dt_spec board_id_config[] = { - RVP_ID_CONFIG_LIST(DT_DRV_INST(0), board_gpios) -}; +const struct gpio_dt_spec board_id_config[] = { RVP_ID_CONFIG_LIST( + DT_DRV_INST(0), board_gpios) }; #endif /* #if DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/projects/intelrvp/src/intel_rvp_led.c b/zephyr/projects/intelrvp/src/intel_rvp_led.c index b382dcc485..0e4d872963 100644 --- a/zephyr/projects/intelrvp/src/intel_rvp_led.c +++ b/zephyr/projects/intelrvp/src/intel_rvp_led.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -26,8 +26,8 @@ #define LED_PULSE_TICK (125 * MSEC) -#define LED_FAST_PULSE_PERIOD (250 / 125) /* 250 ms */ -#define LED_SLOW_PULSE_PERIOD ((2 * MSEC) / 125) /* 2 sec */ +#define LED_FAST_PULSE_PERIOD (250 / 125) /* 250 ms */ +#define LED_SLOW_PULSE_PERIOD ((2 * MSEC) / 125) /* 2 sec */ struct led_pulse_data { bool led_is_pulsing; @@ -56,13 +56,13 @@ static void pulse_led_deferred(void) * and in OFF state in second half of the pulse period. */ if (rvp_led[i].led_tick_count < - (rvp_led[i].led_pulse_period >> 1)) + (rvp_led[i].led_pulse_period >> 1)) set_pwm_led_color(i, EC_LED_COLOR_GREEN); else set_pwm_led_color(i, LED_OFF); rvp_led[i].led_tick_count = (rvp_led[i].led_tick_count + 1) % - rvp_led[i].led_pulse_period; + rvp_led[i].led_pulse_period; call_deferred = true; } @@ -73,7 +73,7 @@ static void pulse_led_deferred(void) static void pulse_leds(enum pwm_led_id id, int period) { rvp_led[id].led_pulse_period = period; - rvp_led[id].led_is_pulsing = true; + rvp_led[id].led_is_pulsing = true; pulse_led_deferred(); } @@ -96,7 +96,7 @@ static void update_charger_led(enum pwm_led_id id) rvp_led[id].led_is_pulsing = false; set_pwm_led_color(id, EC_LED_COLOR_GREEN); } else if (chg_st == PWR_STATE_DISCHARGE || - chg_st == PWR_STATE_DISCHARGE_FULL) { + chg_st == PWR_STATE_DISCHARGE_FULL) { if (extpower_is_present()) { /* Discharging: * Flash slower (2 second period, 100% duty cycle) diff --git a/zephyr/projects/intelrvp/src/intelrvp.c b/zephyr/projects/intelrvp/src/intelrvp.c index fd0514f438..7098f26cbf 100644 --- a/zephyr/projects/intelrvp/src/intelrvp.c +++ b/zephyr/projects/intelrvp/src/intelrvp.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/intelrvp/src/usb_pd_policy_mecc_1_1.c b/zephyr/projects/intelrvp/src/usb_pd_policy_mecc_1_1.c new file mode 100644 index 0000000000..a194b358f1 --- /dev/null +++ b/zephyr/projects/intelrvp/src/usb_pd_policy_mecc_1_1.c @@ -0,0 +1,106 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "console.h" +#include "gpio.h" +#include "intelrvp.h" +#include "usb_mux.h" +#include "usbc_ppc.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) + +static inline void board_pd_set_vbus_discharge(int port, bool enable) +{ + if (tcpc_aic_gpios[port].ppc_intr_handler) { + ppc_discharge_vbus(port, enable); + } else { + tcpc_discharge_vbus(port, enable); + } +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + /* Disable charging. */ + if (tcpc_aic_gpios[port].ppc_intr_handler) { + rv = ppc_vbus_sink_enable(port, 0); + } else { + rv = tcpc_config[port].drv->set_snk_ctrl(port, 0); + } + + if (rv) { + return rv; + } + + board_pd_set_vbus_discharge(port, false); + + /* Provide Vbus. */ + if (tcpc_aic_gpios[port].ppc_intr_handler) { + rv = ppc_vbus_source_enable(port, 1); + } else { + tcpc_config[port].drv->set_src_ctrl(port, 1); + } + + if (rv) { + return rv; + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + prev_en = board_vbus_source_enabled(port); + + /* Disable VBUS. */ + if (tcpc_aic_gpios[port].ppc_intr_handler) { + ppc_vbus_source_enable(port, 0); + } else { + tcpc_config[port].drv->set_src_ctrl(port, 0); + } + + /* Enable discharge if we were previously sourcing 5V */ + if (prev_en) { + board_pd_set_vbus_discharge(port, true); + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_check_vconn_swap(int port) +{ + /* Only allow vconn swap if PP3300 rail is enabled */ + return gpio_get_level(GPIO_EN_PP3300_A); +} + +int pd_snk_is_vbus_provided(int port) +{ + if (tcpc_aic_gpios[port].ppc_intr_handler) { + return ppc_is_vbus_present(port); + } else { + return tcpc_config[port].drv->check_vbus_level(port, + VBUS_PRESENT); + } +} + +int board_vbus_source_enabled(int port) +{ + if (is_typec_port(port)) { + if (tcpc_aic_gpios[port].ppc_intr_handler) { + return ppc_is_sourcing_vbus(port); + } else { + return tcpc_config[port].drv->get_src_ctrl(port); + } + } + return 0; +} diff --git a/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf b/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf new file mode 100644 index 0000000000..1ef365a8fa --- /dev/null +++ b/zephyr/projects/intelrvp/zephyr_ap_pwrseq.conf @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Inbuilt AP Power Sequencing Config +CONFIG_AP_PWRSEQ=y +CONFIG_X86_NON_DSX_PWRSEQ_CONSOLE=y +CONFIG_X86_NON_DSX_PWRSEQ_HOST_CMD=y +CONFIG_AP_PWRSEQ_S0IX=y diff --git a/zephyr/projects/it8xxx2_evb/BUILD.py b/zephyr/projects/it8xxx2_evb/BUILD.py index 2f4b87886b..ee89c75390 100644 --- a/zephyr/projects/it8xxx2_evb/BUILD.py +++ b/zephyr/projects/it8xxx2_evb/BUILD.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,7 +6,7 @@ register_raw_project( project_name="it8xxx2_evb", - zephyr_board="it8xxx2", + zephyr_board="it81302bx", dts_overlays=[ "adc.dts", "fan.dts", diff --git a/zephyr/projects/it8xxx2_evb/CMakeLists.txt b/zephyr/projects/it8xxx2_evb/CMakeLists.txt index dc2eb449b0..170606a52d 100644 --- a/zephyr/projects/it8xxx2_evb/CMakeLists.txt +++ b/zephyr/projects/it8xxx2_evb/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(it8xxx2_evb) # Include board specific header files diff --git a/zephyr/projects/it8xxx2_evb/adc.dts b/zephyr/projects/it8xxx2_evb/adc.dts index b72a38b110..509c9b9daf 100644 --- a/zephyr/projects/it8xxx2_evb/adc.dts +++ b/zephyr/projects/it8xxx2_evb/adc.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,32 +8,26 @@ compatible = "named-adc-channels"; adc_vbussa: vbussa { - label = "ADC_VBUSSA"; enum-name = "ADC_VBUS"; io-channels = <&adc0 0>; }; adc_vbussb: vbussb { - label = "ADC_VBUSSB"; enum-name = "ADC_PSYS"; io-channels = <&adc0 1>; }; adc_evb_ch_13: evb_ch_13 { - label = "ADC_EVB_CH_13"; enum-name = "ADC_AMON_BMON"; io-channels = <&adc0 2>; }; adc_evb_ch_14: evb_ch_14 { - label = "ADC_EVB_CH_14"; enum-name = "ADC_TEMP_SENSOR_FAN"; io-channels = <&adc0 3>; }; adc_evb_ch_15: evb_ch_15 { - label = "ADC_EVB_CH_15"; enum-name = "ADC_TEMP_SENSOR_DDR_SOC"; io-channels = <&adc0 4>; }; adc_evb_ch_16: evb_ch_16 { - label = "ADC_EVB_CH_16"; enum-name = "ADC_TEMP_SENSOR_CHARGER"; io-channels = <&adc0 5>; }; diff --git a/zephyr/projects/it8xxx2_evb/fan.dts b/zephyr/projects/it8xxx2_evb/fan.dts index faa659e6ad..2551507ec3 100644 --- a/zephyr/projects/it8xxx2_evb/fan.dts +++ b/zephyr/projects/it8xxx2_evb/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm7 PWM_CHANNEL_7 PWM_KHZ(30) PWM_POLARITY_NORMAL>; - pwm-frequency = <30000>; tach = <&tach0>; rpm_min = <1500>; rpm_start = <1500>; diff --git a/zephyr/projects/it8xxx2_evb/gpio.dts b/zephyr/projects/it8xxx2_evb/gpio.dts index 51c6a45ca9..85bb45d7a0 100644 --- a/zephyr/projects/it8xxx2_evb/gpio.dts +++ b/zephyr/projects/it8xxx2_evb/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -39,6 +39,10 @@ spi0_cs: spi0_cs { gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; }; hibernate-wake-pins { diff --git a/zephyr/projects/it8xxx2_evb/i2c.dts b/zephyr/projects/it8xxx2_evb/i2c.dts index 753755f449..c08c543e44 100644 --- a/zephyr/projects/it8xxx2_evb/i2c.dts +++ b/zephyr/projects/it8xxx2_evb/i2c.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,19 +9,19 @@ battery { i2c-port = <&i2c2>; - enum-name = "I2C_PORT_BATTERY"; + enum-names = "I2C_PORT_BATTERY"; }; evb-1 { i2c-port = <&i2c0>; - enum-name = "I2C_PORT_EVB_1"; + enum-names = "I2C_PORT_EVB_1"; }; evb-2 { i2c-port = <&i2c1>; - enum-name = "I2C_PORT_EVB_2"; + enum-names = "I2C_PORT_EVB_2"; }; opt-4 { i2c-port = <&i2c4>; - enum-name = "I2C_PORT_OPT_4"; + enum-names = "I2C_PORT_OPT_4"; }; }; }; diff --git a/zephyr/projects/it8xxx2_evb/include/gpio_map.h b/zephyr/projects/it8xxx2_evb/include/gpio_map.h deleted file mode 100644 index b9d9026892..0000000000 --- a/zephyr/projects/it8xxx2_evb/include/gpio_map.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <zephyr/devicetree.h> -#include <gpio_signal.h> - -#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/it8xxx2_evb/include/i2c_map.h b/zephyr/projects/it8xxx2_evb/include/i2c_map.h index 49c492f6ba..e83a238d3a 100644 --- a/zephyr/projects/it8xxx2_evb/include/i2c_map.h +++ b/zephyr/projects/it8xxx2_evb/include/i2c_map.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/it8xxx2_evb/interrupts.dts b/zephyr/projects/it8xxx2_evb/interrupts.dts index d52a86ce43..07fc0ed339 100644 --- a/zephyr/projects/it8xxx2_evb/interrupts.dts +++ b/zephyr/projects/it8xxx2_evb/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/it8xxx2_evb/prj.conf b/zephyr/projects/it8xxx2_evb/prj.conf index bb9fb95d8f..d6d422e490 100644 --- a/zephyr/projects/it8xxx2_evb/prj.conf +++ b/zephyr/projects/it8xxx2_evb/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -19,6 +19,16 @@ CONFIG_LOG=y # Fan CONFIG_SENSOR=y +# I2C +CONFIG_I2C=y + +# PWM +CONFIG_PWM=y +CONFIG_PWM_SHELL=n + +# Power Button +CONFIG_PLATFORM_EC_POWER_BUTTON=y + # TODO(b:185202623): bring these features up CONFIG_PLATFORM_EC_BACKLIGHT_LID=n CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n @@ -28,3 +38,7 @@ CONFIG_CROS_KB_RAW_ITE=n CONFIG_PLATFORM_EC_SWITCH=n CONFIG_PLATFORM_EC_VBOOT_EFS2=n CONFIG_PLATFORM_EC_VBOOT_HASH=n + +# USB-C +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n diff --git a/zephyr/projects/it8xxx2_evb/pwm.dts b/zephyr/projects/it8xxx2_evb/pwm.dts index bac40fc722..c566e5c029 100644 --- a/zephyr/projects/it8xxx2_evb/pwm.dts +++ b/zephyr/projects/it8xxx2_evb/pwm.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/minimal/BUILD.py b/zephyr/projects/minimal/BUILD.py new file mode 100644 index 0000000000..5e892aa2d7 --- /dev/null +++ b/zephyr/projects/minimal/BUILD.py @@ -0,0 +1,22 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""Minimal example project.""" + +register_host_project( + project_name="minimal-posix", + zephyr_board="native_posix", +) + +register_npcx_project( + project_name="minimal-npcx9", + zephyr_board="npcx9m3f", + dts_overlays=[here / "npcx9.dts"], +) + +register_binman_project( + project_name="minimal-it8xxx2", + zephyr_board="it81302bx", + dts_overlays=[here / "it8xxx2.dts"], +) diff --git a/zephyr/projects/minimal/CMakeLists.txt b/zephyr/projects/minimal/CMakeLists.txt new file mode 100644 index 0000000000..de3bec9428 --- /dev/null +++ b/zephyr/projects/minimal/CMakeLists.txt @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.20.5) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(ec) + +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") diff --git a/zephyr/projects/minimal/README.md b/zephyr/projects/minimal/README.md new file mode 100644 index 0000000000..72c092dfce --- /dev/null +++ b/zephyr/projects/minimal/README.md @@ -0,0 +1,32 @@ +# Minimal Example Zephyr EC Project + +This directory is intended to be an extremely minimal example of a +project. Should you like, you can use it as a bring up a new program, +or as reference as you require. + +If you're bringing up a new variant of a program, you don't need a +whole project directory with a `BUILD.py` and all, and this example is +likely not of use to you. Check out the [project config +documentation] for instructions on adding a new variant. + +[project config documentation]: ../../../docs/zephyr/project_config.md + +# Building + +To build the `native_posix` example, run: + +``` shellsession +(chroot) $ zmake build minimal-posix +``` + +To build the NPCX9 example, run: + +``` shellsession +(chroot) $ zmake build minimal-npcx9 +``` + +For the IT8XXX2 example, run: + +``` shellsession +(chroot) $ zmake build minimal-it8xxx2 +``` diff --git a/zephyr/projects/minimal/it8xxx2.dts b/zephyr/projects/minimal/it8xxx2.dts new file mode 100644 index 0000000000..3d2028afb2 --- /dev/null +++ b/zephyr/projects/minimal/it8xxx2.dts @@ -0,0 +1,22 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + gpio-wp = &ec_wp_l; + }; + + named-gpios { + compatible = "named-gpios"; + + ec_wp_l: write-protect { + gpios = <&gpioa 0 GPIO_INPUT>; + }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; + }; +}; diff --git a/zephyr/projects/minimal/npcx9.dts b/zephyr/projects/minimal/npcx9.dts new file mode 100644 index 0000000000..3a9f3b26e4 --- /dev/null +++ b/zephyr/projects/minimal/npcx9.dts @@ -0,0 +1,28 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + gpio-wp = &ec_wp_l; + }; + + named-gpios { + compatible = "named-gpios"; + + ec_wp_l: write-protect { + gpios = <&gpioa 0 GPIO_INPUT>; + }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; + }; +}; + +&cros_kb_raw { + status = "okay"; + pinctrl-0 = <>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/minimal/prj.conf b/zephyr/projects/minimal/prj.conf new file mode 100644 index 0000000000..db7cac0cef --- /dev/null +++ b/zephyr/projects/minimal/prj.conf @@ -0,0 +1,18 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC=y +CONFIG_CROS_EC=y +CONFIG_SHIMMED_TASKS=y +CONFIG_SYSCON=y + +# Disable default features we don't want in a minimal example. +CONFIG_ADC=n +CONFIG_I2C=n +CONFIG_PWM=n +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_KEYBOARD=n +CONFIG_PLATFORM_EC_POWER_BUTTON=n +CONFIG_PLATFORM_EC_SWITCH=n +CONFIG_PLATFORM_EC_VBOOT_EFS2=n diff --git a/zephyr/projects/nissa/BUILD.py b/zephyr/projects/nissa/BUILD.py index a620e7b9ae..e162bc2b96 100644 --- a/zephyr/projects/nissa/BUILD.py +++ b/zephyr/projects/nissa/BUILD.py @@ -1,28 +1,34 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Define zmake projects for nissa.""" -# Nivviks and Craask, Pujjo has NPCX993F, Nereid has ITE81302 +# Nivviks and Craask, Pujjo, Xivu has NPCX993F, Nereid and Joxer, Yaviks has ITE81302 def register_nissa_project( project_name, - chip="it8xxx2", + chip="it81302bx", extra_dts_overlays=(), - extra_kconfig_files=(), ): """Register a variant of nissa.""" register_func = register_binman_project if chip.startswith("npcx"): register_func = register_npcx_project + chip_kconfig = {"it81302bx": "it8xxx2", "npcx9m3f": "npcx"}[chip] + return register_func( project_name=project_name, zephyr_board=chip, - dts_overlays=["cbi.dts", *extra_dts_overlays], - kconfig_files=[here / "prj.conf", *extra_kconfig_files], + dts_overlays=["cbi.dts"] + + [here / project_name / filename for filename in extra_dts_overlays], + kconfig_files=[ + here / "prj.conf", + here / f"prj_{chip_kconfig}.conf", + here / project_name / "prj.conf", + ], ) @@ -30,55 +36,92 @@ nivviks = register_nissa_project( project_name="nivviks", chip="npcx9m3f", extra_dts_overlays=[ - here / "nivviks_generated.dts", - here / "nivviks_cbi.dts", - here / "nivviks_overlay.dts", - here / "nivviks_motionsense.dts", - here / "nivviks_keyboard.dts", - here / "nivviks_power_signals.dts", - here / "nivviks_pwm_leds.dts", + "generated.dts", + "cbi.dts", + "overlay.dts", + "motionsense.dts", + "keyboard.dts", + "power_signals.dts", + "pwm_leds.dts", ], - extra_kconfig_files=[here / "prj_nivviks.conf"], ) nereid = register_nissa_project( project_name="nereid", - chip="it8xxx2", + chip="it81302bx", extra_dts_overlays=[ - here / "nereid_generated.dts", - here / "nereid_overlay.dts", - here / "nereid_motionsense.dts", - here / "nereid_keyboard.dts", - here / "nereid_power_signals.dts", - here / "nereid_pwm_leds.dts", + "generated.dts", + "overlay.dts", + "motionsense.dts", + "keyboard.dts", + "power_signals.dts", + "pwm_leds.dts", ], - extra_kconfig_files=[here / "prj_nereid.conf"], ) craask = register_nissa_project( project_name="craask", chip="npcx9m3f", extra_dts_overlays=[ - here / "craask_generated.dts", - here / "craask_overlay.dts", - here / "craask_motionsense.dts", - here / "craask_keyboard.dts", - here / "craask_power_signals.dts", - here / "craask_pwm_leds.dts", + "generated.dts", + "cbi.dts", + "overlay.dts", + "motionsense.dts", + "keyboard.dts", + "power_signals.dts", + "pwm_leds.dts", ], - extra_kconfig_files=[here / "prj_craask.conf"], ) pujjo = register_nissa_project( project_name="pujjo", chip="npcx9m3f", extra_dts_overlays=[ - here / "pujjo_generated.dts", - here / "pujjo_overlay.dts", - here / "pujjo_motionsense.dts", - here / "pujjo_keyboard.dts", - here / "pujjo_power_signals.dts", - here / "pujjo_pwm_leds.dts", + "generated.dts", + "cbi.dts", + "overlay.dts", + "motionsense.dts", + "keyboard.dts", + "power_signals.dts", + ], +) + +xivu = register_nissa_project( + project_name="xivu", + chip="npcx9m3f", + extra_dts_overlays=[ + "generated.dts", + "cbi.dts", + "overlay.dts", + "motionsense.dts", + "keyboard.dts", + "power_signals.dts", + "led_pins.dts", + "led_policy.dts", + ], +) + +joxer = register_nissa_project( + project_name="joxer", + chip="it81302bx", + extra_dts_overlays=[ + "generated.dts", + "cbi.dts", + "overlay.dts", + "motionsense.dts", + "keyboard.dts", + "power_signals.dts", + "pwm_leds.dts", + ], +) + +yaviks = register_nissa_project( + project_name="yaviks", + chip="it81302bx", + extra_dts_overlays=[ + "gpio.dts", + "overlay.dts", + "keyboard.dts", + "power_signals.dts", ], - extra_kconfig_files=[here / "prj_pujjo.conf"], ) diff --git a/zephyr/projects/nissa/CMakeLists.txt b/zephyr/projects/nissa/CMakeLists.txt index afc96e924f..30d574096b 100644 --- a/zephyr/projects/nissa/CMakeLists.txt +++ b/zephyr/projects/nissa/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") zephyr_include_directories(include) zephyr_library_sources("src/common.c") @@ -14,38 +14,71 @@ zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ "src/board_power.c") if(DEFINED CONFIG_BOARD_NIVVIKS) project(nivviks) zephyr_library_sources( - "src/led.c" - "src/nivviks/form_factor.c" - "src/nivviks/keyboard.c" + "nivviks/src/led.c" + "nivviks/src/form_factor.c" + "nivviks/src/keyboard.c" ) - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "src/nivviks/fan.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/nivviks/usbc.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "src/nivviks/charger.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "nivviks/src/fan.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "nivviks/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "nivviks/src/charger.c") endif() if(DEFINED CONFIG_BOARD_NEREID) project(nereid) zephyr_library_sources( "src/led.c" - "src/nereid/keyboard.c" + "nereid/src/keyboard.c" + "nereid/src/hdmi.c" ) - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/nereid/usbc.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "src/nereid/charger.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "nereid/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "nereid/src/charger.c") endif() if(DEFINED CONFIG_BOARD_CRAASK) zephyr_library_sources( - "src/craask/led.c" + "craask/src/form_factor.c" + "craask/src/keyboard.c" + "craask/src/led.c" ) project(craask) - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/craask/usbc.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "src/craask/charger.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "craask/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "craask/src/charger.c") endif() if(DEFINED CONFIG_BOARD_PUJJO) project(pujjo) zephyr_library_sources( - "src/led.c" - "src/pujjo/keyboard.c" + "pujjo/src/led.c" + "pujjo/src/keyboard.c" + "pujjo/src/hdmi.c" + "pujjo/src/form_factor.c" + ) + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "pujjo/src/fan.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "pujjo/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "pujjo/src/charger.c") +endif() +if(DEFINED CONFIG_BOARD_XIVU) + project(xivu) + zephyr_library_sources( + "xivu/src/keyboard.c" ) - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "src/pujjo/fan.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/pujjo/usbc.c") - zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "src/pujjo/charger.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "xivu/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "xivu/src/charger.c") endif() +if(DEFINED CONFIG_BOARD_JOXER) + project(joxer) + zephyr_library_sources( + "joxer/src/led.c" + "joxer/src/keyboard.c" + ) + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "joxer/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "joxer/src/charger.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "joxer/src/fan.c") +endif() +if(DEFINED CONFIG_BOARD_YAVIKS) + project(yaviks) + zephyr_library_sources( + "yaviks/src/led.c" + "yaviks/src/keyboard.c" + "yaviks/src/hdmi.c" + ) + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "yaviks/src/usbc.c") + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER "yaviks/src/charger.c") +endif()
\ No newline at end of file diff --git a/zephyr/projects/nissa/Kconfig b/zephyr/projects/nissa/Kconfig index 87d7bca977..9e9ffc2528 100644 --- a/zephyr/projects/nissa/Kconfig +++ b/zephyr/projects/nissa/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -26,6 +26,25 @@ config BOARD_PUJJO Build Google Pujjo board. Pujjo has Intel ADL-N SoC with NPCX993FA0BX EC. +config BOARD_XIVU + bool "Google Xivu Board" + help + Build Google Xivu board. Xivu has Intel ADL-N SoC + with NPCX993FA0BX EC. + +config BOARD_JOXER + bool "Google Joxer Board" + help + Build Google Joxer reference board. Joxer has Intel ADL-N SoC + with IT81302 EC. + +config BOARD_YAVIKS + bool "Google Yaviks Board" + help + Build Google Yaviks board. Yaviks has Intel ADL-N SoC + with IT81302 EC. + + module = NISSA module-str = Nissa board-specific code source "subsys/logging/Kconfig.template.log_config" diff --git a/zephyr/projects/nissa/cbi.dts b/zephyr/projects/nissa/cbi.dts index ec6d8ea608..d841be1624 100644 --- a/zephyr/projects/nissa/cbi.dts +++ b/zephyr/projects/nissa/cbi.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/craask/cbi.dts b/zephyr/projects/nissa/craask/cbi.dts new file mode 100644 index 0000000000..4c2e052f4d --- /dev/null +++ b/zephyr/projects/nissa/craask/cbi.dts @@ -0,0 +1,107 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* Craask-specific fw_config fields. */ + nissa-fw-config { + /* + * FW_CONFIG field to describe Lid sensor orientation. + */ + lid-inversion { + enum-name = "FW_LID_INVERSION"; + start = <8>; + size = <1>; + + /* + * 0: regular placement of the lid sensor + * 1: rotate 180' of xy plane. + */ + regular { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_LID_REGULAR"; + value = <0>; + default; + }; + xy_rotate_180 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_LID_XY_ROT_180"; + value = <1>; + }; + }; + /* + * FW_CONFIG field to describe Clamshell/Convertible. + */ + form_factor { + enum-name = "FORM_FACTOR"; + start = <9>; + size = <1>; + + /* + * 0: convertible, 1: clamshell + */ + convertible { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "CONVERTIBLE"; + value = <0>; + }; + clamshell { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "CLAMSHELL"; + value = <1>; + }; + }; + }; + /* Craask-specific ssfc fields. */ + cbi-ssfc { + compatible = "named-cbi-ssfc"; + /* + * SSFC bit0-1 was defined for AUDIO CODEC. + * 0: ALC5682I_VS + * 1: NAU8825 + */ + audio_codec { + enum-name = "AUDIO_CODEC"; + size = <2>; + }; + /* + * SSFC field to identify LID motion sensor. + */ + lid-sensor { + enum-name = "LID_SENSOR"; + size = <2>; + + lid_sensor_0: lis2dw12 { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <0>; + default; + }; + lid_sensor_1: bma422 { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <1>; + }; + }; + /* + * SSFC field to identify BASE motion sensor. + */ + base-sensor { + enum-name = "BASE_SENSOR"; + size = <2>; + + base_sensor_0: lsm6dso { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <0>; + default; + }; + base_sensor_1: bmi323 { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <1>; + }; + }; + }; +}; diff --git a/zephyr/projects/nissa/craask_generated.dts b/zephyr/projects/nissa/craask/generated.dts index 1a4d5f044f..4303bbd4c5 100644 --- a/zephyr/projects/nissa/craask_generated.dts +++ b/zephyr/projects/nissa/craask/generated.dts @@ -1,8 +1,6 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. - * - * This file is auto-generated - do not edit! */ / { @@ -11,25 +9,25 @@ compatible = "named-adc-channels"; adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { - label = "EC_VSENSE_PP1050_PROC"; enum-name = "ADC_PP1050_PROC"; io-channels = <&adc0 4>; }; adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { - label = "EC_VSENSE_PP3300_S5"; enum-name = "ADC_PP3300_S5"; io-channels = <&adc0 6>; }; adc_temp_sensor_1: temp_sensor_1 { - label = "TEMP_SENSOR_1"; enum-name = "ADC_TEMP_SENSOR_1"; io-channels = <&adc0 0>; }; adc_temp_sensor_2: temp_sensor_2 { - label = "TEMP_SENSOR_2"; enum-name = "ADC_TEMP_SENSOR_2"; io-channels = <&adc0 1>; }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 10>; + }; }; named-gpios { @@ -188,17 +186,17 @@ gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; }; gpio_vccin_aux_vid0: vccin_aux_vid0 { - gpios = <&gpio9 2 GPIO_INPUT>; + gpios = <&gpio9 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; gpio_vccin_aux_vid1: vccin_aux_vid1 { - gpios = <&gpioe 3 GPIO_INPUT>; + gpios = <&gpioe 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; gpio_voldn_btn_odl: voldn_btn_odl { - gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; + gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_VOLUME_DOWN_L"; }; gpio_volup_btn_odl: volup_btn_odl { - gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; + gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_VOLUME_UP_L"; }; }; @@ -208,23 +206,23 @@ i2c_ec_i2c_eeprom: ec_i2c_eeprom { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_EEPROM"; }; i2c_ec_i2c_sensor: ec_i2c_sensor { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_SENSOR"; + enum-names = "I2C_PORT_SENSOR"; }; i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_USB_C0_TCPC"; + enum-names = "I2C_PORT_USB_C0_TCPC"; }; i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { i2c-port = <&i2c5_1>; - enum-name = "I2C_PORT_USB_C1_TCPC"; + enum-names = "I2C_PORT_USB_C1_TCPC"; }; i2c_ec_i2c_batt: ec_i2c_batt { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_BATTERY"; + enum-names = "I2C_PORT_BATTERY"; }; }; }; @@ -234,7 +232,8 @@ pinctrl-0 = <&adc0_chan0_gp45 &adc0_chan1_gp44 &adc0_chan4_gp41 - &adc0_chan6_gp34>; + &adc0_chan6_gp34 + &adc0_chan10_gpe0>; pinctrl-names = "default"; }; diff --git a/zephyr/projects/nissa/craask_keyboard.dts b/zephyr/projects/nissa/craask/keyboard.dts index d3fd354b8f..f9e46de1f2 100644 --- a/zephyr/projects/nissa/craask_keyboard.dts +++ b/zephyr/projects/nissa/craask/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/craask/motionsense.dts b/zephyr/projects/nissa/craask/motionsense.dts new file mode 100644 index 0000000000..448aed6991 --- /dev/null +++ b/zephyr/projects/nissa/craask/motionsense.dts @@ -0,0 +1,257 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * Interrupt bindings for sensor devices. + */ + lsm6dso-int = &base_accel; + lis2dw12-int = &lid_accel; + bmi3xx-int = &base_accel; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + lid_mutex: lis2dw12-mutex { + }; + + lid_mutex_bma422: bma422-mutex { + }; + + base_mutex: base-mutex { + }; + + base_mutex_bmi323: bmi323-mutex { + }; + }; + + /* Rotation matrix used by drivers. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <(-1) 0 0 + 0 1 0 + 0 0 (-1)>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <1 0 0 + 0 (-1) 0 + 0 0 (-1)>; + }; + + base_rot_ver1: base-rotation-ver1 { + mat33 = <(-1) 0 0 + 0 (-1) 0 + 0 0 1>; + }; + + lid_rot_bma422: lid-rotation-bma { + mat33 = <1 0 0 + 0 (-1) 0 + 0 0 (-1)>; + }; + + base_rot_bmi323: base-rotation-bmi323 { + mat33 = <1 0 0 + 0 (-1) 0 + 0 0 (-1)>; + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + lsm6dso_accel_data: lsm6dso-accel-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + lsm6dso_gyro_data: lsm6dso-gyro-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + lis2dw12_data: lis2dw12-drv-data { + compatible = "cros-ec,drvdata-lis2dw12"; + status = "okay"; + }; + + bma422_data: bma4xx-drv-data { + compatible = "cros-ec,drvdata-bma4xx"; + status = "okay"; + }; + + bmi323_data: bmi323-drv-data { + compatible = "cros-ec,drvdata-bmi3xx"; + status = "okay"; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + * TODO(b/238139272): The first entries of the array must be + * accelerometers,then gyroscope. Fix this dependency in the DTS + * processing which makes the devicetree entries independent. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,lis2dw12"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&lis2dw12_data>; + i2c-spi-addr-flags = "LIS2DWL_ADDR0_FLAGS"; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,lsm6dso-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&lsm6dso_accel_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_gyro: base-gyro { + compatible = "cros-ec,lsm6dso-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */ + drv-data = <&lsm6dso_gyro_data>; + }; + }; + + motionsense-sensor-alt { + alt_lid_accel: alt-lid-accel { + compatible = "cros-ec,bma4xx"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex_bma422>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&lid_rot_bma422>; + default-range = <2>; + drv-data = <&bma422_data>; + i2c-spi-addr-flags = "BMA4_I2C_ADDR_PRIMARY"; + alternate-for = <&lid_accel>; + alternate-ssfc-indicator = <&lid_sensor_1>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + alt_base_accel: alt-base-accel { + compatible = "cros-ec,bmi3xx-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex_bmi323>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_bmi323>; + drv-data = <&bmi323_data>; + alternate-for = <&base_accel>; + alternate-ssfc-indicator = <&base_sensor_1>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + alt_base_gyro: alt-base-gyro { + compatible = "cros-ec,bmi3xx-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex_bmi323>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_bmi323>; + drv-data = <&bmi323_data>; + alternate-for = <&base_gyro>; + alternate-ssfc-indicator = <&base_sensor_1>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_imu>; + /* list of sensors in force mode */ + accel-force-mode-sensors = <&lid_accel>; + }; +}; diff --git a/zephyr/projects/nissa/craask_overlay.dts b/zephyr/projects/nissa/craask/overlay.dts index 1ff3022124..b3a510c111 100644 --- a/zephyr/projects/nissa/craask_overlay.dts +++ b/zephyr/projects/nissa/craask/overlay.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,6 +22,12 @@ default_battery: lgc { compatible = "lgc,ap18c8k", "battery-smart"; }; + cosmx { + compatible = "cosmx,ap20cbl", "battery-smart"; + }; + cosmx-2 { + compatible = "cosmx,ap20cbl-2", "battery-smart"; + }; }; hibernate-wake-pins { @@ -58,7 +64,7 @@ int_imu: ec_imu { irq-pin = <&gpio_imu_int_l>; flags = <GPIO_INT_EDGE_FALLING>; - handler = "lsm6dso_interrupt"; + handler = "motion_interrupt"; }; int_vol_down: vol_down { irq-pin = <&gpio_voldn_btn_odl>; @@ -83,24 +89,36 @@ }; named-gpios { - gpio_sb_1: sb_1 { + gpio_sb_1: sb-1 { gpios = <&gpio0 2 GPIO_PULL_UP>; no-auto-init; }; - gpio_sb_2: sb_2 { + gpio_sb_2: sb-2 { gpios = <&gpiod 4 GPIO_OUTPUT>; no-auto-init; }; - gpio_sb_3: sb_3 { - gpios = <&gpiof 4 GPIO_OPEN_DRAIN>; + /* + * Set I2C pins for type C sub-board to be low voltage (I2C5_1). + * We do this for all boards, since the pins are 3.3V tolerant, + * and the only 2 types of sub-boards used on nivviks both have + * type-C ports on them. + */ + gpio_sb_3: sb-3 { + gpios = <&gpiof 4 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; no-auto-init; }; - gpio_sb_4: sb_4 { - gpios = <&gpiof 5 GPIO_INPUT>; + gpio_sb_4: sb-4 { + gpios = <&gpiof 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; no-auto-init; }; + ec-i2c-sensor-scl { + gpios = <&gpio9 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpio8 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; }; /* @@ -128,32 +146,50 @@ gpio-en-sub-s5-rails = &gpio_sb_2; }; + temp_memory: memory { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; memory { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "DDR and SOC"; - enum-name = "TEMP_SENSOR_1"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_1>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_memory>; }; charger { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "Charger"; - enum-name = "TEMP_SENSOR_2"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_2>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger>; + }; + ambient { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ambient>; }; }; @@ -179,21 +215,12 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_usb_c0>; - /* - * BC1.2 interrupt is shared with TCPC, so - * IRQ is not specified here and handled by - * usb_c0_interrupt. - */ - }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_ec_i2c_usb_c0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; }; - usb-muxes = <&virtual_mux_0>; }; port0-muxes { virtual_mux_0: virtual-mux-0 { @@ -207,50 +234,29 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_sub_usb_c1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_ec_i2c_sub_usb_c1>; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; }; - /* - * Some sub-boards may disable all usb muxes in chain - * except virtual_mux_1 - */ - usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; }; port1-muxes { virtual_mux_1: virtual-mux-1 { compatible = "cros-ec,usbc-mux-virtual"; }; - anx7483_mux_1: anx7483-mux-1 { - compatible = "analogix,anx7483"; - port = <&i2c_ec_i2c_sub_usb_c1>; - i2c-addr-flags = "ANX7483_I2C_ADDR0_FLAGS"; - }; }; }; kblight { compatible = "cros-ec,kblight-pwm"; - pwms = <&pwm6 6 0 PWM_POLARITY_NORMAL>; - frequency = <10000>; + pwms = <&pwm6 6 PWM_HZ(2400) PWM_POLARITY_NORMAL>; }; - - /* - * Set I2C pins for type C sub-board to be - * low voltage (I2C5_1). - * We do this for all boards, since the pins are - * 3.3V tolerant, and the only 2 types of sub-boards - * used on nivviks both have type-C ports on them. - */ - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = <&lvol_iof5 &lvol_iof4>; - }; }; &thermistor_3V3_51K1_47K_4050B { @@ -277,7 +283,6 @@ cbi_eeprom: eeprom@50 { compatible = "atmel,at24"; reg = <0x50>; - label = "EEPROM_CBI"; size = <2048>; pagesize = <16>; address-width = <8>; @@ -293,11 +298,46 @@ &i2c3_0 { label = "I2C_USB_C0_TCPC"; clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + /* + * BC1.2 interrupt is shared with TCPC, so + * IRQ is not specified here and handled by + * usb_c0_interrupt. + */ + }; + + chg_port0: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; }; &i2c5_1 { label = "I2C_SUB_C1_TCPC"; clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; + + anx7483_mux_1: anx7483-mux-1@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "anx7483_set_default_tuning"; + }; }; &i2c7_0 { @@ -307,6 +347,7 @@ &pwm6 { status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; pinctrl-0 = <&pwm6_gpc0>; pinctrl-names = "default"; }; diff --git a/zephyr/projects/nissa/craask_power_signals.dts b/zephyr/projects/nissa/craask/power_signals.dts index 91876f0402..1d2b23069d 100644 --- a/zephyr/projects/nissa/craask_power_signals.dts +++ b/zephyr/projects/nissa/craask/power_signals.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/craask/prj.conf b/zephyr/projects/nissa/craask/prj.conf new file mode 100644 index 0000000000..b7f31cee63 --- /dev/null +++ b/zephyr/projects/nissa/craask/prj.conf @@ -0,0 +1,15 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_CRAASK=y +CONFIG_PLATFORM_EC_OCPC=y + +# Sensor drivers +CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y + +CONFIG_PLATFORM_EC_BUTTONS_RUNTIME_CONFIG=y diff --git a/zephyr/projects/nissa/pujjo_pwm_leds.dts b/zephyr/projects/nissa/craask/pwm_leds.dts index b6f657fb03..e55aa1c9ef 100644 --- a/zephyr/projects/nissa/pujjo_pwm_leds.dts +++ b/zephyr/projects/nissa/craask/pwm_leds.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,7 +17,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0>; - frequency = <324>; /*<red green blue>*/ color-map-red = <100 0 0>; @@ -25,7 +24,7 @@ color-map-blue = < 0 0 100>; color-map-yellow = < 0 50 50>; color-map-white = <100 100 100>; - color-map-amber = <100 20 100>; + color-map-amber = < 90 10 0>; brightness-range = <100 100 100 0 0 0>; diff --git a/zephyr/projects/nissa/src/craask/charger.c b/zephyr/projects/nissa/craask/src/charger.c index 3fbbabec6b..d4723e4a0a 100644 --- a/zephyr/projects/nissa/src/craask/charger.c +++ b/zephyr/projects/nissa/craask/src/charger.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/craask/src/form_factor.c b/zephyr/projects/nissa/craask/src/form_factor.c new file mode 100644 index 0000000000..59869eaa2f --- /dev/null +++ b/zephyr/projects/nissa/craask/src/form_factor.c @@ -0,0 +1,121 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> + +#include "accelgyro.h" +#include "button.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/accelgyro_bmi323.h" +#include "driver/accelgyro_lsm6dso.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "motionsense_sensors.h" +#include "motion_sense.h" +#include "tablet_mode.h" + +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +/* + * Mainboard orientation support. + */ + +#define LIS_ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(lid_rot_bma422)) +#define BMA_ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(lid_rot_ref)) +#define ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(base_rot_ver1)) +#define LID_SENSOR SENSOR_ID(DT_NODELABEL(lid_accel)) +#define BASE_SENSOR SENSOR_ID(DT_NODELABEL(base_accel)) +#define BASE_GYRO SENSOR_ID(DT_NODELABEL(base_gyro)) +#define ALT_LID_S SENSOR_ID(DT_NODELABEL(alt_lid_accel)) + +static bool use_alt_sensor; + +void motion_interrupt(enum gpio_signal signal) +{ + if (use_alt_sensor) + bmi3xx_interrupt(signal); + else + lsm6dso_interrupt(signal); +} + +static void form_factor_init(void) +{ + int ret; + uint32_t val; + enum nissa_sub_board_type sb = nissa_get_sb_type(); + + ret = cbi_get_board_version(&val); + if (ret != EC_SUCCESS) { + LOG_ERR("Error retrieving CBI BOARD_VER."); + return; + } + /* + * The volume up/down button are exchanged on ver3 USB + * sub board. + * + * LTE: + * volup -> gpioa2, voldn -> gpio93 + * USB: + * volup -> gpio93, voldn -> gpioa2 + */ + if (val == 3 && sb == NISSA_SB_C_A) { + LOG_INF("Volume up/down btn exchanged on ver3 USB sku"); + buttons[BUTTON_VOLUME_UP].gpio = GPIO_VOLUME_DOWN_L; + buttons[BUTTON_VOLUME_DOWN].gpio = GPIO_VOLUME_UP_L; + } + + /* + * If the board version is 1 + * use ver1 rotation matrix. + */ + if (val == 1) { + LOG_INF("Switching to ver1 base"); + motion_sensors[BASE_SENSOR].rot_standard_ref = &ALT_MAT; + motion_sensors[BASE_GYRO].rot_standard_ref = &ALT_MAT; + } + + /* + * If the firmware config indicates + * an craaskbowl form factor, use the alternative + * rotation matrix. + */ + ret = cros_cbi_get_fw_config(FW_LID_INVERSION, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", + FW_LID_INVERSION); + return; + } + if (val == FW_LID_XY_ROT_180) { + LOG_INF("Lid sensor placement rotate 180 on xy plane"); + motion_sensors[LID_SENSOR].rot_standard_ref = &LIS_ALT_MAT; + motion_sensors_alt[ALT_LID_S].rot_standard_ref = &BMA_ALT_MAT; + } + + /* check which base sensor is used for motion_interrupt */ + use_alt_sensor = cros_cbi_ssfc_check_match( + CBI_SSFC_VALUE_ID(DT_NODELABEL(base_sensor_1))); + + motion_sensors_check_ssfc(); + + /* Check if it's clamshell or convertible */ + ret = cros_cbi_get_fw_config(FORM_FACTOR, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FORM_FACTOR); + return; + } + if (val == CLAMSHELL) { + LOG_INF("Clamshell: disable motionsense function."); + motion_sensor_count = 0; + gmr_tablet_switch_disable(); + gpio_disable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_imu)); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_imu_int_l), + GPIO_DISCONNECTED); + } +} +DECLARE_HOOK(HOOK_INIT, form_factor_init, HOOK_PRIO_POST_I2C); diff --git a/zephyr/projects/nissa/src/pujjo/keyboard.c b/zephyr/projects/nissa/craask/src/keyboard.c index e6d819e348..65229eb43f 100644 --- a/zephyr/projects/nissa/src/pujjo/keyboard.c +++ b/zephyr/projects/nissa/craask/src/keyboard.c @@ -1,11 +1,11 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include "ec_commands.h" -static const struct ec_response_keybd_config pujjo_kb = { +static const struct ec_response_keybd_config craask_kb = { .num_top_row_keys = 10, .action_keys = { TK_BACK, /* T1 */ @@ -22,8 +22,8 @@ static const struct ec_response_keybd_config pujjo_kb = { .capabilities = KEYBD_CAP_SCRNLOCK_KEY, }; -__override const struct ec_response_keybd_config -*board_vivaldi_keybd_config(void) +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) { - return &pujjo_kb; + return &craask_kb; } diff --git a/zephyr/projects/nissa/craask/src/led.c b/zephyr/projects/nissa/craask/src/led.c new file mode 100644 index 0000000000..0af0202cf4 --- /dev/null +++ b/zephyr/projects/nissa/craask/src/led.c @@ -0,0 +1,56 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery LED control for nissa + */ +#include "common.h" +#include "ec_commands.h" +#include "led_common.h" +#include "led_onoff_states.h" +#include "led_pwm.h" + +__override const int led_charge_lvl_1 = 5; +__override const int led_charge_lvl_2 = 97; +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_BLUE, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { EC_LED_COLOR_BLUE, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0_BAT_LOW] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S3] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 3 * LED_ONE_SEC } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_AMBER, + 2 * LED_ONE_SEC }, + { EC_LED_COLOR_BLUE, + 2 * LED_ONE_SEC } }, + }; + +__override void led_set_color_battery(enum ec_led_colors color) +{ + switch (color) { + case EC_LED_COLOR_RED: + set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_RED); + break; + case EC_LED_COLOR_BLUE: + set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_BLUE); + break; + case EC_LED_COLOR_AMBER: + set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_AMBER); + break; + default: /* LED_OFF and other unsupported colors */ + set_pwm_led_color(EC_LED_ID_BATTERY_LED, -1); + break; + } +} diff --git a/zephyr/projects/nissa/src/pujjo/usbc.c b/zephyr/projects/nissa/craask/src/usbc.c index 020f78dbdd..a15460a212 100644 --- a/zephyr/projects/nissa/src/pujjo/usbc.c +++ b/zephyr/projects/nissa/craask/src/usbc.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -54,8 +54,7 @@ int board_is_sourcing_vbus(int port) int board_set_active_charge_port(int port) { - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; int old_port; @@ -233,8 +232,7 @@ static void usbc_interrupt_trigger(int port) usb_charger_task_set_event(port, USB_CHG_EVENT_BC12); } -static inline void poll_usb_gpio(int port, - const struct gpio_dt_spec *gpio, +static inline void poll_usb_gpio(int port, const struct gpio_dt_spec *gpio, const struct deferred_data *ud) { if (!gpio_pin_get_dt(gpio)) { @@ -243,17 +241,15 @@ static inline void poll_usb_gpio(int port, } } -static void poll_c0_int (void) +static void poll_c0_int(void) { - poll_usb_gpio(0, - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), + poll_usb_gpio(0, GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), &poll_c0_int_data); } -static void poll_c1_int (void) +static void poll_c1_int(void) { - poll_usb_gpio(1, - GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), + poll_usb_gpio(1, GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), &poll_c1_int_data); } diff --git a/zephyr/projects/nissa/include/nissa_common.h b/zephyr/projects/nissa/include/nissa_common.h index 7ee9056a71..7cdaba2e50 100644 --- a/zephyr/projects/nissa/include/nissa_common.h +++ b/zephyr/projects/nissa/include/nissa_common.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,15 +11,13 @@ #include "usb_mux.h" enum nissa_sub_board_type { - NISSA_SB_UNKNOWN = -1, /* Uninitialised */ - NISSA_SB_NONE = 0, /* No board defined */ - NISSA_SB_C_A = 1, /* USB type C, USB type A */ - NISSA_SB_C_LTE = 2, /* USB type C, WWAN LTE */ - NISSA_SB_HDMI_A = 3, /* HDMI, USB type A */ + NISSA_SB_UNKNOWN = -1, /* Uninitialised */ + NISSA_SB_NONE = 0, /* No board defined */ + NISSA_SB_C_A = 1, /* USB type C, USB type A */ + NISSA_SB_C_LTE = 2, /* USB type C, WWAN LTE */ + NISSA_SB_HDMI_A = 3, /* HDMI, USB type A */ }; -extern struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT]; - enum nissa_sub_board_type nissa_get_sb_type(void); #endif /* __CROS_EC_NISSA_NISSA_COMMON_H__ */ diff --git a/zephyr/projects/nissa/include/nissa_hdmi.h b/zephyr/projects/nissa/include/nissa_hdmi.h new file mode 100644 index 0000000000..9f2f533ba7 --- /dev/null +++ b/zephyr/projects/nissa/include/nissa_hdmi.h @@ -0,0 +1,55 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Nissa shared HDMI sub-board functionality */ + +#ifndef __CROS_EC_NISSA_NISSA_HDMI_H__ +#define __CROS_EC_NISSA_NISSA_HDMI_H__ + +#include "common.h" + +/** True if the board supports an HDMI sub-board. */ +#define NISSA_BOARD_HAS_HDMI_SUPPORT DT_NODE_EXISTS(DT_NODELABEL(gpio_hdmi_sel)) + +/** + * Configure the GPIO that controls core rails on the HDMI sub-board. + * + * This is the gpio_en_rails_odl pin, which is configured as active-low + * open-drain output to enable power to the HDMI sub-board (typically when the + * AP is in S5 or above). + * + * This function must be called if the pin is connected to the HDMI board and + * power is not enabled by default. + */ +void nissa_configure_hdmi_rails(void); + +/** + * Configure the GPIO that controls the HDMI VCC pin on the HDMI sub-board. + * + * This is the gpio_hdmi_en_odl pin, which is configured as active-low + * open-drain output to enable the VCC pin on the HDMI connector (typically when + * the AP is on, in S0 or S0ix). + * + * This function must be called if the pin is connected to the HDMI board and + * VCC is not enabled by default. + */ +void nissa_configure_hdmi_vcc(void); + +/** + * Configure the GPIOS controlling HDMI sub-board power (core rails and VCC). + * + * This function is called from shared code while configuring sub-boards, and + * used if an HDMI sub-board is present. The default implementation enables the + * core rails control pin (nissa_configure_hdmi_rails) but not VCC + * (nissa_configure_hdmi_vcc), assuming that the pin for VCC is not connected + * connected on most boards (and that VCC will be turned on whenever the core + * rails are turned on). + * + * A board should override this function if it needs to enable more IOs for + * HDMI, or if some pins need to be conditionally enabled. + */ +__override_proto void nissa_configure_hdmi_power_gpios(void); + +#endif /* __CROS_EC_NISSA_NISSA_HDMI_H__ */ diff --git a/zephyr/projects/nissa/joxer/cbi.dts b/zephyr/projects/nissa/joxer/cbi.dts new file mode 100644 index 0000000000..afbd125b32 --- /dev/null +++ b/zephyr/projects/nissa/joxer/cbi.dts @@ -0,0 +1,32 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + nissa-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + /* + * FW_CONFIG field to indicate which keyboard layout + * should be used. + */ + keyboard { + enum-name = "FW_KB_LAYOUT"; + start = <3>; + size = <2>; + + layout-1 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_LAYOUT_DEFAULT"; + value = <0>; + default; + }; + layout-2 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_LAYOUT_US2"; + value = <1>; + }; + }; + }; +}; diff --git a/zephyr/projects/nissa/joxer/generated.dts b/zephyr/projects/nissa/joxer/generated.dts new file mode 100644 index 0000000000..22214b9726 --- /dev/null +++ b/zephyr/projects/nissa/joxer/generated.dts @@ -0,0 +1,260 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * This file is auto-generated - do not edit! + */ + +/ { + + named-adc-channels { + compatible = "named-adc-channels"; + + adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { + enum-name = "ADC_PP1050_PROC"; + io-channels = <&adc0 14>; + }; + adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { + enum-name = "ADC_PP3300_S5"; + io-channels = <&adc0 0>; + }; + adc_temp_sensor_1: temp_sensor_1 { + enum-name = "ADC_TEMP_SENSOR_1"; + io-channels = <&adc0 2>; + }; + adc_temp_sensor_2: temp_sensor_2 { + enum-name = "ADC_TEMP_SENSOR_2"; + io-channels = <&adc0 3>; + }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 13>; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_acc_int_l: acc_int_l { + gpios = <&gpioc 0 GPIO_INPUT>; + }; + gpio_all_sys_pwrgd: all_sys_pwrgd { + gpios = <&gpiob 7 GPIO_INPUT>; + }; + gpio_ccd_mode_odl: ccd_mode_odl { + gpios = <&gpioh 5 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + gpio_cpu_c10_gate_l: cpu_c10_gate_l { + gpios = <&gpiog 1 GPIO_INPUT>; + }; + gpio_ec_battery_pres_odl: ec_battery_pres_odl { + gpios = <&gpioi 4 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpioj 5 GPIO_OUTPUT>; + }; + gpio_ec_edp_bl_en_od: ec_edp_bl_en_od { + gpios = <&gpiok 4 GPIO_ODR_HIGH>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + gpio_ec_entering_rw: ec_entering_rw { + gpios = <&gpioc 7 GPIO_OUTPUT>; + enum-name = "GPIO_ENTERING_RW"; + }; + gpio_ec_gsc_packet_mode: ec_gsc_packet_mode { + gpios = <&gpioh 1 GPIO_OUTPUT>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_ec_pch_wake_odl: ec_pch_wake_odl { + gpios = <&gpiob 2 GPIO_ODR_LOW>; + }; + gpio_ec_prochot_odl: ec_prochot_odl { + gpios = <&gpioi 1 GPIO_ODR_HIGH>; + }; + gpio_ec_soc_dsw_pwrok: ec_soc_dsw_pwrok { + gpios = <&gpiol 7 GPIO_OUTPUT>; + }; + gpio_ec_soc_hdmi_hpd: ec_soc_hdmi_hpd { + gpios = <&gpiok 7 GPIO_OUTPUT>; + }; + gpio_ec_soc_int_odl: ec_soc_int_odl { + gpios = <&gpiod 5 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pch_pwrok_od: ec_soc_pch_pwrok_od { + gpios = <&gpiod 6 GPIO_ODR_HIGH>; + }; + gpio_ec_soc_pwr_btn_odl: ec_soc_pwr_btn_odl { + gpios = <&gpiob 6 GPIO_ODR_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + gpios = <&gpioh 0 GPIO_OUTPUT>; + }; + gpio_ec_soc_rtcrst: ec_soc_rtcrst { + gpios = <&gpiok 2 GPIO_OUTPUT>; + }; + gpio_ec_soc_sys_pwrok: ec_soc_sys_pwrok { + gpios = <&gpiof 2 GPIO_OUTPUT>; + }; + gpio_ec_soc_vccst_pwrgd_od: ec_soc_vccst_pwrgd_od { + gpios = <&gpioe 5 GPIO_ODR_HIGH>; + }; + gpio_ec_wp_odl: ec_wp_odl { + gpios = <&gpioa 6 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_en_kb_bl: en_kb_bl { + gpios = <&gpioj 3 GPIO_OUTPUT>; + enum-name = "GPIO_EN_KEYBOARD_BACKLIGHT"; + }; + gpio_en_pp3300_s5: en_pp3300_s5 { + gpios = <&gpioc 5 GPIO_OUTPUT>; + enum-name = "GPIO_TEMP_SENSOR_POWER"; + }; + gpio_en_pp5000_pen_x: en_pp5000_pen_x { + gpios = <&gpiob 5 GPIO_OUTPUT>; + }; + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpiok 5 GPIO_OUTPUT>; + }; + gpio_en_slp_z: en_slp_z { + gpios = <&gpiok 3 GPIO_OUTPUT>; + }; + gpio_en_usb_a0_vbus: en_usb_a0_vbus { + gpios = <&gpiol 6 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_cc1_vconn: en_usb_c0_cc1_vconn { + gpios = <&gpioh 4 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_cc2_vconn: en_usb_c0_cc2_vconn { + gpios = <&gpioh 6 GPIO_OUTPUT>; + }; + gpio_gsc_ec_pwr_btn_odl: gsc_ec_pwr_btn_odl { + gpios = <&gpioe 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_hdmi_sel: hdmi_sel { + gpios = <&gpioc 6 GPIO_OUTPUT>; + }; + gpio_imu_int_l: imu_int_l { + gpios = <&gpioj 0 GPIO_INPUT>; + }; + gpio_imvp91_vrrdy_od: imvp91_vrrdy_od { + gpios = <&gpioj 4 GPIO_INPUT>; + }; + gpio_lid_open: lid_open { + gpios = <&gpiof 3 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_pen_detect_odl: pen_detect_odl { + gpios = <&gpioj 1 GPIO_INPUT_PULL_UP>; + }; + gpio_pg_pp1050_mem_s3_od: pg_pp1050_mem_s3_od { + gpios = <&gpiod 3 GPIO_INPUT>; + }; + gpio_pg_pp5000_s5_od: pg_pp5000_s5_od { + gpios = <&gpioe 3 GPIO_INPUT>; + }; + gpio_rsmrst_pwrgd_l: rsmrst_pwrgd_l { + gpios = <&gpioe 1 GPIO_INPUT_PULL_UP>; + }; + gpio_slp_s0_l: slp_s0_l { + gpios = <&gpioe 4 GPIO_INPUT>; + }; + gpio_slp_s3_l: slp_s3_l { + gpios = <&gpioh 3 GPIO_INPUT>; + }; + gpio_slp_s4_l: slp_s4_l { + gpios = <&gpioi 5 GPIO_INPUT>; + }; + gpio_slp_sus_l: slp_sus_l { + gpios = <&gpiog 2 GPIO_INPUT>; + }; + gpio_sub_usb_a1_ilimit_sdp: sub_usb_a1_ilimit_sdp { + gpios = <&gpiof 1 GPIO_OUTPUT>; + enum-name = "GPIO_USB2_ILIM_SEL"; + }; + gpio_sys_rst_odl: sys_rst_odl { + gpios = <&gpiod 1 GPIO_ODR_HIGH>; + }; + gpio_tablet_mode_l: tablet_mode_l { + gpios = <&gpioj 7 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + gpio_usb_a0_ilimit_sdp: usb_a0_ilimit_sdp { + gpios = <&gpiol 5 GPIO_OUTPUT>; + enum-name = "GPIO_USB1_ILIM_SEL"; + }; + gpio_usb_c0_frs: usb_c0_frs { + gpios = <&gpioc 4 GPIO_OUTPUT>; + }; + gpio_usb_c0_int_odl: usb_c0_int_odl { + gpios = <&gpiok 0 GPIO_INPUT_PULL_UP>; + }; + gpio_vccin_aux_vid0: vccin_aux_vid0 { + gpios = <&gpiod 0 GPIO_INPUT>; + }; + gpio_vccin_aux_vid1: vccin_aux_vid1 { + gpios = <&gpiok 1 GPIO_INPUT>; + }; + gpio_voldn_btn_odl: voldn_btn_odl { + gpios = <&gpioi 6 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_volup_btn_odl: volup_btn_odl { + gpios = <&gpioi 7 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_ec_i2c_eeprom: ec_i2c_eeprom { + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_EEPROM"; + }; + i2c_ec_i2c_batt: ec_i2c_batt { + i2c-port = <&i2c1>; + enum-names = "I2C_PORT_BATTERY"; + }; + i2c_ec_i2c_sensor: ec_i2c_sensor { + i2c-port = <&i2c2>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { + i2c-port = <&i2c4>; + enum-names = "I2C_PORT_USB_C1_TCPC"; + }; + i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { + i2c-port = <&i2c5>; + enum-names = "I2C_PORT_USB_C0_TCPC"; + }; + }; +}; + +&adc0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; diff --git a/zephyr/projects/nissa/joxer/joxer_vif.xml b/zephyr/projects/nissa/joxer/joxer_vif.xml new file mode 100644 index 0000000000..0b1f397981 --- /dev/null +++ b/zephyr/projects/nissa/joxer/joxer_vif.xml @@ -0,0 +1,346 @@ +<?xml version="1.0" encoding="utf-8"?> +<vif:VIF xmlns:opt="http://usb.org/VendorInfoFileOptionalContent.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vif="http://usb.org/VendorInfoFile.xsd"> + <vif:VIF_Specification>3.20</vif:VIF_Specification> + <vif:VIF_App> + <vif:Vendor>USB-IF</vif:Vendor> + <vif:Name>VIF Editor</vif:Name> + <vif:Version>3.3.0.0</vif:Version> + </vif:VIF_App> + <vif:Vendor_Name>Google</vif:Vendor_Name> + <vif:Model_Part_Number>Joxer</vif:Model_Part_Number> + <vif:Product_Revision>1</vif:Product_Revision> + <vif:TID>0</vif:TID> + <vif:VIF_Product_Type value="0">Port Product</vif:VIF_Product_Type> + <vif:Certification_Type value="1">Reference Platform</vif:Certification_Type> + <vif:Product> + <!--Product Level Content:--> + </vif:Product> + <vif:Component> + <!--Component 0: Port 0--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Component--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Port_Label>0</vif:Port_Label> + <vif:Connector_Type value="2">Type-C®</vif:Connector_Type> + <vif:USB4_Supported value="false" /> + <vif:USB_PD_Support value="true" /> + <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type> + <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine> + <vif:Port_Battery_Powered value="true" /> + <vif:BC_1_2_Support value="3">Both</vif:BC_1_2_Support> + <vif:Captive_Cable value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;General PD--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:PD_Spec_Revision_Major value="3" /> + <vif:PD_Spec_Revision_Minor value="1" /> + <vif:PD_Spec_Version_Major value="1" /> + <vif:PD_Spec_Version_Minor value="3" /> + <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision> + <vif:SOP_Capable value="true" /> + <vif:SOP_P_Capable value="true" /> + <vif:SOP_PP_Capable value="true" /> + <vif:SOP_P_Debug_Capable value="false" /> + <vif:SOP_PP_Debug_Capable value="false" /> + <vif:Manufacturer_Info_Supported_Port value="false" /> + <vif:Chunking_Implemented_SOP value="true" /> + <vif:Unchunked_Extended_Messages_Supported value="false" /> + <vif:Security_Msgs_Supported_SOP value="false" /> + <vif:Unconstrained_Power value="false" /> + <vif:Num_Fixed_Batteries value="1" /> + <vif:Num_Swappable_Battery_Slots value="1" /> + <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;PD Capabilities--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:USB_Comms_Capable value="true" /> + <vif:DR_Swap_To_DFP_Supported value="true" /> + <vif:DR_Swap_To_UFP_Supported value="false" /> + <vif:VCONN_Swap_To_On_Supported value="true" /> + <vif:VCONN_Swap_To_Off_Supported value="true" /> + <vif:Responds_To_Discov_SOP_UFP value="false" /> + <vif:Responds_To_Discov_SOP_DFP value="true" /> + <vif:Attempts_Discov_SOP value="true" /> + <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available> + <vif:Data_Reset_Supported value="false" /> + <vif:Enter_USB_Supported value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;USB Type-C®--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Type_C_Can_Act_As_Host value="true" /> + <vif:Type_C_Can_Act_As_Device value="false" /> + <vif:Type_C_Implements_Try_SRC value="true" /> + <vif:Type_C_Implements_Try_SNK value="false" /> + <vif:Type_C_Supports_Audio_Accessory value="false" /> + <vif:Type_C_Is_VCONN_Powered_Accessory value="false" /> + <vif:Type_C_Is_Debug_Target_SRC value="true" /> + <vif:Type_C_Is_Debug_Target_SNK value="true" /> + <vif:RP_Value value="1">1.5A</vif:RP_Value> + <vif:Type_C_Port_On_Hub value="false" /> + <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source> + <vif:Type_C_Sources_VCONN value="true" /> + <vif:Type_C_Is_Alt_Mode_Controller value="true" /> + <vif:Type_C_Is_Alt_Mode_Adapter value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Product Power--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW> + <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;USB Host--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Host_Supports_USB_Data value="true" /> + <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed> + <vif:Host_Contains_Captive_Retimer value="false" /> + <vif:Host_Truncates_DP_For_tDHPResponse value="false" /> + <vif:Host_Is_Embedded value="false" /> + <vif:Host_Suspend_Supported value="true" /> + <vif:Is_DFP_On_Hub value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Battery Charging 1.2--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;PD Source--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source> + <vif:EPR_Supported_As_Src value="false" /> + <vif:USB_Suspend_May_Be_Cleared value="false" /> + <vif:Sends_Pings value="false" /> + <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink> + <vif:Master_Port value="false" /> + <vif:Num_Src_PDOs value="1" /> + <vif:PD_OC_Protection value="true" /> + <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method> + <!--Bundle: SrcPdoList--> + <vif:SrcPdoList> + <vif:SrcPDO> + <!--Source PDO 1--> + <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type> + <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current> + <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage> + <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current> + <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce> + <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold> + </vif:SrcPDO> + </vif:SrcPdoList> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;PD Sink--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink> + <vif:EPR_Supported_As_Snk value="false" /> + <vif:No_USB_Suspend_May_Be_Set value="true" /> + <vif:GiveBack_May_Be_Set value="false" /> + <vif:Higher_Capability_Set value="false" /> + <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source> + <vif:Num_Snk_PDOs value="3" /> + <!--Bundle: SnkPdoList--> + <vif:SnkPdoList> + <vif:SnkPDO> + <!--Sink PDO 1--> + <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type> + <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage> + <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current> + </vif:SnkPDO> + <vif:SnkPDO> + <!--Sink PDO 2--> + <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type> + <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power> + <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage> + <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage> + </vif:SnkPDO> + <vif:SnkPDO> + <!--Sink PDO 3--> + <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type> + <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage> + <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage> + <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current> + </vif:SnkPDO> + </vif:SnkPdoList> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Dual Role--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Accepts_PR_Swap_As_Src value="true" /> + <vif:Accepts_PR_Swap_As_Snk value="true" /> + <vif:Requests_PR_Swap_As_Src value="true" /> + <vif:Requests_PR_Swap_As_Snk value="true" /> + <vif:FR_Swap_Supported_As_Initial_Sink value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;SOP Discover ID--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:XID_SOP value="0" /> + <vif:Data_Capable_As_USB_Host_SOP value="true" /> + <vif:Data_Capable_As_USB_Device_SOP value="false" /> + <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP> + <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP> + <vif:DFP_VDO_Port_Number value="0" /> + <vif:Modal_Operation_Supported_SOP value="false" /> + <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP> + <vif:PID_SOP value="20570">505A</vif:PID_SOP> + <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP> + </vif:Component> + <vif:Component> + <!--Component 1: Port 1--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Component--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Port_Label>1</vif:Port_Label> + <vif:Connector_Type value="2">Type-C®</vif:Connector_Type> + <vif:USB4_Supported value="false" /> + <vif:USB_PD_Support value="true" /> + <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type> + <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine> + <vif:Port_Battery_Powered value="true" /> + <vif:BC_1_2_Support value="3">Both</vif:BC_1_2_Support> + <vif:Captive_Cable value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;General PD--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:PD_Spec_Revision_Major value="3" /> + <vif:PD_Spec_Revision_Minor value="1" /> + <vif:PD_Spec_Version_Major value="1" /> + <vif:PD_Spec_Version_Minor value="3" /> + <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision> + <vif:SOP_Capable value="true" /> + <vif:SOP_P_Capable value="true" /> + <vif:SOP_PP_Capable value="true" /> + <vif:SOP_P_Debug_Capable value="false" /> + <vif:SOP_PP_Debug_Capable value="false" /> + <vif:Manufacturer_Info_Supported_Port value="false" /> + <vif:Chunking_Implemented_SOP value="true" /> + <vif:Unchunked_Extended_Messages_Supported value="false" /> + <vif:Security_Msgs_Supported_SOP value="false" /> + <vif:Unconstrained_Power value="false" /> + <vif:Num_Fixed_Batteries value="1" /> + <vif:Num_Swappable_Battery_Slots value="1" /> + <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;PD Capabilities--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:USB_Comms_Capable value="true" /> + <vif:DR_Swap_To_DFP_Supported value="true" /> + <vif:DR_Swap_To_UFP_Supported value="false" /> + <vif:VCONN_Swap_To_On_Supported value="true" /> + <vif:VCONN_Swap_To_Off_Supported value="true" /> + <vif:Responds_To_Discov_SOP_UFP value="false" /> + <vif:Responds_To_Discov_SOP_DFP value="true" /> + <vif:Attempts_Discov_SOP value="true" /> + <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available> + <vif:Data_Reset_Supported value="false" /> + <vif:Enter_USB_Supported value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;USB Type-C®--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Type_C_Can_Act_As_Host value="true" /> + <vif:Type_C_Can_Act_As_Device value="false" /> + <vif:Type_C_Implements_Try_SRC value="true" /> + <vif:Type_C_Implements_Try_SNK value="false" /> + <vif:Type_C_Supports_Audio_Accessory value="false" /> + <vif:Type_C_Is_VCONN_Powered_Accessory value="false" /> + <vif:Type_C_Is_Debug_Target_SRC value="true" /> + <vif:Type_C_Is_Debug_Target_SNK value="true" /> + <vif:RP_Value value="1">1.5A</vif:RP_Value> + <vif:Type_C_Port_On_Hub value="false" /> + <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source> + <vif:Type_C_Sources_VCONN value="true" /> + <vif:Type_C_Is_Alt_Mode_Controller value="true" /> + <vif:Type_C_Is_Alt_Mode_Adapter value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Product Power--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW> + <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;USB Host--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Host_Supports_USB_Data value="true" /> + <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed> + <vif:Host_Contains_Captive_Retimer value="true" /> + <vif:Host_Truncates_DP_For_tDHPResponse value="false" /> + <vif:Host_Is_Embedded value="false" /> + <vif:Host_Suspend_Supported value="true" /> + <vif:Is_DFP_On_Hub value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Battery Charging 1.2--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;PD Source--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source> + <vif:EPR_Supported_As_Src value="false" /> + <vif:USB_Suspend_May_Be_Cleared value="false" /> + <vif:Sends_Pings value="false" /> + <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink> + <vif:Master_Port value="false" /> + <vif:Num_Src_PDOs value="1" /> + <vif:PD_OC_Protection value="true" /> + <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method> + <!--Bundle: SrcPdoList--> + <vif:SrcPdoList> + <vif:SrcPDO> + <!--Source PDO 1--> + <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type> + <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current> + <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage> + <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current> + <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce> + <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold> + </vif:SrcPDO> + </vif:SrcPdoList> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;PD Sink--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink> + <vif:EPR_Supported_As_Snk value="false" /> + <vif:No_USB_Suspend_May_Be_Set value="true" /> + <vif:GiveBack_May_Be_Set value="false" /> + <vif:Higher_Capability_Set value="false" /> + <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source> + <vif:Num_Snk_PDOs value="3" /> + <!--Bundle: SnkPdoList--> + <vif:SnkPdoList> + <vif:SnkPDO> + <!--Sink PDO 1--> + <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type> + <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage> + <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current> + </vif:SnkPDO> + <vif:SnkPDO> + <!--Sink PDO 2--> + <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type> + <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power> + <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage> + <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage> + </vif:SnkPDO> + <vif:SnkPDO> + <!--Sink PDO 3--> + <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type> + <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage> + <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage> + <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current> + </vif:SnkPDO> + </vif:SnkPdoList> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;Dual Role--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:Accepts_PR_Swap_As_Src value="true" /> + <vif:Accepts_PR_Swap_As_Snk value="true" /> + <vif:Requests_PR_Swap_As_Src value="true" /> + <vif:Requests_PR_Swap_As_Snk value="true" /> + <vif:FR_Swap_Supported_As_Initial_Sink value="false" /> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <!--;SOP Discover ID--> + <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;--> + <vif:XID_SOP value="0" /> + <vif:Data_Capable_As_USB_Host_SOP value="true" /> + <vif:Data_Capable_As_USB_Device_SOP value="false" /> + <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP> + <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP> + <vif:DFP_VDO_Port_Number value="1" /> + <vif:Modal_Operation_Supported_SOP value="false" /> + <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP> + <vif:PID_SOP value="20570">505A</vif:PID_SOP> + <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP> + </vif:Component> +</vif:VIF>
\ No newline at end of file diff --git a/zephyr/projects/nissa/nereid_keyboard.dts b/zephyr/projects/nissa/joxer/keyboard.dts index ae104b1ead..04a620767a 100644 --- a/zephyr/projects/nissa/nereid_keyboard.dts +++ b/zephyr/projects/nissa/joxer/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,8 +6,11 @@ / { kblight { compatible = "cros-ec,kblight-pwm"; - pwms = <&pwm0 0 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; + /* + * Use 324 Hz so that 32Khz clock source is used, + * which is not gated in power saving mode. + */ + pwms = <&pwm0 0 PWM_HZ(324) PWM_POLARITY_NORMAL>; }; }; diff --git a/zephyr/projects/nissa/pujjo_motionsense.dts b/zephyr/projects/nissa/joxer/motionsense.dts index 69ebf04c59..537cc34451 100644 --- a/zephyr/projects/nissa/pujjo_motionsense.dts +++ b/zephyr/projects/nissa/joxer/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,8 +11,7 @@ /* * Interrupt bindings for sensor devices. */ - lsm6dso-int = &base_accel; - lis2dw12-int = &lid_accel; + bmi3xx-int = &base_accel; }; /* @@ -25,11 +24,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; base_mutex: base-mutex { - label = "BASE_MUTEX"; }; }; @@ -37,14 +34,14 @@ motionsense-rotation-ref { compatible = "cros-ec,motionsense-rotation-ref"; lid_rot_ref: lid-rotation-ref { - mat33 = <(-1) 0 0 - 0 1 0 + mat33 = <0 (-1) 0 + (-1) 0 0 0 0 (-1)>; }; - base_rot_ref: base-rot-ref { - mat33 = <(-1) 0 0 - 0 (-1) 0 + base_rot_ref: base-rotation-ref { + mat33 = <1 0 0 + 0 1 0 0 0 1>; }; }; @@ -59,93 +56,82 @@ * "struct als_drv_data_t" in accelgyro.h */ motionsense-sensor-data { - lsm6dso_data: lsm6dso-drv-data { - compatible = "cros-ec,drvdata-lsm6dso"; + bmi323_data: bmi323-drv-data { + compatible = "cros-ec,drvdata-bmi3xx"; status = "okay"; }; - lis2dw12_data: lis2dw12-drv-data { - compatible = "cros-ec,drvdata-lis2dw12"; + bma422_data: bma422-drv-data { + compatible = "cros-ec,drvdata-bma4xx"; status = "okay"; }; }; /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. - * TODO:(b/229577857) The first entries of the array must be + * TODO(b/238139272): The first entries of the array must be * accelerometers,then gyroscope. Fix this dependency in the DTS * processing which makes the devicetree entries independent. */ motionsense-sensor { lid_accel: lid-accel { - compatible = "cros-ec,lis2dw12"; + compatible = "cros-ec,bma4xx"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; port = <&i2c_ec_i2c_sensor>; rot-standard-ref = <&lid_rot_ref>; default-range = <2>; - drv-data = <&lis2dw12_data>; - i2c-spi-addr-flags = "LIS2DWL_ADDR0_FLAGS"; + drv-data = <&bma422_data>; + i2c-spi-addr-flags = "BMA4_I2C_ADDR_SECONDARY"; configs { compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; }; base_accel: base-accel { - compatible = "cros-ec,lsm6dso-accel"; + compatible = "cros-ec,bmi3xx-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; port = <&i2c_ec_i2c_sensor>; - /* - * May be replaced by alternate depending - * on board config. - */ rot-standard-ref = <&base_rot_ref>; - drv-data = <&lsm6dso_data>; + drv-data = <&bmi323_data>; configs { compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; }; base_gyro: base-gyro { - compatible = "cros-ec,lsm6dso-gyro"; + compatible = "cros-ec,bmi3xx-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; port = <&i2c_ec_i2c_sensor>; rot-standard-ref = <&base_rot_ref>; - drv-data = <&lsm6dso_data>; + drv-data = <&bmi323_data>; }; }; diff --git a/zephyr/projects/nissa/joxer/overlay.dts b/zephyr/projects/nissa/joxer/overlay.dts new file mode 100644 index 0000000000..a72072b5a3 --- /dev/null +++ b/zephyr/projects/nissa/joxer/overlay.dts @@ -0,0 +1,448 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; + gpio-wp = &gpio_ec_wp_odl; + int-wp = &int_wp_l; + }; + + ec-console { + compatible = "ec-console"; + disabled = "events", "lpc", "hostcmd"; + }; + + batteries { + default_battery: cosmx { + compatible = "cosmx,gh02047xl", "battery-smart"; + }; + dynapack_atl_gh02047xl { + compatible = "dynapack,atl_gh02047xl", "battery-smart"; + }; + dynapack_cosmx_gh02047xl { + compatible = "dynapack,cosmx_gh02047xl", "battery-smart"; + }; + smp_coslight_gh02047xl { + compatible = "smp,coslight_gh02047xl", "battery-smart"; + }; + smp_highpower_gh02047xl { + compatible = "smp,highpower_gh02047xl", "battery-smart"; + }; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-irqs = < + &int_power_button + &int_lid_open + >; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_power_button: power_button { + irq-pin = <&gpio_gsc_ec_pwr_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_vol_down: vol_down { + irq-pin = <&gpio_voldn_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_vol_up: vol_up { + irq-pin = <&gpio_volup_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_wp_l: wp_l { + irq-pin = <&gpio_ec_wp_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "switch_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&gpio_lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_tablet_mode: tablet_mode { + irq-pin = <&gpio_tablet_mode_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "gmr_tablet_switch_isr"; + }; + int_imu: ec_imu { + irq-pin = <&gpio_imu_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "bmi3xx_interrupt"; + }; + int_usb_c0: usb_c0 { + irq-pin = <&gpio_usb_c0_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_c0_interrupt"; + }; + int_usb_c1: usb_c1 { + irq-pin = <&gpio_sb_1>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_c1_interrupt"; + }; + }; + + unused-pins { + compatible = "unused-gpios"; + unused-gpios = <&gpioc 3 0>, + <&gpiod 4 0>, + <&gpioh 2 0>, + <&gpiol 4 0>; + }; + + named-gpios { + /* + * EC doesn't take any specific action on CC/SBU disconnect due to + * fault, but this definition is useful for hardware testing. + */ + gpio_usb_c0_prot_fault_odl: usb_c0_prot_fault_odl { + gpios = <&gpiok 6 GPIO_INPUT_PULL_UP>; + }; + + gpio_sb_1: sb_1 { + gpios = <&gpioe 6 0>; + no-auto-init; + }; + gpio_sb_2: sb_2 { + gpios = <&gpiof 0 0>; + no-auto-init; + }; + + gpio_sb_3: sb_3 { + gpios = <&gpioe 7 0>; + no-auto-init; + }; + gpio_sb_4: sb_4 { + gpios = <&gpioe 0 0>; + no-auto-init; + }; + gpio_fan_enable: fan-enable { + gpios = <&gpiol 4 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_power_led_gate: power_led_gate { + gpios = <&gpiof 1 GPIO_OUTPUT_LOW>; + }; + gpio_led_1_odl: led_1_odl { + gpios = <&gpioa 1 GPIO_OUTPUT_HIGH>; + }; + gpio_led_2_odl: led_2_odl { + gpios = <&gpioa 2 GPIO_OUTPUT_HIGH>; + }; + gpio_led_3_l: led_3_l { + gpios = <&gpiol 2 GPIO_OUTPUT_HIGH>; + }; + gpio_led_4_l: led_4_l { + gpios = <&gpiol 3 GPIO_OUTPUT_HIGH>; + }; + }; + + /* + * Aliases used for sub-board GPIOs. + */ + aliases { + /* USB-C: interrupt input. I2C pins are on i2c_ec_i2c_sub_usb_c1 */ + gpio-usb-c1-int-odl = &gpio_sb_1; + /* + * USB-A: VBUS enable output + * LTE: power enable output + */ + gpio-en-usb-a1-vbus = &gpio_sb_2; + /* + * HDMI: power enable output, HDMI enable output, + * and HPD input + */ + gpio-en-rails-odl = &gpio_sb_1; + gpio-hdmi-en-odl = &gpio_sb_4; + gpio-hpd-odl = &gpio_sb_3; + /* + * Enable S5 rails for LTE sub-board + */ + gpio-en-sub-s5-rails = &gpio_sb_2; + }; + + temp_memory: memory { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + memory { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_memory>; + }; + charger { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger>; + }; + ambient { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ambient>; + }; + }; + + usba { + compatible = "cros-ec,usba-port-enable-pins"; + /* + * sb_2 is only configured as GPIO when USB-A1 is present, + * but it's still safe to control when disabled. + * + * ILIM_SEL pins are referred to by legacy enum name, + * GPIO_USB*_ILIM_SEL. The one for port A1 is unused on + * sub-boards that don't have USB-A so is safe to control + * regardless of system configuration. + */ + enable-pins = <&gpio_en_usb_a0_vbus &gpio_sb_2>; + status = "okay"; + }; + + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &tcpci_mux_1>; + }; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + tcpci_mux_1: tcpci-mux-1 { + compatible = "parade,usbc-mux-ps8xxx"; + }; + }; + }; + fans { + compatible = "cros-ec,fans"; + + fan_0 { + pwms = <&pwm7 PWM_CHANNEL_7 PWM_KHZ(30) PWM_POLARITY_NORMAL>; + tach = <&tach1>; + rpm_min = <1500>; + rpm_start = <1500>; + rpm_max = <6500>; + enable_gpio = <&gpio_fan_enable>; + }; + }; +}; + +&gpio_acc_int_l { + gpios = <&gpioc 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_imu_int_l { + gpios = <&gpioj 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_vccin_aux_vid0 { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_vccin_aux_vid1 { + gpios = <&gpiok 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; + +&gpio_ec_prochot_odl { + gpios = <&gpioi 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; +}; + +&thermistor_3V3_51K1_47K_4050B { + status = "okay"; +}; + +&adc_ec_vsense_pp3300_s5 { + /* + * Voltage divider on input has 47k upper and 220k lower legs with 3 V + * full-scale reading on the ADC. Apply the largest possible multiplier + * (without overflowing int32) to get the best possible approximation + * of the actual ratio, but derate by a factor of two to ensure + * unexpectedly high values won't overflow. + */ + mul = <(715828 / 2)>; + div = <(589820 / 2)>; +}; + +&adc0 { + pinctrl-0 = <&adc0_ch0_gpi0_default + &adc0_ch2_gpi2_default + &adc0_ch3_gpi3_default + &adc0_ch13_gpl0_default + &adc0_ch14_gpl1_default>; + pinctrl-names = "default"; +}; + +&pinctrl { + i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { + gpio-voltage = "1v8"; + }; + i2c2_data_gpf7_default: i2c2_data_gpf7_default { + gpio-voltage = "1v8"; + }; +}; + + +&i2c0 { + label = "I2C_EEPROM"; + clock-frequency = <I2C_BITRATE_FAST>; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; + pinctrl-0 = <&i2c0_clk_gpb3_default + &i2c0_data_gpb4_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + label = "I2C_BATTERY"; + clock-frequency = <50000>; + pinctrl-0 = <&i2c1_clk_gpc1_default + &i2c1_data_gpc2_default>; + pinctrl-names = "default"; +}; + +&i2c2 { + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c2_clk_gpf6_default + &i2c2_data_gpf7_default>; + pinctrl-names = "default"; +}; + +&i2c4 { + label = "I2C_SUB_C1_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + pinctrl-0 = <&i2c4_clk_gpe0_default + &i2c4_data_gpe7_default>; + pinctrl-names = "default"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +&i2c_ec_i2c_sub_usb_c1 { + /* + * Dynamic speed setting is used for AP-controlled firmware update + * of PS8745 TCPC/redriver: the AP lowers speed to 400 kHz in order + * to use more efficient window programming, then sets it back when + * done. + */ + dynamic-speed; +}; + +&i2c5 { + label = "I2C_USB_C0_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + pinctrl-0 = <&i2c5_clk_gpa4_default + &i2c5_data_gpa5_default>; + pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port0: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +/* pwm for fan */ +&pwm7 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm7_gpa7_default>; + pinctrl-names = "default"; +}; + +/* fan tachometer sensor */ +&tach1 { + status = "okay"; + channel = <IT8XXX2_TACH_CHANNEL_A>; + pulses-per-round = <2>; + pinctrl-0 = <&tach1a_gpd7_default>; + pinctrl-names = "default"; +}; + +&usbpd0 { + status = "okay"; +}; diff --git a/zephyr/projects/nissa/nereid_power_signals.dts b/zephyr/projects/nissa/joxer/power_signals.dts index 0a3ead778b..8affae03b1 100644 --- a/zephyr/projects/nissa/nereid_power_signals.dts +++ b/zephyr/projects/nissa/joxer/power_signals.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -75,7 +75,7 @@ compatible = "intel,ap-pwrseq-gpio"; dbg-label = "VCCST_PWRGD output to PCH"; enum-name = "PWR_VCCST_PWRGD"; - gpios = <&gpioe 5 GPIO_OPEN_DRAIN>; + gpios = <&gpioe 5 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; output; }; pwr-imvp9-vrrdy-od { diff --git a/zephyr/projects/nissa/joxer/prj.conf b/zephyr/projects/nissa/joxer/prj.conf new file mode 100644 index 0000000000..a0de72294c --- /dev/null +++ b/zephyr/projects/nissa/joxer/prj.conf @@ -0,0 +1,19 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_JOXER=y + +# Ensure recovery key combination (esc+refresh+power) is reliable: b/236580049 +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y + +# Sensor drivers +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y +CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 + +# LED +CONFIG_PLATFORM_EC_LED_PWM=n +CONFIG_PLATFORM_EC_LED_COMMON=y diff --git a/zephyr/projects/nissa/nereid_pwm_leds.dts b/zephyr/projects/nissa/joxer/pwm_leds.dts index 9a981b7071..aa4a76b271 100644 --- a/zephyr/projects/nissa/nereid_pwm_leds.dts +++ b/zephyr/projects/nissa/joxer/pwm_leds.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,9 +7,9 @@ pwmleds { compatible = "pwm-leds"; pwm_led0: pwm_led_0 { - pwms = <&pwm1 1 PWM_HZ(324) PWM_POLARITY_INVERTED>, - <&pwm2 2 PWM_HZ(324) PWM_POLARITY_INVERTED>, - <&pwm3 3 PWM_HZ(324) PWM_POLARITY_INVERTED>; + pwms = <&pwm1 1 PWM_HZ(1296) PWM_POLARITY_INVERTED>, + <&pwm2 2 PWM_HZ(1296) PWM_POLARITY_INVERTED>, + <&pwm3 3 PWM_HZ(1296) PWM_POLARITY_INVERTED>; }; }; @@ -17,7 +17,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0>; - frequency = <1296>; /*<red green blue>*/ color-map-red = <100 0 0>; diff --git a/zephyr/projects/nissa/joxer/src/charger.c b/zephyr/projects/nissa/joxer/src/charger.c new file mode 100644 index 0000000000..b9454d8b80 --- /dev/null +++ b/zephyr/projects/nissa/joxer/src/charger.c @@ -0,0 +1,56 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> + +#include "battery.h" +#include "charger.h" +#include "console.h" +#include "driver/charger/sm5803.h" +#include "extpower.h" +#include "usb_pd.h" +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +int extpower_is_present(void) +{ + int port; + int rv; + bool acok; + + for (port = 0; port < board_get_usb_pd_port_count(); port++) { + rv = sm5803_is_acok(port, &acok); + if ((rv == EC_SUCCESS) && acok) + return 1; + } + + return 0; +} + +/* + * Joxer not have a GPIO indicating whether extpower is present, + * so detect using the charger(s). + */ +__override void board_check_extpower(void) +{ + static int last_extpower_present; + int extpower_present = extpower_is_present(); + + if (last_extpower_present ^ extpower_present) + extpower_handle_update(extpower_present); + + last_extpower_present = extpower_present; +} + +__override void board_hibernate(void) +{ + /* Shut down the chargers */ + if (board_get_usb_pd_port_count() == 2) + sm5803_hibernate(CHARGER_SECONDARY); + sm5803_hibernate(CHARGER_PRIMARY); + LOG_INF("Charger(s) hibernated"); + cflush(); +} diff --git a/zephyr/projects/nissa/joxer/src/fan.c b/zephyr/projects/nissa/joxer/src/fan.c new file mode 100644 index 0000000000..6d234b2fc3 --- /dev/null +++ b/zephyr/projects/nissa/joxer/src/fan.c @@ -0,0 +1,43 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/logging/log.h> + +#include "cros_cbi.h" +#include "fan.h" +#include "gpio/gpio.h" +#include "hooks.h" + +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +/* + * Joxer fan support + */ +static void fan_init(void) +{ + int ret; + uint32_t val; + /* + * Retrieve the fan config. + */ + ret = cros_cbi_get_fw_config(FW_FAN, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN); + return; + } + if (val != FW_FAN_PRESENT) { + /* Disable the fan */ + fan_set_count(0); + } else { + /* Configure the fan enable GPIO */ + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_fan_enable), + GPIO_OUTPUT); + } +} +DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/nissa/joxer/src/keyboard.c b/zephyr/projects/nissa/joxer/src/keyboard.c new file mode 100644 index 0000000000..48db40f53f --- /dev/null +++ b/zephyr/projects/nissa/joxer/src/keyboard.c @@ -0,0 +1,68 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/logging/log.h> + +#include "cros_cbi.h" +#include "ec_commands.h" +#include "gpio/gpio.h" +#include "hooks.h" +#include "keyboard_8042_sharedlib.h" +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +static const struct ec_response_keybd_config joxer_kb_legacy = { + .num_top_row_keys = 13, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_KBD_BKLIGHT_TOGGLE, /* T8 */ + TK_PLAY_PAUSE, /* T9 */ + TK_MICMUTE, /* T10 */ + TK_VOL_MUTE, /* T11 */ + TK_VOL_DOWN, /* T12 */ + TK_VOL_UP, /* T13 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &joxer_kb_legacy; +} + +/* + * Keyboard layout decided by FW config. + */ +static void kb_layout_init(void) +{ + int ret; + uint32_t val; + /* + * Retrieve the kb layout config. + */ + ret = cros_cbi_get_fw_config(FW_KB_LAYOUT, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", + FW_KB_LAYOUT); + return; + } + /* + * If keyboard is US2(FW_KB_LAYOUT_US2), we need translate right ctrl + * to backslash(\|) key. + */ + if (val == FW_KB_LAYOUT_US2) + set_scancode_set2(4, 0, get_scancode_set2(2, 7)); +} +DECLARE_HOOK(HOOK_INIT, kb_layout_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/nissa/joxer/src/led.c b/zephyr/projects/nissa/joxer/src/led.c new file mode 100644 index 0000000000..d66e5b27a6 --- /dev/null +++ b/zephyr/projects/nissa/joxer/src/led.c @@ -0,0 +1,181 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery LED control for nissa + */ +#include <stdint.h> + +#include "charge_manager.h" +#include "common.h" +#include "compile_time_macros.h" +#include "ec_commands.h" +#include "gpio.h" +#include "led_common.h" +#include "led_onoff_states.h" +#include "pwm.h" +#include "util.h" + +#define BAT_LED_ON_LVL 0 +#define BAT_LED_OFF_LVL 1 + +#define PWR_LED_ON_LVL 1 +#define PWR_LED_OFF_LVL 0 + +#define LED_SIDESEL_MB_PORT 0 +#define LED_SIDESEL_DB_PORT 1 + +__override const int led_charge_lvl_1 = 5; +__override const int led_charge_lvl_2 = 95; + +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_WHITE, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S0_BAT_LOW] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_DISCHARGE_S3] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_AMBER, + 0.5 * LED_ONE_SEC }, + { LED_OFF, 0.5 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_WHITE, + 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + }; + +__override const struct led_descriptor + led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { + [PWR_LED_STATE_ON] = { { EC_LED_COLOR_WHITE, LED_INDEFINITE } }, + [PWR_LED_STATE_SUSPEND_AC] = { { EC_LED_COLOR_WHITE, + 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [PWR_LED_STATE_SUSPEND_NO_AC] = { { EC_LED_COLOR_WHITE, + 1 * LED_ONE_SEC }, + { LED_OFF, + 1 * LED_ONE_SEC } }, + [PWR_LED_STATE_OFF] = { { LED_OFF, LED_INDEFINITE } }, + }; + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED, + EC_LED_ID_POWER_LED, +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +__override void led_set_color_battery(enum ec_led_colors color) +{ + int port; + + /* There are four battery leds, LED1/LED2 are on MB side and + * LED3/LED4 are on DB side. All leds are OFF by default. + */ + int led1, led2, led3, led4; + + led1 = led2 = led3 = led4 = BAT_LED_OFF_LVL; + + /* Check which port is the charging port, + * and turn on the corresponding led. + */ + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) { + port = charge_manager_get_active_charge_port(); + switch (port) { + case LED_SIDESEL_MB_PORT: + switch (color) { + case EC_LED_COLOR_AMBER: + led1 = BAT_LED_ON_LVL; + break; + case EC_LED_COLOR_WHITE: + led2 = BAT_LED_ON_LVL; + break; + default: /* LED_OFF and other unsupported colors */ + break; + } + break; + case LED_SIDESEL_DB_PORT: + switch (color) { + case EC_LED_COLOR_AMBER: + led3 = BAT_LED_ON_LVL; + break; + case EC_LED_COLOR_WHITE: + led4 = BAT_LED_ON_LVL; + break; + default: /* LED_OFF and other unsupported colors */ + break; + } + break; + default: /* Unknown charging port */ + break; + } + } else { + switch (color) { + case EC_LED_COLOR_AMBER: + led1 = BAT_LED_ON_LVL; + led3 = BAT_LED_ON_LVL; + break; + case EC_LED_COLOR_WHITE: + led2 = BAT_LED_ON_LVL; + led4 = BAT_LED_ON_LVL; + break; + default: /* LED_OFF and other unsupported colors */ + break; + } + } + + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_1_odl), led1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_2_odl), led2); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_3_l), led3); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_4_l), led4); +} + +__override void led_set_color_power(enum ec_led_colors color) +{ + if (color == EC_LED_COLOR_WHITE) + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_power_led_gate), + PWR_LED_ON_LVL); + else + /* LED_OFF and unsupported colors */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_power_led_gate), + PWR_LED_OFF_LVL); +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + brightness_range[EC_LED_COLOR_AMBER] = 1; + brightness_range[EC_LED_COLOR_WHITE] = 1; + } else if (led_id == EC_LED_ID_POWER_LED) { + brightness_range[EC_LED_COLOR_WHITE] = 1; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + led_auto_control(led_id, 0); + if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(EC_LED_COLOR_AMBER); + else if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(EC_LED_COLOR_WHITE); + else if (brightness[LED_OFF] != 0) + led_set_color_battery(LED_OFF); + else { + led_auto_control(led_id, 1); + led_set_color_battery(LED_OFF); + } + } else if (led_id == EC_LED_ID_POWER_LED) { + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_power(EC_LED_COLOR_WHITE); + else + led_set_color_power(LED_OFF); + } + + return EC_SUCCESS; +} diff --git a/zephyr/projects/nissa/src/nereid/usbc.c b/zephyr/projects/nissa/joxer/src/usbc.c index eeab449c32..5fec9ab544 100644 --- a/zephyr/projects/nissa/src/nereid/usbc.c +++ b/zephyr/projects/nissa/joxer/src/usbc.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -63,19 +63,7 @@ void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) __override bool pd_check_vbus_level(int port, enum vbus_level level) { - int vbus_voltage; - - /* If we're unable to speak to the charger, best to guess false */ - if (charger_get_vbus_voltage(port, &vbus_voltage)) { - return false; - } - - if (level == VBUS_SAFE0V) - return vbus_voltage < PD_V_SAFE0V_MAX; - else if (level == VBUS_PRESENT) - return vbus_voltage > PD_V_SAFE5V_MIN; - else - return vbus_voltage < PD_V_SINK_DISCONNECT_MAX; + return sm5803_check_vbus_level(port, level); } /* @@ -103,8 +91,8 @@ static void board_chargers_suspend(struct ap_power_ev_callback *const cb, fn = sm5803_disable_low_power_mode; break; default: - LOG_WRN("%s: power event %d is not recognized", - __func__, data.event); + LOG_WRN("%s: power event %d is not recognized", __func__, + data.event); return; } @@ -157,7 +145,7 @@ int board_set_active_charge_port(int port) } /* Don't enable anything (stop here) if no ports were requested */ - if (port == CHARGE_PORT_NONE) + if ((port == CHARGE_PORT_NONE) || (old_port == port)) return EC_SUCCESS; /* @@ -281,7 +269,7 @@ void board_reset_pd_mcu(void) */ } -#define INT_RECHECK_US 5000 +#define INT_RECHECK_US 5000 /* C0 interrupt line shared by BC 1.2 and charger */ diff --git a/zephyr/projects/nissa/nereid_generated.dts b/zephyr/projects/nissa/nereid/generated.dts index a588937f3c..bca58c478e 100644 --- a/zephyr/projects/nissa/nereid_generated.dts +++ b/zephyr/projects/nissa/nereid/generated.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -11,27 +11,22 @@ compatible = "named-adc-channels"; adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { - label = "EC_VSENSE_PP1050_PROC"; enum-name = "ADC_PP1050_PROC"; io-channels = <&adc0 14>; }; adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { - label = "EC_VSENSE_PP3300_S5"; enum-name = "ADC_PP3300_S5"; io-channels = <&adc0 0>; }; adc_temp_sensor_1: temp_sensor_1 { - label = "TEMP_SENSOR_1"; enum-name = "ADC_TEMP_SENSOR_1"; io-channels = <&adc0 2>; }; adc_temp_sensor_2: temp_sensor_2 { - label = "TEMP_SENSOR_2"; enum-name = "ADC_TEMP_SENSOR_2"; io-channels = <&adc0 3>; }; adc_temp_sensor_3: temp_sensor_3 { - label = "TEMP_SENSOR_3"; enum-name = "ADC_TEMP_SENSOR_3"; io-channels = <&adc0 13>; }; @@ -219,23 +214,23 @@ i2c_ec_i2c_eeprom: ec_i2c_eeprom { i2c-port = <&i2c0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_EEPROM"; }; i2c_ec_i2c_batt: ec_i2c_batt { i2c-port = <&i2c1>; - enum-name = "I2C_PORT_BATTERY"; + enum-names = "I2C_PORT_BATTERY"; }; i2c_ec_i2c_sensor: ec_i2c_sensor { i2c-port = <&i2c2>; - enum-name = "I2C_PORT_SENSOR"; + enum-names = "I2C_PORT_SENSOR"; }; i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { i2c-port = <&i2c4>; - enum-name = "I2C_PORT_USB_C1_TCPC"; + enum-names = "I2C_PORT_USB_C1_TCPC"; }; i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { i2c-port = <&i2c5>; - enum-name = "I2C_PORT_USB_C0_TCPC"; + enum-names = "I2C_PORT_USB_C0_TCPC"; }; }; }; diff --git a/zephyr/projects/nissa/nereid/keyboard.dts b/zephyr/projects/nissa/nereid/keyboard.dts new file mode 100644 index 0000000000..04a620767a --- /dev/null +++ b/zephyr/projects/nissa/nereid/keyboard.dts @@ -0,0 +1,22 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + kblight { + compatible = "cros-ec,kblight-pwm"; + /* + * Use 324 Hz so that 32Khz clock source is used, + * which is not gated in power saving mode. + */ + pwms = <&pwm0 0 PWM_HZ(324) PWM_POLARITY_NORMAL>; + }; +}; + +&pwm0 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm0_gpa0_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/nissa/nereid_motionsense.dts b/zephyr/projects/nissa/nereid/motionsense.dts index 596b3eb148..3a560d512a 100644 --- a/zephyr/projects/nissa/nereid_motionsense.dts +++ b/zephyr/projects/nissa/nereid/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -24,11 +24,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; base_mutex: base-mutex { - label = "BASE_MUTEX"; }; }; @@ -71,9 +69,9 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. - * TODO:(b/229577857) The first entries of the array must be + * TODO(b/238139272): The first entries of the array must be * accelerometers,then gyroscope. Fix this dependency in the DTS * processing which makes the devicetree entries independent. */ @@ -82,7 +80,6 @@ compatible = "cros-ec,bma4xx"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -94,11 +91,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -108,7 +103,6 @@ compatible = "cros-ec,bmi3xx-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; @@ -119,11 +113,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -133,7 +125,6 @@ compatible = "cros-ec,bmi3xx-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; diff --git a/zephyr/projects/nissa/nereid/nereid_vif.xml b/zephyr/projects/nissa/nereid/nereid_vif.xml new file mode 100644 index 0000000000..5cdbac739d --- /dev/null +++ b/zephyr/projects/nissa/nereid/nereid_vif.xml @@ -0,0 +1,350 @@ +<?xml version="1.0" encoding="utf-8"?>
+<vif:VIF xmlns:opt="http://usb.org/VendorInfoFileOptionalContent.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vif="http://usb.org/VendorInfoFile.xsd">
+ <vif:VIF_Specification>3.19</vif:VIF_Specification>
+ <vif:VIF_App>
+ <vif:Vendor>USB-IF</vif:Vendor>
+ <vif:Name>VIF Editor</vif:Name>
+ <vif:Version>3.2.4.0</vif:Version>
+ </vif:VIF_App>
+ <vif:Vendor_Name>Google</vif:Vendor_Name>
+ <vif:Model_Part_Number>Nereid</vif:Model_Part_Number>
+ <vif:Product_Revision>1</vif:Product_Revision>
+ <vif:TID>0</vif:TID>
+ <vif:VIF_Product_Type value="0">Port Product</vif:VIF_Product_Type>
+ <vif:Certification_Type value="1">Reference Platform</vif:Certification_Type>
+ <vif:Product>
+ <!--Product Level Content:-->
+ </vif:Product>
+ <vif:Component>
+ <!--Component 0: Port 0-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>0</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="false" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="0" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+ <vif:Component>
+ <!--Component 1: Port 1-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>1</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="true" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="1" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+</vif:VIF>
\ No newline at end of file diff --git a/zephyr/projects/nissa/nereid_overlay.dts b/zephyr/projects/nissa/nereid/overlay.dts index 158629b1e9..76f6b197be 100644 --- a/zephyr/projects/nissa/nereid_overlay.dts +++ b/zephyr/projects/nissa/nereid/overlay.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -143,45 +143,50 @@ gpio-en-sub-s5-rails = &gpio_sb_2; }; + temp_memory: memory { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; memory { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "DDR and SOC"; - enum-name = "TEMP_SENSOR_1"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_1>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_memory>; }; charger { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "Charger"; - enum-name = "TEMP_SENSOR_CHARGER"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_2>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger>; }; ambient { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "Ambient"; - enum-name = "TEMP_SENSOR_AMB"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_3>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ambient>; }; }; @@ -207,16 +212,12 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_usb_c0>; - }; - chg { - compatible = "siliconmitus,sm5803"; - status = "okay"; - port = <&i2c_ec_i2c_usb_c0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; }; - usb-muxes = <&virtual_mux_0>; }; port0-muxes { virtual_mux_0: virtual-mux-0 { @@ -226,20 +227,17 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_sub_usb_c1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &tcpci_mux_1>; }; - chg { - compatible = "siliconmitus,sm5803"; - status = "okay"; - port = <&i2c_ec_i2c_sub_usb_c1>; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; }; - /* - * Some sub-boards may disable all usb muxes in chain - * except virtual_mux_1 - */ - usb-muxes = <&virtual_mux_1 &tcpci_mux_1>; }; port1-muxes { virtual_mux_1: virtual-mux-1 { @@ -252,6 +250,23 @@ }; }; +&gpio_acc_int_l { + gpios = <&gpioc 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_imu_int_l { + gpios = <&gpioj 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_vccin_aux_vid0 { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; +&gpio_vccin_aux_vid1 { + gpios = <&gpiok 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; +}; + +&gpio_ec_prochot_odl { + gpios = <&gpioi 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; +}; + &thermistor_3V3_51K1_47K_4050B { status = "okay"; }; @@ -277,6 +292,21 @@ pinctrl-names = "default"; }; +&pinctrl { + i2c4_clk_gpe0_sleep: i2c4_clk_gpe0_sleep { + pinmuxs = <&pinctrle 0 IT8XXX2_ALT_DEFAULT>; + }; + i2c4_data_gpe7_sleep: i2c4_data_gpe7_sleep { + pinmuxs = <&pinctrle 7 IT8XXX2_ALT_DEFAULT>; + }; + i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { + gpio-voltage = "1v8"; + }; + i2c2_data_gpf7_default: i2c2_data_gpf7_default { + gpio-voltage = "1v8"; + }; +}; + &i2c0 { label = "I2C_EEPROM"; clock-frequency = <I2C_BITRATE_FAST>; @@ -284,7 +314,6 @@ cbi_eeprom: eeprom@50 { compatible = "atmel,at24"; reg = <0x50>; - label = "EEPROM_CBI"; size = <2048>; pagesize = <16>; address-width = <8>; @@ -297,7 +326,7 @@ &i2c1 { label = "I2C_BATTERY"; - clock-frequency = <I2C_BITRATE_STANDARD>; + clock-frequency = <50000>; pinctrl-0 = <&i2c1_clk_gpc1_default &i2c1_data_gpc2_default>; pinctrl-names = "default"; @@ -316,7 +345,31 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c4_clk_gpe0_default &i2c4_data_gpe7_default>; - pinctrl-names = "default"; + pinctrl-1 = <&i2c4_clk_gpe0_sleep + &i2c4_data_gpe7_sleep>; + pinctrl-names = "default", "sleep"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +&i2c_ec_i2c_sub_usb_c1 { + /* + * Dynamic speed setting is used for AP-controlled firmware update + * of PS8745 TCPC/redriver: the AP lowers speed to 400 kHz in order + * to use more efficient window programming, then sets it back when + * done. + */ + dynamic-speed; }; &i2c5 { @@ -325,4 +378,20 @@ pinctrl-0 = <&i2c5_clk_gpa4_default &i2c5_data_gpa5_default>; pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port0: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +&usbpd0 { + status = "okay"; }; diff --git a/zephyr/projects/nissa/nereid/power_signals.dts b/zephyr/projects/nissa/nereid/power_signals.dts new file mode 100644 index 0000000000..8affae03b1 --- /dev/null +++ b/zephyr/projects/nissa/nereid/power_signals.dts @@ -0,0 +1,223 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + chosen { + intel-ap-pwrseq,espi = &espi0; + }; + + common-pwrseq { + compatible = "intel,ap-pwrseq"; + + sys-pwrok-delay = <10>; + all-sys-pwrgd-timeout = <20>; + }; + + pwr-en-pp5000-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP5000_S5 enable output to regulator"; + enum-name = "PWR_EN_PP5000_A"; + gpios = <&gpiok 5 0>; + output; + }; + pwr-en-pp3300-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP3300_S5 enable output to LS"; + enum-name = "PWR_EN_PP3300_A"; + gpios = <&gpioc 5 0>; + output; + }; + pwr-pg-ec-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST power good from regulator"; + enum-name = "PWR_RSMRST"; + gpios = <&gpioe 1 0>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-pch-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST output to PCH"; + enum-name = "PWR_EC_PCH_RSMRST"; + gpios = <&gpioh 0 0>; + output; + }; + pwr-slp-s0-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S0_L input from PCH"; + enum-name = "PWR_SLP_S0"; + gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-s3-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S3_L input from PCH"; + enum-name = "PWR_SLP_S3"; + gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-sus-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_SUS_L input from PCH"; + enum-name = "PWR_SLP_SUS"; + gpios = <&gpiog 2 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-soc-dsw-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "DSW_PWROK output to PCH"; + enum-name = "PWR_EC_SOC_DSW_PWROK"; + gpios = <&gpiol 7 0>; + output; + }; + pwr-vccst-pwrgd-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VCCST_PWRGD output to PCH"; + enum-name = "PWR_VCCST_PWRGD"; + gpios = <&gpioe 5 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; + output; + }; + pwr-imvp9-vrrdy-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VRRDY input from IMVP9"; + enum-name = "PWR_IMVP9_VRRDY"; + gpios = <&gpioj 4 0>; + }; + pwr-pch-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PCH_PWROK output to PCH"; + enum-name = "PWR_PCH_PWROK"; + gpios = <&gpiod 6 GPIO_OPEN_DRAIN>; + output; + }; + pwr-ec-pch-sys-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_PWROK output to PCH"; + enum-name = "PWR_EC_PCH_SYS_PWROK"; + gpios = <&gpiof 2 0>; + output; + }; + pwr-sys-rst-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_RESET# output to PCH"; + enum-name = "PWR_SYS_RST"; + gpios = <&gpiod 1 (GPIO_ACTIVE_LOW|GPIO_OPEN_DRAIN)>; + output; + }; + pwr-slp-s4 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S4 virtual wire input from PCH"; + enum-name = "PWR_SLP_S4"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; + vw-invert; + }; + pwr-slp-s5 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S5 virtual wire input from PCH"; + enum-name = "PWR_SLP_S5"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5"; + vw-invert; + }; + pwr-all-sys-pwrgd { + /* + * This is a board level signal, since this + * signal needs some special processing. + */ + compatible = "intel,ap-pwrseq-external"; + dbg-label = "Combined all power good"; + enum-name = "PWR_ALL_SYS_PWRGD"; + }; + pwr-adc-pp3300 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP3300_PROC"; + enum-name = "PWR_DSW_PWROK"; + trigger-high = <&vcmp0>; + trigger-low = <&vcmp1>; + }; + pwr-adc-pp1p05 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP1P05_PROC"; + enum-name = "PWR_PG_PP1P05"; + trigger-high = <&vcmp2>; + trigger-low = <&vcmp3>; + }; + +}; + +/* + * Because the power signals directly reference the GPIOs, + * the correspinding named-gpios need to have no-auto-init set. + */ +&gpio_ec_soc_dsw_pwrok { + no-auto-init; +}; +&gpio_ec_soc_pch_pwrok_od { + no-auto-init; +}; +&gpio_ec_soc_rsmrst_l { + no-auto-init; +}; +&gpio_ec_soc_sys_pwrok { + no-auto-init; +}; +&gpio_ec_soc_vccst_pwrgd_od { + no-auto-init; +}; +&gpio_en_pp3300_s5 { + no-auto-init; +}; +&gpio_en_pp5000_s5 { + no-auto-init; +}; +&gpio_imvp91_vrrdy_od { + no-auto-init; +}; +&gpio_rsmrst_pwrgd_l { + no-auto-init; +}; +&gpio_slp_s0_l { + no-auto-init; +}; +&gpio_slp_s3_l { + no-auto-init; +}; +&gpio_slp_sus_l { + no-auto-init; +}; +&gpio_sys_rst_odl { + no-auto-init; +}; +&vcmp0 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_GREATER>; + /* + * This is 90% of nominal voltage considering voltage + * divider on ADC input. + */ + threshold-mv = <2448>; + io-channels = <&adc0 0>; +}; +&vcmp1 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_LESS_OR_EQUAL>; + threshold-mv = <2448>; + io-channels = <&adc0 0>; +}; +&vcmp2 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_GREATER>; + /* Setting at 90% of nominal voltage */ + threshold-mv = <945>; + io-channels = <&adc0 14>; +}; +&vcmp3 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_LESS_OR_EQUAL>; + threshold-mv = <945>; + io-channels = <&adc0 14>; +}; diff --git a/zephyr/projects/nissa/nereid/prj.conf b/zephyr/projects/nissa/nereid/prj.conf new file mode 100644 index 0000000000..75a5faba5d --- /dev/null +++ b/zephyr/projects/nissa/nereid/prj.conf @@ -0,0 +1,17 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_NEREID=y + +# Ensure recovery key combination (esc+refresh+power) is reliable: b/236580049 +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2=y + +# Sensor drivers +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y +CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 + +# No fan supported, and tach is default-enabled +CONFIG_TACH_IT8XXX2=n diff --git a/zephyr/projects/nissa/craask_pwm_leds.dts b/zephyr/projects/nissa/nereid/pwm_leds.dts index 592275ff71..aa4a76b271 100644 --- a/zephyr/projects/nissa/craask_pwm_leds.dts +++ b/zephyr/projects/nissa/nereid/pwm_leds.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,9 +7,9 @@ pwmleds { compatible = "pwm-leds"; pwm_led0: pwm_led_0 { - pwms = <&pwm2 2 0 PWM_POLARITY_INVERTED>, - <&pwm0 0 0 PWM_POLARITY_INVERTED>, - <&pwm1 1 0 PWM_POLARITY_INVERTED>; + pwms = <&pwm1 1 PWM_HZ(1296) PWM_POLARITY_INVERTED>, + <&pwm2 2 PWM_HZ(1296) PWM_POLARITY_INVERTED>, + <&pwm3 3 PWM_HZ(1296) PWM_POLARITY_INVERTED>; }; }; @@ -17,7 +17,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0>; - frequency = <324>; /*<red green blue>*/ color-map-red = <100 0 0>; @@ -25,7 +24,7 @@ color-map-blue = < 0 0 100>; color-map-yellow = < 0 50 50>; color-map-white = <100 100 100>; - color-map-amber = <100 5 0>; + color-map-amber = <100 15 0>; brightness-range = <100 100 100 0 0 0>; @@ -39,25 +38,23 @@ }; }; -/* Enable LEDs to work while CPU suspended */ - -&pwm0 { +&pwm1 { status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm0_gpc3>; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm1_gpa1_default>; pinctrl-names = "default"; }; -&pwm1 { +&pwm2 { status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm1_gpc2>; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm2_gpa2_default>; pinctrl-names = "default"; }; -&pwm2 { +&pwm3 { status = "okay"; - clock-bus = "NPCX_CLOCK_BUS_LFCLK"; - pinctrl-0 = <&pwm2_gpc4>; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm3_gpa3_default>; pinctrl-names = "default"; }; diff --git a/zephyr/projects/nissa/src/nereid/charger.c b/zephyr/projects/nissa/nereid/src/charger.c index a494988951..181e9a61fd 100644 --- a/zephyr/projects/nissa/src/nereid/charger.c +++ b/zephyr/projects/nissa/nereid/src/charger.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/nereid/src/hdmi.c b/zephyr/projects/nissa/nereid/src/hdmi.c new file mode 100644 index 0000000000..7e5708c6eb --- /dev/null +++ b/zephyr/projects/nissa/nereid/src/hdmi.c @@ -0,0 +1,28 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros_board_info.h> +#include "nissa_hdmi.h" + +__override void nissa_configure_hdmi_power_gpios(void) +{ + /* + * Nereid versions before 2 need hdmi-en-odl to be + * pulled down to enable VCC on the HDMI port, but later + * versions (and other boards) disconnect this so + * the port's VCC directly follows en-rails-odl. Only + * configure the GPIO if needed, to save power. + */ + uint32_t board_version = 0; + + /* CBI errors ignored, will configure the pin */ + cbi_get_board_version(&board_version); + if (board_version < 2) { + nissa_configure_hdmi_vcc(); + } + + /* Still always need core rails controlled */ + nissa_configure_hdmi_rails(); +} diff --git a/zephyr/projects/nissa/src/nereid/keyboard.c b/zephyr/projects/nissa/nereid/src/keyboard.c index d0d1406307..b69bb4da33 100644 --- a/zephyr/projects/nissa/src/nereid/keyboard.c +++ b/zephyr/projects/nissa/nereid/src/keyboard.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,8 +22,8 @@ static const struct ec_response_keybd_config nereid_kb_legacy = { .capabilities = KEYBD_CAP_SCRNLOCK_KEY, }; -__override const struct ec_response_keybd_config -*board_vivaldi_keybd_config(void) +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) { return &nereid_kb_legacy; } diff --git a/zephyr/projects/nissa/nereid/src/usbc.c b/zephyr/projects/nissa/nereid/src/usbc.c new file mode 100644 index 0000000000..48f7cfd9cb --- /dev/null +++ b/zephyr/projects/nissa/nereid/src/usbc.c @@ -0,0 +1,393 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> +#include <ap_power/ap_power.h> + +#include "charge_state_v2.h" +#include "chipset.h" +#include "hooks.h" +#include "usb_mux.h" +#include "system.h" +#include "driver/charger/sm5803.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" + +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it8xxx2_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + { + /* + * Sub-board: optional PS8745 TCPC+redriver. Behaves the same + * as PS8815. + */ + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C1_TCPC, + .addr_flags = PS8XXX_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + /* PS8745 implements TCPCI 2.0 */ + .flags = TCPC_FLAGS_TCPCI_REV2_0, + }, +}; + +/* Vconn control for integrated ITE TCPC */ +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* Vconn control is only for port 0 */ + if (port) + return; + + if (cc_pin == USBPD_CC_PIN_1) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_usb_c0_cc1_vconn), + !!enabled); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_usb_c0_cc2_vconn), + !!enabled); +} + +__override bool pd_check_vbus_level(int port, enum vbus_level level) +{ + return sm5803_check_vbus_level(port, level); +} + +/* + * Putting chargers into LPM when in suspend reduces power draw by about 8mW + * per charger, but also seems critical to correct operation in source mode: + * if chargers are not in LPM when a sink is first connected, VBUS sourcing + * works even if the partner is later removed (causing LPM entry) and + * reconnected (causing LPM exit). If in LPM initially, sourcing VBUS + * consistently causes the charger to report (apparently spurious) overcurrent + * failures. + * + * In short, this is important to making things work correctly but we don't + * understand why. + */ +static void board_chargers_suspend(struct ap_power_ev_callback *const cb, + const struct ap_power_ev_data data) +{ + void (*fn)(int chgnum); + + switch (data.event) { + case AP_POWER_SUSPEND: + fn = sm5803_enable_low_power_mode; + break; + case AP_POWER_RESUME: + fn = sm5803_disable_low_power_mode; + break; + default: + LOG_WRN("%s: power event %d is not recognized", __func__, + data.event); + return; + } + + fn(CHARGER_PRIMARY); + if (board_get_charger_chip_count() > 1) + fn(CHARGER_SECONDARY); +} + +static int board_chargers_suspend_init(const struct device *unused) +{ + static struct ap_power_ev_callback cb = { + .handler = board_chargers_suspend, + .events = AP_POWER_SUSPEND | AP_POWER_RESUME, + }; + ap_power_ev_add_callback(&cb); + return 0; +} +SYS_INIT(board_chargers_suspend_init, APPLICATION, 0); + +int board_set_active_charge_port(int port) +{ + int is_real_port = (port >= 0 && port < board_get_usb_pd_port_count()); + int i; + int old_port; + int rv; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + old_port = charge_manager_get_active_charge_port(); + LOG_INF("Charge update: p%d -> p%d", old_port, port); + + /* Check if port is sourcing VBUS. */ + if (port != CHARGE_PORT_NONE && charger_is_sourcing_otg_power(port)) { + LOG_WRN("Skip enable p%d: already sourcing", port); + return EC_ERROR_INVAL; + } + + /* Disable sinking on all ports except the desired one */ + for (i = 0; i < board_get_usb_pd_port_count(); i++) { + if (i == port) + continue; + + if (sm5803_vbus_sink_enable(i, 0)) + /* + * Do not early-return because this can fail during + * power-on which would put us into a loop. + */ + LOG_WRN("p%d: sink path disable failed.", i); + } + + /* Don't enable anything (stop here) if no ports were requested */ + if ((port == CHARGE_PORT_NONE) || (old_port == port)) + return EC_SUCCESS; + + /* + * Stop the charger IC from switching while changing ports. Otherwise, + * we can overcurrent the adapter we're switching to. (crbug.com/926056) + */ + if (old_port != CHARGE_PORT_NONE) + charger_discharge_on_ac(1); + + /* Enable requested charge port. */ + rv = sm5803_vbus_sink_enable(port, 1); + if (rv) + LOG_WRN("p%d: sink path enable failed: code %d", port, rv); + + /* Allow the charger IC to begin/continue switching. */ + charger_discharge_on_ac(0); + + return rv; +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * TCPC 0 is embedded in the EC and processes interrupts in the chip + * code (it83xx/intc.c). This function only needs to poll port C1 if + * present. + */ + uint16_t status = 0; + int regval; + + /* Is the C1 port present and its IRQ line asserted? */ + if (board_get_usb_pd_port_count() == 2 && + !gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) { + /* + * C1 IRQ is shared between BC1.2 and TCPC; poll TCPC to see if + * it asserted the IRQ. + */ + if (!tcpc_read16(1, TCPC_REG_ALERT, ®val)) { + if (regval) + status = PD_STATUS_TCPC_ALERT_1; + } + } + + return status; +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + if (port < 0 || port >= board_get_usb_pd_port_count()) + return; + + prev_en = charger_is_sourcing_otg_power(port); + + /* Disable Vbus */ + charger_enable_otg_power(port, 0); + + /* Discharge Vbus if previously enabled */ + if (prev_en) + sm5803_set_vbus_disch(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + enum ec_error_list rv; + + if (port < 0 || port > board_get_usb_pd_port_count()) { + LOG_WRN("Port C%d does not exist, cannot enable VBUS", port); + return EC_ERROR_INVAL; + } + + /* Disable sinking */ + rv = sm5803_vbus_sink_enable(port, 0); + if (rv) { + LOG_WRN("C%d failed to disable sinking: %d", port, rv); + return rv; + } + + /* Disable Vbus discharge */ + rv = sm5803_set_vbus_disch(port, 0); + if (rv) { + LOG_WRN("C%d failed to clear VBUS discharge: %d", port, rv); + return rv; + } + + /* Provide Vbus */ + rv = charger_enable_otg_power(port, 1); + if (rv) { + LOG_WRN("C%d failed to enable VBUS sourcing: %d", port, rv); + return rv; + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int rv; + const int current = rp == TYPEC_RP_3A0 ? 3000 : 1500; + + rv = charger_set_otg_current_voltage(port, current, 5000); + if (rv != EC_SUCCESS) { + LOG_WRN("Failed to set source ilimit on port %d to %d: %d", + port, current, rv); + } +} + +void board_reset_pd_mcu(void) +{ + /* + * Do nothing. The integrated TCPC for C0 lacks a dedicated reset + * command, and C1 (if present) doesn't have a reset pin connected + * to the EC. + */ +} + +#define INT_RECHECK_US 5000 + +/* C0 interrupt line shared by BC 1.2 and charger */ + +static void check_c0_line(void); +DECLARE_DEFERRED(check_c0_line); + +static void notify_c0_chips(void) +{ + usb_charger_task_set_event(0, USB_CHG_EVENT_BC12); + sm5803_interrupt(0); +} + +static void check_c0_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl))) { + notify_c0_chips(); + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); + } +} + +void usb_c0_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c0_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c0_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); +} + +/* C1 interrupt line shared by BC 1.2, TCPC, and charger */ +static void check_c1_line(void); +DECLARE_DEFERRED(check_c1_line); + +static void notify_c1_chips(void) +{ + schedule_deferred_pd_interrupt(1); + usb_charger_task_set_event(1, USB_CHG_EVENT_BC12); + /* Charger is handled in board_process_pd_alert */ +} + +static void check_c1_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips. + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) { + notify_c1_chips(); + hook_call_deferred(&check_c1_line_data, INT_RECHECK_US); + } +} + +void usb_c1_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c1_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c1_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c1_line_data, INT_RECHECK_US); +} + +/* + * Check state of IRQ lines at startup, ensuring an IRQ that happened before + * the EC started up won't get lost (leaving the IRQ line asserted and blocking + * any further interrupts on the port). + * + * Although the PD task will check for pending TCPC interrupts on startup, + * the charger sharing the IRQ will not be polled automatically. + */ +void board_handle_initial_typec_irq(void) +{ + check_c0_line(); + if (board_get_usb_pd_port_count() == 2) + check_c1_line(); +} +/* + * This must run after sub-board detection (which happens in EC main()), + * but isn't depended on by anything else either. + */ +DECLARE_HOOK(HOOK_INIT, board_handle_initial_typec_irq, HOOK_PRIO_LAST); + +/* + * Handle charger interrupts in the PD task. Not doing so can lead to a priority + * inversion where we fail to respond to TCPC alerts quickly enough because we + * don't get another edge on a shared IRQ until the charger interrupt is cleared + * (or the IRQ is polled again), which happens in the low-priority charger task: + * the high-priority type-C handler is thus blocked on the lower-priority + * charger. + * + * To avoid that, we run charger interrupts at the same priority. + */ +void board_process_pd_alert(int port) +{ + /* + * Port 0 doesn't use an external TCPC, so its interrupts don't need + * this special handling. + */ + if (port == 1 && + !gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) { + sm5803_handle_interrupt(port); + } +} + +int pd_snk_is_vbus_provided(int port) +{ + int chg_det = 0; + + sm5803_get_chg_det(port, &chg_det); + + return chg_det; +} diff --git a/zephyr/projects/nissa/nivviks_cbi.dts b/zephyr/projects/nissa/nivviks/cbi.dts index d8cc34ce77..112a2a885c 100644 --- a/zephyr/projects/nissa/nivviks_cbi.dts +++ b/zephyr/projects/nissa/nivviks/cbi.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/nivviks_generated.dts b/zephyr/projects/nissa/nivviks/generated.dts index 1c429ae32c..91718302b4 100644 --- a/zephyr/projects/nissa/nivviks_generated.dts +++ b/zephyr/projects/nissa/nivviks/generated.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -11,25 +11,25 @@ compatible = "named-adc-channels"; adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { - label = "EC_VSENSE_PP1050_PROC"; enum-name = "ADC_PP1050_PROC"; io-channels = <&adc0 4>; }; adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { - label = "EC_VSENSE_PP3300_S5"; enum-name = "ADC_PP3300_S5"; io-channels = <&adc0 6>; }; adc_temp_sensor_1: temp_sensor_1 { - label = "TEMP_SENSOR_1"; enum-name = "ADC_TEMP_SENSOR_1"; io-channels = <&adc0 0>; }; adc_temp_sensor_2: temp_sensor_2 { - label = "TEMP_SENSOR_2"; enum-name = "ADC_TEMP_SENSOR_2"; io-channels = <&adc0 1>; }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 10>; + }; }; named-gpios { @@ -188,10 +188,10 @@ gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; }; gpio_vccin_aux_vid0: vccin_aux_vid0 { - gpios = <&gpio9 2 GPIO_INPUT>; + gpios = <&gpio9 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; gpio_vccin_aux_vid1: vccin_aux_vid1 { - gpios = <&gpioe 3 GPIO_INPUT>; + gpios = <&gpioe 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; gpio_voldn_btn_odl: voldn_btn_odl { gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; @@ -208,23 +208,23 @@ i2c_ec_i2c_eeprom: ec_i2c_eeprom { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_EEPROM"; }; i2c_ec_i2c_sensor: ec_i2c_sensor { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_SENSOR"; + enum-names = "I2C_PORT_SENSOR"; }; i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_USB_C0_TCPC"; + enum-names = "I2C_PORT_USB_C0_TCPC"; }; i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { i2c-port = <&i2c5_1>; - enum-name = "I2C_PORT_USB_C1_TCPC"; + enum-names = "I2C_PORT_USB_C1_TCPC"; }; i2c_ec_i2c_batt: ec_i2c_batt { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_BATTERY"; + enum-names = "I2C_PORT_BATTERY"; }; }; }; @@ -234,7 +234,8 @@ pinctrl-0 = <&adc0_chan0_gp45 &adc0_chan1_gp44 &adc0_chan4_gp41 - &adc0_chan6_gp34>; + &adc0_chan6_gp34 + &adc0_chan10_gpe0>; pinctrl-names = "default"; }; diff --git a/zephyr/projects/nissa/pujjo_keyboard.dts b/zephyr/projects/nissa/nivviks/keyboard.dts index 71cb49ce65..00610e4e18 100644 --- a/zephyr/projects/nissa/pujjo_keyboard.dts +++ b/zephyr/projects/nissa/nivviks/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,13 +6,13 @@ / { kblight { compatible = "cros-ec,kblight-pwm"; - pwms = <&pwm6 6 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; + pwms = <&pwm6 6 PWM_HZ(2400) PWM_POLARITY_NORMAL>; }; }; &pwm6 { status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; pinctrl-0 = <&pwm6_gpc0>; pinctrl-names = "default"; }; diff --git a/zephyr/projects/nissa/nivviks_motionsense.dts b/zephyr/projects/nissa/nivviks/motionsense.dts index f42526db32..6297a07bf5 100644 --- a/zephyr/projects/nissa/nivviks_motionsense.dts +++ b/zephyr/projects/nissa/nivviks/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -25,11 +25,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; base_mutex: base-mutex { - label = "BASE_MUTEX"; }; }; @@ -65,7 +63,12 @@ * "struct als_drv_data_t" in accelgyro.h */ motionsense-sensor-data { - lsm6dso_data: lsm6dso-drv-data { + lsm6dso_accel_data: lsm6dso-accel-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + lsm6dso_gyro_data: lsm6dso-gyro-drv-data { compatible = "cros-ec,drvdata-lsm6dso"; status = "okay"; }; @@ -78,9 +81,9 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. - * TODO:(b/229577857) The first entries of the array must be + * TODO(b/238139272): The first entries of the array must be * accelerometers,then gyroscope. Fix this dependency in the DTS * processing which makes the devicetree entries independent. */ @@ -89,7 +92,6 @@ compatible = "cros-ec,lis2dw12"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -102,11 +104,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -116,7 +116,6 @@ compatible = "cros-ec,lsm6dso-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; @@ -126,16 +125,14 @@ * on board config. */ rot-standard-ref = <&base_rot_ref>; - drv-data = <&lsm6dso_data>; + drv-data = <&lsm6dso_accel_data>; configs { compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -145,13 +142,13 @@ compatible = "cros-ec,lsm6dso-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; port = <&i2c_ec_i2c_sensor>; rot-standard-ref = <&base_rot_ref>; - drv-data = <&lsm6dso_data>; + default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */ + drv-data = <&lsm6dso_gyro_data>; }; }; diff --git a/zephyr/projects/nissa/nivviks_overlay.dts b/zephyr/projects/nissa/nivviks/overlay.dts index bc10f510a5..c2d5e3f24b 100644 --- a/zephyr/projects/nissa/nivviks_overlay.dts +++ b/zephyr/projects/nissa/nivviks/overlay.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,6 +22,9 @@ default_battery: lgc { compatible = "lgc,ap18c8k", "battery-smart"; }; + lgc_ap19b8m { + compatible = "lgc,ap19b8m", "battery-smart"; + }; }; hibernate-wake-pins { @@ -83,28 +86,40 @@ }; named-gpios { - gpio_sb_1: sb_1 { + gpio_sb_1: sb-1 { gpios = <&gpio0 2 GPIO_PULL_UP>; no-auto-init; }; - gpio_sb_2: sb_2 { + gpio_sb_2: sb-2 { gpios = <&gpiod 4 GPIO_OUTPUT>; no-auto-init; }; - gpio_sb_3: sb_3 { - gpios = <&gpiof 4 GPIO_OPEN_DRAIN>; + /* + * Set I2C pins for type C sub-board to be low voltage (I2C5_1). + * We do this for all boards, since the pins are 3.3V tolerant, + * and the only 2 types of sub-boards used on nivviks both have + * type-C ports on them. + */ + gpio_sb_3: sb-3 { + gpios = <&gpiof 4 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; no-auto-init; }; - gpio_sb_4: sb_4 { - gpios = <&gpiof 5 GPIO_INPUT>; + gpio_sb_4: sb-4 { + gpios = <&gpiof 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; no-auto-init; }; gpio_fan_enable: fan-enable { gpios = <&gpio6 3 GPIO_OUTPUT>; no-auto-init; }; + ec-i2c-sensor-scl { + gpios = <&gpio9 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpio8 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; }; /* @@ -132,32 +147,50 @@ gpio-en-sub-s5-rails = &gpio_sb_2; }; + temp_memory: memory { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; memory { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "DDR and SOC"; - enum-name = "TEMP_SENSOR_1"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_1>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_memory>; }; charger { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "Charger"; - enum-name = "TEMP_SENSOR_2"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; - adc = <&adc_temp_sensor_2>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger>; + }; + ambient { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ambient>; }; }; @@ -183,21 +216,12 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_usb_c0>; - /* - * BC1.2 interrupt is shared with TCPC, so - * IRQ is not specified here and handled by - * usb_c0_interrupt. - */ + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_ec_i2c_usb_c0>; - }; - usb-muxes = <&virtual_mux_0>; }; port0-muxes { virtual_mux_0: virtual-mux-0 { @@ -211,30 +235,22 @@ port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_sub_usb_c1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_ec_i2c_sub_usb_c1>; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; }; - /* - * Some sub-boards may disable all usb muxes in chain - * except virtual_mux_1 - */ - usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; }; port1-muxes { virtual_mux_1: virtual-mux-1 { compatible = "cros-ec,usbc-mux-virtual"; }; - anx7483_mux_1: anx7483-mux-1 { - compatible = "analogix,anx7483"; - port = <&i2c_ec_i2c_sub_usb_c1>; - i2c-addr-flags = "ANX7483_I2C_ADDR0_FLAGS"; - }; }; }; @@ -243,7 +259,6 @@ fan_0 { pwms = <&pwm5 5 PWM_KHZ(1) PWM_POLARITY_NORMAL>; - pwm-frequency = <1000>; rpm_min = <2200>; rpm_start = <2200>; rpm_max = <4200>; @@ -252,24 +267,6 @@ }; }; - /* - * Set I2C pins for type C sub-board to be - * low voltage (I2C5_1). - * We do this for all boards, since the pins are - * 3.3V tolerant, and the only 2 types of sub-boards - * used on nivviks both have type-C ports on them. - */ - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_iof5 - &lvol_iof4 - &lvol_io90 /* EC_I2C_SENSOR_SCL */ - &lvol_io87 /* EC_I2C_SENSOR_SDA */ - &lvol_ioe3 /* VCCIN_AUX_VID1 */ - &lvol_io92 /* VCCIN_AUX_VID0 */ - >; - }; /* * Declare unused GPIOs so that they are shut down * and use minimal power @@ -320,7 +317,6 @@ cbi_eeprom: eeprom@50 { compatible = "atmel,at24"; reg = <0x50>; - label = "EEPROM_CBI"; size = <2048>; pagesize = <16>; address-width = <8>; @@ -336,11 +332,46 @@ &i2c3_0 { label = "I2C_USB_C0_TCPC"; clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + /* + * BC1.2 interrupt is shared with TCPC, so + * IRQ is not specified here and handled by + * usb_c0_interrupt. + */ + }; + + chg_port0: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; }; &i2c5_1 { label = "I2C_SUB_C1_TCPC"; clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; + + anx7483_mux_1: anx7483-mux-1@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "anx7483_set_default_tuning"; + }; }; &i2c7_0 { @@ -354,6 +385,7 @@ &pwm5 { status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; pinctrl-0 = <&pwm5_gpb7>; pinctrl-names = "default"; }; @@ -374,3 +406,13 @@ pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; pinctrl-names = "default"; }; + +/* + * Declare GPIOs that have leakage current caused by board issues here. NPCX ec + * will disable their input buffers before entering deep sleep and restore them + * after waking up automatically for better power consumption. + */ +&power_leakage_io { + leak-gpios = <&gpioa 4 0 + &gpiof 1 0>; +}; diff --git a/zephyr/projects/nissa/pujjo_power_signals.dts b/zephyr/projects/nissa/nivviks/power_signals.dts index 91876f0402..1d2b23069d 100644 --- a/zephyr/projects/nissa/pujjo_power_signals.dts +++ b/zephyr/projects/nissa/nivviks/power_signals.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/nivviks/prj.conf b/zephyr/projects/nissa/nivviks/prj.conf new file mode 100644 index 0000000000..af9e4e2586 --- /dev/null +++ b/zephyr/projects/nissa/nivviks/prj.conf @@ -0,0 +1,8 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_NIVVIKS=y +CONFIG_PLATFORM_EC_OCPC=y + +CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y diff --git a/zephyr/projects/nissa/nivviks_pwm_leds.dts b/zephyr/projects/nissa/nivviks/pwm_leds.dts index b6f657fb03..a265a5929e 100644 --- a/zephyr/projects/nissa/nivviks_pwm_leds.dts +++ b/zephyr/projects/nissa/nivviks/pwm_leds.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,7 +17,6 @@ compatible = "cros-ec,pwm-leds"; leds = <&pwm_led0>; - frequency = <324>; /*<red green blue>*/ color-map-red = <100 0 0>; @@ -25,9 +24,9 @@ color-map-blue = < 0 0 100>; color-map-yellow = < 0 50 50>; color-map-white = <100 100 100>; - color-map-amber = <100 20 100>; + color-map-amber = <100 0 0>; - brightness-range = <100 100 100 0 0 0>; + brightness-range = <0 0 100 0 0 100>; #address-cells = <1>; #size-cells = <0>; diff --git a/zephyr/projects/nissa/src/nivviks/charger.c b/zephyr/projects/nissa/nivviks/src/charger.c index 5a8bbe0e7a..e2f9f966e7 100644 --- a/zephyr/projects/nissa/src/nivviks/charger.c +++ b/zephyr/projects/nissa/nivviks/src/charger.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/src/nivviks/fan.c b/zephyr/projects/nissa/nivviks/src/fan.c index b177c6eab1..840049722c 100644 --- a/zephyr/projects/nissa/src/nivviks/fan.c +++ b/zephyr/projects/nissa/nivviks/src/fan.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -28,8 +28,7 @@ static void fan_init(void) */ ret = cros_cbi_get_fw_config(FW_FAN, &val); if (ret != 0) { - LOG_ERR("Error retrieving CBI FW_CONFIG field %d", - FW_FAN); + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN); return; } if (val != FW_FAN_PRESENT) { @@ -37,9 +36,8 @@ static void fan_init(void) fan_set_count(0); } else { /* Configure the fan enable GPIO */ - gpio_pin_configure_dt( - GPIO_DT_FROM_NODELABEL(gpio_fan_enable), - GPIO_OUTPUT); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_fan_enable), + GPIO_OUTPUT); } } DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/nissa/src/nivviks/form_factor.c b/zephyr/projects/nissa/nivviks/src/form_factor.c index 16132e4a6c..602b22baff 100644 --- a/zephyr/projects/nissa/src/nivviks/form_factor.c +++ b/zephyr/projects/nissa/nivviks/src/form_factor.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,9 +19,9 @@ LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); * Mainboard orientation support. */ -#define ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(base_rot_inverted)) -#define BASE_SENSOR SENSOR_ID(DT_NODELABEL(base_accel)) -#define BASE_GYRO SENSOR_ID(DT_NODELABEL(base_gyro)) +#define ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(base_rot_inverted)) +#define BASE_SENSOR SENSOR_ID(DT_NODELABEL(base_accel)) +#define BASE_GYRO SENSOR_ID(DT_NODELABEL(base_gyro)) static void form_factor_init(void) { diff --git a/zephyr/projects/nissa/src/nivviks/keyboard.c b/zephyr/projects/nissa/nivviks/src/keyboard.c index dc5c42e33a..f13d5bf78c 100644 --- a/zephyr/projects/nissa/src/nivviks/keyboard.c +++ b/zephyr/projects/nissa/nivviks/src/keyboard.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,8 +22,8 @@ static const struct ec_response_keybd_config nivviks_kb = { .capabilities = KEYBD_CAP_SCRNLOCK_KEY, }; -__override const struct ec_response_keybd_config -*board_vivaldi_keybd_config(void) +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) { return &nivviks_kb; } diff --git a/zephyr/projects/nissa/nivviks/src/led.c b/zephyr/projects/nissa/nivviks/src/led.c new file mode 100644 index 0000000000..c0e4645326 --- /dev/null +++ b/zephyr/projects/nissa/nivviks/src/led.c @@ -0,0 +1,53 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery LED control for nissa + */ +#include "common.h" +#include "ec_commands.h" +#include "led_common.h" +#include "led_onoff_states.h" +#include "led_pwm.h" + +__override const int led_charge_lvl_1 = 5; +__override const int led_charge_lvl_2 = 97; +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_BLUE, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { EC_LED_COLOR_BLUE, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0_BAT_LOW] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S3] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 3 * LED_ONE_SEC } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_AMBER, + 2 * LED_ONE_SEC }, + { EC_LED_COLOR_BLUE, + 2 * LED_ONE_SEC } }, + }; + +__override void led_set_color_battery(enum ec_led_colors color) +{ + switch (color) { + case EC_LED_COLOR_BLUE: + set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_BLUE); + break; + case EC_LED_COLOR_AMBER: + set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_AMBER); + break; + default: /* LED_OFF and other unsupported colors */ + set_pwm_led_color(EC_LED_ID_BATTERY_LED, -1); + break; + } +} diff --git a/zephyr/projects/nissa/src/nivviks/usbc.c b/zephyr/projects/nissa/nivviks/src/usbc.c index c068eba6f4..14fc5a071d 100644 --- a/zephyr/projects/nissa/src/nivviks/usbc.c +++ b/zephyr/projects/nissa/nivviks/src/usbc.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -54,8 +54,7 @@ int board_is_sourcing_vbus(int port) int board_set_active_charge_port(int port) { - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; int old_port; @@ -233,8 +232,7 @@ static void usbc_interrupt_trigger(int port) usb_charger_task_set_event(port, USB_CHG_EVENT_BC12); } -static inline void poll_usb_gpio(int port, - const struct gpio_dt_spec *gpio, +static inline void poll_usb_gpio(int port, const struct gpio_dt_spec *gpio, const struct deferred_data *ud) { if (!gpio_pin_get_dt(gpio)) { @@ -243,17 +241,15 @@ static inline void poll_usb_gpio(int port, } } -static void poll_c0_int (void) +static void poll_c0_int(void) { - poll_usb_gpio(0, - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), + poll_usb_gpio(0, GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), &poll_c0_int_data); } -static void poll_c1_int (void) +static void poll_c1_int(void) { - poll_usb_gpio(1, - GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), + poll_usb_gpio(1, GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), &poll_c1_int_data); } diff --git a/zephyr/projects/nissa/prj.conf b/zephyr/projects/nissa/prj.conf index df988de149..7a46a14076 100644 --- a/zephyr/projects/nissa/prj.conf +++ b/zephyr/projects/nissa/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -38,13 +38,13 @@ CONFIG_PLATFORM_EC_VBOOT_HASH=y CONFIG_AP=y CONFIG_AP_X86_INTEL_ADL=y CONFIG_ESPI=y -CONFIG_ESPI_LOG_LEVEL_ERR=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_HCDEBUG_OFF=y CONFIG_PLATFORM_EC_THROTTLE_AP=y CONFIG_PLATFORM_EC_PORT80=y +CONFIG_PLATFORM_EC_PORT80_QUIET=y # AP Power Sequencing CONFIG_AP_PWRSEQ=y @@ -52,6 +52,7 @@ CONFIG_X86_NON_DSX_PWRSEQ_ADL=y CONFIG_X86_NON_DSX_PWRSEQ_CONSOLE=y CONFIG_X86_NON_DSX_PWRSEQ_HOST_CMD=y CONFIG_AP_PWRSEQ_S0IX=y +CONFIG_AP_PWRSEQ_S0IX_ERROR_RECOVERY=y # I2C CONFIG_I2C=y @@ -79,7 +80,6 @@ CONFIG_PLATFORM_EC_MKBP_USE_GPIO_AND_HOST_EVENT=y # Temperature sensor support CONFIG_PLATFORM_EC_TEMP_SENSOR=y CONFIG_PLATFORM_EC_THERMISTOR=y -CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y CONFIG_PLATFORM_EC_TEMP_SENSOR_FIRST_READ_DELAY=y # CBI EEPROM support @@ -115,14 +115,11 @@ CONFIG_PLATFORM_EC_USB_PID=0x505a CONFIG_PLATFORM_EC_USB_PD_USB4=n CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n -# TODO(b/216085548): configure USB retimers CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=y CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y # ADL integrated muxes are slow: unblock PD CONFIG_PLATFORM_EC_USB_MUX_TASK=y CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y -# TODO(b/226411332): fix single task USB_CHG for Nissa -CONFIG_PLATFORM_EC_USB_CHARGER_SINGLE_TASK=n # USB-C TCPC and PPC standard options CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y @@ -135,6 +132,8 @@ CONFIG_PLATFORM_EC_USB_PORT_ENABLE_DYNAMIC=y # either SLGC55545 or PI5USB2546. CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART=y CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_CDP_SDP_ONLY=y +CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_CDP=y +CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_INVERTED=y # Battery support CONFIG_PLATFORM_EC_BATTERY=y @@ -146,8 +145,13 @@ CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y # Charger support CONFIG_PLATFORM_EC_CHARGER=y -CONFIG_PLATFORM_EC_OCPC=y CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC_CHARGER=y + +# Dynamically select PD voltage to maximize charger efficiency +CONFIG_PLATFORM_EC_USB_PD_DPS=y +# Reduce logging so that state transitions do not cause protocol issues +# pd dump [1-3] can be used to increase the debugging level +CONFIG_PLATFORM_EC_USB_PD_INITIAL_DEBUG_LEVEL=0 diff --git a/zephyr/projects/nissa/prj_craask.conf b/zephyr/projects/nissa/prj_craask.conf deleted file mode 100644 index bc0ac84307..0000000000 --- a/zephyr/projects/nissa/prj_craask.conf +++ /dev/null @@ -1,39 +0,0 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# EC chip configuration: NPCX993 -CONFIG_BOARD_CRAASK=y -CONFIG_CROS_FLASH_NPCX=y -CONFIG_CROS_SYSTEM_NPCX=y -CONFIG_SOC_SERIES_NPCX9=y -CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API=y -CONFIG_SYSCON=y -CONFIG_TACH_NPCX=n - -# Sensor drivers -CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y -CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y - -# Keyboard -CONFIG_CROS_KB_RAW_NPCX=y -CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=y - -# TCPC+PPC: both C0 and C1 (if present) are RAA489000 -CONFIG_PLATFORM_EC_USB_PD_TCPM_RAA489000=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_TCPC_LPM_EXIT_DEBOUNCE_US=100000 -# RAA489000 uses TCPCI but not a separate PPC, so custom function is required -CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y -# type C port 1 redriver -CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y - -# Charger driver and configuration -CONFIG_PLATFORM_EC_CHARGER_RAA489000=y -CONFIG_PLATFORM_EC_OCPC_DEF_RBATT_MOHMS=22 - -# VSENSE: PP3300_S5 & PP1050_PROC -CONFIG_ADC_CMP_NPCX=y -CONFIG_SENSOR=y -CONFIG_SENSOR_SHELL=n diff --git a/zephyr/projects/nissa/prj_nereid.conf b/zephyr/projects/nissa/prj_it8xxx2.conf index 4b0db30556..4d026a447f 100644 --- a/zephyr/projects/nissa/prj_nereid.conf +++ b/zephyr/projects/nissa/prj_it8xxx2.conf @@ -1,12 +1,17 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# EC chip configuration: IT83102 -CONFIG_BOARD_NEREID=y CONFIG_CROS_FLASH_IT8XXX2=y CONFIG_CROS_SYSTEM_IT8XXX2=y CONFIG_ESPI_IT8XXX2=y +CONFIG_FPU=y +# rv32iafc/ilp32f is not supported by the toolchain, so use soft-float +CONFIG_FLOAT_HARD=n + +# EC performance is bad; limiting sensor data rate helps keep it from degrading +# so much that it causes problems. b/240485526, b/230818312 +CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 # Allow more time for the charger to stabilise CONFIG_PLATFORM_EC_POWER_BUTTON_INIT_TIMEOUT=5 @@ -24,15 +29,10 @@ CONFIG_TASK_HOSTCMD_STACK_SIZE=1280 CONFIG_TASK_MOTIONSENSE_STACK_SIZE=1280 CONFIG_TASK_PD_INT_STACK_SIZE=1280 -# Sensor drivers -CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y -CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y -CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y - # TCPC+PPC: ITE on-chip for C0, PS8745 for optional C1 CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y -CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8745=y CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_CHARGER=y # SM5803 controls power path on both ports CONFIG_PLATFORM_EC_USB_PD_5V_CHARGER_CTRL=y @@ -48,11 +48,12 @@ CONFIG_PLATFORM_EC_USB_PD_DISCHARGE=n CONFIG_PLATFORM_EC_USB_PD_STARTUP_DELAY_MS=2000 # Charger driver and configuration +CONFIG_PLATFORM_EC_OCPC=y CONFIG_PLATFORM_EC_CHARGER_SM5803=y CONFIG_PLATFORM_EC_OCPC_DEF_RBATT_MOHMS=21 +CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=15000 # VSENSE: PP3300_S5 & PP1050_PROC CONFIG_VCMP_IT8XXX2=y CONFIG_SENSOR=y CONFIG_SENSOR_SHELL=n -CONFIG_TACH_IT8XXX2=n diff --git a/zephyr/projects/nissa/prj_nivviks.conf b/zephyr/projects/nissa/prj_nivviks.conf deleted file mode 100644 index 1c474823d9..0000000000 --- a/zephyr/projects/nissa/prj_nivviks.conf +++ /dev/null @@ -1,40 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# EC chip configuration: NPCX993 -CONFIG_BOARD_NIVVIKS=y -CONFIG_CROS_FLASH_NPCX=y -CONFIG_CROS_SYSTEM_NPCX=y -CONFIG_SOC_SERIES_NPCX9=y -CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API=y -CONFIG_SYSCON=y -CONFIG_TACH_NPCX=y -CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE=256 - -# Sensor drivers -CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y -CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y - -# Keyboard -CONFIG_CROS_KB_RAW_NPCX=y -CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=y - -# TCPC+PPC: both C0 and C1 (if present) are RAA489000 -CONFIG_PLATFORM_EC_USB_PD_TCPM_RAA489000=y -CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y -CONFIG_PLATFORM_EC_USB_PD_TCPC_LPM_EXIT_DEBOUNCE_US=100000 -# RAA489000 uses TCPCI but not a separate PPC, so custom function is required -CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y -# type C port 1 redriver -CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y - -# Charger driver and configuration -CONFIG_PLATFORM_EC_CHARGER_RAA489000=y -CONFIG_PLATFORM_EC_OCPC_DEF_RBATT_MOHMS=22 - -# VSENSE: PP3300_S5 & PP1050_PROC -CONFIG_ADC_CMP_NPCX=y -CONFIG_SENSOR=y -CONFIG_SENSOR_SHELL=n diff --git a/zephyr/projects/nissa/prj_pujjo.conf b/zephyr/projects/nissa/prj_npcx.conf index e7e9cbd357..4e76fbbbe1 100644 --- a/zephyr/projects/nissa/prj_pujjo.conf +++ b/zephyr/projects/nissa/prj_npcx.conf @@ -1,9 +1,8 @@ -# Copyright 2022 The ChromiumOS Authors. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. # EC chip configuration: NPCX993 -CONFIG_BOARD_PUJJO=y CONFIG_CROS_FLASH_NPCX=y CONFIG_CROS_SYSTEM_NPCX=y CONFIG_SOC_SERIES_NPCX9=y @@ -12,13 +11,15 @@ CONFIG_SYSCON=y CONFIG_TACH_NPCX=y CONFIG_SHELL_BACKEND_SERIAL_RX_RING_BUFFER_SIZE=256 -# Sensor drivers -CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y +# Common sensor drivers CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y # Keyboard CONFIG_CROS_KB_RAW_NPCX=y CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=y +# Ensure recovery key combination (esc+refresh+power) is reliable +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y # TCPC+PPC: both C0 and C1 (if present) are RAA489000 CONFIG_PLATFORM_EC_USB_PD_TCPM_RAA489000=y @@ -30,6 +31,10 @@ CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y # type C port 1 redriver CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y +# FRS enable +CONFIG_PLATFORM_EC_USB_PD_FRS=y +CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y + # Charger driver and configuration CONFIG_PLATFORM_EC_CHARGER_RAA489000=y CONFIG_PLATFORM_EC_OCPC_DEF_RBATT_MOHMS=22 diff --git a/zephyr/projects/nissa/pujjo/cbi.dts b/zephyr/projects/nissa/pujjo/cbi.dts new file mode 100644 index 0000000000..b5ba92bd9e --- /dev/null +++ b/zephyr/projects/nissa/pujjo/cbi.dts @@ -0,0 +1,190 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* Pujjo-specific fw_config fields. */ + nissa-fw-config { + /* + * FW_CONFIG field to enable KB back light or not. + */ + kb-bl { + enum-name = "FW_KB_BL"; + start = <3>; + size = <1>; + + no-kb-bl { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_BL_NOT_PRESENT"; + value = <0>; + }; + kb-bl-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_BL_PRESENT"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field for KB PWB present or not. + */ + kb-pwb { + enum-name = "FW_KB_PWB"; + start = <4>; + size = <1>; + + no-kb-pwb { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_PWB_NOT_PRESENT"; + value = <0>; + }; + kb-pwb-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_KB_PWB_PRESENT"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field for tablet present or not. + */ + tablet { + enum-name = "FW_TABLET"; + start = <5>; + size = <1>; + + no-tablet { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_TABLET_NOT_PRESENT"; + value = <0>; + }; + tablet-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_TABLET_PRESENT"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field for LTE board present or not. + * + * start = <6>; + * size = <1>; + */ + + /* + * FW_CONFIG field for SD card present or not. + * + * start = <7>; + * size = <1>; + */ + + /* + * FW_CONFIG field for pen present or not. + */ + pen { + enum-name = "FW_PEN"; + start = <8>; + size = <1>; + + no-pen { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_PEN_NOT_PRESENT"; + value = <0>; + }; + pen-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_PEN_PRESENT"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field for WF camera present or not. + * + * start = <9>; + * size = <1>; + */ + + /* + * FW_CONFIG field for multiple thermal table. + */ + therm-table { + enum-name = "THERM_TABLE"; + start = <10>; + size = <2>; + + therm-table-1 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "THERM_TABLE_1"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field for multiple audio module. + * + * start = <12>; + * size = <3>; + */ + + /* + * FW_CONFIG field for EXT_VR. + * + * start = <15>; + * size = <1>; + */ + + /* + * FW_CONFIG field for multiple wi-fi SAR. + * + * start = <16>; + * size = <2>; + */ + }; + + /* Pujjo-specific ssfc fields. */ + cbi-ssfc { + compatible = "named-cbi-ssfc"; + /* + * SSFC field to identify BASE motion sensor. + */ + base-sensor { + enum-name = "BASE_SENSOR"; + size = <2>; + + base_sensor_0: bmi323 { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <0>; + default; + }; + base_sensor_1: lsm6dsm { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <1>; + }; + }; + + /* + * SSFC field to identify LID motion sensor. + */ + lid-sensor { + enum-name = "LID_SENSOR"; + size = <2>; + + lid_sensor_0: bma422 { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <0>; + default; + }; + lid_sensor_1: lis2dw12 { + compatible = "named-cbi-ssfc-value"; + status = "okay"; + value = <1>; + }; + }; + }; +}; diff --git a/zephyr/projects/nissa/pujjo_generated.dts b/zephyr/projects/nissa/pujjo/generated.dts index 1c429ae32c..e6dd7bf5a3 100644 --- a/zephyr/projects/nissa/pujjo_generated.dts +++ b/zephyr/projects/nissa/pujjo/generated.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -11,25 +11,25 @@ compatible = "named-adc-channels"; adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { - label = "EC_VSENSE_PP1050_PROC"; enum-name = "ADC_PP1050_PROC"; io-channels = <&adc0 4>; }; adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { - label = "EC_VSENSE_PP3300_S5"; enum-name = "ADC_PP3300_S5"; io-channels = <&adc0 6>; }; adc_temp_sensor_1: temp_sensor_1 { - label = "TEMP_SENSOR_1"; enum-name = "ADC_TEMP_SENSOR_1"; io-channels = <&adc0 0>; }; adc_temp_sensor_2: temp_sensor_2 { - label = "TEMP_SENSOR_2"; enum-name = "ADC_TEMP_SENSOR_2"; io-channels = <&adc0 1>; }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 10>; + }; }; named-gpios { @@ -71,7 +71,7 @@ gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; }; gpio_ec_pch_wake_odl: ec_pch_wake_odl { - gpios = <&gpiob 0 GPIO_ODR_LOW>; + gpios = <&gpio8 0 GPIO_ODR_LOW>; }; gpio_ec_prochot_odl: ec_prochot_odl { gpios = <&gpiof 1 GPIO_ODR_HIGH>; @@ -83,7 +83,7 @@ gpios = <&gpioe 4 GPIO_OUTPUT>; }; gpio_ec_soc_int_odl: ec_soc_int_odl { - gpios = <&gpio8 0 GPIO_ODR_HIGH>; + gpios = <&gpiob 0 GPIO_ODR_HIGH>; enum-name = "GPIO_EC_INT_L"; }; gpio_ec_soc_pch_pwrok_od: ec_soc_pch_pwrok_od { @@ -194,11 +194,11 @@ gpios = <&gpioe 3 GPIO_INPUT>; }; gpio_voldn_btn_odl: voldn_btn_odl { - gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; + gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_VOLUME_DOWN_L"; }; gpio_volup_btn_odl: volup_btn_odl { - gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; + gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_VOLUME_UP_L"; }; }; @@ -208,23 +208,19 @@ i2c_ec_i2c_eeprom: ec_i2c_eeprom { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_EEPROM"; }; i2c_ec_i2c_sensor: ec_i2c_sensor { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_SENSOR"; + enum-names = "I2C_PORT_SENSOR"; }; i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_USB_C0_TCPC"; - }; - i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { - i2c-port = <&i2c5_1>; - enum-name = "I2C_PORT_USB_C1_TCPC"; + enum-names = "I2C_PORT_USB_C0_TCPC"; }; i2c_ec_i2c_batt: ec_i2c_batt { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_BATTERY"; + enum-names = "I2C_PORT_BATTERY"; }; }; }; @@ -234,7 +230,8 @@ pinctrl-0 = <&adc0_chan0_gp45 &adc0_chan1_gp44 &adc0_chan4_gp41 - &adc0_chan6_gp34>; + &adc0_chan6_gp34 + &adc0_chan10_gpe0>; pinctrl-names = "default"; }; @@ -257,12 +254,6 @@ pinctrl-names = "default"; }; -&i2c5_1 { - status = "okay"; - pinctrl-0 = <&i2c5_1_sda_scl_gpf4_f5>; - pinctrl-names = "default"; -}; - &i2c7_0 { status = "okay"; pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; @@ -281,10 +272,6 @@ status = "okay"; }; -&i2c_ctrl5 { - status = "okay"; -}; - &i2c_ctrl7 { status = "okay"; }; diff --git a/zephyr/projects/nissa/nivviks_keyboard.dts b/zephyr/projects/nissa/pujjo/keyboard.dts index 71cb49ce65..00610e4e18 100644 --- a/zephyr/projects/nissa/nivviks_keyboard.dts +++ b/zephyr/projects/nissa/pujjo/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,13 +6,13 @@ / { kblight { compatible = "cros-ec,kblight-pwm"; - pwms = <&pwm6 6 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; + pwms = <&pwm6 6 PWM_HZ(2400) PWM_POLARITY_NORMAL>; }; }; &pwm6 { status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; pinctrl-0 = <&pwm6_gpc0>; pinctrl-names = "default"; }; diff --git a/zephyr/projects/nissa/pujjo/motionsense.dts b/zephyr/projects/nissa/pujjo/motionsense.dts new file mode 100644 index 0000000000..d5719ef08f --- /dev/null +++ b/zephyr/projects/nissa/pujjo/motionsense.dts @@ -0,0 +1,233 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * Interrupt bindings for sensor devices. + */ + bmi3xx-int = &base_accel; + lsm6dsm-int = &base_accel; + lis2dw12-int = &lid_accel; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + lid_mutex: lid-mutex { + }; + + base_mutex: base-mutex { + }; + }; + + /* Rotation matrix used by drivers. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <0 (-1) 0 + (-1) 0 0 + 0 0 (-1)>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + bmi323_data: bmi323-drv-data { + compatible = "cros-ec,drvdata-bmi3xx"; + status = "okay"; + }; + + lsm6dsm_data_accel: lsm6dsm-accel-drv-data { + compatible = "cros-ec,drvdata-lsm6dsm"; + status = "okay"; + }; + + lsm6dsm_data_gyro: lsm6dsm-gyro-drv-data { + compatible = "cros-ec,drvdata-lsm6dsm"; + status = "okay"; + }; + + bma422_data: bma422-drv-data { + compatible = "cros-ec,drvdata-bma4xx"; + status = "okay"; + }; + + lis2dw12_data: lis2dw12-drv-data { + compatible = "cros-ec,drvdata-lis2dw12"; + status = "okay"; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + * TODO(b/238139272): The first entries of the array must be + * accelerometers,then gyroscope. Fix this dependency in the DTS + * processing which makes the devicetree entries independent. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,bma4xx"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&bma422_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,bmi3xx-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&bmi323_data>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_gyro: base-gyro { + compatible = "cros-ec,bmi3xx-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&bmi323_data>; + }; + }; + + motionsense-sensor-alt { + alt_lid_accel: alt-lid-accel { + compatible = "cros-ec,lis2dw12"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&lis2dw12_data>; + i2c-spi-addr-flags = "LIS2DWL_ADDR1_FLAGS"; + alternate-for = <&lid_accel>; + alternate-ssfc-indicator = <&lid_sensor_1>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + alt_base_accel: alt-base-accel { + compatible = "cros-ec,lsm6dsm-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&lsm6dsm_data_accel>; + alternate-for = <&base_accel>; + alternate-ssfc-indicator = <&base_sensor_1>; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + ec-rate = <(100 * USEC_PER_MSEC)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + ec-rate = <0>; + }; + }; + }; + + alt_base_gyro: alt-base-gyro { + compatible = "cros-ec,lsm6dsm-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + drv-data = <&lsm6dsm_data_gyro>; + alternate-for = <&base_gyro>; + alternate-ssfc-indicator = <&base_sensor_1>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_imu>; + /* list of sensors in force mode */ + accel-force-mode-sensors = <&lid_accel>; + }; +}; diff --git a/zephyr/projects/nissa/pujjo_overlay.dts b/zephyr/projects/nissa/pujjo/overlay.dts index c185d46e11..60b3b60003 100644 --- a/zephyr/projects/nissa/pujjo_overlay.dts +++ b/zephyr/projects/nissa/pujjo/overlay.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,8 +19,20 @@ }; batteries { - default_battery: lgc { - compatible = "lgc,ap18c8k", "battery-smart"; + default_battery: smp { + compatible = "smp,l22m3pg0", "battery-smart"; + }; + smp_l22m3pg1 { + compatible = "smp,l22m3pg1", "battery-smart"; + }; + sunwoda_l22d3pg0 { + compatible = "sunwoda,l22d3pg0", "battery-smart"; + }; + sunwoda_l22d3pg1 { + compatible = "sunwoda,l22d3pg1", "battery-smart"; + }; + celxpert_l22c3pg0 { + compatible = "celxpert,l22c3pg0", "battery-smart"; }; }; @@ -58,7 +70,7 @@ int_imu: ec_imu { irq-pin = <&gpio_imu_int_l>; flags = <GPIO_INT_EDGE_FALLING>; - handler = "lsm6dso_interrupt"; + handler = "motion_interrupt"; }; int_vol_down: vol_down { irq-pin = <&gpio_voldn_btn_odl>; @@ -75,36 +87,35 @@ flags = <GPIO_INT_EDGE_FALLING>; handler = "usb_interrupt"; }; - int_usb_c1: usb_c1 { - irq-pin = <&gpio_sb_1>; - flags = <GPIO_INT_EDGE_FALLING>; - handler = "usb_interrupt"; - }; }; named-gpios { - gpio_sb_1: sb_1 { - gpios = <&gpio0 2 GPIO_PULL_UP>; - no-auto-init; - }; - gpio_sb_2: sb_2 { gpios = <&gpiod 4 GPIO_OUTPUT>; no-auto-init; }; gpio_sb_3: sb_3 { - gpios = <&gpiof 4 GPIO_OPEN_DRAIN>; + gpios = <&gpiof 5 GPIO_OPEN_DRAIN>; no-auto-init; }; gpio_sb_4: sb_4 { - gpios = <&gpiof 5 GPIO_INPUT>; + gpios = <&gpiof 4 GPIO_INPUT>; no-auto-init; }; gpio_fan_enable: fan-enable { gpios = <&gpio6 3 GPIO_OUTPUT>; no-auto-init; }; + gpio_power_led: power_led { + gpios = <&gpioc 2 GPIO_OUTPUT_LOW>; + }; + gpio_led_1_odl: led_1_odl { + gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; + }; + gpio_led_2_odl: led_2_odl { + gpios = <&gpioc 3 GPIO_OUTPUT_LOW>; + }; }; /* @@ -112,12 +123,6 @@ */ aliases { /* - * Input GPIO when used with type-C port 1 - * Output when used with HDMI sub-board - */ - gpio-usb-c1-int-odl = &gpio_sb_1; - gpio-en-rails-odl = &gpio_sb_1; - /* * Sub-board with type A USB, enable. */ gpio-en-usb-a1-vbus = &gpio_sb_2; @@ -132,32 +137,50 @@ gpio-en-sub-s5-rails = &gpio_sb_2; }; + temp_cpu: cpu { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_ddr: ddr { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + named-temp-sensors { - memory { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "DDR and SOC"; - enum-name = "TEMP_SENSOR_1"; + compatible = "cros-ec,temp-sensors"; + cpu { temp_fan_off = <35>; temp_fan_max = <60>; - temp_host_high = <85>; - temp_host_halt = <90>; - temp_host_release_high = <80>; - adc = <&adc_temp_sensor_1>; + temp_host_high = <90>; + temp_host_halt = <100>; + temp_host_release_high = <85>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_cpu>; }; - charger { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_51K1_47K_4050B>; - label = "Charger"; - enum-name = "TEMP_SENSOR_2"; + ddr { temp_fan_off = <35>; temp_fan_max = <60>; - temp_host_high = <85>; - temp_host_halt = <90>; - temp_host_release_high = <80>; - adc = <&adc_temp_sensor_2>; + temp_host_high = <90>; + temp_host_halt = <100>; + temp_host_release_high = <85>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ddr>; + }; + ambient { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <90>; + temp_host_halt = <100>; + temp_host_release_high = <85>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ambient>; }; }; @@ -183,59 +206,18 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_usb_c0>; - /* - * BC1.2 interrupt is shared with TCPC, so - * IRQ is not specified here and handled by - * usb_c0_interrupt. - */ - }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_ec_i2c_usb_c0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; }; - usb-muxes = <&virtual_mux_0>; }; port0-muxes { virtual_mux_0: virtual-mux-0 { compatible = "cros-ec,usbc-mux-virtual"; }; }; - /* - * TODO(b:211693800): port1 may not be present on some - * sub-boards. - */ - port1@1 { - compatible = "named-usbc-port"; - reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - port = <&i2c_ec_i2c_sub_usb_c1>; - }; - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_ec_i2c_sub_usb_c1>; - }; - /* - * Some sub-boards may disable all usb muxes in chain - * except virtual_mux_1 - */ - usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; - }; - port1-muxes { - virtual_mux_1: virtual-mux-1 { - compatible = "cros-ec,usbc-mux-virtual"; - }; - anx7483_mux_1: anx7483-mux-1 { - compatible = "analogix,anx7483"; - port = <&i2c_ec_i2c_sub_usb_c1>; - i2c-addr-flags = "ANX7483_I2C_ADDR0_FLAGS"; - }; - }; }; fans { @@ -243,7 +225,6 @@ fan_0 { pwms = <&pwm5 5 PWM_KHZ(1) PWM_POLARITY_NORMAL>; - pwm-frequency = <1000>; rpm_min = <2200>; rpm_start = <2200>; rpm_max = <4200>; @@ -291,7 +272,6 @@ cbi_eeprom: eeprom@50 { compatible = "atmel,at24"; reg = <0x50>; - label = "EEPROM_CBI"; size = <2048>; pagesize = <16>; address-width = <8>; @@ -307,11 +287,23 @@ &i2c3_0 { label = "I2C_USB_C0_TCPC"; clock-frequency = <I2C_BITRATE_FAST_PLUS>; -}; -&i2c5_1 { - label = "I2C_SUB_C1_TCPC"; - clock-frequency = <I2C_BITRATE_FAST_PLUS>; + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + /* + * BC1.2 interrupt is shared with TCPC, so + * IRQ is not specified here and handled by + * usb_c0_interrupt. + */ + }; + + chg_port0: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; }; &i2c7_0 { @@ -325,6 +317,7 @@ &pwm5 { status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; pinctrl-0 = <&pwm5_gpb7>; pinctrl-names = "default"; }; @@ -345,3 +338,13 @@ pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; pinctrl-names = "default"; }; + +/* + * Declare GPIOs that have leakage current caused by board issues here. NPCX ec + * will disable their input buffers before entering deep sleep and restore them + * after waking up automatically for better power consumption. + */ +&power_leakage_io { + leak-gpios = <&gpioa 4 0 + &gpiof 1 0>; +}; diff --git a/zephyr/projects/nissa/nivviks_power_signals.dts b/zephyr/projects/nissa/pujjo/power_signals.dts index 91876f0402..1d2b23069d 100644 --- a/zephyr/projects/nissa/nivviks_power_signals.dts +++ b/zephyr/projects/nissa/pujjo/power_signals.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/nissa/pujjo/prj.conf b/zephyr/projects/nissa/pujjo/prj.conf new file mode 100644 index 0000000000..691b75a5d7 --- /dev/null +++ b/zephyr/projects/nissa/pujjo/prj.conf @@ -0,0 +1,23 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_PUJJO=y + +# Sensor drivers +CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM=y +CONFIG_PLATFORM_EC_ACCEL_BMA4XX=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y +CONFIG_PLATFORM_EC_ACCELGYRO_BMI3XX=y + +# Increase PD max power from default +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=65000 +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=3250 + +# LED +CONFIG_PLATFORM_EC_LED_PWM=n +CONFIG_PLATFORM_EC_LED_COMMON=y + +# CBI +CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK=y +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y
\ No newline at end of file diff --git a/zephyr/projects/nissa/pujjo/pujjo_vif.xml b/zephyr/projects/nissa/pujjo/pujjo_vif.xml new file mode 100644 index 0000000000..8e8f791c0c --- /dev/null +++ b/zephyr/projects/nissa/pujjo/pujjo_vif.xml @@ -0,0 +1,350 @@ +<?xml version="1.0" encoding="utf-8"?>
+<vif:VIF xmlns:opt="http://usb.org/VendorInfoFileOptionalContent.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vif="http://usb.org/VendorInfoFile.xsd">
+ <vif:VIF_Specification>3.19</vif:VIF_Specification>
+ <vif:VIF_App>
+ <vif:Vendor>USB-IF</vif:Vendor>
+ <vif:Name>VIF Editor</vif:Name>
+ <vif:Version>3.2.4.0</vif:Version>
+ </vif:VIF_App>
+ <vif:Vendor_Name>Google</vif:Vendor_Name>
+ <vif:Model_Part_Number>Pujjo</vif:Model_Part_Number>
+ <vif:Product_Revision>1</vif:Product_Revision>
+ <vif:TID>0</vif:TID>
+ <vif:VIF_Product_Type value="0">Port Product</vif:VIF_Product_Type>
+ <vif:Certification_Type value="0">End Product</vif:Certification_Type>
+ <vif:Product>
+ <!--Product Level Content:-->
+ </vif:Product>
+ <vif:Component>
+ <!--Component 0: Port 0-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>0</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="false" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="60000">60000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="400">20000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="400">20000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="0" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+ <vif:Component>
+ <!--Component 1: Port 1-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>1</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="true" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="60000">60000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="400">20000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="400">20000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="1" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+</vif:VIF>
\ No newline at end of file diff --git a/zephyr/projects/nissa/src/pujjo/charger.c b/zephyr/projects/nissa/pujjo/src/charger.c index c6209bdf75..c091e8cf42 100644 --- a/zephyr/projects/nissa/src/pujjo/charger.c +++ b/zephyr/projects/nissa/pujjo/src/charger.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -48,9 +48,7 @@ __override void board_check_extpower(void) __override void board_hibernate(void) { /* Shut down the chargers */ - if (board_get_usb_pd_port_count() == 2) - raa489000_hibernate(CHARGER_SECONDARY, true); - raa489000_hibernate(CHARGER_PRIMARY, true); + raa489000_hibernate(0, true); LOG_INF("Charger(s) hibernated"); cflush(); } diff --git a/zephyr/projects/nissa/src/pujjo/fan.c b/zephyr/projects/nissa/pujjo/src/fan.c index 8914774452..97323a7edf 100644 --- a/zephyr/projects/nissa/src/pujjo/fan.c +++ b/zephyr/projects/nissa/pujjo/src/fan.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -28,8 +28,7 @@ static void fan_init(void) */ ret = cros_cbi_get_fw_config(FW_FAN, &val); if (ret != 0) { - LOG_ERR("Error retrieving CBI FW_CONFIG field %d", - FW_FAN); + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN); return; } if (val != FW_FAN_PRESENT) { @@ -37,9 +36,8 @@ static void fan_init(void) fan_set_count(0); } else { /* Configure the fan enable GPIO */ - gpio_pin_configure_dt( - GPIO_DT_FROM_NODELABEL(gpio_fan_enable), - GPIO_OUTPUT); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_fan_enable), + GPIO_OUTPUT); } } DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/nissa/pujjo/src/form_factor.c b/zephyr/projects/nissa/pujjo/src/form_factor.c new file mode 100644 index 0000000000..ff3d64fe3e --- /dev/null +++ b/zephyr/projects/nissa/pujjo/src/form_factor.c @@ -0,0 +1,39 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> + +#include "accelgyro.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/accelgyro_bmi323.h" +#include "driver/accelgyro_lsm6dsm.h" +#include "hooks.h" +#include "motionsense_sensors.h" + +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +static bool use_alt_sensor; + +void motion_interrupt(enum gpio_signal signal) +{ + if (use_alt_sensor) + lsm6dsm_interrupt(signal); + else + bmi3xx_interrupt(signal); +} + +static void sensor_init(void) +{ + /* check which base sensor is used for motion_interrupt */ + use_alt_sensor = cros_cbi_ssfc_check_match( + CBI_SSFC_VALUE_ID(DT_NODELABEL(base_sensor_1))); + + motion_sensors_check_ssfc(); +} +DECLARE_HOOK(HOOK_INIT, sensor_init, HOOK_PRIO_POST_I2C); diff --git a/zephyr/projects/nissa/pujjo/src/hdmi.c b/zephyr/projects/nissa/pujjo/src/hdmi.c new file mode 100644 index 0000000000..9461e7c53e --- /dev/null +++ b/zephyr/projects/nissa/pujjo/src/hdmi.c @@ -0,0 +1,12 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "nissa_hdmi.h" + +__override void nissa_configure_hdmi_power_gpios(void) +{ + /* Pujjo needs to drive VCC enable but not core rails */ + nissa_configure_hdmi_vcc(); +} diff --git a/zephyr/projects/nissa/pujjo/src/keyboard.c b/zephyr/projects/nissa/pujjo/src/keyboard.c new file mode 100644 index 0000000000..1587030080 --- /dev/null +++ b/zephyr/projects/nissa/pujjo/src/keyboard.c @@ -0,0 +1,29 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" + +static const struct ec_response_keybd_config pujjo_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_BRIGHTNESS_DOWN, /* T5 */ + TK_BRIGHTNESS_UP, /* T6 */ + TK_MICMUTE, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &pujjo_kb; +} diff --git a/zephyr/projects/nissa/pujjo/src/led.c b/zephyr/projects/nissa/pujjo/src/led.c new file mode 100644 index 0000000000..0ff36b7d97 --- /dev/null +++ b/zephyr/projects/nissa/pujjo/src/led.c @@ -0,0 +1,134 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Pujjo specific PWM LED settings: there are 2 LEDs on each side of the board, + * each one can be controlled separately. The LED colors are white or amber, + * and the default behavior is tied to the charging process: both sides are + * amber while charging the battery and white when the battery is charged. + */ + +#include "common.h" +#include "led_onoff_states.h" +#include "led_common.h" +#include "gpio.h" + +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ##args) + +#define LED_OFF_LVL 1 +#define LED_ON_LVL 0 + +__override const int led_charge_lvl_1 = 5; + +__override const int led_charge_lvl_2 = 97; + +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_RED, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_GREEN, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S3] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_RED, 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_RED, 2 * LED_ONE_SEC }, + { EC_LED_COLOR_GREEN, + 2 * LED_ONE_SEC } }, + }; + +__override const struct led_descriptor + led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { + [PWR_LED_STATE_ON] = { { EC_LED_COLOR_WHITE, LED_INDEFINITE } }, + [PWR_LED_STATE_SUSPEND_AC] = { { EC_LED_COLOR_WHITE, + 1 * LED_ONE_SEC }, + { LED_OFF, 3 * LED_ONE_SEC } }, + [PWR_LED_STATE_SUSPEND_NO_AC] = { { EC_LED_COLOR_WHITE, + 1 * LED_ONE_SEC }, + { LED_OFF, + 3 * LED_ONE_SEC } }, + [PWR_LED_STATE_OFF] = { { LED_OFF, LED_INDEFINITE } }, + }; + +const enum ec_led_id supported_led_ids[] = { EC_LED_ID_BATTERY_LED, + EC_LED_ID_POWER_LED }; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +__override void led_set_color_power(enum ec_led_colors color) +{ + if (color == EC_LED_COLOR_WHITE) + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_power_led), + LED_ON_LVL); + else + /* LED_OFF and unsupported colors */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_power_led), + LED_OFF_LVL); +} + +__override void led_set_color_battery(enum ec_led_colors color) +{ + switch (color) { + case EC_LED_COLOR_AMBER: + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_1_odl), + LED_ON_LVL); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_2_odl), + LED_ON_LVL); + break; + case EC_LED_COLOR_RED: + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_1_odl), + LED_ON_LVL); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_2_odl), + LED_OFF_LVL); + break; + case EC_LED_COLOR_GREEN: + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_1_odl), + LED_OFF_LVL); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_2_odl), + LED_ON_LVL); + break; + default: /* LED_OFF and other unsupported colors */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_1_odl), + LED_OFF_LVL); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_led_2_odl), + LED_OFF_LVL); + break; + } +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + brightness_range[EC_LED_COLOR_RED] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + brightness_range[EC_LED_COLOR_GREEN] = 1; + } else if (led_id == EC_LED_ID_POWER_LED) { + brightness_range[EC_LED_COLOR_WHITE] = 1; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + if (brightness[EC_LED_COLOR_RED] != 0) + led_set_color_battery(EC_LED_COLOR_RED); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(EC_LED_COLOR_AMBER); + else if (brightness[EC_LED_COLOR_GREEN] != 0) + led_set_color_battery(EC_LED_COLOR_GREEN); + else + led_set_color_battery(LED_OFF); + } else if (led_id == EC_LED_ID_POWER_LED) { + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_power(EC_LED_COLOR_WHITE); + else + led_set_color_power(LED_OFF); + } + + return EC_SUCCESS; +} diff --git a/zephyr/projects/nissa/pujjo/src/usbc.c b/zephyr/projects/nissa/pujjo/src/usbc.c new file mode 100644 index 0000000000..5d3d94c243 --- /dev/null +++ b/zephyr/projects/nissa/pujjo/src/usbc.c @@ -0,0 +1,242 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> + +#include "charge_state_v2.h" +#include "chipset.h" +#include "hooks.h" +#include "usb_mux.h" +#include "system.h" +#include "driver/charger/isl923x_public.h" +#include "driver/retimer/anx7483_public.h" +#include "driver/tcpm/tcpci.h" +#include "driver/tcpm/raa489000.h" + +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C0_TCPC, + .addr_flags = RAA489000_TCPC0_I2C_FLAGS, + }, + .drv = &raa489000_tcpm_drv, + /* RAA489000 implements TCPCI 2.0 */ + .flags = TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_VBUS_MONITOR, + }, +}; + +int board_is_sourcing_vbus(int port) +{ + int regval; + + tcpc_read(port, TCPC_REG_POWER_STATUS, ®val); + return !!(regval & TCPC_REG_POWER_STATUS_SOURCING_VBUS); +} + +int board_set_active_charge_port(int port) +{ + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + int old_port; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + old_port = charge_manager_get_active_charge_port(); + + LOG_INF("New chg p%d", port); + + /* Disable all ports. */ + if (port == CHARGE_PORT_NONE) { + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + tcpc_write(i, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_SNK_CTRL_LOW); + raa489000_enable_asgate(i, false); + } + + return EC_SUCCESS; + } + + /* Check if port is sourcing VBUS. */ + if (board_is_sourcing_vbus(port)) { + LOG_WRN("Skip enable p%d", port); + return EC_ERROR_INVAL; + } + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + if (i == port) + continue; + + if (tcpc_write(i, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_SNK_CTRL_LOW)) + LOG_WRN("p%d: sink path disable failed.", i); + raa489000_enable_asgate(i, false); + } + + /* + * Stop the charger IC from switching while changing ports. Otherwise, + * we can overcurrent the adapter we're switching to. (crbug.com/926056) + */ + if (old_port != CHARGE_PORT_NONE) + charger_discharge_on_ac(1); + + /* Enable requested charge port. */ + if (raa489000_enable_asgate(port, true) || + tcpc_write(port, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_SNK_CTRL_HIGH)) { + LOG_WRN("p%d: sink path enable failed.", port); + charger_discharge_on_ac(0); + return EC_ERROR_UNKNOWN; + } + + /* Allow the charger IC to begin/continue switching. */ + charger_discharge_on_ac(0); + + return EC_SUCCESS; +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + int regval; + + /* + * The interrupt line is shared between the TCPC and BC1.2 detector IC. + * Therefore, go out and actually read the alert registers to report the + * alert status. + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl))) { + if (!tcpc_read16(0, TCPC_REG_ALERT, ®val)) { + /* The TCPCI Rev 1.0 spec says to ignore bits 14:12. */ + if (!(tcpc_config[0].flags & TCPC_FLAGS_TCPCI_REV2_0)) + regval &= ~((1 << 14) | (1 << 13) | (1 << 12)); + + if (regval) + status |= PD_STATUS_TCPC_ALERT_0; + } + } + return status; +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS */ + tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_SRC_CTRL_LOW); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) +{ + if (port < 0 || port >= CONFIG_USB_PD_PORT_MAX_COUNT) + return; + + raa489000_set_output_current(port, rp); +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + if (port >= CONFIG_USB_PD_PORT_MAX_COUNT) + return EC_ERROR_INVAL; + + /* Disable charging. */ + rv = tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_SNK_CTRL_LOW); + if (rv) + return rv; + + /* Our policy is not to source VBUS when the AP is off. */ + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + return EC_ERROR_NOT_POWERED; + + /* Provide Vbus. */ + rv = tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_SRC_CTRL_HIGH); + if (rv) + return rv; + + rv = raa489000_enable_asgate(port, true); + if (rv) + return rv; + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +void board_reset_pd_mcu(void) +{ + /* + * TODO(b:147316511): could send a reset command to the TCPC here + * if needed. + */ +} + +/* + * Because the TCPCs and BC1.2 chips share interrupt lines, it's possible + * for an interrupt to be lost if one asserts the IRQ, the other does the same + * then the first releases it: there will only be one falling edge to trigger + * the interrupt, and the line will be held low. We handle this by running a + * deferred check after a falling edge to see whether the IRQ is still being + * asserted. If it is, we assume an interrupt may have been lost and we need + * to poll each chip for events again. + */ +#define USBC_INT_POLL_DELAY_US 5000 + +static void poll_c0_int(void); +DECLARE_DEFERRED(poll_c0_int); + +static void usbc_interrupt_trigger(int port) +{ + schedule_deferred_pd_interrupt(port); + usb_charger_task_set_event(port, USB_CHG_EVENT_BC12); +} + +static inline void poll_usb_gpio(int port, const struct gpio_dt_spec *gpio, + const struct deferred_data *ud) +{ + if (!gpio_pin_get_dt(gpio)) { + usbc_interrupt_trigger(port); + hook_call_deferred(ud, USBC_INT_POLL_DELAY_US); + } +} + +static void poll_c0_int(void) +{ + poll_usb_gpio(0, GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), + &poll_c0_int_data); +} + +void usb_interrupt(enum gpio_signal signal) +{ + int port; + const struct deferred_data *ud; + + if (signal == GPIO_SIGNAL(DT_NODELABEL(gpio_usb_c0_int_odl))) { + port = 0; + ud = &poll_c0_int_data; + } + /* + * We've just been called from a falling edge, so there's definitely + * no lost IRQ right now. Cancel any pending check. + */ + hook_call_deferred(ud, -1); + /* Trigger polling of TCPC and BC1.2 in respective tasks */ + usbc_interrupt_trigger(port); + /* Check for lost interrupts in a bit */ + hook_call_deferred(ud, USBC_INT_POLL_DELAY_US); +} diff --git a/zephyr/projects/nissa/src/board_power.c b/zephyr/projects/nissa/src/board_power.c index 8180b2c8af..d7fb4aeffe 100644 --- a/zephyr/projects/nissa/src/board_power.c +++ b/zephyr/projects/nissa/src/board_power.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,7 +19,7 @@ LOG_MODULE_DECLARE(ap_pwrseq, LOG_LEVEL_INF); -#define X86_NON_DSX_ADLP_NONPWRSEQ_FORCE_SHUTDOWN_TO_MS 5 +#define X86_NON_DSX_ADLP_NONPWRSEQ_FORCE_SHUTDOWN_TO_MS 5 static bool s0_stable; @@ -44,11 +44,11 @@ void board_ap_power_force_shutdown(void) power_signal_enable(PWR_PG_PP1P05); } - power_signal_set(PWR_EC_PCH_RSMRST, 0); power_signal_set(PWR_EC_SOC_DSW_PWROK, 0); + power_signal_set(PWR_EC_PCH_RSMRST, 0); while (power_signal_get(PWR_RSMRST) == 0 && - power_signal_get(PWR_SLP_SUS) == 0 && timeout_ms > 0) { + power_signal_get(PWR_SLP_SUS) == 0 && timeout_ms > 0) { k_msleep(1); timeout_ms--; } @@ -88,10 +88,9 @@ void board_ap_power_action_g3_s5(void) power_signal_set(PWR_EN_PP3300_A, 1); power_wait_signals_timeout(IN_PGOOD_ALL_CORE, - AP_PWRSEQ_DT_VALUE(wait_signal_timeout)); + AP_PWRSEQ_DT_VALUE(wait_signal_timeout)); - generate_ec_soc_dsw_pwrok_handler( - AP_PWRSEQ_DT_VALUE(dsw_pwrok_delay)); + generate_ec_soc_dsw_pwrok_handler(AP_PWRSEQ_DT_VALUE(dsw_pwrok_delay)); s0_stable = false; } @@ -132,8 +131,8 @@ int board_ap_power_assert_pch_power_ok(void) bool board_ap_power_check_power_rails_enabled(void) { return power_signal_get(PWR_EN_PP3300_A) && - power_signal_get(PWR_EN_PP5000_A) && - power_signal_get(PWR_EC_SOC_DSW_PWROK); + power_signal_get(PWR_EN_PP5000_A) && + power_signal_get(PWR_EC_SOC_DSW_PWROK); } int board_power_signal_get(enum power_signal signal) @@ -154,7 +153,7 @@ int board_power_signal_get(enum power_signal signal) return 0; } if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_all_sys_pwrgd))) { + GPIO_DT_FROM_NODELABEL(gpio_all_sys_pwrgd))) { return 0; } if (!power_signal_get(PWR_PG_PP1P05)) { diff --git a/zephyr/projects/nissa/src/common.c b/zephyr/projects/nissa/src/common.c index e1e7aaf7e9..fe25d1374d 100644 --- a/zephyr/projects/nissa/src/common.c +++ b/zephyr/projects/nissa/src/common.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -81,8 +81,8 @@ static void board_setup_init(void) */ DECLARE_HOOK(HOOK_INIT, board_setup_init, HOOK_PRIO_INIT_I2C); -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { int icl = MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT); @@ -124,7 +124,7 @@ enum nissa_sub_board_type nissa_get_sb_type(void) if (sb != NISSA_SB_UNKNOWN) return sb; - sb = NISSA_SB_NONE; /* Defaults to none */ + sb = NISSA_SB_NONE; /* Defaults to none */ ret = cros_cbi_get_fw_config(FW_SUB_BOARD, &val); if (ret != 0) { LOG_WRN("Error retrieving CBI FW_CONFIG field %d", diff --git a/zephyr/projects/nissa/src/craask/led.c b/zephyr/projects/nissa/src/craask/led.c deleted file mode 100644 index a0c0447419..0000000000 --- a/zephyr/projects/nissa/src/craask/led.c +++ /dev/null @@ -1,47 +0,0 @@ -/* Copyright 2022 The ChromiumOS Authors. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery LED control for nissa - */ -#include "common.h" -#include "ec_commands.h" -#include "led_common.h" -#include "led_onoff_states.h" -#include "led_pwm.h" - -__override const int led_charge_lvl_1 = 5; -__override const int led_charge_lvl_2 = 97; -__override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_DISCHARGE_S3] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_BLUE, 2 * LED_ONE_SEC} }, -}; - -__override void led_set_color_battery(enum ec_led_colors color) -{ - switch (color) { - case EC_LED_COLOR_RED: - set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_RED); - break; - case EC_LED_COLOR_BLUE: - set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_BLUE); - break; - case EC_LED_COLOR_AMBER: - set_pwm_led_color(EC_LED_ID_BATTERY_LED, EC_LED_COLOR_AMBER); - break; - default: /* LED_OFF and other unsupported colors */ - set_pwm_led_color(EC_LED_ID_BATTERY_LED, -1); - break; - } -} diff --git a/zephyr/projects/nissa/src/led.c b/zephyr/projects/nissa/src/led.c index 27c78f8051..2617d0092d 100644 --- a/zephyr/projects/nissa/src/led.c +++ b/zephyr/projects/nissa/src/led.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -13,20 +13,25 @@ __override const int led_charge_lvl_1 = 5; __override const int led_charge_lvl_2 = 97; __override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_RED, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_RED, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_GREEN, 2 * LED_ONE_SEC} }, -}; + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = { { EC_LED_COLOR_RED, + LED_INDEFINITE } }, + [STATE_CHARGING_LVL_2] = { { EC_LED_COLOR_AMBER, + LED_INDEFINITE } }, + [STATE_CHARGING_FULL_CHARGE] = { { EC_LED_COLOR_GREEN, + LED_INDEFINITE } }, + [STATE_DISCHARGE_S0] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S0_BAT_LOW] = { { EC_LED_COLOR_AMBER, + 1 * LED_ONE_SEC }, + { LED_OFF, 3 * LED_ONE_SEC } }, + [STATE_DISCHARGE_S3] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_DISCHARGE_S5] = { { LED_OFF, LED_INDEFINITE } }, + [STATE_BATTERY_ERROR] = { { EC_LED_COLOR_RED, 1 * LED_ONE_SEC }, + { LED_OFF, 1 * LED_ONE_SEC } }, + [STATE_FACTORY_TEST] = { { EC_LED_COLOR_RED, 2 * LED_ONE_SEC }, + { EC_LED_COLOR_GREEN, + 2 * LED_ONE_SEC } }, + }; __override void led_set_color_battery(enum ec_led_colors color) { diff --git a/zephyr/projects/nissa/src/sub_board.c b/zephyr/projects/nissa/src/sub_board.c index 2a3333bab9..89a9954037 100644 --- a/zephyr/projects/nissa/src/sub_board.c +++ b/zephyr/projects/nissa/src/sub_board.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,25 +7,30 @@ #include <ap_power/ap_power.h> #include <zephyr/drivers/gpio.h> +#include <zephyr/drivers/pinctrl.h> #include <zephyr/init.h> #include <zephyr/kernel.h> #include <zephyr/sys/printk.h> +#include "cros_board_info.h" #include "driver/tcpm/tcpci.h" #include "gpio/gpio_int.h" #include "hooks.h" #include "usb_charge.h" #include "usb_pd.h" +#include "usbc/usb_muxes.h" #include "task.h" #include "nissa_common.h" +#include "nissa_hdmi.h" LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); +#if NISSA_BOARD_HAS_HDMI_SUPPORT static void hdmi_power_handler(struct ap_power_ev_callback *cb, struct ap_power_ev_data data) { - /* Enable rails for S3 */ + /* Enable VCC on the HDMI port. */ const struct gpio_dt_spec *s3_rail = GPIO_DT_FROM_ALIAS(gpio_hdmi_en_odl); /* Connect AP's DDC to sub-board (default is USB-C aux) */ @@ -65,8 +70,54 @@ static void hdmi_hpd_interrupt(const struct device *device, LOG_DBG("HDMI HPD changed state to %d", state); } +void nissa_configure_hdmi_rails(void) +{ +#if DT_NODE_EXISTS(GPIO_DT_FROM_ALIAS(gpio_en_rails_odl)) + gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_en_rails_odl), + GPIO_OUTPUT_INACTIVE | GPIO_OPEN_DRAIN | + GPIO_PULL_UP | GPIO_ACTIVE_LOW); +#endif +} + +void nissa_configure_hdmi_vcc(void) +{ + gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_hdmi_en_odl), + GPIO_OUTPUT_INACTIVE | GPIO_OPEN_DRAIN | + GPIO_ACTIVE_LOW); +} + +__overridable void nissa_configure_hdmi_power_gpios(void) +{ + nissa_configure_hdmi_rails(); +} + +#ifdef CONFIG_SOC_IT8XXX2 +/* + * On it8xxx2, the below condition will break the EC to enter deep doze mode + * (b:237717730): + * Enhance i2c (GPE0/E7, GPH1/GPH2 or GPA4/GPA5) is enabled and its clock and + * data pins aren't both at high level. + * + * Since HDMI+type A SKU doesn't use i2c4, disable it for better power number. + */ +#define I2C4_NODE DT_NODELABEL(i2c4) +#if DT_NODE_EXISTS(I2C4_NODE) +PINCTRL_DT_DEFINE(I2C4_NODE); + +/* disable i2c4 alternate function */ +static void soc_it8xxx2_disable_i2c4_alt(void) +{ + const struct pinctrl_dev_config *pcfg = + PINCTRL_DT_DEV_CONFIG_GET(I2C4_NODE); + + pinctrl_apply_state(pcfg, PINCTRL_STATE_SLEEP); +} +#endif /* DT_NODE_EXISTS(I2C4_NODE) */ +#endif /* CONFIG_SOC_IT8XXX2 */ +#endif /* NISSA_BOARD_HAS_HDMI_SUPPORT */ + static void lte_power_handler(struct ap_power_ev_callback *cb, - struct ap_power_ev_data data) + struct ap_power_ev_data data) { /* Enable rails for S5 */ const struct gpio_dt_spec *s5_rail = @@ -76,7 +127,7 @@ static void lte_power_handler(struct ap_power_ev_callback *cb, LOG_DBG("Enabling LTE sub-board power rails"); gpio_pin_set_dt(s5_rail, 1); break; - case AP_POWER_SHUTDOWN: + case AP_POWER_HARD_OFF: LOG_DBG("Disabling LTE sub-board power rails"); gpio_pin_set_dt(s5_rail, 0); break; @@ -105,38 +156,37 @@ static void nereid_subboard_config(void) */ if (sb == NISSA_SB_C_A || sb == NISSA_SB_HDMI_A) { /* Configure VBUS enable, default off */ - gpio_pin_configure_dt( - GPIO_DT_FROM_ALIAS(gpio_en_usb_a1_vbus), - GPIO_OUTPUT_LOW); + gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_en_usb_a1_vbus), + GPIO_OUTPUT_LOW); } else { /* Turn off unused pins */ gpio_pin_configure_dt( GPIO_DT_FROM_NODELABEL(gpio_sub_usb_a1_ilimit_sdp), GPIO_DISCONNECTED); - gpio_pin_configure_dt( - GPIO_DT_FROM_ALIAS(gpio_en_usb_a1_vbus), - GPIO_DISCONNECTED); + gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_en_usb_a1_vbus), + GPIO_DISCONNECTED); /* Disable second USB-A port enable GPIO */ __ASSERT(USB_PORT_ENABLE_COUNT == 2, - "USB A port count != 2 (%d)", USB_PORT_ENABLE_COUNT); + "USB A port count != 2 (%d)", USB_PORT_ENABLE_COUNT); usb_port_enable[1] = -1; } /* * USB-C port: the default configuration has I2C on the I2C pins, * but the interrupt line needs to be configured. */ +#if CONFIG_USB_PD_PORT_MAX_COUNT > 1 if (sb == NISSA_SB_C_A || sb == NISSA_SB_C_LTE) { /* Configure interrupt input */ - gpio_pin_configure_dt( - GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), - GPIO_INPUT | GPIO_PULL_UP); + gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), + GPIO_INPUT | GPIO_PULL_UP); } else { - /* Disable the port 1 charger task */ - task_disable_task(TASK_ID_USB_CHG_P1); - usb_muxes[1].next_mux = NULL; + /* Port doesn't exist, doesn't need muxing */ + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_1_no_mux); } +#endif switch (sb) { +#if NISSA_BOARD_HAS_HDMI_SUPPORT case NISSA_SB_HDMI_A: { /* * HDMI: two outputs control power which must be configured to @@ -148,14 +198,18 @@ static void nereid_subboard_config(void) static struct gpio_callback hdmi_hpd_cb; int rv, irq_key; - /* HDMI power enable outputs */ - gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_en_rails_odl), - GPIO_OUTPUT_INACTIVE | GPIO_OPEN_DRAIN | - GPIO_PULL_UP | GPIO_ACTIVE_LOW); - gpio_pin_configure_dt(GPIO_DT_FROM_ALIAS(gpio_hdmi_en_odl), - GPIO_OUTPUT_INACTIVE | GPIO_OPEN_DRAIN | - GPIO_ACTIVE_LOW); - /* Control HDMI power in concert with AP */ + nissa_configure_hdmi_power_gpios(); + +#if CONFIG_SOC_IT8XXX2 && DT_NODE_EXISTS(I2C4_NODE) + /* disable i2c4 alternate function for better power number */ + soc_it8xxx2_disable_i2c4_alt(); +#endif + + /* + * Control HDMI power according to AP power state. Some events + * won't do anything if the corresponding pin isn't configured, + * but that's okay. + */ ap_power_ev_init_callback( &power_cb, hdmi_power_handler, AP_POWER_PRE_INIT | AP_POWER_HARD_OFF | @@ -187,6 +241,7 @@ static void nereid_subboard_config(void) irq_unlock(irq_key); break; } +#endif case NISSA_SB_C_LTE: /* * LTE: Set up callbacks for enabling/disabling @@ -197,9 +252,9 @@ static void nereid_subboard_config(void) /* Control LTE power when CPU entering or * exiting S5 state. */ - ap_power_ev_init_callback( - &power_cb, lte_power_handler, - AP_POWER_SHUTDOWN | AP_POWER_PRE_INIT); + ap_power_ev_init_callback(&power_cb, lte_power_handler, + AP_POWER_HARD_OFF | + AP_POWER_PRE_INIT); ap_power_ev_add_callback(&power_cb); break; @@ -218,8 +273,10 @@ static void board_init(void) * Enable USB-C interrupts. */ gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0)); +#if CONFIG_USB_PD_PORT_MAX_COUNT > 1 if (board_get_usb_pd_port_count() == 2) gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1)); +#endif } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/nissa/xivu/cbi.dts b/zephyr/projects/nissa/xivu/cbi.dts new file mode 100644 index 0000000000..4149ea291c --- /dev/null +++ b/zephyr/projects/nissa/xivu/cbi.dts @@ -0,0 +1,77 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + /* Xivu-specific fw_config fields. */ + nissa-fw-config { + /* + * FW_CONFIG field to enable WFC or not. + */ + wfc { + enum-name = "FW_WFC"; + start = <0>; + size = <1>; + + wfc-mipi { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_WFC_MIPI"; + value = <0>; + }; + wfc-absent { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_WFC_ABSENT"; + value = <1>; + }; + }; + + /* + * FW_CONFIG field to enable stylus or not. + */ + stylus { + enum-name = "FW_STYLUS"; + start = <1>; + size = <1>; + + stylus-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_STYLUS_PRESENT"; + value = <0>; + }; + stylus-absent { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_STYLUS_ABSENT"; + value = <1>; + }; + }; + /* + * FW_CONFIG field to indicate which sub-board + * is attached. + */ + sub-board { + enum-name = "FW_SUB_BOARD"; + start = <2>; + size = <2>; + + sub-board-1 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_SUB_BOARD_1"; + value = <0>; + }; + sub-board-2 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_SUB_BOARD_2"; + value = <1>; + }; + sub-board-3 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_SUB_BOARD_3"; + value = <2>; + }; + }; + +/delete-node/ fan; + }; + +}; diff --git a/zephyr/projects/nissa/xivu/generated.dts b/zephyr/projects/nissa/xivu/generated.dts new file mode 100644 index 0000000000..383054adf8 --- /dev/null +++ b/zephyr/projects/nissa/xivu/generated.dts @@ -0,0 +1,291 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * This file is auto-generated - do not edit! + */ + +/ { + + named-adc-channels { + compatible = "named-adc-channels"; + + adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { + enum-name = "ADC_PP1050_PROC"; + io-channels = <&adc0 4>; + }; + adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { + enum-name = "ADC_PP3300_S5"; + io-channels = <&adc0 6>; + }; + adc_temp_sensor_1: temp_sensor_1 { + enum-name = "ADC_TEMP_SENSOR_1"; + io-channels = <&adc0 0>; + }; + adc_temp_sensor_2: temp_sensor_2 { + enum-name = "ADC_TEMP_SENSOR_2"; + io-channels = <&adc0 1>; + }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 10>; + }; + adc_temp_sensor_4: temp_sensor_4 { + enum-name = "ADC_TEMP_SENSOR_4"; + io-channels = <&adc0 11>; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_acc_int_l: acc_int_l { + gpios = <&gpio5 0 GPIO_INPUT>; + }; + gpio_all_sys_pwrgd: all_sys_pwrgd { + gpios = <&gpioa 7 GPIO_INPUT>; + }; + gpio_ccd_mode_odl: ccd_mode_odl { + gpios = <&gpioe 5 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + gpio_cpu_c10_gate_l: cpu_c10_gate_l { + gpios = <&gpio6 7 GPIO_INPUT>; + }; + gpio_ec_battery_pres_odl: ec_battery_pres_odl { + gpios = <&gpioa 3 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpio7 4 GPIO_OUTPUT>; + }; + gpio_ec_edp_bl_en_od: ec_edp_bl_en_od { + gpios = <&gpiod 3 GPIO_ODR_HIGH>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + gpio_ec_entering_rw: ec_entering_rw { + gpios = <&gpio0 3 GPIO_OUTPUT>; + enum-name = "GPIO_ENTERING_RW"; + }; + gpio_ec_gsc_packet_mode: ec_gsc_packet_mode { + gpios = <&gpio7 5 GPIO_OUTPUT>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpio1 7 (GPIO_OUTPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_ec_pch_wake_odl: ec_pch_wake_odl { + gpios = <&gpiob 0 GPIO_ODR_LOW>; + }; + gpio_ec_prochot_odl: ec_prochot_odl { + gpios = <&gpiof 1 GPIO_ODR_HIGH>; + }; + gpio_ec_soc_dsw_pwrok: ec_soc_dsw_pwrok { + gpios = <&gpio6 1 GPIO_OUTPUT>; + }; + gpio_ec_acok_otg_c1: ec_acok_otg_c1 { + gpios = <&gpioe 4 GPIO_OUTPUT>; + }; + gpio_ec_soc_int_odl: ec_soc_int_odl { + gpios = <&gpio8 0 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pch_pwrok_od: ec_soc_pch_pwrok_od { + gpios = <&gpio7 2 GPIO_ODR_HIGH>; + }; + gpio_ec_soc_pwr_btn_odl: ec_soc_pwr_btn_odl { + gpios = <&gpioc 1 GPIO_ODR_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + gpios = <&gpioa 6 GPIO_OUTPUT>; + }; + gpio_ec_soc_rtcrst: ec_soc_rtcrst { + gpios = <&gpio7 6 GPIO_OUTPUT>; + }; + gpio_ec_soc_sys_pwrok: ec_soc_sys_pwrok { + gpios = <&gpio3 7 GPIO_OUTPUT>; + }; + gpio_ec_soc_vccst_pwrgd_od: ec_soc_vccst_pwrgd_od { + gpios = <&gpioa 4 GPIO_ODR_HIGH>; + }; + gpio_ec_wp_odl: ec_wp_odl { + gpios = <&gpioa 1 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_en_pp3300_s5: en_pp3300_s5 { + gpios = <&gpiob 6 GPIO_OUTPUT>; + enum-name = "GPIO_TEMP_SENSOR_POWER"; + }; + gpio_en_pp5000_pen_x: en_pp5000_pen_x { + gpios = <&gpioe 2 GPIO_OUTPUT>; + }; + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpio4 0 GPIO_OUTPUT>; + }; + gpio_en_slp_z: en_slp_z { + gpios = <&gpioe 1 GPIO_OUTPUT>; + }; + gpio_en_usb_a0_vbus: en_usb_a0_vbus { + gpios = <&gpio9 1 GPIO_OUTPUT>; + }; + gpio_gsc_ec_pwr_btn_odl: gsc_ec_pwr_btn_odl { + gpios = <&gpio0 0 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_ec_acok_otg_c0: ec_acok_otg_c0 { + gpios = <&gpioc 6 GPIO_OUTPUT>; + }; + gpio_imu_int_l: imu_int_l { + gpios = <&gpio5 6 GPIO_INPUT>; + }; + gpio_imvp91_vrrdy_od: imvp91_vrrdy_od { + gpios = <&gpio4 3 GPIO_INPUT>; + }; + gpio_lid_open: lid_open { + gpios = <&gpiod 2 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_pen_detect_odl: pen_detect_odl { + gpios = <&gpio9 6 GPIO_INPUT_PULL_UP>; + }; + gpio_pg_pp1050_mem_s3_od: pg_pp1050_mem_s3_od { + gpios = <&gpiof 0 GPIO_INPUT>; + }; + gpio_pg_pp5000_s5_od: pg_pp5000_s5_od { + gpios = <&gpio4 2 GPIO_INPUT>; + }; + gpio_rsmrst_pwrgd_l: rsmrst_pwrgd_l { + gpios = <&gpio9 4 GPIO_INPUT_PULL_UP>; + }; + gpio_slp_s0_l: slp_s0_l { + gpios = <&gpio9 7 GPIO_INPUT>; + }; + gpio_slp_s3_l: slp_s3_l { + gpios = <&gpioa 5 GPIO_INPUT>; + }; + gpio_slp_s4_l: slp_s4_l { + gpios = <&gpio7 0 GPIO_INPUT>; + }; + gpio_slp_sus_l: slp_sus_l { + gpios = <&gpio6 2 GPIO_INPUT>; + }; + gpio_sub_usb_a1_ilimit_sdp: sub_usb_a1_ilimit_sdp { + gpios = <&gpiod 5 GPIO_OUTPUT>; + enum-name = "GPIO_USB2_ILIM_SEL"; + }; + gpio_sys_rst_odl: sys_rst_odl { + gpios = <&gpioc 5 GPIO_ODR_HIGH>; + }; + gpio_tablet_mode_l: tablet_mode_l { + gpios = <&gpio9 5 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + gpio_usb_a0_ilimit_sdp: usb_a0_ilimit_sdp { + gpios = <&gpio3 3 GPIO_OUTPUT>; + enum-name = "GPIO_USB1_ILIM_SEL"; + }; + gpio_usb_c0_int_odl: usb_c0_int_odl { + gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; + }; + gpio_vccin_aux_vid0: vccin_aux_vid0 { + gpios = <&gpio9 2 GPIO_INPUT>; + }; + gpio_vccin_aux_vid1: vccin_aux_vid1 { + gpios = <&gpioe 3 GPIO_INPUT>; + }; + gpio_voldn_btn_odl: voldn_btn_odl { + gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_volup_btn_odl: volup_btn_odl { + gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_ec_i2c_eeprom: ec_i2c_eeprom { + i2c-port = <&i2c0_0>; + enum-names = "I2C_PORT_EEPROM"; + }; + i2c_ec_i2c_sensor: ec_i2c_sensor { + i2c-port = <&i2c1_0>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { + i2c-port = <&i2c3_0>; + enum-names = "I2C_PORT_USB_C0_TCPC"; + }; + i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { + i2c-port = <&i2c5_1>; + enum-names = "I2C_PORT_USB_C1_TCPC"; + }; + i2c_ec_i2c_batt: ec_i2c_batt { + i2c-port = <&i2c7_0>; + enum-names = "I2C_PORT_BATTERY"; + }; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_chan0_gp45 + &adc0_chan1_gp44 + &adc0_chan4_gp41 + &adc0_chan6_gp34 + &adc0_chan10_gpe0 + &adc0_chan11_gpc7>; + pinctrl-names = "default"; +}; + +&i2c0_0 { + status = "okay"; + pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; + pinctrl-names = "default"; +}; + +&i2c1_0 { + status = "okay"; + pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; + pinctrl-names = "default"; +}; + +&i2c3_0 { + status = "okay"; + pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; + pinctrl-names = "default"; +}; + +&i2c5_1 { + status = "okay"; + pinctrl-0 = <&i2c5_1_sda_scl_gpf4_f5>; + pinctrl-names = "default"; +}; + +&i2c7_0 { + status = "okay"; + pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; + pinctrl-names = "default"; +}; + +&i2c_ctrl0 { + status = "okay"; +}; + +&i2c_ctrl1 { + status = "okay"; +}; + +&i2c_ctrl3 { + status = "okay"; +}; + +&i2c_ctrl5 { + status = "okay"; +}; + +&i2c_ctrl7 { + status = "okay"; +}; diff --git a/zephyr/projects/nissa/xivu/keyboard.dts b/zephyr/projects/nissa/xivu/keyboard.dts new file mode 100644 index 0000000000..5248c4aaff --- /dev/null +++ b/zephyr/projects/nissa/xivu/keyboard.dts @@ -0,0 +1,34 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = < + &ksi0_gp31 + &ksi1_gp30 + &ksi2_gp27 + &ksi3_gp26 + &ksi4_gp25 + &ksi5_gp24 + &ksi6_gp23 + &ksi7_gp22 + &kso00_gp21 + &kso01_gp20 + &kso03_gp16 + &kso04_gp15 + &kso05_gp14 + &kso06_gp13 + &kso07_gp12 + &kso08_gp11 + &kso09_gp10 + &kso10_gp07 + &kso11_gp06 + &kso12_gp05 + &kso13_gp04 + &kso14_gp82 + >; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/nissa/xivu/led_pins.dts b/zephyr/projects/nissa/xivu/led_pins.dts new file mode 100644 index 0000000000..d85004a0c9 --- /dev/null +++ b/zephyr/projects/nissa/xivu/led_pins.dts @@ -0,0 +1,94 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + pwm_pins { + compatible = "cros-ec,pwm-pin-config"; + pwm_led_y_c0: pwm_led_y_c0 { + #led-pin-cells = <1>; + pwms = <&pwm2 0 PWM_HZ(324) PWM_POLARITY_INVERTED>; + }; + + pwm_led_w_c0: pwm_led_w_c0 { + #led-pin-cells = <1>; + pwms = <&pwm0 0 PWM_HZ(324) PWM_POLARITY_INVERTED>; + }; + + pwm_led_y_c1: pwm_led_y_c1 { + #led-pin-cells = <1>; + pwms = <&pwm6 0 PWM_HZ(324) PWM_POLARITY_INVERTED>; + }; + + pwm_led_w_c1: pwm_led_w_c1 { + #led-pin-cells = <1>; + pwms = <&pwm1 0 PWM_HZ(324) PWM_POLARITY_INVERTED>; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + color_off: color-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&pwm_led_y_c0 0>, + <&pwm_led_y_c1 0>, + <&pwm_led_w_c0 0>, + <&pwm_led_w_c1 0>; + }; + + color_amber: color-amber { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_AMBER"; + led-pins = <&pwm_led_y_c0 1>, + <&pwm_led_y_c1 1>, + <&pwm_led_w_c0 0>, + <&pwm_led_w_c1 0>; + }; + + color_white: color-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_WHITE"; + led-pins = <&pwm_led_y_c0 0>, + <&pwm_led_y_c1 0>, + <&pwm_led_w_c0 1>, + <&pwm_led_w_c1 1>; + }; + }; +}; + +/* LED2 */ +&pwm0 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm0_gpc3>; + pinctrl-names = "default"; +}; + +/* LED3 */ +&pwm1 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm1_gpc2>; + pinctrl-names = "default"; +}; + +/* LED1 */ +&pwm2 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm2_gpc4>; + pinctrl-names = "default"; +}; + +/* LED0 */ +&pwm6 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm6_gpc0>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/nissa/xivu/led_policy.dts b/zephyr/projects/nissa/xivu/led_policy.dts new file mode 100644 index 0000000000..3f7efcf1bf --- /dev/null +++ b/zephyr/projects/nissa/xivu/led_policy.dts @@ -0,0 +1,114 @@ +/ { + led-colors { + compatible = "cros-ec,led-policy"; + + power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + /* Battery percent range (>= Empty, <= 94%) */ + batt-lvl = <0 94>; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-near-full { + charge-state = "PWR_STATE_CHARGE"; + /* Battery percent range (>= 95%, <= Full) */ + batt-lvl = <95 100>; + + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= 11%, <= Full) */ + batt-lvl = <11 100>; + + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + /* White 1 sec, off 3 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <3000>; + }; + }; + + power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-discharge-s0-batt-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= Empty, <= 10%) */ + batt-lvl = <0 10>; + + /* Amber 1 sec, off 3 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <3000>; + }; + }; + + power-state-error-s0 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S0"; + /* Amber 1 sec, off 1 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-error-s3 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S3"; + /* White 1 sec, off 3 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <3000>; + }; + }; + + power-state-error-s5 { + charge-state = "PWR_STATE_ERROR"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_off>; + }; + }; + }; +}; diff --git a/zephyr/projects/nissa/craask_motionsense.dts b/zephyr/projects/nissa/xivu/motionsense.dts index 8870f2e94f..332252c4ef 100644 --- a/zephyr/projects/nissa/craask_motionsense.dts +++ b/zephyr/projects/nissa/xivu/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -25,11 +25,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; base_mutex: base-mutex { - label = "BASE_MUTEX"; }; }; @@ -37,14 +35,14 @@ motionsense-rotation-ref { compatible = "cros-ec,motionsense-rotation-ref"; lid_rot_ref: lid-rotation-ref { - mat33 = <(-1) 0 0 - 0 1 0 + mat33 = <0 1 0 + 1 0 0 0 0 (-1)>; }; base_rot_ref: base-rotation-ref { - mat33 = <(-1) 0 0 - 0 (-1) 0 + mat33 = <0 (-1) 0 + 1 0 0 0 0 1>; }; }; @@ -59,7 +57,12 @@ * "struct als_drv_data_t" in accelgyro.h */ motionsense-sensor-data { - lsm6dso_data: lsm6dso-drv-data { + lsm6dso_accel_data: lsm6dso-accel-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + lsm6dso_gyro_data: lsm6dso-gyro-drv-data { compatible = "cros-ec,drvdata-lsm6dso"; status = "okay"; }; @@ -72,74 +75,71 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. + * TODO(b/238139272): The first entries of the array must be + * accelerometers,then gyroscope. Fix this dependency in the DTS + * processing which makes the devicetree entries independent. */ motionsense-sensor { - base_accel: base-accel { - compatible = "cros-ec,lsm6dso-accel"; + lid_accel: lid-accel { + compatible = "cros-ec,lis2dw12"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; - location = "MOTIONSENSE_LOC_BASE"; - mutex = <&base_mutex>; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&lid_mutex>; port = <&i2c_ec_i2c_sensor>; - rot-standard-ref = <&base_rot_ref>; - drv-data = <&lsm6dso_data>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&lis2dw12_data>; + i2c-spi-addr-flags = "LIS2DWL_ADDR0_FLAGS"; configs { compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; }; - base_gyro: base-gyro { - compatible = "cros-ec,lsm6dso-gyro"; + base_accel: base-accel { + compatible = "cros-ec,lsm6dso-accel"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&base_mutex>; port = <&i2c_ec_i2c_sensor>; rot-standard-ref = <&base_rot_ref>; - drv-data = <&lsm6dso_data>; - }; - - lid_accel: lid-accel { - compatible = "cros-ec,lis2dw12"; - status = "okay"; - - label = "Lid Accel"; - active-mask = "SENSOR_ACTIVE_S0_S3"; - location = "MOTIONSENSE_LOC_LID"; - mutex = <&lid_mutex>; - port = <&i2c_ec_i2c_sensor>; - rot-standard-ref = <&lid_rot_ref>; - default-range = <2>; - drv-data = <&lis2dw12_data>; - i2c-spi-addr-flags = "LIS2DWL_ADDR0_FLAGS"; + drv-data = <&lsm6dso_accel_data>; configs { compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; }; + + base_gyro: base-gyro { + compatible = "cros-ec,lsm6dso-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&base_mutex>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */ + drv-data = <&lsm6dso_gyro_data>; + }; }; motionsense-sensor-info { diff --git a/zephyr/projects/nissa/xivu/overlay.dts b/zephyr/projects/nissa/xivu/overlay.dts new file mode 100644 index 0000000000..de45db75e7 --- /dev/null +++ b/zephyr/projects/nissa/xivu/overlay.dts @@ -0,0 +1,357 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; + gpio-wp = &gpio_ec_wp_odl; + int-wp = &int_wp_l; + gpio-kbd-kso2 = &gpio_ec_kso_02_inv; + }; + + ec-console { + compatible = "ec-console"; + disabled = "events", "lpc", "hostcmd"; + }; + + batteries { + default_battery: smp_c31n2005 { + compatible = "smp,c31n2005", "battery-smart"; + }; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-irqs = < + &int_power_button + &int_lid_open + >; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_power_button: power_button { + irq-pin = <&gpio_gsc_ec_pwr_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_wp_l: wp_l { + irq-pin = <&gpio_ec_wp_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "switch_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&gpio_lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_tablet_mode: tablet_mode { + irq-pin = <&gpio_tablet_mode_l>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "gmr_tablet_switch_isr"; + }; + int_imu: ec_imu { + irq-pin = <&gpio_imu_int_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "lsm6dso_interrupt"; + }; + int_vol_down: vol_down { + irq-pin = <&gpio_voldn_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_vol_up: vol_up { + irq-pin = <&gpio_volup_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "button_interrupt"; + }; + int_usb_c0: usb_c0 { + irq-pin = <&gpio_usb_c0_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_interrupt"; + }; + int_usb_c1: usb_c1 { + irq-pin = <&gpio_sb_1>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_interrupt"; + }; + }; + + named-gpios { + gpio_sb_1: sb-1 { + gpios = <&gpio0 2 GPIO_PULL_UP>; + no-auto-init; + }; + + gpio_sb_2: sb-2 { + gpios = <&gpiod 4 GPIO_OUTPUT>; + no-auto-init; + }; + + /* + * Set I2C pins for type C sub-board to be low voltage (I2C5_1). + * We do this for all boards, since the pins are 3.3V tolerant, + * and the only 2 types of sub-boards used on nivviks both have + * type-C ports on them. + */ + gpio_sb_3: sb-3 { + gpios = <&gpiof 4 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; + no-auto-init; + }; + gpio_sb_4: sb-4 { + gpios = <&gpiof 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + no-auto-init; + }; + }; + + /* + * Aliases used for sub-board GPIOs. + */ + aliases { + /* + * Input GPIO when used with type-C port 1 + */ + gpio-usb-c1-int-odl = &gpio_sb_1; + gpio-en-rails-odl = &gpio_sb_1; + /* + * Sub-board with type A USB, enable. + */ + gpio-en-usb-a1-vbus = &gpio_sb_2; + /* + * Enable S5 rails for LTE sub-board + */ + gpio-en-sub-s5-rails = &gpio_sb_2; + }; + + temp_memory: memory { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_charger1: charger1 { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + temp_charger2: charger2 { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_4>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + memory { + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_memory>; + }; + ambient { + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_ambient>; + }; + charger1 { + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger1>; + }; + charger2 { + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger2>; + }; + }; + + usba { + compatible = "cros-ec,usba-port-enable-pins"; + /* + * sb_2 is only configured as GPIO when USB-A1 is present, + * but it's still safe to control when disabled. + * + * ILIM_SEL pins are referred to by legacy enum name, + * GPIO_USB*_ILIM_SEL. The one for port A1 is unused on + * sub-boards that don't have USB-A so is safe to control + * regardless of system configuration. + */ + enable-pins = <&gpio_en_usb_a0_vbus &gpio_sb_2>; + status = "okay"; + }; + + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + /* + * TODO(b:211693800): port1 may not be present on some + * sub-boards. + */ + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; + }; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + }; + + unused-pins { + compatible = "unused-gpios"; + unused-gpios = + <&gpio8 5 0>, + <&gpio3 6 0>, + <&gpiod 7 0>, + <&gpio6 0 0>, + <&gpiof 2 0>, + <&gpiof 3 0>; + }; +}; + +&thermistor_3V3_51K1_47K_4050B { + status = "okay"; +}; + +&adc_ec_vsense_pp3300_s5 { + /* + * Voltage divider on input has 47k upper and 220k lower legs with + * 2714 mV full-scale reading on the ADC. Apply the largest possible + * multiplier (without overflowing int32) to get the best possible + * approximation of the actual ratio, but derate by a factor of two to + * ensure unexpectedly high values won't overflow. + */ + mul = <(791261 / 2)>; + div = <(651975 / 2)>; +}; + +/* Set bus speeds for I2C */ +&i2c0_0 { + label = "I2C_EEPROM"; + clock-frequency = <I2C_BITRATE_FAST>; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; +}; + +&i2c1_0 { + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c3_0 { + label = "I2C_USB_C0_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + /* + * BC1.2 interrupt is shared with TCPC, so + * IRQ is not specified here and handled by + * usb_c0_interrupt. + */ + }; + + chg_port0: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; +}; + +&i2c5_1 { + label = "I2C_SUB_C1_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; + + anx7483_mux_1: anx7483-mux-1@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "anx7483_set_default_tuning"; + }; +}; + +&i2c7_0 { + label = "I2C_BATTERY"; + clock-frequency = <I2C_BITRATE_STANDARD>; +}; + +&pwm6 { + status = "okay"; + pinctrl-0 = <&pwm6_gpc0>; + pinctrl-names = "default"; +}; + +/* host interface */ +&espi0 { + status = "okay"; + pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/nissa/xivu/power_signals.dts b/zephyr/projects/nissa/xivu/power_signals.dts new file mode 100644 index 0000000000..1d2b23069d --- /dev/null +++ b/zephyr/projects/nissa/xivu/power_signals.dts @@ -0,0 +1,220 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + chosen { + intel-ap-pwrseq,espi = &espi0; + }; + + common-pwrseq { + compatible = "intel,ap-pwrseq"; + + sys-pwrok-delay = <10>; + all-sys-pwrgd-timeout = <20>; + }; + + pwr-en-pp5000-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP5000_S5 enable output to regulator"; + enum-name = "PWR_EN_PP5000_A"; + gpios = <&gpio4 0 0>; + output; + }; + pwr-en-pp3300-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP3300_S5 enable output to LS"; + enum-name = "PWR_EN_PP3300_A"; + gpios = <&gpiob 6 0>; + output; + }; + pwr-pg-ec-rsmrst-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST power good from regulator"; + enum-name = "PWR_RSMRST"; + gpios = <&gpio9 4 0>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-pch-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST output to PCH"; + enum-name = "PWR_EC_PCH_RSMRST"; + gpios = <&gpioa 6 0>; + output; + }; + pwr-slp-s0-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S0_L input from PCH"; + enum-name = "PWR_SLP_S0"; + gpios = <&gpio9 7 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-s3-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S3_L input from PCH"; + enum-name = "PWR_SLP_S3"; + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-sus-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_SUS_L input from PCH"; + enum-name = "PWR_SLP_SUS"; + gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-soc-dsw-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "DSW_PWROK output to PCH"; + enum-name = "PWR_EC_SOC_DSW_PWROK"; + gpios = <&gpio6 1 0>; + output; + }; + pwr-vccst-pwrgd-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VCCST_PWRGD output to PCH"; + enum-name = "PWR_VCCST_PWRGD"; + gpios = <&gpioa 4 GPIO_OPEN_DRAIN>; + output; + }; + pwr-imvp9-vrrdy-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VRRDY input from IMVP9"; + enum-name = "PWR_IMVP9_VRRDY"; + gpios = <&gpio4 3 0>; + }; + pwr-pch-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PCH_PWROK output to PCH"; + enum-name = "PWR_PCH_PWROK"; + gpios = <&gpio7 2 GPIO_OPEN_DRAIN>; + output; + }; + pwr-ec-pch-sys-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_PWROK output to PCH"; + enum-name = "PWR_EC_PCH_SYS_PWROK"; + gpios = <&gpio3 7 0>; + output; + }; + pwr-sys-rst-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_RESET# output to PCH"; + enum-name = "PWR_SYS_RST"; + gpios = <&gpioc 5 (GPIO_ACTIVE_LOW|GPIO_OPEN_DRAIN)>; + output; + }; + pwr-slp-s4 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S4 virtual wire input from PCH"; + enum-name = "PWR_SLP_S4"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; + vw-invert; + }; + pwr-slp-s5 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S5 virtual wire input from PCH"; + enum-name = "PWR_SLP_S5"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5"; + vw-invert; + }; + pwr-all-sys-pwrgd { + compatible = "intel,ap-pwrseq-external"; + dbg-label = "Combined all power good"; + enum-name = "PWR_ALL_SYS_PWRGD"; + }; + pwr-adc-pp3300 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP3300 PWROK (from ADC)"; + enum-name = "PWR_DSW_PWROK"; + trigger-high = <&cmp_pp3300_s5_high>; + trigger-low = <&cmp_pp3300_s5_low>; + }; + pwr-adc-pp1p05 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP1P05 PWROK (from ADC)"; + enum-name = "PWR_PG_PP1P05"; + trigger-high = <&cmp_pp1p05_high>; + trigger-low = <&cmp_pp1p05_low>; + }; + + adc-cmp { + cmp_pp3300_s5_high: pp3300_high { + compatible = "nuvoton,adc-cmp"; + io-channels = <&adc0 6>; + comparison = "ADC_CMP_NPCX_GREATER"; + /* + * This is 90% of nominal voltage considering voltage + * divider on ADC input. + */ + threshold-mv = <2448>; + }; + cmp_pp3300_s5_low: pp3300_low { + compatible = "nuvoton,adc-cmp"; + io-channels = <&adc0 6>; + comparison = "ADC_CMP_NPCX_LESS_OR_EQUAL"; + threshold-mv = <2448>; + }; + cmp_pp1p05_high: pp1p05_high { + compatible = "nuvoton,adc-cmp"; + io-channels = <&adc0 4>; + comparison = "ADC_CMP_NPCX_GREATER"; + /* Setting at 90% of nominal voltage */ + threshold-mv = <945>; + }; + cmp_pp1p05_low: pp1p05_low { + compatible = "nuvoton,adc-cmp"; + io-channels = <&adc0 4>; + comparison = "ADC_CMP_NPCX_LESS_OR_EQUAL"; + threshold-mv = <945>; + }; + }; +}; + +/* + * Because the power signals directly reference the GPIOs, + * the correspinding named-gpios need to have no-auto-init set. + */ +&gpio_ec_soc_dsw_pwrok { + no-auto-init; +}; +&gpio_ec_soc_pch_pwrok_od { + no-auto-init; +}; +&gpio_ec_soc_rsmrst_l { + no-auto-init; +}; +&gpio_ec_soc_sys_pwrok { + no-auto-init; +}; +&gpio_ec_soc_vccst_pwrgd_od { + no-auto-init; +}; +&gpio_en_pp3300_s5 { + no-auto-init; +}; +&gpio_en_pp5000_s5 { + no-auto-init; +}; +&gpio_imvp91_vrrdy_od { + no-auto-init; +}; +&gpio_rsmrst_pwrgd_l { + no-auto-init; +}; +&gpio_slp_s0_l { + no-auto-init; +}; +&gpio_slp_s3_l { + no-auto-init; +}; +&gpio_slp_s4_l { + no-auto-init; +}; +&gpio_slp_sus_l { + no-auto-init; +}; +&gpio_sys_rst_odl { + no-auto-init; +}; diff --git a/zephyr/projects/nissa/xivu/prj.conf b/zephyr/projects/nissa/xivu/prj.conf new file mode 100644 index 0000000000..ab3bb044e2 --- /dev/null +++ b/zephyr/projects/nissa/xivu/prj.conf @@ -0,0 +1,11 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_XIVU=y +CONFIG_PLATFORM_EC_OCPC=y +CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y + +# LED +CONFIG_PLATFORM_EC_LED_COMMON=n +CONFIG_PLATFORM_EC_LED_DT=y diff --git a/zephyr/projects/nissa/xivu/src/charger.c b/zephyr/projects/nissa/xivu/src/charger.c new file mode 100644 index 0000000000..5021a55758 --- /dev/null +++ b/zephyr/projects/nissa/xivu/src/charger.c @@ -0,0 +1,69 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> + +#include "battery.h" +#include "charger.h" +#include "charger/isl923x_public.h" +#include "console.h" +#include "extpower.h" +#include "usb_pd.h" +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +int extpower_is_present(void) +{ + int port; + int rv; + bool acok; + + for (port = 0; port < board_get_usb_pd_port_count(); port++) { + rv = raa489000_is_acok(port, &acok); + if ((rv == EC_SUCCESS) && acok) + return 1; + } + + return 0; +} + +/* + * Xivu does not have a GPIO indicating whether extpower is present, + * so detect using the charger(s). + */ +__override void board_check_extpower(void) +{ + static int last_extpower_present; + int extpower_present_p0 = 0; + int extpower_present_p1 = 0; + + int extpower_present = extpower_is_present(); + + if (last_extpower_present ^ extpower_present) + extpower_handle_update(extpower_present); + + last_extpower_present = extpower_present; + + if (pd_is_connected(0)) + extpower_present_p0 = extpower_is_present(); + else if (pd_is_connected(1)) + extpower_present_p1 = extpower_is_present(); + + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_acok_otg_c0), + extpower_present_p0); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_acok_otg_c1), + extpower_present_p1); +} + +__override void board_hibernate(void) +{ + /* Shut down the chargers */ + if (board_get_usb_pd_port_count() == 2) + raa489000_hibernate(CHARGER_SECONDARY, true); + raa489000_hibernate(CHARGER_PRIMARY, true); + LOG_INF("Charger(s) hibernated"); + cflush(); +} diff --git a/zephyr/projects/nissa/xivu/src/keyboard.c b/zephyr/projects/nissa/xivu/src/keyboard.c new file mode 100644 index 0000000000..ef799fb1d2 --- /dev/null +++ b/zephyr/projects/nissa/xivu/src/keyboard.c @@ -0,0 +1,29 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" + +static const struct ec_response_keybd_config xivu_kb_legacy = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* 8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &xivu_kb_legacy; +} diff --git a/zephyr/projects/nissa/src/craask/usbc.c b/zephyr/projects/nissa/xivu/src/usbc.c index 32a390e502..a15460a212 100644 --- a/zephyr/projects/nissa/src/craask/usbc.c +++ b/zephyr/projects/nissa/xivu/src/usbc.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -54,8 +54,7 @@ int board_is_sourcing_vbus(int port) int board_set_active_charge_port(int port) { - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; int old_port; @@ -233,8 +232,7 @@ static void usbc_interrupt_trigger(int port) usb_charger_task_set_event(port, USB_CHG_EVENT_BC12); } -static inline void poll_usb_gpio(int port, - const struct gpio_dt_spec *gpio, +static inline void poll_usb_gpio(int port, const struct gpio_dt_spec *gpio, const struct deferred_data *ud) { if (!gpio_pin_get_dt(gpio)) { @@ -243,17 +241,15 @@ static inline void poll_usb_gpio(int port, } } -static void poll_c0_int (void) +static void poll_c0_int(void) { - poll_usb_gpio(0, - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), + poll_usb_gpio(0, GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl), &poll_c0_int_data); } -static void poll_c1_int (void) +static void poll_c1_int(void) { - poll_usb_gpio(1, - GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), + poll_usb_gpio(1, GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl), &poll_c1_int_data); } diff --git a/zephyr/projects/nissa/yaviks/gpio.dts b/zephyr/projects/nissa/yaviks/gpio.dts new file mode 100644 index 0000000000..0158d5b19b --- /dev/null +++ b/zephyr/projects/nissa/yaviks/gpio.dts @@ -0,0 +1,242 @@ +/* + * Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + + named-adc-channels { + compatible = "named-adc-channels"; + + adc_ec_vsense_pp1050_proc: ec_vsense_pp1050_proc { + enum-name = "ADC_PP1050_PROC"; + io-channels = <&adc0 14>; + }; + adc_ec_vsense_pp3300_s5: ec_vsense_pp3300_s5 { + enum-name = "ADC_PP3300_S5"; + io-channels = <&adc0 0>; + }; + adc_temp_sensor_1: temp_sensor_1 { + enum-name = "ADC_TEMP_SENSOR_1"; + io-channels = <&adc0 2>; + }; + adc_temp_sensor_2: temp_sensor_2 { + enum-name = "ADC_TEMP_SENSOR_2"; + io-channels = <&adc0 3>; + }; + adc_temp_sensor_3: temp_sensor_3 { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 13>; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_all_sys_pwrgd: all_sys_pwrgd { + gpios = <&gpiob 7 GPIO_INPUT>; + }; + gpio_ccd_mode_odl: ccd_mode_odl { + gpios = <&gpioh 5 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + gpio_cpu_c10_gate_l: cpu_c10_gate_l { + gpios = <&gpiog 1 GPIO_INPUT>; + }; + gpio_ec_battery_pres_odl: ec_battery_pres_odl { + gpios = <&gpioi 4 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpioj 5 GPIO_OUTPUT>; + }; + gpio_ec_edp_bl_en_od: ec_edp_bl_en_od { + gpios = <&gpiok 4 GPIO_ODR_HIGH>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + gpio_ec_entering_rw: ec_entering_rw { + gpios = <&gpioc 7 GPIO_OUTPUT>; + enum-name = "GPIO_ENTERING_RW"; + }; + gpio_ec_gsc_packet_mode: ec_gsc_packet_mode { + gpios = <&gpioh 1 GPIO_OUTPUT>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_ec_pch_wake_odl: ec_pch_wake_odl { + gpios = <&gpiob 2 GPIO_ODR_LOW>; + }; + gpio_ec_prochot_odl: ec_prochot_odl { + gpios = <&gpioi 1 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + }; + gpio_ec_soc_dsw_pwrok: ec_soc_dsw_pwrok { + gpios = <&gpiol 7 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_ec_soc_hdmi_hpd: ec_soc_hdmi_hpd { + gpios = <&gpiok 7 GPIO_OUTPUT>; + }; + gpio_ec_soc_int_odl: ec_soc_int_odl { + gpios = <&gpiod 5 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pch_pwrok_od: ec_soc_pch_pwrok_od { + gpios = <&gpiod 6 GPIO_ODR_HIGH>; + no-auto-init; + }; + gpio_ec_soc_pwr_btn_odl: ec_soc_pwr_btn_odl { + gpios = <&gpiob 6 GPIO_ODR_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + gpios = <&gpioh 0 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_ec_soc_rtcrst: ec_soc_rtcrst { + gpios = <&gpiok 2 GPIO_OUTPUT>; + }; + gpio_ec_soc_sys_pwrok: ec_soc_sys_pwrok { + gpios = <&gpiof 2 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_ec_soc_vccst_pwrgd_od: ec_soc_vccst_pwrgd_od { + gpios = <&gpioe 5 GPIO_ODR_HIGH>; + no-auto-init; + }; + gpio_ec_wp_odl: ec_wp_odl { + gpios = <&gpioa 6 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_en_kb_bl: en_kb_bl { + gpios = <&gpioj 3 GPIO_OUTPUT>; + enum-name = "GPIO_EN_KEYBOARD_BACKLIGHT"; + }; + gpio_en_pp3300_s5: en_pp3300_s5 { + gpios = <&gpioc 5 GPIO_OUTPUT>; + enum-name = "GPIO_TEMP_SENSOR_POWER"; + no-auto-init; + }; + gpio_en_pp5000_pen_x: en_pp5000_pen_x { + gpios = <&gpiob 5 GPIO_OUTPUT>; + }; + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpiok 5 GPIO_OUTPUT>; + no-auto-init; + }; + gpio_en_slp_z: en_slp_z { + gpios = <&gpiok 3 GPIO_OUTPUT>; + }; + gpio_en_usb_a0_vbus: en_usb_a0_vbus { + gpios = <&gpiol 6 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_cc1_vconn: en_usb_c0_cc1_vconn { + gpios = <&gpioh 4 GPIO_OUTPUT>; + }; + gpio_en_usb_c0_cc2_vconn: en_usb_c0_cc2_vconn { + gpios = <&gpioh 6 GPIO_OUTPUT>; + }; + gpio_gsc_ec_pwr_btn_odl: gsc_ec_pwr_btn_odl { + gpios = <&gpioe 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_hdmi_sel: hdmi_sel { + gpios = <&gpioc 6 GPIO_OUTPUT>; + }; + gpio_imvp91_vrrdy_od: imvp91_vrrdy_od { + gpios = <&gpioj 4 GPIO_INPUT>; + no-auto-init; + }; + gpio_lid_open: lid_open { + gpios = <&gpiof 3 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_pen_detect_odl: pen_detect_odl { + gpios = <&gpioj 1 GPIO_INPUT_PULL_UP>; + }; + gpio_pg_pp1050_mem_s3_od: pg_pp1050_mem_s3_od { + gpios = <&gpiod 3 GPIO_INPUT>; + }; + gpio_pg_pp5000_s5_od: pg_pp5000_s5_od { + gpios = <&gpioe 3 GPIO_INPUT>; + }; + gpio_rsmrst_pwrgd_l: rsmrst_pwrgd_l { + gpios = <&gpioe 1 GPIO_INPUT_PULL_UP>; + no-auto-init; + }; + gpio_slp_s0_l: slp_s0_l { + gpios = <&gpioe 4 GPIO_INPUT>; + no-auto-init; + }; + gpio_slp_s3_l: slp_s3_l { + gpios = <&gpioh 3 GPIO_INPUT>; + no-auto-init; + }; + gpio_slp_s4_l: slp_s4_l { + gpios = <&gpioi 5 GPIO_INPUT>; + }; + gpio_slp_sus_l: slp_sus_l { + gpios = <&gpiog 2 GPIO_INPUT>; + no-auto-init; + }; + gpio_sub_usb_a1_ilimit_sdp: sub_usb_a1_ilimit_sdp { + gpios = <&gpiof 1 GPIO_OUTPUT>; + enum-name = "GPIO_USB2_ILIM_SEL"; + }; + gpio_sys_rst_odl: sys_rst_odl { + gpios = <&gpiod 1 GPIO_ODR_HIGH>; + no-auto-init; + }; + gpio_usb_a0_ilimit_sdp: usb_a0_ilimit_sdp { + gpios = <&gpiol 5 GPIO_OUTPUT>; + enum-name = "GPIO_USB1_ILIM_SEL"; + }; + gpio_usb_c0_frs: usb_c0_frs { + gpios = <&gpioc 4 GPIO_OUTPUT>; + }; + gpio_usb_c0_int_odl: usb_c0_int_odl { + gpios = <&gpiok 0 GPIO_INPUT_PULL_UP>; + }; + gpio_vccin_aux_vid0: vccin_aux_vid0 { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_vccin_aux_vid1: vccin_aux_vid1 { + gpios = <&gpiok 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_c1_charger_led_white_l: c1_charger_led_white_l { + gpios = <&gpiol 4 GPIO_OUTPUT_HIGH>; + }; + gpio_c1_charger_led_amber_l: c1_charger_led_amber_l { + gpios = <&gpiod 4 GPIO_OUTPUT_HIGH>; + }; + gpio_c0_charger_led_white_l: c0_charger_led_white_l { + gpios = <&gpioc 3 GPIO_OUTPUT_HIGH>; + }; + gpio_c0_charger_led_amber_l: c0_charger_led_amber_l { + gpios = <&gpioj 7 GPIO_OUTPUT_HIGH>; + }; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_ec_i2c_eeprom: ec_i2c_eeprom { + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_EEPROM"; + }; + i2c_ec_i2c_batt: ec_i2c_batt { + i2c-port = <&i2c1>; + enum-names = "I2C_PORT_BATTERY"; + }; + i2c_ec_i2c_sensor: ec_i2c_sensor { + i2c-port = <&i2c2>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_ec_i2c_sub_usb_c1: ec_i2c_sub_usb_c1 { + i2c-port = <&i2c4>; + enum-names = "I2C_PORT_USB_C1_TCPC"; + }; + i2c_ec_i2c_usb_c0: ec_i2c_usb_c0 { + i2c-port = <&i2c5>; + enum-names = "I2C_PORT_USB_C0_TCPC"; + }; + }; +}; diff --git a/zephyr/projects/nissa/yaviks/keyboard.dts b/zephyr/projects/nissa/yaviks/keyboard.dts new file mode 100644 index 0000000000..04a620767a --- /dev/null +++ b/zephyr/projects/nissa/yaviks/keyboard.dts @@ -0,0 +1,22 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + kblight { + compatible = "cros-ec,kblight-pwm"; + /* + * Use 324 Hz so that 32Khz clock source is used, + * which is not gated in power saving mode. + */ + pwms = <&pwm0 0 PWM_HZ(324) PWM_POLARITY_NORMAL>; + }; +}; + +&pwm0 { + status = "okay"; + prescaler-cx = <PWM_PRESCALER_C4>; + pinctrl-0 = <&pwm0_gpa0_default>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/nissa/yaviks/overlay.dts b/zephyr/projects/nissa/yaviks/overlay.dts new file mode 100644 index 0000000000..301aaaa020 --- /dev/null +++ b/zephyr/projects/nissa/yaviks/overlay.dts @@ -0,0 +1,380 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + aliases { + gpio-cbi-wp = &gpio_ec_cbi_wp; + gpio-wp = &gpio_ec_wp_odl; + int-wp = &int_wp_l; + }; + + ec-console { + compatible = "ec-console"; + disabled = "events", "lpc", "hostcmd"; + }; + + batteries { + default_battery: cosmx { + compatible = "cosmx,gh02047xl", "battery-smart"; + }; + dynapack_atl_gh02047xl { + compatible = "dynapack,atl_gh02047xl", "battery-smart"; + }; + dynapack_cosmx_gh02047xl { + compatible = "dynapack,cosmx_gh02047xl", "battery-smart"; + }; + smp_coslight_gh02047xl { + compatible = "smp,coslight_gh02047xl", "battery-smart"; + }; + smp_highpower_gh02047xl { + compatible = "smp,highpower_gh02047xl", "battery-smart"; + }; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-irqs = < + &int_power_button + &int_lid_open + >; + }; + + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_power_button: power_button { + irq-pin = <&gpio_gsc_ec_pwr_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_wp_l: wp_l { + irq-pin = <&gpio_ec_wp_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "switch_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&gpio_lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_usb_c0: usb_c0 { + irq-pin = <&gpio_usb_c0_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_c0_interrupt"; + }; + int_usb_c1: usb_c1 { + irq-pin = <&gpio_sb_1>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_c1_interrupt"; + }; + }; + + unused-pins { + compatible = "unused-gpios"; + unused-gpios = <&gpioa 7 0>, + <&gpioc 0 0>, + <&gpiod 7 0>, + <&gpioh 2 0>, + <&gpioi 6 0>, + <&gpioi 7 0>, + <&gpioj 0 0>; + }; + + named-gpios { + /* + * EC doesn't take any specific action on CC/SBU disconnect due to + * fault, but this definition is useful for hardware testing. + */ + gpio_usb_c0_prot_fault_odl: usb_c0_prot_fault_odl { + gpios = <&gpiok 6 GPIO_INPUT_PULL_UP>; + }; + + gpio_sb_1: sb_1 { + gpios = <&gpioe 6 0>; + no-auto-init; + }; + gpio_sb_2: sb_2 { + gpios = <&gpiof 0 0>; + no-auto-init; + }; + + gpio_sb_3: sb_3 { + gpios = <&gpioe 7 0>; + no-auto-init; + }; + gpio_sb_4: sb_4 { + gpios = <&gpioe 0 0>; + no-auto-init; + }; + }; + + /* + * Aliases used for sub-board GPIOs. + */ + aliases { + /* USB-C: interrupt input. I2C pins are on i2c_ec_i2c_sub_usb_c1 */ + gpio-usb-c1-int-odl = &gpio_sb_1; + /* + * USB-A: VBUS enable output + * LTE: power enable output + */ + gpio-en-usb-a1-vbus = &gpio_sb_2; + /* + * HDMI: power enable output, HDMI enable output, + * and HPD input + */ + gpio-en-rails-odl = &gpio_sb_1; + gpio-hdmi-en-odl = &gpio_sb_4; + gpio-hpd-odl = &gpio_sb_3; + /* + * Enable S5 rails for LTE sub-board + */ + gpio-en-sub-s5-rails = &gpio_sb_2; + }; + + temp_cpu: cpu { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_1>; + }; + temp_5v_regulator: 5v_regulator { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_2>; + }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_temp_sensor_3>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + cpu { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_cpu>; + }; + 5v_regulator { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_5v_regulator>; + }; + charger { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + power-good-pin = <&gpio_ec_soc_dsw_pwrok>; + sensor = <&temp_charger>; + }; + }; + + usba { + compatible = "cros-ec,usba-port-enable-pins"; + /* + * sb_2 is only configured as GPIO when USB-A1 is present, + * but it's still safe to control when disabled. + * + * ILIM_SEL pins are referred to by legacy enum name, + * GPIO_USB*_ILIM_SEL. The one for port A1 is unused on + * sub-boards that don't have USB-A so is safe to control + * regardless of system configuration. + */ + enable-pins = <&gpio_en_usb_a0_vbus &gpio_sb_2>; + status = "okay"; + }; + + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&bc12_port0>; + chg = <&chg_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_0>; + }; + }; + port0-muxes { + virtual_mux_0: virtual-mux-0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + port1@1 { + compatible = "named-usbc-port"; + reg = <1>; + bc12 = <&bc12_port1>; + chg = <&chg_port1>; + usb-mux-chain-1 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&virtual_mux_1 &tcpci_mux_1>; + }; + usb_mux_chain_1_no_mux: usb-mux-chain-1-no-mux { + compatible = "cros-ec,usb-mux-chain"; + alternative-chain; + usb-muxes = <&virtual_mux_1>; + }; + }; + port1-muxes { + virtual_mux_1: virtual-mux-1 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + tcpci_mux_1: tcpci-mux-1 { + compatible = "parade,usbc-mux-ps8xxx"; + }; + }; + }; +}; + +&thermistor_3V3_51K1_47K_4050B { + status = "okay"; +}; + +&adc_ec_vsense_pp3300_s5 { + /* + * Voltage divider on input has 47k upper and 220k lower legs with 3 V + * full-scale reading on the ADC. Apply the largest possible multiplier + * (without overflowing int32) to get the best possible approximation + * of the actual ratio, but derate by a factor of two to ensure + * unexpectedly high values won't overflow. + */ + mul = <(715828 / 2)>; + div = <(589820 / 2)>; +}; + +&adc0 { + pinctrl-0 = <&adc0_ch0_gpi0_default + &adc0_ch2_gpi2_default + &adc0_ch3_gpi3_default + &adc0_ch13_gpl0_default + &adc0_ch14_gpl1_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pinctrl { + i2c4_clk_gpe0_sleep: i2c4_clk_gpe0_sleep { + pinmuxs = <&pinctrle 0 IT8XXX2_ALT_DEFAULT>; + }; + i2c4_data_gpe7_sleep: i2c4_data_gpe7_sleep { + pinmuxs = <&pinctrle 7 IT8XXX2_ALT_DEFAULT>; + }; + i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { + gpio-voltage = "1v8"; + }; + i2c2_data_gpf7_default: i2c2_data_gpf7_default { + gpio-voltage = "1v8"; + }; +}; + +&i2c0 { + label = "I2C_EEPROM"; + clock-frequency = <I2C_BITRATE_FAST>; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + label = "EEPROM_CBI"; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; + pinctrl-0 = <&i2c0_clk_gpb3_default + &i2c0_data_gpb4_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c1 { + label = "I2C_BATTERY"; + clock-frequency = <50000>; + pinctrl-0 = <&i2c1_clk_gpc1_default + &i2c1_data_gpc2_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c2 { + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c2_clk_gpf6_default + &i2c2_data_gpf7_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c4 { + label = "I2C_SUB_C1_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + pinctrl-0 = <&i2c4_clk_gpe0_default + &i2c4_data_gpe7_default>; + pinctrl-1 = <&i2c4_clk_gpe0_sleep + &i2c4_data_gpe7_sleep>; + pinctrl-names = "default", "sleep"; + status = "okay"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port1: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +&i2c_ec_i2c_sub_usb_c1 { + /* + * Dynamic speed setting is used for AP-controlled firmware update + * of PS8745 TCPC/redriver: the AP lowers speed to 400 kHz in order + * to use more efficient window programming, then sets it back when + * done. + */ + dynamic-speed; +}; + +&i2c5 { + label = "I2C_USB_C0_TCPC"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; + pinctrl-0 = <&i2c5_clk_gpa4_default + &i2c5_data_gpa5_default>; + pinctrl-names = "default"; + status = "okay"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + }; + + chg_port0: sm5803@32 { + compatible = "siliconmitus,sm5803"; + status = "okay"; + reg = <0x32>; + }; +}; + +&usbpd0 { + status = "okay"; +}; diff --git a/zephyr/projects/nissa/yaviks/power_signals.dts b/zephyr/projects/nissa/yaviks/power_signals.dts new file mode 100644 index 0000000000..d64ac83150 --- /dev/null +++ b/zephyr/projects/nissa/yaviks/power_signals.dts @@ -0,0 +1,180 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + chosen { + intel-ap-pwrseq,espi = &espi0; + }; + + common-pwrseq { + compatible = "intel,ap-pwrseq"; + + sys-pwrok-delay = <10>; + all-sys-pwrgd-timeout = <20>; + }; + + pwr-en-pp5000-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP5000_S5 enable output to regulator"; + enum-name = "PWR_EN_PP5000_A"; + gpios = <&gpiok 5 0>; + output; + }; + pwr-en-pp3300-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP3300_S5 enable output to LS"; + enum-name = "PWR_EN_PP3300_A"; + gpios = <&gpioc 5 0>; + output; + }; + pwr-pg-ec-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST power good from regulator"; + enum-name = "PWR_RSMRST"; + gpios = <&gpioe 1 0>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-pch-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST output to PCH"; + enum-name = "PWR_EC_PCH_RSMRST"; + gpios = <&gpioh 0 0>; + output; + }; + pwr-slp-s0-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S0_L input from PCH"; + enum-name = "PWR_SLP_S0"; + gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-s3-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S3_L input from PCH"; + enum-name = "PWR_SLP_S3"; + gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-sus-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_SUS_L input from PCH"; + enum-name = "PWR_SLP_SUS"; + gpios = <&gpiog 2 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-soc-dsw-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "DSW_PWROK output to PCH"; + enum-name = "PWR_EC_SOC_DSW_PWROK"; + gpios = <&gpiol 7 0>; + output; + }; + pwr-vccst-pwrgd-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VCCST_PWRGD output to PCH"; + enum-name = "PWR_VCCST_PWRGD"; + gpios = <&gpioe 5 (GPIO_OPEN_DRAIN | GPIO_VOLTAGE_1P8)>; + output; + }; + pwr-imvp9-vrrdy-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "VRRDY input from IMVP9"; + enum-name = "PWR_IMVP9_VRRDY"; + gpios = <&gpioj 4 0>; + }; + pwr-pch-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PCH_PWROK output to PCH"; + enum-name = "PWR_PCH_PWROK"; + gpios = <&gpiod 6 GPIO_OPEN_DRAIN>; + output; + }; + pwr-ec-pch-sys-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_PWROK output to PCH"; + enum-name = "PWR_EC_PCH_SYS_PWROK"; + gpios = <&gpiof 2 0>; + output; + }; + pwr-sys-rst-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_RESET# output to PCH"; + enum-name = "PWR_SYS_RST"; + gpios = <&gpiod 1 (GPIO_ACTIVE_LOW|GPIO_OPEN_DRAIN)>; + output; + }; + pwr-slp-s4 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S4 virtual wire input from PCH"; + enum-name = "PWR_SLP_S4"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; + vw-invert; + }; + pwr-slp-s5 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S5 virtual wire input from PCH"; + enum-name = "PWR_SLP_S5"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5"; + vw-invert; + }; + pwr-all-sys-pwrgd { + /* + * This is a board level signal, since this + * signal needs some special processing. + */ + compatible = "intel,ap-pwrseq-external"; + dbg-label = "Combined all power good"; + enum-name = "PWR_ALL_SYS_PWRGD"; + }; + pwr-adc-pp3300 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP3300_PROC"; + enum-name = "PWR_DSW_PWROK"; + trigger-high = <&vcmp0>; + trigger-low = <&vcmp1>; + }; + pwr-adc-pp1p05 { + compatible = "intel,ap-pwrseq-adc"; + dbg-label = "PP1P05_PROC"; + enum-name = "PWR_PG_PP1P05"; + trigger-high = <&vcmp2>; + trigger-low = <&vcmp3>; + }; + +}; + +&vcmp0 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_GREATER>; + /* + * This is 90% of nominal voltage considering voltage + * divider on ADC input. + */ + threshold-mv = <2448>; + io-channels = <&adc0 0>; +}; +&vcmp1 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_LESS_OR_EQUAL>; + threshold-mv = <2448>; + io-channels = <&adc0 0>; +}; +&vcmp2 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_GREATER>; + /* Setting at 90% of nominal voltage */ + threshold-mv = <945>; + io-channels = <&adc0 14>; +}; +&vcmp3 { + status = "okay"; + scan-period = <IT8XXX2_VCMP_SCAN_PERIOD_600US>; + comparison = <IT8XXX2_VCMP_LESS_OR_EQUAL>; + threshold-mv = <945>; + io-channels = <&adc0 14>; +}; diff --git a/zephyr/projects/nissa/yaviks/prj.conf b/zephyr/projects/nissa/yaviks/prj.conf new file mode 100644 index 0000000000..a3c0d05000 --- /dev/null +++ b/zephyr/projects/nissa/yaviks/prj.conf @@ -0,0 +1,31 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_BOARD_YAVIKS=y + +# Ensure recovery key combination (esc+refresh+power) is reliable: b/236580049 +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y + +# Sensors: disabled; yaviks is clamshell-only +CONFIG_PLATFORM_EC_LID_ANGLE=n +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=n +CONFIG_PLATFORM_EC_MOTIONSENSE=n +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=n +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=n +CONFIG_PLATFORM_EC_ACCEL_FIFO=n +CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=n +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=n +CONFIG_PLATFORM_EC_TABLET_MODE=n +CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=n +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=n +CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ=100000 + +CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD=y + +# No fan supported, and tach is default-enabled +CONFIG_TACH_IT8XXX2=n + +# LED +CONFIG_PLATFORM_EC_LED_PWM=n diff --git a/zephyr/projects/nissa/yaviks/src/charger.c b/zephyr/projects/nissa/yaviks/src/charger.c new file mode 100644 index 0000000000..786bb1bd3c --- /dev/null +++ b/zephyr/projects/nissa/yaviks/src/charger.c @@ -0,0 +1,56 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> + +#include "battery.h" +#include "charger.h" +#include "console.h" +#include "driver/charger/sm5803.h" +#include "extpower.h" +#include "usb_pd.h" +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +int extpower_is_present(void) +{ + int port; + int rv; + bool acok; + + for (port = 0; port < board_get_usb_pd_port_count(); port++) { + rv = sm5803_is_acok(port, &acok); + if ((rv == EC_SUCCESS) && acok) + return 1; + } + + return 0; +} + +/* + * Yaviks does not have a GPIO indicating whether extpower is present, + * so detect using the charger(s). + */ +__override void board_check_extpower(void) +{ + static int last_extpower_present; + int extpower_present = extpower_is_present(); + + if (last_extpower_present ^ extpower_present) + extpower_handle_update(extpower_present); + + last_extpower_present = extpower_present; +} + +__override void board_hibernate(void) +{ + /* Shut down the chargers */ + if (board_get_usb_pd_port_count() == 2) + sm5803_hibernate(CHARGER_SECONDARY); + sm5803_hibernate(CHARGER_PRIMARY); + LOG_INF("Charger(s) hibernated"); + cflush(); +} diff --git a/zephyr/projects/nissa/yaviks/src/hdmi.c b/zephyr/projects/nissa/yaviks/src/hdmi.c new file mode 100644 index 0000000000..d15e9fb034 --- /dev/null +++ b/zephyr/projects/nissa/yaviks/src/hdmi.c @@ -0,0 +1,28 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros_board_info.h> +#include "nissa_hdmi.h" + +__override void nissa_configure_hdmi_power_gpios(void) +{ + /* + * Yaviks versions before 2 need hdmi-en-odl to be + * pulled down to enable VCC on the HDMI port, but later + * versions (and other boards) disconnect this so + * the port's VCC directly follows en-rails-odl. Only + * configure the GPIO if needed, to save power. + */ + uint32_t board_version = 0; + + /* CBI errors ignored, will configure the pin */ + cbi_get_board_version(&board_version); + if (board_version < 2) { + nissa_configure_hdmi_vcc(); + } + + /* Still always need core rails controlled */ + nissa_configure_hdmi_rails(); +} diff --git a/zephyr/projects/nissa/yaviks/src/keyboard.c b/zephyr/projects/nissa/yaviks/src/keyboard.c new file mode 100644 index 0000000000..1e5ac7a953 --- /dev/null +++ b/zephyr/projects/nissa/yaviks/src/keyboard.c @@ -0,0 +1,50 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" +#include "keyboard_scan.h" +#include "timer.h" + +/* Keyboard scan setting */ +__override struct keyboard_scan_config keyscan_config = { + /* Increase from 50 us, because KSO_02 passes through the H1. */ + .output_settle_us = 80, + /* Other values should be the same as the default configuration. */ + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x1c, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xa4, 0xff, 0xf6, 0x55, 0xfe, 0xff, 0xff, 0xff, /* full set */ + }, +}; + +static const struct ec_response_keybd_config yaviks_kb_legacy = { + .num_top_row_keys = 13, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_KBD_BKLIGHT_TOGGLE, /* T8 */ + TK_PLAY_PAUSE, /* T9 */ + TK_MICMUTE, /* T10 */ + TK_VOL_MUTE, /* T11 */ + TK_VOL_DOWN, /* T12 */ + TK_VOL_UP, /* T13 */ + }, + .capabilities = KEYBD_CAP_NUMERIC_KEYPAD, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &yaviks_kb_legacy; +} diff --git a/zephyr/projects/nissa/yaviks/src/led.c b/zephyr/projects/nissa/yaviks/src/led.c new file mode 100644 index 0000000000..e4f49dc9ad --- /dev/null +++ b/zephyr/projects/nissa/yaviks/src/led.c @@ -0,0 +1,231 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> + +#include "battery.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "chipset.h" +#include "ec_commands.h" +#include "gpio.h" +#include "host_command.h" +#include "led_common.h" +#include "hooks.h" + +#define BAT_LED_ON 0 +#define BAT_LED_OFF 1 + +#define BATT_LOW_BCT 10 + +#define LED_TICKS_PER_CYCLE 4 +#define LED_TICKS_PER_CYCLE_S3 4 +#define LED_ON_TICKS 2 +#define POWER_LED_ON_S3_TICKS 2 + +const enum ec_led_id supported_led_ids[] = { EC_LED_ID_LEFT_LED, + EC_LED_ID_RIGHT_LED }; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_AMBER, + LED_WHITE, + LED_COLOR_COUNT /* Number of colors, not a color itself */ +}; + +enum led_port { LEFT_PORT = 0, RIGHT_PORT }; + +static void led_set_color_battery(int port, enum led_color color) +{ + const struct gpio_dt_spec *amber_led, *white_led; + + if (port == LEFT_PORT) { + amber_led = GPIO_DT_FROM_NODELABEL(gpio_c0_charger_led_amber_l); + white_led = GPIO_DT_FROM_NODELABEL(gpio_c0_charger_led_white_l); + } else if (port == RIGHT_PORT) { + amber_led = GPIO_DT_FROM_NODELABEL(gpio_c1_charger_led_amber_l); + white_led = GPIO_DT_FROM_NODELABEL(gpio_c1_charger_led_white_l); + } + + switch (color) { + case LED_WHITE: + gpio_pin_set_dt(white_led, BAT_LED_ON); + gpio_pin_set_dt(amber_led, BAT_LED_OFF); + break; + case LED_AMBER: + gpio_pin_set_dt(white_led, BAT_LED_OFF); + gpio_pin_set_dt(amber_led, BAT_LED_ON); + break; + case LED_OFF: + gpio_pin_set_dt(white_led, BAT_LED_OFF); + gpio_pin_set_dt(amber_led, BAT_LED_OFF); + break; + default: + break; + } +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + break; + case EC_LED_ID_RIGHT_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + break; + default: + break; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(LEFT_PORT, LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(LEFT_PORT, LED_AMBER); + else + led_set_color_battery(LEFT_PORT, LED_OFF); + break; + case EC_LED_ID_RIGHT_LED: + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(RIGHT_PORT, LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(RIGHT_PORT, LED_AMBER); + else + led_set_color_battery(RIGHT_PORT, LED_OFF); + break; + default: + return EC_ERROR_PARAM1; + } + + return EC_SUCCESS; +} + +/* + * Set active charge port color to the parameter, turn off all others. + * If no port is active (-1), turn off all LEDs. + */ +static void set_active_port_color(enum led_color color) +{ + int port = charge_manager_get_active_charge_port(); + + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) + led_set_color_battery(RIGHT_PORT, + (port == RIGHT_PORT) ? color : LED_OFF); + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) + led_set_color_battery(LEFT_PORT, + (port == LEFT_PORT) ? color : LED_OFF); +} + +static void led_set_battery(void) +{ + static unsigned int battery_ticks; + static int suspend_ticks; + + battery_ticks++; + + /* + * Override battery LEDs for Yaviks, Yaviks is non-power LED + * design, blinking both two side battery white LEDs to indicate + * system suspend with non-charging state. + */ + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + charge_get_state() != PWR_STATE_CHARGE) { + suspend_ticks++; + + led_set_color_battery(RIGHT_PORT, + suspend_ticks % LED_TICKS_PER_CYCLE_S3 < + POWER_LED_ON_S3_TICKS ? + LED_WHITE : + LED_OFF); + led_set_color_battery(LEFT_PORT, + suspend_ticks % LED_TICKS_PER_CYCLE_S3 < + POWER_LED_ON_S3_TICKS ? + LED_WHITE : + LED_OFF); + return; + } + + suspend_ticks = 0; + + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + /* Always indicate when charging, even in suspend. */ + set_active_port_color(LED_AMBER); + break; + case PWR_STATE_DISCHARGE: + /* + * Blinking amber LEDs slowly if battery is lower 10 + * percentage. + */ + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { + if (charge_get_percent() < BATT_LOW_BCT) + led_set_color_battery( + RIGHT_PORT, + (battery_ticks % LED_TICKS_PER_CYCLE < + LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + else + led_set_color_battery(RIGHT_PORT, LED_OFF); + } + + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) { + if (charge_get_percent() < BATT_LOW_BCT) + led_set_color_battery( + LEFT_PORT, + (battery_ticks % LED_TICKS_PER_CYCLE < + LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + else + led_set_color_battery(LEFT_PORT, LED_OFF); + } + break; + case PWR_STATE_ERROR: + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { + led_set_color_battery( + RIGHT_PORT, + (battery_ticks & 0x1) ? LED_AMBER : LED_OFF); + } + + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) { + led_set_color_battery(LEFT_PORT, (battery_ticks & 0x1) ? + LED_AMBER : + LED_OFF); + } + break; + case PWR_STATE_CHARGE_NEAR_FULL: + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_FORCED_IDLE: + set_active_port_color( + (battery_ticks % LED_TICKS_PER_CYCLE < LED_ON_TICKS) ? + LED_AMBER : + LED_OFF); + break; + default: + /* Other states don't alter LED behavior */ + break; + } +} + +/* Called by hook task every TICK(IT83xx 500ms) */ +static void led_tick(void) +{ + led_set_battery(); +} +DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/nissa/yaviks/src/usbc.c b/zephyr/projects/nissa/yaviks/src/usbc.c new file mode 100644 index 0000000000..48f7cfd9cb --- /dev/null +++ b/zephyr/projects/nissa/yaviks/src/usbc.c @@ -0,0 +1,393 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> +#include <ap_power/ap_power.h> + +#include "charge_state_v2.h" +#include "chipset.h" +#include "hooks.h" +#include "usb_mux.h" +#include "system.h" +#include "driver/charger/sm5803.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" + +#include "nissa_common.h" + +LOG_MODULE_DECLARE(nissa, CONFIG_NISSA_LOG_LEVEL); + +struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it8xxx2_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + { + /* + * Sub-board: optional PS8745 TCPC+redriver. Behaves the same + * as PS8815. + */ + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C1_TCPC, + .addr_flags = PS8XXX_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + /* PS8745 implements TCPCI 2.0 */ + .flags = TCPC_FLAGS_TCPCI_REV2_0, + }, +}; + +/* Vconn control for integrated ITE TCPC */ +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* Vconn control is only for port 0 */ + if (port) + return; + + if (cc_pin == USBPD_CC_PIN_1) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_usb_c0_cc1_vconn), + !!enabled); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_usb_c0_cc2_vconn), + !!enabled); +} + +__override bool pd_check_vbus_level(int port, enum vbus_level level) +{ + return sm5803_check_vbus_level(port, level); +} + +/* + * Putting chargers into LPM when in suspend reduces power draw by about 8mW + * per charger, but also seems critical to correct operation in source mode: + * if chargers are not in LPM when a sink is first connected, VBUS sourcing + * works even if the partner is later removed (causing LPM entry) and + * reconnected (causing LPM exit). If in LPM initially, sourcing VBUS + * consistently causes the charger to report (apparently spurious) overcurrent + * failures. + * + * In short, this is important to making things work correctly but we don't + * understand why. + */ +static void board_chargers_suspend(struct ap_power_ev_callback *const cb, + const struct ap_power_ev_data data) +{ + void (*fn)(int chgnum); + + switch (data.event) { + case AP_POWER_SUSPEND: + fn = sm5803_enable_low_power_mode; + break; + case AP_POWER_RESUME: + fn = sm5803_disable_low_power_mode; + break; + default: + LOG_WRN("%s: power event %d is not recognized", __func__, + data.event); + return; + } + + fn(CHARGER_PRIMARY); + if (board_get_charger_chip_count() > 1) + fn(CHARGER_SECONDARY); +} + +static int board_chargers_suspend_init(const struct device *unused) +{ + static struct ap_power_ev_callback cb = { + .handler = board_chargers_suspend, + .events = AP_POWER_SUSPEND | AP_POWER_RESUME, + }; + ap_power_ev_add_callback(&cb); + return 0; +} +SYS_INIT(board_chargers_suspend_init, APPLICATION, 0); + +int board_set_active_charge_port(int port) +{ + int is_real_port = (port >= 0 && port < board_get_usb_pd_port_count()); + int i; + int old_port; + int rv; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + old_port = charge_manager_get_active_charge_port(); + LOG_INF("Charge update: p%d -> p%d", old_port, port); + + /* Check if port is sourcing VBUS. */ + if (port != CHARGE_PORT_NONE && charger_is_sourcing_otg_power(port)) { + LOG_WRN("Skip enable p%d: already sourcing", port); + return EC_ERROR_INVAL; + } + + /* Disable sinking on all ports except the desired one */ + for (i = 0; i < board_get_usb_pd_port_count(); i++) { + if (i == port) + continue; + + if (sm5803_vbus_sink_enable(i, 0)) + /* + * Do not early-return because this can fail during + * power-on which would put us into a loop. + */ + LOG_WRN("p%d: sink path disable failed.", i); + } + + /* Don't enable anything (stop here) if no ports were requested */ + if ((port == CHARGE_PORT_NONE) || (old_port == port)) + return EC_SUCCESS; + + /* + * Stop the charger IC from switching while changing ports. Otherwise, + * we can overcurrent the adapter we're switching to. (crbug.com/926056) + */ + if (old_port != CHARGE_PORT_NONE) + charger_discharge_on_ac(1); + + /* Enable requested charge port. */ + rv = sm5803_vbus_sink_enable(port, 1); + if (rv) + LOG_WRN("p%d: sink path enable failed: code %d", port, rv); + + /* Allow the charger IC to begin/continue switching. */ + charger_discharge_on_ac(0); + + return rv; +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * TCPC 0 is embedded in the EC and processes interrupts in the chip + * code (it83xx/intc.c). This function only needs to poll port C1 if + * present. + */ + uint16_t status = 0; + int regval; + + /* Is the C1 port present and its IRQ line asserted? */ + if (board_get_usb_pd_port_count() == 2 && + !gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) { + /* + * C1 IRQ is shared between BC1.2 and TCPC; poll TCPC to see if + * it asserted the IRQ. + */ + if (!tcpc_read16(1, TCPC_REG_ALERT, ®val)) { + if (regval) + status = PD_STATUS_TCPC_ALERT_1; + } + } + + return status; +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + if (port < 0 || port >= board_get_usb_pd_port_count()) + return; + + prev_en = charger_is_sourcing_otg_power(port); + + /* Disable Vbus */ + charger_enable_otg_power(port, 0); + + /* Discharge Vbus if previously enabled */ + if (prev_en) + sm5803_set_vbus_disch(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + enum ec_error_list rv; + + if (port < 0 || port > board_get_usb_pd_port_count()) { + LOG_WRN("Port C%d does not exist, cannot enable VBUS", port); + return EC_ERROR_INVAL; + } + + /* Disable sinking */ + rv = sm5803_vbus_sink_enable(port, 0); + if (rv) { + LOG_WRN("C%d failed to disable sinking: %d", port, rv); + return rv; + } + + /* Disable Vbus discharge */ + rv = sm5803_set_vbus_disch(port, 0); + if (rv) { + LOG_WRN("C%d failed to clear VBUS discharge: %d", port, rv); + return rv; + } + + /* Provide Vbus */ + rv = charger_enable_otg_power(port, 1); + if (rv) { + LOG_WRN("C%d failed to enable VBUS sourcing: %d", port, rv); + return rv; + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int rv; + const int current = rp == TYPEC_RP_3A0 ? 3000 : 1500; + + rv = charger_set_otg_current_voltage(port, current, 5000); + if (rv != EC_SUCCESS) { + LOG_WRN("Failed to set source ilimit on port %d to %d: %d", + port, current, rv); + } +} + +void board_reset_pd_mcu(void) +{ + /* + * Do nothing. The integrated TCPC for C0 lacks a dedicated reset + * command, and C1 (if present) doesn't have a reset pin connected + * to the EC. + */ +} + +#define INT_RECHECK_US 5000 + +/* C0 interrupt line shared by BC 1.2 and charger */ + +static void check_c0_line(void); +DECLARE_DEFERRED(check_c0_line); + +static void notify_c0_chips(void) +{ + usb_charger_task_set_event(0, USB_CHG_EVENT_BC12); + sm5803_interrupt(0); +} + +static void check_c0_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_int_odl))) { + notify_c0_chips(); + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); + } +} + +void usb_c0_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c0_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c0_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); +} + +/* C1 interrupt line shared by BC 1.2, TCPC, and charger */ +static void check_c1_line(void); +DECLARE_DEFERRED(check_c1_line); + +static void notify_c1_chips(void) +{ + schedule_deferred_pd_interrupt(1); + usb_charger_task_set_event(1, USB_CHG_EVENT_BC12); + /* Charger is handled in board_process_pd_alert */ +} + +static void check_c1_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips. + */ + if (!gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) { + notify_c1_chips(); + hook_call_deferred(&check_c1_line_data, INT_RECHECK_US); + } +} + +void usb_c1_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c1_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c1_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c1_line_data, INT_RECHECK_US); +} + +/* + * Check state of IRQ lines at startup, ensuring an IRQ that happened before + * the EC started up won't get lost (leaving the IRQ line asserted and blocking + * any further interrupts on the port). + * + * Although the PD task will check for pending TCPC interrupts on startup, + * the charger sharing the IRQ will not be polled automatically. + */ +void board_handle_initial_typec_irq(void) +{ + check_c0_line(); + if (board_get_usb_pd_port_count() == 2) + check_c1_line(); +} +/* + * This must run after sub-board detection (which happens in EC main()), + * but isn't depended on by anything else either. + */ +DECLARE_HOOK(HOOK_INIT, board_handle_initial_typec_irq, HOOK_PRIO_LAST); + +/* + * Handle charger interrupts in the PD task. Not doing so can lead to a priority + * inversion where we fail to respond to TCPC alerts quickly enough because we + * don't get another edge on a shared IRQ until the charger interrupt is cleared + * (or the IRQ is polled again), which happens in the low-priority charger task: + * the high-priority type-C handler is thus blocked on the lower-priority + * charger. + * + * To avoid that, we run charger interrupts at the same priority. + */ +void board_process_pd_alert(int port) +{ + /* + * Port 0 doesn't use an external TCPC, so its interrupts don't need + * this special handling. + */ + if (port == 1 && + !gpio_pin_get_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_int_odl))) { + sm5803_handle_interrupt(port); + } +} + +int pd_snk_is_vbus_provided(int port) +{ + int chg_det = 0; + + sm5803_get_chg_det(port, &chg_det); + + return chg_det; +} diff --git a/zephyr/projects/nissa/yaviks/yaviks_vif.xml b/zephyr/projects/nissa/yaviks/yaviks_vif.xml new file mode 100644 index 0000000000..966ac9db57 --- /dev/null +++ b/zephyr/projects/nissa/yaviks/yaviks_vif.xml @@ -0,0 +1,350 @@ +<?xml version="1.0" encoding="utf-8"?>
+<vif:VIF xmlns:opt="http://usb.org/VendorInfoFileOptionalContent.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:vif="http://usb.org/VendorInfoFile.xsd">
+ <vif:VIF_Specification>3.19</vif:VIF_Specification>
+ <vif:VIF_App>
+ <vif:Vendor>USB-IF</vif:Vendor>
+ <vif:Name>VIF Editor</vif:Name>
+ <vif:Version>3.2.4.0</vif:Version>
+ </vif:VIF_App>
+ <vif:Vendor_Name>Google</vif:Vendor_Name>
+ <vif:Model_Part_Number>Yaviks</vif:Model_Part_Number>
+ <vif:Product_Revision>1</vif:Product_Revision>
+ <vif:TID>0</vif:TID>
+ <vif:VIF_Product_Type value="0">Port Product</vif:VIF_Product_Type>
+ <vif:Certification_Type value="1">Reference Platform</vif:Certification_Type>
+ <vif:Product>
+ <!--Product Level Content:-->
+ </vif:Product>
+ <vif:Component>
+ <!--Component 0: Port 0-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>0</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="false" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="0" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+ <vif:Component>
+ <!--Component 1: Port 1-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Component-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Port_Label>1</vif:Port_Label>
+ <vif:Connector_Type value="2">Type-C®</vif:Connector_Type>
+ <vif:USB4_Supported value="false" />
+ <vif:USB_PD_Support value="true" />
+ <vif:PD_Port_Type value="4">DRP</vif:PD_Port_Type>
+ <vif:Type_C_State_Machine value="2">DRP</vif:Type_C_State_Machine>
+ <vif:Port_Battery_Powered value="true" />
+ <vif:BC_1_2_Support value="2">Charging Port</vif:BC_1_2_Support>
+ <vif:Captive_Cable value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;General PD-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Spec_Revision_Major value="3" />
+ <vif:PD_Spec_Revision_Minor value="1" />
+ <vif:PD_Spec_Version_Major value="1" />
+ <vif:PD_Spec_Version_Minor value="3" />
+ <vif:PD_Specification_Revision value="2">Revision 3</vif:PD_Specification_Revision>
+ <vif:SOP_Capable value="true" />
+ <vif:SOP_P_Capable value="true" />
+ <vif:SOP_PP_Capable value="true" />
+ <vif:SOP_P_Debug_Capable value="false" />
+ <vif:SOP_PP_Debug_Capable value="false" />
+ <vif:Manufacturer_Info_Supported_Port value="true" />
+ <vif:Manufacturer_Info_VID_Port value="6353">18D1</vif:Manufacturer_Info_VID_Port>
+ <vif:Manufacturer_Info_PID_Port value="20570">505A</vif:Manufacturer_Info_PID_Port>
+ <vif:Chunking_Implemented_SOP value="true" />
+ <vif:Unchunked_Extended_Messages_Supported value="false" />
+ <vif:Security_Msgs_Supported_SOP value="false" />
+ <vif:Unconstrained_Power value="false" />
+ <vif:Num_Fixed_Batteries value="1" />
+ <vif:Num_Swappable_Battery_Slots value="0" />
+ <vif:ID_Header_Connector_Type_SOP value="2">USB Type-C® Receptacle</vif:ID_Header_Connector_Type_SOP>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Capabilities-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:USB_Comms_Capable value="true" />
+ <vif:DR_Swap_To_DFP_Supported value="true" />
+ <vif:DR_Swap_To_UFP_Supported value="false" />
+ <vif:VCONN_Swap_To_On_Supported value="true" />
+ <vif:VCONN_Swap_To_Off_Supported value="true" />
+ <vif:Responds_To_Discov_SOP_UFP value="false" />
+ <vif:Responds_To_Discov_SOP_DFP value="true" />
+ <vif:Attempts_Discov_SOP value="true" />
+ <vif:Power_Interruption_Available value="0">No Interruption Possible</vif:Power_Interruption_Available>
+ <vif:Data_Reset_Supported value="false" />
+ <vif:Enter_USB_Supported value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Type-C®-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Type_C_Can_Act_As_Host value="true" />
+ <vif:Type_C_Can_Act_As_Device value="false" />
+ <vif:Type_C_Implements_Try_SRC value="true" />
+ <vif:Type_C_Implements_Try_SNK value="false" />
+ <vif:Type_C_Supports_Audio_Accessory value="false" />
+ <vif:Type_C_Is_VCONN_Powered_Accessory value="false" />
+ <vif:Type_C_Is_Debug_Target_SRC value="true" />
+ <vif:Type_C_Is_Debug_Target_SNK value="true" />
+ <vif:RP_Value value="1">1.5A</vif:RP_Value>
+ <vif:Type_C_Port_On_Hub value="false" />
+ <vif:Type_C_Power_Source value="2">Both</vif:Type_C_Power_Source>
+ <vif:Type_C_Sources_VCONN value="true" />
+ <vif:Type_C_Is_Alt_Mode_Controller value="true" />
+ <vif:Type_C_Is_Alt_Mode_Adapter value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Product Power-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Product_Total_Source_Power_mW value="15000">15000 mW</vif:Product_Total_Source_Power_mW>
+ <vif:Port_Source_Power_Type value="0">Assured</vif:Port_Source_Power_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;USB Host-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Host_Supports_USB_Data value="true" />
+ <vif:Host_Speed value="1">USB 3.2 Gen 1x1</vif:Host_Speed>
+ <vif:Host_Contains_Captive_Retimer value="true" />
+ <vif:Host_Truncates_DP_For_tDHPResponse value="false" />
+ <vif:Host_Is_Embedded value="false" />
+ <vif:Host_Suspend_Supported value="true" />
+ <vif:Is_DFP_On_Hub value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Battery Charging 1.2-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:BC_1_2_Charging_Port_Type value="1">CDP</vif:BC_1_2_Charging_Port_Type>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Source-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Source value="15000">15000 mW</vif:PD_Power_As_Source>
+ <vif:EPR_Supported_As_Src value="false" />
+ <vif:USB_Suspend_May_Be_Cleared value="false" />
+ <vif:Sends_Pings value="false" />
+ <vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink value="0">FR_Swap not supported</vif:FR_Swap_Type_C_Current_Capability_As_Initial_Sink>
+ <vif:Master_Port value="false" />
+ <vif:Num_Src_PDOs value="1" />
+ <vif:PD_OC_Protection value="true" />
+ <vif:PD_OCP_Method value="0">Over-Current Response</vif:PD_OCP_Method>
+ <!--Bundle: SrcPdoList-->
+ <vif:SrcPdoList>
+ <vif:SrcPDO>
+ <!--Source PDO 1-->
+ <vif:Src_PDO_Supply_Type value="0">Fixed</vif:Src_PDO_Supply_Type>
+ <vif:Src_PDO_Peak_Current value="0">100% IOC</vif:Src_PDO_Peak_Current>
+ <vif:Src_PDO_Voltage value="100">5000 mV</vif:Src_PDO_Voltage>
+ <vif:Src_PDO_Max_Current value="300">3000 mA</vif:Src_PDO_Max_Current>
+ <vif:Src_PD_OCP_OC_Debounce value="0">0 msec</vif:Src_PD_OCP_OC_Debounce>
+ <vif:Src_PD_OCP_OC_Threshold value="300">3000 mA</vif:Src_PD_OCP_OC_Threshold>
+ </vif:SrcPDO>
+ </vif:SrcPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;PD Sink-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:PD_Power_As_Sink value="45000">45000 mW</vif:PD_Power_As_Sink>
+ <vif:EPR_Supported_As_Snk value="false" />
+ <vif:No_USB_Suspend_May_Be_Set value="true" />
+ <vif:GiveBack_May_Be_Set value="false" />
+ <vif:Higher_Capability_Set value="false" />
+ <vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source value="0">FR_Swap not supported</vif:FR_Swap_Reqd_Type_C_Current_As_Initial_Source>
+ <vif:Num_Snk_PDOs value="3" />
+ <!--Bundle: SnkPdoList-->
+ <vif:SnkPdoList>
+ <vif:SnkPDO>
+ <!--Sink PDO 1-->
+ <vif:Snk_PDO_Supply_Type value="0">Fixed</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Voltage value="100">5000 mV</vif:Snk_PDO_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 2-->
+ <vif:Snk_PDO_Supply_Type value="1">Battery</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Op_Power value="60">15000 mW</vif:Snk_PDO_Op_Power>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ </vif:SnkPDO>
+ <vif:SnkPDO>
+ <!--Sink PDO 3-->
+ <vif:Snk_PDO_Supply_Type value="2">Variable</vif:Snk_PDO_Supply_Type>
+ <vif:Snk_PDO_Min_Voltage value="95">4750 mV</vif:Snk_PDO_Min_Voltage>
+ <vif:Snk_PDO_Max_Voltage value="300">15000 mV</vif:Snk_PDO_Max_Voltage>
+ <vif:Snk_PDO_Op_Current value="300">3000 mA</vif:Snk_PDO_Op_Current>
+ </vif:SnkPDO>
+ </vif:SnkPdoList>
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;Dual Role-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:Accepts_PR_Swap_As_Src value="true" />
+ <vif:Accepts_PR_Swap_As_Snk value="true" />
+ <vif:Requests_PR_Swap_As_Src value="true" />
+ <vif:Requests_PR_Swap_As_Snk value="true" />
+ <vif:FR_Swap_Supported_As_Initial_Sink value="false" />
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <!--;SOP Discover ID-->
+ <!--;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;-->
+ <vif:XID_SOP value="0" />
+ <vif:Data_Capable_As_USB_Host_SOP value="true" />
+ <vif:Data_Capable_As_USB_Device_SOP value="false" />
+ <vif:Product_Type_UFP_SOP value="0">Undefined</vif:Product_Type_UFP_SOP>
+ <vif:Product_Type_DFP_SOP value="0">Undefined</vif:Product_Type_DFP_SOP>
+ <vif:DFP_VDO_Port_Number value="1" />
+ <vif:Modal_Operation_Supported_SOP value="false" />
+ <vif:USB_VID_SOP value="6353">18D1</vif:USB_VID_SOP>
+ <vif:PID_SOP value="20570">505A</vif:PID_SOP>
+ <vif:bcdDevice_SOP value="0">0000</vif:bcdDevice_SOP>
+ </vif:Component>
+</vif:VIF>
\ No newline at end of file diff --git a/zephyr/projects/npcx_evb/npcx7/BUILD.py b/zephyr/projects/npcx_evb/npcx7/BUILD.py index 89afed0fc1..baa6774595 100644 --- a/zephyr/projects/npcx_evb/npcx7/BUILD.py +++ b/zephyr/projects/npcx_evb/npcx7/BUILD.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/npcx_evb/npcx7/CMakeLists.txt b/zephyr/projects/npcx_evb/npcx7/CMakeLists.txt index a61ddf6755..64429d586e 100644 --- a/zephyr/projects/npcx_evb/npcx7/CMakeLists.txt +++ b/zephyr/projects/npcx_evb/npcx7/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(npcx7) zephyr_include_directories(include) diff --git a/zephyr/projects/npcx_evb/npcx7/fan.dts b/zephyr/projects/npcx_evb/npcx7/fan.dts index adfd71c95d..dc4debdcb9 100644 --- a/zephyr/projects/npcx_evb/npcx7/fan.dts +++ b/zephyr/projects/npcx_evb/npcx7/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm0 0 PWM_KHZ(25) PWM_POLARITY_NORMAL>; - pwm-frequency = <25000>; rpm_min = <1000>; rpm_start = <1000>; rpm_max = <5200>; diff --git a/zephyr/projects/npcx_evb/npcx7/gpio.dts b/zephyr/projects/npcx_evb/npcx7/gpio.dts index d0aa642673..d44927609d 100644 --- a/zephyr/projects/npcx_evb/npcx7/gpio.dts +++ b/zephyr/projects/npcx_evb/npcx7/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/npcx_evb/npcx7/include/gpio_map.h b/zephyr/projects/npcx_evb/npcx7/include/gpio_map.h deleted file mode 100644 index c2b81fe5c6..0000000000 --- a/zephyr/projects/npcx_evb/npcx7/include/gpio_map.h +++ /dev/null @@ -1,9 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/npcx_evb/npcx7/interrupts.dts b/zephyr/projects/npcx_evb/npcx7/interrupts.dts index dfa4a321ef..3e92428ef4 100644 --- a/zephyr/projects/npcx_evb/npcx7/interrupts.dts +++ b/zephyr/projects/npcx_evb/npcx7/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/npcx_evb/npcx7/keyboard.dts b/zephyr/projects/npcx_evb/npcx7/keyboard.dts index e2a5010952..3fb6986f1a 100644 --- a/zephyr/projects/npcx_evb/npcx7/keyboard.dts +++ b/zephyr/projects/npcx_evb/npcx7/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -32,7 +32,6 @@ kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm2 0 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; }; }; diff --git a/zephyr/projects/npcx_evb/npcx7/prj.conf b/zephyr/projects/npcx_evb/npcx7/prj.conf index 39d082e363..5f1fc03f88 100644 --- a/zephyr/projects/npcx_evb/npcx7/prj.conf +++ b/zephyr/projects/npcx_evb/npcx7/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -35,8 +35,8 @@ CONFIG_PLATFORM_EC_CONSOLE_CMD_IRQ=y # eSPI CONFIG_ESPI=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y # Keyboard CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE=y @@ -45,6 +45,10 @@ CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE=y CONFIG_PLATFORM_EC_RTC=y CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC=y +# USB-C +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n + # Zephyr feature CONFIG_ASSERT=y CONFIG_SHELL_MINIMAL=n diff --git a/zephyr/projects/npcx_evb/npcx9/BUILD.py b/zephyr/projects/npcx_evb/npcx9/BUILD.py index efd96c9020..335f410d9b 100644 --- a/zephyr/projects/npcx_evb/npcx9/BUILD.py +++ b/zephyr/projects/npcx_evb/npcx9/BUILD.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/npcx_evb/npcx9/CMakeLists.txt b/zephyr/projects/npcx_evb/npcx9/CMakeLists.txt index a81ae87820..ef734c06f6 100644 --- a/zephyr/projects/npcx_evb/npcx9/CMakeLists.txt +++ b/zephyr/projects/npcx_evb/npcx9/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(npcx9) zephyr_include_directories(include) diff --git a/zephyr/projects/npcx_evb/npcx9/fan.dts b/zephyr/projects/npcx_evb/npcx9/fan.dts index adfd71c95d..dc4debdcb9 100644 --- a/zephyr/projects/npcx_evb/npcx9/fan.dts +++ b/zephyr/projects/npcx_evb/npcx9/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm0 0 PWM_KHZ(25) PWM_POLARITY_NORMAL>; - pwm-frequency = <25000>; rpm_min = <1000>; rpm_start = <1000>; rpm_max = <5200>; diff --git a/zephyr/projects/npcx_evb/npcx9/gpio.dts b/zephyr/projects/npcx_evb/npcx9/gpio.dts index d0aa642673..9a32112471 100644 --- a/zephyr/projects/npcx_evb/npcx9/gpio.dts +++ b/zephyr/projects/npcx_evb/npcx9/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -56,13 +56,17 @@ enum-name = "GPIO_BOARD_VERSION3"; }; }; +}; - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-irqs = < - &int_ac_present - &int_power_button - &int_lid_open - >; - }; +/* A falling edge detection type for PSL_IN2 */ +&psl_in2_gp00 { + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in2_gp00>; }; diff --git a/zephyr/projects/npcx_evb/npcx9/include/gpio_map.h b/zephyr/projects/npcx_evb/npcx9/include/gpio_map.h deleted file mode 100644 index c2b81fe5c6..0000000000 --- a/zephyr/projects/npcx_evb/npcx9/include/gpio_map.h +++ /dev/null @@ -1,9 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/npcx_evb/npcx9/interrupts.dts b/zephyr/projects/npcx_evb/npcx9/interrupts.dts index dfa4a321ef..3e92428ef4 100644 --- a/zephyr/projects/npcx_evb/npcx9/interrupts.dts +++ b/zephyr/projects/npcx_evb/npcx9/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/npcx_evb/npcx9/keyboard.dts b/zephyr/projects/npcx_evb/npcx9/keyboard.dts index e3ce1b1e20..3fb6986f1a 100644 --- a/zephyr/projects/npcx_evb/npcx9/keyboard.dts +++ b/zephyr/projects/npcx_evb/npcx9/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -32,7 +32,6 @@ kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm2 0 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; }; }; @@ -41,31 +40,3 @@ pinctrl-0 = <&pwm2_gpc4>; pinctrl-names = "default"; }; - -&cros_kb_raw { - status = "okay"; - /* No KSO2 (it's inverted and implemented by GPIO) */ - pinctrl-0 = < - &alt7_no_ksi0_sl - &alt7_no_ksi1_sl - &alt7_no_ksi2_sl - &alt7_no_ksi3_sl - &alt7_no_ksi4_sl - &alt7_no_ksi5_sl - &alt7_no_ksi6_sl - &alt7_no_ksi7_sl - &alt8_no_kso00_sl - &alt8_no_kso01_sl - &alt8_no_kso03_sl - &alt8_no_kso04_sl - &alt8_no_kso05_sl - &alt8_no_kso06_sl - &alt8_no_kso07_sl - &alt9_no_kso08_sl - &alt9_no_kso09_sl - &alt9_no_kso10_sl - &alt9_no_kso11_sl - &alt9_no_kso12_sl - >; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/npcx_evb/npcx9/prj.conf b/zephyr/projects/npcx_evb/npcx9/prj.conf index aa7e36a7a6..827b6366c6 100644 --- a/zephyr/projects/npcx_evb/npcx9/prj.conf +++ b/zephyr/projects/npcx_evb/npcx9/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -39,8 +39,8 @@ CONFIG_PLATFORM_EC_CONSOLE_CMD_IRQ=y # eSPI CONFIG_ESPI=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y # Keyboard CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE=y @@ -49,6 +49,10 @@ CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE=y CONFIG_PLATFORM_EC_RTC=y CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC=y +# USB-C +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n + # Zephyr feature CONFIG_ASSERT=y CONFIG_SHELL_MINIMAL=n diff --git a/zephyr/projects/posix-ec/BUILD.py b/zephyr/projects/posix-ec/BUILD.py deleted file mode 100644 index a324f2ad39..0000000000 --- a/zephyr/projects/posix-ec/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Define zmake projects for posix-ec.""" - -register_host_project(project_name="posix-ec") diff --git a/zephyr/projects/posix-ec/CMakeLists.txt b/zephyr/projects/posix-ec/CMakeLists.txt deleted file mode 100644 index 165de682a8..0000000000 --- a/zephyr/projects/posix-ec/CMakeLists.txt +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# SPDX-License-Identifier: Apache-2.0 - -cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(posix-ec) - -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") diff --git a/zephyr/projects/posix-ec/prj.conf b/zephyr/projects/posix-ec/prj.conf deleted file mode 100644 index f6549c7839..0000000000 --- a/zephyr/projects/posix-ec/prj.conf +++ /dev/null @@ -1,11 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_CROS_EC=y -CONFIG_PLATFORM_EC=y - -# Disable shimmed code. Can enabled selectively later -CONFIG_SHIMMED_TASKS=n -CONFIG_PLATFORM_EC_KEYBOARD=n -CONFIG_PLATFORM_EC_HOSTCMD=n diff --git a/zephyr/projects/rex/BUILD.py b/zephyr/projects/rex/BUILD.py new file mode 100644 index 0000000000..2537f61226 --- /dev/null +++ b/zephyr/projects/rex/BUILD.py @@ -0,0 +1,45 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""Rex Projects.""" + + +def register_variant( + project_name, extra_dts_overlays=(), extra_kconfig_files=() +): + """Register a variant of rex.""" + register_npcx_project( + project_name=project_name, + zephyr_board="npcx9m7f", + dts_overlays=[ + # Common to all projects. + here / "rex.dts", + # Project-specific DTS customization. + *extra_dts_overlays, + ], + kconfig_files=[ + # Common to all projects. + here / "prj.conf", + # Project-specific KConfig customization. + *extra_kconfig_files, + ], + ) + + +register_variant( + project_name="rex", + extra_dts_overlays=[ + here / "generated.dts", + here / "interrupts.dts", + here / "power_signals.dts", + here / "battery.dts", + here / "usbc.dts", + here / "keyboard.dts", + here / "led.dts", + here / "fan.dts", + here / "temp_sensors.dts", + here / "motionsense.dts", + ], + extra_kconfig_files=[here / "prj_rex.conf"], +) diff --git a/zephyr/projects/rex/CMakeLists.txt b/zephyr/projects/rex/CMakeLists.txt new file mode 100644 index 0000000000..27d7dff068 --- /dev/null +++ b/zephyr/projects/rex/CMakeLists.txt @@ -0,0 +1,12 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.20.5) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(rex) + +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") +zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ "src/board_power.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usbc_config.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC "src/usb_pd_policy.c") diff --git a/zephyr/projects/rex/Kconfig b/zephyr/projects/rex/Kconfig new file mode 100644 index 0000000000..7d17c27815 --- /dev/null +++ b/zephyr/projects/rex/Kconfig @@ -0,0 +1,11 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config BOARD_REX + bool "Google Rex Baseboard" + help + Build Google Rex reference board. The board uses Nuvoton + NPCX9 chip as the EC. + +source "Kconfig.zephyr" diff --git a/zephyr/projects/rex/battery.dts b/zephyr/projects/rex/battery.dts new file mode 100644 index 0000000000..e11346f48d --- /dev/null +++ b/zephyr/projects/rex/battery.dts @@ -0,0 +1,12 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: batgqa05l22 { + compatible = "powertech,batgqa05l22", "battery-smart"; + }; + }; +}; diff --git a/zephyr/projects/rex/fan.dts b/zephyr/projects/rex/fan.dts new file mode 100644 index 0000000000..aa6dcfde7d --- /dev/null +++ b/zephyr/projects/rex/fan.dts @@ -0,0 +1,39 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + fans { + compatible = "cros-ec,fans"; + + fan_0 { + pwms = <&pwm5 0 PWM_KHZ(1) PWM_POLARITY_NORMAL>; + rpm_min = <2200>; + rpm_start = <2200>; + rpm_max = <4200>; + tach = <&tach1>; + enable_gpio = <&gpio_en_pp5000_fan>; + }; + }; +}; + +/* Tachemeter for fan speed measurement */ +&tach1 { + status = "okay"; + pinctrl-0 = <&ta1_1_in_gp40>; + pinctrl-names = "default"; + port = <NPCX_TACH_PORT_A>; /* port-A is selected */ + sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ + pulses-per-round = <2>; /* number of pulses per round of encoder */ +}; + +&pwm5_gpb7 { + drive-open-drain; +}; + +&pwm5 { + status = "okay"; + pinctrl-0 = <&pwm5_gpb7>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/rex/generated.dts b/zephyr/projects/rex/generated.dts new file mode 100644 index 0000000000..549f0e5fde --- /dev/null +++ b/zephyr/projects/rex/generated.dts @@ -0,0 +1,362 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * This file is auto-generated - do not edit! + * + * TODO(b:/244441996): There are some errors in the main Rex EC GPIO spreadsheet + * which is used as input to create this device tree file. Until that issue is + * resolved, there are some edits required to this file to support EC + * functionality. + */ + +/ { + + named-adc-channels { + compatible = "named-adc-channels"; + + adc_ddr_soc: ddr_soc { + enum-name = "ADC_TEMP_SENSOR_1_DDR_SOC"; + io-channels = <&adc0 0>; + }; + adc_ambient: ambient { + enum-name = "ADC_TEMP_SENSOR_2"; + io-channels = <&adc0 1>; + }; + adc_charger: charger { + enum-name = "ADC_TEMP_SENSOR_3"; + io-channels = <&adc0 8>; + }; + adc_wwan: wwan { + enum-name = "ADC_TEMP_SENSOR_4"; + io-channels = <&adc0 7>; + }; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_acok_od: acok_od { + gpios = <&gpio0 0 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + }; + gpio_ccd_mode_odl: ccd_mode_odl { + gpios = <&gpioe 5 GPIO_ODR_LOW>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + gpio_cpu_c10_gate_l: cpu_c10_gate_l { + gpios = <&gpioa 7 GPIO_INPUT>; + }; + gpio_ec_accel_int_r_l: ec_accel_int_r_l { + gpios = <&gpio8 1 GPIO_INPUT>; + }; + gpio_ec_als_rgb_int_r_l: ec_als_rgb_int_r_l { + gpios = <&gpiod 4 GPIO_INPUT_PULL_UP>; + }; + gpio_ec_batt_pres_odl: ec_batt_pres_odl { + gpios = <&gpioa 3 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + gpio_ec_cbi_wp: ec_cbi_wp { + gpios = <&gpio7 3 GPIO_OUTPUT>; + }; + gpio_ec_edp_bl_en: ec_edp_bl_en { + gpios = <&gpiod 3 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + gpio_ec_gsc_packet_mode: ec_gsc_packet_mode { + gpios = <&gpio7 5 GPIO_ODR_HIGH>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_ec_imu_int_r_l: ec_imu_int_r_l { + gpios = <&gpio5 6 GPIO_INPUT_PULL_UP>; + }; + gpio_ec_imvp92_en_smb: ec_imvp92_en_smb { + gpios = <&gpiob 1 GPIO_OUTPUT>; + }; + gpio_ec_kb_bl_en_l: ec_kb_bl_en_l { + gpios = <&gpio8 6 GPIO_OUTPUT>; + }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpio1 7 (GPIO_OUTPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_ec_prochot_in_l: ec_prochot_in_l { + gpios = <&gpiof 0 GPIO_INPUT>; + }; + gpio_ec_prochot_odl: ec_prochot_odl { + gpios = <&gpio6 3 GPIO_ODR_HIGH>; + }; + gpio_ec_rst_r_odl: ec_rst_r_odl { + gpios = <&gpio7 7 GPIO_INPUT>; + }; + gpio_ec_soc_int_odl: ec_soc_int_odl { + gpios = <&gpio7 0 GPIO_ODR_LOW>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pwr_btn_odl: ec_soc_pwr_btn_odl { + gpios = <&gpioc 1 GPIO_ODR_LOW>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + gpios = <&gpioa 6 GPIO_OUTPUT>; + }; + gpio_ec_soc_rtcrst: ec_soc_rtcrst { + gpios = <&gpio7 6 GPIO_ODR_HIGH>; + }; + gpio_ec_soc_wake_r_odl: ec_soc_wake_r_odl { + gpios = <&gpioc 0 GPIO_ODR_LOW>; + }; + gpio_ec_spare_gpio42: ec_spare_gpio42 { + gpios = <&gpio4 2 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpio66: ec_spare_gpio66 { + gpios = <&gpio6 6 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpio94: ec_spare_gpio94 { + gpios = <&gpio9 4 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpioa2: ec_spare_gpioa2 { + gpios = <&gpioa 2 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpioa4: ec_spare_gpioa4 { + gpios = <&gpioa 4 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpioc7: ec_spare_gpioc7 { + gpios = <&gpioc 7 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpo32: ec_spare_gpo32 { + gpios = <&gpio3 2 GPIO_OUTPUT>; + }; + gpio_ec_spare_gpo35: ec_spare_gpo35 { + gpios = <&gpio3 5 GPIO_OUTPUT>; + }; + gpio_ec_voldn_btn_odl: ec_voldn_btn_odl { + gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_ec_volup_btn_odl: ec_volup_btn_odl { + gpios = <&gpio9 7 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + gpio_ec_wp_l: ec_wp_l { + gpios = <&gpioa 1 GPIO_INPUT>; + }; + gpio_en_pp5000_fan: en_pp5000_fan { + gpios = <&gpio6 1 GPIO_OUTPUT_LOW>; + }; + gpio_en_pp5000_usba_r: en_pp5000_usba_r { + gpios = <&gpiod 7 GPIO_OUTPUT>; + }; + gpio_en_s5_rails: en_s5_rails { + gpios = <&gpiob 6 GPIO_ODR_HIGH>; + enum-name = "GPIO_TEMP_SENSOR_POWER"; + }; + gpio_en_z1_rails: en_z1_rails { + gpios = <&gpio8 5 GPIO_OUTPUT>; + }; + gpio_gsc_ec_pwr_btn_odl: gsc_ec_pwr_btn_odl { + gpios = <&gpio0 1 GPIO_INPUT_PULL_UP>; + }; + gpio_imvp92_vrrdy_od: imvp92_vrrdy_od { + gpios = <&gpio4 3 GPIO_INPUT>; + }; + gpio_led_1_l: led_1_l { + gpios = <&gpioc 4 GPIO_OUTPUT>; + }; + gpio_led_2_l: led_2_l { + gpios = <&gpioc 3 GPIO_OUTPUT>; + }; + gpio_led_3_l: led_3_l { + gpios = <&gpioc 2 GPIO_OUTPUT>; + }; + gpio_led_4_l: led_4_l { + gpios = <&gpio6 0 GPIO_OUTPUT>; + }; + gpio_lid_open: lid_open { + gpios = <&gpiod 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_mech_pwr_btn_odl: mech_pwr_btn_odl { + gpios = <&gpio0 2 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_seq_ec_all_sys_pg: seq_ec_all_sys_pg { + gpios = <&gpiof 4 GPIO_INPUT>; + }; + gpio_seq_ec_rsmrst_odl: seq_ec_rsmrst_odl { + gpios = <&gpioe 2 GPIO_INPUT>; + }; + gpio_slp_s3_ls_l: slp_s3_ls_l { + gpios = <&gpio4 1 GPIO_INPUT>; + }; + gpio_sochot_odl: sochot_odl { + gpios = <&gpio9 6 GPIO_INPUT>; + }; + gpio_soc_pwrok: soc_pwrok { + gpios = <&gpioa 5 GPIO_OUTPUT>; + }; + gpio_sys_pwrok: sys_pwrok { + gpios = <&gpiob 0 GPIO_OUTPUT>; + }; + gpio_sys_rst_odl: sys_rst_odl { + gpios = <&gpioc 5 GPIO_INPUT>; + }; + gpio_sys_slp_s0ix_3v3_l: sys_slp_s0ix_3v3_l { + gpios = <&gpiod 5 GPIO_INPUT>; + }; + gpio_tablet_mode_l: tablet_mode_l { + gpios = <&gpio9 5 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + gpio_usb_c0_bc12_int_odl: usb_c0_bc12_int_odl { + gpios = <&gpioc 6 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_BC12_INT_ODL"; + }; + gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { + gpios = <&gpio6 2 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; + }; + gpio_usb_c0_rt_3p3_sx_en: usb_c0_rt_3p3_sx_en { + gpios = <&gpio0 3 GPIO_OUTPUT_LOW>; + }; + gpio_usb_c0_rt_int_odl: usb_c0_rt_int_odl { + gpios = <&gpioa 0 GPIO_INPUT>; + }; + gpio_usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { + gpios = <&gpioe 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; + }; + gpio_usb_c0_tcpc_rst_odl: usb_c0_tcpc_rst_odl { + gpios = <&gpio6 7 GPIO_ODR_HIGH>; + }; + gpio_usb_c1_bc12_int_odl: usb_c1_bc12_int_odl { + gpios = <&gpio5 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_BC12_INT_ODL"; + }; + gpio_usb_c1_frs_en: usb_c1_frs_en { + gpios = <&gpio8 3 GPIO_ODR_HIGH>; + }; + gpio_usb_c1_ppc_int_odl: usb_c1_ppc_int_odl { + gpios = <&gpiof 5 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; + }; + gpio_usb_c1_rst_odl: usb_c1_rst_odl { + gpios = <&gpio3 7 GPIO_ODR_LOW>; + }; + gpio_usb_c1_rt_int_odl: usb_c1_rt_int_odl { + gpios = <&gpio7 2 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_c1_rt_rst_r_odl: usb_c1_rt_rst_r_odl { + gpios = <&gpio7 4 GPIO_ODR_HIGH>; + }; + gpio_usb_c1_tcpc_int_odl: usb_c1_tcpc_int_odl { + gpios = <&gpio3 4 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; + }; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_ec_i2c_sensor: ec_i2c_sensor { + i2c-port = <&i2c0_0>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_ec_i2c_usb_c0_tcp: ec_i2c_usb_c0_tcp { + i2c-port = <&i2c1_0>; + enum-names = "I2C_PORT_USB_C0_TCPC"; + }; + i2c_ec_i2c_usb_c0_ppc_b: ec_i2c_usb_c0_ppc_b { + i2c-port = <&i2c2_0>; + enum-names = "I2C_PORT_PPC0"; + }; + i2c_ec_i2c_usb_c0_rt: ec_i2c_usb_c0_rt { + i2c-port = <&i2c3_0>; + enum-names = "I2C_PORT_USB_C0_RT"; + }; + i2c_ec_i2c_usb_c1_tcp: ec_i2c_usb_c1_tcp { + i2c-port = <&i2c4_1>; + enum-names = "I2C_PORT_USB_C1_TCPC"; + }; + i2c_ec_i2c_bat: ec_i2c_bat { + i2c-port = <&i2c5_0>; + enum-names = "I2C_PORT_BATTERY"; + }; + i2c_ec_i2c_usb_c1_mix: ec_i2c_usb_c1_mix { + i2c-port = <&i2c6_1>; + enum-names = "I2C_PORT_USB_1_MIX"; + }; + i2c_ec_i2c_mi: ec_i2c_mi { + i2c-port = <&i2c7_0>; + enum-names = "I2C_PORT_EEPROM"; + }; + }; +}; + +&adc0 { + status = "okay"; +}; + +&i2c0_0 { + status = "okay"; +}; + +&i2c1_0 { + status = "okay"; +}; + +&i2c2_0 { + status = "okay"; +}; + +&i2c3_0 { + status = "okay"; +}; + +&i2c4_1 { + status = "okay"; +}; + +&i2c5_0 { + status = "okay"; +}; + +&i2c6_1 { + status = "okay"; +}; + +&i2c7_0 { + status = "okay"; +}; + +&i2c_ctrl0 { + status = "okay"; +}; + +&i2c_ctrl1 { + status = "okay"; +}; + +&i2c_ctrl2 { + status = "okay"; +}; + +&i2c_ctrl3 { + status = "okay"; +}; + +&i2c_ctrl4 { + status = "okay"; +}; + +&i2c_ctrl5 { + status = "okay"; +}; + +&i2c_ctrl6 { + status = "okay"; +}; + +&i2c_ctrl7 { + status = "okay"; +}; diff --git a/zephyr/projects/trogdor/lazor/include/gpio_map.h b/zephyr/projects/rex/include/gpio_map.h index c2b81fe5c6..01cbc44396 100644 --- a/zephyr/projects/trogdor/lazor/include/gpio_map.h +++ b/zephyr/projects/rex/include/gpio_map.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/rex/interrupts.dts b/zephyr/projects/rex/interrupts.dts new file mode 100644 index 0000000000..7c4e6bca58 --- /dev/null +++ b/zephyr/projects/rex/interrupts.dts @@ -0,0 +1,65 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + gpio-interrupts { + compatible = "cros-ec,gpio-interrupts"; + + int_ac_present: ac_present { + irq-pin = <&gpio_acok_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "extpower_interrupt"; + }; + int_power_button: power_button { + irq-pin = <&gpio_mech_pwr_btn_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "power_button_interrupt"; + }; + int_lid_open: lid_open { + irq-pin = <&gpio_lid_open>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "lid_interrupt"; + }; + int_usb_c0_sbu_fault: c0_sbu_fault { + irq-pin = <&ioex_usb_c0_sbu_fault_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "sbu_fault_interrupt"; + }; + int_usb_c0_tcpc: usb_c0_tcpc { + irq-pin = <&gpio_usb_c0_tcpc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcpc_alert_event"; + }; + int_usb_c0_ppc: usb_c0_ppc { + irq-pin = <&gpio_usb_c0_ppc_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "ppc_interrupt"; + }; + int_usb_c0_bc12: usb_c0_bc12 { + irq-pin = <&gpio_usb_c0_bc12_int_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "bc12_interrupt"; + }; + int_imu: ec_imu { + irq-pin = <&gpio_ec_imu_int_r_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "lsm6dso_interrupt"; + }; + int_als_rgb: ec_als_rgb { + irq-pin = <&gpio_ec_als_rgb_int_r_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "tcs3400_interrupt"; + }; + int_accel: ec_accel { + irq-pin = <&gpio_ec_accel_int_r_l>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "lis2dw12_interrupt"; + }; + }; +}; + +/* Required node label that doesn't is named differently on Rex */ +gpio_ec_pch_wake_odl: &gpio_ec_soc_wake_r_odl {}; + diff --git a/zephyr/projects/rex/keyboard.dts b/zephyr/projects/rex/keyboard.dts new file mode 100644 index 0000000000..5248c4aaff --- /dev/null +++ b/zephyr/projects/rex/keyboard.dts @@ -0,0 +1,34 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = < + &ksi0_gp31 + &ksi1_gp30 + &ksi2_gp27 + &ksi3_gp26 + &ksi4_gp25 + &ksi5_gp24 + &ksi6_gp23 + &ksi7_gp22 + &kso00_gp21 + &kso01_gp20 + &kso03_gp16 + &kso04_gp15 + &kso05_gp14 + &kso06_gp13 + &kso07_gp12 + &kso08_gp11 + &kso09_gp10 + &kso10_gp07 + &kso11_gp06 + &kso12_gp05 + &kso13_gp04 + &kso14_gp82 + >; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/rex/led.dts b/zephyr/projects/rex/led.dts new file mode 100644 index 0000000000..94acb6da5c --- /dev/null +++ b/zephyr/projects/rex/led.dts @@ -0,0 +1,138 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + gpio-led-pins { + compatible = "cros-ec,gpio-led-pins"; + + color_off: color-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&gpio_led_1_l 1>, + <&gpio_led_2_l 1>; + }; + + color_white: color-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_WHITE"; + led-pins = <&gpio_led_1_l 1>, + <&gpio_led_2_l 0>; + }; + + color_amber: color-amber { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_AMBER"; + led-pins = <&gpio_led_1_l 0>, + <&gpio_led_2_l 1>; + }; + }; + + led-colors { + compatible = "cros-ec,led-policy"; + + power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + /* Blue 1 sec, off 3 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <3000>; + }; + }; + + power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-error { + charge-state = "PWR_STATE_ERROR"; + + /* Red 1 sec, off 1 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; + + /* White 2 sec, Amber 2 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <2000>; + }; + color-1 { + led-color = <&color_amber>; + period-ms = <2000>; + }; + }; + + power-state-idle-default { + charge-state = "PWR_STATE_IDLE"; + + color-0 { + led-color = <&color_white>; + }; + }; + }; +}; + +&gpio_led_1_l { + #led-pin-cells = <1>; +}; + +&gpio_led_2_l { + #led-pin-cells = <1>; +}; + +&gpio_led_3_l { + #led-pin-cells = <1>; +}; + +&gpio_led_4_l { + #led-pin-cells = <1>; +}; diff --git a/zephyr/projects/rex/motionsense.dts b/zephyr/projects/rex/motionsense.dts new file mode 100644 index 0000000000..8b1c80921b --- /dev/null +++ b/zephyr/projects/rex/motionsense.dts @@ -0,0 +1,257 @@ +/* + * Copyright 2022 The ChromiumOS Authors + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include <dt-bindings/motionsense/utils.h> + + +/ { + aliases { + /* + * motion sense's <>_INT_EVENT is handled + * by alias. Using the alias, each driver creates + * its own <>_INT_EVENT. + */ + lsm6dso-int = &base_accel; + lis2dw12-int = &lid_accel; + tcs3400-int = &als_clear; + }; + + /* + * Declare mutexes used by sensor drivers. + * A mutex node is used to create an instance of mutex_t. + * A mutex node is referenced by a sensor node if the + * corresponding sensor driver needs to use the + * instance of the mutex. + */ + motionsense-mutex { + compatible = "cros-ec,motionsense-mutex"; + mutex_lis2dw12: lis2dw12-mutex { + }; + + mutex_lsm6dso: lsm6dso-mutex { + }; + }; + + /* Rotation matrix used by drivers. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <0 1 0 + 1 0 0 + 0 0 (-1)>; + }; + base_rot_ref: base-rotation-ref { + mat33 = <1 0 0 + 0 (-1) 0 + 0 0 (-1)>; + }; + }; + + /* + * Driver specific data. A driver-specific data can be shared with + * different motion sensors while they are using the same driver. + * + * If a node's compatible starts with "cros-ec,accelgyro-", it is for + * a common structure defined in accelgyro.h. + * e.g) compatible = "cros-ec,accelgyro-als-drv-data" is for + * "struct als_drv_data_t" in accelgyro.h + */ + motionsense-sensor-data { + lis2dw12_data: lis2dw12-drv-data { + compatible = "cros-ec,drvdata-lis2dw12"; + status = "okay"; + }; + + lsm6dso_accel_data: lsm6dso-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + lsm6dso_gyro_data: lsm6dso-drv-data { + compatible = "cros-ec,drvdata-lsm6dso"; + status = "okay"; + }; + + tcs_clear_data: tcs3400-clear-drv-data { + compatible = "cros-ec,drvdata-tcs3400-clear"; + status = "okay"; + + als-drv-data { + compatible = "cros-ec,accelgyro-als-drv-data"; + als-cal { + scale = <1>; + uscale = <0>; + offset = <0>; + als-channel-scale { + compatible = + "cros-ec,accelgyro-als-channel-scale"; + k-channel-scale = <1>; + cover-scale = <1>; + }; + }; + }; + }; + + tcs_rgb_data: tcs3400-rgb-drv-data { + compatible = "cros-ec,drvdata-tcs3400-rgb"; + status = "okay"; + + /* node for rgb_calibration_t defined in accelgyro.h */ + rgb_calibration { + compatible = + "cros-ec,accelgyro-rgb-calibration"; + + irt = <1>; + + rgb-cal-x { + offset = <0>; + coeff = <0 0 0 1>; + als-channel-scale { + compatible = + "cros-ec,accelgyro-als-channel-scale"; + k-channel-scale = <1>; + cover-scale = <1>; + }; + }; + rgb-cal-y { + offset = <0>; + coeff = <0 0 0 1>; + als-channel-scale { + compatible = + "cros-ec,accelgyro-als-channel-scale"; + k-channel-scale = <1>; + cover-scale = <1>; + }; + }; + rgb-cal-z { + offset = <0>; + coeff = <0 0 0 1>; + als-channel-scale { + compatible = + "cros-ec,accelgyro-als-channel-scale"; + k-channel-scale = <1>; + cover-scale = <1>; + }; + }; + }; + }; + }; + + /* + * List of motion sensors that creates motion_sensors array. + * The nodelabel "lid_accel" and "base_accel" are used to indicate + * motion sensor IDs for lid angle calculation. + */ + motionsense-sensor { + lid_accel: lid-accel { + compatible = "cros-ec,lis2dw12"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_LID"; + mutex = <&mutex_lis2dw12>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&lid_rot_ref>; + default-range = <2>; + drv-data = <&lis2dw12_data>; + i2c-spi-addr-flags = "LIS2DWL_ADDR0_FLAGS"; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + }; + }; + }; + + base_accel: base-accel { + compatible = "cros-ec,lsm6dso-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&mutex_lsm6dso>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + default-range = <4>; + drv-data = <&lsm6dso_accel_data>; + i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS"; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + odr = <(10000 | ROUND_UP_FLAG)>; + ec-rate = <(100 * USEC_PER_MSEC)>; + }; + ec-s3 { + odr = <(10000 | ROUND_UP_FLAG)>; + ec-rate = <(100 * USEC_PER_MSEC)>; + }; + }; + }; + + base-gyro { + compatible = "cros-ec,lsm6dso-gyro"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_BASE"; + mutex = <&mutex_lsm6dso>; + port = <&i2c_ec_i2c_sensor>; + rot-standard-ref = <&base_rot_ref>; + default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */ + drv-data = <&lsm6dso_gyro_data>; + i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS"; + }; + + als_clear: base-als-clear { + compatible = "cros-ec,tcs3400-clear"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_CAMERA"; + port = <&i2c_ec_i2c_sensor>; + default-range = <0x10000>; + drv-data = <&tcs_clear_data>; + i2c-spi-addr-flags = "TCS3400_I2C_ADDR_FLAGS"; + configs { + compatible = + "cros-ec,motionsense-sensor-config"; + ec-s0 { + /* Run ALS sensor in S0 */ + odr = <1000>; + }; + }; + }; + + base-als-rgb { + compatible = "cros-ec,tcs3400-rgb"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3"; + location = "MOTIONSENSE_LOC_CAMERA"; + default-range = <0x10000>; /* scale = 1x, uscale = 0 */ + drv-data = <&tcs_rgb_data>; + }; + }; + + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* list of entries for motion_als_sensors */ + als-sensors = <&als_clear>; + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_imu &int_als_rgb &int_accel>; + /* list of sensors in force mode */ + accel-force-mode-sensors = <&lid_accel &als_clear>; + }; +}; diff --git a/zephyr/projects/rex/power_signals.dts b/zephyr/projects/rex/power_signals.dts new file mode 100644 index 0000000000..860c316795 --- /dev/null +++ b/zephyr/projects/rex/power_signals.dts @@ -0,0 +1,152 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + chosen { + intel-ap-pwrseq,espi = &espi0; + }; + + common-pwrseq { + compatible = "intel,ap-pwrseq"; + + sys-pwrok-delay = <3>; + all-sys-pwrgd-timeout = <20>; + }; + + pwr-en-pp3300-s5 { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PP1800_S5/PP3300_S5 enable output to LS"; + enum-name = "PWR_EN_PP3300_A"; + gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>; + output; + }; + pwr-pg-ec-rsmrst-od { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST power good from regulator"; + enum-name = "PWR_RSMRST"; + gpios = <&gpioe 2 GPIO_ACTIVE_HIGH>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-ec-pch-rsmrst-odl { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "RSMRST output to PCH"; + enum-name = "PWR_EC_PCH_RSMRST"; + gpios = <&gpioa 6 GPIO_ACTIVE_HIGH>; + output; + }; + pwr-pch-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "PCH_PWROK output to PCH"; + enum-name = "PWR_PCH_PWROK"; + gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>; + output; + }; + pwr-ec-pch-sys-pwrok { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_PWROK output to PCH"; + enum-name = "PWR_EC_PCH_SYS_PWROK"; + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; + output; + }; + pwr-sys-rst-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SYS_RESET# output to PCH"; + enum-name = "PWR_SYS_RST"; + gpios = <&gpioc 5 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + output; + }; + pwr-slp-s0-l { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "SLP_S0_L input from PCH"; + enum-name = "PWR_SLP_S0"; + gpios = <&gpiod 5 GPIO_ACTIVE_LOW>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; + pwr-slp-s3-l { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S3_L input from PCH"; + enum-name = "PWR_SLP_S3"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; + vw-invert; +/* + * TODO: Initially, use virtual wire for sleep S3 signal instead of + * of the GPIO signal which also exists. + * compatible = "intel,ap-pwrseq-gpio"; + * gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; + * interrupt-flags = <GPIO_INT_EDGE_BOTH>; + */ + }; + pwr-slp-s4 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S4 virtual wire input from PCH"; + enum-name = "PWR_SLP_S4"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S4"; + vw-invert; + }; + pwr-slp-s5 { + compatible = "intel,ap-pwrseq-vw"; + dbg-label = "SLP_S5 virtual wire input from PCH"; + enum-name = "PWR_SLP_S5"; + virtual-wire = "ESPI_VWIRE_SIGNAL_SLP_S5"; + vw-invert; + }; + pwr-all-sys-pwrgd { + compatible = "intel,ap-pwrseq-gpio"; + dbg-label = "all power good"; + enum-name = "PWR_ALL_SYS_PWRGD"; + gpios = <&gpiof 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; + interrupt-flags = <GPIO_INT_EDGE_BOTH>; + }; +}; + +/* + * Because the power signals directly reference the GPIOs, + * the corresponding named-gpios need to have no-auto-init set. + */ + /* pwr-en-pp3300-s5 */ +&gpio_en_s5_rails { + no-auto-init; +}; + +/* pwr-pg-ec-rsmrst-od */ +&gpio_seq_ec_rsmrst_odl{ + no-auto-init; +}; + +/* pwr-ec-pch-rsmrst-odl */ +&gpio_ec_soc_rsmrst_l{ + no-auto-init; +}; + +/* pwr-pch-pwrok */ +&gpio_soc_pwrok{ + no-auto-init; +}; + +/* pwr-ec-pch-sys-pwrok */ +&gpio_sys_pwrok{ + no-auto-init; +}; + +/* pwr-sys-rst-l */ +&gpio_sys_rst_odl{ + no-auto-init; +}; + +/* pwr-slp-s0-l */ +&gpio_sys_slp_s0ix_3v3_l{ + no-auto-init; +}; + +/* pwr-slp-s3-l */ +&gpio_slp_s3_ls_l{ + no-auto-init; +}; + +/* pwr-all-sys-pwrgd */ +&gpio_seq_ec_all_sys_pg{ + no-auto-init; +}; + diff --git a/zephyr/projects/rex/prj.conf b/zephyr/projects/rex/prj.conf new file mode 100644 index 0000000000..96f407b903 --- /dev/null +++ b/zephyr/projects/rex/prj.conf @@ -0,0 +1,172 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC=y +CONFIG_CROS_EC=y +CONFIG_SHIMMED_TASKS=y +CONFIG_SYSCON=y +# Enable during development +CONFIG_LTO=n +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y + +# Shell Commands +CONFIG_SHELL_HELP=y +CONFIG_SHELL_HISTORY=y +CONFIG_SHELL_TAB=y +CONFIG_SHELL_TAB_AUTOCOMPLETION=y +CONFIG_KERNEL_SHELL=y + +# Logging +CONFIG_LOG=y +CONFIG_LOG_MODE_MINIMAL=y + +# Disable default features we don't want in a minimal example. +CONFIG_PLATFORM_EC_BACKLIGHT_LID=y +CONFIG_PLATFORM_EC_SWITCH=y +CONFIG_PLATFORM_EC_VBOOT_EFS2=n + +# Application processor; communicates with EC via eSPI +CONFIG_AP=y +CONFIG_ESPI=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y +CONFIG_PLATFORM_EC_HOSTCMD=y +# Disabling this until temp sensor support is in +CONFIG_PLATFORM_EC_THROTTLE_AP=n +CONFIG_PLATFORM_EC_PORT80=y + +# Power Sequecing +CONFIG_AP_X86_INTEL_MTL=y +CONFIG_X86_NON_DSX_PWRSEQ_MTL=y +CONFIG_X86_NON_DSX_PWRSEQ_HOST_CMD=y +# TODO (b/240434243): This may be needed, but using eSPI VW for now +CONFIG_PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE=n +CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n + +# Zephyr Inbuilt AP Power Sequencing Config +CONFIG_AP_PWRSEQ=y +CONFIG_X86_NON_DSX_PWRSEQ_CONSOLE=y +CONFIG_AP_PWRSEQ_S0IX=y + +# ADC +CONFIG_ADC=y + +# I2C +CONFIG_I2C=y + +# PWM +CONFIG_PWM=y + +# Fan +CONFIG_TACH_NPCX=y + +# Temperature sensors +CONFIG_SENSOR=y +CONFIG_PLATFORM_EC_TEMP_SENSOR=y +CONFIG_PLATFORM_EC_THERMISTOR=y +CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y + +# CBI EEPROM support +CONFIG_EEPROM=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_SHELL=n +CONFIG_PLATFORM_EC_CBI_EEPROM=y +CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y +CONFIG_PLATFORM_EC_BYPASS_CBI_EEPROM_WP_CHECK=y + +# LED +CONFIG_PLATFORM_EC_LED_DT=y + +# Battery +CONFIG_PLATFORM_EC_BATTERY=y +CONFIG_PLATFORM_EC_BATTERY_SMART=y +CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y +CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y +CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y +CONFIG_PLATFORM_EC_BATTERY_REVIVE_DISCONNECT=y + +# Charger +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT=512 +CONFIG_PLATFORM_EC_CHARGER_ISL9241=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=5 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 +CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=30000 +CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT=15000 + +# USB-A +CONFIG_PLATFORM_EC_USBA=y + +# USBC +CONFIG_PLATFORM_EC_USBC_PPC=y +CONFIG_PLATFORM_EC_USBC_PPC_SYV682X=y +CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y +CONFIG_PLATFORM_EC_USBC_PPC_SYV682X_SMART_DISCHARGE=y + +CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y +CONFIG_PLATFORM_EC_USB_PD_FRS=y +CONFIG_PLATFORM_EC_USB_PD_FRS_PPC=y +CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y +CONFIG_PLATFORM_EC_USB_PD_TRY_SRC=y +CONFIG_PLATFORM_EC_USB_PD_DUAL_ROLE_AUTO_TOGGLE=y +CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB=y +CONFIG_PLATFORM_EC_USBC_VCONN=y +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y +CONFIG_PLATFORM_EC_USB_PID=0x504D + +# IOEX +CONFIG_GPIO_NCT38XX=y + +# BC 1.2 +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y + +#USB Mux +CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y +CONFIG_PLATFORM_EC_USB_MUX_TASK=y + +# External power +CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y + +# Standard shimmed features +CONFIG_PLATFORM_EC_POWER_BUTTON=y +CONFIG_PLATFORM_EC_LID_SWITCH=y + +# Keyboard support +CONFIG_PLATFORM_EC_KEYBOARD=y +CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y +# Column 2 is driven through the GSC, which inverts the signal going through it +CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y + +# MKBP event +CONFIG_PLATFORM_EC_MKBP_EVENT=y +CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y +CONFIG_PLATFORM_EC_MKBP_USE_GPIO_AND_HOST_EVENT=y + +# Sensors console command +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCELS=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y + +# Sensors +CONFIG_SENSOR=y +CONFIG_SENSOR_SHELL=n +CONFIG_PLATFORM_EC_MOTIONSENSE=y +CONFIG_PLATFORM_EC_ACCEL_FIFO=y +CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y +CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y +CONFIG_PLATFORM_EC_TABLET_MODE=y +CONFIG_PLATFORM_EC_TABLET_MODE_SWITCH=y + +# Sensor Drivers +CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO=y +CONFIG_PLATFORM_EC_ACCEL_LIS2DW12=y +CONFIG_PLATFORM_EC_ALS_TCS3400=y diff --git a/zephyr/projects/rex/prj_rex.conf b/zephyr/projects/rex/prj_rex.conf new file mode 100644 index 0000000000..0f204b9669 --- /dev/null +++ b/zephyr/projects/rex/prj_rex.conf @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Rex reference-board-specific Kconfig settings. +CONFIG_BOARD_REX=y + +# Keyboard +CONFIG_CROS_KB_RAW_NPCX=y diff --git a/zephyr/projects/rex/rex.dts b/zephyr/projects/rex/rex.dts new file mode 100644 index 0000000000..259cd6ff4c --- /dev/null +++ b/zephyr/projects/rex/rex.dts @@ -0,0 +1,239 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + + #include <dt-bindings/usb_pd_tcpm.h> + +/ { + aliases { + gpio-wp = &ec_wp_l; + gpio-kbd-kso2 = &gpio_ec_kso_02_inv; + }; + + named-gpios { + compatible = "named-gpios"; + + ec_wp_l: write-protect { + gpios = <&gpioa 0 GPIO_INPUT>; + }; + gpio_ec_entering_rw: ec_entering_rw { + enum-name = "GPIO_ENTERING_RW"; + }; + + ioex_usb_c0_sbu_fault_odl: usb_c0_sbu_fault_odl { + gpios = <&ioex_c0_port1 2 GPIO_INPUT>; + }; + ioex_usb_c0_rt_rst_ls_l: usb_c0_rt_rst_ls_l { + gpios = <&ioex_c0_port0 7 GPIO_OUTPUT>; + }; + + ioex_usb_c0_frs_en: usb_c0_frs_en { + gpios = <&ioex_c0_port0 6 GPIO_OUTPUT_LOW>; + }; + + /* Need to designate 1.8V for I2C buses on the 1800mV rail */ + ec-i2c-sensor-scl { + gpios = <&gpiob 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-c0-rt-scl { + gpios = <&gpiod 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-c0-rt-sda { + gpios = <&gpiod 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + }; + + usba-port-enable-list { + compatible = "cros-ec,usba-port-enable-pins"; + enable-pins = <&gpio_en_pp5000_usba_r>; + }; +}; + +/* host interface */ +&espi0 { + status = "okay"; + pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; + pinctrl-names = "default"; +}; + +/* Power switch logic input pads */ +&psl_in1_gpd2 { + /* LID_OPEN */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in2_gp00 { + /* ACOK_OD */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in4_gp02 { + /* MECH_PWR_BTN_ODL */ + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01 &psl_in4_gp02>; +}; + +/* ADC and GPIO alt-function specifications */ +&adc0 { + pinctrl-0 = <&adc0_chan0_gp45 + &adc0_chan1_gp44 + &adc0_chan8_gpf1 + &adc0_chan7_gpe1>; + pinctrl-names = "default"; +}; + +&i2c0_0 { + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; + pinctrl-names = "default"; +}; + +&i2c1_0 { + label = "I2C_USB_C0_TCPC"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; + pinctrl-names = "default"; + + tcpc_port0: nct38xx@70 { + compatible = "nuvoton,nct38xx"; + gpio-dev = <&nct3807_C0>; + reg = <0x70>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + }; + + nct3807_C0:nct3807_C0@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT3807_C0"; + + ioex_c0_port0:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3807_C0_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + pinmux_mask = <0xf7>; + }; + ioex_c0_port1:gpio@1 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x1>; + label = "NCT3807_C0_GPIO1"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + }; + }; + + nct3808_alert_0 { + compatible = "nuvoton,nct38xx-gpio-alert"; + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; + nct38xx-dev = <&nct3807_C0>; + label = "NCT3807_ALERT_0"; + }; +}; + +&i2c2_0 { + label = "I2C_PPC0"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; + pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + + ppc_port0_syv: ppc_syv@40 { + compatible = "silergy,syv682x"; + status = "okay"; + reg = <0x40>; + frs_en_gpio = <&ioex_usb_c0_frs_en>; + }; +}; + +&i2c3_0 { + label = "I2C_USB_C0_RT"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; + pinctrl-names = "default"; + + usb_c0_hb_retimer: jhl8040r-c0@56 { + compatible = "intel,jhl8040r"; + reg = <0x56>; + ls-en-pin = <&gpio_usb_c0_rt_3p3_sx_en>; + int-pin = <&gpio_usb_c0_rt_int_odl>; + reset-pin = <&ioex_usb_c0_rt_rst_ls_l>; + }; +}; + +&i2c4_1 { + label = "I2_USB_C1_TCPC"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>; + pinctrl-names = "default"; +}; + +&i2c5_0 { + label = "I2C__BATTERY"; + clock-frequency = <I2C_BITRATE_STANDARD>; + + pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>; + pinctrl-names = "default"; +}; + +&i2c6_1 { + label = "I2C_USB_1_MIX"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>; + pinctrl-names = "default"; +}; + +&i2c7_0 { + label = "I2C_CHARGER"; + clock-frequency = <I2C_BITRATE_FAST>; + + pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; + pinctrl-names = "default"; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; + + charger: isl9241@9 { + compatible = "intersil,isl9241"; + status = "okay"; + reg = <0x09>; + }; +}; diff --git a/zephyr/projects/rex/rex0_gpio.csv b/zephyr/projects/rex/rex0_gpio.csv new file mode 100644 index 0000000000..5c20f6fb00 --- /dev/null +++ b/zephyr/projects/rex/rex0_gpio.csv @@ -0,0 +1,122 @@ +Signal Name,Pin Number,Type,Enum +USB_C1_BC12_INT_ODL,G10,INPUT,GPIO_USB_C1_BC12_INT_ODL +ESPI_SOC_CS0_L,L2,OTHER, +ESPI_SOC_RESET_L,K3,OTHER, +ESPI_SOC_CLK,M1,OTHER, +EC_IMU_INT_R_L,M2,INPUT_PU, +ESPI_SOC_IO0,H1,OTHER, +ESPI_SOC_IO1,J1,OTHER, +ESPI_SOC_IO2,K1,OTHER, +ESPI_SOC_IO3,L1,OTHER, +ESPI_SOC_ALERT_L_R,L3,OTHER, +EC_VOLDN_BTN_ODL,E11,INPUT_PU,GPIO_VOLUME_DOWN_L +TABLET_MODE_L,M12,INPUT_PU,GPIO_TABLET_MODE_L +SOCHOT_ODL,G12,INPUT, +EC_VOLUP_BTN_ODL,L10,INPUT_PU,GPIO_VOLUME_UP_L +USB_C0_RT_INT_ODL,G11,INPUT, +EC_WP_L,L12,INPUT, +EC_BATT_PRES_ODL,K12,INPUT,GPIO_BATT_PRES_ODL +CPU_C10_GATE_L,J11,INPUT, +SOC_PWROK,K11,OUTPUT, +EC_SOC_RSMRST_L,F11,OUTPUT, +SYS_PWROK,L11,OUTPUT, +EC_SPARE_GPIO94,M11,OUTPUT, +EC_SPARE_GPIOA2,F12,OUTPUT, +EC_SPARE_GPIOA4,H11,OUTPUT, +EC_ACCEL_INT_R_L,M7,INPUT, +SLP_S3_LS_L,C2,INPUT, +IMVP92_VRRDY_OD,E2,INPUT, +EC_PROCHOT_IN_L,D2,INPUT, +EC_SPARE_GPIO42,D3,OUTPUT, +TEMP_SENSOR_2,E3,ADC,ADC_TEMP_SENSOR_2 +TEMP_SENSOR_1,F2,ADC,ADC_TEMP_SENSOR_1 +TEMP_SENSOR_4,F3,ADC,ADC_TEMP_SENSOR_4 +TEMP_SENSOR_3,G3,ADC,ADC_TEMP_SENSOR_3 +SYS_RST_ODL,H7,INPUT, +EC_SOC_WAKE_R_ODL,H8,OUTPUT_ODL, +EC_PROCHOT_ODL,J2,OUTPUT_ODR, +EC_SOC_INT_ODL,J4,OUTPUT_ODL,GPIO_EC_INT_L +EC_SOC_RTCRST,J5,OUTPUT_ODR, +EC_SOC_PWR_BTN_ODL,H9,OUTPUT_ODL,GPIO_PCH_PWRBTN_L +USB_C0_RT_3P3_SX_EN,D9,OUTPUT_ODR, +KSO_13,D11,OTHER, +KSO_12,C11,OTHER, +KSO_11,B10,OTHER, +KSO_10,B11,OTHER, +KSO_09,C10,OTHER, +KSO_08,C9,OTHER, +KSO_05,C6,OTHER, +KSO_04,C7,OTHER, +KSO_03,B8,OTHER, +EC_KSO_02_INV,B7,OUTPUT_L, +KSO_01,B6,OTHER, +KSO_00,B5,OTHER, +KSI_07,C5,OTHER, +KSI_06,C4,OTHER, +KSI_05,C3,OTHER, +KSI_04,B4,OTHER, +EC_KSI_03,B3,OTHER, +EC_KSI_02,A4,OTHER, +KSI_01,A3,OTHER, +EC_KSI_00,A2,OTHER, +EC_I2C_BAT_SCL,D5,I2C_CLOCK,I2C_PORT_BATTERY +USB_C1_TCPC_INT_ODL,B2,INPUT,GPIO_USB_C1_TCPC_INT_ODL +EC_I2C_BAT_SDA,D4,I2C_DATA, +USB_C1_RST_ODL,C1,OUTPUT_ODL, +EC_FAN_TACH,E5,TACH, +LED_4_L,G6,OUTPUT, +EN_PP5000_FAN,K4,OUTPUT_ODR, +USB_C0_PPC_INT_ODL,H2,INPUT,GPIO_USB_C0_PPC_INT_ODL +UART_GSC_DBG_TX_EC_RX_R,G4,OTHER, +EC_SPARE_GPIO66,G2,OUTPUT, +USB_C0_TCPC_RST_ODL,J3,OUTPUT_ODL, +USB_C1_RT_INT_ODL,M4,INPUT_PU, +EC_CBI_WP,G5,OUTPUT, +USB_C1_RT_RST_R_ODL,H5,OUTPUT_ODL, +EC_GSC_PACKET_MODE,J6,OUTPUT_ODR,GPIO_PACKET_MODE_EN +EC_KB_BL_PWM,K5,PWM,GPIO_EN_KEYBOARD_BACKLIGHT +KSO_14,D6,OTHER, +USB_C1_FRS_EN,D7,OUTPUT_ODR, +EC_I2C_USB_C0_TCPC_SDA,K7,I2C_DATA, +EC_I2C_USB_C0_TCPC_SCL,K8,I2C_CLOCK,I2C_PORT_USB_C0_TCPC +EC_I2C_USB_C0_PPC_BC_SDA,K9,I2C_DATA, +EC_I2C_USB_C0_PPC_BC_SCL,L8,I2C_CLOCK,I2C_PORT_PPC0 +EC_IMVP92_EN_SMB,D8,OUTPUT, +EC_I2C_MISC_SDA,K10,I2C_DATA, +EC_I2C_MISC_SCL,J10,I2C_CLOCK,I2C_PORT_EEPROM +EC_I2C_SENSOR_SDA,B12,I2C_DATA, +EC_I2C_SENSOR_SCL,C12,I2C_CLOCK,I2C_PORT_SENSOR +EN_S5_RAILS,L9,OUTPUT_ODR, +FAN_PWM,J7,PWM, +LED_3_L,H10,OUTPUT, +LED_2_L,G9,OUTPUT, +LED_1_L,G8,OUTPUT, +USB_C0_BC12_INT_ODL,D10,INPUT,GPIO_USB_C0_BC12_INT_ODL +EC_SPARE_GPIOC7,F10,OUTPUT, +EC_I2C_USB_C0_RT_SDA,F9,I2C_DATA, +EC_I2C_USB_C0_RT_SCL,F8,I2C_CLOCK,I2C_PORT_USB_C0_RT +EC_EDP_BL_EN,E10,OUTPUT_ODR,GPIO_ENABLE_BACKLIGHT +EC_ALS_RGB_INT_R_L,A9,INPUT_PU, +SYS_SLP_S0IX_3V3_L,A10,INPUT, +USB_C0_TCPC_INT_ODL,F4,INPUT,GPIO_USB_C0_TCPC_INT_ODL +SEQ_EC_RSMRST_ODL,A11,INPUT, +EC_I2C_USB_C1_MIX_SDA,L7,I2C_DATA, +EC_I2C_USB_C1_MIX_SCL,L6,I2C_CLOCK,I2C_PORT_USB_1_MIX +CCD_MODE_ODL,A12,OUTPUT_ODL,GPIO_CCD_MODE_ODL +EC_I2C_USB_C1_TCPC_SDA,F6,I2C_DATA, +EC_I2C_USB_C1_TCPC_SCL,F5,I2C_CLOCK,I2C_PORT_USB_C1_TCPC +SEQ_EC_ALL_SYS_PG,E9,INPUT, +USB_C1_PPC_INT_ODL,E8,INPUT,GPIO_USB_C1_PPC_INT_ODL +EC_KSO_07_JEN_L,B9,OTHER, +EC_KSO_06_GP_SEL_L,C8,OTHER, +EC_SPARE_GPO32,E4,OUTPUT, +EC_SPARE_GPO35,K2,OUTPUT, +UART_GSC_DBG_RX_EC_TX_R,H4,OTHER, +EC_RST_R_ODL,K6,INPUT, +EC_KB_BL_EN_L,J9,OUTPUT, +ACOK_OD,E7,INPUT,GPIO_AC_PRESENT +GSC_EC_PWR_BTN_ODL,E6,INPUT_PU,GPIO_POWER_BUTTON_L +MECH_PWR_BTN_ODL,F7,INPUT, +LID_OPEN,G7,INPUT_PU,GPIO_LID_OPEN +EN_Z1_RAILS,J8,OUTPUT, +EN_PP5000_USBA_R,H6,OUTPUT, diff --git a/zephyr/projects/rex/src/board_power.c b/zephyr/projects/rex/src/board_power.c new file mode 100644 index 0000000000..c7f12d024e --- /dev/null +++ b/zephyr/projects/rex/src/board_power.c @@ -0,0 +1,61 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> +#include <zephyr/drivers/gpio.h> + +#include <ap_power/ap_power.h> +#include <ap_power/ap_power_events.h> +#include <ap_power/ap_power_interface.h> +#include <ap_power_override_functions.h> +#include <power_signals.h> +#include <x86_power_signals.h> + +#include "gpio_signal.h" +#include "gpio/gpio.h" + +LOG_MODULE_DECLARE(ap_pwrseq, LOG_LEVEL_INF); + +#if CONFIG_X86_NON_DSX_PWRSEQ_MTL +#define X86_NON_DSX_MTL_FORCE_SHUTDOWN_TO_MS 50 + +void board_ap_power_force_shutdown(void) +{ + int timeout_ms = X86_NON_DSX_MTL_FORCE_SHUTDOWN_TO_MS; + + /* Turn off PCH_RMSRST to meet tPCH12 */ + power_signal_set(PWR_EC_PCH_RSMRST, 0); + + /* Turn off PRIM load switch. */ + power_signal_set(PWR_EN_PP3300_A, 0); + + /* Wait RSMRST to be off. */ + while (power_signal_get(PWR_RSMRST) && (timeout_ms > 0)) { + k_msleep(1); + timeout_ms--; + }; + + if (power_signal_get(PWR_RSMRST)) { + LOG_WRN("RSMRST_ODL didn't go low! Assuming G3."); + } +} + +void board_ap_power_action_g3_s5(void) +{ + /* Turn on the PP3300_PRIM rail. */ + power_signal_set(PWR_EN_PP3300_A, 1); + + if (!power_wait_signals_timeout( + IN_PGOOD_ALL_CORE, + AP_PWRSEQ_DT_VALUE(wait_signal_timeout))) { + ap_power_ev_send_callbacks(AP_POWER_PRE_INIT); + } +} + +bool board_ap_power_check_power_rails_enabled(void) +{ + return power_signal_get(PWR_EN_PP3300_A); +} +#endif /* CONFIG_X86_NON_DSX_PWRSEQ_MTL */ diff --git a/zephyr/projects/rex/src/usb_pd_policy.c b/zephyr/projects/rex/src/usb_pd_policy.c new file mode 100644 index 0000000000..7e9876f9c1 --- /dev/null +++ b/zephyr/projects/rex/src/usb_pd_policy.c @@ -0,0 +1,77 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Shared USB-C policy for Rex boards */ + +#include <zephyr/drivers/gpio.h> + +#include "charge_manager.h" +#include "chipset.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "ec_commands.h" +#include "ioexpander.h" +#include "system.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usbc_ppc.h" +#include "util.h" + +int pd_check_vconn_swap(int port) +{ + /* Allow VCONN swaps if the AP is on. */ + return chipset_in_state(CHIPSET_STATE_ANY_SUSPEND | CHIPSET_STATE_ON); +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS. */ + ppc_vbus_source_enable(port, 0); + + /* Enable discharge if we were previously sourcing 5V */ + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + /* Disable charging. */ + rv = ppc_vbus_sink_enable(port, 0); + if (rv) + return rv; + + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) { + pd_set_vbus_discharge(port, 0); + } + + /* Provide Vbus. */ + rv = ppc_vbus_source_enable(port, 1); + if (rv) { + return rv; + } + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +/* Used by Vbus discharge common code with CONFIG_USB_PD_DISCHARGE */ +int board_vbus_source_enabled(int port) +{ + return tcpm_get_src_ctrl(port); +} + +/* Used by USB charger task with CONFIG_USB_PD_5V_EN_CUSTOM */ +int board_is_sourcing_vbus(int port) +{ + return board_vbus_source_enabled(port); +} diff --git a/zephyr/projects/rex/src/usbc_config.c b/zephyr/projects/rex/src/usbc_config.c new file mode 100644 index 0000000000..3aeaac8977 --- /dev/null +++ b/zephyr/projects/rex/src/usbc_config.c @@ -0,0 +1,288 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/gpio.h> + +#include "battery_fuel_gauge.h" +#include "charger.h" +#include "charge_manager.h" +#include "charge_ramp.h" +#include "charge_state_v2.h" +#include "charge_state.h" +#include "charger.h" +#include "driver/charger/isl9241.h" +#include "driver/retimer/bb_retimer_public.h" +#include "driver/tcpm/nct38xx.h" +#include "driver/tcpm/tcpci.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "i2c.h" +#include "ioexpander.h" +#include "ppc/syv682x_public.h" +#include "system.h" +#include "task.h" +#include "usb_mux.h" +#include "usbc_ppc.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/*******************************************************************/ +/* USB-C Configuration Start */ + +/* USB-C ports */ +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_COUNT }; +BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); + +static void usbc_interrupt_init(void) +{ + /* Enable PPC interrupts. */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); + + /* Enable TCPC interrupts. */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_tcpc)); + + /* Enable BC 1.2 interrupts */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_bc12)); + + /* Enable SBU fault interrupts */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_sbu_fault)); +} +DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_POST_I2C); + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* + * TODO: Meteorlake PCH does not use Physical GPIO for over current + * error, hence Send 'Over Current Virtual Wire' eSPI signal. + */ +} + +void sbu_fault_interrupt(enum gpio_signal signal) +{ + int port = USBC_PORT_C0; + + CPRINTSUSB("C%d: SBU fault", port); + pd_handle_overcurrent(port); +} + +void tcpc_alert_event(enum gpio_signal signal) +{ + int port; + + switch (signal) { + case GPIO_USB_C0_TCPC_INT_ODL: + port = 0; + break; + default: + return; + } + + schedule_deferred_pd_interrupt(port); +} + +static void reset_nct38xx_port(int port) +{ + const struct gpio_dt_spec *reset_gpio_l; + const struct device *ioex_port0, *ioex_port1; + + /* TODO(b/225189538): Save and restore ioex signals */ + if (port == USBC_PORT_C0) { + reset_gpio_l = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst_odl); + ioex_port0 = DEVICE_DT_GET(DT_NODELABEL(ioex_c0_port0)); + ioex_port1 = DEVICE_DT_GET(DT_NODELABEL(ioex_c0_port1)); + } else { + /* Invalid port: do nothing */ + return; + } + + gpio_pin_set_dt(reset_gpio_l, 0); + msleep(NCT38XX_RESET_HOLD_DELAY_MS); + gpio_pin_set_dt(reset_gpio_l, 1); + nct38xx_reset_notify(port); + if (NCT3807_RESET_POST_DELAY_MS != 0) { + msleep(NCT3807_RESET_POST_DELAY_MS); + } + + /* Re-enable the IO expander pins */ + gpio_reset_port(ioex_port0); + gpio_reset_port(ioex_port1); +} + +void board_reset_pd_mcu(void) +{ + /* Reset TCPC0 */ + reset_nct38xx_port(USBC_PORT_C0); +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + const struct gpio_dt_spec *tcpc_c0_rst_l; + const struct gpio_dt_spec *tcpc_c0_int_l; + + tcpc_c0_rst_l = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst_odl); + tcpc_c0_int_l = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_int_odl); + + /* + * Check which port has the ALERT line set and ignore if that TCPC has + * its reset line active. + */ + if (!gpio_pin_get_dt(tcpc_c0_int_l) && gpio_pin_get_dt(tcpc_c0_rst_l)) { + status |= PD_STATUS_TCPC_ALERT_0; + } + + return status; +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C0); + break; + + default: + break; + } +} + +void bc12_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_BC12_INT_ODL: + usb_charger_task_set_event(0, USB_CHG_EVENT_BC12); + break; + + default: + break; + } +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) +{ + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +static void board_disable_charger_ports(void) +{ + int i; + + CPRINTSUSB("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * If this port had booted in dead battery mode, go + * ahead and reset it so EN_SNK responds properly. + */ + if (nct38xx_get_boot_type(i) == NCT38XX_BOOT_DEAD_BATTERY) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + } + + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) { + CPRINTSUSB("Disabling C%d as sink failed.", i); + } + } +} + +int board_set_active_charge_port(int port) +{ + int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + int rv; + + if (port == CHARGE_PORT_NONE) { + board_disable_charger_ports(); + return EC_SUCCESS; + } else if (!is_valid_port) { + return EC_ERROR_INVAL; + } + + /* + * Check if we can reset any ports in dead battery mode + * + * The NCT3807 may continue to keep EN_SNK low on the dead battery port + * and allow a dangerous level of voltage to pass through to the initial + * charge port (see b/183660105). We must reset the ports if we have + * sufficient battery to do so, which will bring EN_SNK back under + * normal control. + */ + rv = EC_SUCCESS; + for (i = 0; i < board_get_usb_pd_port_count(); i++) { + if (nct38xx_get_boot_type(i) != NCT38XX_BOOT_DEAD_BATTERY) { + continue; + } + + /* Handle dead battery boot case */ + CPRINTSUSB("Found dead battery on %d", i); + /* + * If we have battery, get this port reset ASAP. + * This means temporarily rejecting charge manager + * sets to it. + */ + if (pd_is_battery_capable()) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + + if (port == i) { + rv = EC_ERROR_INVAL; + } + } else if (port != i) { + /* + * If other port is selected and in dead battery + * mode, reset this port. Otherwise, reject + * change because we'll brown out. + */ + if (nct38xx_get_boot_type(port) == + NCT38XX_BOOT_DEAD_BATTERY) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + } else { + rv = EC_ERROR_INVAL; + } + } + } + + if (rv != EC_SUCCESS) { + return rv; + } + + /* Check if the port is sourcing VBUS. */ + if (tcpm_get_src_ctrl(port)) { + CPRINTSUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTSUSB("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) { + continue; + } + if (ppc_vbus_sink_enable(i, 0)) { + CPRINTSUSB("C%d: sink path disable failed.", i); + } + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTSUSB("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} diff --git a/zephyr/projects/rex/temp_sensors.dts b/zephyr/projects/rex/temp_sensors.dts new file mode 100644 index 0000000000..680ebc8954 --- /dev/null +++ b/zephyr/projects/rex/temp_sensors.dts @@ -0,0 +1,69 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <cros/thermistor/thermistor.dtsi> + +/ { + temp_ddr_soc: ddr_soc { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_ddr_soc>; + }; + temp_ambient: ambient { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_ambient>; + }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_charger>; + }; + temp_wwan: wwan { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_wwan>; + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + ddr_soc { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + sensor = <&temp_ddr_soc>; + }; + ambient { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + sensor = <&temp_ambient>; + }; + charger { + temp_fan_off = <35>; + temp_fan_max = <65>; + temp_host_high = <105>; + temp_host_halt = <120>; + temp_host_release_high = <90>; + sensor = <&temp_charger>; + }; + wwan { + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <130>; + temp_host_halt = <130>; + temp_host_release_high = <100>; + sensor = <&temp_wwan>; + }; + }; +}; + +&thermistor_3V3_30K9_47K_4050B { + status = "okay"; +}; diff --git a/zephyr/projects/rex/usbc.dts b/zephyr/projects/rex/usbc.dts new file mode 100644 index 0000000000..8b3d0aa316 --- /dev/null +++ b/zephyr/projects/rex/usbc.dts @@ -0,0 +1,30 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + #address-cells = <1>; + #size-cells = <0>; + + usbc_port0: port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + bc12 = <&i2c_ec_i2c_usb_c0_ppc_b>; + ppc = <&ppc_port0_syv>; + tcpc = <&tcpc_port0>; + chg = <&charger>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&usb_c0_hb_retimer + &virtual_mux_c0>; + }; + }; + port0-muxes { + virtual_mux_c0: virtual-mux-c0 { + compatible = "cros-ec,usbc-mux-virtual"; + }; + }; + }; +}; diff --git a/zephyr/projects/skyrim/BUILD.py b/zephyr/projects/skyrim/BUILD.py index 3d43b3676b..ff53aeefda 100644 --- a/zephyr/projects/skyrim/BUILD.py +++ b/zephyr/projects/skyrim/BUILD.py @@ -1,11 +1,15 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Define zmake projects for skyrim.""" -def register_variant(project_name): +def register_skyrim_project( + project_name, + extra_dts_overlays=(), + extra_kconfig_files=(), +): """Register a variant of skyrim.""" register_npcx_project( project_name=project_name, @@ -13,26 +17,56 @@ def register_variant(project_name): dts_overlays=[ # Common to all projects. here / "adc.dts", - here / "battery.dts", here / "fan.dts", here / "gpio.dts", - here / "i2c.dts", here / "interrupts.dts", here / "keyboard.dts", - here / "led_pins_skyrim.dts", - here / "led_policy_skyrim.dts", here / "motionsense.dts", here / "usbc.dts", # Project-specific DTS customizations. - here / f"{project_name}.dts", - ], - kconfig_files=[ - here / f"prj_{project_name}.conf", + *extra_dts_overlays, ], + kconfig_files=[here / "prj.conf", *extra_kconfig_files], ) -register_variant(project_name="skyrim") +register_skyrim_project( + project_name="morthal", + extra_dts_overlays=[ + here / "morthal.dts", + here / "battery_morthal.dts", + here / "led_pins_morthal.dts", + here / "led_policy_morthal.dts", + ], + extra_kconfig_files=[ + here / "prj_morthal.conf", + ], +) + + +register_skyrim_project( + project_name="skyrim", + extra_dts_overlays=[ + here / "skyrim.dts", + here / "battery_skyrim.dts", + here / "led_pins_skyrim.dts", + here / "led_policy_skyrim.dts", + ], + extra_kconfig_files=[ + here / "prj_skyrim.conf", + ], +) + -# TODO: Deprecate guybrush build after skyrim hardware is readily available. -# register_variant(project_name="guybrush") +register_skyrim_project( + project_name="winterhold", + extra_dts_overlays=[ + here / "winterhold.dts", + here / "battery_winterhold.dts", + here / "led_pins_winterhold.dts", + here / "led_policy_winterhold.dts", + ], + extra_kconfig_files=[ + here / "prj_winterhold.conf", + ], +) diff --git a/zephyr/projects/skyrim/CMakeLists.txt b/zephyr/projects/skyrim/CMakeLists.txt index b364421eb4..5c466e87e8 100644 --- a/zephyr/projects/skyrim/CMakeLists.txt +++ b/zephyr/projects/skyrim/CMakeLists.txt @@ -1,23 +1,46 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(guybrush) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") -cros_ec_library_include_directories_ifdef(CONFIG_BOARD_SKYRIM include) -cros_ec_library_include_directories_ifdef(CONFIG_BOARD_GUYBRUSH include_guybrush) +zephyr_library_sources("src/common.c") +zephyr_library_sources("src/power_signals.c") -zephyr_library_sources_ifdef(CONFIG_BOARD_SKYRIM "power_signals.c") -zephyr_library_sources_ifdef(CONFIG_BOARD_GUYBRUSH "power_signals_guybrush.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "src/usb_pd_policy.c" + "src/usbc_config.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON + "src/led.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_AMD_STT + "src/stt.c") -zephyr_library_sources_ifdef(CONFIG_BOARD_SKYRIM "usbc_config.c") -zephyr_library_sources_ifdef(CONFIG_BOARD_GUYBRUSH "usbc_config_guybrush.c") +if(DEFINED CONFIG_BOARD_MORTHAL) + project(morthal) + zephyr_library_sources( + "src/morthal/ppc_config.c" + "src/morthal/usb_mux_config.c" +) +endif() -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC - "usb_pd_policy.c") +if(DEFINED CONFIG_BOARD_SKYRIM) + project(skyrim) + cros_ec_library_include_directories_ifdef(CONFIG_BOARD_SKYRIM include) + zephyr_library_sources( + "src/skyrim/usb_mux_config.c" + "src/skyrim/ppc_config.c" + "src/skyrim/form_factor.c" + "src/skyrim/alt_charger.c" + ) + zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_FAN "src/skyrim/fan.c") +endif() -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON - "led.c") +if(DEFINED CONFIG_BOARD_WINTERHOLD) + project(winterhold) + zephyr_library_sources( + "src/winterhold/usb_mux_config.c" + "src/winterhold/ppc_config.c" + ) +endif() diff --git a/zephyr/projects/skyrim/Kconfig b/zephyr/projects/skyrim/Kconfig index ea68baf71b..d2ef60fa52 100644 --- a/zephyr/projects/skyrim/Kconfig +++ b/zephyr/projects/skyrim/Kconfig @@ -1,12 +1,12 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -config BOARD_GUYBRUSH - bool "Google Guybrush Board" +config BOARD_MORTHAL + bool "Google Morthal Board" help - Build Google Guybrush reference board. This board build is a - prototype rather than a releasing product. + Build Google Morthal reference board. This board uses an AMD SoC + and NPCX9 EC config BOARD_SKYRIM bool "Google Skyrim Board" @@ -14,4 +14,14 @@ config BOARD_SKYRIM Build Google Skyrim reference board. This board uses an AMD SoC and NPCX9 EC +config BOARD_WINTERHOLD + bool "Google Winterhold Board" + help + Build Google Winterhold reference board. This board uses an AMD SoC + and NPCX9 EC + +module = SKYRIM +module-str = Skyrim board-specific code +source "subsys/logging/Kconfig.template.log_config" + source "Kconfig.zephyr" diff --git a/zephyr/projects/skyrim/adc.dts b/zephyr/projects/skyrim/adc.dts index 40fe146a06..0f2ffd6436 100644 --- a/zephyr/projects/skyrim/adc.dts +++ b/zephyr/projects/skyrim/adc.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,63 +10,60 @@ compatible = "named-adc-channels"; adc_temp_charger: temp-charger { - label = "CHARGER"; enum-name = "ADC_TEMP_SENSOR_CHARGER"; io-channels = <&adc0 1>; }; adc_temp_memory: temp-memory { - label = "MEMORY"; enum-name = "ADC_TEMP_SENSOR_MEMORY"; io-channels = <&adc0 2>; }; adc_core_imon1: core-imon1 { - label = "CORE_I"; enum-name = "ADC_CORE_IMON1"; io-channels = <&adc0 3>; }; adc_core_imon2: core-imon2 { - label = "SOC_I"; enum-name = "ADC_SOC_IMON2"; io-channels = <&adc0 4>; }; }; + temp_charger_thermistor: charger-thermistor { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_temp_charger>; + }; + + temp_memory_thermistor: memory-thermistor { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_temp_memory>; + }; + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; charger-thermistor { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_30K9_47K_4050B>; - label = "Charger"; - enum-name = "TEMP_SENSOR_CHARGER"; temp_host_high = <100>; temp_host_halt = <105>; temp_host_release_high = <80>; - adc = <&adc_temp_charger>; + sensor = <&temp_charger_thermistor>; }; + memory-thermistor { - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - thermistor = <&thermistor_3V3_30K9_47K_4050B>; - label = "Memory"; - enum-name = "TEMP_SENSOR_MEMORY"; temp_host_high = <100>; temp_host_halt = <105>; temp_host_release_high = <80>; - adc = <&adc_temp_memory>; power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&temp_memory_thermistor>; }; - sb-tsi-sensor { - compatible = "cros-ec,temp-sensor-sb-tsi", - "cros-ec,temp-sensor"; - label = "CPU"; - enum-name = "TEMP_SENSOR_CPU"; - port = <&i2c_soc_thermal>; + + cpu { temp_host_high = <100>; temp_host_halt = <105>; temp_host_release_high = <80>; temp_fan_off = <60>; temp_fan_max = <90>; power-good-pin = <&gpio_s0_pgood>; + sensor = <&temp_cpu>; }; }; }; diff --git a/zephyr/projects/skyrim/battery.dts b/zephyr/projects/skyrim/battery_morthal.dts index b9fc0d1090..8c87cef7f9 100644 --- a/zephyr/projects/skyrim/battery.dts +++ b/zephyr/projects/skyrim/battery_morthal.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/skyrim/battery_skyrim.dts b/zephyr/projects/skyrim/battery_skyrim.dts new file mode 100644 index 0000000000..8c87cef7f9 --- /dev/null +++ b/zephyr/projects/skyrim/battery_skyrim.dts @@ -0,0 +1,15 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: aec_5477109 { + compatible = "aec,5477109", "battery-smart"; + }; + smp_l20m3pg1 { + compatible = "smp,l20m3pg1", "battery-smart"; + }; + }; +}; diff --git a/zephyr/projects/skyrim/battery_winterhold.dts b/zephyr/projects/skyrim/battery_winterhold.dts new file mode 100644 index 0000000000..776d74cdff --- /dev/null +++ b/zephyr/projects/skyrim/battery_winterhold.dts @@ -0,0 +1,33 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: lgc_xphx8 { + compatible = "lgc,xphx8", "battery-smart"; + }; + smp_atlxdy9k { + compatible = "smp,atlxdy9k", "battery-smart"; + }; + smp_cosxdy9k{ + compatible = "smp,cosxdy9k", "battery-smart"; + }; + byd_wv3k8{ + compatible = "byd,wv3k8", "battery-smart"; + }; + cosmx_mvk11{ + compatible = "cosmx,mvk11", "battery-smart"; + }; + sunwoda_atl3rr09{ + compatible = "sunwoda,atl3rr09", "battery-smart"; + }; + sunwoda_cos3rr09{ + compatible = "sunwoda,cos3rr09", "battery-smart"; + }; + atl_cfd72{ + compatible = "atl,cfd72", "battery-smart"; + }; + }; +}; diff --git a/zephyr/projects/skyrim/fan.dts b/zephyr/projects/skyrim/fan.dts index 042b9399dc..f0bc28cb7e 100644 --- a/zephyr/projects/skyrim/fan.dts +++ b/zephyr/projects/skyrim/fan.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,6 @@ fan_0 { pwms = <&pwm0 0 PWM_KHZ(25) PWM_POLARITY_NORMAL>; - pwm-frequency = <25000>; rpm_min = <3100>; rpm_start = <3100>; rpm_max = <8000>; diff --git a/zephyr/projects/skyrim/gpio.dts b/zephyr/projects/skyrim/gpio.dts index a06bb070ab..4c935320b2 100644 --- a/zephyr/projects/skyrim/gpio.dts +++ b/zephyr/projects/skyrim/gpio.dts @@ -1,9 +1,15 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { + aliases { + gpio-wp = &gpio_wp; + gpio-cbi-wp = &gpio_cbi_wp; + gpio-kbd-kso2 = &gpio_ec_kso_02_inv; + }; + /* GPIOs shared by all boards */ named-gpios { compatible = "named-gpios"; @@ -22,6 +28,7 @@ gpio_slp_s3_l: slp_s3_l { gpios = <&gpio6 1 GPIO_INPUT>; enum-name = "GPIO_PCH_SLP_S3_L"; + alias = "GPIO_PCH_SLP_S0_L"; }; gpio_slp_s5_l: slp_s5_l { gpios = <&gpio7 2 GPIO_INPUT>; @@ -119,6 +126,81 @@ gpios = <&gpioa 6 GPIO_OUTPUT_HIGH>; enum-name = "GPIO_ENABLE_BACKLIGHT_L"; }; + gpio_usb_fault_odl: usb_fault_odl { + gpios = <&gpio5 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + }; + gpio_en_pwr_s3: en_pwr_s3 { + gpios = <&gpio7 4 GPIO_OUTPUT_LOW>; + }; + gpio_pg_groupc_s0_od: pg_groupc_s0_od { + gpios = <&gpiof 0 GPIO_INPUT>; + }; + gpio_ec_i2c_usbc_pd_int: ec_i2c_usbc_pd_int { + gpios = <&gpioa 3 GPIO_INPUT>; + }; + gpio_soc_thermtrip_odl: soc_thermtrip_odl { + gpios = <&gpio9 5 GPIO_INPUT>; + }; + gpio_hub_rst: hub_rst { + gpios = <&gpio6 6 GPIO_OUTPUT_HIGH>; + }; + ec_soc_int_l { + gpios = <&gpioa 1 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_soc_pwr_good: ec_soc_pwr_good { + gpios = <&gpiod 3 GPIO_OUTPUT_LOW>; + }; + /* TODO: Add interrupt handler to shut down */ + pcore_ocp_r_l { + gpios = <&gpioa 5 GPIO_INPUT>; + }; + gpio_usb_hub_fault_q_odl: usb_hub_fault_q_odl { + gpios = <&gpioe 5 GPIO_INPUT_PULL_UP>; + }; + gpio_pg_lpddr5_s3_od: pg_lpddr5_s3_od { + gpios = <&gpio7 3 GPIO_INPUT>; + }; + 3axis_int_l { + gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; + }; + gpio_ec_soc_pwr_btn_l: ec_soc_pwr_btn_l { + gpios = <&gpioa 7 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + gpio_volup_btn_odl: volup_btn_odl { + gpios = <&gpio6 7 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + gpio_voldn_btn_odl: voldn_btn_odl { + gpios = <&gpio7 0 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + ec_sc_rst { + gpios = <&gpiob 0 GPIO_OUTPUT_LOW>; + }; + gpio_cbi_wp: ec_cbi_wp { + gpios = <&gpio8 1 GPIO_OUTPUT_LOW>; + }; + gpio_wp: ec_wp_l { + gpios = <&gpiod 7 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_pg_lpddr5_s0_od: pg_lpddr5_s0_od { + gpios = <&gpio6 0 GPIO_INPUT>; + }; + ec_espi_rst_l { + gpios = <&gpio5 4 GPIO_PULL_DOWN>; + }; + gpio_accel_gyro_int_l: accel_gyro_int_l { + gpios = <&gpioa 0 GPIO_INPUT>; + }; + /* unimplemented GPIOs */ + entering-rw { + enum-name = "GPIO_ENTERING_RW"; + }; + pch-sys-prwok { + enum-name = "GPIO_PCH_SYS_PWROK"; + }; ec_i2c_usb_a0_c0_scl { gpios = <&gpiob 5 GPIO_INPUT>; }; @@ -132,10 +214,10 @@ gpios = <&gpio8 7 GPIO_INPUT>; }; ec_i2c_batt_scl { - gpios = <&gpio9 2 GPIO_INPUT>; + gpios = <&gpio9 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; ec_i2c_batt_sda { - gpios = <&gpio9 1 GPIO_INPUT>; + gpios = <&gpio9 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; ec_i2c_usbc_mux_scl { gpios = <&gpiod 1 GPIO_INPUT>; @@ -156,16 +238,16 @@ gpios = <&gpio3 6 GPIO_INPUT>; }; ec_i2c_sensor_scl { - gpios = <&gpioe 4 GPIO_INPUT>; + gpios = <&gpioe 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; ec_i2c_sensor_sda { - gpios = <&gpioe 3 GPIO_INPUT>; + gpios = <&gpioe 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; ec_i2c_soc_sic { - gpios = <&gpiob 3 GPIO_INPUT>; + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; ec_i2c_soc_sid { - gpios = <&gpiob 2 GPIO_INPUT>; + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; }; en_kb_bl { gpios = <&gpio9 7 GPIO_OUTPUT_HIGH>; @@ -191,27 +273,21 @@ }; usb_c0_ppc_en_l { gpios = <&ioex_c0_port1 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C0_PPC_EN_L"; }; - usb_c0_ppc_ilim_3a_en { + ioex_usb_c0_ilim_3a_en: usb_c0_ppc_ilim_3a_en { gpios = <&ioex_c0_port1 1 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C0_PPC_ILIM_3A_EN"; }; - /* TODO: figure out interrupts */ - usb_c0_sbu_fault_odl { + ioex_usb_c0_sbu_fault_odl: usb_c0_sbu_fault_odl { gpios = <&ioex_c0_port1 2 GPIO_INPUT>; - enum-name = "IOEX_USB_C0_FAULT_ODL"; }; ioex_en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { gpios = <&ioex_c0_port1 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_EN_PP5000_USB_A0_VBUS"; }; - /* TODO: figure out interrupts */ - usb_a0_fault_odl { + ioex_usb_a0_fault_odl: usb_a0_fault_odl { gpios = <&ioex_c0_port1 6 GPIO_INPUT>; - enum-name = "IOEX_USB3_A0_FAULT_L"; }; - usb_c0_sbu_flip { + ioex_usb_c0_sbu_flip: usb_c0_sbu_flip { gpios = <&ioex_c0_port1 7 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C0_SBU_FLIP"; }; @@ -222,7 +298,6 @@ }; usb_a1_retimer_rst { gpios = <&ioex_c1_port0 1 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_A1_RETIMER_RST"; }; usb_c1_in_hpd { gpios = <&ioex_c1_port0 3 GPIO_OUTPUT_LOW>; @@ -234,27 +309,22 @@ }; usb_c1_ppc_en_l { gpios = <&ioex_c1_port1 0 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_USB_C1_PPC_EN_L"; }; usb_c1_ppc_ilim_3a_en { gpios = <&ioex_c1_port1 1 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C1_PPC_ILIM_3A_EN"; }; - /* TODO: figure out interrupts */ - usb_c1_sbu_fault_odl { + ioex_usb_c1_sbu_fault_odl: usb_c1_sbu_fault_odl { gpios = <&ioex_c1_port1 2 GPIO_INPUT>; enum-name = "IOEX_USB_C1_FAULT_ODL"; }; ioex_en_pp5000_usb_a1_vbus: en_pp5000_usb_a1_vbus { gpios = <&ioex_c1_port1 5 GPIO_OUTPUT_LOW>; - enum-name = "IOEX_EN_PP5000_USB_A1_VBUS_DB"; }; - /* TODO: figure out interrupts */ - usb_a1_fault_db_odl { + ioex_usb_a1_fault_db_odl: usb_a1_fault_db_odl { gpios = <&ioex_c1_port1 6 GPIO_INPUT>; - enum-name = "IOEX_USB_A1_FAULT_DB_ODL"; }; - usb_c1_sbu_flip { + ioex_usb_c1_sbu_flip: usb_c1_sbu_flip { gpios = <&ioex_c1_port1 7 GPIO_OUTPUT_LOW>; enum-name = "IOEX_USB_C1_SBU_FLIP"; }; @@ -265,100 +335,37 @@ enable-pins = <&ioex_en_pp5000_usb_a0_vbus &ioex_en_pp5000_usb_a1_vbus>; }; - - vsby-psl-in-list { - /* PSL_IN1/2/4 are used to wake */ - psl-in-pads = <&psl_in1 &psl_in2 &psl_in4>; - status = "okay"; - }; }; /* PSL input pads*/ -&psl_in1 { +&psl_in1_gpd2 { /* MECH_PWR_BTN_ODL */ - flag = <NPCX_PSL_FALLING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; }; -&psl_in2 { +&psl_in2_gp00 { /* ACOK_OD */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&psl_in4 { +&psl_in4_gp02 { /* LID_OPEN */ - flag = <NPCX_PSL_RISING_EDGE>; + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; }; -&i2c0_0 { - nct3807_C0:nct3807_C0@70 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x70>; - label = "NCT3807_C0"; - - ioex_c0_port0:gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT3807_C0_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xff>; - pinmux_mask = <0xf7>; - }; - ioex_c0_port1:gpio@1 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x1>; - label = "NCT3807_C0_GPIO1"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xff>; - }; - }; - - nct3808_alert_0 { - compatible = "nuvoton,nct38xx-gpio-alert"; - irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; - nct38xx-dev = <&nct3807_C0>; - label = "NCT3807_ALERT_0"; - }; +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in4_gp02>; }; -&i2c1_0 { - nct3807_C1:nct3807_C1@70 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nuvoton,nct38xx-gpio"; - reg = <0x70>; - label = "NCT3807_C1"; - - ioex_c1_port0:gpio@0 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x0>; - label = "NCT3807_C1_GPIO0"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xff>; - pinmux_mask = <0xf7>; - }; - ioex_c1_port1:gpio@1 { - compatible = "nuvoton,nct38xx-gpio-port"; - reg = <0x1>; - label = "NCT3807_C1_GPIO1"; - gpio-controller; - #gpio-cells = <2>; - ngpios = <8>; - pin_mask = <0xff>; - }; - }; - - nct3808_alert_1 { - compatible = "nuvoton,nct38xx-gpio-alert"; - irq-gpios = <&gpioc 7 GPIO_ACTIVE_LOW>; - nct38xx-dev = <&nct3807_C1>; - label = "NCT3807_ALERT_1"; - }; +/* host interface */ +&espi0 { + status = "okay"; + pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; + pinctrl-names = "default"; }; diff --git a/zephyr/projects/skyrim/guybrush.dts b/zephyr/projects/skyrim/guybrush.dts deleted file mode 100644 index 6c5c72d061..0000000000 --- a/zephyr/projects/skyrim/guybrush.dts +++ /dev/null @@ -1,198 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - gpio-wp = &gpio_wp; - gpio-kbd-kso2 = &gpio_ec_kso_02_inv; - }; - - named-gpios { - /* Guybrush-specific GPIO customizations */ - gpio_wp: ec_wp_l { - gpios = <&gpio5 0 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; - }; - gpio_ec_pwr_btn_odl: ec_pwr_btn_odl { - gpios = <&gpio0 1 GPIO_INPUT>; - }; - gpio_slp_s3_s0i3_l: slp_s3_s0i3_l { - gpios = <&gpio7 4 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; - gpio_ec_pcore_int_odl: ec_pcore_int_odl { - gpios = <&gpiof 0 GPIO_INPUT_PULL_UP>; - }; - gpio_pg_groupc_s0_od: pg_groupc_s0_od { - gpios = <&gpioa 3 GPIO_INPUT>; - }; - gpio_pg_lpddr4x_s3_od: pg_lpddr4x_s3_od { - gpios = <&gpio9 5 GPIO_INPUT>; - }; - ec_soc_pwr_good { - gpios = <&gpiod 3 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; - ec_entering_rw { - gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - }; - ec_clr_cmos { - gpios = <&gpioa 1 GPIO_OUTPUT_LOW>; - }; - ec_mem_event { - gpios = <&gpioa 5 GPIO_OUTPUT_LOW>; - }; - gpio_ec_soc_pwr_btn_l: ec_soc_pwr_btn_l { - gpios = <&gpio6 3 GPIO_OUTPUT_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - ec_soc_int_l { - gpios = <&gpio8 3 GPIO_OUTPUT_HIGH>; - enum-name = "GPIO_EC_INT_L"; - }; - soc_thermtrip_odl { - gpios = <&gpioe 5 GPIO_INPUT>; - }; - gpio_usb_c0_c1_fault_odl: usb_c0_c1_fault_odl { - gpios = <&gpio7 3 GPIO_ODR_HIGH>; - }; - 3axis_int_l { - gpios = <&gpioa 2 GPIO_INPUT_PULL_DOWN>; - }; - gpio_voldn_btn_odl: voldn_btn_odl { - gpios = <&gpioa 7 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - gpio_volup_btn_odl: volup_btn_odl { - gpios = <&gpio9 3 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_UP_L"; - }; - ec_ps2_clk { - gpios = <&gpio6 7 GPIO_INPUT_PULL_UP>; - }; - ec_ps2_dat { - gpios = <&gpio7 0 GPIO_INPUT_PULL_UP>; - }; - ec_ps2_rst { - gpios = <&gpio6 2 GPIO_INPUT_PULL_UP>; - }; - ec_gpiob0 { - gpios = <&gpiob 0 GPIO_INPUT_PULL_UP>; - }; - ec_gpio81 { - gpios = <&gpio8 1 GPIO_INPUT_PULL_UP>; - }; - ec_psl_gpo { - gpios = <&gpiod 7 GPIO_INPUT_PULL_UP>; - }; - ec_pwm7 { - gpios = <&gpio6 0 GPIO_INPUT_PULL_UP>; - }; - gpio_accel_gyro_int_l: accel_gyro_int_l { - gpios = <&gpioa 0 GPIO_INPUT_PULL_UP>; - }; - }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - - /* Low voltage on I2C6_1 */ - lvol-io-pads = <&lvol_ioe4 &lvol_ioe3>; - }; - - named-adc-channels { - compatible = "named-adc-channels"; - - adc_temp_soc: temp-soc { - label = "SOC"; - enum-name = "ADC_TEMP_SENSOR_SOC"; - io-channels = <&adc0 0>; - }; - }; - - named-temp-sensors { - soc-tmp112 { - compatible = "cros-ec,temp-sensor-tmp112", - "cros-ec,temp-sensor"; - label = "SOC"; - enum-name = "TEMP_SENSOR_SOC"; - tmp112-name = "TMP112_SOC"; - port = <&i2c_sensor>; - i2c-addr-flags = "TMP112_I2C_ADDR_FLAGS0"; - temp_host_high = <100>; - temp_host_halt = <105>; - temp_host_release_high = <80>; - temp_fan_off = <0>; - temp_fan_max = <70>; - }; - amb-tmp112 { - compatible = "cros-ec,temp-sensor-tmp112", - "cros-ec,temp-sensor"; - label = "Ambient"; - enum-name = "TEMP_SENSOR_AMB"; - tmp112-name = "TMP112_AMB"; - port = <&i2c_sensor>; - i2c-addr-flags = "TMP112_I2C_ADDR_FLAGS1"; - }; - }; - - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_pg_lpddr4x_s3: pg_lpddr4x_s3 { - irq-pin = <&gpio_pg_lpddr4x_s3_od>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "baseboard_en_pwr_pcore_s0"; - }; - int_slp_s3_s0i3: slp_s3_s0i3 { - irq-pin = <&gpio_slp_s3_s0i3_l>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_ec_pwr_btn: ec_pwr_btn { - irq-pin = <&gpio_ec_pwr_btn_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_ec_pcore: ec_pcore { - irq-pin = <&gpio_ec_pcore_int_odl>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - int_pg_groupc_s0: pg_groupc_s0 { - irq-pin = <&gpio_pg_groupc_s0_od>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "baseboard_en_pwr_pcore_s0"; - }; - int_s0_pgood: s0_pgood { - irq-pin = <&gpio_s0_pgood>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "power_signal_interrupt"; - }; - }; - - /* Rotation matrices for motion sensors. */ - motionsense-rotation-ref { - compatible = "cros-ec,motionsense-rotation-ref"; - lid_rot_ref: lid-rotation-ref { - mat33 = <0 (-1) 0 - (-1) 0 0 - 0 0 (-1)>; - }; - - base_rot_ref: base-rotation-ref { - mat33 = <(-1) 0 0 - 0 1 0 - 0 0 (-1)>; - }; - }; -}; - -/* host interface */ -&espi0 { - status = "okay"; - pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; - pinctrl-names = "default"; -}; diff --git a/zephyr/projects/skyrim/i2c.dts b/zephyr/projects/skyrim/i2c.dts deleted file mode 100644 index 3ac516eb46..0000000000 --- a/zephyr/projects/skyrim/i2c.dts +++ /dev/null @@ -1,169 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - aliases { - i2c-0 = &i2c0_0; - i2c-1 = &i2c1_0; - i2c-2 = &i2c2_0; - i2c-3 = &i2c3_0; - i2c-4 = &i2c4_1; - i2c-5 = &i2c5_0; - i2c-7 = &i2c7_0; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - i2c_tcpc0: tcpc0 { - i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_TCPC0"; - }; - - i2c_tcpc1: tcpc1 { - i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_TCPC1"; - }; - - battery { - i2c-port = <&i2c2_0>; - remote-port = <0>; - enum-name = "I2C_PORT_BATTERY"; - }; - - usb-mux { - i2c-port = <&i2c3_0>; - enum-name = "I2C_PORT_USB_MUX"; - }; - - i2c_charger: charger { - i2c-port = <&i2c4_1>; - enum-name = "I2C_PORT_CHARGER"; - }; - - eeprom { - i2c-port = <&i2c5_0>; - enum-name = "I2C_PORT_EEPROM"; - }; - - i2c_sensor: sensor { - i2c-port = <&i2c6_1>; - enum-name = "I2C_PORT_SENSOR"; - }; - - i2c_soc_thermal: soc-thermal { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_THERMAL_AP"; - }; - }; - - -}; - -&i2c0_0 { - status = "okay"; - label = "I2C_TCPC0"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; - pinctrl-names = "default"; -}; - -&i2c_ctrl0 { - status = "okay"; -}; - -&i2c1_0 { - status = "okay"; - label = "I2C_TCPC1"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; - pinctrl-names = "default"; -}; - -&i2c_ctrl1 { - status = "okay"; -}; - -&i2c2_0 { - status = "okay"; - label = "I2C_BATTERY"; - clock-frequency = <I2C_BITRATE_STANDARD>; - pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; - pinctrl-names = "default"; -}; - -&i2c_ctrl2 { - status = "okay"; -}; - -&i2c3_0 { - status = "okay"; - label = "I2C_USB_MUX"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; - pinctrl-names = "default"; -}; - -&i2c_ctrl3 { - status = "okay"; -}; - -&i2c4_1 { - status = "okay"; - label = "I2C_CHARGER"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>; - pinctrl-names = "default"; -}; - -&i2c_ctrl4 { - status = "okay"; -}; - -&i2c5_0 { - status = "okay"; - label = "I2C_EEPROM"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>; - pinctrl-names = "default"; - - cbi_eeprom: eeprom@50 { - compatible = "atmel,at24"; - reg = <0x50>; - label = "EEPROM_CBI"; - size = <2048>; - pagesize = <16>; - address-width = <8>; - timeout = <5>; - }; -}; - -&i2c_ctrl5 { - status = "okay"; -}; - -&i2c6_1 { - status = "okay"; - label = "I2C_SENSOR"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>; - pinctrl-names = "default"; -}; - -&i2c_ctrl6 { - status = "okay"; -}; - -&i2c7_0 { - status = "okay"; - label = "I2C_THERMAL_AP"; - clock-frequency = <I2C_BITRATE_FAST>; - pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; - pinctrl-names = "default"; -}; - -&i2c_ctrl7 { - status = "okay"; -}; diff --git a/zephyr/projects/skyrim/i2c_common.dtsi b/zephyr/projects/skyrim/i2c_common.dtsi new file mode 100644 index 0000000000..8358b1c296 --- /dev/null +++ b/zephyr/projects/skyrim/i2c_common.dtsi @@ -0,0 +1,300 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + + #include <dt-bindings/usb_pd_tcpm.h> + +/ { + aliases { + i2c-0 = &i2c0_0; + i2c-1 = &i2c1_0; + i2c-2 = &i2c2_0; + i2c-3 = &i2c3_0; + i2c-4 = &i2c4_1; + i2c-5 = &i2c5_0; + i2c-7 = &i2c7_0; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_tcpc0: tcpc0 { + i2c-port = <&i2c0_0>; + enum-names = "I2C_PORT_TCPC0"; + }; + + i2c_tcpc1: tcpc1 { + i2c-port = <&i2c1_0>; + enum-names = "I2C_PORT_TCPC1"; + }; + + battery { + i2c-port = <&i2c2_0>; + remote-port = <0>; + enum-names = "I2C_PORT_BATTERY"; + }; + + usb-mux { + i2c-port = <&i2c3_0>; + enum-names = "I2C_PORT_USB_MUX"; + }; + + i2c_charger: charger { + i2c-port = <&i2c4_1>; + enum-names = "I2C_PORT_CHARGER"; + }; + + eeprom { + i2c-port = <&i2c5_0>; + enum-names = "I2C_PORT_EEPROM"; + }; + + i2c_sensor: sensor { + i2c-port = <&i2c6_1>; + enum-names = "I2C_PORT_SENSOR"; + }; + + i2c_soc_thermal: soc-thermal { + i2c-port = <&i2c7_0>; + enum-names = "I2C_PORT_THERMAL_AP"; + }; + }; + + +}; + +&i2c0_0 { + status = "okay"; + label = "I2C_TCPC0"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; + pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + + tcpc_port0: nct38xx@70 { + compatible = "nuvoton,nct38xx"; + reg = <0x70>; + gpio-dev = <&nct3807_C0>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + }; + + nct3807_C0:nct3807_C0@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT3807_C0"; + + ioex_c0_port0:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3807_C0_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + pinmux_mask = <0xf7>; + }; + ioex_c0_port1:gpio@1 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x1>; + label = "NCT3807_C0_GPIO1"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + }; + }; + + nct3808_alert_0 { + compatible = "nuvoton,nct38xx-gpio-alert"; + irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; + nct38xx-dev = <&nct3807_C0>; + label = "NCT3807_ALERT_0"; + }; +}; + +&i2c_ctrl0 { + status = "okay"; +}; + +&i2c1_0 { + status = "okay"; + label = "I2C_TCPC1"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; + pinctrl-names = "default"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c1_bc12>; + }; + + tcpc_port1: nct38xx@70 { + compatible = "nuvoton,nct38xx"; + reg = <0x70>; + gpio-dev = <&nct3807_C1>; + tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; + }; + + nct3807_C1:nct3807_C1@70 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nuvoton,nct38xx-gpio"; + reg = <0x70>; + label = "NCT3807_C1"; + + ioex_c1_port0:gpio@0 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x0>; + label = "NCT3807_C1_GPIO0"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + pinmux_mask = <0xf7>; + }; + ioex_c1_port1:gpio@1 { + compatible = "nuvoton,nct38xx-gpio-port"; + reg = <0x1>; + label = "NCT3807_C1_GPIO1"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <8>; + pin_mask = <0xff>; + }; + }; + + nct3808_alert_1 { + compatible = "nuvoton,nct38xx-gpio-alert"; + irq-gpios = <&gpioc 7 GPIO_ACTIVE_LOW>; + nct38xx-dev = <&nct3807_C1>; + label = "NCT3807_ALERT_1"; + }; +}; + +&i2c_ctrl1 { + status = "okay"; +}; + +&i2c2_0 { + status = "okay"; + label = "I2C_BATTERY"; + clock-frequency = <I2C_BITRATE_STANDARD>; + pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; + pinctrl-names = "default"; +}; + +&i2c_ctrl2 { + status = "okay"; +}; + +&i2c3_0 { + status = "okay"; + label = "I2C_USB_MUX"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; + pinctrl-names = "default"; + + amd_fp6_port0: amd_fp6@5c { + compatible = "amd,usbc-mux-amd-fp6"; + status = "okay"; + reg = <0x5c>; + }; + amd_fp6_port1: amd_fp6@52 { + compatible = "amd,usbc-mux-amd-fp6"; + status = "okay"; + reg = <0x52>; + }; +}; + +&i2c_ctrl3 { + status = "okay"; +}; + +&i2c4_1 { + status = "okay"; + label = "I2C_CHARGER"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>; + pinctrl-names = "default"; + + charger: isl9241@9 { + compatible = "intersil,isl9241"; + status = "okay"; + reg = <0x9>; + }; +}; + +&i2c_ctrl4 { + status = "okay"; +}; + +&i2c5_0 { + status = "okay"; + label = "I2C_EEPROM"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>; + pinctrl-names = "default"; + + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; +}; + +&i2c_ctrl5 { + status = "okay"; +}; + +&i2c6_1 { + status = "okay"; + label = "I2C_SENSOR"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>; + pinctrl-names = "default"; + + soc_pct2075: soc-pct2075@48 { + compatible = "nxp,pct2075"; + reg = <0x48>; + }; + + amb_pct2075: amb-pct2075@4f { + compatible = "nxp,pct2075"; + reg = <0x4f>; + }; +}; + +&i2c_ctrl6 { + status = "okay"; +}; + +&i2c7_0 { + status = "okay"; + label = "I2C_THERMAL_AP"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c7_0_sda_scl_gpb2_b3>; + pinctrl-names = "default"; + + temp_cpu: cpu@4c { + compatible = "amd,sb-tsi"; + reg = <0x4c>; + }; +}; + +&i2c_ctrl7 { + status = "okay"; +}; diff --git a/zephyr/projects/skyrim/include/gpio_map.h b/zephyr/projects/skyrim/include/gpio_map.h deleted file mode 100644 index ca1272a9ed..0000000000 --- a/zephyr/projects/skyrim/include/gpio_map.h +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <zephyr/devicetree.h> -#include <gpio_signal.h> - -/* Power input signals */ -enum power_signal { - X86_SLP_S3_N, /* SOC -> SLP_S3_L */ - X86_SLP_S5_N, /* SOC -> SLP_S5_L */ - - X86_S0_PGOOD, /* PMIC -> S0_PWROK_OD */ - X86_S5_PGOOD, /* PMIC -> S5_PWROK */ - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT, -}; - -#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED -#define GPIO_PCH_SYS_PWROK GPIO_UNIMPLEMENTED -#define GPIO_PCH_SLP_S0_L GPIO_PCH_SLP_S3_L - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/skyrim/include_guybrush/gpio_map.h b/zephyr/projects/skyrim/include_guybrush/gpio_map.h deleted file mode 100644 index 22d0eb602e..0000000000 --- a/zephyr/projects/skyrim/include_guybrush/gpio_map.h +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <zephyr/devicetree.h> -#include <gpio_signal.h> - -/* Power input signals */ -enum power_signal { - X86_SLP_S0_N, /* SOC -> SLP_S3_S0I3_L */ - X86_SLP_S3_N, /* SOC -> SLP_S3_L */ - X86_SLP_S5_N, /* SOC -> SLP_S5_L */ - - X86_S0_PGOOD, /* PMIC -> S0_PWROK_OD */ - X86_S5_PGOOD, /* PMIC -> S5_PWROK */ - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT, -}; - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/skyrim/interrupts.dts b/zephyr/projects/skyrim/interrupts.dts index 59507f8081..0749b72078 100644 --- a/zephyr/projects/skyrim/interrupts.dts +++ b/zephyr/projects/skyrim/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -42,6 +42,26 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "baseboard_set_en_pwr_pcore"; }; + int_pg_lpddr_s3: pg_lpddr_s3 { + irq-pin = <&gpio_pg_lpddr5_s3_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_set_en_pwr_pcore"; + }; + int_pg_lpddr_s0: pg_lpddr_s0 { + irq-pin = <&gpio_pg_lpddr5_s0_od>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_set_soc_pwr_pgood"; + }; + int_s0_pgood: s0_pgood { + irq-pin = <&gpio_s0_pgood>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "baseboard_s0_pgood"; + }; + int_soc_thermtrip: soc_thermtrip { + irq-pin = <&gpio_soc_thermtrip_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "baseboard_soc_thermtrip"; + }; int_volume_up: volume_up { irq-pin = <&gpio_volup_btn_odl>; flags = <GPIO_INT_EDGE_BOTH>; @@ -52,6 +72,26 @@ flags = <GPIO_INT_EDGE_BOTH>; handler = "button_interrupt"; }; + int_usb_a0_fault: a0_fault { + irq-pin = <&ioex_usb_a0_fault_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "usb_fault_interrupt"; + }; + int_usb_a1_fault: a1_fault { + irq-pin = <&ioex_usb_a1_fault_db_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "usb_fault_interrupt"; + }; + int_usb_c0_sbu_fault: c0_sbu_fault { + irq-pin = <&ioex_usb_c0_sbu_fault_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "sbu_fault_interrupt"; + }; + int_usb_c1_sbu_fault: c1_sbu_fault { + irq-pin = <&ioex_usb_c1_sbu_fault_odl>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "sbu_fault_interrupt"; + }; int_usb_c0_tcpc: usb_c0_tcpc { irq-pin = <&gpio_usb_c0_tcpc_int_odl>; flags = <GPIO_INT_EDGE_FALLING>; @@ -82,6 +122,16 @@ flags = <GPIO_INT_EDGE_FALLING>; handler = "bc12_interrupt"; }; + int_usb_hub_fault: hub_fault { + irq-pin = <&gpio_usb_hub_fault_q_odl>; + flags = <GPIO_INT_EDGE_BOTH>; + handler = "usb_fault_interrupt"; + }; + int_usb_pd_soc: usb_pd_soc { + irq-pin = <&gpio_ec_i2c_usbc_pd_int>; + flags = <GPIO_INT_EDGE_FALLING>; + handler = "usb_pd_soc_interrupt"; + }; int_accel_gyro: accel_gyro { irq-pin = <&gpio_accel_gyro_int_l>; flags = <GPIO_INT_EDGE_FALLING>; diff --git a/zephyr/projects/skyrim/keyboard.dts b/zephyr/projects/skyrim/keyboard.dts index 216ea97045..df334ba54c 100644 --- a/zephyr/projects/skyrim/keyboard.dts +++ b/zephyr/projects/skyrim/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,6 @@ kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm1 0 PWM_HZ(100) PWM_POLARITY_NORMAL>; - frequency = <100>; }; }; diff --git a/zephyr/projects/skyrim/led_pins_morthal.dts b/zephyr/projects/skyrim/led_pins_morthal.dts new file mode 100644 index 0000000000..33a66c0756 --- /dev/null +++ b/zephyr/projects/skyrim/led_pins_morthal.dts @@ -0,0 +1,63 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + pwm_pins { + compatible = "cros-ec,pwm-pin-config"; + + pwm_y: pwm_y { + #led-pin-cells = <1>; + pwms = <&pwm2 0 PWM_HZ(100) PWM_POLARITY_INVERTED>; + }; + + pwm_w: pwm_w { + #led-pin-cells = <1>; + pwms = <&pwm3 0 PWM_HZ(100) PWM_POLARITY_INVERTED>; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + color_off: color-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&pwm_y 0>, + <&pwm_w 0>; + }; + + color_amber: color-amber { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_AMBER"; + led-pins = <&pwm_y 100>, + <&pwm_w 0>; + }; + + color_white: color-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_BLUE"; + led-pins = <&pwm_y 0>, + <&pwm_w 100>; + }; + }; +}; + +/* Amber "battery charging" LED */ +&pwm2 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm2_gpc4>; + pinctrl-names = "default"; +}; + +/* White "battery full" LED */ +&pwm3 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm3_gp80>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/skyrim/led_pins_skyrim.dts b/zephyr/projects/skyrim/led_pins_skyrim.dts index 3ff966bcf6..33a66c0756 100644 --- a/zephyr/projects/skyrim/led_pins_skyrim.dts +++ b/zephyr/projects/skyrim/led_pins_skyrim.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,7 +20,6 @@ pwm-led-pins { compatible = "cros-ec,pwm-led-pins"; - pwm-frequency = <100>; color_off: color-off { led-color = "LED_OFF"; diff --git a/zephyr/projects/skyrim/led_pins_winterhold.dts b/zephyr/projects/skyrim/led_pins_winterhold.dts new file mode 100644 index 0000000000..33a66c0756 --- /dev/null +++ b/zephyr/projects/skyrim/led_pins_winterhold.dts @@ -0,0 +1,63 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + pwm_pins { + compatible = "cros-ec,pwm-pin-config"; + + pwm_y: pwm_y { + #led-pin-cells = <1>; + pwms = <&pwm2 0 PWM_HZ(100) PWM_POLARITY_INVERTED>; + }; + + pwm_w: pwm_w { + #led-pin-cells = <1>; + pwms = <&pwm3 0 PWM_HZ(100) PWM_POLARITY_INVERTED>; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + color_off: color-off { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_BATTERY_LED"; + led-pins = <&pwm_y 0>, + <&pwm_w 0>; + }; + + color_amber: color-amber { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_AMBER"; + led-pins = <&pwm_y 100>, + <&pwm_w 0>; + }; + + color_white: color-white { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_BATTERY_LED"; + br-color = "EC_LED_COLOR_BLUE"; + led-pins = <&pwm_y 0>, + <&pwm_w 100>; + }; + }; +}; + +/* Amber "battery charging" LED */ +&pwm2 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm2_gpc4>; + pinctrl-names = "default"; +}; + +/* White "battery full" LED */ +&pwm3 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; + pinctrl-0 = <&pwm3_gp80>; + pinctrl-names = "default"; +}; diff --git a/zephyr/projects/skyrim/led_policy_morthal.dts b/zephyr/projects/skyrim/led_policy_morthal.dts new file mode 100644 index 0000000000..a075c6b0d2 --- /dev/null +++ b/zephyr/projects/skyrim/led_policy_morthal.dts @@ -0,0 +1,103 @@ +#include <dt-bindings/battery.h> + +/ { + led-colors { + compatible = "cros-ec,led-policy"; + + power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (> Low, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>; + + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-discharge-s0-batt-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= Empty, <= Low) */ + batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>; + + /* White 2 sec, off 1 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <2000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + /* White 1 sec, off 1 sec */ + color-0 { + led-color = <&color_white>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-error { + charge-state = "PWR_STATE_ERROR"; + + /* Amber 1 sec, off 1 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; + + /* Amber 2 sec, White 2 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <2000>; + }; + color-1 { + led-color = <&color_white>; + period-ms = <2000>; + }; + }; + }; +}; diff --git a/zephyr/projects/skyrim/led_policy_skyrim.dts b/zephyr/projects/skyrim/led_policy_skyrim.dts index da3d817925..a075c6b0d2 100644 --- a/zephyr/projects/skyrim/led_policy_skyrim.dts +++ b/zephyr/projects/skyrim/led_policy_skyrim.dts @@ -2,7 +2,7 @@ / { led-colors { - compatible = "cros-ec,led-colors"; + compatible = "cros-ec,led-policy"; power-state-charge { charge-state = "PWR_STATE_CHARGE"; @@ -86,9 +86,8 @@ }; }; - power-state-idle-forced { - charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_FORCE_IDLE"; + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; /* Amber 2 sec, White 2 sec */ color-0 { diff --git a/zephyr/projects/skyrim/led_policy_winterhold.dts b/zephyr/projects/skyrim/led_policy_winterhold.dts new file mode 100644 index 0000000000..f1f8aa31ed --- /dev/null +++ b/zephyr/projects/skyrim/led_policy_winterhold.dts @@ -0,0 +1,103 @@ +#include <dt-bindings/battery.h> + +/ { + led-colors { + compatible = "cros-ec,led-policy"; + + power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + color-0 { + led-color = <&color_white>; + }; + }; + + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (> Low, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-discharge-s0-batt-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + /* Battery percent range (>= Empty, <= Low) */ + batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + /* Battery percent range (> Low, <= Full) */ + batt-lvl = <(BATTERY_LEVEL_LOW + 1) BATTERY_LEVEL_FULL>; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-discharge-s3-batt-low { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + /* Battery percent range (>= Empty, <= Low) */ + batt-lvl = <BATTERY_LEVEL_EMPTY BATTERY_LEVEL_LOW>; + + color-0 { + led-color = <&color_amber>; + }; + }; + + power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-error { + charge-state = "PWR_STATE_ERROR"; + + /* Amber 1 sec, off 1 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <1000>; + }; + color-1 { + led-color = <&color_off>; + period-ms = <1000>; + }; + }; + + power-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = <&color_off>; + }; + }; + + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; + + /* Amber 2 sec, White 2 sec */ + color-0 { + led-color = <&color_amber>; + period-ms = <2000>; + }; + color-1 { + led-color = <&color_white>; + period-ms = <2000>; + }; + }; + }; +}; diff --git a/zephyr/projects/skyrim/morthal.dts b/zephyr/projects/skyrim/morthal.dts new file mode 100644 index 0000000000..bb1e45aa87 --- /dev/null +++ b/zephyr/projects/skyrim/morthal.dts @@ -0,0 +1,175 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/usbc_mux.h> + +#include "i2c_common.dtsi" + +/ { + named-gpios { + /* Morthal-specific GPIO customizations */ + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + soc-pct2075 { + temp_host_high = <100>; + temp_host_halt = <105>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + temp_fan_off = <0>; + temp_fan_max = <70>; + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&soc_pct2075>; + }; + amb-pct2075 { + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&amb_pct2075>; + }; + }; + + /* + * Note this is expected to vary per-board, so we keep it in the board + * dts files. + */ + morthal-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + form-factor { + enum-name = "FW_FORM_FACTOR"; + start = <0>; + size = <1>; + + ff-clamshell { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FF_CLAMSHELL"; + value = <0>; + }; + ff-convertible { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FF_CONVERTIBLE"; + value = <1>; + default; + }; + }; + io-db { + enum-name = "FW_IO_DB"; + start = <6>; + size = <2>; + + io-db-ps8811-ps8818 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_PS8811_PS8818"; + value = <0>; + }; + io-db-none-anx7483 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_NONE_ANX7483"; + value = <1>; + default; + }; + }; + + /* + * FW_CONFIG field to enable fan or not. + */ + fan { + enum-name = "FW_FAN"; + start = <10>; + size = <1>; + + no-fan { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_NOT_PRESENT"; + value = <0>; + }; + fan-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_PRESENT"; + value = <1>; + /* + * Set as default so that unprovisioned + * configs will run the fan regardless. + */ + default; + }; + }; + }; + + /* Rotation matrices for motion sensors. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <0 (-1) 0 + 1 0 0 + 0 0 1>; + }; + + lid_rot_ref1: lid-rotation-ref1 { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; + + ppc_port0: aoz1380 { + compatible = "aoz,aoz1380"; + status = "okay"; + }; +}; + +&i2c0_0 { + anx7483_port0: anx7483@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "board_anx7483_c0_mux_set"; + }; +}; + +&i2c1_0 { + anx7483_port1: anx7483@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "board_anx7483_c1_mux_set"; + }; + ppc_port1: nx20p348x@71 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x71>; + }; + ps8818_port1: ps8818@28 { + compatible = "parade,ps8818"; + reg = <0x28>; + flags = <(USB_MUX_FLAG_RESETS_IN_G3)>; + board-set = "board_c1_ps8818_mux_set"; + }; +}; + +&usbc_port0 { + ppc = <&ppc_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port0 &anx7483_port0>; + }; +}; + +&usbc_port1 { + ppc = <&ppc_port1>; + usb-mux-chain-1-anx { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1 &anx7483_port1>; + }; + usb_mux_chain_ps8818_port1: usb-mux-chain-1-ps { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1 &ps8818_port1>; + alternative-chain; + }; +}; diff --git a/zephyr/projects/skyrim/motionsense.dts b/zephyr/projects/skyrim/motionsense.dts index 642a1cddf8..f943bea4c8 100644 --- a/zephyr/projects/skyrim/motionsense.dts +++ b/zephyr/projects/skyrim/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -26,11 +26,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; mutex_bmi3xx: bmi3xx-mutex { - label = "BMI3XX_MUTEX"; }; }; @@ -57,7 +55,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -65,7 +63,6 @@ compatible = "cros-ec,bma4xx"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -77,12 +74,10 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(12500 | ROUND_UP_FLAG)>; ec-rate = <100>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(12500 | ROUND_UP_FLAG)>; }; }; @@ -92,7 +87,6 @@ compatible = "cros-ec,bmi3xx-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi3xx>; @@ -104,12 +98,10 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(12500 | ROUND_UP_FLAG)>; ec-rate = <100>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(12500 | ROUND_UP_FLAG)>; }; }; @@ -119,7 +111,6 @@ compatible = "cros-ec,bmi3xx-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi3xx>; diff --git a/zephyr/projects/skyrim/power_signals_guybrush.c b/zephyr/projects/skyrim/power_signals_guybrush.c deleted file mode 100644 index 11110886f2..0000000000 --- a/zephyr/projects/skyrim/power_signals_guybrush.c +++ /dev/null @@ -1,125 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/drivers/gpio.h> - -#include "chipset.h" -#include "config.h" -#include "gpio_signal.h" -#include "gpio/gpio_int.h" -#include "hooks.h" -#include "power.h" -#include "timer.h" - -/* Wake Sources */ -/* TODO: b/218904113: Convert to using Zephyr GPIOs */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_LID_OPEN, - GPIO_AC_PRESENT, - GPIO_POWER_BUTTON_L, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* Power Signal Input List */ -/* TODO: b/218904113: Convert to using Zephyr GPIOs */ -const struct power_signal_info power_signal_list[] = { - [X86_SLP_S0_N] = { - .gpio = GPIO_PCH_SLP_S0_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S0_DEASSERTED", - }, - [X86_SLP_S3_N] = { - .gpio = GPIO_PCH_SLP_S3_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S3_DEASSERTED", - }, - [X86_SLP_S5_N] = { - .gpio = GPIO_PCH_SLP_S5_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S5_DEASSERTED", - }, - [X86_S0_PGOOD] = { - .gpio = GPIO_S0_PGOOD, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "S0_PGOOD", - }, - [X86_S5_PGOOD] = { - .gpio = GPIO_S5_PGOOD, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "S5_PGOOD", - }, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -static void baseboard_interrupt_init(void) -{ - /* Enable Power Group interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_groupc_s0)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_lpddr4x_s3)); -} -DECLARE_HOOK(HOOK_INIT, baseboard_interrupt_init, HOOK_PRIO_POST_I2C); - -/** - * b/175324615: On G3->S5, wait for RSMRST_L to be deasserted before asserting - * PCH_PWRBTN_L. - */ -void board_pwrbtn_to_pch(int level) -{ - timestamp_t start; - const uint32_t timeout_rsmrst_rise_us = 30 * MSEC; - - /* Add delay for G3 exit if asserting PWRBTN_L and RSMRST_L is low. */ - if (!level && - !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) { - start = get_time(); - do { - usleep(200); - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) - break; - } while (time_since32(start) < timeout_rsmrst_rise_us); - - if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) - ccprints("Error pwrbtn: RSMRST_L still low"); - - msleep(16); - } - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_pwr_btn_l), level); -} - -void baseboard_en_pwr_pcore_s0(enum gpio_signal signal) -{ - - /* EC must AND signals PG_LPDDR4X_S3_OD and PG_GROUPC_S0_OD */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r), - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr4x_s3_od)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_groupc_s0_od))); -} - -void baseboard_en_pwr_s0(enum gpio_signal signal) -{ - - /* EC must AND signals SLP_S3_L and PG_PWR_S5 */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r), - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_slp_s3_l)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5))); - - /* Now chain off to the normal power signal interrupt handler. */ - power_signal_interrupt(signal); -} - -void baseboard_s5_pgood(enum gpio_signal signal) -{ - baseboard_en_pwr_s0(signal); -} - -void baseboard_set_en_pwr_s3(enum gpio_signal signal) -{ - /* EC has no EN_PWR_S3 on this board */ - - /* Chain off the normal power signal interrupt handler */ - power_signal_interrupt(signal); -} diff --git a/zephyr/projects/skyrim/prj.conf b/zephyr/projects/skyrim/prj.conf index 47e9c1d096..135b5713e4 100644 --- a/zephyr/projects/skyrim/prj.conf +++ b/zephyr/projects/skyrim/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -28,7 +28,7 @@ CONFIG_PLATFORM_EC_PORT80=y CONFIG_PLATFORM_EC_POWER_BUTTON=y # ADC -CONFIG_PLATFORM_EC_ADC=y +CONFIG_ADC=y # I2C CONFIG_I2C=y @@ -41,6 +41,8 @@ CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y CONFIG_PLATFORM_EC_CBI_EEPROM=y # Temperature Sensors +CONFIG_PLATFORM_EC_AMD_SB_RMI=y +CONFIG_PLATFORM_EC_AMD_STT=y CONFIG_PLATFORM_EC_TEMP_SENSOR=y CONFIG_PLATFORM_EC_TEMP_SENSOR_SB_TSI=y CONFIG_PLATFORM_EC_THERMISTOR=y @@ -59,11 +61,6 @@ CONFIG_SENSOR_SHELL=n # Fan CONFIG_TACH_NPCX=y -# LEDs -CONFIG_PLATFORM_EC_LED_COMMON=y -CONFIG_PLATFORM_EC_LED_ONOFF_STATES=y -CONFIG_PLATFORM_EC_LED_PWM=y - # Lid switch CONFIG_PLATFORM_EC_LID_ANGLE=y CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y @@ -74,6 +71,8 @@ CONFIG_PLATFORM_EC_KBLIGHT_ENABLE_PIN=y CONFIG_PLATFORM_EC_KEYBOARD=y CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI3=y +CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3=y # PWM CONFIG_PWM=y @@ -133,7 +132,6 @@ CONFIG_GPIO_NCT38XX=y # Hibernate and wake CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y -CONFIG_PLATFORM_EC_HIBERNATE_PSL=y # Motion sense CONFIG_PLATFORM_EC_MOTIONSENSE=y @@ -159,3 +157,13 @@ CONFIG_PLATFORM_EC_ACCELGYRO_BMI_COMM_I2C=y # Misc. CONFIG_PLATFORM_EC_I2C_DEBUG=y CONFIG_PLATFORM_EC_PORT80_4_BYTE=y + +# These are debug options that happen to be expensive in terms of flash space. +# Turn on as needed based on demand. +CONFIG_FLASH_PAGE_LAYOUT=n # 1876 bytes +CONFIG_FLASH_SHELL=n # 1852 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=n # 656 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_MEM=n # 896 bytes +# CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP=n # 1180 bytes +CONFIG_PLATFORM_EC_CONSOLE_CMD_USB_PD_CABLE=n # 1104 bytes +CONFIG_THREAD_MONITOR=n # 1548 bytes diff --git a/zephyr/projects/skyrim/prj_guybrush.conf b/zephyr/projects/skyrim/prj_guybrush.conf deleted file mode 100644 index 0ca57174a4..0000000000 --- a/zephyr/projects/skyrim/prj_guybrush.conf +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Guybrush board-specific Kconfig settings. -CONFIG_BOARD_GUYBRUSH=y - -# Only Guybrush has TMP112 -CONFIG_PLATFORM_EC_TEMP_SENSOR_TMP112=y
\ No newline at end of file diff --git a/zephyr/projects/skyrim/prj_morthal.conf b/zephyr/projects/skyrim/prj_morthal.conf new file mode 100644 index 0000000000..3d2b3fddb7 --- /dev/null +++ b/zephyr/projects/skyrim/prj_morthal.conf @@ -0,0 +1,23 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Morthal reference-board-specific Kconfig settings. +CONFIG_BOARD_MORTHAL=y + +# TODO(b/215404321): Remove later in board development +CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y + +# LED +CONFIG_PLATFORM_EC_LED_DT=y + +# Morthal is capable of sinking 100W +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=100000 +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=5000 +CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=20000 + +# Only Morthal has the PCT2075 +CONFIG_PLATFORM_EC_TEMP_SENSOR_PCT2075=y + +CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y diff --git a/zephyr/projects/skyrim/prj_skyrim.conf b/zephyr/projects/skyrim/prj_skyrim.conf index 2a524cf442..6a0ced86dd 100644 --- a/zephyr/projects/skyrim/prj_skyrim.conf +++ b/zephyr/projects/skyrim/prj_skyrim.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -8,14 +8,20 @@ CONFIG_BOARD_SKYRIM=y # TODO(b/215404321): Remove later in board development CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y -CONFIG_PLATFORM_EC_KEYBOARD_DEBUG=y -CONFIG_PLATFORM_EC_POWERSEQ_FAKE_CONTROL=y # LED -CONFIG_PLATFORM_EC_LED_COMMON=n CONFIG_PLATFORM_EC_LED_DT=y +# Skyrim is capable of sinking 100W +CONFIG_PLATFORM_EC_PD_MAX_POWER_MW=100000 +CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA=5000 +CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV=20000 + # Only Skyrim has the PCT2075 CONFIG_PLATFORM_EC_TEMP_SENSOR_PCT2075=y CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y + +# Enable alternative charger chip +CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG=y +CONFIG_PLATFORM_EC_CHARGER_ISL9238C=y diff --git a/zephyr/projects/skyrim/prj_winterhold.conf b/zephyr/projects/skyrim/prj_winterhold.conf new file mode 100644 index 0000000000..3e6c967c6d --- /dev/null +++ b/zephyr/projects/skyrim/prj_winterhold.conf @@ -0,0 +1,18 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Winterhold reference-board-specific Kconfig settings. +CONFIG_BOARD_WINTERHOLD=y + +# TODO(b/215404321): Remove later in board development +CONFIG_PLATFORM_EC_EEPROM_CBI_WP=y +CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y + +# LED +CONFIG_PLATFORM_EC_LED_DT=y + +# Only Winterhold has the PCT2075 +CONFIG_PLATFORM_EC_TEMP_SENSOR_PCT2075=y + +CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7483=y diff --git a/zephyr/projects/skyrim/skyrim.dts b/zephyr/projects/skyrim/skyrim.dts index 8b4b5505ad..02308e4390 100644 --- a/zephyr/projects/skyrim/skyrim.dts +++ b/zephyr/projects/skyrim/skyrim.dts @@ -1,150 +1,32 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -/ { - aliases { - gpio-wp = &gpio_wp; - gpio-cbi-wp = &gpio_cbi_wp; - gpio-kbd-kso2 = &gpio_ec_kso_02_inv; - }; +#include <dt-bindings/usbc_mux.h> + +#include "i2c_common.dtsi" +/ { named-gpios { /* Skyrim-specific GPIO customizations */ - usb_fault_odl { - gpios = <&gpio5 0 GPIO_ODR_HIGH>; - }; - gpio_en_pwr_s3: en_pwr_s3 { - gpios = <&gpio7 4 GPIO_OUTPUT_LOW>; - }; - gpio_pg_groupc_s0_od: pg_groupc_s0_od { - gpios = <&gpiof 0 GPIO_INPUT>; - }; - /* TODO: Add interrupt handler */ - ec_i2c_usbc_pd_int { - gpios = <&gpioa 3 GPIO_INPUT>; - }; - /* TODO: Add interrupt handler */ - soc_thermtrip_odl { - gpios = <&gpio9 5 GPIO_INPUT>; - }; - gpio_hub_rst: hub_rst { - gpios = <&gpio6 6 GPIO_OUTPUT_HIGH>; - }; - ec_soc_int_l { - gpios = <&gpioa 1 GPIO_OUTPUT_HIGH>; - enum-name = "GPIO_EC_INT_L"; - }; - gpio_ec_soc_pwr_good: ec_soc_pwr_good { - gpios = <&gpiod 3 GPIO_OUTPUT_LOW>; - }; - /* TODO: Add interrupt handler to shut down */ - pcore_ocp_r_l { - gpios = <&gpioa 5 GPIO_INPUT>; - }; - /* TODO: Add interrupt handler */ - sc_0_int_l { - gpios = <&gpio6 3 GPIO_INPUT_PULL_UP>; - }; - /* TODO: Add interrupt handler */ - usb_hub_fault_q_odl { - gpios = <&gpioe 5 GPIO_INPUT_PULL_UP>; - }; - gpio_pg_lpddr5_s3_od: pg_lpddr5_s3_od { - gpios = <&gpio7 3 GPIO_INPUT>; - }; - 3axis_int_l { - gpios = <&gpioa 2 GPIO_INPUT_PULL_UP>; - }; - gpio_ec_soc_pwr_btn_l: ec_soc_pwr_btn_l { - gpios = <&gpioa 7 GPIO_OUTPUT_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - gpio_volup_btn_odl: volup_btn_odl { - gpios = <&gpio6 7 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_UP_L"; - }; - gpio_voldn_btn_odl: voldn_btn_odl { - gpios = <&gpio7 0 GPIO_INPUT_PULL_UP>; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - ec_sc_rst { - gpios = <&gpiob 0 GPIO_OUTPUT_LOW>; - }; - gpio_cbi_wp: ec_cbi_wp { - gpios = <&gpio8 1 GPIO_OUTPUT_LOW>; - }; - gpio_wp: ec_wp_l { - gpios = <&gpiod 7 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; - }; - gpio_pg_lpddr5_s0_od: pg_lpddr5_s0_od { - gpios = <&gpio6 0 GPIO_INPUT>; - }; - ec_espi_rst_l { - gpios = <&gpio5 4 GPIO_PULL_DOWN>; - }; - gpio_accel_gyro_int_l: accel_gyro_int_l { - gpios = <&gpioa 0 GPIO_INPUT>; - }; - }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - - /* - * Low voltage on I2C2_0, I2C6_1, I2C7_0, USB_FAUT_ODL - */ - lvol-io-pads = <&lvol_io92 &lvol_io91 &lvol_ioe4 &lvol_ioe3 - &lvol_iob3 &lvol_iob2 &lvol_io50>; }; named-temp-sensors { + compatible = "cros-ec,temp-sensors"; soc-pct2075 { - compatible = "cros-ec,temp-sensor-pct2075", - "cros-ec,temp-sensor"; - label = "SOC"; - enum-name = "TEMP_SENSOR_SOC"; - pct2075-name = "PCT2075_SOC"; - port = <&i2c_sensor>; - i2c-addr-flags = "PCT2075_I2C_ADDR_FLAGS0"; temp_host_high = <100>; temp_host_halt = <105>; temp_host_release_high = <80>; temp_host_release_halt = <80>; - temp_fan_off = <0>; + temp_fan_off = <35>; temp_fan_max = <70>; power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&soc_pct2075>; }; amb-pct2075 { - compatible = "cros-ec,temp-sensor-pct2075", - "cros-ec,temp-sensor"; - label = "Ambient"; - enum-name = "TEMP_SENSOR_AMB"; - pct2075-name = "PCT2075_AMB"; - port = <&i2c_sensor>; - i2c-addr-flags = "PCT2075_I2C_ADDR_FLAGS7"; power-good-pin = <&gpio_pg_pwr_s5>; - }; - }; - - gpio-interrupts { - compatible = "cros-ec,gpio-interrupts"; - - int_pg_lpddr_s3: pg_lpddr_s3 { - irq-pin = <&gpio_pg_lpddr5_s3_od>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "baseboard_set_en_pwr_pcore"; - }; - int_pg_lpddr_s0: pg_lpddr_s0 { - irq-pin = <&gpio_pg_lpddr5_s0_od>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "baseboard_set_soc_pwr_pgood"; - }; - int_s0_pgood: s0_pgood { - irq-pin = <&gpio_s0_pgood>; - flags = <GPIO_INT_EDGE_BOTH>; - handler = "baseboard_s0_pgood"; + sensor = <&amb_pct2075>; }; }; @@ -189,6 +71,49 @@ default; }; }; + + /* + * FW_CONFIG field to enable fan or not. + */ + fan { + enum-name = "FW_FAN"; + start = <10>; + size = <1>; + + no-fan { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_NOT_PRESENT"; + value = <0>; + }; + fan-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_PRESENT"; + value = <1>; + /* + * Set as default so that unprovisioned + * configs will run the fan regardless. + */ + default; + }; + }; + + charger-option { + enum-name = "FW_CHARGER"; + start = <11>; + size = <2>; + + charger-option-isl9241 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_CHARGER_ISL9241"; + value = <0>; + default; + }; + charger-option-isl9538 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_CHARGER_ISL9538"; + value = <1>; + }; + }; }; /* Rotation matrices for motion sensors. */ @@ -200,17 +125,78 @@ 0 0 1>; }; + lid_rot_ref1: lid-rotation-ref1 { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + base_rot_ref: base-rotation-ref { mat33 = <0 1 0 (-1) 0 0 0 0 1>; }; }; + + ppc_port0: aoz1380 { + compatible = "aoz,aoz1380"; + status = "okay"; + }; }; -/* host interface */ -&espi0 { - status = "okay"; - pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; - pinctrl-names = "default"; +&i2c0_0 { + anx7483_port0: anx7483@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "board_anx7483_c0_mux_set"; + }; +}; + +&i2c1_0 { + anx7483_port1: anx7483@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "board_anx7483_c1_mux_set"; + }; + ppc_port1: nx20p348x@71 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x71>; + }; + ps8818_port1: ps8818@28 { + compatible = "parade,ps8818"; + reg = <0x28>; + flags = <(USB_MUX_FLAG_RESETS_IN_G3)>; + board-set = "board_c1_ps8818_mux_set"; + }; +}; + +&i2c4_1 { + alt_charger: isl9538@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; +}; + +&usbc_port0 { + chg_alt = <&alt_charger>; + ppc = <&ppc_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port0 &anx7483_port0>; + }; +}; + +&usbc_port1 { + ppc = <&ppc_port1>; + usb-mux-chain-1-anx { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1 &anx7483_port1>; + }; + usb_mux_chain_ps8818_port1: usb-mux-chain-1-ps { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1 &ps8818_port1>; + alternative-chain; + }; }; diff --git a/zephyr/projects/skyrim/src/common.c b/zephyr/projects/skyrim/src/common.c new file mode 100644 index 0000000000..af82139c1b --- /dev/null +++ b/zephyr/projects/skyrim/src/common.c @@ -0,0 +1,8 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log.h> + +LOG_MODULE_REGISTER(skyrim, CONFIG_SKYRIM_LOG_LEVEL); diff --git a/zephyr/projects/skyrim/src/morthal/ppc_config.c b/zephyr/projects/skyrim/src/morthal/ppc_config.c new file mode 100644 index 0000000000..f3ec1d312e --- /dev/null +++ b/zephyr/projects/skyrim/src/morthal/ppc_config.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Morthal board-specific PPC code */ + +#include <zephyr/drivers/gpio.h> + +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/aoz1380_public.h" +#include "usbc_ppc.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * In the AOZ1380 PPC, there are no programmable features. We use + * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 + * current limits. + */ +int board_aoz1380_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int rv = EC_SUCCESS; + + rv = gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(ioex_usb_c0_ilim_3a_en), + (rp == TYPEC_RP_3A0) ? 1 : 0); + + return rv; +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + aoz1380_interrupt(0); + break; + + case GPIO_USB_C1_PPC_INT_ODL: + nx20p348x_interrupt(1); + break; + + default: + break; + } +} diff --git a/zephyr/projects/skyrim/src/morthal/usb_mux_config.c b/zephyr/projects/skyrim/src/morthal/usb_mux_config.c new file mode 100644 index 0000000000..8fe76233e2 --- /dev/null +++ b/zephyr/projects/skyrim/src/morthal/usb_mux_config.c @@ -0,0 +1,142 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Morthal board-specific USB-C mux configuration */ + +#include <zephyr/drivers/gpio.h> + +#include "console.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/retimer/anx7483_public.h" +#include "hooks.h" +#include "ioexpander.h" +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * USB C0 (general) and C1 (just ANX DB) use IOEX pins to + * indicate flipped polarity to a protection switch. + */ +static int ioex_set_flip(int port, mux_state_t mux_state) +{ + if (port == 0) { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 0); + } else { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 0); + } + + return EC_SUCCESS; +} + +int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + return anx7483_set_default_tuning(me, mux_state); +} + +int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED; + + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + /* Remove flipped from the state for easier compraisons */ + mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED; + + RETURN_ERROR(anx7483_set_default_tuning(me, mux_state)); + + if (mux_state == USB_PD_MUX_USB_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DP_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && !flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } + + return EC_SUCCESS; +} + +int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + CPRINTSUSB("C1: PS8818 mux using default tuning"); + + /* Once a DP connection is established, we need to set IN_HPD */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1); + else + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0); + + return 0; +} + +static void setup_mux(void) +{ + uint32_t val; + + if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0) + CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG"); + /* Val will have our dts default on error, so continue setup */ + + if (val == FW_IO_DB_PS8811_PS8818) { + CPRINTSUSB("C1: Setting PS8818 mux"); + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1); + } else if (val == FW_IO_DB_NONE_ANX7483) { + CPRINTSUSB("C1: Setting ANX7483 mux"); + } else { + CPRINTSUSB("Unexpected DB_IO board: %d", val); + } +} +DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); diff --git a/zephyr/projects/skyrim/power_signals.c b/zephyr/projects/skyrim/src/power_signals.c index e85cea1f04..3c56e51ddc 100644 --- a/zephyr/projects/skyrim/power_signals.c +++ b/zephyr/projects/skyrim/src/power_signals.c @@ -1,16 +1,20 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include "ap_power/ap_power.h" +#include "charger.h" #include "chipset.h" #include "config.h" +#include "cros_board_info.h" #include "gpio_signal.h" #include "gpio/gpio_int.h" #include "hooks.h" +#include "i2c.h" #include "ioexpander.h" #include "power.h" +#include "power/amd_x86.h" #include "timer.h" /* Power Signal Input List */ @@ -49,15 +53,15 @@ static void baseboard_suspend_change(struct ap_power_ev_callback *cb, case AP_POWER_SUSPEND: /* Disable display backlight and retimer */ - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl), 1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl), + 1); ioex_set_level(IOEX_USB_A1_RETIMER_EN, 0); break; case AP_POWER_RESUME: /* Enable retimer and display backlight */ - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl), 0); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl), + 0); ioex_set_level(IOEX_USB_A1_RETIMER_EN, 1); /* Any retimer tuning can be done after the retimer turns on */ break; @@ -76,6 +80,9 @@ static void baseboard_init(void) gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_groupc_s0)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_lpddr_s0)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_pg_lpddr_s3)); + + /* Enable thermtrip interrupt */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_soc_thermtrip)); } DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_POST_I2C); @@ -84,7 +91,7 @@ DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_POST_I2C); * PCH_PWRBTN_L. This can be as long as ~65ms after cold boot. Then wait an * additional delay of T1a defined in the EDS before changing the power button. */ -#define RSMRST_WAIT_DELAY 70 +#define RSMRST_WAIT_DELAY 70 #define EDS_PWR_BTN_RSMRST_T1A_DELAY 16 void board_pwrbtn_to_pch(int level) { @@ -96,13 +103,13 @@ void board_pwrbtn_to_pch(int level) start = get_time(); do { usleep(500); - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_ec_soc_rsmrst_l))) break; } while (time_since32(start) < (RSMRST_WAIT_DELAY * MSEC)); if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l))) ccprints("Error pwrbtn: RSMRST_L still low"); msleep(EDS_PWR_BTN_RSMRST_T1A_DELAY); @@ -113,11 +120,34 @@ void board_pwrbtn_to_pch(int level) /* Note: signal parameter unused */ void baseboard_set_soc_pwr_pgood(enum gpio_signal unused) { - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_ec_soc_pwr_good), - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s0_od)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_s0_pgood))); + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_pwr_good), + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s0_od)) && + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_s0_pgood))); +} + +/* TODO: Remove when board versions are no longer supported */ +#define MP2845A_I2C_ADDR_FLAGS 0x20 +#define MP2854A_MFR_VOUT_CMPS_MAX_REG 0x69 +#define MP2854A_MFR_LOW_PWR_SEL BIT(12) + +static void setup_mp2845(void) +{ + int version; + + /* TODO: Remove when board versions are no longer supported */ + if ((cbi_get_board_version(&version) == EC_SUCCESS) && version > 3) + return; + + if (i2c_update16(chg_chips[CHARGER_SOLO].i2c_port, + MP2845A_I2C_ADDR_FLAGS, MP2854A_MFR_VOUT_CMPS_MAX_REG, + MP2854A_MFR_LOW_PWR_SEL, MASK_CLR)) + ccprints("Failed to send mp2845 workaround"); } +DECLARE_DEFERRED(setup_mp2845); void baseboard_s0_pgood(enum gpio_signal signal) { @@ -125,6 +155,10 @@ void baseboard_s0_pgood(enum gpio_signal signal) /* Chain off power signal interrupt handler for PG_PCORE_S0_R_OD */ power_signal_interrupt(signal); + + /* Set up the MP2845, which is powered in S0 */ + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_s0_pgood))) + hook_call_deferred(&setup_mp2845_data, 50 * MSEC); } /* Note: signal parameter unused */ @@ -134,10 +168,13 @@ void baseboard_set_en_pwr_pcore(enum gpio_signal unused) * EC must AND signals PG_LPDDR5_S3_OD, PG_GROUPC_S0_OD, and * EN_PWR_S0_R */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r), - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s3_od)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_groupc_s0_od)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r))); + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r), + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s3_od)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_pg_groupc_s0_od)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r))); /* Update EC_SOC_PWR_GOOD based on our results */ baseboard_set_soc_pwr_pgood(unused); @@ -146,9 +183,11 @@ void baseboard_set_en_pwr_pcore(enum gpio_signal unused) void baseboard_en_pwr_s0(enum gpio_signal signal) { /* EC must AND signals SLP_S3_L and PG_PWR_S5 */ - gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r), - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_slp_s3_l)) && - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5))); + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r), + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_slp_s3_l)) && + gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5))); /* Change EN_PWR_PCORE_S0_R if needed*/ baseboard_set_en_pwr_pcore(signal); @@ -179,8 +218,14 @@ void baseboard_set_en_pwr_s3(enum gpio_signal signal) { /* EC must enable PWR_S3 when SLP_S5_L goes high, disable on low */ gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s3), - gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_slp_s5_l))); + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_slp_s5_l))); /* Chain off the normal power signal interrupt handler */ power_signal_interrupt(signal); } + +void baseboard_soc_thermtrip(enum gpio_signal signal) +{ + ccprints("SoC thermtrip reported, shutting down"); + chipset_force_shutdown(CHIPSET_SHUTDOWN_THERMAL); +} diff --git a/zephyr/projects/skyrim/src/skyrim/alt_charger.c b/zephyr/projects/skyrim/src/skyrim/alt_charger.c new file mode 100644 index 0000000000..4b717901cd --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/alt_charger.c @@ -0,0 +1,31 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> + +#include "charger_chips.h" +#include "common.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "hooks.h" + +LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); + +static void alt_charger_init(void) +{ + int ret; + uint32_t val; + + ret = cros_cbi_get_fw_config(FW_CHARGER, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_CHARGER); + return; + } + + if (val == FW_CHARGER_ISL9538) + CHG_ENABLE_ALTERNATE(0); +} +DECLARE_HOOK(HOOK_INIT, alt_charger_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/skyrim/src/skyrim/fan.c b/zephyr/projects/skyrim/src/skyrim/fan.c new file mode 100644 index 0000000000..70d512bb78 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/fan.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/logging/log.h> + +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "fan.h" +#include "gpio/gpio.h" +#include "hooks.h" + +LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); + +/* + * Skyrim fan support + */ +static void fan_init(void) +{ + int ret; + uint32_t val; + uint32_t board_version; + /* + * Retrieve the fan config. + */ + ret = cros_cbi_get_fw_config(FW_FAN, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN); + return; + } + + ret = cbi_get_board_version(&board_version); + if (ret != EC_SUCCESS) { + LOG_ERR("Error retrieving CBI board version"); + return; + } + + if ((board_version >= 3) && (val != FW_FAN_PRESENT)) { + /* Disable the fan */ + fan_set_count(0); + } +} +DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/skyrim/src/skyrim/form_factor.c b/zephyr/projects/skyrim/src/skyrim/form_factor.c new file mode 100644 index 0000000000..f137c6db31 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/form_factor.c @@ -0,0 +1,37 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> +#include "common.h" +#include "accelgyro.h" +#include "cros_board_info.h" +#include "hooks.h" +#include "motionsense_sensors.h" + +LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); + +/* + * Mainboard orientation support. + */ + +#define ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(lid_rot_ref1)) +#define LID_ACCEL SENSOR_ID(DT_NODELABEL(lid_accel)) + +static void form_factor_init(void) +{ + int ret; + uint32_t val; + /* + * If the board version >=4 + * use ver1 rotation matrix. + */ + ret = cbi_get_board_version(&val); + if (ret == EC_SUCCESS && val >= 4) { + LOG_INF("Switching to ver1 lid"); + motion_sensors[LID_ACCEL].rot_standard_ref = &ALT_MAT; + } +} +DECLARE_HOOK(HOOK_INIT, form_factor_init, HOOK_PRIO_POST_I2C); diff --git a/zephyr/projects/skyrim/src/skyrim/ppc_config.c b/zephyr/projects/skyrim/src/skyrim/ppc_config.c new file mode 100644 index 0000000000..bebc8adcc7 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/ppc_config.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Skyrim board-specific PPC code */ + +#include <zephyr/drivers/gpio.h> + +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/aoz1380_public.h" +#include "usbc_ppc.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * In the AOZ1380 PPC, there are no programmable features. We use + * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 + * current limits. + */ +int board_aoz1380_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int rv = EC_SUCCESS; + + rv = gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(ioex_usb_c0_ilim_3a_en), + (rp == TYPEC_RP_3A0) ? 1 : 0); + + return rv; +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + aoz1380_interrupt(0); + break; + + case GPIO_USB_C1_PPC_INT_ODL: + nx20p348x_interrupt(1); + break; + + default: + break; + } +} diff --git a/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c b/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c new file mode 100644 index 0000000000..6c65e56d9e --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c @@ -0,0 +1,142 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Skyrim board-specific USB-C mux configuration */ + +#include <zephyr/drivers/gpio.h> + +#include "console.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/retimer/anx7483_public.h" +#include "hooks.h" +#include "ioexpander.h" +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * USB C0 (general) and C1 (just ANX DB) use IOEX pins to + * indicate flipped polarity to a protection switch. + */ +static int ioex_set_flip(int port, mux_state_t mux_state) +{ + if (port == 0) { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 0); + } else { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 0); + } + + return EC_SUCCESS; +} + +int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + return anx7483_set_default_tuning(me, mux_state); +} + +int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED; + + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + /* Remove flipped from the state for easier compraisons */ + mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED; + + RETURN_ERROR(anx7483_set_default_tuning(me, mux_state)); + + if (mux_state == USB_PD_MUX_USB_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DP_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && !flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } + + return EC_SUCCESS; +} + +int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + CPRINTSUSB("C1: PS8818 mux using default tuning"); + + /* Once a DP connection is established, we need to set IN_HPD */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1); + else + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0); + + return 0; +} + +static void setup_mux(void) +{ + uint32_t val; + + if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0) + CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG"); + /* Val will have our dts default on error, so continue setup */ + + if (val == FW_IO_DB_PS8811_PS8818) { + CPRINTSUSB("C1: Setting PS8818 mux"); + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1); + } else if (val == FW_IO_DB_NONE_ANX7483) { + CPRINTSUSB("C1: Setting ANX7483 mux"); + } else { + CPRINTSUSB("Unexpected DB_IO board: %d", val); + } +} +DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); diff --git a/zephyr/projects/skyrim/src/stt.c b/zephyr/projects/skyrim/src/stt.c new file mode 100644 index 0000000000..40743fbc68 --- /dev/null +++ b/zephyr/projects/skyrim/src/stt.c @@ -0,0 +1,28 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Support code for STT temperature reporting */ + +#include "chipset.h" +#include "temp_sensor/pct2075.h" +#include "temp_sensor/temp_sensor.h" + +int board_get_soc_temp_mk(int *temp_mk) +{ + if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) + return EC_ERROR_NOT_POWERED; + + return pct2075_get_val_mk(PCT2075_SENSOR_ID(DT_NODELABEL(soc_pct2075)), + temp_mk); +} + +int board_get_ambient_temp_mk(int *temp_mk) +{ + if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) + return EC_ERROR_NOT_POWERED; + + return pct2075_get_val_mk(PCT2075_SENSOR_ID(DT_NODELABEL(amb_pct2075)), + temp_mk); +} diff --git a/zephyr/projects/skyrim/usb_pd_policy.c b/zephyr/projects/skyrim/src/usb_pd_policy.c index 1d6457278a..ec9f873863 100644 --- a/zephyr/projects/skyrim/usb_pd_policy.c +++ b/zephyr/projects/skyrim/src/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/skyrim/usbc_config.c b/zephyr/projects/skyrim/src/usbc_config.c index fe60db2a69..0ca421deca 100644 --- a/zephyr/projects/skyrim/usbc_config.c +++ b/zephyr/projects/skyrim/src/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,11 +17,10 @@ #include "charger.h" #include "driver/bc12/pi3usb9201.h" #include "driver/charger/isl9241.h" -#include "driver/ppc/aoz1380.h" #include "driver/ppc/nx20p348x.h" #include "driver/retimer/anx7483_public.h" #include "driver/retimer/ps8811.h" -#include "driver/retimer/ps8818.h" +#include "driver/retimer/ps8818_public.h" #include "driver/tcpm/nct38xx.h" #include "driver/usb_mux/amd_fp6.h" #include "gpio/gpio_int.h" @@ -31,23 +30,16 @@ #include "usb_mux.h" #include "usb_pd_tcpm.h" #include "usbc_ppc.h" +#include "usbc/usb_muxes.h" -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) /* USB-A ports */ -enum usba_port { - USBA_PORT_A0 = 0, - USBA_PORT_A1, - USBA_PORT_COUNT -}; +enum usba_port { USBA_PORT_A0 = 0, USBA_PORT_A1, USBA_PORT_COUNT }; /* USB-C ports */ -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); static void reset_nct38xx_port(int port); @@ -66,215 +58,34 @@ static void usbc_interrupt_init(void) gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_bc12)); gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_bc12)); - /* TODO: Enable SBU fault interrupts (io expander )*/ + /* Enable SBU fault interrupts */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_sbu_fault)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_sbu_fault)); } DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_POST_I2C); -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - /* Device does not talk I2C */ - .drv = &aoz1380_drv - }, - - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = NX20P3483_ADDR1_FLAGS, - .drv = &nx20p348x_drv - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* - * .init is not necessary here because it has nothing - * to do. Primary mux will handle mux state so .get is - * not needed as well. usb_mux.c can handle the situation - * properly. - */ -static int ioex_set_flip(const struct usb_mux*, mux_state_t, bool *); -struct usb_mux_driver ioex_sbu_mux_driver = { - .set = ioex_set_flip, -}; - -/* - * Since NX3DV221GM is not a i2c device, .i2c_port and - * .i2c_addr_flags are not required here. - */ -struct usb_mux usbc0_sbu_mux = { - .usb_port = USBC_PORT_C0, - .driver = &ioex_sbu_mux_driver, -}; - -struct usb_mux usbc1_sbu_mux = { - .usb_port = USBC_PORT_C1, - .driver = &ioex_sbu_mux_driver, -}; - -int baseboard_anx7483_c0_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - return anx7483_set_default_tuning(me, mux_state); -} - -int baseboard_anx7483_c1_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED; - - /* Remove flipped from the state for easier compraisons */ - mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED; - - RETURN_ERROR(anx7483_set_default_tuning(me, mux_state)); - - if (mux_state == USB_PD_MUX_USB_ENABLED) { - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, - ANX7483_EQ_SETTING_12_5DB)); - } else if (mux_state == USB_PD_MUX_DP_ENABLED) { - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, - ANX7483_EQ_SETTING_12_5DB)); - } else if (mux_state == USB_PD_MUX_DOCK && !flipped) { - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, - ANX7483_EQ_SETTING_12_5DB)); - } else if (mux_state == USB_PD_MUX_DOCK && flipped) { - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, - ANX7483_EQ_SETTING_12_5DB)); - RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, - ANX7483_EQ_SETTING_12_5DB)); - } - - return EC_SUCCESS; -} - -struct usb_mux usbc0_anx7483 = { - .usb_port = USBC_PORT_C0, - .i2c_port = I2C_PORT_TCPC0, - .i2c_addr_flags = ANX7483_I2C_ADDR0_FLAGS, - .driver = &anx7483_usb_retimer_driver, - .board_set = &baseboard_anx7483_c0_mux_set, - .next_mux = &usbc0_sbu_mux, -}; - -__overridable int board_c1_ps8818_mux_set(const struct usb_mux *me, - mux_state_t mux_state) +static void usb_fault_interrupt_init(void) { - CPRINTSUSB("C1: PS8818 mux using default tuning"); - - /* Once a DP connection is established, we need to set IN_HPD */ - if (mux_state & USB_PD_MUX_DP_ENABLED) - ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1); - else - ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0); - - return 0; -} - -struct usb_mux usbc1_ps8818 = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_TCPC1, - .flags = USB_MUX_FLAG_RESETS_IN_G3, - .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, - .driver = &ps8818_usb_retimer_driver, - .board_set = &board_c1_ps8818_mux_set, -}; - -struct usb_mux usbc1_anx7483 = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = ANX7483_I2C_ADDR0_FLAGS, - .driver = &anx7483_usb_retimer_driver, - .board_set = &baseboard_anx7483_c1_mux_set, - .next_mux = &usbc1_sbu_mux, -}; - -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = AMD_FP6_C0_MUX_I2C_ADDR, - .driver = &amd_fp6_usb_mux_driver, - .next_mux = &usbc0_anx7483, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = AMD_FP6_C4_MUX_I2C_ADDR, - .driver = &amd_fp6_usb_mux_driver, - /* .next_mux = filled in by setup_mux based on fw_config */ - } -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* - * USB C0 (general) and C1 (just ANX DB) use IOEX pins to - * indicate flipped polarity to a protection switch. - */ -static int ioex_set_flip(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - /* This driver does not use host command ACKs */ - *ack_required = false; - - if (me->usb_port == USBC_PORT_C0) { - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ioex_set_level(IOEX_USB_C0_SBU_FLIP, 1); - else - ioex_set_level(IOEX_USB_C0_SBU_FLIP, 0); - } else { - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ioex_set_level(IOEX_USB_C1_SBU_FLIP, 1); - else - ioex_set_level(IOEX_USB_C1_SBU_FLIP, 0); - } - - return EC_SUCCESS; + /* Enable USB fault interrupts when we hit S5 */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_hub_fault)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_a0_fault)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_a1_fault)); } +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, usb_fault_interrupt_init, HOOK_PRIO_DEFAULT); -static void setup_mux(void) +static void usb_fault_interrupt_disable(void) { - uint32_t val; - - if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0) - CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG"); - /* Val will have our dts default on error, so continue setup */ - - if (val == FW_IO_DB_PS8811_PS8818) { - CPRINTSUSB("C1: Setting PS8818 mux"); - usb_muxes[USBC_PORT_C1].next_mux = &usbc1_ps8818; - } else if (val == FW_IO_DB_NONE_ANX7483) { - CPRINTSUSB("C1: Setting ANX7483 mux"); - usb_muxes[USBC_PORT_C1].next_mux = &usbc1_anx7483; - } else { - CPRINTSUSB("Unexpected DB_IO board: %d", val); - } + /* Disable USB fault interrupts leaving S5 */ + gpio_disable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_hub_fault)); + gpio_disable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_a0_fault)); + gpio_disable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_a1_fault)); } -DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, usb_fault_interrupt_disable, + HOOK_PRIO_DEFAULT); int board_set_active_charge_port(int port) { - int is_valid_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; int rv; @@ -288,7 +99,7 @@ int board_set_active_charge_port(int port) * ahead and reset it so EN_SNK responds properly. */ if (nct38xx_get_boot_type(i) == - NCT38XX_BOOT_DEAD_BATTERY) { + NCT38XX_BOOT_DEAD_BATTERY) { reset_nct38xx_port(i); pd_set_error_recovery(i); } @@ -337,7 +148,7 @@ int board_set_active_charge_port(int port) * change because we'll brown out. */ if (nct38xx_get_boot_type(port) == - NCT38XX_BOOT_DEAD_BATTERY) { + NCT38XX_BOOT_DEAD_BATTERY) { reset_nct38xx_port(i); pd_set_error_recovery(i); } else { @@ -379,31 +190,42 @@ int board_set_active_charge_port(int port) return EC_SUCCESS; } -/* - * In the AOZ1380 PPC, there are no programmable features. We use - * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 - * current limits. - */ -int board_aoz1380_set_vbus_source_current_limit(int port, - enum tcpc_rp_value rp) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { - int rv = EC_SUCCESS; + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} - rv = ioex_set_level(IOEX_USB_C0_PPC_ILIM_3A_EN, - (rp == TYPEC_RP_3A0) ? 1 : 0); +void sbu_fault_interrupt(enum gpio_signal signal) +{ + int port = signal == IOEX_USB_C1_FAULT_ODL ? 1 : 0; - return rv; + CPRINTSUSB("C%d: SBU fault", port); + pd_handle_overcurrent(port); } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void usb_fault_interrupt(enum gpio_signal signal) { - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); + int out; + + CPRINTSUSB("USB fault(%d), alerting the SoC", signal); + out = gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_usb_hub_fault_q_odl)) && + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(ioex_usb_a0_fault_odl)) && + gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(ioex_usb_a1_fault_db_odl)); + + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_fault_odl), out); } -/* TODO: sbu_fault_interrupt from io expander */ +void usb_pd_soc_interrupt(enum gpio_signal signal) +{ + /* + * This interrupt is unexpected with our use of the SoC mux, so just log + * it as a point of interest. + */ + CPRINTSUSB("SOC PD Interrupt"); +} /* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ #define SKYRIM_AC_PROCHOT_CURRENT_MA 3328 @@ -462,7 +284,6 @@ static void reset_nct38xx_port(int port) gpio_reset_port(ioex_port1); } - void board_reset_pd_mcu(void) { /* Reset TCPC0 */ @@ -481,38 +302,22 @@ uint16_t tcpc_get_alert_status(void) * its reset line active. */ if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_int_odl))) { - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst_l)) != 0) + GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_int_odl))) { + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_usb_c0_tcpc_rst_l)) != 0) status |= PD_STATUS_TCPC_ALERT_0; } if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_int_odl))) { - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_rst_l)) != 0) + GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_int_odl))) { + if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( + gpio_usb_c1_tcpc_rst_l)) != 0) status |= PD_STATUS_TCPC_ALERT_1; } return status; } -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - aoz1380_interrupt(USBC_PORT_C0); - break; - - case GPIO_USB_C1_PPC_INT_ODL: - nx20p348x_interrupt(USBC_PORT_C1); - break; - - default: - break; - } -} - void bc12_interrupt(enum gpio_signal signal) { switch (signal) { diff --git a/zephyr/projects/skyrim/src/winterhold/ppc_config.c b/zephyr/projects/skyrim/src/winterhold/ppc_config.c new file mode 100644 index 0000000000..72ddb6ce6c --- /dev/null +++ b/zephyr/projects/skyrim/src/winterhold/ppc_config.c @@ -0,0 +1,27 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Winterhold board-specific PPC code */ + +#include <zephyr/drivers/gpio.h> + +#include "driver/ppc/nx20p348x.h" +#include "usbc_ppc.h" + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + nx20p348x_interrupt(0); + break; + + case GPIO_USB_C1_PPC_INT_ODL: + nx20p348x_interrupt(1); + break; + + default: + break; + } +} diff --git a/zephyr/projects/skyrim/src/winterhold/usb_mux_config.c b/zephyr/projects/skyrim/src/winterhold/usb_mux_config.c new file mode 100644 index 0000000000..ca7b604d10 --- /dev/null +++ b/zephyr/projects/skyrim/src/winterhold/usb_mux_config.c @@ -0,0 +1,142 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Winterhold board-specific USB-C mux configuration */ + +#include <zephyr/drivers/gpio.h> + +#include "console.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/retimer/anx7483_public.h" +#include "hooks.h" +#include "ioexpander.h" +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * USB C0 (general) and C1 (just ANX DB) use IOEX pins to + * indicate flipped polarity to a protection switch. + */ +static int ioex_set_flip(int port, mux_state_t mux_state) +{ + if (port == 0) { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 0); + } else { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 0); + } + + return EC_SUCCESS; +} + +int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + return anx7483_set_default_tuning(me, mux_state); +} + +int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED; + + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + /* Remove flipped from the state for easier compraisons */ + mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED; + + RETURN_ERROR(anx7483_set_default_tuning(me, mux_state)); + + if (mux_state == USB_PD_MUX_USB_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DP_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && !flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } + + return EC_SUCCESS; +} + +int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + CPRINTSUSB("C1: PS8818 mux using default tuning"); + + /* Once a DP connection is established, we need to set IN_HPD */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1); + else + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0); + + return 0; +} + +static void setup_mux(void) +{ + uint32_t val; + + if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0) + CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG"); + /* Val will have our dts default on error, so continue setup */ + + if (val == FW_IO_DB_PS8811_PS8818) { + CPRINTSUSB("C1: Setting PS8818 mux"); + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1); + } else if (val == FW_IO_DB_NONE_ANX7483) { + CPRINTSUSB("C1: Setting ANX7483 mux"); + } else { + CPRINTSUSB("Unexpected DB_IO board: %d", val); + } +} +DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); diff --git a/zephyr/projects/skyrim/usbc.dts b/zephyr/projects/skyrim/usbc.dts index c7e85ceb5f..8486927e8d 100644 --- a/zephyr/projects/skyrim/usbc.dts +++ b/zephyr/projects/skyrim/usbc.dts @@ -1,56 +1,26 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ - #include <dt-bindings/usb_pd_tcpm.h> - / { usbc { #address-cells = <1>; #size-cells = <0>; - port0@0 { + usbc_port0: port0@0 { compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c0_bc12>; - port = <&i2c_tcpc0>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; - tcpc { - compatible = "nuvoton,nct38xx"; - gpio-dev = <&nct3807_C0>; - port = <&i2c_tcpc0>; - i2c-addr-flags = "NCT38XX_I2C_ADDR1_1_FLAGS"; - tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - }; - chg { - compatible = "intersil,isl9241"; - status = "okay"; - port = <&i2c_charger>; - }; + bc12 = <&bc12_port0>; + tcpc = <&tcpc_port0>; + chg = <&charger>; }; - port1@1 { + usbc_port1: port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c1_bc12>; - port = <&i2c_tcpc1>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; - tcpc { - compatible = "nuvoton,nct38xx"; - gpio-dev = <&nct3807_C1>; - port = <&i2c_tcpc1>; - i2c-addr-flags = "NCT38XX_I2C_ADDR1_1_FLAGS"; - tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; - }; + bc12 = <&bc12_port1>; + tcpc = <&tcpc_port1>; }; }; }; diff --git a/zephyr/projects/skyrim/usbc_config_guybrush.c b/zephyr/projects/skyrim/usbc_config_guybrush.c deleted file mode 100644 index 1d7afcbbb4..0000000000 --- a/zephyr/projects/skyrim/usbc_config_guybrush.c +++ /dev/null @@ -1,611 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Guybrush family-specific USB-C configuration */ - -#include "cros_board_info.h" -#include "battery_fuel_gauge.h" -#include "charge_manager.h" -#include "charge_ramp.h" -#include "charge_state_v2.h" -#include "charge_state.h" -#include "charger.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/charger/isl9241.h" -#include "driver/ppc/aoz1380.h" -#include "driver/ppc/nx20p348x.h" -#include "driver/retimer/anx7491.h" -#include "driver/retimer/ps8811.h" -#include "driver/retimer/ps8818.h" -#include "driver/tcpm/nct38xx.h" -#include "driver/usb_mux/anx7451.h" -#include "driver/usb_mux/amd_fp6.h" -#include "gpio.h" -#include "gpio/gpio_int.h" -#include "hooks.h" -#include "ioexpander.h" -#include "power.h" -#include "usb_mux.h" -#include "usb_pd_tcpm.h" -#include "usbc_ppc.h" - -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -/* USB-A ports */ -enum usba_port { - USBA_PORT_A0 = 0, - USBA_PORT_A1, - USBA_PORT_COUNT -}; - -/* USB-C ports */ -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; -BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); - -static void reset_nct38xx_port(int port); - -static void usbc_interrupt_init(void) -{ - /* Enable PPC interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_ppc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_ppc)); - - /* Enable TCPC interrupts. */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_tcpc)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_tcpc)); - - /* Enable BC 1.2 interrupts */ - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_bc12)); - gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_bc12)); - - /* TODO: Enable SBU fault interrupts (io expander )*/ -} -DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_POST_I2C); - -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - /* Device does not talk I2C */ - .drv = &aoz1380_drv - }, - - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = NX20P3483_ADDR1_FLAGS, - .drv = &nx20p348x_drv - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* - * .init is not necessary here because it has nothing - * to do. Primary mux will handle mux state so .get is - * not needed as well. usb_mux.c can handle the situation - * properly. - */ -static int fsusb42umx_set_mux(const struct usb_mux*, mux_state_t, bool *); -struct usb_mux_driver usbc0_sbu_mux_driver = { - .set = fsusb42umx_set_mux, -}; - -/* - * Since FSUSB42UMX is not a i2c device, .i2c_port and - * .i2c_addr_flags are not required here. - */ -struct usb_mux usbc0_sbu_mux = { - .usb_port = USBC_PORT_C0, - .driver = &usbc0_sbu_mux_driver, -}; - -__overridable int board_c1_ps8818_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - CPRINTSUSB("C1: PS8818 mux using default tuning"); - return 0; -} - -struct usb_mux usbc1_ps8818 = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_TCPC1, - .flags = USB_MUX_FLAG_RESETS_IN_G3, - .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, - .driver = &ps8818_usb_retimer_driver, - .board_set = &board_c1_ps8818_mux_set, -}; - -/* - * ANX7491(A1) and ANX7451(C1) are on the same i2c bus. Both default - * to 0x29 for the USB i2c address. This moves ANX7451(C1) USB i2c - * address to 0x2A. ANX7491(A1) will stay at the default 0x29. - */ -uint16_t board_anx7451_get_usb_i2c_addr(const struct usb_mux *me) -{ - ASSERT(me->usb_port == USBC_PORT_C1); - return 0x2a; -} - -__overridable int board_c1_anx7451_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - CPRINTSUSB("C1: ANX7451 mux using default tuning"); - return 0; -} - -struct usb_mux usbc1_anx7451 = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_TCPC1, - .flags = USB_MUX_FLAG_RESETS_IN_G3, - .i2c_addr_flags = ANX7491_I2C_ADDR3_FLAGS, - .driver = &anx7451_usb_mux_driver, - .board_set = &board_c1_anx7451_mux_set, -}; - -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = AMD_FP6_C0_MUX_I2C_ADDR, - .driver = &amd_fp6_usb_mux_driver, - .next_mux = &usbc0_sbu_mux, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .i2c_port = I2C_PORT_USB_MUX, - .i2c_addr_flags = AMD_FP6_C4_MUX_I2C_ADDR, - .driver = &amd_fp6_usb_mux_driver, - /* .next_mux = filled in by setup_mux based on fw_config */ - } -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == CONFIG_USB_PD_PORT_MAX_COUNT); - -/* - * USB C0 port SBU mux use standalone FSUSB42UMX - * chip and it needs a board specific driver. - * Overall, it will use chained mux framework. - */ -static int fsusb42umx_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - /* This driver does not use host command ACKs */ - *ack_required = false; - - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ioex_set_level(IOEX_USB_C0_SBU_FLIP, 1); - else - ioex_set_level(IOEX_USB_C0_SBU_FLIP, 0); - - return EC_SUCCESS; -} - -static void setup_mux(void) -{ - /* TODO: Fill in C1 mux based on CBI */ - CPRINTSUSB("C1: Setting ANX7451 mux"); - usb_muxes[USBC_PORT_C1].next_mux = &usbc1_anx7451; -} -DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); - -int board_set_active_charge_port(int port) -{ - int is_valid_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); - int i; - int rv; - - if (port == CHARGE_PORT_NONE) { - CPRINTSUSB("Disabling all charger ports"); - - /* Disable all ports. */ - for (i = 0; i < ppc_cnt; i++) { - /* - * If this port had booted in dead battery mode, go - * ahead and reset it so EN_SNK responds properly. - */ - if (nct38xx_get_boot_type(i) == - NCT38XX_BOOT_DEAD_BATTERY) { - reset_nct38xx_port(i); - pd_set_error_recovery(i); - } - - /* - * Do not return early if one fails otherwise we can - * get into a boot loop assertion failure. - */ - if (ppc_vbus_sink_enable(i, 0)) - CPRINTSUSB("Disabling C%d as sink failed.", i); - } - - return EC_SUCCESS; - } else if (!is_valid_port) { - return EC_ERROR_INVAL; - } - - /* - * Check if we can reset any ports in dead battery mode - * - * The NCT3807 may continue to keep EN_SNK low on the dead battery port - * and allow a dangerous level of voltage to pass through to the initial - * charge port (see b/183660105). We must reset the ports if we have - * sufficient battery to do so, which will bring EN_SNK back under - * normal control. - */ - rv = EC_SUCCESS; - for (i = 0; i < board_get_usb_pd_port_count(); i++) { - if (nct38xx_get_boot_type(i) == NCT38XX_BOOT_DEAD_BATTERY) { - CPRINTSUSB("Found dead battery on %d", i); - /* - * If we have battery, get this port reset ASAP. - * This means temporarily rejecting charge manager - * sets to it. - */ - if (pd_is_battery_capable()) { - reset_nct38xx_port(i); - pd_set_error_recovery(i); - - if (port == i) - rv = EC_ERROR_INVAL; - } else if (port != i) { - /* - * If other port is selected and in dead battery - * mode, reset this port. Otherwise, reject - * change because we'll brown out. - */ - if (nct38xx_get_boot_type(port) == - NCT38XX_BOOT_DEAD_BATTERY) { - reset_nct38xx_port(i); - pd_set_error_recovery(i); - } else { - rv = EC_ERROR_INVAL; - } - } - } - } - - if (rv != EC_SUCCESS) - return rv; - - /* Check if the port is sourcing VBUS. */ - if (tcpm_get_src_ctrl(port)) { - CPRINTSUSB("Skip enable C%d", port); - return EC_ERROR_INVAL; - } - - CPRINTSUSB("New charge port: C%d", port); - - /* - * Turn off the other ports' sink path FETs, before enabling the - * requested charge port. - */ - for (i = 0; i < ppc_cnt; i++) { - if (i == port) - continue; - - if (ppc_vbus_sink_enable(i, 0)) - CPRINTSUSB("C%d: sink path disable failed.", i); - } - - /* Enable requested charge port. */ - if (ppc_vbus_sink_enable(port, 1)) { - CPRINTSUSB("C%d: sink path enable failed.", port); - return EC_ERROR_UNKNOWN; - } - - return EC_SUCCESS; -} - -/* - * In the AOZ1380 PPC, there are no programmable features. We use - * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 - * current limits. - */ -int board_aoz1380_set_vbus_source_current_limit(int port, - enum tcpc_rp_value rp) -{ - int rv = EC_SUCCESS; - - rv = ioex_set_level(IOEX_USB_C0_PPC_ILIM_3A_EN, - (rp == TYPEC_RP_3A0) ? 1 : 0); - - return rv; -} - -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) -{ - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); -} - -/* TODO: sbu_fault_interrupt from io expander */ - -/* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ -#define GUYBRUSH_AC_PROCHOT_CURRENT_MA 3328 -static void set_ac_prochot(void) -{ - isl9241_set_ac_prochot(CHARGER_SOLO, GUYBRUSH_AC_PROCHOT_CURRENT_MA); -} -DECLARE_HOOK(HOOK_INIT, set_ac_prochot, HOOK_PRIO_DEFAULT); - -void tcpc_alert_event(enum gpio_signal signal) -{ - int port; - - switch (signal) { - case GPIO_USB_C0_TCPC_INT_ODL: - port = 0; - break; - case GPIO_USB_C1_TCPC_INT_ODL: - port = 1; - break; - default: - return; - } - - schedule_deferred_pd_interrupt(port); -} - -static void reset_nct38xx_port(int port) -{ - const struct gpio_dt_spec *reset_gpio_l; - - /* TODO: Save and restore ioex signals */ - if (port == USBC_PORT_C0) - reset_gpio_l = GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst_l); - else if (port == USBC_PORT_C1) - reset_gpio_l = GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_rst_l); - else - /* Invalid port: do nothing */ - return; - - gpio_pin_set_dt(reset_gpio_l, 0); - msleep(NCT38XX_RESET_HOLD_DELAY_MS); - gpio_pin_set_dt(reset_gpio_l, 1); - nct38xx_reset_notify(port); - if (NCT3807_RESET_POST_DELAY_MS != 0) - msleep(NCT3807_RESET_POST_DELAY_MS); -} - - -void board_reset_pd_mcu(void) -{ - /* Reset TCPC0 */ - reset_nct38xx_port(USBC_PORT_C0); - - /* Reset TCPC1 */ - reset_nct38xx_port(USBC_PORT_C1); -} - -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set and ignore if that TCPC has - * its reset line active. - */ - if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_int_odl))) { - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_tcpc_rst_l)) != 0) - status |= PD_STATUS_TCPC_ALERT_0; - } - - if (!gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_int_odl))) { - if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_tcpc_rst_l)) != 0) - status |= PD_STATUS_TCPC_ALERT_1; - } - - return status; -} - -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - aoz1380_interrupt(USBC_PORT_C0); - break; - - case GPIO_USB_C1_PPC_INT_ODL: - nx20p348x_interrupt(USBC_PORT_C1); - break; - - default: - break; - } -} - -void bc12_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_BC12_INT_ODL: - usb_charger_task_set_event(0, USB_CHG_EVENT_BC12); - break; - - case GPIO_USB_C1_BC12_INT_ODL: - usb_charger_task_set_event(1, USB_CHG_EVENT_BC12); - break; - - default: - break; - } -} - -/** - * Return if VBUS is sagging too low - * - * For legacy BC1.2 charging with CONFIG_CHARGE_RAMP_SW, ramp up input current - * until voltage drops to 4.5V. Don't go lower than this to be kind to the - * charger (see b/67964166). - */ -#define BC12_MIN_VOLTAGE 4500 -int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) -{ - int voltage = 0; - int rv; - - rv = charger_get_vbus_voltage(port, &voltage); - - if (rv) { - CPRINTSUSB("%s rv=%d", __func__, rv); - return 0; - } - - /* - * b/168569046: The ISL9241 sometimes incorrectly reports 0 for unknown - * reason, causing ramp to stop at 0.5A. Workaround this by ignoring 0. - * This partly defeats the point of ramping, but will still catch - * VBUS below 4.5V and above 0V. - */ - if (voltage == 0) { - CPRINTSUSB("%s vbus=0", __func__); - return 0; - } - - if (voltage < BC12_MIN_VOLTAGE) - CPRINTSUSB("%s vbus=%d", __func__, voltage); - - return voltage < BC12_MIN_VOLTAGE; -} - -#define SAFE_RESET_VBUS_DELAY_MS 900 -#define SAFE_RESET_VBUS_MV 5000 -void board_hibernate(void) -{ - int port; - enum ec_error_list ret; - - /* - * If we are charging, then drop the Vbus level down to 5V to ensure - * that we don't get locked out of the 6.8V OVLO for our PPCs in - * dead-battery mode. This is needed when the TCPC/PPC rails go away. - * (b/79218851, b/143778351, b/147007265) - */ - port = charge_manager_get_active_charge_port(); - if (port != CHARGE_PORT_NONE) { - pd_request_source_voltage(port, SAFE_RESET_VBUS_MV); - - /* Give PD task and PPC chip time to get to 5V */ - msleep(SAFE_RESET_VBUS_DELAY_MS); - } - - /* Try to put our battery fuel gauge into sleep mode */ - ret = battery_sleep_fuel_gauge(); - if ((ret != EC_SUCCESS) && (ret != EC_ERROR_UNIMPLEMENTED)) - cprints(CC_SYSTEM, "Failed to send battery sleep command"); -} - -__overridable enum ec_error_list -board_a1_ps8811_retimer_init(const struct usb_mux *me) -{ - return EC_SUCCESS; -} - -static int baseboard_a1_ps8811_retimer_init(const struct usb_mux *me) -{ - int rv; - int tries = 2; - - do { - int val; - - rv = ps8811_i2c_read(me, PS8811_REG_PAGE1, - PS8811_REG1_USB_BEQ_LEVEL, &val); - } while (rv && --tries); - - if (rv) { - CPRINTSUSB("A1: PS8811 retimer not detected!"); - return rv; - } - CPRINTSUSB("A1: PS8811 retimer detected"); - rv = board_a1_ps8811_retimer_init(me); - if (rv) - CPRINTSUSB("A1: Error during PS8811 setup rv:%d", rv); - return rv; -} - -/* - * PS8811 is just a type-A USB retimer, reusing mux structure for - * convenience. - */ -const struct usb_mux usba1_ps8811 = { - .usb_port = USBA_PORT_A1, - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = PS8811_I2C_ADDR_FLAGS3, - .board_init = &baseboard_a1_ps8811_retimer_init, -}; - -__overridable enum ec_error_list -board_a1_anx7491_retimer_init(const struct usb_mux *me) -{ - return EC_SUCCESS; -} - -static int baseboard_a1_anx7491_retimer_init(const struct usb_mux *me) -{ - int rv; - int tries = 2; - - do { - int val; - - rv = i2c_read8(me->i2c_port, me->i2c_addr_flags, 0, &val); - } while (rv && --tries); - if (rv) { - CPRINTSUSB("A1: ANX7491 retimer not detected!"); - return rv; - } - CPRINTSUSB("A1: ANX7491 retimer detected"); - rv = board_a1_anx7491_retimer_init(me); - if (rv) - CPRINTSUSB("A1: Error during ANX7491 setup rv:%d", rv); - return rv; -} - -/* - * ANX7491 is just a type-A USB retimer, reusing mux structure for - * convenience. - */ -const struct usb_mux usba1_anx7491 = { - .usb_port = USBA_PORT_A1, - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = ANX7491_I2C_ADDR0_FLAGS, - .board_init = &baseboard_a1_anx7491_retimer_init, -}; - -void baseboard_a1_retimer_setup(void) -{ - struct usb_mux a1_retimer; - - /* TODO: Support PS8811 retimer through CBI */ - a1_retimer = usba1_anx7491; - a1_retimer.board_init(&a1_retimer); -} -DECLARE_DEFERRED(baseboard_a1_retimer_setup); - -/* TODO: Remove when guybrush is no longer supported */ -#ifdef CONFIG_BOARD_GUYBRUSH -void board_overcurrent_event(int port, int is_overcurrented) -{ - switch (port) { - case USBC_PORT_C0: - case USBC_PORT_C1: - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_c1_fault_odl), - !is_overcurrented); - break; - - default: - break; - } -} -#endif diff --git a/zephyr/projects/skyrim/winterhold.dts b/zephyr/projects/skyrim/winterhold.dts new file mode 100644 index 0000000000..1b2a89999f --- /dev/null +++ b/zephyr/projects/skyrim/winterhold.dts @@ -0,0 +1,169 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <dt-bindings/usbc_mux.h> + +#include "i2c_common.dtsi" + +/ { + named-gpios { + /* Winterhold-specific GPIO customizations */ + }; + + named-temp-sensors { + compatible = "cros-ec,temp-sensors"; + soc-pct2075 { + temp_host_high = <100>; + temp_host_halt = <105>; + temp_host_release_high = <80>; + temp_host_release_halt = <80>; + temp_fan_off = <0>; + temp_fan_max = <70>; + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&soc_pct2075>; + }; + amb-pct2075 { + power-good-pin = <&gpio_pg_pwr_s5>; + sensor = <&amb_pct2075>; + }; + }; + + /* + * Note this is expected to vary per-board, so we keep it in the board + * dts files. + */ + Winterhold-fw-config { + compatible = "cros-ec,cbi-fw-config"; + + form-factor { + enum-name = "FW_FORM_FACTOR"; + start = <0>; + size = <1>; + + ff-clamshell { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FF_CLAMSHELL"; + value = <0>; + }; + ff-convertible { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FF_CONVERTIBLE"; + value = <1>; + default; + }; + }; + io-db { + enum-name = "FW_IO_DB"; + start = <6>; + size = <2>; + + io-db-ps8811-ps8818 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_PS8811_PS8818"; + value = <0>; + }; + io-db-none-anx7483 { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_IO_DB_NONE_ANX7483"; + value = <1>; + default; + }; + }; + + /* + * FW_CONFIG field to enable fan or not. + */ + fan { + enum-name = "FW_FAN"; + start = <10>; + size = <1>; + + no-fan { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_NOT_PRESENT"; + value = <0>; + }; + fan-present { + compatible = "cros-ec,cbi-fw-config-value"; + enum-name = "FW_FAN_PRESENT"; + value = <1>; + /* + * Set as default so that unprovisioned + * configs will run the fan regardless. + */ + default; + }; + }; + }; + + /* Rotation matrices for motion sensors. */ + motionsense-rotation-ref { + compatible = "cros-ec,motionsense-rotation-ref"; + lid_rot_ref: lid-rotation-ref { + mat33 = <0 (-1) 0 + 1 0 0 + 0 0 1>; + }; + + base_rot_ref: base-rotation-ref { + mat33 = <0 1 0 + (-1) 0 0 + 0 0 1>; + }; + }; +}; + +&i2c0_0 { + anx7483_port0: anx7483@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "board_anx7483_c0_mux_set"; + }; + ppc_port0: nx20p348x@71 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x71>; + }; +}; + +&i2c1_0 { + anx7483_port1: anx7483@3e { + compatible = "analogix,anx7483"; + reg = <0x3e>; + board-set = "board_anx7483_c1_mux_set"; + }; + ppc_port1: nx20p348x@71 { + compatible = "nxp,nx20p348x"; + status = "okay"; + reg = <0x71>; + }; + ps8818_port1: ps8818@28 { + compatible = "parade,ps8818"; + reg = <0x28>; + flags = <(USB_MUX_FLAG_RESETS_IN_G3)>; + board-set = "board_c1_ps8818_mux_set"; + }; +}; + +&usbc_port0 { + ppc = <&ppc_port0>; + usb-mux-chain-0 { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port0 &anx7483_port0>; + }; +}; + +&usbc_port1 { + ppc = <&ppc_port1>; + usb-mux-chain-1-anx { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1 &anx7483_port1>; + }; + usb_mux_chain_ps8818_port1: usb-mux-chain-1-ps { + compatible = "cros-ec,usb-mux-chain"; + usb-muxes = <&amd_fp6_port1 &ps8818_port1>; + alternative-chain; + }; +}; diff --git a/zephyr/projects/trogdor/lazor/BUILD.py b/zephyr/projects/trogdor/lazor/BUILD.py index 8e7936f12f..ca1a26bdcf 100644 --- a/zephyr/projects/trogdor/lazor/BUILD.py +++ b/zephyr/projects/trogdor/lazor/BUILD.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/projects/trogdor/lazor/CMakeLists.txt b/zephyr/projects/trogdor/lazor/CMakeLists.txt index 47285c66eb..b6d5024707 100644 --- a/zephyr/projects/trogdor/lazor/CMakeLists.txt +++ b/zephyr/projects/trogdor/lazor/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(lazor) cros_ec_library_include_directories(include) diff --git a/zephyr/projects/trogdor/lazor/adc.dts b/zephyr/projects/trogdor/lazor/adc.dts index 6f0208a1bd..b834001587 100644 --- a/zephyr/projects/trogdor/lazor/adc.dts +++ b/zephyr/projects/trogdor/lazor/adc.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,14 +10,12 @@ compatible = "named-adc-channels"; vbus { - label = "VBUS"; enum-name = "ADC_VBUS"; io-channels = <&adc0 1>; /* Measure VBUS through a 1/10 voltage divider */ mul = <10>; }; amon_bmon { - label = "AMON_BMON"; enum-name = "ADC_AMON_BMON"; io-channels = <&adc0 2>; /* @@ -29,7 +27,6 @@ div = <18>; }; psys { - label = "PSYS"; enum-name = "ADC_PSYS"; io-channels = <&adc0 3>; /* diff --git a/zephyr/projects/trogdor/lazor/battery.dts b/zephyr/projects/trogdor/lazor/battery.dts index 0fbb1bf359..2b17dd4761 100644 --- a/zephyr/projects/trogdor/lazor/battery.dts +++ b/zephyr/projects/trogdor/lazor/battery.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/trogdor/lazor/default_gpio_pinctrl.dts b/zephyr/projects/trogdor/lazor/default_gpio_pinctrl.dts index 64da26a672..1819bdbc3e 100644 --- a/zephyr/projects/trogdor/lazor/default_gpio_pinctrl.dts +++ b/zephyr/projects/trogdor/lazor/default_gpio_pinctrl.dts @@ -1,43 +1,43 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ /* Adds the &alt1_no_lpc_espi setting over the NPCX7 default setting. */ &{/def-io-conf-list} { - pinctrl-0 = <&alt0_gpio_no_spip - &alt0_gpio_no_fpip - &alt1_no_pwrgd - &alt1_no_lpc_espi - &alta_no_peci_en - &altd_npsl_in1_sl - &altd_npsl_in2_sl - &altd_psl_in3_sl - &altd_psl_in4_sl - &alt7_no_ksi0_sl - &alt7_no_ksi1_sl - &alt7_no_ksi2_sl - &alt7_no_ksi3_sl - &alt7_no_ksi4_sl - &alt7_no_ksi5_sl - &alt7_no_ksi6_sl - &alt7_no_ksi7_sl - &alt8_no_kso00_sl - &alt8_no_kso01_sl - &alt8_no_kso02_sl - &alt8_no_kso03_sl - &alt8_no_kso04_sl - &alt8_no_kso05_sl - &alt8_no_kso06_sl - &alt8_no_kso07_sl - &alt9_no_kso08_sl - &alt9_no_kso09_sl - &alt9_no_kso10_sl - &alt9_no_kso11_sl - &alt9_no_kso12_sl - &alt9_no_kso13_sl - &alt9_no_kso14_sl - &alt9_no_kso15_sl - &alta_no_kso16_sl - &alta_no_kso17_sl >; + pinmux = <&alt0_gpio_no_spip + &alt0_gpio_no_fpip + &alt1_no_pwrgd + &alt1_no_lpc_espi + &alta_no_peci_en + &altd_npsl_in1_sl + &altd_npsl_in2_sl + &altd_psl_in3_sl + &altd_psl_in4_sl + &alt7_no_ksi0_sl + &alt7_no_ksi1_sl + &alt7_no_ksi2_sl + &alt7_no_ksi3_sl + &alt7_no_ksi4_sl + &alt7_no_ksi5_sl + &alt7_no_ksi6_sl + &alt7_no_ksi7_sl + &alt8_no_kso00_sl + &alt8_no_kso01_sl + &alt8_no_kso02_sl + &alt8_no_kso03_sl + &alt8_no_kso04_sl + &alt8_no_kso05_sl + &alt8_no_kso06_sl + &alt8_no_kso07_sl + &alt9_no_kso08_sl + &alt9_no_kso09_sl + &alt9_no_kso10_sl + &alt9_no_kso11_sl + &alt9_no_kso12_sl + &alt9_no_kso13_sl + &alt9_no_kso14_sl + &alt9_no_kso15_sl + &alta_no_kso16_sl + &alta_no_kso17_sl >; }; diff --git a/zephyr/projects/trogdor/lazor/display.dts b/zephyr/projects/trogdor/lazor/display.dts index 6f28e7e81a..65d3a2d91b 100644 --- a/zephyr/projects/trogdor/lazor/display.dts +++ b/zephyr/projects/trogdor/lazor/display.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,6 @@ displight { compatible = "cros-ec,displight"; pwms = <&pwm5 0 PWM_HZ(4800) PWM_POLARITY_NORMAL>; - frequency = <4800>; generic-pwm-channel = <1>; }; }; diff --git a/zephyr/projects/trogdor/lazor/gpio.dts b/zephyr/projects/trogdor/lazor/gpio.dts index 3a20dc865f..a047d7e2f2 100644 --- a/zephyr/projects/trogdor/lazor/gpio.dts +++ b/zephyr/projects/trogdor/lazor/gpio.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -67,7 +67,7 @@ enum-name = "GPIO_LID_OPEN"; }; gpio_ap_rst_l: ap_rst_l { - gpios = <&gpioc 1 GPIO_INPUT>; + gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; enum-name = "GPIO_AP_RST_L"; }; gpio_ps_hold: ps_hold { @@ -79,7 +79,7 @@ enum-name = "GPIO_AP_SUSPEND"; }; gpio_deprecated_ap_rst_req: deprecated_ap_rst_req { - gpios = <&gpioc 2 GPIO_INPUT_PULL_DOWN>; + gpios = <&gpioc 2 (GPIO_INPUT_PULL_DOWN | GPIO_VOLTAGE_1P8)>; enum-name = "GPIO_DEPRECATED_AP_RST_REQ"; }; gpio_power_good: power_good { @@ -87,7 +87,7 @@ enum-name = "GPIO_POWER_GOOD"; }; gpio_warm_reset_l: warm_reset_l { - gpios = <&gpiof 4 GPIO_INPUT>; + gpios = <&gpiof 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; enum-name = "GPIO_WARM_RESET_L"; }; ap_ec_spi_cs_l { @@ -219,6 +219,12 @@ arm_x86 { gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; }; + ec-i2c-sensor-scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; gpio_ec_kso_02_inv: ec_kso_02_inv { gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; }; @@ -229,17 +235,6 @@ enable-pins = <&gpio_en_usb_a_5v>; }; - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = < - &lvol_ioc1 /* AP_RST_L */ - &lvol_ioc2 /* DEPRECATED_AP_RST_REQ */ - &lvol_iof4 /* WARM_RESET_L */ - &lvol_iob3 /* EC_I2C_SENSOR_SCL */ - &lvol_iob2 /* EC_I2C_SENSOR_SDA */ - >; - }; - hibernate-wake-pins { compatible = "cros-ec,hibernate-wake-pins"; wakeup-irqs = < diff --git a/zephyr/projects/trogdor/lazor/gpio_led.dts b/zephyr/projects/trogdor/lazor/gpio_led.dts index d85c6dd1df..c8c026506b 100644 --- a/zephyr/projects/trogdor/lazor/gpio_led.dts +++ b/zephyr/projects/trogdor/lazor/gpio_led.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/trogdor/lazor/host_interface_npcx.dts b/zephyr/projects/trogdor/lazor/host_interface_npcx.dts index 9c6a498940..14efa3c6b2 100644 --- a/zephyr/projects/trogdor/lazor/host_interface_npcx.dts +++ b/zephyr/projects/trogdor/lazor/host_interface_npcx.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/trogdor/lazor/i2c.dts b/zephyr/projects/trogdor/lazor/i2c.dts index aedc254105..e19ad224a9 100644 --- a/zephyr/projects/trogdor/lazor/i2c.dts +++ b/zephyr/projects/trogdor/lazor/i2c.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,40 +9,28 @@ i2c_power: power { i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_POWER"; - }; - battery { - i2c-port = <&i2c0_0>; remote-port = <0>; - enum-name = "I2C_PORT_BATTERY"; - }; - virtual-battery { - i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_VIRTUAL_BATTERY"; - }; - i2c_charger: charger { - i2c-port = <&i2c0_0>; - enum-name = "I2C_PORT_CHARGER"; + enum-names = "I2C_PORT_POWER", + "I2C_PORT_BATTERY", + "I2C_PORT_VIRTUAL_BATTERY", + "I2C_PORT_CHARGER"; }; i2c_tcpc0: tcpc0 { i2c-port = <&i2c1_0>; - enum-name = "I2C_PORT_TCPC0"; + enum-names = "I2C_PORT_TCPC0"; }; i2c_tcpc1: tcpc1 { i2c-port = <&i2c2_0>; - enum-name = "I2C_PORT_TCPC1"; + enum-names = "I2C_PORT_TCPC1"; }; i2c_eeprom: eeprom { i2c-port = <&i2c5_0>; - enum-name = "I2C_PORT_EEPROM"; + enum-names = "I2C_PORT_EEPROM"; }; i2c_sensor: sensor { i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_SENSOR"; - }; - accel { - i2c-port = <&i2c7_0>; - enum-name = "I2C_PORT_ACCEL"; + enum-names = "I2C_PORT_SENSOR", + "I2C_PORT_ACCEL"; }; }; @@ -53,6 +41,19 @@ clock-frequency = <I2C_BITRATE_STANDARD>; pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; pinctrl-names = "default"; + + bc12_port0: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c0_bc12>; + }; + + charger: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; }; &i2c_ctrl0 { @@ -64,6 +65,18 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; pinctrl-names = "default"; + + ppc_port0: sn5s330@40 { + compatible = "ti,sn5s330"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port0: ps8xxx@b { + compatible = "parade,ps8xxx"; + status = "okay"; + reg = <0xb>; + }; }; &i2c_ctrl1 { @@ -75,6 +88,18 @@ clock-frequency = <I2C_BITRATE_FAST_PLUS>; pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; pinctrl-names = "default"; + + ppc_port1: sn5s330@40{ + compatible = "ti,sn5s330"; + status = "okay"; + reg = <0x40>; + }; + + tcpc_port1: ps8xxx@b { + compatible = "parade,ps8xxx"; + status = "okay"; + reg = <0xb>; + }; }; &i2c_ctrl2 { @@ -95,6 +120,13 @@ clock-frequency = <I2C_BITRATE_FAST>; pinctrl-0 = <&i2c5_0_sda_scl_gp33_36>; pinctrl-names = "default"; + + bc12_port1: pi3usb9201@5f { + compatible = "pericom,pi3usb9201"; + status = "okay"; + reg = <0x5f>; + irq = <&int_usb_c1_bc12>; + }; }; &i2c_ctrl5 { diff --git a/zephyr/projects/trogdor/lazor/include/sku.h b/zephyr/projects/trogdor/lazor/include/sku.h index 492d1623dd..76825bbba1 100644 --- a/zephyr/projects/trogdor/lazor/include/sku.h +++ b/zephyr/projects/trogdor/lazor/include/sku.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/trogdor/lazor/interrupts.dts b/zephyr/projects/trogdor/lazor/interrupts.dts index da9b5297ef..5c2ed35e90 100644 --- a/zephyr/projects/trogdor/lazor/interrupts.dts +++ b/zephyr/projects/trogdor/lazor/interrupts.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/trogdor/lazor/keyboard.dts b/zephyr/projects/trogdor/lazor/keyboard.dts index 83cd6bced4..b8689b883c 100644 --- a/zephyr/projects/trogdor/lazor/keyboard.dts +++ b/zephyr/projects/trogdor/lazor/keyboard.dts @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,7 +27,6 @@ kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm3 0 PWM_KHZ(10) PWM_POLARITY_NORMAL>; - frequency = <10000>; generic-pwm-channel = <0>; }; }; diff --git a/zephyr/projects/trogdor/lazor/led.dts b/zephyr/projects/trogdor/lazor/led.dts index 3bdf0147d7..4527afd34c 100644 --- a/zephyr/projects/trogdor/lazor/led.dts +++ b/zephyr/projects/trogdor/lazor/led.dts @@ -1,6 +1,6 @@ / { led-colors { - compatible = "cros-ec,led-colors"; + compatible = "cros-ec,led-policy"; power-state-charge { charge-state = "PWR_STATE_CHARGE"; @@ -65,9 +65,8 @@ }; }; - power-state-idle-forced { - charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_FORCE_IDLE"; + power-state-forced-idle { + charge-state = "PWR_STATE_FORCED_IDLE"; /* Blue 2 sec, Amber 2 sec */ color-0 { @@ -80,9 +79,8 @@ }; }; - power-state-idle-default { + power-state-idle { charge-state = "PWR_STATE_IDLE"; - extra-flag = "LED_CHFLAG_DEFAULT"; color-0 { led-color = <&color_blue>; diff --git a/zephyr/projects/trogdor/lazor/motionsense.dts b/zephyr/projects/trogdor/lazor/motionsense.dts index adae7a736b..75fe31b997 100644 --- a/zephyr/projects/trogdor/lazor/motionsense.dts +++ b/zephyr/projects/trogdor/lazor/motionsense.dts @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -26,11 +26,9 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; lid_mutex: lid-mutex { - label = "LID_MUTEX"; }; mutex_bmi160: bmi160-mutex { - label = "BMI160_MUTEX"; }; }; @@ -78,7 +76,7 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { @@ -86,7 +84,6 @@ compatible = "cros-ec,bma255"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3_S5"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -99,11 +96,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -113,7 +108,6 @@ compatible = "cros-ec,bmi160-accel"; status = "okay"; - label = "Base Accel"; active-mask = "SENSOR_ACTIVE_S0_S3_S5"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi160>; @@ -124,11 +118,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; @@ -138,7 +130,6 @@ compatible = "cros-ec,bmi160-gyro"; status = "okay"; - label = "Base Gyro"; active-mask = "SENSOR_ACTIVE_S0_S3_S5"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi160>; @@ -156,7 +147,6 @@ alt_lid_accel { compatible = "cros-ec,kx022"; status = "okay"; - label = "Lid Accel"; active-mask = "SENSOR_ACTIVE_S0_S3_S5"; location = "MOTIONSENSE_LOC_LID"; mutex = <&lid_mutex>; @@ -168,11 +158,9 @@ compatible = "cros-ec,motionsense-sensor-config"; ec-s0 { - label = "SENSOR_CONFIG_EC_S0"; odr = <(10000 | ROUND_UP_FLAG)>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <(10000 | ROUND_UP_FLAG)>; }; }; diff --git a/zephyr/projects/trogdor/lazor/prj.conf b/zephyr/projects/trogdor/lazor/prj.conf index 44affef2ac..358de69d68 100644 --- a/zephyr/projects/trogdor/lazor/prj.conf +++ b/zephyr/projects/trogdor/lazor/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -64,7 +64,6 @@ CONFIG_PLATFORM_EC_CMD_BUTTON=y CONFIG_CROS_KB_RAW_NPCX=y # ADC -CONFIG_PLATFORM_EC_ADC=y CONFIG_ADC=y CONFIG_ADC_SHELL=n @@ -106,6 +105,8 @@ CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y CONFIG_PLATFORM_EC_USB_PD_REV30=n +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y CONFIG_PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751=y diff --git a/zephyr/projects/trogdor/lazor/pwm_led.dts b/zephyr/projects/trogdor/lazor/pwm_led.dts index ee21c60c85..0582966d6a 100644 --- a/zephyr/projects/trogdor/lazor/pwm_led.dts +++ b/zephyr/projects/trogdor/lazor/pwm_led.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,7 +20,6 @@ pwm-led-pins { compatible = "cros-ec,pwm-led-pins"; - pwm-frequency = <324>; color_off: color-off { led-color = "LED_OFF"; diff --git a/zephyr/projects/trogdor/lazor/src/hibernate.c b/zephyr/projects/trogdor/lazor/src/hibernate.c index 5ad97a8c48..388ff1b087 100644 --- a/zephyr/projects/trogdor/lazor/src/hibernate.c +++ b/zephyr/projects/trogdor/lazor/src/hibernate.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,12 +17,12 @@ void board_hibernate(void) * Sensors are unpowered in hibernate. Apply PD to the * interrupt lines such that they don't float. */ - gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL( - gpio_accel_gyro_int_l), - GPIO_DISCONNECTED); - gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL( - gpio_lid_accel_int_l), - GPIO_DISCONNECTED); + gpio_pin_configure_dt( + GPIO_DT_FROM_NODELABEL(gpio_accel_gyro_int_l), + GPIO_DISCONNECTED); + gpio_pin_configure_dt( + GPIO_DT_FROM_NODELABEL(gpio_lid_accel_int_l), + GPIO_DISCONNECTED); } /* diff --git a/zephyr/projects/trogdor/lazor/src/i2c.c b/zephyr/projects/trogdor/lazor/src/i2c.c index 89e576f81a..6d737b410f 100644 --- a/zephyr/projects/trogdor/lazor/src/i2c.c +++ b/zephyr/projects/trogdor/lazor/src/i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/projects/trogdor/lazor/src/power.c b/zephyr/projects/trogdor/lazor/src/power.c index ee4e1b3b8f..96f9bc43c5 100644 --- a/zephyr/projects/trogdor/lazor/src/power.c +++ b/zephyr/projects/trogdor/lazor/src/power.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -51,7 +51,7 @@ static int board_power_handler_init(const struct device *unused) /* Setup a suspend/resume callback */ ap_power_ev_init_callback(&cb, board_power_change, AP_POWER_PRE_INIT | - AP_POWER_SHUTDOWN_COMPLETE); + AP_POWER_SHUTDOWN_COMPLETE); ap_power_ev_add_callback(&cb); return 0; } diff --git a/zephyr/projects/trogdor/lazor/src/sku.c b/zephyr/projects/trogdor/lazor/src/sku.c index dde0549805..1d88437031 100644 --- a/zephyr/projects/trogdor/lazor/src/sku.c +++ b/zephyr/projects/trogdor/lazor/src/sku.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,8 +13,8 @@ #include "system.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) static uint8_t sku_id; diff --git a/zephyr/projects/trogdor/lazor/src/switchcap.c b/zephyr/projects/trogdor/lazor/src/switchcap.c index 6dc7c3fbab..d8205cbcfc 100644 --- a/zephyr/projects/trogdor/lazor/src/switchcap.c +++ b/zephyr/projects/trogdor/lazor/src/switchcap.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -16,8 +16,8 @@ #include "system.h" #include "sku.h" -#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args) +#define CPRINTS(format, args...) cprints(CC_I2C, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_I2C, format, ##args) /* LN9310 switchcap */ const struct ln9310_config_t ln9310_config = { @@ -34,18 +34,16 @@ static void switchcap_init(void) * When the chip in power down mode, it outputs high-Z. * Set pull-down to avoid floating. */ - gpio_pin_configure_dt( - GPIO_DT_FROM_NODELABEL(gpio_da9313_gpio0), - GPIO_INPUT | GPIO_PULL_DOWN); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_da9313_gpio0), + GPIO_INPUT | GPIO_PULL_DOWN); /* * Configure DA9313 enable, push-pull output. Don't set the * level here; otherwise, it will override its value and * shutdown the switchcap when sysjump to RW. */ - gpio_pin_configure_dt( - GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), - GPIO_OUTPUT); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), + GPIO_OUTPUT); } else if (board_has_ln9310()) { CPRINTS("Use switchcap: LN9310"); @@ -71,9 +69,8 @@ static void switchcap_init(void) * (6) GPIO init according to gpio.inc -> push-pull LOW * (7) This function configures it -> open-drain LOW */ - gpio_pin_configure_dt( - GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), - GPIO_OUTPUT | GPIO_OPEN_DRAIN); + gpio_pin_configure_dt(GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), + GPIO_OUTPUT | GPIO_OPEN_DRAIN); /* Only configure the switchcap if not sysjump */ if (!system_jumped_late()) { @@ -83,8 +80,7 @@ static void switchcap_init(void) * configured from standby mode to switching mode. */ gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), - 0); + GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), 0); ln9310_init(); } } else if (board_has_buck_ic()) { @@ -98,18 +94,14 @@ DECLARE_HOOK(HOOK_INIT, switchcap_init, HOOK_PRIO_DEFAULT); void board_set_switchcap_power(int enable) { if (board_has_da9313()) { - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), - enable); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), + enable); } else if (board_has_ln9310()) { - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), - enable); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_switchcap_on), + enable); ln9310_software_enable(enable); } else if (board_has_buck_ic()) { - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_vbob_en), - enable); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_vbob_en), enable); } } @@ -117,18 +109,17 @@ int board_is_switchcap_enabled(void) { if (board_has_da9313() || board_has_ln9310()) return gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_switchcap_on)); + GPIO_DT_FROM_NODELABEL(gpio_switchcap_on)); /* Board has buck ic*/ - return gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_vbob_en)); + return gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_vbob_en)); } int board_is_switchcap_power_good(void) { if (board_has_da9313()) return gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_da9313_gpio0)); + GPIO_DT_FROM_NODELABEL(gpio_da9313_gpio0)); else if (board_has_ln9310()) return ln9310_power_good(); diff --git a/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c b/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c index b94a65005a..8d046826f9 100644 --- a/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c +++ b/zephyr/projects/trogdor/lazor/src/usb_pd_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,8 +13,8 @@ #include "usbc_ppc.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) int pd_check_vconn_swap(int port) { @@ -24,10 +24,10 @@ int pd_check_vconn_swap(int port) static uint8_t vbus_en[CONFIG_USB_PD_PORT_MAX_COUNT]; #if CONFIG_USB_PD_PORT_MAX_COUNT == 1 -static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5}; +static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = { TYPEC_RP_1A5 }; #else -static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5, - TYPEC_RP_1A5}; +static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = { TYPEC_RP_1A5, + TYPEC_RP_1A5 }; #endif static void board_vbus_update_source_current(int port) @@ -108,11 +108,11 @@ __override int svdm_dp_config(int port, uint32_t *payload) * (3) plug a monitor to the port-1 dongle. */ - payload[0] = VDO(USB_SID_DISPLAYPORT, 1, - CMD_DP_CONFIG | VDO_OPOS(opos)); - payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ - 1, /* DPv1.3 signaling */ - 2); /* UFP connected */ + payload[0] = + VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ return 2; }; @@ -175,8 +175,8 @@ __override int svdm_dp_attention(int port, uint32_t *payload) * TODO(waihong): Better to move switching DP mux to * the usb_mux abstraction. */ - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_dp_mux_sel), port == 1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_sel), + port == 1); gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_oe_l), 0); /* Connect the SBU lines in PPC chip. */ @@ -190,8 +190,7 @@ __override int svdm_dp_attention(int port, uint32_t *payload) * because of the board USB-C topology (limited to 2 * lanes DP). */ - usb_mux_set(port, USB_PD_MUX_DOCK, - USB_SWITCH_CONNECT, + usb_mux_set(port, USB_PD_MUX_DOCK, USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); } else { /* Disconnect the DP port selection mux. */ @@ -203,13 +202,11 @@ __override int svdm_dp_attention(int port, uint32_t *payload) ppc_set_sbu(port, 0); /* Disconnect the DP but keep the USB SS lines in TCPC chip. */ - usb_mux_set(port, USB_PD_MUX_USB_ENABLED, - USB_SWITCH_CONNECT, + usb_mux_set(port, USB_PD_MUX_USB_ENABLED, USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); } - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && (irq || lvl)) /* * Wake up the AP. IRQ or level high indicates a DP sink is now * present. @@ -234,8 +231,8 @@ __override int svdm_dp_attention(int port, uint32_t *payload) gpio_pin_set_dt(hpd, 1); /* Set the minimum time delay (2ms) for the next HPD IRQ */ - svdm_hpd_deadline[port] = get_time().val + - HPD_USTREAM_DEBOUNCE_LVL; + svdm_hpd_deadline[port] = + get_time().val + HPD_USTREAM_DEBOUNCE_LVL; } else if (irq & !lvl) { CPRINTF("ERR:HPD:IRQ&LOW\n"); return 0; @@ -256,9 +253,9 @@ __override void svdm_exit_dp_mode(int port) /* Signal AP for the HPD low event */ usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); - gpio_pin_set_dt( - GPIO_DT_FROM_NODELABEL(gpio_dp_hot_plug_det), 0); + USB_PD_MUX_HPD_IRQ_DEASSERTED); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_hot_plug_det), + 0); } } #endif /* CONFIG_USB_PD_ALT_MODE_DFP */ diff --git a/zephyr/projects/trogdor/lazor/src/usbc_config.c b/zephyr/projects/trogdor/lazor/src/usbc_config.c index 59dbeb6fc6..f6bfdfb186 100644 --- a/zephyr/projects/trogdor/lazor/src/usbc_config.c +++ b/zephyr/projects/trogdor/lazor/src/usbc_config.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,8 +27,8 @@ #include "usbc_ocp.h" #include "usbc_ppc.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) int charger_profile_override(struct charge_state_data *curr) { @@ -71,9 +71,9 @@ enum ec_status charger_profile_override_set_param(uint32_t param, static void usba_oc_deferred(void) { /* Use next number after all USB-C ports to indicate the USB-A port */ - board_overcurrent_event(CONFIG_USB_PD_PORT_MAX_COUNT, - !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL( - gpio_usb_a0_oc_odl))); + board_overcurrent_event( + CONFIG_USB_PD_PORT_MAX_COUNT, + !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_a0_oc_odl))); } DECLARE_DEFERRED(usba_oc_deferred); @@ -137,16 +137,22 @@ void tcpc_alert_event(enum gpio_signal signal) * to AP. But the TCPC chip is also needed to know the HPD status; otherwise, * the mux misbehaves. */ -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { +const struct usb_mux_chain usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { { - .usb_port = 0, - .driver = &tcpci_tcpm_usb_mux_driver, - .hpd_update = &ps8xxx_tcpc_update_hpd_status, + .mux = + &(const struct usb_mux){ + .usb_port = 0, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + }, }, { - .usb_port = 1, - .driver = &tcpci_tcpm_usb_mux_driver, - .hpd_update = &ps8xxx_tcpc_update_hpd_status, + .mux = + &(const struct usb_mux){ + .usb_port = 1, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + }, } }; @@ -199,7 +205,7 @@ void board_tcpc_init(void) */ for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port) usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_POST_I2C); @@ -244,8 +250,7 @@ void board_overcurrent_event(int port, int is_overcurrented) int board_set_active_charge_port(int port) { - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; if (!is_real_port && port != CHARGE_PORT_NONE) @@ -273,7 +278,6 @@ int board_set_active_charge_port(int port) return EC_ERROR_INVAL; } - CPRINTS("New charge port: p%d", port); /* @@ -297,23 +301,21 @@ int board_set_active_charge_port(int port) return EC_SUCCESS; } -void board_set_charge_limit(int port, int supplier, int charge_ma, - int max_ma, int charge_mv) +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) { /* * Ignore lower charge ceiling on PD transition if our battery is * critical, as we may brownout. */ - if (supplier == CHARGE_SUPPLIER_PD && - charge_ma < 1500 && + if (supplier == CHARGE_SUPPLIER_PD && charge_ma < 1500 && charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) { CPRINTS("Using max ilim %d", max_ma); charge_ma = max_ma; } - charge_set_input_current_limit(MAX(charge_ma, - CONFIG_CHARGER_INPUT_CURRENT), - charge_mv); + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); } uint16_t tcpc_get_alert_status(void) @@ -322,11 +324,11 @@ uint16_t tcpc_get_alert_status(void) if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_int_odl))) if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l))) + GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l))) status |= PD_STATUS_TCPC_ALERT_0; if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_int_odl))) if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l))) + GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l))) status |= PD_STATUS_TCPC_ALERT_1; return status; diff --git a/zephyr/projects/trogdor/lazor/usbc.dts b/zephyr/projects/trogdor/lazor/usbc.dts index 051efb09e3..7864c2716b 100644 --- a/zephyr/projects/trogdor/lazor/usbc.dts +++ b/zephyr/projects/trogdor/lazor/usbc.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,60 +15,22 @@ compatible = "named-usbc-port"; reg = <0>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c0_bc12>; - port = <&i2c_power>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; + bc12 = <&bc12_port0>; + tcpc = <&tcpc_port0>; - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; + ppc = <&ppc_port0>; - ppc { - compatible = "ti,sn5s330"; - status = "okay"; - port = <&i2c_tcpc0>; - i2c-addr-flags = "SN5S330_ADDR0_FLAGS"; - }; - - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_charger>; - }; + chg = <&charger>; }; port1@1 { compatible = "named-usbc-port"; reg = <1>; - bc12 { - compatible = "pericom,pi3usb9201"; - status = "okay"; - irq = <&int_usb_c1_bc12>; - port = <&i2c_eeprom>; - i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; - }; - - tcpc { - compatible = "parade,ps8xxx"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS"; - }; + bc12 = <&bc12_port1>; + tcpc = <&tcpc_port1>; - ppc { - compatible = "ti,sn5s330"; - status = "okay"; - port = <&i2c_tcpc1>; - i2c-addr-flags = "SN5S330_ADDR0_FLAGS"; - }; + ppc = <&ppc_port1>; }; }; }; diff --git a/zephyr/shim/CMakeLists.txt b/zephyr/shim/CMakeLists.txt index e36101756a..5b8c815ae1 100644 --- a/zephyr/shim/CMakeLists.txt +++ b/zephyr/shim/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/CMakeLists.txt b/zephyr/shim/chip/CMakeLists.txt index 54281508aa..1d58857c11 100644 --- a/zephyr/shim/chip/CMakeLists.txt +++ b/zephyr/shim/chip/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/it8xxx2/CMakeLists.txt b/zephyr/shim/chip/it8xxx2/CMakeLists.txt index 539fd9f029..2a1c9d5909 100644 --- a/zephyr/shim/chip/it8xxx2/CMakeLists.txt +++ b/zephyr/shim/chip/it8xxx2/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/it8xxx2/clock.c b/zephyr/shim/chip/it8xxx2/clock.c index 0e7b7cb39e..14dbc0e7eb 100644 --- a/zephyr/shim/chip/it8xxx2/clock.c +++ b/zephyr/shim/chip/it8xxx2/clock.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,7 +8,6 @@ #include <zephyr/kernel.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> #include <soc/ite_it8xxx2/reg_def_cros.h> #include <zephyr/sys/util.h> @@ -16,21 +15,13 @@ LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR); -#define ECPM_NODE DT_INST(0, ite_it8xxx2_ecpm) -#define HAL_ECPM_REG_BASE_ADDR \ - ((struct ecpm_reg *)DT_REG_ADDR_BY_IDX(ECPM_NODE, 0)) -#define PLLFREQ_MASK 0xf +#define ECPM_NODE DT_INST(0, ite_it8xxx2_ecpm) +#define HAL_ECPM_REG_BASE_ADDR \ + ((struct ecpm_reg *)DT_REG_ADDR_BY_IDX(ECPM_NODE, 0)) +#define PLLFREQ_MASK 0xf -static const int pll_reg_to_freq[8] = { - MHZ(8), - MHZ(16), - MHZ(24), - MHZ(32), - MHZ(48), - MHZ(64), - MHZ(72), - MHZ(96) -}; +static const int pll_reg_to_freq[8] = { MHZ(8), MHZ(16), MHZ(24), MHZ(32), + MHZ(48), MHZ(64), MHZ(72), MHZ(96) }; int clock_get_freq(void) { diff --git a/zephyr/shim/chip/it8xxx2/gpio.c b/zephyr/shim/chip/it8xxx2/gpio.c index 3baf128eab..7106b2a294 100644 --- a/zephyr/shim/chip/it8xxx2/gpio.c +++ b/zephyr/shim/chip/it8xxx2/gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/chip/it8xxx2/include/flash_chip.h b/zephyr/shim/chip/it8xxx2/include/flash_chip.h index 692eaa9db0..00aaba05fd 100644 --- a/zephyr/shim/chip/it8xxx2/include/flash_chip.h +++ b/zephyr/shim/chip/it8xxx2/include/flash_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,25 +9,25 @@ * One page program instruction allows maximum 256 bytes (a page) of data * to be programmed. */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 +#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* Minimum write size */ -#define CONFIG_FLASH_WRITE_SIZE DT_PROP(DT_INST(0, soc_nv_flash), \ - write_block_size) +#define CONFIG_FLASH_WRITE_SIZE \ + DT_PROP(DT_INST(0, soc_nv_flash), write_block_size) /* Erase bank size */ -#define CONFIG_FLASH_ERASE_SIZE DT_PROP(DT_INST(0, soc_nv_flash), \ - erase_block_size) +#define CONFIG_FLASH_ERASE_SIZE \ + DT_PROP(DT_INST(0, soc_nv_flash), erase_block_size) /* Protect bank size */ -#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE +#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE -#define CONFIG_RO_STORAGE_OFF 0x0 -#define CONFIG_RW_STORAGE_OFF 0x0 +#define CONFIG_RO_STORAGE_OFF 0x0 +#define CONFIG_RW_STORAGE_OFF 0x0 /* * The EC uses the one bank of flash to emulate a SPI-like write protect * register with persistent state. */ -#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE -#define CONFIG_FW_PSTATE_OFF (CONFIG_FLASH_SIZE_BYTES / 2 - \ - CONFIG_FW_PSTATE_SIZE) +#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE +#define CONFIG_FW_PSTATE_OFF \ + (CONFIG_RO_STORAGE_OFF + CONFIG_RO_SIZE - CONFIG_FW_PSTATE_SIZE) #endif /* __CROS_EC_FLASH_CHIP_H */ diff --git a/zephyr/shim/chip/it8xxx2/keyboard_raw.c b/zephyr/shim/chip/it8xxx2/keyboard_raw.c index 480d528e41..0a117cda14 100644 --- a/zephyr/shim/chip/it8xxx2/keyboard_raw.c +++ b/zephyr/shim/chip/it8xxx2/keyboard_raw.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,7 +8,7 @@ #include <zephyr/device.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "drivers/cros_kb_raw.h" #include "keyboard_raw.h" diff --git a/zephyr/shim/chip/it8xxx2/power_policy.c b/zephyr/shim/chip/it8xxx2/power_policy.c index 7c2e02e258..c8efb0ca96 100644 --- a/zephyr/shim/chip/it8xxx2/power_policy.c +++ b/zephyr/shim/chip/it8xxx2/power_policy.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ #include <zephyr/pm/pm.h> #include <zephyr/pm/policy.h> #include <soc.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "system.h" @@ -29,8 +29,8 @@ const struct pm_state_info *pm_policy_next_state(uint8_t cpu, int32_t ticks) * To check if given power state is enabled and * could be used. */ - if (pm_policy_state_lock_is_active( - pm_states[i].state, PM_ALL_SUBSTATES)) { + if (pm_policy_state_lock_is_active(pm_states[i].state, + PM_ALL_SUBSTATES)) { continue; } diff --git a/zephyr/shim/chip/it8xxx2/system.c b/zephyr/shim/chip/it8xxx2/system.c index d9dcd7ccfb..e5f9cc5cf0 100644 --- a/zephyr/shim/chip/it8xxx2/system.c +++ b/zephyr/shim/chip/it8xxx2/system.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/chip/mchp/CMakeLists.txt b/zephyr/shim/chip/mchp/CMakeLists.txt index 0948424275..f59a1be2b1 100644 --- a/zephyr/shim/chip/mchp/CMakeLists.txt +++ b/zephyr/shim/chip/mchp/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/mchp/Kconfig.xec b/zephyr/shim/chip/mchp/Kconfig.xec index 3b18b1c192..28a6b3ea3c 100644 --- a/zephyr/shim/chip/mchp/Kconfig.xec +++ b/zephyr/shim/chip/mchp/Kconfig.xec @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/mchp/clock.c b/zephyr/shim/chip/mchp/clock.c index 3bdb6e4f99..6ee4cd931c 100644 --- a/zephyr/shim/chip/mchp/clock.c +++ b/zephyr/shim/chip/mchp/clock.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,16 +9,15 @@ #include <zephyr/kernel.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> #include "clock_chip.h" #include "module_id.h" LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR); -#define PCR_NODE DT_INST(0, microchip_xec_pcr) +#define PCR_NODE DT_INST(0, microchip_xec_pcr) #define HAL_PCR_REG_BASE_ADDR \ - ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(PCR_NODE, 0)) + ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(PCR_NODE, 0)) int clock_get_freq(void) { diff --git a/zephyr/shim/chip/mchp/gpio.c b/zephyr/shim/chip/mchp/gpio.c index 3a16b9639d..7801c6f7cc 100644 --- a/zephyr/shim/chip/mchp/gpio.c +++ b/zephyr/shim/chip/mchp/gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/chip/mchp/include/clock_chip.h b/zephyr/shim/chip/mchp/include/clock_chip.h index c317ccb415..4c14d60ff9 100644 --- a/zephyr/shim/chip/mchp/include/clock_chip.h +++ b/zephyr/shim/chip/mchp/include/clock_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/chip/mchp/include/flash_chip.h b/zephyr/shim/chip/mchp/include/flash_chip.h index b3677fb45c..de8138614c 100644 --- a/zephyr/shim/chip/mchp/include/flash_chip.h +++ b/zephyr/shim/chip/mchp/include/flash_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,10 +11,10 @@ * Similar to W25X40, both only have one status reg */ #define CONFIG_SPI_FLASH_W25X40 /* Internal SPI flash type. */ -#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ -#define CONFIG_FLASH_ERASE_SIZE 0x1000 -#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE +#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ +#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ +#define CONFIG_FLASH_ERASE_SIZE 0x1000 +#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE /* RO image resides at 4KB offset in protected region * The first 4KB in the protected region starting at offset 0 contains @@ -23,7 +23,7 @@ * RW image is never loaded by the Boot-ROM therefore no TAG or Header * is needed. RW starts at offset 0 in RW storage region. */ -#define CONFIG_RO_STORAGE_OFF 0x1000 -#define CONFIG_RW_STORAGE_OFF 0 +#define CONFIG_RO_STORAGE_OFF 0x1000 +#define CONFIG_RW_STORAGE_OFF 0 #endif /* __CROS_EC_FLASH_CHIP_H */ diff --git a/zephyr/shim/chip/mchp/include/system_chip.h b/zephyr/shim/chip/mchp/include/system_chip.h index a62ea4a525..01cd1e7391 100644 --- a/zephyr/shim/chip/mchp/include/system_chip.h +++ b/zephyr/shim/chip/mchp/include/system_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,18 +6,18 @@ #ifndef __CROS_EC_SYSTEM_CHIP_H_ #define __CROS_EC_SYSTEM_CHIP_H_ -#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) -#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) +#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) +#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) #undef IS_BIT_SET -#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) +#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) /******************************************************************************/ /* Optional M4 Registers */ -#define CPU_MPU_CTRL REG32(0xE000ED94) -#define CPU_MPU_RNR REG32(0xE000ED98) -#define CPU_MPU_RBAR REG32(0xE000ED9C) -#define CPU_MPU_RASR REG32(0xE000EDA0) +#define CPU_MPU_CTRL REG32(0xE000ED94) +#define CPU_MPU_RNR REG32(0xE000ED98) +#define CPU_MPU_RBAR REG32(0xE000ED9C) +#define CPU_MPU_RASR REG32(0xE000EDA0) void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, uint32_t size, uint32_t exeAddr); diff --git a/zephyr/shim/chip/mchp/keyboard_raw.c b/zephyr/shim/chip/mchp/keyboard_raw.c index 0b9280aa41..95ad642d12 100644 --- a/zephyr/shim/chip/mchp/keyboard_raw.c +++ b/zephyr/shim/chip/mchp/keyboard_raw.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,7 +8,7 @@ #include <zephyr/device.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "drivers/cros_kb_raw.h" #include "keyboard_raw.h" diff --git a/zephyr/shim/chip/mchp/system.c b/zephyr/shim/chip/mchp/system.c index 25fdfc9897..35ba806533 100644 --- a/zephyr/shim/chip/mchp/system.c +++ b/zephyr/shim/chip/mchp/system.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,8 +11,7 @@ LOG_MODULE_REGISTER(shim_xec_system, LOG_LEVEL_ERR); -#define GET_BBRAM_OFS(node) \ - DT_PROP(DT_PATH(named_bbram_regions, node), offset) +#define GET_BBRAM_OFS(node) DT_PROP(DT_PATH(named_bbram_regions, node), offset) #define GET_BBRAM_SZ(node) DT_PROP(DT_PATH(named_bbram_regions, node), size) /* diff --git a/zephyr/shim/chip/mchp/system_download_from_flash.c b/zephyr/shim/chip/mchp/system_download_from_flash.c index 99026fe822..ced7f4d89c 100644 --- a/zephyr/shim/chip/mchp/system_download_from_flash.c +++ b/zephyr/shim/chip/mchp/system_download_from_flash.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,30 +10,28 @@ #include "system_chip.h" /* Modules Map */ -#define WDT_NODE DT_INST(0, microchip_xec_watchdog) -#define STRUCT_WDT_REG_BASE_ADDR \ - ((struct wdt_regs *)(DT_REG_ADDR(WDT_NODE))) +#define WDT_NODE DT_INST(0, microchip_xec_watchdog) +#define STRUCT_WDT_REG_BASE_ADDR ((struct wdt_regs *)(DT_REG_ADDR(WDT_NODE))) -#define PCR_NODE DT_INST(0, microchip_xec_pcr) +#define PCR_NODE DT_INST(0, microchip_xec_pcr) #define STRUCT_PCR_REG_BASE_ADDR \ - ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(PCR_NODE, 0)) + ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(PCR_NODE, 0)) -#define QSPI_NODE DT_INST(0, microchip_xec_qmspi_ldma) +#define QSPI_NODE DT_INST(0, microchip_xec_qmspi_ldma) #define STRUCT_QSPI_REG_BASE_ADDR \ - ((struct qmspi_regs *)(DT_REG_ADDR(QSPI_NODE))) + ((struct qmspi_regs *)(DT_REG_ADDR(QSPI_NODE))) -#define SPI_READ_111 0x03 -#define SPI_READ_111_FAST 0x0b -#define SPI_READ_112_FAST 0x3b +#define SPI_READ_111 0x03 +#define SPI_READ_111_FAST 0x0b +#define SPI_READ_112_FAST 0x3b -#define QSPI_STATUS_DONE \ - (MCHP_QMSPI_STS_DONE | MCHP_QMSPI_STS_DMA_DONE) +#define QSPI_STATUS_DONE (MCHP_QMSPI_STS_DONE | MCHP_QMSPI_STS_DMA_DONE) -#define QSPI_STATUS_ERR \ - (MCHP_QMSPI_STS_TXB_ERR | MCHP_QMSPI_STS_RXB_ERR | \ +#define QSPI_STATUS_ERR \ + (MCHP_QMSPI_STS_TXB_ERR | MCHP_QMSPI_STS_RXB_ERR | \ MCHP_QMSPI_STS_PROG_ERR | MCHP_QMSPI_STS_LDMA_RX_ERR) -noreturn void __keep __attribute__ ((section(".code_in_sram2"))) +noreturn void __keep __attribute__((section(".code_in_sram2"))) __start_qspi(uint32_t resetVectAddr) { struct pcr_regs *pcr = STRUCT_PCR_REG_BASE_ADDR; @@ -79,7 +77,7 @@ uintptr_t __lfw_sram_start = CONFIG_CROS_EC_RAM_BASE + CONFIG_CROS_EC_RAM_SIZE; typedef void (*START_QSPI_IN_SRAM_FP)(uint32_t); void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, - uint32_t size, uint32_t resetVectAddr) + uint32_t size, uint32_t resetVectAddr) { struct pcr_regs *pcr = STRUCT_PCR_REG_BASE_ADDR; struct qmspi_regs *qspi = STRUCT_QSPI_REG_BASE_ADDR; @@ -102,16 +100,16 @@ void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, qspi->CTRL = BIT(MCHP_QMSPI_C_DESCR_EN_POS); /* Transmit 4 bytes(opcode + 24-bit address) on IO0 */ - qspi->DESCR[0] = (MCHP_QMSPI_C_IFM_1X | MCHP_QMSPI_C_TX_DATA | - MCHP_QMSPI_C_XFR_UNITS_1 | - MCHP_QMSPI_C_XFR_NUNITS(4) | - MCHP_QMSPI_C_NEXT_DESCR(1)); + qspi->DESCR[0] = + (MCHP_QMSPI_C_IFM_1X | MCHP_QMSPI_C_TX_DATA | + MCHP_QMSPI_C_XFR_UNITS_1 | MCHP_QMSPI_C_XFR_NUNITS(4) | + MCHP_QMSPI_C_NEXT_DESCR(1)); /* Transmit 8 clocks with IO0 and IO1 tri-stated */ - qspi->DESCR[1] = (MCHP_QMSPI_C_IFM_2X | MCHP_QMSPI_C_TX_DIS | - MCHP_QMSPI_C_XFR_UNITS_1 | - MCHP_QMSPI_C_XFR_NUNITS(2) | - MCHP_QMSPI_C_NEXT_DESCR(2)); + qspi->DESCR[1] = + (MCHP_QMSPI_C_IFM_2X | MCHP_QMSPI_C_TX_DIS | + MCHP_QMSPI_C_XFR_UNITS_1 | MCHP_QMSPI_C_XFR_NUNITS(2) | + MCHP_QMSPI_C_NEXT_DESCR(2)); /* Read using LDMA RX Chan 0, IFM=2x, Last Descriptor, close */ qspi->DESCR[2] = (MCHP_QMSPI_C_IFM_2X | MCHP_QMSPI_C_TX_DIS | @@ -147,7 +145,7 @@ void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, /* Copy the __start_gdma_in_lpram instructions to LPRAM */ for (i = 0; i < &__flash_lplfw_end - &__flash_lplfw_start; i++) { *((uint32_t *)__lfw_sram_start + i) = - *(&__flash_lplfw_start + i); + *(&__flash_lplfw_start + i); } /* Call into SRAM routine to start QSPI */ diff --git a/zephyr/shim/chip/mchp/system_external_storage.c b/zephyr/shim/chip/mchp/system_external_storage.c index c326a07328..4250b05fe3 100644 --- a/zephyr/shim/chip/mchp/system_external_storage.c +++ b/zephyr/shim/chip/mchp/system_external_storage.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,12 +13,11 @@ #include "system_chip.h" #include "config_chip.h" -#define MCHP_ECRO_WORD 0x4F524345u /* ASCII ECRO */ -#define MCHP_ECRW_WORD 0x57524345u /* ASCII ECRW */ -#define MCHP_PCR_NODE DT_INST(0, microchip_xec_pcr) +#define MCHP_ECRO_WORD 0x4F524345u /* ASCII ECRO */ +#define MCHP_ECRW_WORD 0x57524345u /* ASCII ECRW */ +#define MCHP_PCR_NODE DT_INST(0, microchip_xec_pcr) -#define GET_BBRAM_OFS(node) \ - DT_PROP(DT_PATH(named_bbram_regions, node), offset) +#define GET_BBRAM_OFS(node) DT_PROP(DT_PATH(named_bbram_regions, node), offset) #define GET_BBRAM_SZ(node) DT_PROP(DT_PATH(named_bbram_regions, node), size) static const struct device *const bbram_dev = @@ -49,8 +48,8 @@ void system_jump_to_booter(void) */ switch (system_get_shrspi_image_copy()) { case EC_IMAGE_RW: - flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF + - CONFIG_RW_STORAGE_OFF; + flash_offset = + CONFIG_EC_WRITABLE_STORAGE_OFF + CONFIG_RW_STORAGE_OFF; flash_used = CONFIG_CROS_EC_RW_SIZE; break; case EC_IMAGE_RO: diff --git a/zephyr/shim/chip/npcx/CMakeLists.txt b/zephyr/shim/chip/npcx/CMakeLists.txt index 3019118cf4..79b8cf2a62 100644 --- a/zephyr/shim/chip/npcx/CMakeLists.txt +++ b/zephyr/shim/chip/npcx/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/npcx/Kconfig.npcx b/zephyr/shim/chip/npcx/Kconfig.npcx index b044912ae1..5202d14448 100644 --- a/zephyr/shim/chip/npcx/Kconfig.npcx +++ b/zephyr/shim/chip/npcx/Kconfig.npcx @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -15,4 +15,52 @@ config CROS_SYSTEM_NPCX_PRE_INIT_PRIORITY must be a lower priority than CONFIG_BBRAM_INIT_PRIORITY and must be a higher priority than PLATFORM_EC_SYSTEM_PRE_INIT. +config PLATFORM_EC_CONSOLE_CMD_GPIODBG + bool "Console command: gpiodbg" + depends on SOC_FAMILY_NPCX + help + Enable the "gpiodbg" command. This lists all IO pads used on platform + and turns on/off specific pad's input buffer to observe leakage + current through it. + + Example: + gpiodbg list + + IDX|ON| GPIO | Name + ---+--+------+---------- + 00 |* | io03 | recovery_l + 01 |* | io93 | wp_l + 02 |* | iod2 | ac_present + 03 |* | io00 | power_button_l + 04 |* | io01 | lid_open + 05 |* | io36 | entering_rw + 06 |* | io50 | pch_wake_l + 07 |* | ioc7 | pgood_fan + 08 |* | ioa5 | spi_cs_l + 09 |* | io64 | board_version1 + 10 |* | io65 | board_version2 + 11 |* | io66 | board_version3 + 12 |* | io52 | unused pin + 13 |* | io54 | unused pin + + gpiodbg off 11 + gpiodbg list + + IDX|ON| GPIO | Name + ---+--+------+---------- + 00 |* | io03 | recovery_l + 01 |* | io93 | wp_l + 02 |* | iod2 | ac_present + 03 |* | io00 | power_button_l + 04 |* | io01 | lid_open + 05 |* | io36 | entering_rw + 06 |* | io50 | pch_wake_l + 07 |* | ioc7 | pgood_fan + 08 |* | ioa5 | spi_cs_l + 09 |* | io64 | board_version1 + 10 |* | io65 | board_version2 + 11 | | io66 | board_version3 + 12 |* | io52 | unused pin + 13 |* | io54 | unused pin + endif # PLATFORM_EC diff --git a/zephyr/shim/chip/npcx/clock.c b/zephyr/shim/chip/npcx/clock.c index 4fc9bd12c0..fc483ef775 100644 --- a/zephyr/shim/chip/npcx/clock.c +++ b/zephyr/shim/chip/npcx/clock.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,16 +9,15 @@ #include <zephyr/kernel.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> #include "clock_chip.h" #include "module_id.h" LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR); -#define CDCG_NODE DT_INST(0, nuvoton_npcx_pcc) +#define CDCG_NODE DT_INST(0, nuvoton_npcx_pcc) #define HAL_CDCG_REG_BASE_ADDR \ - ((struct cdcg_reg *)DT_REG_ADDR_BY_IDX(CDCG_NODE, 1)) + ((struct cdcg_reg *)DT_REG_ADDR_BY_IDX(CDCG_NODE, 1)) int clock_get_freq(void) { @@ -63,7 +62,7 @@ void clock_normal(void) struct cdcg_reg *const cdcg_base = HAL_CDCG_REG_BASE_ADDR; cdcg_base->HFCGP = ((FPRED_VAL << 4) | AHB6DIV_VAL); - cdcg_base->HFCBCD = (FIUDIV_VAL << 4); + cdcg_base->HFCBCD = (FIUDIV_VAL << 4); } void clock_enable_module(enum module_id module, int enable) diff --git a/zephyr/shim/chip/npcx/gpio.c b/zephyr/shim/chip/npcx/gpio.c index 3baf128eab..e8bf3dfdf5 100644 --- a/zephyr/shim/chip/npcx/gpio.c +++ b/zephyr/shim/chip/npcx/gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,10 +6,13 @@ #include <zephyr/device.h> #include <zephyr/drivers/gpio.h> #include <zephyr/kernel.h> +#include <zephyr/shell/shell.h> #include <zephyr/logging/log.h> #include "gpio/gpio.h" +#include "soc_gpio.h" +#include "util.h" LOG_MODULE_REGISTER(shim_cros_gpio, LOG_LEVEL_ERR); @@ -53,3 +56,142 @@ int gpio_config_unused_pins(void) return 0; } + +#ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_GPIODBG +/* + * IO information about each GPIO that is configured in the `named_gpios` and + *` unused_pins` device tree nodes. + */ +struct npcx_io_info { + /* A npcx gpio port device */ + const struct device *dev; + /* A npcx gpio port number */ + int port; + /* Bit number of pin within a npcx gpio port */ + gpio_pin_t pin; + /* GPIO net name */ + const char *name; + /* Enable flag of npcx gpio input buffer */ + bool enable; +}; + +#define NAMED_GPIO_INFO(node) \ + { \ + .dev = DEVICE_DT_GET(DT_GPIO_CTLR(node, gpios)), \ + .port = DT_PROP(DT_GPIO_CTLR(node, gpios), index), \ + .pin = DT_GPIO_PIN(node, gpios), \ + .name = DT_NODE_FULL_NAME(node), \ + .enable = true, \ + }, + +#define UNUSED_GPIO_INFO(node, prop, idx) \ + { \ + .dev = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node, prop, idx)), \ + .port = DT_PROP(DT_GPIO_CTLR_BY_IDX(node, prop, idx), index), \ + .pin = DT_GPIO_PIN_BY_IDX(node, prop, idx), \ + .name = "unused pin", \ + .enable = true, \ + }, + +#define NAMED_GPIO_INIT(node) \ + COND_CODE_1(DT_NODE_HAS_PROP(node, gpios), (NAMED_GPIO_INFO(node)), ()) + +static struct npcx_io_info gpio_info[] = { +#if DT_NODE_EXISTS(DT_PATH(named_gpios)) + DT_FOREACH_CHILD(DT_PATH(named_gpios), NAMED_GPIO_INIT) +#endif +#if DT_NODE_EXISTS(DT_PATH(unused_pins)) + DT_FOREACH_PROP_ELEM(DT_PATH(unused_pins), unused_gpios, + UNUSED_GPIO_INFO) +#endif +}; + +static int get_index_from_arg(const struct shell *sh, char **argv, int *index) +{ + char *end_ptr; + int num = strtol(argv[1], &end_ptr, 0); + const int gpio_cnt = ARRAY_SIZE(gpio_info); + + if (*end_ptr != '\0') { + shell_error(sh, "Failed to parse %s", argv[1]); + return -EINVAL; + } + + if (num >= gpio_cnt) { + shell_error(sh, "Index shall be less than %u, was %u", gpio_cnt, + num); + return -EINVAL; + } + + *index = num; + + return 0; +} + +static int cmd_gpio_list_all(const struct shell *sh, size_t argc, char **argv) +{ + ARG_UNUSED(argc); + ARG_UNUSED(argv); + + /* Print header */ + shell_print(sh, "IDX|ON| GPIO | Name"); + shell_print(sh, "---+--+------+----------"); + + /* List all GPIOs in 'named-gpios' and 'unused_pins' DT nodes */ + for (int i = 0; i < ARRAY_SIZE(gpio_info); i++) { + shell_print(sh, "%02d |%s | io%x%x | %s", i, + gpio_info[i].enable ? "*" : " ", gpio_info[i].port, + gpio_info[i].pin, gpio_info[i].name); + } + + return 0; +} + +static int cmd_gpio_turn_on(const struct shell *sh, size_t argc, char **argv) +{ + int index; + int res = get_index_from_arg(sh, argv, &index); + + if (res < 0) { + return res; + } + + /* Turn on GPIO's input buffer by index */ + gpio_info[index].enable = true; + npcx_gpio_enable_io_pads(gpio_info[index].dev, gpio_info[index].pin); + + return 0; +} + +static int cmd_gpio_turn_off(const struct shell *sh, size_t argc, char **argv) +{ + int index; + int res = get_index_from_arg(sh, argv, &index); + + if (res < 0) { + return res; + } + + /* Turn off GPIO's input buffer by index */ + gpio_info[index].enable = false; + npcx_gpio_disable_io_pads(gpio_info[index].dev, gpio_info[index].pin); + + return 0; +} + +SHELL_STATIC_SUBCMD_SET_CREATE( + sub_gpiodbg, + SHELL_CMD_ARG(list, NULL, "List all GPIOs used on platform by index", + cmd_gpio_list_all, 1, 0), + SHELL_CMD_ARG(on, NULL, "<index_in_list> Turn on GPIO's input buffer", + cmd_gpio_turn_on, 2, 0), + SHELL_CMD_ARG(off, NULL, "<index_in_list> Turn off GPIO's input buffer", + cmd_gpio_turn_off, 2, 0), + SHELL_SUBCMD_SET_END /* Array terminated. */ +); + +SHELL_CMD_ARG_REGISTER(gpiodbg, &sub_gpiodbg, + "Commands for power consumption " + "investigation", + NULL, 2, 0); +#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_GPIODBG */ diff --git a/zephyr/shim/chip/npcx/include/clock_chip.h b/zephyr/shim/chip/npcx/include/clock_chip.h index 0c39ed8174..6ecca330b6 100644 --- a/zephyr/shim/chip/npcx/include/clock_chip.h +++ b/zephyr/shim/chip/npcx/include/clock_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/chip/npcx/include/flash_chip.h b/zephyr/shim/chip/npcx/include/flash_chip.h index 1d7a76f1da..362d8b2414 100644 --- a/zephyr/shim/chip/npcx/include/flash_chip.h +++ b/zephyr/shim/chip/npcx/include/flash_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,17 +8,17 @@ #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ -#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ -#define CONFIG_FLASH_ERASE_SIZE 0x10000 -#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE +#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ +#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ +#define CONFIG_FLASH_ERASE_SIZE 0x10000 +#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE /* RO image resides at start of protected region, right after header */ -#define CONFIG_RO_STORAGE_OFF CONFIG_RO_HDR_SIZE +#define CONFIG_RO_STORAGE_OFF CONFIG_RO_HDR_SIZE #define CONFIG_RW_STORAGE_OFF 0 /* Use 4k sector erase for NPCX monitor flash erase operations. */ -#define NPCX_MONITOR_FLASH_ERASE_SIZE 0x1000 +#define NPCX_MONITOR_FLASH_ERASE_SIZE 0x1000 #endif /* __CROS_EC_FLASH_CHIP_H */ diff --git a/zephyr/shim/chip/npcx/include/rom_chip.h b/zephyr/shim/chip/npcx/include/rom_chip.h index aab166e6f1..d59a649c7b 100644 --- a/zephyr/shim/chip/npcx/include/rom_chip.h +++ b/zephyr/shim/chip/npcx/include/rom_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -38,17 +38,17 @@ enum API_RETURN_STATUS_T { }; /* Macro functions of ROM api functions */ -#define ADDR_DOWNLOAD_FROM_FLASH (*(volatile uint32_t *) 0x40) +#define ADDR_DOWNLOAD_FROM_FLASH (*(volatile uint32_t *)0x40) #define download_from_flash(src_offset, dest_addr, size, sign, exe_addr, \ - status) \ - (((download_from_flash_ptr) ADDR_DOWNLOAD_FROM_FLASH) \ - (src_offset, dest_addr, size, sign, exe_addr, status)) + status) \ + (((download_from_flash_ptr)ADDR_DOWNLOAD_FROM_FLASH)( \ + src_offset, dest_addr, size, sign, exe_addr, status)) /* Declarations of ROM api functions */ -typedef void (*download_from_flash_ptr) ( +typedef void (*download_from_flash_ptr)( uint32_t src_offset, /* The offset of the data to be downloaded */ - uint32_t dest_addr, /* The address of the downloaded data in the RAM*/ - uint32_t size, /* Number of bytes to download */ + uint32_t dest_addr, /* The address of the downloaded data in the RAM*/ + uint32_t size, /* Number of bytes to download */ enum API_SIGN_OPTIONS_T sign, /* Need CRC check or not */ uint32_t exe_addr, /* jump to this address after download if not zero */ enum API_RETURN_STATUS_T *status /* Status fo download */ diff --git a/zephyr/shim/chip/npcx/include/system_chip.h b/zephyr/shim/chip/npcx/include/system_chip.h index c77c2a8338..2f59ad4627 100644 --- a/zephyr/shim/chip/npcx/include/system_chip.h +++ b/zephyr/shim/chip/npcx/include/system_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,24 +6,24 @@ #ifndef __CROS_EC_SYSTEM_CHIP_H_ #define __CROS_EC_SYSTEM_CHIP_H_ -#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) -#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) +#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) +#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) /* TODO(b:179900857) Clean this up too */ #undef IS_BIT_SET -#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) +#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) /*****************************************************************************/ /* Memory mapping */ -#define CONFIG_LPRAM_BASE 0x40001400 /* memory address of lpwr ram */ -#define CONFIG_LPRAM_SIZE 0x00000620 /* 1568B low power ram */ +#define CONFIG_LPRAM_BASE 0x40001400 /* memory address of lpwr ram */ +#define CONFIG_LPRAM_SIZE 0x00000620 /* 1568B low power ram */ /******************************************************************************/ /* Optional M4 Registers */ -#define CPU_MPU_CTRL REG32(0xE000ED94) -#define CPU_MPU_RNR REG32(0xE000ED98) -#define CPU_MPU_RBAR REG32(0xE000ED9C) -#define CPU_MPU_RASR REG32(0xE000EDA0) +#define CPU_MPU_CTRL REG32(0xE000ED94) +#define CPU_MPU_RNR REG32(0xE000ED98) +#define CPU_MPU_RBAR REG32(0xE000ED9C) +#define CPU_MPU_RASR REG32(0xE000EDA0) /* * Region assignment. 7 as the highest, a higher index has a higher priority. @@ -35,18 +35,18 @@ * made mutually exclusive. */ enum mpu_region { - REGION_DATA_RAM = 0, /* For internal data RAM */ - REGION_DATA_RAM2 = 1, /* Second region for unaligned size */ - REGION_CODE_RAM = 2, /* For internal code RAM */ - REGION_CODE_RAM2 = 3, /* Second region for unaligned size */ - REGION_STORAGE = 4, /* For mapped internal storage */ - REGION_STORAGE2 = 5, /* Second region for unaligned size */ - REGION_DATA_RAM_TEXT = 6, /* Exempt region of data RAM */ - REGION_CHIP_RESERVED = 7, /* Reserved for use in chip/ */ + REGION_DATA_RAM = 0, /* For internal data RAM */ + REGION_DATA_RAM2 = 1, /* Second region for unaligned size */ + REGION_CODE_RAM = 2, /* For internal code RAM */ + REGION_CODE_RAM2 = 3, /* Second region for unaligned size */ + REGION_STORAGE = 4, /* For mapped internal storage */ + REGION_STORAGE2 = 5, /* Second region for unaligned size */ + REGION_DATA_RAM_TEXT = 6, /* Exempt region of data RAM */ + REGION_CHIP_RESERVED = 7, /* Reserved for use in chip/ */ /* only for chips with MPU supporting 16 regions */ - REGION_UNCACHED_RAM = 8, /* For uncached data RAM */ - REGION_UNCACHED_RAM2 = 9, /* Second region for unaligned size */ - REGION_ROLLBACK = 10, /* For rollback */ + REGION_UNCACHED_RAM = 8, /* For uncached data RAM */ + REGION_UNCACHED_RAM2 = 9, /* Second region for unaligned size */ + REGION_ROLLBACK = 10, /* For rollback */ }; /* diff --git a/zephyr/shim/chip/npcx/keyboard_raw.c b/zephyr/shim/chip/npcx/keyboard_raw.c index 86d6af068b..4d43134482 100644 --- a/zephyr/shim/chip/npcx/keyboard_raw.c +++ b/zephyr/shim/chip/npcx/keyboard_raw.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,7 +10,7 @@ #include <zephyr/logging/log.h> #include <soc.h> #include <soc_gpio.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "drivers/cros_kb_raw.h" #include "keyboard_raw.h" diff --git a/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt b/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt index 661eb86e91..d74881b2d9 100644 --- a/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt +++ b/zephyr/shim/chip/npcx/npcx_monitor/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c index c5ffd40fb5..e3fecc0cbd 100644 --- a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c +++ b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -54,7 +54,7 @@ void sspi_flash_execute_cmd(uint8_t code, uint8_t cts) /* set UMA_CODE */ NPCX_UMA_CODE = code; /* execute UMA flash transaction */ - NPCX_UMA_CTS = cts; + NPCX_UMA_CTS = cts; while (IS_BIT_SET(NPCX_UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) ; } @@ -81,7 +81,7 @@ void sspi_flash_wait_ready(void) sspi_flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_ONLY); do { /* Read status register */ - NPCX_UMA_CTS = MASK_RD_1BYTE; + NPCX_UMA_CTS = MASK_RD_1BYTE; while (IS_BIT_SET(NPCX_UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) ; } while (NPCX_UMA_DB0 & mask); /* Wait for Busy clear */ @@ -113,7 +113,7 @@ void sspi_flash_set_address(uint32_t dest_addr) } void sspi_flash_burst_write(unsigned int dest_addr, unsigned int bytes, - const char *data) + const char *data) { unsigned int i; /* Chip Select down. */ @@ -202,7 +202,7 @@ void sspi_flash_physical_erase(int offset, int size) /* Alignment has been checked in upper layer */ for (; size > 0; size -= NPCX_MONITOR_FLASH_ERASE_SIZE, - offset += NPCX_MONITOR_FLASH_ERASE_SIZE) { + offset += NPCX_MONITOR_FLASH_ERASE_SIZE) { /* Enable write */ sspi_flash_write_enable(); /* Set erase address */ @@ -226,7 +226,7 @@ int sspi_flash_verify(int offset, int size, const char *data) uint8_t cmp_data; ptr_flash = (uint8_t *)(CONFIG_MAPPED_STORAGE_BASE + offset); - ptr_mram = (uint8_t *)data; + ptr_mram = (uint8_t *)data; result = 1; /* Disable tri-state */ @@ -260,12 +260,11 @@ int sspi_flash_get_image_used(const char *fw_base) for (size--; size > 0 && image[size] != 0xea; size--) ; - return size ? size + 1 : 0; /* 0xea byte IS part of the image */ - + return size ? size + 1 : 0; /* 0xea byte IS part of the image */ } /* Entry function of spi upload function */ -uint32_t __attribute__ ((section(".startup_text"))) +uint32_t __attribute__((section(".startup_text"))) sspi_flash_upload(int spi_offset, int spi_size) { /* @@ -320,7 +319,7 @@ sspi_flash_upload(int spi_offset, int spi_size) /* Start to write */ if (image_base != NULL) sspi_flash_physical_write(spi_offset, sz_image, - image_base); + image_base); /* Verify data */ if (sspi_flash_verify(spi_offset, sz_image, image_base)) *flag_upload |= 0x02; diff --git a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h index c5415d94db..80e605eea0 100644 --- a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h +++ b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,11 +7,11 @@ #include <stdint.h> -#define NPCX_MONITOR_UUT_TAG 0xA5075001 -#define NPCX_MONITOR_HEADER_ADDR 0x200C3000 +#define NPCX_MONITOR_UUT_TAG 0xA5075001 +#define NPCX_MONITOR_HEADER_ADDR 0x200C3000 /* Flag to record the progress of programming SPI flash */ -#define SPI_PROGRAMMING_FLAG 0x200C4000 +#define SPI_PROGRAMMING_FLAG 0x200C4000 struct monitor_header_tag { /* offset 0x00: TAG NPCX_MONITOR_TAG */ @@ -23,9 +23,9 @@ struct monitor_header_tag { /* offset 0x0C: The Flash address to be programmed (Absolute address) */ uint32_t dest_addr; /* offset 0x10: Maximum allowable flash clock frequency */ - uint8_t max_clock; + uint8_t max_clock; /* offset 0x11: SPI Flash read mode */ - uint8_t read_mode; + uint8_t read_mode; /* offset 0x12: Reserved */ uint16_t reserved; } __packed; diff --git a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld index 03e38b0609..98892babc6 100644 --- a/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld +++ b/zephyr/shim/chip/npcx/npcx_monitor/npcx_monitor.ld @@ -1,4 +1,4 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. +/* Copyright 2017 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * diff --git a/zephyr/shim/chip/npcx/npcx_monitor/registers.h b/zephyr/shim/chip/npcx/npcx_monitor/registers.h index cc0a6b96fe..85ab3b2389 100644 --- a/zephyr/shim/chip/npcx/npcx_monitor/registers.h +++ b/zephyr/shim/chip/npcx/npcx_monitor/registers.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -21,32 +21,32 @@ #define REG64_ADDR(addr) ((volatile uint64_t *)(addr)) #define REG32_ADDR(addr) ((volatile uint32_t *)(addr)) #define REG16_ADDR(addr) ((volatile uint16_t *)(addr)) -#define REG8_ADDR(addr) ((volatile uint8_t *)(addr)) +#define REG8_ADDR(addr) ((volatile uint8_t *)(addr)) #define REG64(addr) (*REG64_ADDR(addr)) #define REG32(addr) (*REG32_ADDR(addr)) #define REG16(addr) (*REG16_ADDR(addr)) -#define REG8(addr) (*REG8_ADDR(addr)) +#define REG8(addr) (*REG8_ADDR(addr)) /* Standard macros / definitions */ #define GENERIC_MAX(x, y) ((x) > (y) ? (x) : (y)) #define GENERIC_MIN(x, y) ((x) < (y) ? (x) : (y)) #ifndef MAX -#define MAX(a, b) \ - ({ \ - __typeof__(a) temp_a = (a); \ - __typeof__(b) temp_b = (b); \ - \ - GENERIC_MAX(temp_a, temp_b); \ +#define MAX(a, b) \ + ({ \ + __typeof__(a) temp_a = (a); \ + __typeof__(b) temp_b = (b); \ + \ + GENERIC_MAX(temp_a, temp_b); \ }) #endif #ifndef MIN -#define MIN(a, b) \ - ({ \ - __typeof__(a) temp_a = (a); \ - __typeof__(b) temp_b = (b); \ - \ - GENERIC_MIN(temp_a, temp_b); \ +#define MIN(a, b) \ + ({ \ + __typeof__(a) temp_a = (a); \ + __typeof__(b) temp_b = (b); \ + \ + GENERIC_MIN(temp_a, temp_b); \ }) #endif #ifndef NULL @@ -58,32 +58,35 @@ * Macro Functions */ /* Bit functions */ -#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) -#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) -#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) -#define UPDATE_BIT(reg, bit, cond) { if (cond) \ - SET_BIT(reg, bit); \ - else \ - CLEAR_BIT(reg, bit); } +#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) +#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) +#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) +#define UPDATE_BIT(reg, bit, cond) \ + { \ + if (cond) \ + SET_BIT(reg, bit); \ + else \ + CLEAR_BIT(reg, bit); \ + } /* Field functions */ -#define GET_POS_FIELD(pos, size) pos -#define GET_SIZE_FIELD(pos, size) size -#define FIELD_POS(field) GET_POS_##field -#define FIELD_SIZE(field) GET_SIZE_##field +#define GET_POS_FIELD(pos, size) pos +#define GET_SIZE_FIELD(pos, size) size +#define FIELD_POS(field) GET_POS_##field +#define FIELD_SIZE(field) GET_SIZE_##field /* Read field functions */ #define GET_FIELD(reg, field) \ _GET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field)) -#define _GET_FIELD_(reg, f_pos, f_size) (((reg)>>(f_pos)) & ((1<<(f_size))-1)) +#define _GET_FIELD_(reg, f_pos, f_size) \ + (((reg) >> (f_pos)) & ((1 << (f_size)) - 1)) /* Write field functions */ #define SET_FIELD(reg, field, value) \ _SET_FIELD_(reg, FIELD_POS(field), FIELD_SIZE(field), value) -#define _SET_FIELD_(reg, f_pos, f_size, value) \ - ((reg) = ((reg) & (~(((1 << (f_size))-1) << (f_pos)))) \ - | ((value) << (f_pos))) - +#define _SET_FIELD_(reg, f_pos, f_size, value) \ + ((reg) = ((reg) & (~(((1 << (f_size)) - 1) << (f_pos)))) | \ + ((value) << (f_pos))) /* NPCX7 & NPCX9 */ -#define NPCX_DEVALT(n) REG8(NPCX_SCFG_BASE_ADDR + 0x010 + (n)) +#define NPCX_DEVALT(n) REG8(NPCX_SCFG_BASE_ADDR + 0x010 + (n)) /******************************************************************************/ /* @@ -91,270 +94,267 @@ */ /* Modules Map */ -#define NPCX_ESPI_BASE_ADDR 0x4000A000 -#define NPCX_MDC_BASE_ADDR 0x4000C000 -#define NPCX_PMC_BASE_ADDR 0x4000D000 -#define NPCX_SIB_BASE_ADDR 0x4000E000 -#define NPCX_SHI_BASE_ADDR 0x4000F000 -#define NPCX_SHM_BASE_ADDR 0x40010000 -#define NPCX_GDMA_BASE_ADDR 0x40011000 -#define NPCX_FIU_BASE_ADDR 0x40020000 -#define NPCX_KBSCAN_REGS_BASE 0x400A3000 -#define NPCX_WOV_BASE_ADDR 0x400A4000 -#define NPCX_APM_BASE_ADDR 0x400A4800 -#define NPCX_GLUE_REGS_BASE 0x400A5000 -#define NPCX_BBRAM_BASE_ADDR 0x400AF000 -#define NPCX_PS2_BASE_ADDR 0x400B1000 -#define NPCX_HFCG_BASE_ADDR 0x400B5000 -#define NPCX_LFCG_BASE_ADDR 0x400B5100 -#define NPCX_FMUL2_BASE_ADDR 0x400B5200 -#define NPCX_MTC_BASE_ADDR 0x400B7000 -#define NPCX_MSWC_BASE_ADDR 0x400C1000 -#define NPCX_SCFG_BASE_ADDR 0x400C3000 -#define NPCX_KBC_BASE_ADDR 0x400C7000 -#define NPCX_ADC_BASE_ADDR 0x400D1000 -#define NPCX_SPI_BASE_ADDR 0x400D2000 -#define NPCX_PECI_BASE_ADDR 0x400D4000 -#define NPCX_TWD_BASE_ADDR 0x400D8000 +#define NPCX_ESPI_BASE_ADDR 0x4000A000 +#define NPCX_MDC_BASE_ADDR 0x4000C000 +#define NPCX_PMC_BASE_ADDR 0x4000D000 +#define NPCX_SIB_BASE_ADDR 0x4000E000 +#define NPCX_SHI_BASE_ADDR 0x4000F000 +#define NPCX_SHM_BASE_ADDR 0x40010000 +#define NPCX_GDMA_BASE_ADDR 0x40011000 +#define NPCX_FIU_BASE_ADDR 0x40020000 +#define NPCX_KBSCAN_REGS_BASE 0x400A3000 +#define NPCX_WOV_BASE_ADDR 0x400A4000 +#define NPCX_APM_BASE_ADDR 0x400A4800 +#define NPCX_GLUE_REGS_BASE 0x400A5000 +#define NPCX_BBRAM_BASE_ADDR 0x400AF000 +#define NPCX_PS2_BASE_ADDR 0x400B1000 +#define NPCX_HFCG_BASE_ADDR 0x400B5000 +#define NPCX_LFCG_BASE_ADDR 0x400B5100 +#define NPCX_FMUL2_BASE_ADDR 0x400B5200 +#define NPCX_MTC_BASE_ADDR 0x400B7000 +#define NPCX_MSWC_BASE_ADDR 0x400C1000 +#define NPCX_SCFG_BASE_ADDR 0x400C3000 +#define NPCX_KBC_BASE_ADDR 0x400C7000 +#define NPCX_ADC_BASE_ADDR 0x400D1000 +#define NPCX_SPI_BASE_ADDR 0x400D2000 +#define NPCX_PECI_BASE_ADDR 0x400D4000 +#define NPCX_TWD_BASE_ADDR 0x400D8000 /* Multi-Modules Map */ -#define NPCX_PWM_BASE_ADDR(mdl) (0x40080000 + ((mdl) * 0x2000L)) -#define NPCX_GPIO_BASE_ADDR(mdl) (0x40081000 + ((mdl) * 0x2000L)) -#define NPCX_ITIM_BASE_ADDR(mdl) (0x400B0000 + ((mdl) * 0x2000L)) -#define NPCX_MIWU_BASE_ADDR(mdl) (0x400BB000 + ((mdl) * 0x2000L)) -#define NPCX_MFT_BASE_ADDR(mdl) (0x400E1000 + ((mdl) * 0x2000L)) -#define NPCX_PM_CH_BASE_ADDR(mdl) (0x400C9000 + ((mdl) * 0x2000L)) - +#define NPCX_PWM_BASE_ADDR(mdl) (0x40080000 + ((mdl)*0x2000L)) +#define NPCX_GPIO_BASE_ADDR(mdl) (0x40081000 + ((mdl)*0x2000L)) +#define NPCX_ITIM_BASE_ADDR(mdl) (0x400B0000 + ((mdl)*0x2000L)) +#define NPCX_MIWU_BASE_ADDR(mdl) (0x400BB000 + ((mdl)*0x2000L)) +#define NPCX_MFT_BASE_ADDR(mdl) (0x400E1000 + ((mdl)*0x2000L)) +#define NPCX_PM_CH_BASE_ADDR(mdl) (0x400C9000 + ((mdl)*0x2000L)) /******************************************************************************/ /* System Configuration (SCFG) Registers */ -#define NPCX_DEVCNT REG8(NPCX_SCFG_BASE_ADDR + 0x000) -#define NPCX_STRPST REG8(NPCX_SCFG_BASE_ADDR + 0x001) -#define NPCX_RSTCTL REG8(NPCX_SCFG_BASE_ADDR + 0x002) -#define NPCX_DEV_CTL4 REG8(NPCX_SCFG_BASE_ADDR + 0x006) -#define NPCX_LFCGCALCNT REG8(NPCX_SCFG_BASE_ADDR + 0x021) -#define NPCX_PUPD_EN0 REG8(NPCX_SCFG_BASE_ADDR + 0x028) -#define NPCX_PUPD_EN1 REG8(NPCX_SCFG_BASE_ADDR + 0x029) -#define NPCX_SCFG_VER REG8(NPCX_SCFG_BASE_ADDR + 0x02F) - -#define TEST_BKSL REG8(NPCX_SCFG_BASE_ADDR + 0x037) -#define TEST0 REG8(NPCX_SCFG_BASE_ADDR + 0x038) -#define BLKSEL 0 +#define NPCX_DEVCNT REG8(NPCX_SCFG_BASE_ADDR + 0x000) +#define NPCX_STRPST REG8(NPCX_SCFG_BASE_ADDR + 0x001) +#define NPCX_RSTCTL REG8(NPCX_SCFG_BASE_ADDR + 0x002) +#define NPCX_DEV_CTL4 REG8(NPCX_SCFG_BASE_ADDR + 0x006) +#define NPCX_LFCGCALCNT REG8(NPCX_SCFG_BASE_ADDR + 0x021) +#define NPCX_PUPD_EN0 REG8(NPCX_SCFG_BASE_ADDR + 0x028) +#define NPCX_PUPD_EN1 REG8(NPCX_SCFG_BASE_ADDR + 0x029) +#define NPCX_SCFG_VER REG8(NPCX_SCFG_BASE_ADDR + 0x02F) + +#define TEST_BKSL REG8(NPCX_SCFG_BASE_ADDR + 0x037) +#define TEST0 REG8(NPCX_SCFG_BASE_ADDR + 0x038) +#define BLKSEL 0 /* SCFG register fields */ -#define NPCX_DEVCNT_F_SPI_TRIS 6 -#define NPCX_DEVCNT_HIF_TYP_SEL_FIELD FIELD(2, 2) -#define NPCX_DEVCNT_JEN1_HEN 5 -#define NPCX_DEVCNT_JEN0_HEN 4 -#define NPCX_STRPST_TRIST 1 -#define NPCX_STRPST_TEST 2 -#define NPCX_STRPST_JEN1 4 -#define NPCX_STRPST_JEN0 5 -#define NPCX_STRPST_SPI_COMP 7 -#define NPCX_RSTCTL_VCC1_RST_STS 0 -#define NPCX_RSTCTL_DBGRST_STS 1 -#define NPCX_RSTCTL_VCC1_RST_SCRATCH 3 -#define NPCX_RSTCTL_LRESET_PLTRST_MODE 5 -#define NPCX_RSTCTL_HIPRST_MODE 6 -#define NPCX_DEV_CTL4_F_SPI_SLLK 2 -#define NPCX_DEV_CTL4_SPI_SP_SEL 4 -#define NPCX_DEV_CTL4_WP_IF 5 -#define NPCX_DEV_CTL4_VCC1_RST_LK 6 -#define NPCX_DEVPU0_I2C0_0_PUE 0 -#define NPCX_DEVPU0_I2C0_1_PUE 1 -#define NPCX_DEVPU0_I2C1_0_PUE 2 -#define NPCX_DEVPU0_I2C2_0_PUE 4 -#define NPCX_DEVPU0_I2C3_0_PUE 6 -#define NPCX_DEVPU1_F_SPI_PUD_EN 7 +#define NPCX_DEVCNT_F_SPI_TRIS 6 +#define NPCX_DEVCNT_HIF_TYP_SEL_FIELD FIELD(2, 2) +#define NPCX_DEVCNT_JEN1_HEN 5 +#define NPCX_DEVCNT_JEN0_HEN 4 +#define NPCX_STRPST_TRIST 1 +#define NPCX_STRPST_TEST 2 +#define NPCX_STRPST_JEN1 4 +#define NPCX_STRPST_JEN0 5 +#define NPCX_STRPST_SPI_COMP 7 +#define NPCX_RSTCTL_VCC1_RST_STS 0 +#define NPCX_RSTCTL_DBGRST_STS 1 +#define NPCX_RSTCTL_VCC1_RST_SCRATCH 3 +#define NPCX_RSTCTL_LRESET_PLTRST_MODE 5 +#define NPCX_RSTCTL_HIPRST_MODE 6 +#define NPCX_DEV_CTL4_F_SPI_SLLK 2 +#define NPCX_DEV_CTL4_SPI_SP_SEL 4 +#define NPCX_DEV_CTL4_WP_IF 5 +#define NPCX_DEV_CTL4_VCC1_RST_LK 6 +#define NPCX_DEVPU0_I2C0_0_PUE 0 +#define NPCX_DEVPU0_I2C0_1_PUE 1 +#define NPCX_DEVPU0_I2C1_0_PUE 2 +#define NPCX_DEVPU0_I2C2_0_PUE 4 +#define NPCX_DEVPU0_I2C3_0_PUE 6 +#define NPCX_DEVPU1_F_SPI_PUD_EN 7 /* DEVALT */ /* pin-mux for SPI/FIU */ -#define NPCX_DEVALT0_SPIP_SL 0 -#define NPCX_DEVALT0_GPIO_NO_SPIP 3 -#define NPCX_DEVALT0_F_SPI_CS1_2 4 -#define NPCX_DEVALT0_F_SPI_CS1_1 5 -#define NPCX_DEVALT0_F_SPI_QUAD 6 -#define NPCX_DEVALT0_NO_F_SPI 7 +#define NPCX_DEVALT0_SPIP_SL 0 +#define NPCX_DEVALT0_GPIO_NO_SPIP 3 +#define NPCX_DEVALT0_F_SPI_CS1_2 4 +#define NPCX_DEVALT0_F_SPI_CS1_1 5 +#define NPCX_DEVALT0_F_SPI_QUAD 6 +#define NPCX_DEVALT0_NO_F_SPI 7 /******************************************************************************/ /* Flash Interface Unit (FIU) Registers */ -#define NPCX_FIU_CFG REG8(NPCX_FIU_BASE_ADDR + 0x000) -#define NPCX_BURST_CFG REG8(NPCX_FIU_BASE_ADDR + 0x001) -#define NPCX_RESP_CFG REG8(NPCX_FIU_BASE_ADDR + 0x002) -#define NPCX_SPI_FL_CFG REG8(NPCX_FIU_BASE_ADDR + 0x014) -#define NPCX_UMA_CODE REG8(NPCX_FIU_BASE_ADDR + 0x016) -#define NPCX_UMA_AB0 REG8(NPCX_FIU_BASE_ADDR + 0x017) -#define NPCX_UMA_AB1 REG8(NPCX_FIU_BASE_ADDR + 0x018) -#define NPCX_UMA_AB2 REG8(NPCX_FIU_BASE_ADDR + 0x019) -#define NPCX_UMA_DB0 REG8(NPCX_FIU_BASE_ADDR + 0x01A) -#define NPCX_UMA_DB1 REG8(NPCX_FIU_BASE_ADDR + 0x01B) -#define NPCX_UMA_DB2 REG8(NPCX_FIU_BASE_ADDR + 0x01C) -#define NPCX_UMA_DB3 REG8(NPCX_FIU_BASE_ADDR + 0x01D) -#define NPCX_UMA_CTS REG8(NPCX_FIU_BASE_ADDR + 0x01E) -#define NPCX_UMA_ECTS REG8(NPCX_FIU_BASE_ADDR + 0x01F) -#define NPCX_UMA_DB0_3 REG32(NPCX_FIU_BASE_ADDR + 0x020) -#define NPCX_FIU_RD_CMD REG8(NPCX_FIU_BASE_ADDR + 0x030) -#define NPCX_FIU_DMM_CYC REG8(NPCX_FIU_BASE_ADDR + 0x032) -#define NPCX_FIU_EXT_CFG REG8(NPCX_FIU_BASE_ADDR + 0x033) -#define NPCX_FIU_UMA_AB0_3 REG32(NPCX_FIU_BASE_ADDR + 0x034) +#define NPCX_FIU_CFG REG8(NPCX_FIU_BASE_ADDR + 0x000) +#define NPCX_BURST_CFG REG8(NPCX_FIU_BASE_ADDR + 0x001) +#define NPCX_RESP_CFG REG8(NPCX_FIU_BASE_ADDR + 0x002) +#define NPCX_SPI_FL_CFG REG8(NPCX_FIU_BASE_ADDR + 0x014) +#define NPCX_UMA_CODE REG8(NPCX_FIU_BASE_ADDR + 0x016) +#define NPCX_UMA_AB0 REG8(NPCX_FIU_BASE_ADDR + 0x017) +#define NPCX_UMA_AB1 REG8(NPCX_FIU_BASE_ADDR + 0x018) +#define NPCX_UMA_AB2 REG8(NPCX_FIU_BASE_ADDR + 0x019) +#define NPCX_UMA_DB0 REG8(NPCX_FIU_BASE_ADDR + 0x01A) +#define NPCX_UMA_DB1 REG8(NPCX_FIU_BASE_ADDR + 0x01B) +#define NPCX_UMA_DB2 REG8(NPCX_FIU_BASE_ADDR + 0x01C) +#define NPCX_UMA_DB3 REG8(NPCX_FIU_BASE_ADDR + 0x01D) +#define NPCX_UMA_CTS REG8(NPCX_FIU_BASE_ADDR + 0x01E) +#define NPCX_UMA_ECTS REG8(NPCX_FIU_BASE_ADDR + 0x01F) +#define NPCX_UMA_DB0_3 REG32(NPCX_FIU_BASE_ADDR + 0x020) +#define NPCX_FIU_RD_CMD REG8(NPCX_FIU_BASE_ADDR + 0x030) +#define NPCX_FIU_DMM_CYC REG8(NPCX_FIU_BASE_ADDR + 0x032) +#define NPCX_FIU_EXT_CFG REG8(NPCX_FIU_BASE_ADDR + 0x033) +#define NPCX_FIU_UMA_AB0_3 REG32(NPCX_FIU_BASE_ADDR + 0x034) /* FIU register fields */ -#define NPCX_RESP_CFG_IAD_EN 0 -#define NPCX_RESP_CFG_DEV_SIZE_EX 2 -#define NPCX_UMA_CTS_A_SIZE 3 -#define NPCX_UMA_CTS_C_SIZE 4 -#define NPCX_UMA_CTS_RD_WR 5 -#define NPCX_UMA_CTS_DEV_NUM 6 -#define NPCX_UMA_CTS_EXEC_DONE 7 -#define NPCX_UMA_ECTS_SW_CS0 0 -#define NPCX_UMA_ECTS_SW_CS1 1 -#define NPCX_UMA_ECTS_SEC_CS 2 -#define NPCX_UMA_ECTS_UMA_LOCK 3 +#define NPCX_RESP_CFG_IAD_EN 0 +#define NPCX_RESP_CFG_DEV_SIZE_EX 2 +#define NPCX_UMA_CTS_A_SIZE 3 +#define NPCX_UMA_CTS_C_SIZE 4 +#define NPCX_UMA_CTS_RD_WR 5 +#define NPCX_UMA_CTS_DEV_NUM 6 +#define NPCX_UMA_CTS_EXEC_DONE 7 +#define NPCX_UMA_ECTS_SW_CS0 0 +#define NPCX_UMA_ECTS_SW_CS1 1 +#define NPCX_UMA_ECTS_SEC_CS 2 +#define NPCX_UMA_ECTS_UMA_LOCK 3 /******************************************************************************/ /* KBC Registers */ -#define NPCX_HICTRL REG8(NPCX_KBC_BASE_ADDR + 0x000) -#define NPCX_HIIRQC REG8(NPCX_KBC_BASE_ADDR + 0x002) -#define NPCX_HIKMST REG8(NPCX_KBC_BASE_ADDR + 0x004) -#define NPCX_HIKDO REG8(NPCX_KBC_BASE_ADDR + 0x006) -#define NPCX_HIMDO REG8(NPCX_KBC_BASE_ADDR + 0x008) -#define NPCX_KBCVER REG8(NPCX_KBC_BASE_ADDR + 0x009) -#define NPCX_HIKMDI REG8(NPCX_KBC_BASE_ADDR + 0x00A) -#define NPCX_SHIKMDI REG8(NPCX_KBC_BASE_ADDR + 0x00B) +#define NPCX_HICTRL REG8(NPCX_KBC_BASE_ADDR + 0x000) +#define NPCX_HIIRQC REG8(NPCX_KBC_BASE_ADDR + 0x002) +#define NPCX_HIKMST REG8(NPCX_KBC_BASE_ADDR + 0x004) +#define NPCX_HIKDO REG8(NPCX_KBC_BASE_ADDR + 0x006) +#define NPCX_HIMDO REG8(NPCX_KBC_BASE_ADDR + 0x008) +#define NPCX_KBCVER REG8(NPCX_KBC_BASE_ADDR + 0x009) +#define NPCX_HIKMDI REG8(NPCX_KBC_BASE_ADDR + 0x00A) +#define NPCX_SHIKMDI REG8(NPCX_KBC_BASE_ADDR + 0x00B) /* KBC register field */ -#define NPCX_HICTRL_OBFKIE 0 /* Automatic Serial IRQ1 for KBC */ -#define NPCX_HICTRL_OBFMIE 1 /* Automatic Serial IRQ12 for Mouse*/ -#define NPCX_HICTRL_OBECIE 2 /* KBC OBE interrupt enable */ -#define NPCX_HICTRL_IBFCIE 3 /* KBC IBF interrupt enable */ -#define NPCX_HICTRL_PMIHIE 4 /* Automatic Serial IRQ11 for PMC1 */ -#define NPCX_HICTRL_PMIOCIE 5 /* PMC1 OBE interrupt enable */ -#define NPCX_HICTRL_PMICIE 6 /* PMC1 IBF interrupt enable */ -#define NPCX_HICTRL_FW_OBF 7 /* Firmware control over OBF */ +#define NPCX_HICTRL_OBFKIE 0 /* Automatic Serial IRQ1 for KBC */ +#define NPCX_HICTRL_OBFMIE 1 /* Automatic Serial IRQ12 for Mouse*/ +#define NPCX_HICTRL_OBECIE 2 /* KBC OBE interrupt enable */ +#define NPCX_HICTRL_IBFCIE 3 /* KBC IBF interrupt enable */ +#define NPCX_HICTRL_PMIHIE 4 /* Automatic Serial IRQ11 for PMC1 */ +#define NPCX_HICTRL_PMIOCIE 5 /* PMC1 OBE interrupt enable */ +#define NPCX_HICTRL_PMICIE 6 /* PMC1 IBF interrupt enable */ +#define NPCX_HICTRL_FW_OBF 7 /* Firmware control over OBF */ -#define NPCX_HIKMST_OBF 0 /* KB output buffer is full */ +#define NPCX_HIKMST_OBF 0 /* KB output buffer is full */ /******************************************************************************/ /* Timer Watch Dog (TWD) Registers */ -#define NPCX_TWCFG REG8(NPCX_TWD_BASE_ADDR + 0x000) -#define NPCX_TWCP REG8(NPCX_TWD_BASE_ADDR + 0x002) -#define NPCX_TWDT0 REG16(NPCX_TWD_BASE_ADDR + 0x004) -#define NPCX_T0CSR REG8(NPCX_TWD_BASE_ADDR + 0x006) -#define NPCX_WDCNT REG8(NPCX_TWD_BASE_ADDR + 0x008) -#define NPCX_WDSDM REG8(NPCX_TWD_BASE_ADDR + 0x00A) -#define NPCX_TWMT0 REG16(NPCX_TWD_BASE_ADDR + 0x00C) -#define NPCX_TWMWD REG8(NPCX_TWD_BASE_ADDR + 0x00E) -#define NPCX_WDCP REG8(NPCX_TWD_BASE_ADDR + 0x010) +#define NPCX_TWCFG REG8(NPCX_TWD_BASE_ADDR + 0x000) +#define NPCX_TWCP REG8(NPCX_TWD_BASE_ADDR + 0x002) +#define NPCX_TWDT0 REG16(NPCX_TWD_BASE_ADDR + 0x004) +#define NPCX_T0CSR REG8(NPCX_TWD_BASE_ADDR + 0x006) +#define NPCX_WDCNT REG8(NPCX_TWD_BASE_ADDR + 0x008) +#define NPCX_WDSDM REG8(NPCX_TWD_BASE_ADDR + 0x00A) +#define NPCX_TWMT0 REG16(NPCX_TWD_BASE_ADDR + 0x00C) +#define NPCX_TWMWD REG8(NPCX_TWD_BASE_ADDR + 0x00E) +#define NPCX_WDCP REG8(NPCX_TWD_BASE_ADDR + 0x010) /* TWD register fields */ -#define NPCX_TWCFG_LTWCFG 0 -#define NPCX_TWCFG_LTWCP 1 -#define NPCX_TWCFG_LTWDT0 2 -#define NPCX_TWCFG_LWDCNT 3 -#define NPCX_TWCFG_WDCT0I 4 -#define NPCX_TWCFG_WDSDME 5 -#define NPCX_TWCFG_WDRST_MODE 6 -#define NPCX_TWCFG_WDC2POR 7 -#define NPCX_T0CSR_RST 0 -#define NPCX_T0CSR_TC 1 -#define NPCX_T0CSR_WDLTD 3 -#define NPCX_T0CSR_WDRST_STS 4 -#define NPCX_T0CSR_WD_RUN 5 -#define NPCX_T0CSR_TESDIS 7 +#define NPCX_TWCFG_LTWCFG 0 +#define NPCX_TWCFG_LTWCP 1 +#define NPCX_TWCFG_LTWDT0 2 +#define NPCX_TWCFG_LWDCNT 3 +#define NPCX_TWCFG_WDCT0I 4 +#define NPCX_TWCFG_WDSDME 5 +#define NPCX_TWCFG_WDRST_MODE 6 +#define NPCX_TWCFG_WDC2POR 7 +#define NPCX_T0CSR_RST 0 +#define NPCX_T0CSR_TC 1 +#define NPCX_T0CSR_WDLTD 3 +#define NPCX_T0CSR_WDRST_STS 4 +#define NPCX_T0CSR_WD_RUN 5 +#define NPCX_T0CSR_TESDIS 7 /******************************************************************************/ /* SPI Register */ -#define NPCX_SPI_DATA REG16(NPCX_SPI_BASE_ADDR + 0x00) -#define NPCX_SPI_CTL1 REG16(NPCX_SPI_BASE_ADDR + 0x02) -#define NPCX_SPI_STAT REG8(NPCX_SPI_BASE_ADDR + 0x04) +#define NPCX_SPI_DATA REG16(NPCX_SPI_BASE_ADDR + 0x00) +#define NPCX_SPI_CTL1 REG16(NPCX_SPI_BASE_ADDR + 0x02) +#define NPCX_SPI_STAT REG8(NPCX_SPI_BASE_ADDR + 0x04) /* SPI register fields */ -#define NPCX_SPI_CTL1_SPIEN 0 -#define NPCX_SPI_CTL1_SNM 1 -#define NPCX_SPI_CTL1_MOD 2 -#define NPCX_SPI_CTL1_EIR 5 -#define NPCX_SPI_CTL1_EIW 6 -#define NPCX_SPI_CTL1_SCM 7 -#define NPCX_SPI_CTL1_SCIDL 8 -#define NPCX_SPI_CTL1_SCDV 9 -#define NPCX_SPI_STAT_BSY 0 -#define NPCX_SPI_STAT_RBF 1 +#define NPCX_SPI_CTL1_SPIEN 0 +#define NPCX_SPI_CTL1_SNM 1 +#define NPCX_SPI_CTL1_MOD 2 +#define NPCX_SPI_CTL1_EIR 5 +#define NPCX_SPI_CTL1_EIW 6 +#define NPCX_SPI_CTL1_SCM 7 +#define NPCX_SPI_CTL1_SCIDL 8 +#define NPCX_SPI_CTL1_SCDV 9 +#define NPCX_SPI_STAT_BSY 0 +#define NPCX_SPI_STAT_RBF 1 /******************************************************************************/ /* Flash Utiltiy definition */ /* * Flash commands for the W25Q16CV SPI flash */ -#define CMD_READ_ID 0x9F -#define CMD_READ_MAN_DEV_ID 0x90 -#define CMD_WRITE_EN 0x06 -#define CMD_WRITE_STATUS 0x50 -#define CMD_READ_STATUS_REG 0x05 -#define CMD_READ_STATUS_REG2 0x35 -#define CMD_WRITE_STATUS_REG 0x01 -#define CMD_FLASH_PROGRAM 0x02 -#define CMD_SECTOR_ERASE 0x20 -#define CMD_BLOCK_32K_ERASE 0x52 -#define CMD_BLOCK_64K_ERASE 0xd8 -#define CMD_PROGRAM_UINT_SIZE 0x08 -#define CMD_PAGE_SIZE 0x00 -#define CMD_READ_ID_TYPE 0x47 -#define CMD_FAST_READ 0x0B +#define CMD_READ_ID 0x9F +#define CMD_READ_MAN_DEV_ID 0x90 +#define CMD_WRITE_EN 0x06 +#define CMD_WRITE_STATUS 0x50 +#define CMD_READ_STATUS_REG 0x05 +#define CMD_READ_STATUS_REG2 0x35 +#define CMD_WRITE_STATUS_REG 0x01 +#define CMD_FLASH_PROGRAM 0x02 +#define CMD_SECTOR_ERASE 0x20 +#define CMD_BLOCK_32K_ERASE 0x52 +#define CMD_BLOCK_64K_ERASE 0xd8 +#define CMD_PROGRAM_UINT_SIZE 0x08 +#define CMD_PAGE_SIZE 0x00 +#define CMD_READ_ID_TYPE 0x47 +#define CMD_FAST_READ 0x0B /* * Status registers for the W25Q16CV SPI flash */ -#define SPI_FLASH_SR2_SUS BIT(7) -#define SPI_FLASH_SR2_CMP BIT(6) -#define SPI_FLASH_SR2_LB3 BIT(5) -#define SPI_FLASH_SR2_LB2 BIT(4) -#define SPI_FLASH_SR2_LB1 BIT(3) -#define SPI_FLASH_SR2_QE BIT(1) -#define SPI_FLASH_SR2_SRP1 BIT(0) -#define SPI_FLASH_SR1_SRP0 BIT(7) -#define SPI_FLASH_SR1_SEC BIT(6) -#define SPI_FLASH_SR1_TB BIT(5) -#define SPI_FLASH_SR1_BP2 BIT(4) -#define SPI_FLASH_SR1_BP1 BIT(3) -#define SPI_FLASH_SR1_BP0 BIT(2) -#define SPI_FLASH_SR1_WEL BIT(1) -#define SPI_FLASH_SR1_BUSY BIT(0) - +#define SPI_FLASH_SR2_SUS BIT(7) +#define SPI_FLASH_SR2_CMP BIT(6) +#define SPI_FLASH_SR2_LB3 BIT(5) +#define SPI_FLASH_SR2_LB2 BIT(4) +#define SPI_FLASH_SR2_LB1 BIT(3) +#define SPI_FLASH_SR2_QE BIT(1) +#define SPI_FLASH_SR2_SRP1 BIT(0) +#define SPI_FLASH_SR1_SRP0 BIT(7) +#define SPI_FLASH_SR1_SEC BIT(6) +#define SPI_FLASH_SR1_TB BIT(5) +#define SPI_FLASH_SR1_BP2 BIT(4) +#define SPI_FLASH_SR1_BP1 BIT(3) +#define SPI_FLASH_SR1_BP0 BIT(2) +#define SPI_FLASH_SR1_WEL BIT(1) +#define SPI_FLASH_SR1_BUSY BIT(0) /* 0: F_CS0 1: F_CS1_1(GPIO86) 2:F_CS1_2(GPIOA6) */ -#define FIU_CHIP_SELECT 0 +#define FIU_CHIP_SELECT 0 /* Create UMA control mask */ -#define MASK(bit) (0x1 << (bit)) -#define A_SIZE 0x03 /* 0: No ADR field 1: 3-bytes ADR field */ -#define C_SIZE 0x04 /* 0: 1-Byte CMD field 1:No CMD field */ -#define RD_WR 0x05 /* 0: Read 1: Write */ -#define DEV_NUM 0x06 /* 0: PVT is used 1: SHD is used */ -#define EXEC_DONE 0x07 -#define D_SIZE_1 0x01 -#define D_SIZE_2 0x02 -#define D_SIZE_3 0x03 -#define D_SIZE_4 0x04 -#define FLASH_SEL MASK(DEV_NUM) - -#define MASK_CMD_ONLY (MASK(EXEC_DONE) | FLASH_SEL) -#define MASK_CMD_ADR (MASK(EXEC_DONE) | FLASH_SEL | MASK(A_SIZE)) -#define MASK_CMD_ADR_WR (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - |MASK(A_SIZE) | D_SIZE_1) -#define MASK_RD_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_1) -#define MASK_RD_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_2) -#define MASK_RD_3BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_3) -#define MASK_RD_4BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_4) -#define MASK_CMD_RD_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_1) -#define MASK_CMD_RD_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_2) -#define MASK_CMD_RD_3BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_3) -#define MASK_CMD_RD_4BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_4) -#define MASK_CMD_WR_ONLY (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR)) -#define MASK_CMD_WR_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - | MASK(C_SIZE) | D_SIZE_1) -#define MASK_CMD_WR_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - | MASK(C_SIZE) | D_SIZE_2) -#define MASK_CMD_WR_ADR (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) \ - | MASK(A_SIZE)) - +#define MASK(bit) (0x1 << (bit)) +#define A_SIZE 0x03 /* 0: No ADR field 1: 3-bytes ADR field */ +#define C_SIZE 0x04 /* 0: 1-Byte CMD field 1:No CMD field */ +#define RD_WR 0x05 /* 0: Read 1: Write */ +#define DEV_NUM 0x06 /* 0: PVT is used 1: SHD is used */ +#define EXEC_DONE 0x07 +#define D_SIZE_1 0x01 +#define D_SIZE_2 0x02 +#define D_SIZE_3 0x03 +#define D_SIZE_4 0x04 +#define FLASH_SEL MASK(DEV_NUM) + +#define MASK_CMD_ONLY (MASK(EXEC_DONE) | FLASH_SEL) +#define MASK_CMD_ADR (MASK(EXEC_DONE) | FLASH_SEL | MASK(A_SIZE)) +#define MASK_CMD_ADR_WR \ + (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) | MASK(A_SIZE) | D_SIZE_1) +#define MASK_RD_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_1) +#define MASK_RD_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_2) +#define MASK_RD_3BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_3) +#define MASK_RD_4BYTE (MASK(EXEC_DONE) | FLASH_SEL | MASK(C_SIZE) | D_SIZE_4) +#define MASK_CMD_RD_1BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_1) +#define MASK_CMD_RD_2BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_2) +#define MASK_CMD_RD_3BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_3) +#define MASK_CMD_RD_4BYTE (MASK(EXEC_DONE) | FLASH_SEL | D_SIZE_4) +#define MASK_CMD_WR_ONLY (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR)) +#define MASK_CMD_WR_1BYTE \ + (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) | MASK(C_SIZE) | D_SIZE_1) +#define MASK_CMD_WR_2BYTE \ + (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) | MASK(C_SIZE) | D_SIZE_2) +#define MASK_CMD_WR_ADR \ + (MASK(EXEC_DONE) | FLASH_SEL | MASK(RD_WR) | MASK(A_SIZE)) #endif /* __CROS_EC_REGISTERS_H */ diff --git a/zephyr/shim/chip/npcx/power_policy.c b/zephyr/shim/chip/npcx/power_policy.c index 1e5a7b15ce..aea6e62d30 100644 --- a/zephyr/shim/chip/npcx/power_policy.c +++ b/zephyr/shim/chip/npcx/power_policy.c @@ -1,9 +1,9 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include <zephyr/pm/pm.h> #include <zephyr/pm/policy.h> #include <soc.h> diff --git a/zephyr/shim/chip/npcx/shi.c b/zephyr/shim/chip/npcx/shi.c index 9e52228e37..8bec57252d 100644 --- a/zephyr/shim/chip/npcx/shi.c +++ b/zephyr/shim/chip/npcx/shi.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,7 @@ #include <zephyr/dt-bindings/clock/npcx_clock.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include <ap_power/ap_power.h> #include "chipset.h" @@ -83,12 +83,11 @@ static void shi_init(void) ap_power_ev_init_callback(&cb, shi_power_change, #if CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK AP_POWER_RESUME_INIT | - AP_POWER_SUSPEND_COMPLETE + AP_POWER_SUSPEND_COMPLETE #else - AP_POWER_RESUME | - AP_POWER_SUSPEND + AP_POWER_RESUME | AP_POWER_SUSPEND #endif - ); + ); ap_power_ev_add_callback(&cb); if (IS_ENABLED(CONFIG_CROS_SHI_NPCX_DEBUG) || diff --git a/zephyr/shim/chip/npcx/system.c b/zephyr/shim/chip/npcx/system.c index ae28749ec0..2240acea54 100644 --- a/zephyr/shim/chip/npcx/system.c +++ b/zephyr/shim/chip/npcx/system.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -54,9 +54,9 @@ void system_mpu_config(void) CPU_MPU_CTRL = 0x7; /* Create a new MPU Region to allow execution from low-power ram */ - CPU_MPU_RNR = REGION_CHIP_RESERVED; + CPU_MPU_RNR = REGION_CHIP_RESERVED; CPU_MPU_RASR = CPU_MPU_RASR & 0xFFFFFFFE; /* Disable region */ - CPU_MPU_RBAR = CONFIG_LPRAM_BASE; /* Set region base address */ + CPU_MPU_RBAR = CONFIG_LPRAM_BASE; /* Set region base address */ /* * Set region size & attribute and enable region * [31:29] - Reserved. diff --git a/zephyr/shim/chip/npcx/system_download_from_flash.c b/zephyr/shim/chip/npcx/system_download_from_flash.c index f616dc6603..1aef9560d1 100644 --- a/zephyr/shim/chip/npcx/system_download_from_flash.c +++ b/zephyr/shim/chip/npcx/system_download_from_flash.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,40 +11,40 @@ #include "system_chip.h" /* Modules Map */ -#define NPCX_PMC_BASE_ADDR 0x4000D000 -#define NPCX_GDMA_BASE_ADDR 0x40011000 +#define NPCX_PMC_BASE_ADDR 0x4000D000 +#define NPCX_GDMA_BASE_ADDR 0x40011000 /******************************************************************************/ /* GDMA (General DMA) Registers */ -#define NPCX_GDMA_CTL REG32(NPCX_GDMA_BASE_ADDR + 0x000) -#define NPCX_GDMA_SRCB REG32(NPCX_GDMA_BASE_ADDR + 0x004) -#define NPCX_GDMA_DSTB REG32(NPCX_GDMA_BASE_ADDR + 0x008) -#define NPCX_GDMA_TCNT REG32(NPCX_GDMA_BASE_ADDR + 0x00C) +#define NPCX_GDMA_CTL REG32(NPCX_GDMA_BASE_ADDR + 0x000) +#define NPCX_GDMA_SRCB REG32(NPCX_GDMA_BASE_ADDR + 0x004) +#define NPCX_GDMA_DSTB REG32(NPCX_GDMA_BASE_ADDR + 0x008) +#define NPCX_GDMA_TCNT REG32(NPCX_GDMA_BASE_ADDR + 0x00C) /******************************************************************************/ /* GDMA register fields */ -#define NPCX_GDMA_CTL_GDMAEN 0 -#define NPCX_GDMA_CTL_GDMAMS FIELD(2, 2) -#define NPCX_GDMA_CTL_DADIR 4 -#define NPCX_GDMA_CTL_SADIR 5 -#define NPCX_GDMA_CTL_SAFIX 7 -#define NPCX_GDMA_CTL_SIEN 8 -#define NPCX_GDMA_CTL_BME 9 -#define NPCX_GDMA_CTL_SBMS 11 -#define NPCX_GDMA_CTL_TWS FIELD(12, 2) -#define NPCX_GDMA_CTL_DM 15 -#define NPCX_GDMA_CTL_SOFTREQ 16 -#define NPCX_GDMA_CTL_TC 18 -#define NPCX_GDMA_CTL_GDMAERR 20 -#define NPCX_GDMA_CTL_BLOCK_BUG_CORRECTION_DISABLE 26 +#define NPCX_GDMA_CTL_GDMAEN 0 +#define NPCX_GDMA_CTL_GDMAMS FIELD(2, 2) +#define NPCX_GDMA_CTL_DADIR 4 +#define NPCX_GDMA_CTL_SADIR 5 +#define NPCX_GDMA_CTL_SAFIX 7 +#define NPCX_GDMA_CTL_SIEN 8 +#define NPCX_GDMA_CTL_BME 9 +#define NPCX_GDMA_CTL_SBMS 11 +#define NPCX_GDMA_CTL_TWS FIELD(12, 2) +#define NPCX_GDMA_CTL_DM 15 +#define NPCX_GDMA_CTL_SOFTREQ 16 +#define NPCX_GDMA_CTL_TC 18 +#define NPCX_GDMA_CTL_GDMAERR 20 +#define NPCX_GDMA_CTL_BLOCK_BUG_CORRECTION_DISABLE 26 /******************************************************************************/ /* Low Power RAM definitions */ -#define NPCX_LPRAM_CTRL REG32(0x40001044) +#define NPCX_LPRAM_CTRL REG32(0x40001044) /******************************************************************************/ /* Sysjump utilities in low power ram for npcx series. */ -noreturn void __keep __attribute__ ((section(".lowpower_ram2"))) +noreturn void __keep __attribute__((section(".lowpower_ram2"))) __start_gdma(uint32_t exeAddr) { /* Enable GDMA now */ @@ -55,7 +55,7 @@ __start_gdma(uint32_t exeAddr) /* Wait for transfer to complete/fail */ while (!IS_BIT_SET(NPCX_GDMA_CTL, NPCX_GDMA_CTL_TC) && - !IS_BIT_SET(NPCX_GDMA_CTL, NPCX_GDMA_CTL_GDMAERR)) + !IS_BIT_SET(NPCX_GDMA_CTL, NPCX_GDMA_CTL_GDMAERR)) ; /* Disable GDMA now */ @@ -81,11 +81,11 @@ __start_gdma(uint32_t exeAddr) } /* Begin address of Suspend RAM for little FW (GDMA utilities). */ -#define LFW_OFFSET 0x160 +#define LFW_OFFSET 0x160 uintptr_t __lpram_lfw_start = CONFIG_LPRAM_BASE + LFW_OFFSET; void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, - uint32_t size, uint32_t exeAddr) + uint32_t size, uint32_t exeAddr) { int i; uint8_t chunkSize = 16; /* 4 data burst mode. ie.16 bytes */ @@ -94,7 +94,7 @@ void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, * it's a thumb branch for cortex-m series CPU. */ void (*__start_gdma_in_lpram)(uint32_t) = - (void(*)(uint32_t))(__lpram_lfw_start | 0x01); + (void (*)(uint32_t))(__lpram_lfw_start | 0x01); /* * Before enabling burst mode for better performance of GDMA, it's @@ -152,7 +152,7 @@ void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, /* Copy the __start_gdma_in_lpram instructions to LPRAM */ for (i = 0; i < &__flash_lplfw_end - &__flash_lplfw_start; i++) *((uint32_t *)__lpram_lfw_start + i) = - *(&__flash_lplfw_start + i); + *(&__flash_lplfw_start + i); /* Start GDMA in Suspend RAM */ __start_gdma_in_lpram(exeAddr); diff --git a/zephyr/shim/chip/npcx/system_external_storage.c b/zephyr/shim/chip/npcx/system_external_storage.c index 96d13fd94e..81e1968cf4 100644 --- a/zephyr/shim/chip/npcx/system_external_storage.c +++ b/zephyr/shim/chip/npcx/system_external_storage.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -26,13 +26,13 @@ static const struct device *mdc_dev = DEVICE_DT_GET(DT_NODELABEL(mdc)); static uint32_t fwctrl_cached = 0xFFFFFFFF; #ifdef CONFIG_SOC_SERIES_NPCX7 -#define NPCX_FWCTRL 0x007 -#define NPCX_FWCTRL_RO_REGION 0 -#define NPCX_FWCTRL_FW_SLOT 1 +#define NPCX_FWCTRL 0x007 +#define NPCX_FWCTRL_RO_REGION 0 +#define NPCX_FWCTRL_FW_SLOT 1 #elif defined(CONFIG_SOC_SERIES_NPCX9) -#define NPCX_FWCTRL 0x009 -#define NPCX_FWCTRL_RO_REGION 6 -#define NPCX_FWCTRL_FW_SLOT 7 +#define NPCX_FWCTRL 0x009 +#define NPCX_FWCTRL_RO_REGION 6 +#define NPCX_FWCTRL_FW_SLOT 7 #else #error "Unsupported NPCX SoC series." #endif @@ -66,28 +66,28 @@ void system_jump_to_booter(void) */ switch (system_get_shrspi_image_copy()) { case EC_IMAGE_RW: - flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF + - CONFIG_RW_STORAGE_OFF; + flash_offset = + CONFIG_EC_WRITABLE_STORAGE_OFF + CONFIG_RW_STORAGE_OFF; flash_used = CONFIG_RW_SIZE; break; #ifdef CONFIG_RW_B case EC_IMAGE_RW_B: flash_offset = CONFIG_EC_WRITABLE_STORAGE_OFF + - CONFIG_RW_B_STORAGE_OFF; + CONFIG_RW_B_STORAGE_OFF; flash_used = CONFIG_RW_SIZE; break; #endif case EC_IMAGE_RO: default: /* Jump to RO by default */ - flash_offset = CONFIG_EC_PROTECTED_STORAGE_OFF + - CONFIG_RO_STORAGE_OFF; + flash_offset = + CONFIG_EC_PROTECTED_STORAGE_OFF + CONFIG_RO_STORAGE_OFF; flash_used = CONFIG_RO_SIZE; break; } /* Make sure the reset vector is inside the destination image */ - addr_entry = *(uintptr_t *)(flash_offset + - CONFIG_MAPPED_STORAGE_BASE + 4); + addr_entry = + *(uintptr_t *)(flash_offset + CONFIG_MAPPED_STORAGE_BASE + 4); /* * Speed up FW download time by increasing clock freq of EC. It will @@ -95,29 +95,34 @@ void system_jump_to_booter(void) */ clock_turbo(); -/* - * npcx9 Rev.1 has the problem for download_from_flash API. - * Workwaroud it by executing the system_download_from_flash function - * in the suspend RAM like npcx5. - * TODO: Removing npcx9 when Rev.2 is available. - */ + /* + * npcx9 Rev.1 has the problem for download_from_flash API. + * Workwaroud it by executing the system_download_from_flash function + * in the suspend RAM like npcx5. + * TODO: Removing npcx9 when Rev.2 is available. + */ /* Bypass for GMDA issue of ROM api utilities */ #if defined(CONFIG_SOC_SERIES_NPCX5) || \ defined(CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API) - system_download_from_flash( - flash_offset, /* The offset of the data in spi flash */ - CONFIG_PROGRAM_MEMORY_BASE, /* RAM Addr of downloaded data */ - flash_used, /* Number of bytes to download */ - addr_entry /* jump to this address after download */ + system_download_from_flash(flash_offset, /* The offset of the data in + spi flash */ + CONFIG_PROGRAM_MEMORY_BASE, /* RAM Addr of + downloaded + data */ + flash_used, /* Number of bytes to download */ + addr_entry /* jump to this address after + download */ ); #else - download_from_flash( - flash_offset, /* The offset of the data in spi flash */ - CONFIG_PROGRAM_MEMORY_BASE, /* RAM Addr of downloaded data */ - flash_used, /* Number of bytes to download */ - SIGN_NO_CHECK, /* Need CRC check or not */ - addr_entry, /* jump to this address after download */ - &status /* Status fo download */ + download_from_flash(flash_offset, /* The offset of the data in spi flash + */ + CONFIG_PROGRAM_MEMORY_BASE, /* RAM Addr of + downloaded data */ + flash_used, /* Number of bytes to download */ + SIGN_NO_CHECK, /* Need CRC check or not */ + addr_entry, /* jump to this address after download + */ + &status /* Status fo download */ ); #endif } diff --git a/zephyr/shim/core/CMakeLists.txt b/zephyr/shim/core/CMakeLists.txt index e1b13f21f4..ef116e376a 100644 --- a/zephyr/shim/core/CMakeLists.txt +++ b/zephyr/shim/core/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/core/cortex-m/CMakeLists.txt b/zephyr/shim/core/cortex-m/CMakeLists.txt index dd975787dc..030512552a 100644 --- a/zephyr/shim/core/cortex-m/CMakeLists.txt +++ b/zephyr/shim/core/cortex-m/CMakeLists.txt @@ -1,6 +1,6 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CONSOLE_CMD_IRQ irq_command.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MPU mpu.c) +zephyr_library_sources_ifdef(CONFIG_MPU mpu.c) diff --git a/zephyr/shim/core/cortex-m/irq_command.c b/zephyr/shim/core/cortex-m/irq_command.c index 911aeae946..1cf1a213e4 100644 --- a/zephyr/shim/core/cortex-m/irq_command.c +++ b/zephyr/shim/core/cortex-m/irq_command.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,7 +21,7 @@ void sys_trace_isr_enter_user(int nested_interrupts) irq_count[irq]++; } -static int command_irq(int argc, char **argv) +static int command_irq(int argc, const char **argv) { ARG_UNUSED(argc); ARG_UNUSED(argv); diff --git a/zephyr/shim/core/cortex-m/mpu.c b/zephyr/shim/core/cortex-m/mpu.c index c798a2a446..8025227700 100644 --- a/zephyr/shim/core/cortex-m/mpu.c +++ b/zephyr/shim/core/cortex-m/mpu.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/adc_chip.h b/zephyr/shim/include/adc_chip.h index c51cdfbb30..f5580a52ab 100644 --- a/zephyr/shim/include/adc_chip.h +++ b/zephyr/shim/include/adc_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/atomic.h b/zephyr/shim/include/atomic.h index 6b44bf02a5..beb8b111ed 100644 --- a/zephyr/shim/include/atomic.h +++ b/zephyr/shim/include/atomic.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,4 +13,4 @@ static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) return atomic_and(addr, ~bits); } -#endif /* __CROS_EC_ATOMIC_H */ +#endif /* __CROS_EC_ATOMIC_H */ diff --git a/zephyr/shim/include/battery_enum.h b/zephyr/shim/include/battery_enum.h index 7497edea0b..c0d10a6ed5 100644 --- a/zephyr/shim/include/battery_enum.h +++ b/zephyr/shim/include/battery_enum.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,16 +8,16 @@ "included in all zephyr builds automatically" #endif -#define BATTERY_ENUM(val) DT_CAT(BATTERY_, val) +#define BATTERY_ENUM(val) DT_CAT(BATTERY_, val) #define BATTERY_TYPE(id) BATTERY_ENUM(DT_STRING_UPPER_TOKEN(id, enum_name)) -#define BATTERY_TYPE_WITH_COMMA(id) BATTERY_TYPE(id), +#define BATTERY_TYPE_WITH_COMMA(id) BATTERY_TYPE(id), /* This produces a list of BATTERY_<ENUM_NAME> identifiers */ enum battery_type { #if DT_HAS_COMPAT_STATUS_OKAY(battery_smart) DT_FOREACH_STATUS_OKAY(battery_smart, BATTERY_TYPE_WITH_COMMA) #endif - BATTERY_TYPE_COUNT, + BATTERY_TYPE_COUNT, }; #undef BATTERY_TYPE_WITH_COMMA diff --git a/zephyr/shim/include/board.h b/zephyr/shim/include/board.h index 1c8da8b209..3e12568155 100644 --- a/zephyr/shim/include/board.h +++ b/zephyr/shim/include/board.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,11 +15,6 @@ /* Include shimmed version of power signal */ #include "power/power.h" -/* Include board specific gpio mapping/aliases if named_pgios node exists */ -#if !defined(TEST_BUILD) && DT_NODE_EXISTS(DT_PATH(named_gpios)) -#include "gpio_map.h" -#endif - /* Include board specific i2c mapping if I2C is enabled. */ #if defined(CONFIG_I2C) #include "i2c/i2c.h" @@ -37,4 +32,4 @@ #include "charger_enum.h" #endif -#endif /* __BOARD_H */ +#endif /* __BOARD_H */ diff --git a/zephyr/shim/include/board_led.h b/zephyr/shim/include/board_led.h index 205c96c4c3..074ffa0256 100644 --- a/zephyr/shim/include/board_led.h +++ b/zephyr/shim/include/board_led.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,13 +12,13 @@ struct board_led_pwm_dt_channel { pwm_flags_t flags; }; -#define BOARD_LED_PWM_DT_CHANNEL_INITIALIZER(node_id) \ - { \ +#define BOARD_LED_PWM_DT_CHANNEL_INITIALIZER(node_id) \ + { \ .dev = DEVICE_DT_GET(DT_PWMS_CTLR(node_id)), \ - .channel = DT_PWMS_CHANNEL(node_id), \ - .flags = DT_PWMS_FLAGS(node_id), \ + .channel = DT_PWMS_CHANNEL(node_id), \ + .flags = DT_PWMS_FLAGS(node_id), \ } #define BOARD_LED_HZ_TO_PERIOD_NS(freq_hz) (NSEC_PER_SEC / freq_hz) -#endif /* __BOARD_LED_H */ +#endif /* __BOARD_LED_H */ diff --git a/zephyr/shim/include/builtin/assert.h b/zephyr/shim/include/builtin/assert.h index c3c43f2ba1..27dce8f2c4 100644 --- a/zephyr/shim/include/builtin/assert.h +++ b/zephyr/shim/include/builtin/assert.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/charger/chg_bq25710.h b/zephyr/shim/include/charger/chg_bq25710.h index 6458545946..91d100a7de 100644 --- a/zephyr/shim/include/charger/chg_bq25710.h +++ b/zephyr/shim/include/charger/chg_bq25710.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,10 +10,10 @@ #define BQ25710_CHG_COMPAT ti_bq25710 -#define CHG_CONFIG_BQ25710(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS, \ - .drv = &bq25710_drv, \ +#define CHG_CONFIG_BQ25710(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &bq25710_drv, \ }, #endif diff --git a/zephyr/shim/include/charger/chg_isl923x.h b/zephyr/shim/include/charger/chg_isl923x.h index fea25e7391..b0323cd1b8 100644 --- a/zephyr/shim/include/charger/chg_isl923x.h +++ b/zephyr/shim/include/charger/chg_isl923x.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,10 +7,11 @@ #include "driver/charger/isl923x_public.h" #define ISL923X_CHG_COMPAT intersil_isl923x +#define ISL923X_EMUL_COMPAT cros_isl923x_emul -#define CHG_CONFIG_ISL923X(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = ISL923X_ADDR_FLAGS, \ - .drv = &isl923x_drv, \ +#define CHG_CONFIG_ISL923X(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &isl923x_drv, \ }, diff --git a/zephyr/shim/include/charger/chg_isl9241.h b/zephyr/shim/include/charger/chg_isl9241.h index 8e19e2643e..711a581c2f 100644 --- a/zephyr/shim/include/charger/chg_isl9241.h +++ b/zephyr/shim/include/charger/chg_isl9241.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,9 +8,9 @@ #define ISL9241_CHG_COMPAT intersil_isl9241 -#define CHG_CONFIG_ISL9241(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = ISL9241_ADDR_FLAGS, \ - .drv = &isl9241_drv, \ +#define CHG_CONFIG_ISL9241(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &isl9241_drv, \ }, diff --git a/zephyr/shim/include/charger/chg_rt9490.h b/zephyr/shim/include/charger/chg_rt9490.h index 03059078e9..3ac596d482 100644 --- a/zephyr/shim/include/charger/chg_rt9490.h +++ b/zephyr/shim/include/charger/chg_rt9490.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,10 +7,11 @@ #include "driver/charger/rt9490.h" #define RT9490_CHG_COMPAT richtek_rt9490 +#define RT9490_EMUL_COMPAT zephyr_rt9490_emul -#define CHG_CONFIG_RT9490(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = RT9490_ADDR_FLAGS, \ - .drv = &rt9490_drv, \ +#define CHG_CONFIG_RT9490(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &rt9490_drv, \ }, diff --git a/zephyr/shim/include/charger/chg_sm5803.h b/zephyr/shim/include/charger/chg_sm5803.h index 7e18a5554b..65ef066970 100644 --- a/zephyr/shim/include/charger/chg_sm5803.h +++ b/zephyr/shim/include/charger/chg_sm5803.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,9 +8,9 @@ #define SM5803_CHG_COMPAT siliconmitus_sm5803 -#define CHG_CONFIG_SM5803(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = SM5803_ADDR_CHARGER_FLAGS, \ - .drv = &sm5803_drv, \ +#define CHG_CONFIG_SM5803(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &sm5803_drv, \ }, diff --git a/zephyr/shim/include/charger_chips.h b/zephyr/shim/include/charger_chips.h new file mode 100644 index 0000000000..b24fa246bf --- /dev/null +++ b/zephyr/shim/include/charger_chips.h @@ -0,0 +1,32 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_CHARGER_CHIPS_H +#define __CROS_EC_CHARGER_CHIPS_H + +#include "charger.h" +#include <zephyr/devicetree.h> + +extern const struct charger_config_t chg_chips_alt[]; + +#define ALT_CHG_CHIP_CHK(usbc_id, usb_port_num) \ + COND_CODE_1(DT_REG_HAS_IDX(usbc_id, usb_port_num), \ + (COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, chg_alt), (|| 1), \ + (|| 0))), \ + (|| 0)) + +#define CHG_ENABLE_ALTERNATE(usb_port_num) \ + do { \ + BUILD_ASSERT( \ + (0 DT_FOREACH_STATUS_OKAY_VARGS(named_usbc_port, \ + ALT_CHG_CHIP_CHK, \ + usb_port_num)), \ + "Selected USB node does not exist or does not specify" \ + "a charger alternate chip"); \ + memcpy(&chg_chips[usb_port_num], &chg_chips_alt[usb_port_num], \ + sizeof(struct charger_config_t)); \ + } while (0) + +#endif /* __CROS_EC_CHARGER_CHIPS_H */ diff --git a/zephyr/shim/include/charger_enum.h b/zephyr/shim/include/charger_enum.h index a2acc3e000..a10a274e28 100644 --- a/zephyr/shim/include/charger_enum.h +++ b/zephyr/shim/include/charger_enum.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 73f38a72f4..75c27dd32d 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,9 +9,9 @@ #include <zephyr/devicetree.h> #include <autoconf.h> -#define SENSOR_NODE DT_PATH(motionsense_sensor) -#define SENSOR_INFO_NODE DT_PATH(motionsense_sensor_info) -#define SENSOR_ALT_NODE DT_PATH(motionsense_sensor_alt) +#define SENSOR_NODE DT_PATH(motionsense_sensor) +#define SENSOR_INFO_NODE DT_PATH(motionsense_sensor_info) +#define SENSOR_ALT_NODE DT_PATH(motionsense_sensor_alt) /* * The battery enum is used in various drivers and these assume that it is @@ -66,14 +66,16 @@ #undef CONFIG_CONSOLE_UART /* Only used by the Chromium EC chip drivers */ #undef CONFIG_I2C_MULTI_PORT_CONTROLLER /* Not required by I2C shim */ #undef CONFIG_IRQ_COUNT /* Only used by Chromium EC core drivers */ -#undef CONFIG_KEYBOARD_KSO_HIGH_DRIVE /* Used by the Chromium EC chip drivers */ +#undef CONFIG_KEYBOARD_KSO_HIGH_DRIVE /* Used by the Chromium EC chip drivers \ + */ #undef CONFIG_LTO /* Link time optimization enabled by Zephyr build system */ #undef CONFIG_STACK_SIZE /* Only used in Chromium EC core init code */ #ifndef CONFIG_FPU #undef CONFIG_FPU /* Used in Zephyr as well, enabled in Kconfig directly */ #endif #ifndef CONFIG_WATCHDOG -#undef CONFIG_WATCHDOG /* Used in Zephyr as well, enabled in Kconfig directly */ +#undef CONFIG_WATCHDOG /* Used in Zephyr as well, enabled in Kconfig directly \ + */ #endif /* @@ -103,8 +105,8 @@ #endif /* EC chipset configuration */ -#define HOOK_TICK_INTERVAL CONFIG_CROS_EC_HOOK_TICK_INTERVAL -#define HOOK_TICK_INTERVAL_MS (HOOK_TICK_INTERVAL / 1000) +#define HOOK_TICK_INTERVAL CONFIG_CROS_EC_HOOK_TICK_INTERVAL +#define HOOK_TICK_INTERVAL_MS (HOOK_TICK_INTERVAL / 1000) /* Chipset and power configuration */ #ifdef CONFIG_AP_ARM_QUALCOMM_SC7180 @@ -242,7 +244,7 @@ #undef CONFIG_BATTERY_PRESENT_GPIO #ifdef CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO /* This is always GPIO_BATT_PRES_ODL with Zephyr */ -#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_PRES_ODL +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_PRES_ODL #endif #undef CONFIG_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF @@ -283,9 +285,9 @@ #undef CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV #if defined(CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV) && \ - (CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV > 0) + (CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV > 0) #define CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV \ - CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV + CONFIG_PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV #endif #undef CONFIG_BOARD_RESET_AFTER_POWER_ON @@ -428,29 +430,30 @@ #endif /* eSPI signals */ -#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#ifdef CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 +#undef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 +#ifdef CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S3 #endif -#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#ifdef CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 +#undef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 +#ifdef CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S4 #endif -#undef CONFIG_HOSTCMD_ESPI_VW_SLP_S5 -#ifdef CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5 -#define CONFIG_HOSTCMD_ESPI_VW_SLP_S5 +#undef CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5 +#ifdef CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5 +#define CONFIG_HOST_INTERFACE_ESPI_VW_SLP_S5 #endif -#undef CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST -#ifdef CONFIG_PLATFORM_EC_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST -#define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST +#undef CONFIG_HOST_INTERFACE_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST +#ifdef CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST +#define CONFIG_HOST_INTERFACE_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST #endif -#undef CONFIG_ESPI_DEFAULT_VW_WIDTH_US +#undef CONFIG_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US #ifdef CONFIG_PLATFORM_EC_DEFAULT_SCI_WIDTH_US -#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US CONFIG_PLATFORM_EC_DEFAULT_SCI_WIDTH_US +#define CONFIG_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US \ + CONFIG_PLATFORM_EC_DEFAULT_SCI_WIDTH_US #endif #if DT_HAS_CHOSEN(zephyr_flash) @@ -466,10 +469,11 @@ /* The jump data goes at the end of data ram, so for posix, the end of ram is * wherever the jump data ended up. */ -extern struct jump_data mock_jump_data; +#include "sysjump.h" +extern char mock_jump_data[sizeof(struct jump_data) + 256]; #define CONFIG_RAM_BASE 0x0 #define CONFIG_DATA_RAM_SIZE \ - (((uintptr_t)&mock_jump_data) + sizeof(struct jump_data)) + (((uintptr_t)&mock_jump_data) + sizeof(mock_jump_data)) #else #error "A zephyr,sram device must be chosen in the device tree" #endif @@ -479,16 +483,16 @@ extern struct jump_data mock_jump_data; #define CONFIG_RW_MEM_OFF CONFIG_CROS_EC_RW_MEM_OFF #define CONFIG_RW_MEM_SIZE CONFIG_CROS_EC_RW_MEM_SIZE -#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF -#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE -#define CONFIG_RO_SIZE CONFIG_CROS_EC_RO_SIZE -#define CONFIG_RW_SIZE CONFIG_CROS_EC_RW_SIZE +#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF +#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE +#define CONFIG_RO_SIZE CONFIG_CROS_EC_RO_SIZE +#define CONFIG_RW_SIZE CONFIG_CROS_EC_RW_SIZE /* * ROM resident area in flash used to store data objects that are not copied * into code RAM. Enable using the CONFIG_CHIP_INIT_ROM_REGION option. */ -#define CONFIG_RO_ROM_RESIDENT_MEM_OFF CONFIG_RO_SIZE +#define CONFIG_RO_ROM_RESIDENT_MEM_OFF CONFIG_RO_SIZE #define CONFIG_RO_ROM_RESIDENT_SIZE \ (CONFIG_EC_PROTECTED_STORAGE_SIZE - CONFIG_RO_SIZE) @@ -496,7 +500,7 @@ extern struct jump_data mock_jump_data; * RW firmware in program memory - Identical to RO, only one image loaded at * a time. */ -#define CONFIG_RW_ROM_RESIDENT_MEM_OFF CONFIG_RW_SIZE +#define CONFIG_RW_ROM_RESIDENT_MEM_OFF CONFIG_RW_SIZE #define CONFIG_RW_ROM_RESIDENT_SIZE \ (CONFIG_EC_WRITABLE_STORAGE_SIZE - CONFIG_RW_SIZE) @@ -560,22 +564,9 @@ extern struct jump_data mock_jump_data; #undef CONFIG_FLASH_SIZE_BYTES #ifdef CONFIG_PLATFORM_EC_FLASH_SIZE_BYTES -/* - * Flash size of IT81202 is 1MB. - * We use only 3/4 space of flash to save time of erasing RW image from flash. - */ -#ifdef CONFIG_SOC_IT8XXX2 -#define CONFIG_FLASH_SIZE_BYTES (CONFIG_PLATFORM_EC_FLASH_SIZE_BYTES * 3 / 4) -#else #define CONFIG_FLASH_SIZE_BYTES CONFIG_PLATFORM_EC_FLASH_SIZE_BYTES -#endif #endif /* CONFIG_PLATFORM_EC_FLASH_SIZE_BYTES */ -#undef CONFIG_ADC -#ifdef CONFIG_PLATFORM_EC_ADC -#define CONFIG_ADC -#endif - #undef CONFIG_ADC_CHANNELS_RUNTIME_CONFIG #ifdef CONFIG_PLATFORM_EC_ADC_CHANNELS_RUNTIME_CONFIG #define CONFIG_ADC_CHANNELS_RUNTIME_CONFIG @@ -621,6 +612,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_FANS CONFIG_PLATFORM_EC_NUM_FANS #endif +#undef CONFIG_FAN_BYPASS_SLOW_RESPONSE +#ifdef PLATFORM_EC_FAN_BYPASS_SLOW_RESPONSE +#define CONFIG_FAN_BYPASS_SLOW_RESPONSE +#endif + #ifdef CONFIG_PLATFORM_EC_I2C /* Also see shim/include/i2c/i2c.h which defines the ports enum */ #define CONFIG_I2C_CONTROLLER @@ -659,7 +655,7 @@ extern struct jump_data mock_jump_data; #undef CONFIG_KEYBOARD_DISCRETE #ifdef CONFIG_PLATFORM_EC_KEYBOARD_DISCRETE #define CONFIG_KEYBOARD_DISCRETE -#define KB_DISCRETE_I2C_ADDR_FLAGS DT_REG_ADDR(DT_NODELABEL(kb_discrete)) +#define KB_DISCRETE_I2C_ADDR_FLAGS DT_REG_ADDR(DT_NODELABEL(kb_discrete)) #endif #undef CONFIG_MKBP_INPUT_DEVICES @@ -669,16 +665,16 @@ extern struct jump_data mock_jump_data; #undef CONFIG_MKBP_EVENT_WAKEUP_MASK #if defined(CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK) && \ - DT_NODE_EXISTS(DT_PATH(ec_mkbp_event_wakeup_mask)) + DT_NODE_EXISTS(DT_PATH(ec_mkbp_event_wakeup_mask)) #define CONFIG_MKBP_EVENT_WAKEUP_MASK \ - DT_PROP(DT_PATH(ec_mkbp_event_wakeup_mask), wakeup_mask) + DT_PROP(DT_PATH(ec_mkbp_event_wakeup_mask), wakeup_mask) #endif #undef CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK #if defined(CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK) && \ - DT_NODE_EXISTS(DT_PATH(ec_mkbp_host_event_wakeup_mask)) + DT_NODE_EXISTS(DT_PATH(ec_mkbp_host_event_wakeup_mask)) #define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ - DT_PROP(DT_PATH(ec_mkbp_host_event_wakeup_mask), wakeup_mask) + DT_PROP(DT_PATH(ec_mkbp_host_event_wakeup_mask), wakeup_mask) #endif #undef CONFIG_CMD_KEYBOARD @@ -689,12 +685,12 @@ extern struct jump_data mock_jump_data; #undef CONFIG_KEYBOARD_COL2_INVERTED #ifdef CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED #define CONFIG_KEYBOARD_COL2_INVERTED -#endif /* CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED */ +#endif /* CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED */ #undef CONFIG_KEYBOARD_REFRESH_ROW3 #ifdef CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3 #define CONFIG_KEYBOARD_REFRESH_ROW3 -#endif /* CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3 */ +#endif /* CONFIG_PLATFORM_EC_KEYBOARD_REFRESH_ROW3 */ #undef CONFIG_KEYBOARD_KEYPAD #ifdef CONFIG_PLATFORM_EC_KEYBOARD_KEYPAD @@ -743,6 +739,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_KBLIGHT_ENABLE_PIN #endif +#undef CONFIG_KEYBOARD_STRICT_DEBOUNCE +#ifdef CONFIG_PLATFORM_EC_KEYBOARD_STRICT_DEBOUNCE +#define CONFIG_KEYBOARD_STRICT_DEBOUNCE +#endif + #undef CONFIG_LED_COMMON #ifdef CONFIG_PLATFORM_EC_LED_COMMON #define CONFIG_LED_COMMON @@ -765,8 +766,7 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_LED_PWM_CHARGE_COLOR #undef CONFIG_LED_PWM_CHARGE_COLOR -#define CONFIG_LED_PWM_CHARGE_COLOR \ - CONFIG_PLATFORM_EC_LED_PWM_CHARGE_COLOR +#define CONFIG_LED_PWM_CHARGE_COLOR CONFIG_PLATFORM_EC_LED_PWM_CHARGE_COLOR #endif #ifdef CONFIG_PLATFORM_EC_LED_PWM_NEAR_FULL_COLOR @@ -783,8 +783,7 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_LED_PWM_SOC_ON_COLOR #undef CONFIG_LED_PWM_SOC_ON_COLOR -#define CONFIG_LED_PWM_SOC_ON_COLOR \ - CONFIG_PLATFORM_EC_LED_PWM_SOC_ON_COLOR +#define CONFIG_LED_PWM_SOC_ON_COLOR CONFIG_PLATFORM_EC_LED_PWM_SOC_ON_COLOR #endif #ifdef CONFIG_PLATFORM_EC_LED_PWM_SOC_SUSPEND_COLOR @@ -795,8 +794,7 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_LED_PWM_LOW_BATT_COLOR #undef CONFIG_LED_PWM_LOW_BATT_COLOR -#define CONFIG_LED_PWM_LOW_BATT_COLOR \ - CONFIG_PLATFORM_EC_LED_PWM_LOW_BATT_COLOR +#define CONFIG_LED_PWM_LOW_BATT_COLOR CONFIG_PLATFORM_EC_LED_PWM_LOW_BATT_COLOR #endif #undef CONFIG_CMD_LEDTEST @@ -812,7 +810,7 @@ extern struct jump_data mock_jump_data; #undef CONFIG_LED_ONOFF_STATES_BAT_LOW #ifdef CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW #define CONFIG_LED_ONOFF_STATES_BAT_LOW \ - CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW + CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW #endif #undef CONFIG_PWM_DISPLIGHT @@ -872,8 +870,7 @@ extern struct jump_data mock_jump_data; #endif #undef CONFIG_POWER_S0IX -#if defined(CONFIG_PLATFORM_EC_POWERSEQ_S0IX) || \ - defined(CONFIG_AP_PWRSEQ_S0IX) +#if defined(CONFIG_PLATFORM_EC_POWERSEQ_S0IX) || defined(CONFIG_AP_PWRSEQ_S0IX) #define CONFIG_POWER_S0IX #endif @@ -898,7 +895,6 @@ extern struct jump_data mock_jump_data; CONFIG_PLATFORM_EC_POWER_BUTTON_INIT_TIMEOUT #endif - #undef CONFIG_POWERSEQ_FAKE_CONTROL #ifdef CONFIG_PLATFORM_EC_POWERSEQ_FAKE_CONTROL #define CONFIG_POWERSEQ_FAKE_CONTROL @@ -931,19 +927,19 @@ extern struct jump_data mock_jump_data; #undef CONFIG_CMD_GETTIME #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_GETTIME #define CONFIG_CMD_GETTIME -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_GETTIME */ +#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_GETTIME */ #undef CONFIG_CMD_TIMERINFO #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO #define CONFIG_CMD_TIMERINFO -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO */ +#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO */ #undef CONFIG_CMD_WAITMS #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_WAITMS #define CONFIG_CMD_WAITMS -#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO */ +#endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_TIMERINFO */ -#endif /* CONFIG_PLATFORM_EC_TIMER */ +#endif /* CONFIG_PLATFORM_EC_TIMER */ /* USB-C things */ #ifdef CONFIG_PLATFORM_EC_USBC @@ -954,18 +950,21 @@ extern struct jump_data mock_jump_data; /* * Define these here for now. They are not actually CONFIG options in the EC * code base. Ideally they would be defined in the devicetree (perhaps for a - * 'board' driver if not in the USB chip driver itself). + * 'board' driver if not in the USB chip driver itself). Use Kconfig to allow + * projects to overwrite the power configurations. * * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C * cables only support up to 60W. */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW CONFIG_PLATFORM_EC_PD_OPERATING_POWER_MW +#define PD_MAX_POWER_MW CONFIG_PLATFORM_EC_PD_MAX_POWER_MW +#define PD_MAX_CURRENT_MA CONFIG_PLATFORM_EC_PD_MAX_CURRENT_MA +#define PD_MAX_VOLTAGE_MV CONFIG_PLATFORM_EC_PD_MAX_VOLTAGE_MV -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY \ + CONFIG_PLATFORM_EC_PD_POWER_SUPPLY_TURN_ON_DELAY +#define PD_POWER_SUPPLY_TURN_OFF_DELAY \ + CONFIG_PLATFORM_EC_PD_POWER_SUPPLY_TURN_OFF_DELAY #endif #undef CONFIG_CMD_PPC_DUMP @@ -973,6 +972,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_CMD_PPC_DUMP #endif +#undef CONFIG_USBC_PPC_LOGGING +#ifdef CONFIG_PLATFORM_EC_USBC_PPC_LOGGING +#define CONFIG_USBC_PPC_LOGGING +#endif + #undef CONFIG_CMD_TCPC_DUMP #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_TCPC_DUMP #define CONFIG_CMD_TCPC_DUMP @@ -990,8 +994,8 @@ extern struct jump_data mock_jump_data; #define CONFIG_CHARGER /* TODO: Put these charger defines in the devicetree? */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 #endif @@ -1013,31 +1017,31 @@ extern struct jump_data mock_jump_data; #undef CONFIG_CHARGER_INPUT_CURRENT #ifdef CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT -#define CONFIG_CHARGER_INPUT_CURRENT CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT +#define CONFIG_CHARGER_INPUT_CURRENT CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT #endif #undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON #ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON #define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON \ - CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON + CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON #endif #undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC #ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC #define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC \ - CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC + CONFIG_PLATFORM_EC_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC #endif #undef CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT #ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT #define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT \ - CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT + CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT #endif #undef CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON #ifdef CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON #define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON \ - CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON + CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON #endif #undef CONFIG_CHARGE_RAMP_SW @@ -1062,22 +1066,22 @@ extern struct jump_data mock_jump_data; #undef CONFIG_USB_PID #ifdef CONFIG_PLATFORM_EC_USB_PID -#define CONFIG_USB_PID CONFIG_PLATFORM_EC_USB_PID +#define CONFIG_USB_PID CONFIG_PLATFORM_EC_USB_PID #endif #undef CONFIG_USB_BCD_DEV #ifdef CONFIG_PLATFORM_EC_USB_BCD_DEV -#define CONFIG_USB_BCD_DEV CONFIG_PLATFORM_EC_USB_BCD_DEV +#define CONFIG_USB_BCD_DEV CONFIG_PLATFORM_EC_USB_BCD_DEV #endif #undef CONFIG_USB_VID #ifdef CONFIG_PLATFORM_EC_USB_VID -#define CONFIG_USB_VID CONFIG_PLATFORM_EC_USB_VID +#define CONFIG_USB_VID CONFIG_PLATFORM_EC_USB_VID #endif #undef CONFIG_USB_MS_EXTENDED_COMPAT_ID_DESCRIPTOR #ifdef CONFIG_PLATFORM_EC_USB_MS_EXTENDED_COMPAT_ID_DESCRIPTOR -#define CONFIG_USB_MS_EXTENDED_COMPAT_ID_DESCRIPTOR \ +#define CONFIG_USB_MS_EXTENDED_COMPAT_ID_DESCRIPTOR \ CONFIG_PLATFORM_EC_USB_MS_EXTENDED_COMPAT_ID_DESCRIPTOR #endif @@ -1145,11 +1149,25 @@ extern struct jump_data mock_jump_data; #define CONFIG_USB_PORT_POWER_SMART_SIMPLE #endif +#undef CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE +#ifdef CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_DISABLED +#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_DISABLED +#elif defined(CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_SDP) +#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_SDP2 +#elif defined(CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_DEFAULT_CDP) +#define CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE USB_CHARGE_MODE_CDP +#endif + #undef CONFIG_USB_PORT_POWER_SMART_INVERTED #ifdef CONFIG_PLATFORM_EC_USB_PORT_POWER_SMART_INVERTED #define CONFIG_USB_PORT_POWER_SMART_INVERTED #endif +#undef CONFIG_BC12_CLIENT_MODE_ONLY_PI3USB9201 +#ifdef CONFIG_PLATFORM_EC_BC12_CLIENT_MODE_ONLY_PI3USB9201 +#define CONFIG_BC12_CLIENT_MODE_ONLY_PI3USB9201 +#endif + #undef CONFIG_BC12_DETECT_PI3USB9201 #ifdef CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201 #define CONFIG_BC12_DETECT_PI3USB9201 @@ -1310,6 +1328,16 @@ extern struct jump_data mock_jump_data; #define CONFIG_USB_PD_TCPM_NCT38XX #endif +#undef CONFIG_USB_PD_TCPM_PS8745 +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8745 +#define CONFIG_USB_PD_TCPM_PS8745 +#endif + +#undef CONFIG_USB_PD_TCPM_PS8745_FORCE_ID +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8745_FORCE_ID +#define CONFIG_USB_PD_TCPM_PS8745_FORCE_ID +#endif + #undef CONFIG_USB_PD_TCPM_PS8751 #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751 #define CONFIG_USB_PD_TCPM_PS8751 @@ -1364,8 +1392,11 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP #define CONFIG_USB_PD_TCPM_ITE_ON_CHIP -/* TODO(b:189855648): hard-code a few things here; move to zephyr? */ -#define IT83XX_USBPD_PHY_PORT_COUNT 2 +#define IT83XX_USBPD_PHY_PORT_COUNT \ + COND_CODE_1(DT_NODE_EXISTS(DT_INST(1, ite_it8xxx2_usbpd)), (2), (1)) + +#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT \ + DT_NUM_INST_STATUS_OKAY(ite_it8xxx2_usbpd) #endif #undef CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 @@ -1446,31 +1477,6 @@ extern struct jump_data mock_jump_data; #endif /* CONFIG_PLATFORM_EC_USB_POWER_DELIVERY */ -#ifdef CONFIG_PLATFORM_EC_USB_CHARGER -#ifndef CONFIG_PLATFORM_EC_USB_CHARGER_SINGLE_TASK -#define HAS_TASK_USB_CHG_P0 1 - -#if CONFIG_USB_PD_PORT_MAX_COUNT > 1 -#define HAS_TASK_USB_CHG_P1 1 -#endif /* CONFIG_USB_PD_PORT_MAX_COUNT > 1 */ - -#if CONFIG_USB_PD_PORT_MAX_COUNT > 2 -#define HAS_TASK_USB_CHG_P2 1 -#endif /* CONFIG_USB_PD_PORT_MAX_COUNT > 2 */ - -#if CONFIG_USB_PD_PORT_MAX_COUNT > 3 -#define HAS_TASK_USB_CHG_P3 1 -#endif /* CONFIG_USB_PD_PORT_MAX_COUNT > 3 */ - -#endif /* !PLATFORM_EC_USB_CHARGER_SINGLE_TASK */ -#endif /* CONFIG_PLATFORM_EC_USB_CHARGER */ - -#undef CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT -#ifdef CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT -#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT \ - CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT -#endif - /* Remove PD_INT_C* task for ports managed by ITE embedded TCPC */ #ifdef CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT #if CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT >= 1 @@ -1512,6 +1518,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_USBC_PPC_NX20P3483 #endif +#undef CONFIG_USBC_NX20P348X_RCP_5VSRC_MASK_ENABLE +#ifdef CONFIG_PLATFORM_EC_USBC_NX20P348X_RCP_5VSRC_MASK_ENABLE +#define CONFIG_USBC_NX20P348X_RCP_5VSRC_MASK_ENABLE +#endif + #undef CONFIG_USBC_PPC_RT1718S #ifdef CONFIG_PLATFORM_EC_USBC_PPC_RT1718S #define CONFIG_USBC_PPC_RT1718S @@ -1594,13 +1605,13 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB #define USBC_PORT_C0_HB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c0_hb_retimer)) + DT_REG_ADDR(DT_NODELABEL(usb_c0_hb_retimer)) #define USBC_PORT_C1_HB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c1_hb_retimer)) + DT_REG_ADDR(DT_NODELABEL(usb_c1_hb_retimer)) #define USBC_PORT_C2_HB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c2_hb_retimer)) + DT_REG_ADDR(DT_NODELABEL(usb_c2_hb_retimer)) #define USBC_PORT_C3_HB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c3_hb_retimer)) + DT_REG_ADDR(DT_NODELABEL(usb_c3_hb_retimer)) #define CONFIG_USBC_RETIMER_INTEL_HB #endif @@ -1731,18 +1742,24 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE \ - CONFIG_PLATFORM_EC_USB_PD_TCPC_LPM_EXIT_DEBOUNCE_US + CONFIG_PLATFORM_EC_USB_PD_TCPC_LPM_EXIT_DEBOUNCE_US #endif /* CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER */ #undef CONFIG_USB_PD_DEBUG_LEVEL #ifdef CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL -#define CONFIG_USB_PD_DEBUG_LEVEL CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL +#define CONFIG_USB_PD_DEBUG_LEVEL CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL +#endif + +#undef CONFIG_USB_PD_INITIAL_DEBUG_LEVEL +#ifdef CONFIG_PLATFORM_EC_USB_PD_INITIAL_DEBUG_LEVEL +#define CONFIG_USB_PD_INITIAL_DEBUG_LEVEL \ + CONFIG_PLATFORM_EC_USB_PD_INITIAL_DEBUG_LEVEL #endif #undef CONFIG_USB_PD_STARTUP_DELAY_MS #ifdef CONFIG_PLATFORM_EC_USB_PD_STARTUP_DELAY_MS -#define CONFIG_USB_PD_STARTUP_DELAY_MS \ - CONFIG_PLATFORM_EC_USB_PD_STARTUP_DELAY_MS +#define CONFIG_USB_PD_STARTUP_DELAY_MS \ + CONFIG_PLATFORM_EC_USB_PD_STARTUP_DELAY_MS #endif #undef CONFIG_USB_PD_3A_PORTS @@ -1755,6 +1772,18 @@ extern struct jump_data mock_jump_data; #define CONFIG_USB_PD_TEMP_SENSOR CONFIG_PLATFORM_EC_USB_PD_TEMP_SENSOR #endif +#undef CONFIG_USB_PD_SHORT_PRESS_MAX_MS +#ifdef CONFIG_PLATFORM_EC_USB_PD_SHORT_PRESS_MAX_MS +#define CONFIG_USB_PD_SHORT_PRESS_MAX_MS \ + CONFIG_PLATFORM_EC_USB_PD_SHORT_PRESS_MAX_MS +#endif + +#undef CONFIG_USB_PD_LONG_PRESS_MAX_MS +#ifdef CONFIG_PLATFORM_EC_USB_PD_LONG_PRESS_MAX_MS +#define CONFIG_USB_PD_LONG_PRESS_MAX_MS \ + CONFIG_PLATFORM_EC_USB_PD_LONG_PRESS_MAX_MS +#endif + #undef CONFIG_USBC_VCONN #ifdef CONFIG_PLATFORM_EC_USBC_VCONN #define CONFIG_USBC_VCONN @@ -1818,6 +1847,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_USB_PD_USB4 #endif +#undef CONFIG_USB_PD_DATA_RESET_MSG +#ifdef CONFIG_PLATFORM_EC_USB_PD_DATA_RESET_MSG +#define CONFIG_USB_PD_DATA_RESET_MSG +#endif + #undef CONFIG_USB_PD_FRS #ifdef CONFIG_PLATFORM_EC_USB_PD_FRS #define CONFIG_USB_PD_FRS @@ -1837,7 +1871,7 @@ extern struct jump_data mock_jump_data; #undef VSTORE_SLOT_COUNT #ifdef CONFIG_PLATFORM_EC_VSTORE #define CONFIG_VSTORE -#define CONFIG_VSTORE_SLOT_COUNT CONFIG_PLATFORM_EC_VSTORE_SLOT_COUNT +#define CONFIG_VSTORE_SLOT_COUNT CONFIG_PLATFORM_EC_VSTORE_SLOT_COUNT #endif /* motion sense */ @@ -1871,7 +1905,8 @@ extern struct jump_data mock_jump_data; #undef CONFIG_EC_MAX_SENSOR_FREQ_MILLIHZ #ifdef CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ -#define CONFIG_EC_MAX_SENSOR_FREQ_MILLIHZ CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ +#define CONFIG_EC_MAX_SENSOR_FREQ_MILLIHZ \ + CONFIG_PLATFORM_EC_MAX_SENSOR_FREQ_MILLIHZ #endif #undef CONFIG_CMD_ACCEL_SPOOF @@ -1984,6 +2019,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_ACCELGYRO_LSM6DSO #endif +#undef CONFIG_ACCELGYRO_LSM6DSM +#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM +#define CONFIG_ACCELGYRO_LSM6DSM +#endif + #endif /* CONFIG_PLATFORM_EC_MOTIONSENSE */ #undef CONFIG_MATH_UTIL @@ -2027,6 +2067,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_SOFTWARE_PANIC #endif +#undef CONFIG_DEBUG_ASSSERT_BRIEF +#ifdef CONFIG_PLATFORM_EC_DEBUG_ASSERT_BRIEF +#define CONFIG_DEBUG_ASSSERT_BRIEF +#endif + #undef CONFIG_PANIC_CONSOLE_OUTPUT #ifdef CONFIG_PLATFORM_EC_PANIC_CONSOLE_OUTPUT #define CONFIG_PANIC_CONSOLE_OUTPUT @@ -2108,6 +2153,11 @@ extern struct jump_data mock_jump_data; #define I2C_ADDR_EEPROM_FLAGS DT_REG_ADDR(DT_NODELABEL(cbi_eeprom)) #endif +#undef CONFIG_EEPROM_CBI_WP +#ifdef CONFIG_PLATFORM_EC_EEPROM_CBI_WP +#define CONFIG_EEPROM_CBI_WP +#endif + #undef CONFIG_CBI_GPIO #ifdef CONFIG_PLATFORM_EC_CBI_GPIO #define CONFIG_CBI_GPIO @@ -2125,14 +2175,14 @@ extern struct jump_data mock_jump_data; #undef CONFIG_RO_HDR_MEM_OFF #ifdef CONFIG_PLATFORM_EC_RO_HEADER_OFFSET -#define CONFIG_RO_HDR_MEM_OFF CONFIG_PLATFORM_EC_RO_HEADER_OFFSET +#define CONFIG_RO_HDR_MEM_OFF CONFIG_PLATFORM_EC_RO_HEADER_OFFSET #else #define CONFIG_RO_HDR_MEM_OFF 0 #endif #undef CONFIG_RO_HDR_SIZE #ifdef CONFIG_PLATFORM_EC_RO_HEADER_SIZE -#define CONFIG_RO_HDR_SIZE CONFIG_PLATFORM_EC_RO_HEADER_SIZE +#define CONFIG_RO_HDR_SIZE CONFIG_PLATFORM_EC_RO_HEADER_SIZE #else #define CONFIG_RO_HDR_SIZE 0 #endif @@ -2172,11 +2222,6 @@ extern struct jump_data mock_jump_data; #define CONFIG_DEBUG_ASSERT_REBOOTS #endif -#undef CONFIG_MPU -#ifdef CONFIG_PLATFORM_EC_MPU -#define CONFIG_MPU -#endif - #undef CONFIG_CMD_SYSINFO #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO #define CONFIG_CMD_SYSINFO @@ -2199,7 +2244,7 @@ extern struct jump_data mock_jump_data; #undef CONFIG_WATCHDOG_WARNING_LEADING_TIME_MS #if defined(CONFIG_PLATFORM_EC_WATCHDOG_WARNING_LEADING_TIME_MS) || \ - defined(CONFIG_WDT_NPCX_DELAY_CYCLES) || \ + defined(CONFIG_WDT_NPCX_DELAY_CYCLES) || \ defined(CONFIG_WDT_ITE_WARNING_LEADING_TIME_MS) /* * Note: @@ -2319,7 +2364,7 @@ extern struct jump_data mock_jump_data; #undef CONFIG_BATTERY_DEVICE_CHEMISTRY #ifdef CONFIG_PLATFORM_EC_USE_BATTERY_DEVICE_CHEMISTRY -#define CONFIG_BATTERY_DEVICE_CHEMISTRY \ +#define CONFIG_BATTERY_DEVICE_CHEMISTRY \ CONFIG_PLATFORM_EC_BATTERY_DEVICE_CHEMISTRY #endif @@ -2366,13 +2411,13 @@ extern struct jump_data mock_jump_data; #undef CONFIG_CHARGER_BQ25710_SENSE_RESISTOR #ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR -#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR \ +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR \ CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR #endif #undef CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC #ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR_AC -#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC \ +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC \ CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR_AC #endif @@ -2413,13 +2458,12 @@ extern struct jump_data mock_jump_data; #undef CONFIG_CHARGER_SENSE_RESISTOR #ifdef CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR -#define CONFIG_CHARGER_SENSE_RESISTOR \ - CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR +#define CONFIG_CHARGER_SENSE_RESISTOR CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR #endif #undef CONFIG_CHARGER_SENSE_RESISTOR_AC #ifdef CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC -#define CONFIG_CHARGER_SENSE_RESISTOR_AC \ +#define CONFIG_CHARGER_SENSE_RESISTOR_AC \ CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC #endif @@ -2454,8 +2498,7 @@ extern struct jump_data mock_jump_data; #undef CONFIG_MP2964 #ifdef CONFIG_PLATFORM_EC_MP2964 #define CONFIG_MP2964 -#define I2C_ADDR_MP2964_FLAGS \ - DT_REG_ADDR(DT_NODELABEL(pmic_mp2964)) +#define I2C_ADDR_MP2964_FLAGS DT_REG_ADDR(DT_NODELABEL(pmic_mp2964)) #endif #undef CONFIG_ACCELGYRO_ICM_COMM_SPI @@ -2503,6 +2546,11 @@ extern struct jump_data mock_jump_data; #define CONFIG_PORT80_4_BYTE #endif +#undef CONFIG_PORT80_QUIET +#ifdef CONFIG_PLATFORM_EC_PORT80_QUIET +#define CONFIG_PORT80_QUIET +#endif + #undef CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT #ifdef CONFIG_PLATFORM_EC_ASSERT_CCD_MODE_ON_DTS_CONNECT #define CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT @@ -2597,4 +2645,14 @@ extern struct jump_data mock_jump_data; #define CONFIG_IO_EXPANDER_CCGXXF #endif -#endif /* __CROS_EC_CONFIG_CHIP_H */ +#undef CONFIG_PERIPHERAL_CHARGER +#ifdef CONFIG_PLATFORM_EC_PERIPHERAL_CHARGER +#define CONFIG_PERIPHERAL_CHARGER +#endif + +#undef CONFIG_CPS8100 +#ifdef CONFIG_PLATFORM_EC_CPS8100 +#define CONFIG_CPS8100 +#endif + +#endif /* __CROS_EC_CONFIG_CHIP_H */ diff --git a/zephyr/shim/include/cpu.h b/zephyr/shim/include/cpu.h index 617f644fa9..3e65aa0061 100644 --- a/zephyr/shim/include/cpu.h +++ b/zephyr/shim/include/cpu.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/cros_cbi.h b/zephyr/shim/include/cros_cbi.h index 40a2b9d8ec..1f8a1b3dfa 100644 --- a/zephyr/shim/include/cros_cbi.h +++ b/zephyr/shim/include/cros_cbi.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,18 +14,17 @@ * Macros are _INST_ types, so require DT_DRV_COMPAT to be defined. */ #define DT_DRV_COMPAT named_cbi_ssfc_value -#define CROS_CBI_LABEL "cros_cbi" +#define CROS_CBI_LABEL "cros_cbi" -#define CBI_SSFC_VALUE_COMPAT named_cbi_ssfc_value -#define CBI_SSFC_VALUE_ID(id) DT_CAT(CBI_SSFC_VALUE_, id) -#define CBI_SSFC_VALUE_ID_WITH_COMMA(id) CBI_SSFC_VALUE_ID(id), +#define CBI_SSFC_VALUE_COMPAT named_cbi_ssfc_value +#define CBI_SSFC_VALUE_ID(id) DT_CAT(CBI_SSFC_VALUE_, id) +#define CBI_SSFC_VALUE_ID_WITH_COMMA(id) CBI_SSFC_VALUE_ID(id), #define CBI_SSFC_VALUE_INST_ENUM(inst, _) \ CBI_SSFC_VALUE_ID_WITH_COMMA(DT_INST(inst, CBI_SSFC_VALUE_COMPAT)) enum cbi_ssfc_value_id { LISTIFY(DT_NUM_INST_STATUS_OKAY(CBI_SSFC_VALUE_COMPAT), - CBI_SSFC_VALUE_INST_ENUM, ()) - CBI_SSFC_VALUE_COUNT + CBI_SSFC_VALUE_INST_ENUM, ()) CBI_SSFC_VALUE_COUNT }; #undef DT_DRV_COMPAT @@ -34,19 +33,18 @@ enum cbi_ssfc_value_id { * Macros to help generate the enum list of field and value names * for the FW_CONFIG CBI data. */ -#define CBI_FW_CONFIG_COMPAT cros_ec_cbi_fw_config -#define CBI_FW_CONFIG_VALUE_COMPAT cros_ec_cbi_fw_config_value +#define CBI_FW_CONFIG_COMPAT cros_ec_cbi_fw_config +#define CBI_FW_CONFIG_VALUE_COMPAT cros_ec_cbi_fw_config_value /* * Retrieve the enum-name property for this node. */ -#define CBI_FW_CONFIG_ENUM(node) DT_STRING_TOKEN(node, enum_name) +#define CBI_FW_CONFIG_ENUM(node) DT_STRING_TOKEN(node, enum_name) /* * Create an enum entry without a value (an enum with a following comma). */ -#define CBI_FW_CONFIG_ENUM_WITH_COMMA(node) \ - CBI_FW_CONFIG_ENUM(node), +#define CBI_FW_CONFIG_ENUM_WITH_COMMA(node) CBI_FW_CONFIG_ENUM(node), /* * Create a single enum entry with assignment to the node's value, @@ -67,7 +65,7 @@ enum cbi_ssfc_value_id { enum cbi_fw_config_field_id { DT_FOREACH_STATUS_OKAY(CBI_FW_CONFIG_COMPAT, CBI_FW_CONFIG_CHILD_ENUM_LIST) - CBI_FW_CONFIG_FIELDS_COUNT + CBI_FW_CONFIG_FIELDS_COUNT }; /* @@ -76,7 +74,8 @@ enum cbi_fw_config_field_id { enum cbi_fw_config_value_id { DT_FOREACH_STATUS_OKAY(CBI_FW_CONFIG_VALUE_COMPAT, CBI_FW_CONFIG_ENUM_WITH_VALUE) - CBI_FW_CONFIG_VALUES_LAST /* added to ensure at least one entry */ + CBI_FW_CONFIG_VALUES_LAST /* added to ensure at least one entry + */ }; /** diff --git a/zephyr/shim/include/ec_tasks.h b/zephyr/shim/include/ec_tasks.h index 9b2998b64a..793beb25ae 100644 --- a/zephyr/shim/include/ec_tasks.h +++ b/zephyr/shim/include/ec_tasks.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/fpu.h b/zephyr/shim/include/fpu.h index 8f78fb587d..d1e4460827 100644 --- a/zephyr/shim/include/fpu.h +++ b/zephyr/shim/include/fpu.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -25,11 +25,7 @@ static inline float sqrtf(float v) float root; /* Use the CPU instruction */ - __asm__ volatile( - "fsqrts %0, %1" - : "=w" (root) - : "w" (v) - ); + __asm__ volatile("fsqrts %0, %1" : "=w"(root) : "w"(v)); return root; } @@ -39,11 +35,7 @@ static inline float fabsf(float v) float root; /* Use the CPU instruction */ - __asm__ volatile( - "fabss %0, %1" - : "=w" (root) - : "w" (v) - ); + __asm__ volatile("fabss %0, %1" : "=w"(root) : "w"(v)); return root; } @@ -67,6 +59,6 @@ static inline float fabsf(float v) #error "Unsupported core: please add an implementation" #endif -#endif /* CONFIG_PLATFORM_EC_FPU */ +#endif /* CONFIG_PLATFORM_EC_FPU */ -#endif /* __CROS_EC_MATH_H */ +#endif /* __CROS_EC_MATH_H */ diff --git a/zephyr/shim/include/gpio/gpio.h b/zephyr/shim/include/gpio/gpio.h index 6f92ed5795..3f95bdbbe0 100644 --- a/zephyr/shim/include/gpio/gpio.h +++ b/zephyr/shim/include/gpio/gpio.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -74,8 +74,8 @@ int gpio_config_unused_pins(void) __attribute__((weak)); */ #define UNUSED_GPIO_CONFIG_BY_IDX(i, _) \ { \ - .dev_name = DT_GPIO_LABEL_BY_IDX(UNUSED_PINS_LIST, \ - unused_gpios, i), \ + .dev_name = DEVICE_DT_NAME(DT_GPIO_CTLR_BY_IDX( \ + UNUSED_PINS_LIST, unused_gpios, i)), \ .pin = DT_GPIO_PIN_BY_IDX(UNUSED_PINS_LIST, unused_gpios, i), \ .flags = DT_GPIO_FLAGS_BY_IDX(UNUSED_PINS_LIST, unused_gpios, \ i), \ diff --git a/zephyr/shim/include/gpio/gpio_int.h b/zephyr/shim/include/gpio/gpio_int.h index 5cbddf76ca..835c5503ba 100644 --- a/zephyr/shim/include/gpio/gpio_int.h +++ b/zephyr/shim/include/gpio/gpio_int.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,8 +23,7 @@ /* * Maps nodelabel of interrupt node to internal configuration block. */ -#define GPIO_INT_FROM_NODELABEL(lbl) \ - (GPIO_INT_FROM_NODE(DT_NODELABEL(lbl))) +#define GPIO_INT_FROM_NODELABEL(lbl) (GPIO_INT_FROM_NODE(DT_NODELABEL(lbl))) /* * Unique enum name for the interrupt. @@ -34,17 +33,15 @@ /* * Create an enum list of the interrupts */ -#define GPIO_INT_ENUM_WITH_COMMA(id) GPIO_INT_ENUM(id), enum gpio_interrupts { #if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_gpio_interrupts) - DT_FOREACH_CHILD(DT_COMPAT_GET_ANY_STATUS_OKAY(cros_ec_gpio_interrupts), - GPIO_INT_ENUM_WITH_COMMA) + DT_FOREACH_CHILD_SEP( + DT_COMPAT_GET_ANY_STATUS_OKAY(cros_ec_gpio_interrupts), + GPIO_INT_ENUM, (, )), #endif - GPIO_INT_COUNT + GPIO_INT_COUNT }; -#undef GPIO_INT_ENUM_WITH_COMMA - /* * Forward reference to avoiding exposing internal structure * defined in gpio_int.c @@ -60,24 +57,24 @@ struct gpio_int_config; * ... // set up device * gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(my_interrupt_node)); */ -int gpio_enable_dt_interrupt(const struct gpio_int_config * const ic); +int gpio_enable_dt_interrupt(const struct gpio_int_config *const ic); /* * Disable the interrupt. */ -int gpio_disable_dt_interrupt(const struct gpio_int_config * const ic); +int gpio_disable_dt_interrupt(const struct gpio_int_config *const ic); /* * Get the interrupt config for this interrupt. */ const struct gpio_int_config * - gpio_interrupt_get_config(enum gpio_interrupts intr); +gpio_interrupt_get_config(enum gpio_interrupts intr); /* * Declare interrupt configuration data structures. */ -#define GPIO_INT_DECLARE(id) \ - extern const struct gpio_int_config * const GPIO_INT_FROM_NODE(id); +#define GPIO_INT_DECLARE(id) \ + extern const struct gpio_int_config *const GPIO_INT_FROM_NODE(id); #if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_gpio_interrupts) DT_FOREACH_CHILD(DT_COMPAT_GET_ANY_STATUS_OKAY(cros_ec_gpio_interrupts), diff --git a/zephyr/shim/include/hook_types.h b/zephyr/shim/include/hook_types.h index bcd1d0119c..004e5a52db 100644 --- a/zephyr/shim/include/hook_types.h +++ b/zephyr/shim/include/hook_types.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,6 +47,6 @@ HOOK_POWER_BUTTON_CHANGE, HOOK_BATTERY_SOC_CHANGE, \ HOOK_TYPES_USB_SUSPEND, HOOK_TICK, HOOK_SECOND, \ HOOK_USB_PD_DISCONNECT, HOOK_USB_PD_CONNECT, \ - HOOK_TYPES_TEST_BUILD) + HOOK_POWER_SUPPLY_CHANGE, HOOK_TYPES_TEST_BUILD) #endif diff --git a/zephyr/shim/include/i2c/i2c.h b/zephyr/shim/include/i2c/i2c.h index c7e29e79e5..3e95fbc9d3 100644 --- a/zephyr/shim/include/i2c/i2c.h +++ b/zephyr/shim/include/i2c/i2c.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,36 +12,170 @@ #ifdef CONFIG_PLATFORM_EC_I2C #if DT_NODE_EXISTS(DT_PATH(named_i2c_ports)) -#define I2C_PORT(id) DT_STRING_UPPER_TOKEN(id, enum_name) -#define I2C_PORT_WITH_COMMA(id) I2C_PORT(id), +#define NPCX_PORT_COMPAT nuvoton_npcx_i2c_port +#define ITE_IT8XXX2_PORT_COMPAT ite_it8xxx2_i2c +#define ITE_ENHANCE_PORT_COMPAT ite_enhance_i2c +#define MICROCHIP_XEC_COMPAT microchip_xec_i2c_v2 +#define I2C_EMUL_COMPAT zephyr_i2c_emul_controller +#define I2C_FOREACH_PORT(fn) \ + DT_FOREACH_STATUS_OKAY(NPCX_PORT_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY(ITE_IT8XXX2_PORT_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY(ITE_ENHANCE_PORT_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY(MICROCHIP_XEC_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY(I2C_EMUL_COMPAT, fn) +/* + * Get the legacy I2C port enum value from the I2C bus node identifier. + * The value returned by this macro is passed as the 'int port' parameter to all + * the legacy APIs provided by i2c_controller.h + * + * Example devicetree fragment: + * + * / { + * soc-if { + * i2c2_0: io_i2c_ctrl2_port0 { + * compatible = "nuvoton,npcx-i2c-port"; + * #address-cells = <1>; + * #size-cells = <0>; + * port = <0x20>; + * controller = <&i2c_ctrl2>; + * label = "I2C_2_PORT_0"; + * status = "disabled"; + * }; + * }. + * }; + * + * Example usage to get the I2C port enum value for i2c2_0: + * + * I2C_PORT_BUS(DT_NODELABEL(i2c2_0)) + * // I2C_BUS_DT_N_S_soc_if_S_io_i2c_ctrl2_port0 + * + * @param i2c_port_id: node id of a I2C port device + */ +#define I2C_PORT_BUS(i2c_port_id) DT_CAT(I2C_BUS_, i2c_port_id) +#define I2C_PORT_BUS_WITH_COMMA(i2c_port_id) I2C_PORT_BUS(i2c_port_id), + +/* + * Get the legacy I2C port enum value from a named-i2c-ports child node. + * + * Example devicetree fragment: + * + * i2c0_0: io_i2c_ctrl0_port0 { + * compatible = "nuvoton,npcx-i2c-port"; + * #address-cells = <1>; + * #size-cells = <0>; + * port = <0x00>; + * controller = <&i2c_ctrl0>; + * label = "I2C_0_PORT_0"; + * status = "disabled"; + * }; + * + * named-i2c-ports { + * compatible = "named-i2c-ports"; + * i2c_sensor: sensor { + * i2c-port = <&i2c0_0>; + * enum-names = "I2C_PORT_SENSOR"; + * }; + * }; + * + * Example usage to get the I2C port enum value for i2c_sensor: + * + * I2C_PORT(DT_NODELABEL(i2c_sensor)) + * + * which equals: + * + * I2C_PORT_BUS(DT_NODELABEL(i2c0_0)) + * + * @param i2c_named_id: node id of a child of the named-i2c-ports node + */ +#define I2C_PORT(i2c_named_id) I2C_PORT_BUS(DT_PHANDLE(i2c_named_id, i2c_port)) + +/* + * Get the legacy I2C port enum from the I2C bus nodelabel. This macro should be + * used with the I2C port device node, not the named-i2c-port child node. + * + * / { + * soc-if { + * i2c2_0: io_i2c_ctrl2_port0 { + * compatible = "nuvoton,npcx-i2c-port"; + * #address-cells = <1>; + * #size-cells = <0>; + * port = <0x20>; + * controller = <&i2c_ctrl2>; + * label = "I2C_2_PORT_0"; + * status = "disabled"; + * }; + * }. + * }; + * + * Example usage to get the I2C port enum value for i2c2_0: + * + * I2C_PORT_NODELABEL(i2c2_0) + * // I2C_BUS_DT_N_S_soc_if_S_io_i2c_ctrl2_port0 + * + * @param label: nodelabel of a I2C port device + */ +#define I2C_PORT_NODELABEL(label) I2C_PORT_BUS(DT_NODELABEL(label)) + +/* + * Get the legacy I2C port enum for a child device on an I2C bus. + * + * Example devicetree fragment: + * + * i2c2_0: io_i2c_ctrl2_port0 { + * compatible = "nuvoton,npcx-i2c-port"; + * #address-cells = <1>; + * #size-cells = <0>; + * port = <0x20>; + * controller = <&i2c_ctrl2>; + * label = "I2C_2_PORT_0"; + * status = "disabled"; + * }; + * + * &i2c2_0 { + * bc12_port0: pi3usb9201@5f { + * compatible = "pericom,pi3usb9201"; + * status = "okay"; + * reg = <0x5f>; + * irq = <&int_usb_c0_bc12>; + * }; + * }; + * + * Example usage to get the I2C port enum value for bc12_port0: + * + * I2C_PORT_BY_DEV(DT_NODELABEL(bc12_port0)) + * + * * which equals: + * + * I2C_PORT_BUS(DT_NODELABEL(i2c2_0)) + * + * @param dev_id: node id of a device on the I2C bus + */ +#define I2C_PORT_BY_DEV(dev_id) I2C_PORT_BUS(DT_BUS(dev_id)) + +enum i2c_ports_chip { + I2C_FOREACH_PORT(I2C_PORT_BUS_WITH_COMMA) I2C_PORT_COUNT +}; + +BUILD_ASSERT(I2C_PORT_COUNT != 0, "No I2C devices defined"); + +#define I2C_PORT_ENUM_IDX_COMMA(i2c_named_id, prop, idx) \ + DT_STRING_UPPER_TOKEN_BY_IDX(i2c_named_id, prop, idx) = \ + I2C_PORT(i2c_named_id), +#define NAMED_I2C_PORT_COMMA(i2c_named_id) \ + DT_FOREACH_PROP_ELEM(i2c_named_id, enum_names, I2C_PORT_ENUM_IDX_COMMA) + +/* + * The enum i2c_ports maps the hard-coded I2C port names (such as + * I2C_PORT_BATTERY or I2C_PORT_SENSOR) to the unique port numbers created by + * enum i2c_ports_chip above for every I2C port devicetree node. + */ enum i2c_ports { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), I2C_PORT_WITH_COMMA) - I2C_PORT_COUNT + DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), NAMED_I2C_PORT_COMMA) }; -#define NAMED_I2C(name) I2C_PORT(DT_PATH(named_i2c_ports, name)) #endif /* named_i2c_ports */ #endif /* CONFIG_PLATFORM_EC_I2C */ -#ifdef CONFIG_I2C_NPCX -#define I2C_COMPAT nuvoton_npcx_i2c_port -#elif CONFIG_I2C_ITE_IT8XXX2 -#define I2C_COMPAT ite_it8xxx2_i2c -#elif CONFIG_I2C_XEC_V2 -#define I2C_COMPAT microchip_xec_i2c_v2 -#elif CONFIG_I2C_EMUL -#define I2C_COMPAT zephyr_i2c_emul_controller -#else -#error An undefined I2C driver is used. -#endif - -#if defined(CONFIG_I2C_ITE_IT8XXX2) && defined(CONFIG_I2C_ITE_ENHANCE) -#define I2C_DEVICE_COUNT DT_NUM_INST_STATUS_OKAY(ite_it8xxx2_i2c) + \ - DT_NUM_INST_STATUS_OKAY(ite_enhance_i2c) -#else -#define I2C_DEVICE_COUNT DT_NUM_INST_STATUS_OKAY(I2C_COMPAT) -#endif - /** * @brief Adaptation of platform/ec's port IDs which map a port/bus to a device. * diff --git a/zephyr/shim/include/linker.h b/zephyr/shim/include/linker.h index 335f4f0f19..92dc8f5981 100644 --- a/zephyr/shim/include/linker.h +++ b/zephyr/shim/include/linker.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,6 +7,6 @@ #define __CROS_EC_LINKER_H /* Put the start of shared memory after all allocated RAM symbols */ -#define __shared_mem_buf _image_ram_end +#define __shared_mem_buf _image_ram_end #endif diff --git a/zephyr/shim/include/motionsense_sensors.h b/zephyr/shim/include/motionsense_sensors.h index f3bd6befe0..e00eae426e 100644 --- a/zephyr/shim/include/motionsense_sensors.h +++ b/zephyr/shim/include/motionsense_sensors.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,14 +14,14 @@ extern struct motion_sensor_t motion_sensors_alt[]; /* * Common macros. */ -#define SENSOR_ROT_STD_REF_NAME(id) DT_CAT(ROT_REF_, id) -#define SENSOR_ROT_REF_NODE DT_PATH(motionsense_rotation_ref) +#define SENSOR_ROT_STD_REF_NAME(id) DT_CAT(ROT_REF_, id) +#define SENSOR_ROT_REF_NODE DT_PATH(motionsense_rotation_ref) /* * Declare rotation parameters, since they may be * dynamically selected. */ -#define DECLARE_EXTERN_SENSOR_ROT_REF(id) \ +#define DECLARE_EXTERN_SENSOR_ROT_REF(id) \ extern const mat33_fp_t SENSOR_ROT_STD_REF_NAME(id); #if DT_NODE_EXISTS(SENSOR_ROT_REF_NODE) @@ -45,18 +45,18 @@ int motion_sense_probe(enum sensor_alt_id alt_idx); */ void motion_sensors_check_ssfc(void); -#define ENABLE_ALT_MOTION_SENSOR(alt_id) \ +#define ENABLE_ALT_MOTION_SENSOR(alt_id) \ motion_sensors[SENSOR_ID(DT_PHANDLE(alt_id, alternate_for))] = \ motion_sensors_alt[SENSOR_ID(alt_id)]; /* * Replaces a default motion sensor with an alternate one pointed by nodelabel. */ -#define MOTIONSENSE_ENABLE_ALTERNATE(nodelabel) \ - do { \ - BUILD_ASSERT(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \ - "Motionsense alternate node does not exist"); \ - ENABLE_ALT_MOTION_SENSOR(DT_NODELABEL(nodelabel)); \ +#define MOTIONSENSE_ENABLE_ALTERNATE(nodelabel) \ + do { \ + BUILD_ASSERT(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \ + "Motionsense alternate node does not exist"); \ + ENABLE_ALT_MOTION_SENSOR(DT_NODELABEL(nodelabel)); \ } while (0) /* diff --git a/zephyr/shim/include/motionsense_sensors_defs.h b/zephyr/shim/include/motionsense_sensors_defs.h index a9535d3b5d..ac0fc6bf56 100644 --- a/zephyr/shim/include/motionsense_sensors_defs.h +++ b/zephyr/shim/include/motionsense_sensors_defs.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,7 +10,7 @@ #include "common.h" -#define SENSOR_ID(id) DT_CAT(SENSOR_, id) +#define SENSOR_ID(id) DT_CAT(SENSOR_, id) /* Define the SENSOR_ID if: * DT_NODE_HAS_STATUS(id, okay) && !DT_NODE_HAS_PROP(id, alternate_for) @@ -24,7 +24,7 @@ enum sensor_id { #if DT_NODE_EXISTS(SENSOR_NODE) DT_FOREACH_CHILD(SENSOR_NODE, SENSOR_ID_WITH_COMMA) #endif - SENSOR_COUNT, + SENSOR_COUNT, }; #undef SENSOR_ID_WITH_COMMA @@ -39,7 +39,7 @@ enum sensor_alt_id { #if DT_NODE_EXISTS(SENSOR_ALT_NODE) DT_FOREACH_CHILD(SENSOR_ALT_NODE, SENSOR_ID_WITH_COMMA) #endif - SENSOR_ALT_COUNT, + SENSOR_ALT_COUNT, }; /* @@ -73,8 +73,8 @@ enum sensor_alt_id { * }; */ #ifdef CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_SENSOR_LID SENSOR_ID(DT_NODELABEL(lid_accel)) -#define CONFIG_LID_ANGLE_SENSOR_BASE SENSOR_ID(DT_NODELABEL(base_accel)) +#define CONFIG_LID_ANGLE_SENSOR_LID SENSOR_ID(DT_NODELABEL(lid_accel)) +#define CONFIG_LID_ANGLE_SENSOR_BASE SENSOR_ID(DT_NODELABEL(base_accel)) #endif /* @@ -90,12 +90,11 @@ enum sensor_alt_id { * }; */ #if DT_NODE_HAS_PROP(SENSOR_INFO_NODE, accel_force_mode_sensors) -#define SENSOR_IN_FORCE_MODE(i, id) \ +#define SENSOR_IN_FORCE_MODE(i, id) \ | BIT(SENSOR_ID(DT_PHANDLE_BY_IDX(id, accel_force_mode_sensors, i))) -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - (0 LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, \ - accel_force_mode_sensors), SENSOR_IN_FORCE_MODE, (), \ - SENSOR_INFO_NODE)) +#define CONFIG_ACCEL_FORCE_MODE_MASK \ + (0 LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, accel_force_mode_sensors), \ + SENSOR_IN_FORCE_MODE, (), SENSOR_INFO_NODE)) #endif #endif /* __CROS_EC_MOTIONSENSE_SENSORS_DEFS_H */ diff --git a/zephyr/shim/include/mpu.h b/zephyr/shim/include/mpu.h index 3555ef0db1..29771c9fe0 100644 --- a/zephyr/shim/include/mpu.h +++ b/zephyr/shim/include/mpu.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/power/power.h b/zephyr/shim/include/power/power.h index 6ea2444705..1e780646af 100644 --- a/zephyr/shim/include/power/power.h +++ b/zephyr/shim/include/power/power.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,63 +9,36 @@ #include <zephyr/devicetree.h> #include <zephyr/drivers/gpio.h> -#define POWER_SIGNAL_LIST_NODE \ - DT_NODELABEL(power_signal_list) +#define POWER_SIGNAL_LIST_NODE DT_NODELABEL(power_signal_list) -#define SYSTEM_DT_POWER_SIGNAL_CONFIG \ - DT_NODE_EXISTS(POWER_SIGNAL_LIST_NODE) +#define SYSTEM_DT_POWER_SIGNAL_CONFIG DT_NODE_EXISTS(POWER_SIGNAL_LIST_NODE) #if (SYSTEM_DT_POWER_SIGNAL_CONFIG) -#define GEN_POWER_SIGNAL_STRUCT_ENTRY_GPIO(cid) \ - DT_STRING_UPPER_TOKEN( \ - DT_PROP( \ - cid, \ - power_gpio_pin \ - ), \ - enum_name \ - ) -#define GEN_POWER_SIGNAL_STRUCT_ENTRY_FLAGS(cid) \ -( \ - DT_GPIO_FLAGS( \ - DT_PROP( \ - cid, \ - power_gpio_pin \ - ), \ - gpios \ - ) & GPIO_ACTIVE_LOW \ - ? POWER_SIGNAL_ACTIVE_LOW \ - : POWER_SIGNAL_ACTIVE_HIGH \ -) -#define GEN_POWER_SIGNAL_STRUCT_ENTRY_NAME(cid) \ - DT_PROP( \ - cid, \ - power_enum_name \ - ) - -#define GEN_POWER_SIGNAL_STRUCT_ENTRY(cid) \ -{ \ - .gpio = GEN_POWER_SIGNAL_STRUCT_ENTRY_GPIO(cid), \ - .flags = GEN_POWER_SIGNAL_STRUCT_ENTRY_FLAGS(cid), \ - .name = GEN_POWER_SIGNAL_STRUCT_ENTRY_NAME(cid) \ -} -#define GEN_POWER_SIGNAL_STRUCT(cid) \ - [GEN_POWER_SIGNAL_ENUM_ENTRY(cid)] = \ - GEN_POWER_SIGNAL_STRUCT_ENTRY(cid), - - -#define GEN_POWER_SIGNAL_ENUM_ENTRY(cid) \ - DT_STRING_UPPER_TOKEN( \ - cid, \ - power_enum_name \ - ) -#define GEN_POWER_SIGNAL_ENUM_ENTRY_COMMA(cid) \ - GEN_POWER_SIGNAL_ENUM_ENTRY(cid), +#define GEN_POWER_SIGNAL_STRUCT_ENTRY_GPIO(cid) \ + DT_STRING_UPPER_TOKEN(DT_PROP(cid, power_gpio_pin), enum_name) +#define GEN_POWER_SIGNAL_STRUCT_ENTRY_FLAGS(cid) \ + (DT_GPIO_FLAGS(DT_PROP(cid, power_gpio_pin), gpios) & \ + GPIO_ACTIVE_LOW ? \ + POWER_SIGNAL_ACTIVE_LOW : \ + POWER_SIGNAL_ACTIVE_HIGH) +#define GEN_POWER_SIGNAL_STRUCT_ENTRY_NAME(cid) DT_PROP(cid, power_enum_name) + +#define GEN_POWER_SIGNAL_STRUCT_ENTRY(cid) \ + { \ + .gpio = GEN_POWER_SIGNAL_STRUCT_ENTRY_GPIO(cid), \ + .flags = GEN_POWER_SIGNAL_STRUCT_ENTRY_FLAGS(cid), \ + .name = GEN_POWER_SIGNAL_STRUCT_ENTRY_NAME(cid) \ + } +#define GEN_POWER_SIGNAL_STRUCT(cid) \ + [GEN_POWER_SIGNAL_ENUM_ENTRY(cid)] = GEN_POWER_SIGNAL_STRUCT_ENTRY(cid), + +#define GEN_POWER_SIGNAL_ENUM_ENTRY(cid) \ + DT_STRING_UPPER_TOKEN(cid, power_enum_name) enum power_signal { - DT_FOREACH_CHILD( - POWER_SIGNAL_LIST_NODE, - GEN_POWER_SIGNAL_ENUM_ENTRY_COMMA) + DT_FOREACH_CHILD_SEP(POWER_SIGNAL_LIST_NODE, + GEN_POWER_SIGNAL_ENUM_ENTRY, (, )), POWER_SIGNAL_COUNT }; @@ -73,11 +46,8 @@ enum power_signal { * Verify the number of required power-signals are specified in * the DeviceTree */ -#define POWER_SIGNALS_REQUIRED \ - DT_PROP( \ - POWER_SIGNAL_LIST_NODE, \ - power_signals_required \ - ) +#define POWER_SIGNALS_REQUIRED \ + DT_PROP(POWER_SIGNAL_LIST_NODE, power_signals_required) BUILD_ASSERT(POWER_SIGNALS_REQUIRED == POWER_SIGNAL_COUNT); #endif /* SYSTEM_DT_POWER_SIGNAL_CONFIG */ diff --git a/zephyr/shim/include/power_host_sleep.h b/zephyr/shim/include/power_host_sleep.h index cc7fe04847..8bc23fc785 100644 --- a/zephyr/shim/include/power_host_sleep.h +++ b/zephyr/shim/include/power_host_sleep.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -24,31 +24,31 @@ /* power.h */ enum power_state { /* Steady states */ - POWER_G3 = 0, /* - * System is off (not technically all the way into G3, - * which means totally unpowered...) - */ - POWER_S5, /* System is soft-off */ - POWER_S4, /* System is suspended to disk */ - POWER_S3, /* Suspend; RAM on, processor is asleep */ - POWER_S0, /* System is on */ + POWER_G3 = 0, /* + * System is off (not technically all the way into G3, + * which means totally unpowered...) + */ + POWER_S5, /* System is soft-off */ + POWER_S4, /* System is suspended to disk */ + POWER_S3, /* Suspend; RAM on, processor is asleep */ + POWER_S0, /* System is on */ #if CONFIG_AP_PWRSEQ_S0IX POWER_S0ix, #endif /* Transitions */ - POWER_G3S5, /* G3 -> S5 (at system init time) */ - POWER_S5S3, /* S5 -> S3 (skips S4 on non-Intel systems) */ - POWER_S3S0, /* S3 -> S0 */ - POWER_S0S3, /* S0 -> S3 */ - POWER_S3S5, /* S3 -> S5 (skips S4 on non-Intel systems) */ - POWER_S5G3, /* S5 -> G3 */ - POWER_S3S4, /* S3 -> S4 */ - POWER_S4S3, /* S4 -> S3 */ - POWER_S4S5, /* S4 -> S5 */ - POWER_S5S4, /* S5 -> S4 */ + POWER_G3S5, /* G3 -> S5 (at system init time) */ + POWER_S5S3, /* S5 -> S3 (skips S4 on non-Intel systems) */ + POWER_S3S0, /* S3 -> S0 */ + POWER_S0S3, /* S0 -> S3 */ + POWER_S3S5, /* S3 -> S5 (skips S4 on non-Intel systems) */ + POWER_S5G3, /* S5 -> G3 */ + POWER_S3S4, /* S3 -> S4 */ + POWER_S4S3, /* S4 -> S3 */ + POWER_S4S5, /* S4 -> S5 */ + POWER_S5S4, /* S5 -> S4 */ #if CONFIG_AP_PWRSEQ_S0IX - POWER_S0ixS0, /* S0ix -> S0 */ - POWER_S0S0ix, /* S0 -> S0ix */ + POWER_S0ixS0, /* S0ix -> S0 */ + POWER_S0S0ix, /* S0 -> S0ix */ #endif }; @@ -56,12 +56,11 @@ enum power_state { /* Context to pass to a host sleep command handler. */ struct host_sleep_event_context { uint32_t sleep_transitions; /* Number of sleep transitions observed */ - uint16_t sleep_timeout_ms; /* Timeout in milliseconds */ + uint16_t sleep_timeout_ms; /* Timeout in milliseconds */ }; void ap_power_chipset_handle_host_sleep_event( - enum host_sleep_event state, - struct host_sleep_event_context *ctx); + enum host_sleep_event state, struct host_sleep_event_context *ctx); void power_set_host_sleep_state(enum host_sleep_event state); #endif /* CONFIG_AP_PWRSEQ_HOST_SLEEP */ diff --git a/zephyr/shim/include/registers.h b/zephyr/shim/include/registers.h index b693733a21..f17b05f5f8 100644 --- a/zephyr/shim/include/registers.h +++ b/zephyr/shim/include/registers.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/shimmed_task_id.h b/zephyr/shim/include/shimmed_task_id.h index 31df4daece..1a29acafdf 100644 --- a/zephyr/shim/include/shimmed_task_id.h +++ b/zephyr/shim/include/shimmed_task_id.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,14 +14,13 @@ typedef uint8_t task_id_t; /* * Bitmask of port enable bits, expanding to a value like `BIT(0) | BIT(2) | 0`. */ -#define PD_INT_SHARED_PORT_MASK ( \ - FOR_EACH_NONEMPTY_TERM(BIT, (|), \ - IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED, (0)), \ - IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_1_SHARED, (1)), \ - IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_2_SHARED, (2)), \ - IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_3_SHARED, (3)), \ - ) 0 \ -) +#define PD_INT_SHARED_PORT_MASK \ + (FOR_EACH_NONEMPTY_TERM( \ + BIT, (|), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED, (0)), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_1_SHARED, (1)), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_2_SHARED, (2)), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_3_SHARED, (3)), ) 0) /* Highest priority on bottom -- same as in platform/ec. */ enum { @@ -29,10 +28,6 @@ enum { EC_SYSWORKQ_PRIO = EC_TASK_PRIO_LOWEST, EC_TASK_CHG_RAMP_PRIO, EC_TASK_USB_CHG_PRIO, - EC_TASK_USB_CHG_P0_PRIO, - EC_TASK_USB_CHG_P1_PRIO, - EC_TASK_USB_CHG_P2_PRIO, - EC_TASK_USB_CHG_P3_PRIO, EC_TASK_DPS_PRIO, EC_TASK_CHARGER_PRIO, EC_TASK_CHIPSET_PRIO, @@ -64,104 +59,106 @@ enum { * CONFIG_HAS_TEST_TASKS and not CONFIG_SHIMMED_TASKS. */ #ifdef CONFIG_SHIMMED_TASKS -#define CROS_EC_TASK_LIST \ - COND_CODE_1(HAS_TASK_CHG_RAMP, \ - (CROS_EC_TASK(CHG_RAMP, chg_ramp_task, 0, \ - CONFIG_TASK_CHG_RAMP_STACK_SIZE, \ - EC_TASK_CHG_RAMP_PRIO)), ()) \ - COND_CODE_1(CONFIG_PLATFORM_EC_USB_CHARGER_SINGLE_TASK, \ - (CROS_EC_TASK(USB_CHG, usb_charger_task_shared, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE, \ - EC_TASK_USB_CHG_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P0, \ - (CROS_EC_TASK(USB_CHG_P0, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE, \ - EC_TASK_USB_CHG_P0_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P1, \ - (CROS_EC_TASK(USB_CHG_P1, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE, \ - EC_TASK_USB_CHG_P1_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P2, \ - (CROS_EC_TASK(USB_CHG_P2, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE, \ - EC_TASK_USB_CHG_P2_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_USB_CHG_P3, \ - (CROS_EC_TASK(USB_CHG_P3, usb_charger_task, 0, \ - CONFIG_TASK_USB_CHG_STACK_SIZE, \ - EC_TASK_USB_CHG_P3_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_DPS, \ - (CROS_EC_TASK(DPS, dps_task, 0, \ - CONFIG_TASK_DPS_STACK_SIZE, \ - EC_TASK_DPS_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_CHARGER, \ - (CROS_EC_TASK(CHARGER, charger_task, 0, \ - CONFIG_TASK_CHARGER_STACK_SIZE, \ - EC_TASK_CHARGER_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_CHIPSET, \ - (CROS_EC_TASK(CHIPSET, chipset_task, 0, \ - CONFIG_TASK_CHIPSET_STACK_SIZE, \ - EC_TASK_CHIPSET_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_MOTIONSENSE, \ - (CROS_EC_TASK(MOTIONSENSE, motion_sense_task, 0, \ - CONFIG_TASK_MOTIONSENSE_STACK_SIZE, \ - EC_TASK_MOTIONSENSE_PRIO)), ()) \ - IF_ENABLED(HAS_TASK_USB_MUX, \ - (CROS_EC_TASK(USB_MUX, usb_mux_task, 0, \ - CONFIG_TASK_USB_MUX_STACK_SIZE, \ - EC_TASK_USB_MUX_PRIO))) \ - COND_CODE_1(CONFIG_TASK_HOSTCMD_THREAD_DEDICATED, \ - (CROS_EC_TASK(HOSTCMD, host_command_task, 0, \ - CONFIG_TASK_HOSTCMD_STACK_SIZE, \ - EC_TASK_HOSTCMD_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_KEYPROTO, \ - (CROS_EC_TASK(KEYPROTO, keyboard_protocol_task, 0, \ - CONFIG_TASK_KEYPROTO_STACK_SIZE, \ - EC_TASK_KEYPROTO_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_POWERBTN, \ - (CROS_EC_TASK(POWERBTN, power_button_task, 0, \ - CONFIG_TASK_POWERBTN_STACK_SIZE, \ - EC_TASK_POWERBTN_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_KEYSCAN, \ - (CROS_EC_TASK(KEYSCAN, keyboard_scan_task, 0, \ - CONFIG_TASK_KEYSCAN_STACK_SIZE, \ - EC_TASK_KEYSCAN_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_C0, \ - (CROS_EC_TASK(PD_C0, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE, \ - EC_TASK_PD_C0_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_C1, \ - (CROS_EC_TASK(PD_C1, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE, \ - EC_TASK_PD_C1_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_C2, \ - (CROS_EC_TASK(PD_C2, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE, \ - EC_TASK_PD_C2_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_C3, \ - (CROS_EC_TASK(PD_C3, pd_task, 0, \ - CONFIG_TASK_PD_STACK_SIZE, \ - EC_TASK_PD_C3_PRIO)), ()) \ - IF_ENABLED(CONFIG_HAS_TASK_PD_INT_SHARED, \ - (CROS_EC_TASK(PD_INT_SHARED, pd_shared_alert_task, \ - PD_INT_SHARED_PORT_MASK, \ - CONFIG_TASK_PD_INT_STACK_SIZE, \ - EC_TASK_PD_INT_SHARED_PRIO))) \ - COND_CODE_1(HAS_TASK_PD_INT_C0, \ - (CROS_EC_TASK(PD_INT_C0, pd_interrupt_handler_task, 0, \ - CONFIG_TASK_PD_INT_STACK_SIZE, \ - EC_TASK_PD_INT_C0_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C1, \ - (CROS_EC_TASK(PD_INT_C1, pd_interrupt_handler_task, 1, \ - CONFIG_TASK_PD_INT_STACK_SIZE, \ - EC_TASK_PD_INT_C1_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C2, \ - (CROS_EC_TASK(PD_INT_C2, pd_interrupt_handler_task, 2, \ - CONFIG_TASK_PD_INT_STACK_SIZE, \ - EC_TASK_PD_INT_C2_PRIO)), ()) \ - COND_CODE_1(HAS_TASK_PD_INT_C3, \ - (CROS_EC_TASK(PD_INT_C3, pd_interrupt_handler_task, 3, \ - CONFIG_TASK_PD_INT_STACK_SIZE, \ - EC_TASK_PD_INT_C3_PRIO)), ()) +#define CROS_EC_TASK_LIST \ + COND_CODE_1(HAS_TASK_CHG_RAMP, \ + (CROS_EC_TASK(CHG_RAMP, chg_ramp_task, 0, \ + CONFIG_TASK_CHG_RAMP_STACK_SIZE, \ + EC_TASK_CHG_RAMP_PRIO)), \ + ()) \ + COND_CODE_1(CONFIG_PLATFORM_EC_USB_CHARGER, \ + (CROS_EC_TASK(USB_CHG, usb_charger_task_shared, 0, \ + CONFIG_TASK_USB_CHG_STACK_SIZE, \ + EC_TASK_USB_CHG_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_DPS, \ + (CROS_EC_TASK(DPS, dps_task, 0, \ + CONFIG_TASK_DPS_STACK_SIZE, \ + EC_TASK_DPS_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_CHARGER, \ + (CROS_EC_TASK(CHARGER, charger_task, 0, \ + CONFIG_TASK_CHARGER_STACK_SIZE, \ + EC_TASK_CHARGER_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_CHIPSET, \ + (CROS_EC_TASK(CHIPSET, chipset_task, 0, \ + CONFIG_TASK_CHIPSET_STACK_SIZE, \ + EC_TASK_CHIPSET_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_MOTIONSENSE, \ + (CROS_EC_TASK(MOTIONSENSE, motion_sense_task, 0, \ + CONFIG_TASK_MOTIONSENSE_STACK_SIZE, \ + EC_TASK_MOTIONSENSE_PRIO)), \ + ()) \ + IF_ENABLED(HAS_TASK_USB_MUX, \ + (CROS_EC_TASK(USB_MUX, usb_mux_task, 0, \ + CONFIG_TASK_USB_MUX_STACK_SIZE, \ + EC_TASK_USB_MUX_PRIO))) \ + COND_CODE_1(CONFIG_TASK_HOSTCMD_THREAD_DEDICATED, \ + (CROS_EC_TASK(HOSTCMD, host_command_task, 0, \ + CONFIG_TASK_HOSTCMD_STACK_SIZE, \ + EC_TASK_HOSTCMD_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_KEYPROTO, \ + (CROS_EC_TASK(KEYPROTO, keyboard_protocol_task, 0, \ + CONFIG_TASK_KEYPROTO_STACK_SIZE, \ + EC_TASK_KEYPROTO_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_POWERBTN, \ + (CROS_EC_TASK(POWERBTN, power_button_task, 0, \ + CONFIG_TASK_POWERBTN_STACK_SIZE, \ + EC_TASK_POWERBTN_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_KEYSCAN, \ + (CROS_EC_TASK(KEYSCAN, keyboard_scan_task, 0, \ + CONFIG_TASK_KEYSCAN_STACK_SIZE, \ + EC_TASK_KEYSCAN_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_C0, \ + (CROS_EC_TASK(PD_C0, pd_task, 0, \ + CONFIG_TASK_PD_STACK_SIZE, \ + EC_TASK_PD_C0_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_C1, \ + (CROS_EC_TASK(PD_C1, pd_task, 0, \ + CONFIG_TASK_PD_STACK_SIZE, \ + EC_TASK_PD_C1_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_C2, \ + (CROS_EC_TASK(PD_C2, pd_task, 0, \ + CONFIG_TASK_PD_STACK_SIZE, \ + EC_TASK_PD_C2_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_C3, \ + (CROS_EC_TASK(PD_C3, pd_task, 0, \ + CONFIG_TASK_PD_STACK_SIZE, \ + EC_TASK_PD_C3_PRIO)), \ + ()) \ + IF_ENABLED(CONFIG_HAS_TASK_PD_INT_SHARED, \ + (CROS_EC_TASK(PD_INT_SHARED, pd_shared_alert_task, \ + PD_INT_SHARED_PORT_MASK, \ + CONFIG_TASK_PD_INT_STACK_SIZE, \ + EC_TASK_PD_INT_SHARED_PRIO))) \ + COND_CODE_1(HAS_TASK_PD_INT_C0, \ + (CROS_EC_TASK(PD_INT_C0, pd_interrupt_handler_task, 0, \ + CONFIG_TASK_PD_INT_STACK_SIZE, \ + EC_TASK_PD_INT_C0_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_INT_C1, \ + (CROS_EC_TASK(PD_INT_C1, pd_interrupt_handler_task, 1, \ + CONFIG_TASK_PD_INT_STACK_SIZE, \ + EC_TASK_PD_INT_C1_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_INT_C2, \ + (CROS_EC_TASK(PD_INT_C2, pd_interrupt_handler_task, 2, \ + CONFIG_TASK_PD_INT_STACK_SIZE, \ + EC_TASK_PD_INT_C2_PRIO)), \ + ()) \ + COND_CODE_1(HAS_TASK_PD_INT_C3, \ + (CROS_EC_TASK(PD_INT_C3, pd_interrupt_handler_task, 3, \ + CONFIG_TASK_PD_INT_STACK_SIZE, \ + EC_TASK_PD_INT_C3_PRIO)), \ + ()) #elif defined(CONFIG_HAS_TEST_TASKS) #include "shimmed_test_tasks.h" /* @@ -191,7 +188,7 @@ enum { TASK_ID_IDLE = -1, /* We don't shim the idle task */ CROS_EC_TASK_LIST #ifdef TEST_BUILD - TASK_ID_TEST_RUNNER, + TASK_ID_TEST_RUNNER, #endif TASK_ID_COUNT, TASK_ID_INVALID = 0xff, /* Unable to find the task */ @@ -203,20 +200,17 @@ enum { * Additional task IDs for features that runs on non shimmed threads, * task_get_current() needs to be updated to identify these ones. */ -#define CROS_EC_EXTRA_TASKS(fn) \ +#define CROS_EC_EXTRA_TASKS(fn) \ COND_CODE_1(CONFIG_TASK_HOSTCMD_THREAD_MAIN, (fn(HOSTCMD)), ()) \ fn(SYSWORKQ) #define EXTRA_TASK_INTERNAL_ID(name) EXTRA_TASK_##name, enum { - CROS_EC_EXTRA_TASKS(EXTRA_TASK_INTERNAL_ID) - EXTRA_TASK_COUNT, + CROS_EC_EXTRA_TASKS(EXTRA_TASK_INTERNAL_ID) EXTRA_TASK_COUNT, }; #define EXTRA_TASK_ID(name) \ TASK_ID_##name = (TASK_ID_COUNT + EXTRA_TASK_##name), -enum { - CROS_EC_EXTRA_TASKS(EXTRA_TASK_ID) -}; +enum { CROS_EC_EXTRA_TASKS(EXTRA_TASK_ID) }; #endif /* __CROS_EC_SHIMMED_TASK_ID_H */ diff --git a/zephyr/shim/include/shimmed_tasks.h b/zephyr/shim/include/shimmed_tasks.h index d1fb6129d3..75be968f4a 100644 --- a/zephyr/shim/include/shimmed_tasks.h +++ b/zephyr/shim/include/shimmed_tasks.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/temp_sensor/temp_sensor.h b/zephyr/shim/include/temp_sensor/temp_sensor.h index 2c6eabe485..9be18987eb 100644 --- a/zephyr/shim/include/temp_sensor/temp_sensor.h +++ b/zephyr/shim/include/temp_sensor/temp_sensor.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,53 +8,134 @@ #include <zephyr/devicetree.h> #include "include/temp_sensor.h" +#include "charger/chg_rt9490.h" #ifdef CONFIG_PLATFORM_EC_TEMP_SENSOR -#define ZSHIM_TEMP_SENSOR_ID(node_id) DT_STRING_UPPER_TOKEN(node_id, enum_name) -#define TEMP_SENSOR_ID_WITH_COMMA(node_id) ZSHIM_TEMP_SENSOR_ID(node_id), +#define PCT2075_COMPAT nxp_pct2075 +#define TMP112_COMPAT cros_ec_temp_sensor_tmp112 +#define SB_TSI_COMPAT amd_sb_tsi +#define THERMISTOR_COMPAT cros_ec_temp_sensor_thermistor +#define TEMP_SENSORS_COMPAT cros_ec_temp_sensors + +#define TEMP_SENSORS_NODEID DT_INST(0, TEMP_SENSORS_COMPAT) + +#define TEMP_RT9490_FN(node_id, fn) \ + COND_CODE_1(DT_NODE_HAS_PROP(node_id, thermistor), (fn(node_id)), ()) + +#define FOREACH_TEMP_SENSOR(fn) \ + DT_FOREACH_STATUS_OKAY(PCT2075_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY(TMP112_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY_VARGS(RT9490_CHG_COMPAT, TEMP_RT9490_FN, fn) \ + DT_FOREACH_STATUS_OKAY(SB_TSI_COMPAT, fn) \ + DT_FOREACH_STATUS_OKAY(THERMISTOR_COMPAT, fn) #define HAS_POWER_GOOD_PIN(node_id) DT_NODE_HAS_PROP(node_id, power_good_pin) || -#define ANY_INST_HAS_POWER_GOOD_PIN \ - (DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor, HAS_POWER_GOOD_PIN) \ - 0) + +#define ANY_INST_HAS_POWER_GOOD_PIN \ + (DT_FOREACH_CHILD(TEMP_SENSORS_NODEID, HAS_POWER_GOOD_PIN) 0) + +/* + * Get the enum temp_sensor_id value from a child node under + * "cros-ec,temp-sensors". + * + * Example devicetree fragment: + * + * temp_charger_thermistor: charger-thermistor { + * compatible = "cros-ec,temp-sensor-thermistor"; + * thermistor = <&thermistor_3V3_30K9_47K_4050B>; + * adc = <&adc_temp_charger>; + * }; + * + * named-temp-sensors { + * compatible = "cros-ec,temp-sensors"; + * temp_charger: charger-thermistor { + * temp_host_high = <100>; + * temp_host_halt = <105>; + * temp_host_release_high = <80>; + * sensor = <&temp_charger_thermistor>; + * }; + * }; + * + * Example usage to get the temperature sensor ID: + * + * TEMP_SENSOR_ID(DT_NODELABEL(temp_charger)) + * + * @param node_id: node id of a child of "cros-ec,temp-sensors" node + */ +#define TEMP_SENSOR_ID(node_id) DT_CAT(TEMP_SENSOR_, node_id) + +/* + * Get the enum temp_sensor_id value from a hardware device node. + * + * Example devicetree fragment: + * + * temp_charger_thermistor: charger-thermistor { + * compatible = "cros-ec,temp-sensor-thermistor"; + * thermistor = <&thermistor_3V3_30K9_47K_4050B>; + * adc = <&adc_temp_charger>; + * }; + * + * named-temp-sensors { + * compatible = "cros-ec,temp-sensors"; + * temp_charger: charger-thermistor { + * temp_host_high = <100>; + * temp_host_halt = <105>; + * temp_host_release_high = <80>; + * sensor = <&temp_charger_thermistor>; + * }; + * }; + * + * Example usage to get the temperature sensor ID: + * + * TEMP_SENSOR_ID_BY_DEV(DT_NODELABEL(temp_charger_thermistor)) + * + * which equals: + * + * TEMP_SENSOR_ID(DT_NODELABEL(temp_charger)) + * + * @param node_id: node id of a hardware device node + */ +#define TEMP_SENSOR_ID_BY_DEV(node_id) DT_CAT(TEMP_SENSOR_DEV, node_id) + +#define TEMP_SENSOR_ID_DEV(named_id) \ + TEMP_SENSOR_ID_BY_DEV(DT_PHANDLE(named_id, sensor)) = \ + TEMP_SENSOR_ID(named_id) enum temp_sensor_id { -#if DT_NODE_EXISTS(DT_PATH(named_temp_sensors)) - DT_FOREACH_CHILD(DT_PATH(named_temp_sensors), - TEMP_SENSOR_ID_WITH_COMMA) -#endif /* named_temp_sensors */ - TEMP_SENSOR_COUNT + DT_FOREACH_CHILD_SEP(TEMP_SENSORS_NODEID, TEMP_SENSOR_ID, (, )), + DT_FOREACH_CHILD_SEP(TEMP_SENSORS_NODEID, TEMP_SENSOR_ID_DEV, (, )), + TEMP_SENSOR_COUNT, }; -#undef TEMP_SENSOR_ID_WITH_COMMA - /* PCT2075 access array */ -#define ZSHIM_PCT2075_SENSOR_ID(node_id) DT_STRING_UPPER_TOKEN(node_id, \ - pct2075_name) -#define PCT2075_SENSOR_ID_WITH_COMMA(node_id) ZSHIM_PCT2075_SENSOR_ID(node_id), +/* + * Get the PCT2075 sensor ID from a hardware device node. + * + * @param node_id: node id of a hardware PCT2075 sensor node + */ +#define PCT2075_SENSOR_ID(node_id) DT_CAT(PCT2075_, node_id) +#define PCT2075_SENSOR_ID_WITH_COMMA(node_id) PCT2075_SENSOR_ID(node_id), enum pct2075_sensor { -#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_temp_sensor_pct2075) - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_pct2075, - PCT2075_SENSOR_ID_WITH_COMMA) -#endif - PCT2075_COUNT, + DT_FOREACH_STATUS_OKAY(PCT2075_COMPAT, PCT2075_SENSOR_ID_WITH_COMMA) + PCT2075_COUNT, }; #undef PCT2075_SENSOR_ID_WITH_COMMA /* TMP112 access array */ -#define ZSHIM_TMP112_SENSOR_ID(node_id) DT_STRING_UPPER_TOKEN(node_id, \ - tmp112_name) -#define TMP112_SENSOR_ID_WITH_COMMA(node_id) ZSHIM_TMP112_SENSOR_ID(node_id), +/* + * Get the TMP112 sensor ID from a hardware device node. + * + * @param node_id: node id of a hardware TMP112 sensor node + */ +#define TMP112_SENSOR_ID(node_id) DT_CAT(TMP112_, node_id) +#define TMP112_SENSOR_ID_WITH_COMMA(node_id) TMP112_SENSOR_ID(node_id), enum tmp112_sensor { -#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_temp_sensor_tmp112) - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_tmp112, - TMP112_SENSOR_ID_WITH_COMMA) -#endif - TMP112_COUNT, + DT_FOREACH_STATUS_OKAY(TMP112_COMPAT, TMP112_SENSOR_ID_WITH_COMMA) + TMP112_COUNT, }; #undef TMP112_SENSOR_ID_WITH_COMMA @@ -62,11 +143,11 @@ enum tmp112_sensor { struct zephyr_temp_sensor { /* Read sensor value in K into temp_ptr; return non-zero if error. */ int (*read)(const struct temp_sensor_t *sensor, int *temp_ptr); - struct thermistor_info *thermistor; + const struct thermistor_info *thermistor; #if ANY_INST_HAS_POWER_GOOD_PIN const struct device *power_good_dev; gpio_pin_t power_good_pin; -#endif +#endif /* ANY_INST_HAS_POWER_GOOD_PIN */ }; #endif /* CONFIG_PLATFORM_EC_TEMP_SENSOR */ diff --git a/zephyr/shim/include/usbc/amd_fp6_usb_mux.h b/zephyr/shim/include/usbc/amd_fp6_usb_mux.h new file mode 100644 index 0000000000..a474a4eee4 --- /dev/null +++ b/zephyr/shim/include/usbc/amd_fp6_usb_mux.h @@ -0,0 +1,21 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_AMD_FP6_USB_MUX_H +#define __ZEPHYR_SHIM_AMD_FP6_USB_MUX_H + +#include "usb_mux.h" + +#define AMD_FP6_USB_MUX_COMPAT amd_usbc_mux_amd_fp6 + +#define USB_MUX_CONFIG_AMD_FP6(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &amd_fp6_usb_mux_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ + } + +#endif /* __ZEPHYR_SHIM_AMD_FP6_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/anx7447_usb_mux.h b/zephyr/shim/include/usbc/anx7447_usb_mux.h new file mode 100644 index 0000000000..874958c04c --- /dev/null +++ b/zephyr/shim/include/usbc/anx7447_usb_mux.h @@ -0,0 +1,22 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_ANX7447_USB_MUX_H +#define __ZEPHYR_SHIM_ANX7447_USB_MUX_H + +#include "tcpm/anx7447_public.h" + +#define ANX7447_USB_MUX_COMPAT analogix_usbc_mux_anx7447 + +#define USB_MUX_CONFIG_ANX7447(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &anx7447_usb_mux_driver, \ + .hpd_update = COND_CODE_1( \ + DT_PROP(mux_id, hpd_update_enable), \ + (&anx7447_tcpc_update_hpd_status), (NULL)), \ + } + +#endif /* __ZEPHYR_SHIM_ANX7447_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/anx7483_usb_mux.h b/zephyr/shim/include/usbc/anx7483_usb_mux.h index 606928b016..5e56837e3a 100644 --- a/zephyr/shim/include/usbc/anx7483_usb_mux.h +++ b/zephyr/shim/include/usbc/anx7483_usb_mux.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,15 +8,14 @@ #include "driver/retimer/anx7483_public.h" -#define ANX7483_USB_MUX_COMPAT analogix_anx7483 +#define ANX7483_USB_MUX_COMPAT analogix_anx7483 -#define USB_MUX_CONFIG_ANX7483(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &anx7483_usb_retimer_driver, \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = \ - DT_STRING_UPPER_TOKEN(mux_id, i2c_addr_flags), \ +#define USB_MUX_CONFIG_ANX7483(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &anx7483_usb_retimer_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ } #endif /* __ZEPHYR_SHIM_ANX7483_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/bb_retimer_usb_mux.h b/zephyr/shim/include/usbc/bb_retimer_usb_mux.h index 611c52e081..64e1e2693d 100644 --- a/zephyr/shim/include/usbc/bb_retimer_usb_mux.h +++ b/zephyr/shim/include/usbc/bb_retimer_usb_mux.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,23 +10,100 @@ #define BB_RETIMER_USB_MUX_COMPAT intel_jhl8040r -#define USB_MUX_CONFIG_BB_RETIMER(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &bb_usb_retimer, \ - .hpd_update = bb_retimer_hpd_update, \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = DT_PROP(mux_id, i2c_addr_flags), \ +#define USB_MUX_CONFIG_BB_RETIMER(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &bb_usb_retimer, \ + .hpd_update = bb_retimer_hpd_update, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ } -#define BB_RETIMER_CONTROLS_CONFIG(mux_id, port_id, idx) \ - { \ - .retimer_rst_gpio = \ - GPIO_SIGNAL(DT_PHANDLE(mux_id, reset_pin)), \ - .usb_ls_en_gpio = COND_CODE_1( \ - DT_NODE_HAS_PROP(mux_id, ls_en_pin), \ - (GPIO_SIGNAL(DT_PHANDLE(mux_id, ls_en_pin))), \ - (GPIO_UNIMPLEMENTED)), \ +/** + * @brief Get reset gpio for @p mux_id retimer + * + * @param mux_id BB retimer DTS node + */ +#define BB_RETIMER_RESET_GPIO(mux_id) GPIO_SIGNAL(DT_PHANDLE(mux_id, reset_pin)) + +/** + * @brief Get LS_EN gpio for @p mux_id retimer + * + * @param mux_id BB retimer DTS node + */ +#define BB_RETIMER_LS_EN_GPIO(mux_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(mux_id, ls_en_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(mux_id, ls_en_pin))), \ + (GPIO_UNIMPLEMENTED)) + +#define BB_RETIMER_CONTROLS_CONFIG(mux_id) \ + { \ + .retimer_rst_gpio = BB_RETIMER_RESET_GPIO(mux_id), \ + .usb_ls_en_gpio = BB_RETIMER_LS_EN_GPIO(mux_id), \ } +/** + * @brief Set entry in bb_controls array + * + * @param mux_id BB retimer node ID + */ +#define USB_MUX_BB_RETIMER_CONTROL_ARRAY(mux_id) \ + [USB_MUX_PORT(mux_id)] = BB_RETIMER_CONTROLS_CONFIG(mux_id), + +/** + * @brief Call USB_MUX_BB_RETIMER_CONTROL_ARRAY for every BB retimer in DTS + */ +#define USB_MUX_BB_RETIMERS_CONTROLS_ARRAY \ + DT_FOREACH_STATUS_OKAY(BB_RETIMER_USB_MUX_COMPAT, \ + USB_MUX_BB_RETIMER_CONTROL_ARRAY) + +/** + * @brief Check if BB retimers @p id_1 and @p id_2 has matching configuration + * Configuration match if reset and ls_en pins are the same for muxes + * which are on the same USB-C port. + * + * @param id_1 First BB retimer DTS node + * @param id_2 Second BB retimer DTS node + */ +#define BB_RETIMER_CHECK_PAIR(id_1, id_2) \ + BUILD_ASSERT(USB_MUX_PORT(id_1) != USB_MUX_PORT(id_2) || \ + (BB_RETIMER_RESET_GPIO(id_1) == \ + BB_RETIMER_RESET_GPIO(id_2) && \ + BB_RETIMER_LS_EN_GPIO(id_1) == \ + BB_RETIMER_LS_EN_GPIO(id_2)), \ + "BB retimers " #id_1 " and " #id_2 " have different pin " \ + "configuration and same USB-C port") + +/** + * @brief Check if BB retimers with @p inst instance number has matching + * configuration with muxes of higher instance number on @p bb_list list. + * Configuration match if reset and ls_en pins are the same for muxes + * which are on the same USB-C port. + * + * @param inst Instance number of BB retimer mux + * @param bb_list List of BB retimers in instance number order + */ +#define BB_RETIMER_CHECK_INSTANCE_WITH_LIST(inst, bb_list) \ + FOR_EACH_FIXED_ARG(BB_RETIMER_CHECK_PAIR, (;), \ + DT_INST(inst, BB_RETIMER_USB_MUX_COMPAT), \ + GET_ARGS_LESS_N(inst, __DEBRACKET bb_list)) + +/** + * @brief Check if BB retimers on the @p bb_list list have matching + * configurations (i.e. reset and ls_en pins are the same for muxes + * which are on the same USB-C port). This check is required, because + * USB_MUX_ENABLE_ALTERNATE() doesn't update bb_control[] array, so all + * BB retimers needs to use the same GPIO pins. + * + * @param bb_list List of BB retimers in instance number order + */ +#define BB_RETIMER_CHECK_SAME_CONTROLS(bb_list) \ + LISTIFY(DT_NUM_INST_STATUS_OKAY(BB_RETIMER_USB_MUX_COMPAT), \ + BB_RETIMER_CHECK_INSTANCE_WITH_LIST, (;), bb_list); + +/** List of all BB retimers in DTS in instance number order */ +#define BB_RETIMER_INSTANCES_LIST \ + (LISTIFY(DT_NUM_INST_STATUS_OKAY(BB_RETIMER_USB_MUX_COMPAT), DT_INST, \ + (, ), BB_RETIMER_USB_MUX_COMPAT)) + #endif /* __ZEPHYR_SHIM_BB_RETIMER_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/bc12_pi3usb9201.h b/zephyr/shim/include/usbc/bc12_pi3usb9201.h index 59b84cd868..701090133f 100644 --- a/zephyr/shim/include/usbc/bc12_pi3usb9201.h +++ b/zephyr/shim/include/usbc/bc12_pi3usb9201.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,4 +7,7 @@ #define PI3USB9201_COMPAT pericom_pi3usb9201 -#define BC12_CHIP_PI3USB9201(id) { .drv = &pi3usb9201_drv, }, +#define BC12_CHIP_PI3USB9201(id) \ + { \ + .drv = &pi3usb9201_drv, \ + }, diff --git a/zephyr/shim/include/usbc/bc12_rt1718s.h b/zephyr/shim/include/usbc/bc12_rt1718s.h new file mode 100644 index 0000000000..e34f21c9e0 --- /dev/null +++ b/zephyr/shim/include/usbc/bc12_rt1718s.h @@ -0,0 +1,13 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "tcpm/rt1718s_public.h" + +#define RT1718S_BC12_COMPAT richtek_rt1718s_bc12 + +#define BC12_CHIP_RT1718S(id) \ + { \ + .drv = &rt1718s_bc12_drv, \ + }, diff --git a/zephyr/shim/include/usbc/bc12_rt1739.h b/zephyr/shim/include/usbc/bc12_rt1739.h index 3347d7d717..8d7427b271 100644 --- a/zephyr/shim/include/usbc/bc12_rt1739.h +++ b/zephyr/shim/include/usbc/bc12_rt1739.h @@ -1,10 +1,13 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include "driver/ppc/rt1739.h" -#define RT1739_BC12_COMPAT richtek_rt1739_bc12 +#define RT1739_BC12_COMPAT richtek_rt1739 -#define BC12_CHIP_RT1739(id) { .drv = &rt1739_bc12_drv, }, +#define BC12_CHIP_RT1739(id) \ + { \ + .drv = &rt1739_bc12_drv, \ + }, diff --git a/zephyr/shim/include/usbc/bc12_rt9490.h b/zephyr/shim/include/usbc/bc12_rt9490.h index f9bc82f292..a9371ddeea 100644 --- a/zephyr/shim/include/usbc/bc12_rt9490.h +++ b/zephyr/shim/include/usbc/bc12_rt9490.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,4 +7,7 @@ #define RT9490_BC12_COMPAT richtek_rt9490_bc12 -#define BC12_CHIP_RT9490(id) { .drv = &rt9490_bc12_drv, }, +#define BC12_CHIP_RT9490(id) \ + { \ + .drv = &rt9490_bc12_drv, \ + }, diff --git a/zephyr/shim/include/usbc/it5205_usb_mux.h b/zephyr/shim/include/usbc/it5205_usb_mux.h index 58412e0bd3..983248f3e2 100644 --- a/zephyr/shim/include/usbc/it5205_usb_mux.h +++ b/zephyr/shim/include/usbc/it5205_usb_mux.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,15 +8,14 @@ #include "usb_mux/it5205_public.h" -#define IT5205_USB_MUX_COMPAT ite_it5205 +#define IT5205_USB_MUX_COMPAT ite_it5205 -#define USB_MUX_CONFIG_IT5205(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &it5205_usb_mux_driver, \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = \ - DT_STRING_UPPER_TOKEN(mux_id, i2c_addr_flags), \ +#define USB_MUX_CONFIG_IT5205(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &it5205_usb_mux_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ } #endif /* __ZEPHYR_SHIM_IT5205_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/ppc.h b/zephyr/shim/include/usbc/ppc.h index 94aee49f36..28e518a3ef 100644 --- a/zephyr/shim/include/usbc/ppc.h +++ b/zephyr/shim/include/usbc/ppc.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,35 +9,30 @@ #include <zephyr/device.h> #include <zephyr/devicetree.h> #include "usbc/ppc_rt1739.h" +#include "usbc/ppc_nx20p348x.h" #include "usbc/ppc_sn5s330.h" #include "usbc/ppc_syv682x.h" #include "usbc/utils.h" #include "usbc_ppc.h" -#define PPC_ID(id) DT_CAT(PPC_, id) -#define PPC_ID_WITH_COMMA(id) PPC_ID(id), -#define PPC_ALT_FOR(alt_id) USBC_PORT(DT_PHANDLE(alt_id, alternate_for)) - -#define PPC_ALT_ENUM(id) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), \ - (PPC_ID_WITH_COMMA(id)), ()) - -enum ppc_chips_alt_id { - DT_FOREACH_STATUS_OKAY(RT1739_PPC_COMPAT, PPC_ALT_ENUM) - DT_FOREACH_STATUS_OKAY(SN5S330_COMPAT, PPC_ALT_ENUM) - DT_FOREACH_STATUS_OKAY(SYV682X_COMPAT, PPC_ALT_ENUM) - PPC_CHIP_ALT_COUNT -}; - extern struct ppc_config_t ppc_chips_alt[]; -#define PPC_ENABLE_ALTERNATE(nodelabel) \ - do { \ - BUILD_ASSERT(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \ - "PPC alternate node does not exist"); \ - memcpy(&ppc_chips[PPC_ALT_FOR(DT_NODELABEL(nodelabel))], \ - &ppc_chips_alt[PPC_ID(DT_NODELABEL(nodelabel))], \ - sizeof(struct ppc_config_t)); \ +#define ALT_PPC_CHIP_CHK(usbc_id, usb_port_num) \ + COND_CODE_1(DT_REG_HAS_IDX(usbc_id, usb_port_num), \ + (COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, ppc_alt), (|| 1), \ + (|| 0))), \ + (|| 0)) + +#define PPC_ENABLE_ALTERNATE(usb_port_num) \ + do { \ + BUILD_ASSERT( \ + (0 DT_FOREACH_STATUS_OKAY_VARGS(named_usbc_port, \ + ALT_PPC_CHIP_CHK, \ + usb_port_num)), \ + "Selected USB node does not exist or does not specify a PPC " \ + "alternate chip"); \ + memcpy(&ppc_chips[usb_port_num], &ppc_chips_alt[usb_port_num], \ + sizeof(struct ppc_config_t)); \ } while (0) #endif /* ZEPHYR_CHROME_USBC_PPC_H */ diff --git a/zephyr/shim/include/usbc/ppc_aoz1380.h b/zephyr/shim/include/usbc/ppc_aoz1380.h new file mode 100644 index 0000000000..1ff20b802f --- /dev/null +++ b/zephyr/shim/include/usbc/ppc_aoz1380.h @@ -0,0 +1,11 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ppc/aoz1380_public.h" + +#define AOZ1380_COMPAT aoz_aoz1380 + +/* Note: This chip has no i2c interface */ +#define PPC_CHIP_AOZ1380(id) { .drv = &aoz1380_drv }, diff --git a/zephyr/shim/include/usbc/ppc_nx20p348x.h b/zephyr/shim/include/usbc/ppc_nx20p348x.h new file mode 100644 index 0000000000..2d36ab09f6 --- /dev/null +++ b/zephyr/shim/include/usbc/ppc_nx20p348x.h @@ -0,0 +1,13 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ppc/nx20p348x_public.h" + +#define NX20P348X_COMPAT nxp_nx20p348x + +#define PPC_CHIP_NX20P348X(id) \ + { .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &nx20p348x_drv }, diff --git a/zephyr/shim/include/usbc/ppc_rt1739.h b/zephyr/shim/include/usbc/ppc_rt1739.h index 19e169a436..5b71b9ff9c 100644 --- a/zephyr/shim/include/usbc/ppc_rt1739.h +++ b/zephyr/shim/include/usbc/ppc_rt1739.h @@ -1,18 +1,18 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include "driver/ppc/rt1739.h" -#define RT1739_PPC_COMPAT richtek_rt1739_ppc +#define RT1739_PPC_COMPAT richtek_rt1739 -#define PPC_CHIP_RT1739(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags), \ - .drv = &rt1739_ppc_drv, \ - .frs_en = COND_CODE_1(DT_NODE_HAS_PROP(id, irq), \ - (GPIO_SIGNAL(DT_PHANDLE(id, irq))), \ - (0)), \ +#define PPC_CHIP_RT1739(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &rt1739_ppc_drv, \ + .frs_en = COND_CODE_1(DT_NODE_HAS_PROP(id, irq), \ + (GPIO_SIGNAL(DT_PHANDLE(id, irq))), \ + (0)), \ }, diff --git a/zephyr/shim/include/usbc/ppc_sn5s330.h b/zephyr/shim/include/usbc/ppc_sn5s330.h index 1c48777107..ecbcb53deb 100644 --- a/zephyr/shim/include/usbc/ppc_sn5s330.h +++ b/zephyr/shim/include/usbc/ppc_sn5s330.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,9 +7,7 @@ #define SN5S330_COMPAT ti_sn5s330 -#define PPC_CHIP_SN5S330(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags), \ - .drv = &sn5s330_drv \ - }, +#define PPC_CHIP_SN5S330(id) \ + { .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &sn5s330_drv }, diff --git a/zephyr/shim/include/usbc/ppc_syv682x.h b/zephyr/shim/include/usbc/ppc_syv682x.h index 1c2691f684..33813a5256 100644 --- a/zephyr/shim/include/usbc/ppc_syv682x.h +++ b/zephyr/shim/include/usbc/ppc_syv682x.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,12 +7,12 @@ #define SYV682X_COMPAT silergy_syv682x -#define PPC_CHIP_SYV682X(id) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ - .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags),\ - .drv = &syv682x_drv, \ - .frs_en = COND_CODE_1(DT_NODE_HAS_PROP(id, frs_en_gpio), \ - (GPIO_SIGNAL(DT_PHANDLE(id, frs_en_gpio))), \ - (0)), \ +#define PPC_CHIP_SYV682X(id) \ + { \ + .i2c_port = I2C_PORT_BY_DEV(id), \ + .i2c_addr_flags = DT_REG_ADDR(id), \ + .drv = &syv682x_drv, \ + .frs_en = COND_CODE_1( \ + DT_NODE_HAS_PROP(id, frs_en_gpio), \ + (GPIO_SIGNAL(DT_PHANDLE(id, frs_en_gpio))), (0)), \ }, diff --git a/zephyr/shim/include/usbc/ps8743_usb_mux.h b/zephyr/shim/include/usbc/ps8743_usb_mux.h new file mode 100644 index 0000000000..75ce778bac --- /dev/null +++ b/zephyr/shim/include/usbc/ps8743_usb_mux.h @@ -0,0 +1,21 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_PS8743_USB_MUX_H +#define __ZEPHYR_SHIM_PS8743_USB_MUX_H + +#include "usb_mux/ps8743_public.h" + +#define PS8743_USB_MUX_COMPAT parade_ps8743 + +#define USB_MUX_CONFIG_PS8743(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &ps8743_usb_mux_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ + } + +#endif /* __ZEPHYR_SHIM_PS8743_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/ps8818_usb_mux.h b/zephyr/shim/include/usbc/ps8818_usb_mux.h new file mode 100644 index 0000000000..c45e69aee3 --- /dev/null +++ b/zephyr/shim/include/usbc/ps8818_usb_mux.h @@ -0,0 +1,21 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_PS8818_USB_MUX_H +#define __ZEPHYR_SHIM_PS8818_USB_MUX_H + +#include "driver/retimer/ps8818_public.h" + +#define PS8818_USB_MUX_COMPAT parade_ps8818 + +#define USB_MUX_CONFIG_PS8818(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &ps8818_usb_retimer_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ + } + +#endif /* __ZEPHYR_SHIM_PS8818_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/tcpc_anx7447.h b/zephyr/shim/include/usbc/tcpc_anx7447.h new file mode 100644 index 0000000000..7a59296e74 --- /dev/null +++ b/zephyr/shim/include/usbc/tcpc_anx7447.h @@ -0,0 +1,20 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include "tcpm/anx7447_public.h" + +#define ANX7447_TCPC_COMPAT anologix_anx7447_tcpc + +#define TCPC_CONFIG_ANX7447(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &anx7447_tcpm_drv, \ + .flags = DT_PROP(id, tcpc_flags), \ + }, diff --git a/zephyr/shim/include/usbc/tcpc_ccgxxf.h b/zephyr/shim/include/usbc/tcpc_ccgxxf.h index 566fed03d6..0c02cf6846 100644 --- a/zephyr/shim/include/usbc/tcpc_ccgxxf.h +++ b/zephyr/shim/include/usbc/tcpc_ccgxxf.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,14 +8,13 @@ #define CCGXXF_TCPC_COMPAT cypress_ccgxxf -#define TCPC_CONFIG_CCGXXF(id) \ - { \ - .bus_type = EC_BUS_TYPE_I2C, \ - .i2c_info = { \ - .port = I2C_PORT(DT_PHANDLE(id, port)), \ - .addr_flags = DT_STRING_UPPER_TOKEN( \ - id, i2c_addr_flags), \ - }, \ - .drv = &ccgxxf_tcpm_drv, \ - .flags = TCPC_FLAGS_TCPCI_REV2_0, \ +#define TCPC_CONFIG_CCGXXF(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &ccgxxf_tcpm_drv, \ + .flags = TCPC_FLAGS_TCPCI_REV2_0, \ }, diff --git a/zephyr/shim/include/usbc/tcpc_fusb302.h b/zephyr/shim/include/usbc/tcpc_fusb302.h index fefb54af7d..a2e512d938 100644 --- a/zephyr/shim/include/usbc/tcpc_fusb302.h +++ b/zephyr/shim/include/usbc/tcpc_fusb302.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,13 +8,12 @@ #define FUSB302_TCPC_COMPAT fairchild_fusb302 -#define TCPC_CONFIG_FUSB302(id) \ - { \ - .bus_type = EC_BUS_TYPE_I2C, \ - .i2c_info = { \ - .port = I2C_PORT(DT_PHANDLE(id, port)), \ - .addr_flags = DT_STRING_UPPER_TOKEN( \ - id, i2c_addr_flags), \ - }, \ - .drv = &fusb302_tcpm_drv, \ +#define TCPC_CONFIG_FUSB302(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &fusb302_tcpm_drv, \ }, diff --git a/zephyr/shim/include/usbc/tcpc_generic_emul.h b/zephyr/shim/include/usbc/tcpc_generic_emul.h new file mode 100644 index 0000000000..7dc46c51ba --- /dev/null +++ b/zephyr/shim/include/usbc/tcpc_generic_emul.h @@ -0,0 +1,20 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> + +#include "driver/tcpm/tcpci.h" + +#define TCPCI_EMUL_COMPAT cros_tcpci_generic_emul + +#define TCPC_CONFIG_TCPCI_EMUL(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &tcpci_tcpm_drv, \ + }, diff --git a/zephyr/shim/include/usbc/tcpc_it8xxx2.h b/zephyr/shim/include/usbc/tcpc_it8xxx2.h index be275441d8..c619656667 100644 --- a/zephyr/shim/include/usbc/tcpc_it8xxx2.h +++ b/zephyr/shim/include/usbc/tcpc_it8xxx2.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,11 +6,11 @@ #include <zephyr/devicetree.h> #include "driver/tcpm/it8xxx2_pd_public.h" -#define IT8XXX2_TCPC_COMPAT ite_it8xxx2_tcpc +#define IT8XXX2_TCPC_COMPAT ite_it8xxx2_usbpd -#define TCPC_CONFIG_IT8XXX2(id) \ - { \ - .bus_type = EC_BUS_TYPE_EMBEDDED, \ - .drv = &it8xxx2_tcpm_drv, \ - .flags = 0, \ +#define TCPC_CONFIG_IT8XXX2(id) \ + { \ + .bus_type = EC_BUS_TYPE_EMBEDDED, \ + .drv = &it8xxx2_tcpm_drv, \ + .flags = 0, \ }, diff --git a/zephyr/shim/include/usbc/tcpc_nct38xx.h b/zephyr/shim/include/usbc/tcpc_nct38xx.h index 87b222c794..87ba3379c8 100644 --- a/zephyr/shim/include/usbc/tcpc_nct38xx.h +++ b/zephyr/shim/include/usbc/tcpc_nct38xx.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,16 +11,15 @@ #define NCT38XX_TCPC_COMPAT nuvoton_nct38xx -#define TCPC_CONFIG_NCT38XX(id) \ - { \ - .bus_type = EC_BUS_TYPE_I2C, \ - .i2c_info = { \ - .port = I2C_PORT(DT_PHANDLE(id, port)), \ - .addr_flags = DT_STRING_UPPER_TOKEN( \ - id, i2c_addr_flags), \ - }, \ - .drv = &nct38xx_tcpm_drv, \ - .flags = DT_PROP(id, tcpc_flags), \ +#define TCPC_CONFIG_NCT38XX(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &nct38xx_tcpm_drv, \ + .flags = DT_PROP(id, tcpc_flags), \ }, /** diff --git a/zephyr/shim/include/usbc/tcpc_ps8xxx.h b/zephyr/shim/include/usbc/tcpc_ps8xxx.h index d47f6cc9df..1a457af09b 100644 --- a/zephyr/shim/include/usbc/tcpc_ps8xxx.h +++ b/zephyr/shim/include/usbc/tcpc_ps8xxx.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,14 +8,13 @@ #define PS8XXX_COMPAT parade_ps8xxx -#define TCPC_CONFIG_PS8XXX(id) \ - { \ - .bus_type = EC_BUS_TYPE_I2C, \ - .i2c_info = { \ - .port = I2C_PORT(DT_PHANDLE(id, port)), \ - .addr_flags = DT_STRING_UPPER_TOKEN( \ - id, i2c_addr_flags), \ - }, \ - .drv = &ps8xxx_tcpm_drv, \ - .flags = DT_PROP(id, tcpc_flags), \ +#define TCPC_CONFIG_PS8XXX(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &ps8xxx_tcpm_drv, \ + .flags = DT_PROP(id, tcpc_flags), \ }, diff --git a/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h b/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h new file mode 100644 index 0000000000..fbd2e4bfd1 --- /dev/null +++ b/zephyr/shim/include/usbc/tcpc_ps8xxx_emul.h @@ -0,0 +1,19 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include "driver/tcpm/ps8xxx_public.h" + +#define PS8XXX_EMUL_COMPAT cros_ps8xxx_emul + +#define TCPC_CONFIG_PS8XXX_EMUL(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &ps8xxx_tcpm_drv, \ + }, diff --git a/zephyr/shim/include/usbc/tcpc_rt1718s.h b/zephyr/shim/include/usbc/tcpc_rt1718s.h new file mode 100644 index 0000000000..794fb99480 --- /dev/null +++ b/zephyr/shim/include/usbc/tcpc_rt1718s.h @@ -0,0 +1,20 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include "tcpm/rt1718s_public.h" + +#define RT1718S_TCPC_COMPAT richtek_rt1718s_tcpc + +#define TCPC_CONFIG_RT1718S(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &rt1718s_tcpm_drv, \ + .flags = DT_PROP(id, tcpc_flags), \ + }, diff --git a/zephyr/shim/include/usbc/tcpci.h b/zephyr/shim/include/usbc/tcpci.h index 35f706d09b..67138dbe99 100644 --- a/zephyr/shim/include/usbc/tcpci.h +++ b/zephyr/shim/include/usbc/tcpci.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,12 +9,12 @@ #define TCPCI_COMPAT cros_ec_tcpci -#define TCPC_CONFIG_TCPCI(id) \ - { \ - .bus_type = EC_BUS_TYPE_I2C, \ - .i2c_info = { \ - .port = I2C_PORT(DT_PHANDLE(id, port)), \ - .addr_flags = DT_PROP(id, i2c_addr_flags), \ - }, \ - .drv = &tcpci_tcpm_drv, \ +#define TCPC_CONFIG_TCPCI(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT_BY_DEV(id), \ + .addr_flags = DT_REG_ADDR(id), \ + }, \ + .drv = &tcpci_tcpm_drv, \ }, diff --git a/zephyr/shim/include/usbc/tcpci_usb_mux.h b/zephyr/shim/include/usbc/tcpci_usb_mux.h index 9fa29c7c85..1a5dd38241 100644 --- a/zephyr/shim/include/usbc/tcpci_usb_mux.h +++ b/zephyr/shim/include/usbc/tcpci_usb_mux.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,41 +10,36 @@ #include "tcpm/ps8xxx_public.h" #include "tcpm/tcpci.h" -#define TCPCI_TCPM_USB_MUX_COMPAT cros_ec_usbc_mux_tcpci -#define PS8XXX_USB_MUX_COMPAT parade_usbc_mux_ps8xxx +#define TCPCI_TCPM_USB_MUX_COMPAT cros_ec_usbc_mux_tcpci +#define PS8XXX_USB_MUX_COMPAT parade_usbc_mux_ps8xxx /** * Add I2C configuration and USB_MUX_FLAG_NOT_TCPC to enforce it when * mux_read()/mux_write() functions are used. */ -#define USB_MUX_CONFIG_TCPCI_TCPM_WITH_I2C(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS_WITH_FLAGS(mux_id, port_id, idx, \ - USB_MUX_FLAG_NOT_TCPC, \ - USB_MUX_FLAG_NOT_TCPC),\ - .driver = &tcpci_tcpm_usb_mux_driver, \ - .hpd_update = USB_MUX_CALLBACK_OR_NULL(mux_id, \ - hpd_update), \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = DT_PROP(mux_id, i2c_addr_flags), \ +#define USB_MUX_CONFIG_TCPCI_TCPM_WITH_I2C(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS_WITH_FLAGS( \ + mux_id, USB_MUX_FLAG_NOT_TCPC, USB_MUX_FLAG_NOT_TCPC), \ + .driver = &tcpci_tcpm_usb_mux_driver, \ + .hpd_update = \ + USB_MUX_CALLBACK_OR_NULL(mux_id, hpd_update), \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ } /** Use I2C configuration from TCPC */ -#define USB_MUX_CONFIG_TCPCI_TCPM_WO_I2C(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &tcpci_tcpm_usb_mux_driver, \ - .hpd_update = USB_MUX_CALLBACK_OR_NULL(mux_id, \ - hpd_update), \ +#define USB_MUX_CONFIG_TCPCI_TCPM_WO_I2C(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &tcpci_tcpm_usb_mux_driver, \ + .hpd_update = \ + USB_MUX_CALLBACK_OR_NULL(mux_id, hpd_update), \ } -/** This macro will fail if only port or i2c_addr_flags property is present */ -#define USB_MUX_CONFIG_TCPCI_TCPM(mux_id, port_id, idx) \ - COND_CODE_1(UTIL_OR(DT_NODE_HAS_PROP(mux_id, port), \ - DT_NODE_HAS_PROP(mux_id, i2c_addr_flags)), \ - (USB_MUX_CONFIG_TCPCI_TCPM_WITH_I2C(mux_id, port_id,\ - idx)), \ - (USB_MUX_CONFIG_TCPCI_TCPM_WO_I2C(mux_id, port_id, \ - idx))) +#define USB_MUX_CONFIG_TCPCI_TCPM(mux_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(mux_id, reg), \ + (USB_MUX_CONFIG_TCPCI_TCPM_WITH_I2C(mux_id)), \ + (USB_MUX_CONFIG_TCPCI_TCPM_WO_I2C(mux_id))) #endif /* __ZEPHYR_SHIM_TCPCI_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/tusb1064_usb_mux.h b/zephyr/shim/include/usbc/tusb1064_usb_mux.h index 159f42c500..55dc8d4645 100644 --- a/zephyr/shim/include/usbc/tusb1064_usb_mux.h +++ b/zephyr/shim/include/usbc/tusb1064_usb_mux.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,35 +8,32 @@ #include "driver/usb_mux/tusb1064.h" -#define TUSB1064_USB_MUX_COMPAT ti_tusb1064 +#define TUSB1064_USB_MUX_COMPAT ti_tusb1064 #if defined(CONFIG_USB_MUX_TUSB1044) -#define USB_MUX_CONFIG_TUSB1064(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &tusb1064_usb_mux_driver, \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = \ - DT_STRING_UPPER_TOKEN(mux_id, i2c_addr_flags), \ - .hpd_update = &tusb1044_hpd_update, \ +#define USB_MUX_CONFIG_TUSB1064(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &tusb1064_usb_mux_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ + .hpd_update = &tusb1044_hpd_update, \ } #elif defined(CONFIG_USB_MUX_TUSB546) -#define USB_MUX_CONFIG_TUSB1064(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &tusb1064_usb_mux_driver, \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = \ - DT_STRING_UPPER_TOKEN(mux_id, i2c_addr_flags), \ +#define USB_MUX_CONFIG_TUSB1064(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &tusb1064_usb_mux_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ } #else -#define USB_MUX_CONFIG_TUSB1064(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &tusb1064_usb_mux_driver, \ - .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ - .i2c_addr_flags = \ - DT_STRING_UPPER_TOKEN(mux_id, i2c_addr_flags), \ +#define USB_MUX_CONFIG_TUSB1064(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &tusb1064_usb_mux_driver, \ + .i2c_port = I2C_PORT_BY_DEV(mux_id), \ + .i2c_addr_flags = DT_REG_ADDR(mux_id), \ } #endif /* defined(CONFIG_USB_MUX_TUSB1044) */ diff --git a/zephyr/shim/include/usbc/usb_muxes.h b/zephyr/shim/include/usbc/usb_muxes.h index 9422d4008d..d161b72b08 100644 --- a/zephyr/shim/include/usbc/usb_muxes.h +++ b/zephyr/shim/include/usbc/usb_muxes.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,108 +9,158 @@ #include <zephyr/devicetree.h> #include <zephyr/sys/util_macro.h> #include "usb_mux.h" +#include "usbc/amd_fp6_usb_mux.h" +#include "usbc/anx7447_usb_mux.h" #include "usbc/anx7483_usb_mux.h" #include "usbc/bb_retimer_usb_mux.h" #include "usbc/it5205_usb_mux.h" +#include "usbc/ps8743_usb_mux.h" +#include "usbc/ps8818_usb_mux.h" #include "usbc/tcpci_usb_mux.h" #include "usbc/tusb1064_usb_mux.h" +#include "usbc/utils.h" #include "usbc/virtual_usb_mux.h" /** * @brief List of USB mux drivers compatibles and their configurations. Each * element of list has to have (compatible, config) format. */ -#define USB_MUX_DRIVERS \ - (ANX7483_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7483), \ - (BB_RETIMER_USB_MUX_COMPAT, USB_MUX_CONFIG_BB_RETIMER), \ - (IT5205_USB_MUX_COMPAT, USB_MUX_CONFIG_IT5205), \ - (PS8XXX_USB_MUX_COMPAT, USB_MUX_CONFIG_TCPCI_TCPM), \ - (TCPCI_TCPM_USB_MUX_COMPAT, USB_MUX_CONFIG_TCPCI_TCPM), \ - (TUSB1064_USB_MUX_COMPAT, USB_MUX_CONFIG_TUSB1064), \ - (VIRTUAL_USB_MUX_COMPAT, USB_MUX_CONFIG_VIRTUAL) +#define USB_MUX_DRIVERS \ + (AMD_FP6_USB_MUX_COMPAT, USB_MUX_CONFIG_AMD_FP6), \ + (ANX7447_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7447), \ + (ANX7483_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7483), \ + (BB_RETIMER_USB_MUX_COMPAT, USB_MUX_CONFIG_BB_RETIMER), \ + (IT5205_USB_MUX_COMPAT, USB_MUX_CONFIG_IT5205), \ + (PS8743_USB_MUX_COMPAT, USB_MUX_CONFIG_PS8743), \ + (PS8818_USB_MUX_COMPAT, USB_MUX_CONFIG_PS8818), \ + (PS8XXX_USB_MUX_COMPAT, USB_MUX_CONFIG_TCPCI_TCPM), \ + (TCPCI_TCPM_USB_MUX_COMPAT, USB_MUX_CONFIG_TCPCI_TCPM), \ + (TUSB1064_USB_MUX_COMPAT, USB_MUX_CONFIG_TUSB1064), \ + (VIRTUAL_USB_MUX_COMPAT, USB_MUX_CONFIG_VIRTUAL) /** * @brief Get compatible from @p driver * * @param driver USB mux driver description in format (compatible, config) */ -#define USB_MUX_DRIVER_GET_COMPAT(driver) GET_ARG_N(1, __DEBRACKET driver) +#define USB_MUX_DRIVER_GET_COMPAT(driver) GET_ARG_N(1, __DEBRACKET driver) /** * @brief Get configuration from @p driver * * @param driver USB mux driver description in format (compatible, config) */ -#define USB_MUX_DRIVER_GET_CONFIG(driver) GET_ARG_N(2, __DEBRACKET driver) +#define USB_MUX_DRIVER_GET_CONFIG(driver) GET_ARG_N(2, __DEBRACKET driver) /** - * @brief USB mux port number based on parent node in DTS + * @brief Name of USB mux chain structure for given port and place in chain. + * Note, that root of chain is not referred by this name, but + * usb_muxes[@p port_id]. * - * @param port_id USBC node ID + * @param idx Place in chain + * @param port_id USBC port id */ -#define USB_MUX_PORT(port_id) DT_REG_ADDR(port_id) +#define USB_MUX_CHAIN_STRUCT_NAME(idx, port_id) \ + DT_CAT4(USB_MUX_chain_port_, port_id, _mux_, idx) /** - * @brief Name of USB mux structure if node is not EMPTY. Note, that root of - * chain is not referred by this name, but usb_muxes[USB_MUX_PORT(id)]. + * @brief Declaration of USB mux chain structure for @p idx mux in @p port_id + * USB-C port's chain + * + * @param port_id USBC port ID (number) + * @param idx Place in chain + */ +#define USB_MUX_CHAIN_STRUCT_DECLARE(port_id, idx) \ + MAYBE_CONST struct usb_mux_chain USB_MUX_CHAIN_STRUCT_NAME(idx, port_id) + +/** + * @brief Name of USB mux structure if node @p mux_id is not EMPTY. * * @param mux_id USB mux node ID */ -#define USB_MUX_STRUCT_NAME(mux_id) \ +#define USB_MUX_STRUCT_NAME(mux_id) \ COND_CODE_0(IS_EMPTY(mux_id), (DT_CAT(USB_MUX_NODE_, mux_id)), (EMPTY)) /** * @brief USB muxes in chain should be constant only if configuration * cannot change in runtime */ -#define MAYBE_CONST COND_CODE_1(CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG, \ - (), (const)) +#define MAYBE_CONST \ + COND_CODE_1(CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG, (), (const)) /** * @brief Declaration of USB mux structure * * @param mux_id USB mux node ID */ -#define USB_MUX_STRUCT_DECLARE(mux_id) \ +#define USB_MUX_STRUCT_DECLARE(mux_id) \ MAYBE_CONST struct usb_mux USB_MUX_STRUCT_NAME(mux_id) /** + * @brief Declaration of USB mux board_init function + * + * @param mux_id USB mux node ID + */ +#define USB_MUX_CB_BOARD_INIT_DECLARE(mux_id) \ + int DT_STRING_TOKEN(mux_id, board_init)(const struct usb_mux *); + +/** + * @brief Declaration of USB mux board_set function + * + * @param mux_id USB mux node ID + */ +#define USB_MUX_CB_BOARD_SET_DECLARE(mux_id) \ + int DT_STRING_TOKEN(mux_id, board_set)(const struct usb_mux *, \ + mux_state_t); + +/** * @brief Get pointer by referencing @p name or NULL if @p name is EMPTY * * @param name Identifier to reference */ -#define USB_MUX_POINTER_OR_NULL(name) \ +#define USB_MUX_POINTER_OR_NULL(name) \ COND_CODE_0(IS_EMPTY(name), (&name), (NULL)) /** * @brief Get node id of @p idx USB mux in chain * + * @param chain_id USB mux chain node ID * @param idx Position of USB mux in chain - * @param port_id USBC node ID */ -#define USB_MUX_GET_CHAIN_N(idx, port_id) \ - DT_PHANDLE_BY_IDX(port_id, usb_muxes, idx) +#define USB_MUX_GET_CHAIN_N(chain_id, idx) \ + DT_PHANDLE_BY_IDX(chain_id, usb_muxes, idx) /** - * @brief Get node id of next USB mux in chain or EMPTY if it is last mux + * @brief Get next USB mux chain structure name or EMPTY if it is last mux * - * @param port_id USBC node ID + * @param chain_id USB mux chain node ID * @param idx Position of USB mux in chain */ -#define USB_MUX_NEXT(port_id, idx) \ - GET_ARG_N(2, GET_ARGS_LESS_N(idx, \ - LISTIFY(DT_PROP_LEN(port_id, usb_muxes), \ - USB_MUX_GET_CHAIN_N, (,), port_id)), \ +#define USB_MUX_CHAIN_NEXT_NAME(chain_id, idx) \ + GET_ARG_N(2, \ + GET_ARGS_LESS_N(idx, \ + LISTIFY(DT_PROP_LEN(chain_id, usb_muxes), \ + USB_MUX_CHAIN_STRUCT_NAME, (, ), \ + USBC_PORT(chain_id))), \ EMPTY) /** * @brief Get pointer to next USB mux in chain or NULL if it is last mux * - * @param port_id USBC node ID + * @param chain_id USB mux chain node ID * @param idx Position of USB mux in chain */ -#define USB_MUX_NEXT_POINTER(port_id, idx) \ - USB_MUX_POINTER_OR_NULL(USB_MUX_STRUCT_NAME(USB_MUX_NEXT(port_id, idx))) +#define USB_MUX_CHAIN_NEXT_POINTER(chain_id, idx) \ + USB_MUX_POINTER_OR_NULL(USB_MUX_CHAIN_NEXT_NAME(chain_id, idx)) + +/** + * @brief Get pointer to USB mux that is @p idx in chain @p chain_id + * + * @param chain_id USB mux chain node ID + * @param idx Position of USB mux in chain + */ +#define USB_MUX_POINTER(chain_id, idx) \ + &USB_MUX_STRUCT_NAME(USB_MUX_GET_CHAIN_N(chain_id, idx)) /** * @brief Generate pointer to function from @p cb_name property or NULL @@ -119,217 +169,335 @@ * @param mux_id USB mux node ID * @param cb_name Name of property with callback function */ -#define USB_MUX_CALLBACK_OR_NULL(mux_id, cb_name) \ +#define USB_MUX_CALLBACK_OR_NULL(mux_id, cb_name) \ USB_MUX_POINTER_OR_NULL(DT_STRING_TOKEN_OR(mux_id, cb_name, EMPTY)) /** * @brief Set struct usb_mux fields common for all USB muxes and alter flags * * @param mux_id USB mux node ID - * @param port_id USBC node ID - * @param idx Position of USB mux in chain * @param flags_mask Mask for bits that should be igonred in flags property * @param flags_val Value that should be used instead for masked bits */ -#define USB_MUX_COMMON_FIELDS_WITH_FLAGS(mux_id, port_id, idx, \ - flags_mask, flags_val) \ - .usb_port = USB_MUX_PORT(port_id), \ - .next_mux = USB_MUX_NEXT_POINTER(port_id, idx), \ - .board_init = USB_MUX_CALLBACK_OR_NULL(mux_id, board_init), \ - .board_set = USB_MUX_CALLBACK_OR_NULL(mux_id, board_set), \ +#define USB_MUX_COMMON_FIELDS_WITH_FLAGS(mux_id, flags_mask, flags_val) \ + .usb_port = USB_MUX_PORT(mux_id), \ + .board_init = USB_MUX_CALLBACK_OR_NULL(mux_id, board_init), \ + .board_set = USB_MUX_CALLBACK_OR_NULL(mux_id, board_set), \ .flags = (DT_PROP(mux_id, flags) & ~(flags_mask)) | (flags_val) /** * @brief Set struct usb_mux fields common for all USB muxes * * @param mux_id USB mux node ID - * @param port_id USBC node ID - * @param idx Position of USB mux in chain */ -#define USB_MUX_COMMON_FIELDS(mux_id, port_id, idx) \ - USB_MUX_COMMON_FIELDS_WITH_FLAGS(mux_id, port_id, idx, 0, 0) +#define USB_MUX_COMMON_FIELDS(mux_id) \ + USB_MUX_COMMON_FIELDS_WITH_FLAGS(mux_id, 0, 0) /** - * @brief Expands to 1 if @p mux_id has @p compat compatible. It is required - * to makes sure that @p compat is expanded before DT_NODE_HAS_COMPAT + * @brief Declare USB mux structure * * @param mux_id USB mux node ID - * @param compat USB mux driver compatible + * @param conf Driver configuration function */ -#define USB_MUX_IS_COMPATIBLE(mux_id, compat) \ - DT_NODE_HAS_COMPAT(mux_id, compat) +#define USB_MUX_DECLARE(mux_id, conf) extern USB_MUX_STRUCT_DECLARE(mux_id); /** - * @brief Expands to @p driver config if @p mux_id is compatible with @p driver + * @brief Define USB mux structure using driver USB_MUX_CONFIG_* macro * - * @param driver USB mux driver description in format (compatible, config) * @param mux_id USB mux node ID + * @param conf Driver configuration function */ -#define USB_MUX_DRIVER_CONFIG_IF_COMPAT(driver, mux_id) \ - COND_CODE_1(USB_MUX_IS_COMPATIBLE( \ - mux_id, USB_MUX_DRIVER_GET_COMPAT(driver)), \ - (USB_MUX_DRIVER_GET_CONFIG(driver)), ()) +#define USB_MUX_DEFINE(mux_id, conf) \ + USB_MUX_STRUCT_DECLARE(mux_id) = conf(mux_id); /** - * @brief Find driver from USB_MUX_DRIVERS that is compatible with @p mux_id + * @brief Call @p cb_op if @p mux_id has @p cb_prop property * * @param mux_id USB mux node ID + * @param cb_prop The callback property name + * @param cb_op Operation to perform on USB muxes */ -#define USB_MUX_FIND_DRIVER_CONFIG(mux_id) \ - FOR_EACH_FIXED_ARG(USB_MUX_DRIVER_CONFIG_IF_COMPAT, (), mux_id, \ - USB_MUX_DRIVERS) +#define USB_MUX_CB_DECLARE_IF_EXIST(mux_id, cb_prop, cb_op) \ + COND_CODE_1(DT_NODE_HAS_PROP(mux_id, cb_prop), (cb_op(mux_id)), ()) /** - * @brief Get driver configuration macro for @p mux_id and call @p op + * @brief Declare USB mux board_set function @p mux_id has board_set property * * @param mux_id USB mux node ID - * @param port_id USBC node ID - * @param idx Position of USB mux in chain - * @param op Operation to perform on USB muxes + * @param conf Driver configuration function */ -#define USB_MUX_CALL_OP(mux_id, port_id, idx, op) \ - op(mux_id, port_id, idx, USB_MUX_FIND_DRIVER_CONFIG(mux_id)) +#define USB_MUX_CB_BOARD_SET_DECLARE_IF_EXISTS(mux_id, conf) \ + USB_MUX_CB_DECLARE_IF_EXIST(mux_id, board_set, \ + USB_MUX_CB_BOARD_SET_DECLARE) /** - * @brief Get USB mux node ID and call USB_MUX_CALL_OP + * @brief Declare USB mux board_init function @p mux_id has board_init property * - * @param port_id USBC node ID - * @param idx Position of USB mux in chain - * @param op Operation to perform on USB muxes + * @param mux_id USB mux node ID + * @param conf Driver configuration function */ -#define USB_MUX_DO(port_id, idx, op) \ - USB_MUX_CALL_OP(USB_MUX_GET_CHAIN_N(idx, port_id), port_id, idx, op) +#define USB_MUX_CB_BOARD_INIT_DECLARE_IF_EXISTS(mux_id, conf) \ + USB_MUX_CB_DECLARE_IF_EXIST(mux_id, board_init, \ + USB_MUX_CB_BOARD_INIT_DECLARE) /** - * @brief Declare USB mux structure + * @brief Call @p op operation for each node that is compatible with @p driver * - * @param mux_id USB mux node ID - * @param port_id USBC node ID - * @param idx Position of USB mux in chain - * @param conf Driver configuration function + * @param driver USB mux driver description in format (compatible, config) + * @param op Operation to perform on each USB mux. Should accept mux node ID and + * driver config as arguments. */ -#define USB_MUX_DECLARE(mux_id, port_id, idx, conf) \ - extern USB_MUX_STRUCT_DECLARE(mux_id); +#define USB_MUX_DRIVER_CONFIG(driver, op) \ + DT_FOREACH_STATUS_OKAY_VARGS(USB_MUX_DRIVER_GET_COMPAT(driver), op, \ + USB_MUX_DRIVER_GET_CONFIG(driver)) /** - * @brief Define USB mux structure using driver USB_MUX_CONFIG_* macro + * @brief Call @p op operation for each USB mux node that is compatible with + * any driver from the USB_MUX_DRIVERS list. + * DT_FOREACH_STATUS_OKAY_VARGS() macro can not be used in @p op * - * @param mux_id USB mux node ID - * @param port_id USBC node ID - * @param idx Position of USB mux in chain - * @param conf Driver configuration function + * @param op Operation to perform on each USB mux. Should accept mux node ID and + * driver config as arguments. */ -#define USB_MUX_DEFINE(mux_id, port_id, idx, conf) \ - USB_MUX_STRUCT_DECLARE(mux_id) = conf(mux_id, port_id, idx); +#define USB_MUX_FOREACH_MUX_DT_VARGS(op) \ + FOR_EACH_FIXED_ARG(USB_MUX_DRIVER_CONFIG, (), op, USB_MUX_DRIVERS) /** - * @brief Define entry of usb_muxes array using driver USB_MUX_CONFIG_* macro + * @brief Convert @p mux_id and @p conf pair into USB_MUX_LIST entry * * @param mux_id USB mux node ID - * @param port_id USBC node ID - * @param idx Position of USB mux in chain * @param conf Driver configuration function */ -#define USB_MUX_ARRAY(mux_id, port_id, idx, conf) \ - [USB_MUX_PORT(port_id)] = conf(mux_id, port_id, idx), +#define USB_MUX_TO_LIST(mux_id, conf) , (mux_id, conf) + +/** + * @brief List of all USB muxes with config matched by compatible. List is in + * format (mux1_id, conf1) , (mux2_id, conf2) ... + */ +#define USB_MUX_LIST \ + LIST_DROP_EMPTY(USB_MUX_FOREACH_MUX_DT_VARGS(USB_MUX_TO_LIST)) + +/** + * @brief Call @p op with @p args arguments + * + * @param op Operation to perform on USB mux. Should accept mux node ID and + * driver config as arguments. + * @param args Arguments for @p op. Should be in format (mux_id, conf). + */ +#define USB_MUX_CALL_OP(args, op) op args /** - * @brief Call @p op with first mux in chain + * @brief Call @p op operation for each USB mux node from USB_MUX_LIST. This is + * like USB_MUX_FOREACH_MUX_DT_VARGS(), except + * DT_FOREACH_STATUS_OKAY_VARGS() macro can be used in @p op * - * @param port_id USBC node ID - * @param op Operation to perform on USB mux first in chain. Needs to accept - * USB mux node ID, USBC port node ID, position in chain, and driver - * config as arguments. + * @param op Operation to perform on each USB mux. Should accept mux node ID and + * driver config as arguments. */ -#define USB_MUX_FIRST(port_id, op) \ - USB_MUX_DO(port_id, 0, op) +#define USB_MUX_FOREACH_MUX(op) \ + COND_CODE_0( \ + IS_EMPTY(USB_MUX_LIST), \ + (FOR_EACH_FIXED_ARG(USB_MUX_CALL_OP, (), op, USB_MUX_LIST)), \ + (EMPTY)) /** - * @brief Call USB_MUX_DO if @p idx is not 0 (is not first mux in chain) + * @brief Initialise chain structure for @p idx mux * - * @param port_id USBC node ID + * @param chain_id Chain DTS node ID + * @param idx USB mux index + */ +#define USB_MUX_CHAIN_STRUCT_INIT(chain_id, idx) \ + { \ + .mux = USB_MUX_POINTER(chain_id, idx), \ + .next = USB_MUX_CHAIN_NEXT_POINTER(chain_id, idx), \ + } + +/** + * @brief Helper macro to set chain structure value for @p idx mux + * + * @param chain_id Chain DTS node ID + * @param idx USB mux index + */ +#define USB_MUX_CHAIN_STRUCT_SET(chain_id, idx) \ + (struct usb_mux_chain) USB_MUX_CHAIN_STRUCT_INIT(chain_id, idx) + +/** + * @brief Declaration of USB mux chain extern structure for @p idx mux in + * @p chain_id chain + * + * @param chain_id USB mux chain node ID + * @param idx Place in chain + */ +#define USB_MUX_CHAIN_STRUCT_DECLARE_EXTERN_OP(chain_id, idx) \ + extern USB_MUX_CHAIN_STRUCT_DECLARE(USBC_PORT(chain_id), idx); + +/** + * @brief Declaration of USB mux chain structure for @p idx mux in @p chain_id + * chain + * + * @param chain_id USB mux chain node ID + * @param idx Place in chain + */ +#define USB_MUX_CHAIN_STRUCT_DECLARE_OP(chain_id, idx) \ + USB_MUX_CHAIN_STRUCT_DECLARE(USBC_PORT(chain_id), idx); + +/** + * @brief Definition of USB mux chain structure for @p idx mux in @p chain_id + * chain + * + * @param chain_id USB mux chain node ID + * @param idx Place in chain + */ +#define USB_MUX_CHAIN_STRUCT_DEFINE_OP(chain_id, idx) \ + USB_MUX_CHAIN_STRUCT_DECLARE(USBC_PORT(chain_id), idx) = \ + USB_MUX_CHAIN_STRUCT_INIT(chain_id, idx); + +/** + * @brief Call @p op if @p idx is not 0 (is not the root mux of chain) + * + * @param chain_id Chain DTS node ID * @param unused2 This argument is expected by DT_FOREACH_PROP_ELEM_VARGS * @param idx Position of USB mux in chain * @param op Operation to perform on USB muxes */ -#define USB_MUX_DO_SKIP_FIRST(port_id, unused2, idx, op) \ - COND_CODE_1(UTIL_BOOL(idx), (USB_MUX_DO(port_id, idx, op)), ()) +#define USB_MUX_SKIP_ROOT(chain_id, unused2, idx, op) \ + COND_CODE_1(UTIL_BOOL(idx), (op(chain_id, idx)), ()) + +/** + * @brief Call @p op for each mux in @p chain_id chain except the root mux + * + * @param chain_id Chain DTS node ID + * @param op Operation to perform on USB muxes + */ +#define USB_MUX_FOREACH_NO_ROOT_MUX(chain_id, op) \ + DT_FOREACH_PROP_ELEM_VARGS(chain_id, usb_muxes, USB_MUX_SKIP_ROOT, op) + +/** + * @brief Create usb_muxes array entry for @p chain_id chain + * + * @param chain_id Chain DTS node ID + */ +#define USB_MUX_DEFINE_ROOT_MUX(chain_id) \ + [USBC_PORT(chain_id)] = USB_MUX_CHAIN_STRUCT_INIT(chain_id, 0), + +/** + * @brief Call @p op only if chain @p chain_id is not alternative + * + * @param chain_id Chain DTS node ID + * @param op Operation to perform on main USB mux chain + * @param ... Arguments to pass to the @p op operation + */ +#define USB_MUX_FOR_MAIN_CHAIN(chain_id, op, ...) \ + COND_CODE_0(DT_PROP(chain_id, alternative_chain), \ + (op(chain_id, ##__VA_ARGS__)), ()) /** - * @brief Call @p op with every mux in chain expect the first one + * @brief Call @p op for each USB mux chain * - * @param port_id USBC node ID - * @param op Operation to perform on USB muxes. Needs to accept USB mux node - * ID, USBC port node ID, position in chain, and driver config as - * arguments. + * @param op Operation to perform on USB mux chain */ -#define USB_MUX_NO_FIRST(port_id, op) \ - DT_FOREACH_PROP_ELEM_VARGS(port_id, usb_muxes, \ - USB_MUX_DO_SKIP_FIRST, op) +#define USB_MUX_FOREACH_CHAIN(op) \ + DT_FOREACH_STATUS_OKAY(cros_ec_usb_mux_chain, op) /** - * @brief Call @p op if @p idx mux in chain has BB retimer compatible + * @brief Call @p op for each USB mux chain with arguments * - * @param port_id USBC node ID + * @param op Operation to perform on USB mux chain + * @param ... Arguments to pass to the @p op operation + */ +#define USB_MUX_FOREACH_CHAIN_VARGS(op, ...) \ + DT_FOREACH_STATUS_OKAY_VARGS(cros_ec_usb_mux_chain, op, __VA_ARGS__) + +/** + * @brief Construct first half of conditional expression (?:) that evaluates to + * @p chain_id USB port if @p idx mux in @p chain_id is the same as + * @p mux_id + * + * @param chain_id USB mux chain node ID * @param unused2 This argument is expected by DT_FOREACH_PROP_ELEM_VARGS * @param idx Position of USB mux in chain - * @param op Operation to perform on BB retimer + * @param mux_id USB mux node ID to compare with @p idx mux */ -#define USB_MUX_ONLY_BB_RETIMER(port_id, unused2, idx, op) \ - COND_CODE_1(USB_MUX_IS_COMPATIBLE( \ - USB_MUX_GET_CHAIN_N(idx, port_id), \ - BB_RETIMER_USB_MUX_COMPAT), \ - (op(USB_MUX_GET_CHAIN_N(idx, port_id), port_id, \ - idx, BB_RETIMER_CONTROLS_CONFIG)), ()) +#define USB_MUX_PORT_IF_SAME_NODES(chain_id, unused2, idx, mux_id) \ + DT_SAME_NODE(mux_id, USB_MUX_GET_CHAIN_N(chain_id, idx)) ? \ + USBC_PORT(chain_id): /** - * @brief Call @p op with every BB retimer in chain + * @brief Compare @p mux_id with all muxes in @p chain_id * - * @param port_id USBC node ID - * @param op Operation to perform on BB retimers. Needs to accept USB mux node - * ID, USBC port node ID, position in chain, and driver config as - * arguments. + * @param chain_id USB mux chain node ID + * @param mux_id USB mux node ID */ -#define USB_MUX_BB_RETIMERS(port_id, op) \ - DT_FOREACH_PROP_ELEM_VARGS(port_id, usb_muxes, \ - USB_MUX_ONLY_BB_RETIMER, op) +#define USB_MUX_FIND_PORT(chain_id, mux_id) \ + DT_FOREACH_PROP_ELEM_VARGS(chain_id, usb_muxes, \ + USB_MUX_PORT_IF_SAME_NODES, mux_id) /** - * @brief If @p port_id has usb_muxes property, call @p op with every mux in - * chain that passes @p filter + * @brief Get port for @p mux_id by looking for an usb mux chain where @p mux_id + * is present. If the mux is not present in any chain, this macro + * evaluate to -1. + * + * This expands to: + * (DT_DEP_ORD(mux_id) == DT_DEP_ORD(USB_MUX_GET_CHAIN_N(chain1_id, 0))) ? + * USBC_PORT(chain1_id) : + * (DT_DEP_ORD(mux_id) == DT_DEP_ORD(USB_MUX_GET_CHAIN_N(chain1_id, 1))) ? + * USBC_PORT(chain1_id) : + * ... + * (DT_DEP_ORD(mux_id) == DT_DEP_ORD(USB_MUX_GET_CHAIN_N(chain1_id, n))) ? + * USBC_PORT(chain1_id) : + * (DT_DEP_ORD(mux_id) == DT_DEP_ORD(USB_MUX_GET_CHAIN_N(chain2_id, 0))) ? + * USBC_PORT(chain2_id) : + * ... + * (DT_DEP_ORD(mux_id) == DT_DEP_ORD(USB_MUX_GET_CHAIN_N(chainm_id, k))) ? + * USBC_PORT(chainm_id) : (-1) * - * @param port_id USBC node ID - * @param filter Macro that should filter USB muxes and call @p op on them. - * It has @p port_id and @p op as arguments. It is called - * only for @p port_id that has usb_muxes property. - * @param op Operation to perform on USB muxes. Needs to accept USB mux node - * ID, USBC port node ID, position in chain, and driver config as - * arguments. + * @param mux_id USB mux node ID + */ +#define USB_MUX_PORT(mux_id) \ + (USB_MUX_FOREACH_CHAIN_VARGS(USB_MUX_FIND_PORT, mux_id)(-1)) + +/** + * @brief Set usb_mux_chain structure for mux @p idx in chain @p chain_id + * + * @param chain_id Alternative USB mux chain node ID + * @param idx Position of the mux in chain + */ +#define USB_MUX_SET_ALTERNATIVE(chain_id, idx) \ + USB_MUX_CHAIN_STRUCT_NAME(idx, USBC_PORT(chain_id)) = \ + USB_MUX_CHAIN_STRUCT_SET(chain_id, idx); + +/** + * @brief Enable alternative USB mux chain + * + * @param chain_id Alternative USB mux chain node ID */ -#define USB_MUX_USBC_PORT_HAS_MUXES(port_id, filter, op) \ - COND_CODE_1(DT_NODE_HAS_PROP(port_id, usb_muxes), \ - (filter(port_id, op)), ()) +#define USB_MUX_ENABLE_ALTERNATIVE_NODE(chain_id) \ + do { \ + usb_muxes[USBC_PORT(chain_id)] = \ + USB_MUX_CHAIN_STRUCT_SET(chain_id, 0); \ + USB_MUX_FOREACH_NO_ROOT_MUX(chain_id, USB_MUX_SET_ALTERNATIVE) \ + } while (0) /** - * @brief For every USBC port that has muxes, call @p op with every mux in chain - * that passes @p filter + * @brief Enable alternative USB mux chain * - * @param filter Macro that should filter USB muxes and call @p op on them. - * It has USBC port node ID and @p op as arguments. It is called - * only for USBC ports that have usb_muxes property. - * @param op Operation to perform on USB muxes. Needs to accept USB mux node - * ID, USBC port node ID, position in chain, and driver config as - * arguments. + * @param nodelabel Label of alternative USB mux chain */ -#define USB_MUX_FOREACH_USBC_PORT(filter, op) \ - DT_FOREACH_STATUS_OKAY_VARGS(named_usbc_port, \ - USB_MUX_USBC_PORT_HAS_MUXES, \ - filter, op) +#define USB_MUX_ENABLE_ALTERNATIVE(nodelabel) \ + USB_MUX_ENABLE_ALTERNATIVE_NODE(DT_NODELABEL(nodelabel)) /** * Forward declare all usb_mux structures e.g. * MAYBE_CONST struct usb_mux USB_MUX_NODE_<node_id>; */ -USB_MUX_FOREACH_USBC_PORT(USB_MUX_NO_FIRST, USB_MUX_DECLARE) +USB_MUX_FOREACH_MUX(USB_MUX_DECLARE) + +/** + * Forward declare all usb_mux_chain structures e.g. + * extern MAYBE_CONST struct usb_mux_chain + * USB_MUX_chain_port_<node_id>_mux_<position_id>; + */ +USB_MUX_FOREACH_CHAIN_VARGS(USB_MUX_FOREACH_NO_ROOT_MUX, + USB_MUX_CHAIN_STRUCT_DECLARE_EXTERN_OP) #endif /* ZEPHYR_CHROME_USBC_USB_MUXES_H */ diff --git a/zephyr/shim/include/usbc/utils.h b/zephyr/shim/include/usbc/utils.h index 49b9aa4b71..53e9a34856 100644 --- a/zephyr/shim/include/usbc/utils.h +++ b/zephyr/shim/include/usbc/utils.h @@ -1,22 +1,19 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #ifndef __CROS_EC_ZEPHYR_SHIM_USBC_UTIL - /* * Enable interrupt from the `irq` property of an instance's node. * * @param inst: instance number */ -#define BC12_GPIO_ENABLE_INTERRUPT(inst) \ - IF_ENABLED(DT_INST_NODE_HAS_PROP(inst, irq), \ - (gpio_enable_dt_interrupt( \ - GPIO_INT_FROM_NODE(DT_INST_PHANDLE(inst, irq)));\ - ) \ - ) +#define BC12_GPIO_ENABLE_INTERRUPT(inst) \ + IF_ENABLED(DT_INST_NODE_HAS_PROP(inst, irq), \ + (gpio_enable_dt_interrupt( \ + GPIO_INT_FROM_NODE(DT_INST_PHANDLE(inst, irq)));)) /* * Get the port number from a child of `named-usbc-port` node. @@ -26,11 +23,17 @@ #define USBC_PORT(id) DT_REG_ADDR(DT_PARENT(id)) /* + * Get the port number from a `named-usbc-port` node. + * + * @param id: `named-usbc-port` node id + */ +#define USBC_PORT_NEW(id) DT_REG_ADDR(id) + +/* * Get the port number from a child of `named-usbc-port` node. * * @param inst: instance number of the node */ #define USBC_PORT_FROM_INST(inst) USBC_PORT(DT_DRV_INST(inst)) - #endif /* __CROS_EC_ZEPHYR_SHIM_USBC_UTIL */ diff --git a/zephyr/shim/include/usbc/virtual_usb_mux.h b/zephyr/shim/include/usbc/virtual_usb_mux.h index 5f4c2fb466..bbb2d8730e 100644 --- a/zephyr/shim/include/usbc/virtual_usb_mux.h +++ b/zephyr/shim/include/usbc/virtual_usb_mux.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,13 +8,13 @@ #include "usb_mux.h" -#define VIRTUAL_USB_MUX_COMPAT cros_ec_usbc_mux_virtual +#define VIRTUAL_USB_MUX_COMPAT cros_ec_usbc_mux_virtual -#define USB_MUX_CONFIG_VIRTUAL(mux_id, port_id, idx) \ - { \ - USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ - .driver = &virtual_usb_mux_driver, \ - .hpd_update = &virtual_hpd_update, \ +#define USB_MUX_CONFIG_VIRTUAL(mux_id) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id), \ + .driver = &virtual_usb_mux_driver, \ + .hpd_update = &virtual_hpd_update, \ } #endif /* __ZEPHYR_SHIM_VIRTUAL_USB_MUX_H */ diff --git a/zephyr/shim/include/zephyr_adc.h b/zephyr/shim/include/zephyr_adc.h index aff6d7a5b6..d4139692f7 100644 --- a/zephyr/shim/include/zephyr_adc.h +++ b/zephyr/shim/include/zephyr_adc.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,20 +8,18 @@ #include <zephyr/drivers/adc.h> -#ifdef CONFIG_PLATFORM_EC_ADC +#ifdef CONFIG_ADC #define ZSHIM_ADC_ID(node_id) DT_STRING_UPPER_TOKEN(node_id, enum_name) -#define ADC_ID_WITH_COMMA(node_id) ZSHIM_ADC_ID(node_id), enum adc_channel { #if DT_NODE_EXISTS(DT_INST(0, named_adc_channels)) - DT_FOREACH_CHILD(DT_INST(0, named_adc_channels), ADC_ID_WITH_COMMA) + DT_FOREACH_CHILD_SEP(DT_INST(0, named_adc_channels), ZSHIM_ADC_ID, + (, )), #endif /* named_adc_channels */ ADC_CH_COUNT }; -#undef ADC_ID_WITH_COMMA - struct adc_t { const char *name; const struct device *dev; @@ -38,9 +36,7 @@ extern struct adc_t adc_channels[]; #endif /* CONFIG_ADC_CHANNELS_RUNTIME_CONFIG */ #else /* Empty declaration to avoid warnings if adc.h is included */ -enum adc_channel { - ADC_CH_COUNT -}; -#endif /* CONFIG_PLATFORM_EC_ADC */ +enum adc_channel { ADC_CH_COUNT }; +#endif /* CONFIG_ADC */ #endif /* __CROS_EC_ZEPHYR_ADC_H */ diff --git a/zephyr/shim/include/zephyr_console_shim.h b/zephyr/shim/include/zephyr_console_shim.h index 5880c3f400..42ac3e693b 100644 --- a/zephyr/shim/include/zephyr_console_shim.h +++ b/zephyr/shim/include/zephyr_console_shim.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,7 +10,7 @@ struct zephyr_console_command { /* Handler for the command. argv[0] will be the command name. */ - int (*handler)(int argc, char **argv); + int (*handler)(int argc, const char **argv); #ifdef CONFIG_SHELL_HELP /* Description of args */ const char *argdesc; @@ -20,9 +20,7 @@ struct zephyr_console_command { }; #ifdef CONFIG_SHELL_HELP -#define _HELP_ARGS(A, H) \ - .argdesc = A, \ - .help = H, +#define _HELP_ARGS(A, H) .argdesc = A, .help = H, #else #define _HELP_ARGS(A, H) #endif @@ -38,17 +36,16 @@ struct zephyr_console_command { * Return: the return value from the handler. */ int zshim_run_ec_console_command(const struct zephyr_console_command *command, - size_t argc, char **argv); + size_t argc, const char **argv); /* Internal wrappers for DECLARE_CONSOLE_COMMAND_* macros. */ #define _ZEPHYR_SHELL_COMMAND_SHIM_2(NAME, ROUTINE_ID, ARGDESC, HELP, \ WRAPPER_ID, ENTRY_ID) \ static const struct zephyr_console_command ENTRY_ID = { \ - .handler = ROUTINE_ID, \ - _HELP_ARGS(ARGDESC, HELP) \ + .handler = ROUTINE_ID, _HELP_ARGS(ARGDESC, HELP) \ }; \ static int WRAPPER_ID(const struct shell *shell, size_t argc, \ - char **argv) \ + const char **argv) \ { \ return zshim_run_ec_console_command(&ENTRY_ID, argc, argv); \ } \ @@ -79,7 +76,9 @@ int zshim_run_ec_console_command(const struct zephyr_console_command *command, * * @s: The pointer to the string. * @len: The size of the string. + * + * Return: the number of bytes consumed. */ -void console_buf_notify_chars(const char *s, size_t len); +size_t console_buf_notify_chars(const char *s, size_t len); #endif /* __CROS_EC_ZEPHYR_CONSOLE_SHIM_H */ diff --git a/zephyr/shim/include/zephyr_espi_shim.h b/zephyr/shim/include/zephyr_espi_shim.h index 4f147752d7..ddc4da075c 100644 --- a/zephyr/shim/include/zephyr_espi_shim.h +++ b/zephyr/shim/include/zephyr_espi_shim.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/include/zephyr_gpio_signal.h b/zephyr/shim/include/zephyr_gpio_signal.h index 8949826987..1a98071d6d 100644 --- a/zephyr/shim/include/zephyr_gpio_signal.h +++ b/zephyr/shim/include/zephyr_gpio_signal.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -34,27 +34,48 @@ * a GPIO signal name from either the enum-name or a * unique name generated using the DTS ordinal. */ -#define GPIO_SIGNAL_NAME(id) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), \ - (GPIO_SIGNAL_NAME_FROM_ENUM(id)), \ - (GPIO_SIGNAL_NAME_FROM_ORD(id ## _ORD))) - -#define GPIO_SIGNAL(id) GPIO_SIGNAL_NAME(id) -#define GPIO_SIGNAL_WITH_COMMA(id) \ - GPIO_SIGNAL(id), +#define GPIO_SIGNAL_NAME(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), \ + (GPIO_SIGNAL_NAME_FROM_ENUM(id)), \ + (GPIO_SIGNAL_NAME_FROM_ORD(id##_ORD))) + +#define GPIO_SIGNAL(id) GPIO_SIGNAL_NAME(id) + +#define GPIO_IMPL_SIGNAL(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, gpios), (GPIO_SIGNAL(id), ), ()) + +#define GPIO_UNIMPL_SIGNAL(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, gpios), (), \ + (GPIO_SIGNAL_NAME(id) = GPIO_UNIMPLEMENTED, )) +/* + * Create a list of aliases to allow remapping of aliased names. + */ +#define GPIO_DT_MK_ALIAS(id) \ + DT_STRING_UPPER_TOKEN(id, alias) = DT_STRING_UPPER_TOKEN(id, enum_name), + +#define GPIO_DT_ALIAS_LIST(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, alias), (GPIO_DT_MK_ALIAS(id)), ()) + enum gpio_signal { GPIO_UNIMPLEMENTED = -1, #if DT_NODE_EXISTS(DT_PATH(named_gpios)) - DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_SIGNAL_WITH_COMMA) + DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_IMPL_SIGNAL) #endif - GPIO_COUNT, - GPIO_LIMIT = 0x0FFF, + GPIO_COUNT, +#if DT_NODE_EXISTS(DT_PATH(named_gpios)) + DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_UNIMPL_SIGNAL) + DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_DT_ALIAS_LIST) +#endif + GPIO_LIMIT = 0x0FFF, IOEX_SIGNAL_START = GPIO_LIMIT + 1, IOEX_SIGNAL_END = IOEX_SIGNAL_START, IOEX_LIMIT = 0x1FFF, }; -#undef GPIO_SIGNAL_WITH_COMMA +#undef GPIO_DT_ALIAS_LIST +#undef GPIO_DT_MK_ALIAS +#undef GPIO_IMPL_SIGNAL +#undef GPIO_UNIMPL_SIGNAL BUILD_ASSERT(GPIO_COUNT < GPIO_LIMIT); @@ -118,8 +139,8 @@ BUILD_ASSERT(GPIO_COUNT < GPIO_LIMIT); */ struct gpio_dt_spec; -#define GPIO_DT_PTR_DECL(id) extern const struct gpio_dt_spec * const \ - GPIO_DT_NAME(GPIO_SIGNAL(id)); +#define GPIO_DT_PTR_DECL(id) \ + extern const struct gpio_dt_spec *const GPIO_DT_NAME(GPIO_SIGNAL(id)); DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_DT_PTR_DECL) @@ -127,14 +148,13 @@ DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_DT_PTR_DECL) #endif /* DT_NODE_EXISTS(DT_PATH(named_gpios)) */ - #define IOEXPANDER_ID_EXPAND(id) ioex_chip_##id #define IOEXPANDER_ID(id) IOEXPANDER_ID_EXPAND(id) #define IOEXPANDER_ID_FROM_INST_WITH_COMMA(id) IOEXPANDER_ID(id), enum ioexpander_id { DT_FOREACH_STATUS_OKAY(cros_ioex_chip, - IOEXPANDER_ID_FROM_INST_WITH_COMMA) - CONFIG_IO_EXPANDER_PORT_COUNT + IOEXPANDER_ID_FROM_INST_WITH_COMMA) + CONFIG_IO_EXPANDER_PORT_COUNT }; /** diff --git a/zephyr/shim/include/zephyr_hooks_shim.h b/zephyr/shim/include/zephyr_hooks_shim.h index 1798a42aeb..f3949787bd 100644 --- a/zephyr/shim/include/zephyr_hooks_shim.h +++ b/zephyr/shim/include/zephyr_hooks_shim.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,7 +10,6 @@ #include <zephyr/init.h> #include <zephyr/kernel.h> -#include <zephyr/zephyr.h> #include "common.h" #include "cros_version.h" @@ -31,7 +30,7 @@ int hook_call_deferred(const struct deferred_data *data, int us); K_WORK_DELAYABLE_DEFINE(routine##_work_data, \ (void (*)(struct k_work *))routine); \ __maybe_unused const struct deferred_data routine##_data = { \ - .work = &routine##_work_data, \ + .work = &routine##_work_data, \ } /** diff --git a/zephyr/shim/include/zephyr_host_command.h b/zephyr/shim/include/zephyr_host_command.h index cc67049614..e2f0a7c296 100644 --- a/zephyr/shim/include/zephyr_host_command.h +++ b/zephyr/shim/include/zephyr_host_command.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -27,24 +27,19 @@ bool in_host_command_main(void); /** * See include/host_command.h for documentation. */ -#define DECLARE_HOST_COMMAND(_command, _routine, _version_mask) \ - STRUCT_SECTION_ITERABLE(host_command, _cros_hcmd_##_command) = { \ - .command = _command, \ - .handler = _routine, \ - .version_mask = _version_mask, \ +#define DECLARE_HOST_COMMAND(_command, _routine, _version_mask) \ + STRUCT_SECTION_ITERABLE(host_command, _cros_hcmd_##_command) = { \ + .command = _command, \ + .handler = _routine, \ + .version_mask = _version_mask, \ } #else /* !CONFIG_PLATFORM_EC_HOSTCMD */ /* - * Create a fake routine to call the function. The linker should - * garbage-collect it since it is behind 'if (0)' + * Create a global var to reference the host command. The linker should remove + * it since it is never referenced. */ -#define DECLARE_HOST_COMMAND(command, routine, version_mask) \ - int __remove_ ## command(void) \ - { \ - if (0) \ - routine(NULL); \ - return 0; \ - } +#define DECLARE_HOST_COMMAND(command, routine, version_mask) \ + int __remove_##command = ((int)(routine)) #endif /* CONFIG_PLATFORM_EC_HOSTCMD */ diff --git a/zephyr/shim/include/zephyr_mkbp_event.h b/zephyr/shim/include/zephyr_mkbp_event.h index 159aebc8e1..b8cb88029d 100644 --- a/zephyr/shim/include/zephyr_mkbp_event.h +++ b/zephyr/shim/include/zephyr_mkbp_event.h @@ -1,23 +1,22 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#if !defined(__CROS_EC_MKBP_EVENT_H) || \ - defined(__CROS_EC_ZEPHYR_MKBP_EVENT_H) +#if !defined(__CROS_EC_MKBP_EVENT_H) || defined(__CROS_EC_ZEPHYR_MKBP_EVENT_H) #error "This file must only be included from mkbp_event.h. " \ "Include mkbp_event.h directly" #endif #define __CROS_EC_ZEPHYR_MKBP_EVENT_H -const struct mkbp_event_source *zephyr_find_mkbp_event_source( - uint8_t event_type); +const struct mkbp_event_source * +zephyr_find_mkbp_event_source(uint8_t event_type); /** * See include/mkbp_event.h for documentation. */ -#define DECLARE_EVENT_SOURCE(_type, _func) \ - STRUCT_SECTION_ITERABLE(mkbp_event_source, _cros_evtsrc_##_func) = { \ - .event_type = _type, \ - .get_data = _func, \ +#define DECLARE_EVENT_SOURCE(_type, _func) \ + STRUCT_SECTION_ITERABLE(mkbp_event_source, _cros_evtsrc_##_func) = { \ + .event_type = _type, \ + .get_data = _func, \ } diff --git a/zephyr/shim/include/zephyr_write_protect.h b/zephyr/shim/include/zephyr_write_protect.h index 3af2fb3576..227af16bd0 100644 --- a/zephyr/shim/include/zephyr_write_protect.h +++ b/zephyr/shim/include/zephyr_write_protect.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index dee8d0af71..97968e8a52 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -20,7 +20,7 @@ endif() zephyr_library_sources_ifdef(no_libgcc libgcc_${ARCH}.S) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ADC adc.c) +zephyr_library_sources_ifdef(CONFIG_ADC adc.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY battery.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER_RT9490 @@ -43,6 +43,8 @@ if (NOT DEFINED CONFIG_PLATFORM_EC_KEYBOARD_DISCRETE) keyboard_raw.c) endif() zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD keyscan.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LOG_BACKEND_CONSOLE_BUFFER + log_backend_console_buffer.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MKBP_EVENT mkbp_event.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MOTIONSENSE motionsense_sensors.c) @@ -73,3 +75,7 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBA usba.c) zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ power_host_sleep_api.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_MUX usb_muxes.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB + bb_retimer_usb_mux.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_HB + bb_retimer_usb_mux.c) diff --git a/zephyr/shim/src/adc.c b/zephyr/shim/src/adc.c index 80cf60391d..e14ef9f20f 100644 --- a/zephyr/shim/src/adc.c +++ b/zephyr/shim/src/adc.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -18,10 +18,10 @@ LOG_MODULE_REGISTER(shim_adc, LOG_LEVEL_ERR); #define HAS_NAMED_ADC_CHANNELS DT_NODE_EXISTS(DT_INST(0, named_adc_channels)) #if HAS_NAMED_ADC_CHANNELS -#define ADC_CHANNEL_COMMA(node_id) \ +#define ADC_CHANNEL_INIT(node_id) \ [ZSHIM_ADC_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .dev = DEVICE_DT_GET(DT_IO_CHANNELS_CTLR(node_id)), \ + .name = DT_NODE_FULL_NAME(node_id), \ + .dev = DEVICE_DT_GET(DT_IO_CHANNELS_CTLR(node_id)), \ .input_ch = DT_IO_CHANNELS_INPUT(node_id), \ .factor_mul = DT_PROP(node_id, mul), \ .factor_div = DT_PROP(node_id, div), \ @@ -35,11 +35,11 @@ LOG_MODULE_REGISTER(shim_adc, LOG_LEVEL_ERR); }, \ }, #ifdef CONFIG_ADC_CHANNELS_RUNTIME_CONFIG -struct adc_t adc_channels[] = { DT_FOREACH_CHILD( - DT_INST(0, named_adc_channels), ADC_CHANNEL_COMMA) }; +struct adc_t adc_channels[] = { DT_FOREACH_CHILD(DT_INST(0, named_adc_channels), + ADC_CHANNEL_INIT) }; #else const struct adc_t adc_channels[] = { DT_FOREACH_CHILD( - DT_INST(0, named_adc_channels), ADC_CHANNEL_COMMA) }; + DT_INST(0, named_adc_channels), ADC_CHANNEL_INIT) }; #endif #endif /* named_adc_channels */ diff --git a/zephyr/shim/src/battery.c b/zephyr/shim/src/battery.c index 73f72f2e81..cdf6e6d894 100644 --- a/zephyr/shim/src/battery.c +++ b/zephyr/shim/src/battery.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,7 +8,7 @@ #include "battery_fuel_gauge.h" #define NODE_FUEL_GAUGE(node) \ -{ \ + { \ .manuf_name = DT_PROP(node, manuf_name), \ .device_name = DT_PROP(node, device_name), \ .ship_mode = { \ @@ -22,7 +22,7 @@ .reg_data = DT_PROP_OR(node, sleep_mode_reg_data, 0), \ }, \ .fet = { \ - .mfgacc_support = DT_PROP_OR(node, fet_mgfacc_support, 0), \ + .mfgacc_support = DT_PROP_OR(node, fet_mfgacc_support, 0), \ .reg_addr = DT_PROP_OR(node, fet_reg_addr, 0), \ .reg_mask = DT_PROP(node, fet_reg_mask), \ .disconnect_val = DT_PROP(node, fet_disconnect_val), \ @@ -34,32 +34,29 @@ (.imbalance_mv = DT_STRING_TOKEN(node, imbalance_mv),), ()) \ }, -#define NODE_BATT_INFO(node) \ -{ \ - .voltage_max = DT_PROP(node, voltage_max), \ - .voltage_normal = DT_PROP(node, voltage_normal), \ - .voltage_min = DT_PROP(node, voltage_min), \ - .precharge_voltage = DT_PROP_OR(node, precharge_voltage, 0), \ - .precharge_current = DT_PROP_OR(node, precharge_current, 0), \ - .start_charging_min_c = DT_PROP(node, start_charging_min_c), \ - .start_charging_max_c = DT_PROP(node, start_charging_max_c), \ - .charging_min_c = DT_PROP(node, charging_min_c), \ - .charging_max_c = DT_PROP(node, charging_max_c), \ - .discharging_min_c = DT_PROP(node, discharging_min_c), \ - .discharging_max_c = DT_PROP(node, discharging_max_c), \ -}, +#define NODE_BATT_INFO(node) \ + { \ + .voltage_max = DT_PROP(node, voltage_max), \ + .voltage_normal = DT_PROP(node, voltage_normal), \ + .voltage_min = DT_PROP(node, voltage_min), \ + .precharge_voltage = DT_PROP_OR(node, precharge_voltage, 0), \ + .precharge_current = DT_PROP_OR(node, precharge_current, 0), \ + .start_charging_min_c = DT_PROP(node, start_charging_min_c), \ + .start_charging_max_c = DT_PROP(node, start_charging_max_c), \ + .charging_min_c = DT_PROP(node, charging_min_c), \ + .charging_max_c = DT_PROP(node, charging_max_c), \ + .discharging_min_c = DT_PROP(node, discharging_min_c), \ + .discharging_max_c = DT_PROP(node, discharging_max_c), \ + }, -#define NODE_BATT_PARAMS(node) \ -{ \ - .fuel_gauge = NODE_FUEL_GAUGE(node) \ - .batt_info = NODE_BATT_INFO(node) \ -}, +#define NODE_BATT_PARAMS(node) \ + { .fuel_gauge = NODE_FUEL_GAUGE(node).batt_info = \ + NODE_BATT_INFO(node) }, #if DT_HAS_COMPAT_STATUS_OKAY(battery_smart) -const struct board_batt_params board_battery_info[] = { - DT_FOREACH_STATUS_OKAY(battery_smart, NODE_BATT_PARAMS) -}; +const struct board_batt_params board_battery_info[] = { DT_FOREACH_STATUS_OKAY( + battery_smart, NODE_BATT_PARAMS) }; #if DT_NODE_EXISTS(DT_NODELABEL(default_battery)) #define BAT_ENUM(node) DT_CAT(BATTERY_, node) diff --git a/zephyr/shim/src/bb_retimer_usb_mux.c b/zephyr/shim/src/bb_retimer_usb_mux.c new file mode 100644 index 0000000000..c40068211e --- /dev/null +++ b/zephyr/shim/src/bb_retimer_usb_mux.c @@ -0,0 +1,39 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/sys/util_macro.h> +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +/** + * This prevents creating struct usb_mux bb_controls[] for platforms that didn't + * migrate USB mux configuration to DTS yet. + */ +#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_usb_mux_chain) + +BB_RETIMER_CHECK_SAME_CONTROLS(BB_RETIMER_INSTANCES_LIST) + +/** + * @brief bb_controls array should be constant only if configuration cannot + * change in runtime + */ +#define BB_CONTROLS_CONST \ + COND_CODE_1(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG, \ + (), (const)) + +/** + * Define bb_controls for BB retimers in USB muxes chain e.g. + * [0] = { + * .retimer_rst_gpio = IOEX_USB_C0_BB_RETIMER_RST, + * .usb_ls_en_gpio = IOEX_USB_C0_BB_RETIMER_LS_EN, + * }, + * [1] = { ... }, + */ +BB_CONTROLS_CONST struct bb_usb_control bb_controls[] = { + USB_MUX_BB_RETIMERS_CONTROLS_ARRAY +}; + +#endif /* #if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_usb_mux_chain) */ diff --git a/zephyr/shim/src/bc12.c b/zephyr/shim/src/bc12.c index 3bdab5f16e..6542a166eb 100644 --- a/zephyr/shim/src/bc12.c +++ b/zephyr/shim/src/bc12.c @@ -1,29 +1,46 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/devicetree.h> #include "usbc/bc12_pi3usb9201.h" +#include "usbc/bc12_rt1718s.h" #include "usbc/bc12_rt1739.h" #include "usbc/bc12_rt9490.h" +#include "usbc/tcpc_rt1718s.h" #include "usbc/utils.h" #include "usb_charge.h" -#if DT_HAS_COMPAT_STATUS_OKAY(RT1739_BC12_COMPAT) || \ +#if DT_HAS_COMPAT_STATUS_OKAY(RT1718S_BC12_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(RT1739_BC12_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(RT9490_BC12_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(PI3USB9201_COMPAT) -#define BC12_CHIP(id, fn) [USBC_PORT(id)] = fn(id) - -/* Power Path Controller */ -struct bc12_config bc12_ports[CHARGE_PORT_COUNT] = { - DT_FOREACH_STATUS_OKAY_VARGS(RT1739_BC12_COMPAT, BC12_CHIP, - BC12_CHIP_RT1739) - DT_FOREACH_STATUS_OKAY_VARGS(RT9490_BC12_COMPAT, BC12_CHIP, - BC12_CHIP_RT9490) - DT_FOREACH_STATUS_OKAY_VARGS(PI3USB9201_COMPAT, BC12_CHIP, - BC12_CHIP_PI3USB9201) -}; +/* Check RT1718S dependency. BC12 node must be dependent on TCPC node. */ +#if DT_HAS_COMPAT_STATUS_OKAY(RT1718S_BC12_COMPAT) +BUILD_ASSERT(DT_HAS_COMPAT_STATUS_OKAY(RT1718S_TCPC_COMPAT)); +#endif + +#define BC12_CHIP_ENTRY(usbc_id, bc12_id, chip_fn) \ + [USBC_PORT_NEW(usbc_id)] = chip_fn(bc12_id) + +#define CHECK_COMPAT(compat, usbc_id, bc12_id, config) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(bc12_id, compat), \ + (BC12_CHIP_ENTRY(usbc_id, bc12_id, config)), ()) + +#define BC12_CHIP_FIND(usbc_id, bc12_id) \ + CHECK_COMPAT(RT1718S_BC12_COMPAT, usbc_id, bc12_id, BC12_CHIP_RT1718S) \ + CHECK_COMPAT(RT1739_BC12_COMPAT, usbc_id, bc12_id, BC12_CHIP_RT1739) \ + CHECK_COMPAT(RT9490_BC12_COMPAT, usbc_id, bc12_id, BC12_CHIP_RT9490) \ + CHECK_COMPAT(PI3USB9201_COMPAT, usbc_id, bc12_id, BC12_CHIP_PI3USB9201) + +#define BC12_CHIP(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, bc12), \ + (BC12_CHIP_FIND(usbc_id, DT_PHANDLE(usbc_id, bc12))), ()) + +/* BC1.2 controllers */ +struct bc12_config bc12_ports[CHARGE_PORT_COUNT] = { DT_FOREACH_STATUS_OKAY( + named_usbc_port, BC12_CHIP) }; #endif /* #if DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/shim/src/bc12_pi3usb9201.c b/zephyr/shim/src/bc12_pi3usb9201.c index 3322e0770c..25d1962ff2 100644 --- a/zephyr/shim/src/bc12_pi3usb9201.c +++ b/zephyr/shim/src/bc12_pi3usb9201.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,29 +13,35 @@ #include "usb_charge.h" #include "usb_pd.h" #include "usbc/utils.h" - +#include "i2c/i2c.h" #if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 0, - "No compatible BC1.2 instance found"); + "No compatible BC1.2 instance found"); -#define USBC_PORT_BC12(inst) \ - { \ - .i2c_port = I2C_PORT(DT_PHANDLE(DT_DRV_INST(inst), port)), \ - .i2c_addr_flags = DT_STRING_UPPER_TOKEN( \ - DT_DRV_INST(inst), i2c_addr_flags), \ +#define USBC_PORT_BC12(usbc_id, bc12_id) \ + [USBC_PORT_NEW(usbc_id)] = { \ + .i2c_port = I2C_PORT_BY_DEV(bc12_id), \ + .i2c_addr_flags = DT_REG_ADDR(bc12_id), \ }, +#define PI3SUSB9201_CHECK(usbc_id, bc12_id) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(bc12_id, pericom_pi3usb9201), \ + (USBC_PORT_BC12(usbc_id, bc12_id)), ()) + +#define BC12_CHIP(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, bc12), \ + (PI3SUSB9201_CHECK(usbc_id, DT_PHANDLE(usbc_id, bc12))), \ + ()) + const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - DT_INST_FOREACH_STATUS_OKAY(USBC_PORT_BC12) + DT_FOREACH_STATUS_OKAY(named_usbc_port, BC12_CHIP) }; -static void bc12_enable_irqs(void) -{ +static void bc12_enable_irqs(void){ DT_INST_FOREACH_STATUS_OKAY(BC12_GPIO_ENABLE_INTERRUPT) -} -DECLARE_HOOK(HOOK_INIT, bc12_enable_irqs, HOOK_PRIO_DEFAULT); +} DECLARE_HOOK(HOOK_INIT, bc12_enable_irqs, HOOK_PRIO_DEFAULT); #if DT_INST_NODE_HAS_PROP(0, irq) void usb0_evt(enum gpio_signal signal) diff --git a/zephyr/shim/src/bc12_rt9490.c b/zephyr/shim/src/bc12_rt9490.c index abecfcfa3a..df10fb5570 100644 --- a/zephyr/shim/src/bc12_rt9490.c +++ b/zephyr/shim/src/bc12_rt9490.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,20 +19,25 @@ static void rt9490_bc12_enable_irqs(void) } DECLARE_HOOK(HOOK_INIT, rt9490_bc12_enable_irqs, HOOK_PRIO_DEFAULT); -#define GPIO_SIGNAL_FROM_INST(inst) \ - GPIO_SIGNAL(DT_PHANDLE(DT_INST_PHANDLE(inst, irq), irq_pin)) +#define RT9490_DISPATCH_INTERRUPT(usbc_id, bc12_id) \ + IF_ENABLED(DT_NODE_HAS_PROP(bc12_id, irq), \ + (case GPIO_SIGNAL( \ + DT_PHANDLE(DT_PHANDLE(bc12_id, irq), irq_pin)) \ + : rt9490_interrupt(USBC_PORT_NEW(usbc_id)); \ + break;)) -#define RT9490_DISPATCH_INTERRUPT(inst) \ - IF_ENABLED(DT_INST_NODE_HAS_PROP(inst, irq), \ - (case GPIO_SIGNAL_FROM_INST(inst): \ - rt9490_interrupt(USBC_PORT_FROM_INST(inst)); \ - break; \ - )) +#define RT9490_CHECK(usbc_id, bc12_id) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(bc12_id, richtek_rt9490_bc12), \ + (RT9490_DISPATCH_INTERRUPT(usbc_id, bc12_id)), ()) + +#define RT9490_INTERRUPT(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, bc12), \ + (RT9490_CHECK(usbc_id, DT_PHANDLE(usbc_id, bc12))), ()) void rt9490_bc12_dt_interrupt(enum gpio_signal signal) { switch (signal) { - DT_INST_FOREACH_STATUS_OKAY(RT9490_DISPATCH_INTERRUPT); + DT_FOREACH_STATUS_OKAY(named_usbc_port, RT9490_INTERRUPT) default: break; } diff --git a/zephyr/shim/src/cbi/cbi_eeprom.c b/zephyr/shim/src/cbi/cbi_eeprom.c index 4b9d718ef0..aa6c4e0fa1 100644 --- a/zephyr/shim/src/cbi/cbi_eeprom.c +++ b/zephyr/shim/src/cbi/cbi_eeprom.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/cbi/cros_cbi.c b/zephyr/shim/src/cbi/cros_cbi.c index 7ae1fbc098..5b90f9442d 100644 --- a/zephyr/shim/src/cbi/cros_cbi.c +++ b/zephyr/shim/src/cbi/cros_cbi.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/cbi/cros_cbi_fw_config.c b/zephyr/shim/src/cbi/cros_cbi_fw_config.c index e94c950a0f..6710a30726 100644 --- a/zephyr/shim/src/cbi/cros_cbi_fw_config.c +++ b/zephyr/shim/src/cbi/cros_cbi_fw_config.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,15 +20,15 @@ LOG_MODULE_REGISTER(cros_cbi_fw_config, LOG_LEVEL_ERR); * Statically count the number of bits set in a 32 bit constant expression. */ #define BIT_SET(v, b) ((v >> b) & 1) -#define BIT_COUNT(v) \ +#define BIT_COUNT(v) \ (BIT_SET(v, 31) + BIT_SET(v, 30) + BIT_SET(v, 29) + BIT_SET(v, 28) + \ BIT_SET(v, 27) + BIT_SET(v, 26) + BIT_SET(v, 25) + BIT_SET(v, 24) + \ BIT_SET(v, 23) + BIT_SET(v, 22) + BIT_SET(v, 21) + BIT_SET(v, 20) + \ BIT_SET(v, 19) + BIT_SET(v, 18) + BIT_SET(v, 17) + BIT_SET(v, 16) + \ BIT_SET(v, 15) + BIT_SET(v, 14) + BIT_SET(v, 13) + BIT_SET(v, 12) + \ - BIT_SET(v, 11) + BIT_SET(v, 10) + BIT_SET(v, 9) + BIT_SET(v, 8) + \ - BIT_SET(v, 7) + BIT_SET(v, 6) + BIT_SET(v, 5) + BIT_SET(v, 4) + \ - BIT_SET(v, 3) + BIT_SET(v, 2) + BIT_SET(v, 1) + BIT_SET(v, 0)) + BIT_SET(v, 11) + BIT_SET(v, 10) + BIT_SET(v, 9) + BIT_SET(v, 8) + \ + BIT_SET(v, 7) + BIT_SET(v, 6) + BIT_SET(v, 5) + BIT_SET(v, 4) + \ + BIT_SET(v, 3) + BIT_SET(v, 2) + BIT_SET(v, 1) + BIT_SET(v, 0)) /* * Shorthand macros to access properties on the field node. @@ -64,7 +64,7 @@ LOG_MODULE_REGISTER(cros_cbi_fw_config, LOG_LEVEL_ERR); * fw_config nodes, and another for the child field nodes in each * of the fw_config nodes. */ -#define PLUS_FIELD_SIZE(inst) + DT_PROP(inst, size) +#define PLUS_FIELD_SIZE(inst) +DT_PROP(inst, size) #define FIELDS_ALL_SIZE(inst) \ DT_FOREACH_CHILD_STATUS_OKAY(inst, PLUS_FIELD_SIZE) @@ -83,23 +83,21 @@ BUILD_ASSERT(TOTAL_FW_CONFIG_NODES_SIZE <= 32, * total of the sizes. They should match. */ #define OR_FIELD_SHIFT_MASK(id) | FW_SHIFT_MASK(id) -#define FIELDS_ALL_BITS_SET(inst) \ +#define FIELDS_ALL_BITS_SET(inst) \ DT_FOREACH_CHILD_STATUS_OKAY(inst, OR_FIELD_SHIFT_MASK) #define TOTAL_BITS_SET \ - (0 DT_FOREACH_STATUS_OKAY(CBI_FW_CONFIG_COMPAT, \ - FIELDS_ALL_BITS_SET)) + (0 DT_FOREACH_STATUS_OKAY(CBI_FW_CONFIG_COMPAT, FIELDS_ALL_BITS_SET)) BUILD_ASSERT(BIT_COUNT(TOTAL_BITS_SET) == TOTAL_FW_CONFIG_NODES_SIZE, - "CBI FW Config has overlapping fields"); + "CBI FW Config has overlapping fields"); /* * Validation for each assigned field values. * The value must fit within the parent's defined size. */ -#define FW_VALUE_BUILD_ASSERT(inst) \ - BUILD_ASSERT(DT_PROP(inst, value) < \ - (1 << FW_PARENT_SIZE(inst)), \ +#define FW_VALUE_BUILD_ASSERT(inst) \ + BUILD_ASSERT(DT_PROP(inst, value) < (1 << FW_PARENT_SIZE(inst)), \ "CBI FW Config value too big"); DT_FOREACH_STATUS_OKAY(CBI_FW_CONFIG_VALUE_COMPAT, FW_VALUE_BUILD_ASSERT) @@ -144,9 +142,9 @@ DT_FOREACH_STATUS_OKAY(CBI_FW_CONFIG_VALUE_COMPAT, FW_VALUE_BUILD_ASSERT) * The per-field case statement. * Extract the field value using the start and size. */ -#define FW_FIELD_CASE(id, cached, value) \ - case CBI_FW_CONFIG_ENUM(id): \ - *value = (cached >> FW_START(id)) & FW_MASK(id); \ +#define FW_FIELD_CASE(id, cached, value) \ + case CBI_FW_CONFIG_ENUM(id): \ + *value = (cached >> FW_START(id)) & FW_MASK(id); \ break; /* @@ -173,10 +171,9 @@ void cros_cbi_fw_config_init(void) LOG_INF("Read CBI FW Config : 0x%08X\n", cached_fw_config); } -static int cros_cbi_fw_config_get_field( - uint32_t cached_fw_config, - enum cbi_fw_config_field_id field_id, - uint32_t *value) +static int cros_cbi_fw_config_get_field(uint32_t cached_fw_config, + enum cbi_fw_config_field_id field_id, + uint32_t *value) { switch (field_id) { /* @@ -184,8 +181,7 @@ static int cros_cbi_fw_config_get_field( * and create cases for all of their child nodes. */ DT_FOREACH_STATUS_OKAY_VARGS(CBI_FW_CONFIG_COMPAT, - FW_FIELD_NODES, - cached_fw_config, + FW_FIELD_NODES, cached_fw_config, value) default: return -EINVAL; diff --git a/zephyr/shim/src/cbi/cros_cbi_ssfc.c b/zephyr/shim/src/cbi/cros_cbi_ssfc.c index a2dc3ccf0a..eb0f69b1cb 100644 --- a/zephyr/shim/src/cbi/cros_cbi_ssfc.c +++ b/zephyr/shim/src/cbi/cros_cbi_ssfc.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -129,9 +129,8 @@ BUILD_ASSERT(sizeof(union cbi_ssfc) == sizeof(uint32_t), DT_INST_FOREACH_STATUS_OKAY(CBI_SSFC_VALUE_BUILD_ASSERT) -static const uint8_t ssfc_values[] = { - DT_INST_FOREACH_STATUS_OKAY(CBI_SSFC_VALUE_ARRAY) -}; +static const uint8_t ssfc_values[] = { DT_INST_FOREACH_STATUS_OKAY( + CBI_SSFC_VALUE_ARRAY) }; static union cbi_ssfc cached_ssfc; diff --git a/zephyr/shim/src/charger.c b/zephyr/shim/src/charger.c index 08aa121a19..35ede5a8f7 100644 --- a/zephyr/shim/src/charger.c +++ b/zephyr/shim/src/charger.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,33 +10,51 @@ #include "charger/chg_isl9241.h" #include "charger/chg_rt9490.h" #include "charger/chg_sm5803.h" +#include "usbc/utils.h" -#define CHG_CHIP(id, fn) [DT_REG_ADDR(DT_PARENT(id))] = fn(id) +#define CHG_CHIP_ENTRY(usbc_id, chg_id, config_fn) \ + [USBC_PORT_NEW(usbc_id)] = config_fn(chg_id) + +#define CHECK_COMPAT(compat, usbc_id, chg_id, config_fn) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(chg_id, compat), \ + (CHG_CHIP_ENTRY(usbc_id, chg_id, config_fn)), ()) + +#define CHG_CHIP_FIND(usbc_id, chg_id) \ + CHECK_COMPAT(BQ25710_CHG_COMPAT, usbc_id, chg_id, CHG_CONFIG_BQ25710) \ + CHECK_COMPAT(ISL923X_CHG_COMPAT, usbc_id, chg_id, CHG_CONFIG_ISL923X) \ + CHECK_COMPAT(ISL923X_EMUL_COMPAT, usbc_id, chg_id, CHG_CONFIG_ISL923X) \ + CHECK_COMPAT(ISL9241_CHG_COMPAT, usbc_id, chg_id, CHG_CONFIG_ISL9241) \ + CHECK_COMPAT(RT9490_CHG_COMPAT, usbc_id, chg_id, CHG_CONFIG_RT9490) \ + CHECK_COMPAT(RT9490_EMUL_COMPAT, usbc_id, chg_id, CHG_CONFIG_RT9490) \ + CHECK_COMPAT(SM5803_CHG_COMPAT, usbc_id, chg_id, CHG_CONFIG_SM5803) + +#define CHG_CHIP(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, chg), \ + (CHG_CHIP_FIND(usbc_id, DT_PHANDLE(usbc_id, chg))), ()) + +#define CHG_CHIP_ALT(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, chg_alt), \ + (CHG_CHIP_FIND(usbc_id, DT_PHANDLE(usbc_id, chg_alt))), \ + ()) + +#define MAYBE_CONST \ + COND_CODE_1(CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG, (), (const)) /* Charger chips */ -#ifndef CONFIG_PLATFORM_EC_CHARGER_RUNTIME_CONFIG -const struct charger_config_t chg_chips[] = { -#else -struct charger_config_t chg_chips[] = { -#endif - DT_FOREACH_STATUS_OKAY_VARGS(BQ25710_CHG_COMPAT, CHG_CHIP, - CHG_CONFIG_BQ25710) - DT_FOREACH_STATUS_OKAY_VARGS(ISL923X_CHG_COMPAT, CHG_CHIP, - CHG_CONFIG_ISL923X) - DT_FOREACH_STATUS_OKAY_VARGS(ISL9241_CHG_COMPAT, CHG_CHIP, - CHG_CONFIG_ISL9241) - DT_FOREACH_STATUS_OKAY_VARGS(RT9490_CHG_COMPAT, CHG_CHIP, - CHG_CONFIG_RT9490) - DT_FOREACH_STATUS_OKAY_VARGS(SM5803_CHG_COMPAT, CHG_CHIP, - CHG_CONFIG_SM5803) -}; +MAYBE_CONST struct charger_config_t chg_chips[] = { DT_FOREACH_STATUS_OKAY( + named_usbc_port, CHG_CHIP) }; + +/* Alternate options */ +const struct charger_config_t chg_chips_alt[] = { DT_FOREACH_STATUS_OKAY( + named_usbc_port, CHG_CHIP_ALT) }; #ifdef CONFIG_PLATFORM_EC_CHARGER_SINGLE_CHIP BUILD_ASSERT(ARRAY_SIZE(chg_chips) == 1, - "For the CHARGER_SINGLE_CHIP config, the number of defined charger " - "chips must equal 1."); + "For the CHARGER_SINGLE_CHIP config, the number of defined charger " + "chips must equal 1."); #else -BUILD_ASSERT(ARRAY_SIZE(chg_chips) == CONFIG_USB_PD_PORT_MAX_COUNT, +BUILD_ASSERT( + ARRAY_SIZE(chg_chips) == CONFIG_USB_PD_PORT_MAX_COUNT, "For the OCPC config, the number of defined charger chips must equal " "the number of USB-C ports."); #endif diff --git a/zephyr/shim/src/chipset_api.c b/zephyr/shim/src/chipset_api.c index 3bfa420980..6c48719a7f 100644 --- a/zephyr/shim/src/chipset_api.c +++ b/zephyr/shim/src/chipset_api.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -38,7 +38,9 @@ void chipset_reset(enum chipset_shutdown_reason reason) /* TODO: b/214509787 * To be added later when this functionality is implemented in ap_pwrseq. */ -void chipset_throttle_cpu(int throttle) { } +void chipset_throttle_cpu(int throttle) +{ +} void init_reset_log(void) { diff --git a/zephyr/shim/src/chipset_state_check.h b/zephyr/shim/src/chipset_state_check.h index 879f700d89..2d10b2ce4a 100644 --- a/zephyr/shim/src/chipset_state_check.h +++ b/zephyr/shim/src/chipset_state_check.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,19 +9,12 @@ #include "chipset.h" #include "ap_power/ap_power_interface.h" -BUILD_ASSERT((int)AP_POWER_STATE_HARD_OFF == - (int)CHIPSET_STATE_HARD_OFF); -BUILD_ASSERT((int)AP_POWER_STATE_SOFT_OFF == - (int)CHIPSET_STATE_SOFT_OFF); -BUILD_ASSERT((int)AP_POWER_STATE_SUSPEND == - (int)CHIPSET_STATE_SUSPEND); -BUILD_ASSERT((int)AP_POWER_STATE_ON == - (int)CHIPSET_STATE_ON); -BUILD_ASSERT((int)AP_POWER_STATE_STANDBY == - (int)CHIPSET_STATE_STANDBY); -BUILD_ASSERT((int)AP_POWER_STATE_ANY_OFF == - (int)CHIPSET_STATE_ANY_OFF); -BUILD_ASSERT((int)AP_POWER_STATE_ANY_SUSPEND == - (int)CHIPSET_STATE_ANY_SUSPEND); +BUILD_ASSERT((int)AP_POWER_STATE_HARD_OFF == (int)CHIPSET_STATE_HARD_OFF); +BUILD_ASSERT((int)AP_POWER_STATE_SOFT_OFF == (int)CHIPSET_STATE_SOFT_OFF); +BUILD_ASSERT((int)AP_POWER_STATE_SUSPEND == (int)CHIPSET_STATE_SUSPEND); +BUILD_ASSERT((int)AP_POWER_STATE_ON == (int)CHIPSET_STATE_ON); +BUILD_ASSERT((int)AP_POWER_STATE_STANDBY == (int)CHIPSET_STATE_STANDBY); +BUILD_ASSERT((int)AP_POWER_STATE_ANY_OFF == (int)CHIPSET_STATE_ANY_OFF); +BUILD_ASSERT((int)AP_POWER_STATE_ANY_SUSPEND == (int)CHIPSET_STATE_ANY_SUSPEND); #endif /* __CHIPSET_STATE_CHECK_H__ */ diff --git a/zephyr/shim/src/console.c b/zephyr/shim/src/console.c index f8051d8638..2d0476149c 100644 --- a/zephyr/shim/src/console.c +++ b/zephyr/shim/src/console.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,9 +14,15 @@ #include <string.h> #include <zephyr/sys/printk.h> #include <zephyr/sys/ring_buffer.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include <zephyr/logging/log.h> +/* + * TODO(b/238433667): Include EC printf functions + * (crec_vsnprintf/crec_snprintf) until we switch to the standard + * vsnprintf/snprintf. + */ +#include "builtin/stdio.h" #include "console.h" #include "printf.h" #include "task.h" @@ -34,6 +40,9 @@ #error Must select only one shell backend #endif +BUILD_ASSERT(EC_TASK_PRIORITY(EC_SHELL_PRIO) == CONFIG_SHELL_THREAD_PRIORITY, + "EC_SHELL_PRIO does not match CONFIG_SHELL_THREAD_PRIORITY."); + LOG_MODULE_REGISTER(shim_console, LOG_LEVEL_ERR); static const struct device *uart_shell_dev = @@ -47,6 +56,8 @@ static struct k_poll_signal shell_init_signal; * (which requires locking the shell). */ static bool shell_stopped; + +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) RING_BUF_DECLARE(rx_buffer, CONFIG_UART_RX_BUF_SIZE); static void uart_rx_handle(const struct device *dev) @@ -81,10 +92,12 @@ static void uart_callback(const struct device *dev, void *user_data) if (uart_irq_rx_ready(dev)) uart_rx_handle(dev); } +#endif static void shell_uninit_callback(const struct shell *shell, int res) { if (!res) { +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) /* Set the new callback */ uart_irq_callback_user_data_set(uart_shell_dev, uart_callback, NULL); @@ -97,6 +110,7 @@ static void shell_uninit_callback(const struct shell *shell, int res) /* Enable RX interrupts */ uart_irq_rx_enable(uart_shell_dev); +#endif } /* Notify the uninit signal that we finished */ @@ -117,9 +131,11 @@ int uart_shell_stop(void) /* Clear all pending input */ uart_clear_input(); +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) /* Disable RX and TX interrupts */ uart_irq_rx_disable(uart_shell_dev); uart_irq_tx_disable(uart_shell_dev); +#endif /* Initialize the uninit signal */ k_poll_signal_init(&shell_uninit_signal); @@ -150,8 +166,8 @@ static void shell_init_from_work(struct k_work *work) #endif /* Initialize the shell and re-enable both RX and TX */ - shell_init(shell_zephyr, uart_shell_dev, - shell_cfg_flags, log_backend, level); + shell_init(shell_zephyr, uart_shell_dev, shell_cfg_flags, log_backend, + level); /* * shell_init() always resets the priority back to the default. @@ -160,8 +176,10 @@ static void shell_init_from_work(struct k_work *work) k_thread_priority_set(shell_zephyr->ctx->tid, EC_TASK_PRIORITY(EC_SHELL_PRIO)); +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) uart_irq_rx_enable(uart_shell_dev); uart_irq_tx_enable(uart_shell_dev); +#endif /* Notify the init signal that initialization is complete */ k_poll_signal_raise(&shell_init_signal, 0); @@ -174,9 +192,11 @@ void uart_shell_start(void) K_POLL_TYPE_SIGNAL, K_POLL_MODE_NOTIFY_ONLY, &shell_init_signal); +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) /* Disable RX and TX interrupts */ uart_irq_rx_disable(uart_shell_dev); uart_irq_tx_disable(uart_shell_dev); +#endif /* Initialize k_work to call shell init (this makes it thread safe) */ k_work_init(&shell_init_work, shell_init_from_work); @@ -193,7 +213,7 @@ void uart_shell_start(void) } #ifdef CONFIG_SHELL_HELP -static void print_console_help(char *name, +static void print_console_help(const char *name, const struct zephyr_console_command *command) { if (command->help) @@ -204,7 +224,7 @@ static void print_console_help(char *name, #endif int zshim_run_ec_console_command(const struct zephyr_console_command *command, - size_t argc, char **argv) + size_t argc, const char **argv) { int ret; @@ -245,7 +265,7 @@ int zshim_run_ec_console_command(const struct zephyr_console_command *command, #if defined(CONFIG_CONSOLE_CHANNEL) && DT_NODE_EXISTS(DT_PATH(ec_console)) #define EC_CONSOLE DT_PATH(ec_console) -static const char * const disabled_channels[] = DT_PROP(EC_CONSOLE, disabled); +static const char *const disabled_channels[] = DT_PROP(EC_CONSOLE, disabled); static const size_t disabled_channel_count = DT_PROP_LEN(EC_CONSOLE, disabled); static int init_ec_console(const struct device *unused) { @@ -253,20 +273,22 @@ static int init_ec_console(const struct device *unused) console_channel_disable(disabled_channels[i]); return 0; -} SYS_INIT(init_ec_console, PRE_KERNEL_1, 50); +} +SYS_INIT(init_ec_console, PRE_KERNEL_1, 50); #endif /* CONFIG_CONSOLE_CHANNEL && DT_NODE_EXISTS(DT_PATH(ec_console)) */ static int init_ec_shell(const struct device *unused) { #if defined(CONFIG_SHELL_BACKEND_SERIAL) - shell_zephyr = shell_backend_uart_get_ptr(); + shell_zephyr = shell_backend_uart_get_ptr(); #elif defined(CONFIG_SHELL_BACKEND_DUMMY) /* nocheck */ - shell_zephyr = shell_backend_dummy_get_ptr(); /* nocheck */ + shell_zephyr = shell_backend_dummy_get_ptr(); /* nocheck */ #else #error A shell backend must be enabled #endif return 0; -} SYS_INIT(init_ec_shell, PRE_KERNEL_1, 50); +} +SYS_INIT(init_ec_shell, PRE_KERNEL_1, 50); #ifdef TEST_BUILD const struct shell *get_ec_shell(void) @@ -305,24 +327,39 @@ void uart_flush_output(void) void uart_tx_flush(void) { +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) while (!uart_irq_tx_complete(uart_shell_dev)) ; +#endif } int uart_getc(void) { +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) uint8_t c; if (ring_buf_get(&rx_buffer, &c, 1)) { return c; } return -1; +#else + uint8_t c; + int rv; + + rv = uart_poll_in(uart_shell_dev, &c); + if (rv) { + return rv; + } + return c; +#endif } void uart_clear_input(void) { +#if defined(CONFIG_UART_INTERRUPT_DRIVEN) /* Reset the input ring buffer */ ring_buf_reset(&rx_buffer); +#endif } static void handle_sprintf_rv(int rv, size_t *len) @@ -345,7 +382,7 @@ static void zephyr_print(const char *buff, size_t size) * locked in ISRs. */ if (k_is_in_isr() || shell_stopped || - shell_zephyr->ctx->state != SHELL_STATE_ACTIVE) { + shell_zephyr->ctx->state != SHELL_STATE_ACTIVE) { printk("%s", buff); } else { shell_fprintf(shell_zephyr, SHELL_NORMAL, "%s", buff); @@ -403,18 +440,24 @@ int cprints(enum console_channel channel, const char *format, ...) if (console_channel_is_disabled(channel)) return EC_SUCCESS; - rv = crec_snprintf(buff, CONFIG_SHELL_PRINTF_BUFF_SIZE, "[%pT ", - PRINTF_TIMESTAMP_NOW); + buff[0] = '['; + len = 1; + + rv = snprintf_timestamp_now(buff + len, sizeof(buff) - len); + handle_sprintf_rv(rv, &len); + + rv = crec_snprintf(buff + len, CONFIG_SHELL_PRINTF_BUFF_SIZE - len, + " "); handle_sprintf_rv(rv, &len); va_start(args, format); rv = crec_vsnprintf(buff + len, CONFIG_SHELL_PRINTF_BUFF_SIZE - len, - format, args); + format, args); va_end(args); handle_sprintf_rv(rv, &len); rv = crec_snprintf(buff + len, CONFIG_SHELL_PRINTF_BUFF_SIZE - len, - "]\n"); + "]\n"); handle_sprintf_rv(rv, &len); zephyr_print(buff, len); diff --git a/zephyr/shim/src/console_buffer.c b/zephyr/shim/src/console_buffer.c index aaeb6dae68..dad0031267 100644 --- a/zephyr/shim/src/console_buffer.c +++ b/zephyr/shim/src/console_buffer.c @@ -1,10 +1,9 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/kernel.h> -#include <zephyr/zephyr.h> #include "common.h" #include "console.h" @@ -24,7 +23,7 @@ static inline uint32_t next_idx(uint32_t cur_idx) K_MUTEX_DEFINE(console_write_lock); -void console_buf_notify_chars(const char *s, size_t len) +size_t console_buf_notify_chars(const char *s, size_t len) { /* * This is just notifying of console characters for debugging @@ -32,12 +31,14 @@ void console_buf_notify_chars(const char *s, size_t len) * then just drop the string. */ if (k_mutex_lock(&console_write_lock, K_NO_WAIT)) - return; + return 0; /* We got the mutex. */ - while (len--) { + for (size_t i = 0; i < len; i++) { /* Don't copy null byte into buffer */ - if (!(*s)) + if (!(*s)) { + s++; continue; + } uint32_t new_tail = next_idx(tail_idx); @@ -47,11 +48,9 @@ void console_buf_notify_chars(const char *s, size_t len) if (new_tail == head_idx) head_idx = next_idx(head_idx); if (new_tail == previous_snapshot_idx) - previous_snapshot_idx = - next_idx(previous_snapshot_idx); + previous_snapshot_idx = next_idx(previous_snapshot_idx); if (new_tail == current_snapshot_idx) - current_snapshot_idx = - next_idx(current_snapshot_idx); + current_snapshot_idx = next_idx(current_snapshot_idx); if (new_tail == read_next_idx) read_next_idx = next_idx(read_next_idx); @@ -59,6 +58,7 @@ void console_buf_notify_chars(const char *s, size_t len) tail_idx = new_tail; } k_mutex_unlock(&console_write_lock); + return len; } enum ec_status uart_console_read_buffer_init(void) @@ -118,6 +118,7 @@ int uart_console_read_buffer(uint8_t type, char *dest, uint16_t dest_size, if (*head == current_snapshot_idx) { /* No new data, return empty response */ k_mutex_unlock(&console_write_lock); + *write_count_out = 0; return EC_RES_SUCCESS; } diff --git a/zephyr/shim/src/crc.c b/zephyr/shim/src/crc.c index 0c5a81a4dd..f8ce335029 100644 --- a/zephyr/shim/src/crc.c +++ b/zephyr/shim/src/crc.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/espi.c b/zephyr/shim/src/espi.c index 74f6b70f42..d6f6bed314 100644 --- a/zephyr/shim/src/espi.c +++ b/zephyr/shim/src/espi.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,10 +10,10 @@ #include <zephyr/logging/log.h> #include <zephyr/kernel.h> #include <stdint.h> -#include <zephyr/zephyr.h> #include <ap_power/ap_power.h> #include <ap_power/ap_power_events.h> +#include <ap_power/ap_power_espi.h> #include "acpi.h" #include "chipset.h" #include "common.h" @@ -28,10 +28,29 @@ #include "timer.h" #include "zephyr_espi_shim.h" -#define VWIRE_PULSE_TRIGGER_TIME CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US +#define VWIRE_PULSE_TRIGGER_TIME \ + CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US LOG_MODULE_REGISTER(espi_shim, CONFIG_ESPI_LOG_LEVEL); +/* + * Some functions are compiled depending on combinations of + * CONFIG_PLATFORM_EC_POWERSEQ, CONFIG_AP_PWRSEQ and + * CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK. + * + * Tests are compiled without CONFIG_PLATFORM_EC_POWERSEQ and + * CONFIG_AP_PWRSEQ defined, but use the lpc functions. + * + * Legacy vwire power signal handling is required + * by CONFIG_PLATFORM_EC_POWERSEQ. + * + * CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK is used to handle + * the PLTRST# vwire signal separate to the legacy power signal handling. + * + * Where !defined(CONFIG_AP_PWRSEQ) is used, the code is required either + * by the tests, or by the legacy power signal handling. + */ + /* host command packet handler structure */ static struct host_packet lpc_packet; /* @@ -95,6 +114,7 @@ static enum espi_vwire_signal signal_to_zephyr_vwire(enum espi_vw_signal signal) } } +#if defined(CONFIG_PLATFORM_EC_POWERSEQ) /* Translate a Zephyr vwire to a platform/ec signal */ static enum espi_vw_signal zephyr_vwire_to_signal(enum espi_vwire_signal vwire) { @@ -105,6 +125,7 @@ static enum espi_vw_signal zephyr_vwire_to_signal(enum espi_vwire_signal vwire) return -1; } } +#endif /* defined(CONFIG_PLATFORM_EC_POWERSEQ) */ /* * Bit field for each signal which can have an interrupt enabled. @@ -126,22 +147,12 @@ static uint32_t signal_to_interrupt_bit(enum espi_vw_signal signal) } } -/* Callback for vwire received */ -static void espi_vwire_handler(const struct device *dev, - struct espi_callback *cb, - struct espi_event event) -{ - int ec_signal = zephyr_vwire_to_signal(event.evt_details); - - if (IS_ENABLED(CONFIG_PLATFORM_EC_POWERSEQ) && - (signal_interrupt_enabled & signal_to_interrupt_bit(ec_signal))) { - power_signal_interrupt(ec_signal); - } -} - #endif /* !defined(CONFIG_AP_PWRSEQ) */ #ifdef CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK +/* + * Deferred handler for PLTRST processing. + */ static void espi_chipset_reset(void) { if (IS_ENABLED(CONFIG_AP_PWRSEQ)) { @@ -151,16 +162,35 @@ static void espi_chipset_reset(void) } } DECLARE_DEFERRED(espi_chipset_reset); +#endif /* CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK */ -/* Callback for reset */ -static void espi_reset_handler(const struct device *dev, +/* + * Callback for vwire received. + * PLTRST (platform reset) is handled specially by + * invoking HOOK_CHIPSET_RESET. + */ +#if defined(CONFIG_PLATFORM_EC_POWERSEQ) || \ + defined(CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK) +static void espi_vwire_handler(const struct device *dev, struct espi_callback *cb, struct espi_event event) { - hook_call_deferred(&espi_chipset_reset_data, MSEC); +#if defined(CONFIG_PLATFORM_EC_POWERSEQ) + int ec_signal = zephyr_vwire_to_signal(event.evt_details); + if (signal_interrupt_enabled & signal_to_interrupt_bit(ec_signal)) { + power_signal_interrupt(ec_signal); + } +#endif +#if defined(CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK) + /* If PLTRST# asserted (low) then send reset hook */ + if (event.evt_details == ESPI_VWIRE_SIGNAL_PLTRST && + event.evt_data == 0) { + hook_call_deferred(&espi_chipset_reset_data, MSEC); + } +#endif } -#endif /* CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK */ +#endif #define espi_dev DEVICE_DT_GET(DT_CHOSEN(cros_ec_espi)) @@ -289,46 +319,76 @@ void lpc_update_host_event_status(void) uint32_t status; int need_sci = 0; int need_smi = 0; + int rv; if (!init_done) return; /* Disable PMC1 interrupt while updating status register */ enable = 0; - espi_write_lpc_request(espi_dev, ECUSTOM_HOST_SUBS_INTERRUPT_EN, - &enable); - - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - if (lpc_get_host_events_by_type(LPC_HOST_EVENT_SMI)) { - /* Only generate SMI for first event */ - if (!(status & EC_LPC_STATUS_SMI_PENDING)) - need_smi = 1; + rv = espi_write_lpc_request(espi_dev, ECUSTOM_HOST_SUBS_INTERRUPT_EN, + &enable); + if (rv) { + LOG_ERR("ESPI write failed: " + "ECUSTOM_HOST_SUBS_INTERRUPT_EN = %d", + rv); + return; + } - status |= EC_LPC_STATUS_SMI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + rv = espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + if (rv) { + LOG_ERR("ESPI read failed: EACPI_READ_STS = %d", rv); } else { - status &= ~EC_LPC_STATUS_SMI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + if (lpc_get_host_events_by_type(LPC_HOST_EVENT_SMI)) { + /* Only generate SMI for first event */ + if (!(status & EC_LPC_STATUS_SMI_PENDING)) + need_smi = 1; + + status |= EC_LPC_STATUS_SMI_PENDING; + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, + &status); + } else { + status &= ~EC_LPC_STATUS_SMI_PENDING; + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, + &status); + } + if (rv) { + LOG_ERR("ESPI write failed: EACPI_WRITE_STS = %d", rv); + } } - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - if (lpc_get_host_events_by_type(LPC_HOST_EVENT_SCI)) { - /* Generate SCI for every event */ - need_sci = 1; - - status |= EC_LPC_STATUS_SCI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + rv = espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + if (rv) { + LOG_ERR("ESPI read failed: EACPI_READ_STS = %d", rv); } else { - status &= ~EC_LPC_STATUS_SCI_PENDING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + if (lpc_get_host_events_by_type(LPC_HOST_EVENT_SCI)) { + /* Generate SCI for every event */ + need_sci = 1; + + status |= EC_LPC_STATUS_SCI_PENDING; + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, + &status); + } else { + status &= ~EC_LPC_STATUS_SCI_PENDING; + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, + &status); + } + if (rv) { + LOG_ERR("ESPI write failed: EACPI_WRITE_STS = %d", rv); + } } *(host_event_t *)host_get_memmap(EC_MEMMAP_HOST_EVENTS) = lpc_get_host_events(); enable = 1; - espi_write_lpc_request(espi_dev, ECUSTOM_HOST_SUBS_INTERRUPT_EN, - &enable); + rv = espi_write_lpc_request(espi_dev, ECUSTOM_HOST_SUBS_INTERRUPT_EN, + &enable); + if (rv) { + LOG_ERR("ESPI write failed: " + "ECUSTOM_HOST_SUBS_INTERRUPT_EN = %d", + rv); + } /* Process the wake events. */ lpc_update_wake(lpc_get_host_events_by_type(LPC_HOST_EVENT_WAKE)); @@ -362,19 +422,30 @@ static void handle_acpi_write(uint32_t data) uint8_t value, result; uint8_t is_cmd = is_acpi_command(data); uint32_t status; + int rv; value = get_acpi_value(data); /* Handle whatever this was. */ if (acpi_ap_to_ec(is_cmd, value, &result)) { data = result; - espi_write_lpc_request(espi_dev, EACPI_WRITE_CHAR, &data); + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_CHAR, &data); + if (rv) { + LOG_ERR("ESPI write failed: EACPI_WRITE_CHAR = %d", rv); + } } /* Clear processing flag */ - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); - status &= ~EC_LPC_STATUS_PROCESSING; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + rv = espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + if (rv) { + LOG_ERR("ESPI read failed: EACPI_READ_STS = %d", rv); + } else { + status &= ~EC_LPC_STATUS_PROCESSING; + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + if (rv) { + LOG_ERR("ESPI write failed: EACPI_WRITE_STS = %d", rv); + } + } /* * ACPI 5.0-12.6.1: Generate SCI for Input Buffer Empty / Output Buffer @@ -386,17 +457,24 @@ static void handle_acpi_write(uint32_t data) static void lpc_send_response_packet(struct host_packet *pkt) { uint32_t data; + int rv; /* TODO(b/176523211): check whether add EC_RES_IN_PROGRESS handle */ /* Write result to the data byte. This sets the TOH status bit. */ data = pkt->driver_result; - espi_write_lpc_request(espi_dev, ECUSTOM_HOST_CMD_SEND_RESULT, &data); + rv = espi_write_lpc_request(espi_dev, ECUSTOM_HOST_CMD_SEND_RESULT, + &data); + if (rv) { + LOG_ERR("ESPI write failed: ECUSTOM_HOST_CMD_SEND_RESULT = %d", + rv); + } } static void handle_host_write(uint32_t data) { uint32_t shm_mem_host_cmd; + int rv; if (EC_COMMAND_PROTOCOL_3 != (data & 0xff)) { LOG_ERR("Don't support this version of the host command"); @@ -404,9 +482,12 @@ static void handle_host_write(uint32_t data) return; } - espi_read_lpc_request(espi_dev, ECUSTOM_HOST_CMD_GET_PARAM_MEMORY, - &shm_mem_host_cmd); - + rv = espi_read_lpc_request(espi_dev, ECUSTOM_HOST_CMD_GET_PARAM_MEMORY, + &shm_mem_host_cmd); + if (rv) { + LOG_ERR("ESPI read failed: EACPI_READ_STS = %d", rv); + return; + } lpc_packet.send_response = lpc_send_response_packet; lpc_packet.request = (const void *)shm_mem_host_cmd; @@ -428,17 +509,35 @@ static void handle_host_write(uint32_t data) void lpc_set_acpi_status_mask(uint8_t mask) { uint32_t status; - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + int rv; + + rv = espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + if (rv) { + LOG_ERR("ESPI read failed: EACPI_READ_STS = %d", rv); + return; + } status |= mask; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + if (rv) { + LOG_ERR("ESPI write failed: EACPI_WRITE_STS = %d", rv); + } } void lpc_clear_acpi_status_mask(uint8_t mask) { uint32_t status; - espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + int rv; + + rv = espi_read_lpc_request(espi_dev, EACPI_READ_STS, &status); + if (rv) { + LOG_ERR("ESPI read failed: EACPI_READ_STS = %d", rv); + return; + } status &= ~mask; - espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + rv = espi_write_lpc_request(espi_dev, EACPI_WRITE_STS, &status); + if (rv) { + LOG_ERR("ESPI write failed: EACPI_WRITE_STS = %d", rv); + } } /* Get protocol information */ @@ -463,27 +562,44 @@ DECLARE_HOST_COMMAND(EC_CMD_GET_PROTOCOL_INFO, lpc_get_protocol_info, * This function is needed only for the obsolete platform which uses the GPIO * for KBC's IRQ. */ -void lpc_keyboard_resume_irq(void) {} +void lpc_keyboard_resume_irq(void) +{ +} void lpc_keyboard_clear_buffer(void) { + int rv; /* Clear OBF flag in host STATUS and HIKMST regs */ - espi_write_lpc_request(espi_dev, E8042_CLEAR_OBF, 0); + rv = espi_write_lpc_request(espi_dev, E8042_CLEAR_OBF, 0); + if (rv) { + LOG_ERR("ESPI write failed: E8042_CLEAR_OBF = %d", rv); + } } + int lpc_keyboard_has_char(void) { uint32_t status; + int rv; /* if OBF bit is '1', that mean still have a data in DBBOUT */ - espi_read_lpc_request(espi_dev, E8042_OBF_HAS_CHAR, &status); + rv = espi_read_lpc_request(espi_dev, E8042_OBF_HAS_CHAR, &status); + if (rv) { + LOG_ERR("ESPI read failed: E8042_OBF_HAS_CHAR = %d", rv); + return 0; + } return status; } void lpc_keyboard_put_char(uint8_t chr, int send_irq) { uint32_t kb_char = chr; + int rv; - espi_write_lpc_request(espi_dev, E8042_WRITE_KB_CHAR, &kb_char); + rv = espi_write_lpc_request(espi_dev, E8042_WRITE_KB_CHAR, &kb_char); + if (rv) { + LOG_ERR("ESPI write failed: E8042_WRITE_KB_CHAR = %d", rv); + return; + } LOG_INF("KB put %02x", kb_char); } @@ -492,9 +608,16 @@ void lpc_aux_put_char(uint8_t chr, int send_irq) { uint32_t kb_char = chr; uint32_t status = I8042_AUX_DATA; + int rv; - espi_write_lpc_request(espi_dev, E8042_SET_FLAG, &status); - espi_write_lpc_request(espi_dev, E8042_WRITE_KB_CHAR, &kb_char); + rv = espi_write_lpc_request(espi_dev, E8042_SET_FLAG, &status); + if (rv) { + LOG_ERR("ESPI write failed: E8042_SET_FLAG = %d", rv); + } + rv = espi_write_lpc_request(espi_dev, E8042_WRITE_KB_CHAR, &kb_char); + if (rv) { + LOG_ERR("ESPI write failed: E8042_WRITE_KB_CHAR = %d", rv); + } LOG_INF("AUX put %02x", kb_char); } @@ -503,12 +626,16 @@ static void kbc_ibf_obe_handler(uint32_t data) #ifdef HAS_TASK_KEYPROTO uint8_t is_ibf = is_8042_ibf(data); uint32_t status = I8042_AUX_DATA; + int rv; if (is_ibf) { - keyboard_host_write(get_8042_data(data), - get_8042_type(data)); + keyboard_host_write(get_8042_data(data), get_8042_type(data)); } else if (IS_ENABLED(CONFIG_8042_AUX)) { - espi_write_lpc_request(espi_dev, E8042_CLEAR_FLAG, &status); + rv = espi_write_lpc_request(espi_dev, E8042_CLEAR_FLAG, + &status); + if (rv) { + LOG_ERR("ESPI write failed: E8042_CLEAR_FLAG = %d", rv); + } } task_wake(TASK_ID_KEYPROTO); #endif @@ -517,9 +644,14 @@ static void kbc_ibf_obe_handler(uint32_t data) int lpc_keyboard_input_pending(void) { uint32_t status; + int rv; /* if IBF bit is '1', that mean still have a data in DBBIN */ - espi_read_lpc_request(espi_dev, E8042_IBF_HAS_CHAR, &status); + rv = espi_read_lpc_request(espi_dev, E8042_IBF_HAS_CHAR, &status); + if (rv) { + LOG_ERR("ESPI read failed: E8042_IBF_HAS_CHAR = %d", rv); + return 0; + } return status; } @@ -553,12 +685,12 @@ static void espi_peripheral_handler(const struct device *dev, static int zephyr_shim_setup_espi(const struct device *unused) { - static struct { - struct espi_callback cb; + static const struct { espi_callback_handler_t handler; enum espi_bus_event event_type; } callbacks[] = { -#if !defined(CONFIG_AP_PWRSEQ) +#if defined(CONFIG_PLATFORM_EC_POWERSEQ) || \ + defined(CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK) { .handler = espi_vwire_handler, .event_type = ESPI_BUS_EVENT_VWIRE_RECEIVED, @@ -568,13 +700,14 @@ static int zephyr_shim_setup_espi(const struct device *unused) .handler = espi_peripheral_handler, .event_type = ESPI_BUS_PERIPHERAL_NOTIFICATION, }, -#ifdef CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK +#if defined(CONFIG_AP_PWRSEQ) && DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_vw) { - .handler = espi_reset_handler, - .event_type = ESPI_BUS_RESET, + .handler = power_signal_espi_cb, + .event_type = POWER_SIGNAL_ESPI_BUS_EVENTS, }, #endif }; + static struct espi_callback cb[ARRAY_SIZE(callbacks)]; struct espi_cfg cfg = { .io_caps = ESPI_IO_MODE_QUAD_LINES, @@ -586,17 +719,17 @@ static int zephyr_shim_setup_espi(const struct device *unused) if (!device_is_ready(espi_dev)) k_oops(); - /* Configure eSPI */ - if (espi_config(espi_dev, &cfg)) { - LOG_ERR("Failed to configure eSPI device"); - return -1; - } - /* Setup callbacks */ for (size_t i = 0; i < ARRAY_SIZE(callbacks); i++) { - espi_init_callback(&callbacks[i].cb, callbacks[i].handler, + espi_init_callback(&cb[i], callbacks[i].handler, callbacks[i].event_type); - espi_add_callback(espi_dev, &callbacks[i].cb); + espi_add_callback(espi_dev, &cb[i]); + } + + /* Configure eSPI after callbacks are registered */ + if (espi_config(espi_dev, &cfg)) { + LOG_ERR("Failed to configure eSPI device"); + return -1; } return 0; diff --git a/zephyr/shim/src/fan.c b/zephyr/shim/src/fan.c index 3531941a08..c7074b0c4d 100644 --- a/zephyr/shim/src/fan.c +++ b/zephyr/shim/src/fan.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -25,8 +25,8 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, #define FAN_CONFIGS(node_id) \ const struct fan_conf node_id##_conf = { \ - .flags = (COND_CODE_1(DT_PROP(node_id, not_use_rpm_mode), \ - (0), (FAN_USE_RPM_MODE))) | \ + .flags = (COND_CODE_1(DT_PROP(node_id, not_use_rpm_mode), (0), \ + (FAN_USE_RPM_MODE))) | \ (COND_CODE_1(DT_PROP(node_id, use_fast_start), \ (FAN_USE_FAST_START), (0))), \ .ch = node_id, \ @@ -45,26 +45,21 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, .rpm_max = DT_PROP(node_id, rpm_max), \ }; -#define FAN_INST(node_id) \ - [node_id] = { \ +#define FAN_INST(node_id) \ + [node_id] = { \ .conf = &node_id##_conf, \ .rpm = &node_id##_rpm, \ }, -#define FAN_CONTROL_INST(node_id) \ - [node_id] = { \ - .pwm = DEVICE_DT_GET(DT_PWMS_CTLR(node_id)), \ - .channel = DT_PWMS_CHANNEL(node_id), \ - .flags = DT_PWMS_FLAGS(node_id), \ - .period_ns = (NSEC_PER_SEC/DT_PROP(node_id, pwm_frequency)), \ - .tach = DEVICE_DT_GET(DT_PHANDLE(node_id, tach)), \ +#define FAN_CONTROL_INST(node_id) \ + [node_id] = { \ + .pwm = PWM_DT_SPEC_GET(node_id), \ + .tach = DEVICE_DT_GET(DT_PHANDLE(node_id, tach)), \ }, DT_INST_FOREACH_CHILD(0, FAN_CONFIGS) -const struct fan_t fans[FAN_CH_COUNT] = { - DT_INST_FOREACH_CHILD(0, FAN_INST) -}; +const struct fan_t fans[FAN_CH_COUNT] = { DT_INST_FOREACH_CHILD(0, FAN_INST) }; /* Rpm deviation (Unit:percent) */ #ifndef RPM_DEVIATION @@ -104,10 +99,7 @@ struct fan_data { /* Data structure to define PWM and tachometer. */ struct fan_config { - const struct device *pwm; - uint32_t channel; - pwm_flags_t flags; - uint32_t period_ns; + struct pwm_dt_spec pwm; const struct device *tach; }; @@ -121,28 +113,28 @@ static void fan_pwm_update(int ch) { const struct fan_config *cfg = &fan_config[ch]; struct fan_data *data = &fan_data[ch]; + const struct device *pwm_dev = cfg->pwm.dev; uint32_t pulse_ns; int ret; - if (!device_is_ready(cfg->pwm)) { - LOG_ERR("PWM device %s not ready", cfg->pwm->name); + if (!device_is_ready(pwm_dev)) { + LOG_ERR("PWM device %s not ready", pwm_dev->name); return; } if (data->pwm_enabled) { pulse_ns = DIV_ROUND_NEAREST( - cfg->period_ns * data->pwm_percent, 100); + cfg->pwm.period * data->pwm_percent, 100); } else { pulse_ns = 0; } - LOG_DBG("FAN PWM %s set percent (%d), pulse %d", cfg->pwm->name, + LOG_DBG("FAN PWM %s set percent (%d), pulse %d", pwm_dev->name, data->pwm_percent, pulse_ns); - ret = pwm_set(cfg->pwm, cfg->channel, cfg->period_ns, pulse_ns, - cfg->flags); + ret = pwm_set_dt(&cfg->pwm, cfg->pwm.period, pulse_ns); if (ret) { - LOG_ERR("pwm_set() failed %s (%d)", cfg->pwm->name, ret); + LOG_ERR("pwm_set() failed %s (%d)", pwm_dev->name, ret); } } @@ -320,8 +312,8 @@ void fan_tick_func(void) fan_tick_func_duty(ch); break; default: - LOG_ERR("Invalid fan %d mode: %d", - ch, fan_data[ch].current_fan_mode); + LOG_ERR("Invalid fan %d mode: %d", ch, + fan_data[ch].current_fan_mode); } } } diff --git a/zephyr/shim/src/flash.c b/zephyr/shim/src/flash.c index 9802b39c3a..8aa7deecf5 100644 --- a/zephyr/shim/src/flash.c +++ b/zephyr/shim/src/flash.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -167,8 +167,7 @@ uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags) } #if IS_ENABLED(CONFIG_SHELL) -static int command_flashchip(const struct shell *shell, - size_t argc, +static int command_flashchip(const struct shell *shell, size_t argc, char **argv) { uint8_t manufacturer; @@ -177,23 +176,19 @@ static int command_flashchip(const struct shell *shell, uint8_t status2; int res; - res = cros_flash_physical_get_status(cros_flash_dev, - &status1, + res = cros_flash_physical_get_status(cros_flash_dev, &status1, &status2); if (!res) - shell_fprintf(shell, - SHELL_NORMAL, - "Status 1: 0x%02x, Status 2: 0x%02x\n", - status1, status2); + shell_fprintf(shell, SHELL_NORMAL, + "Status 1: 0x%02x, Status 2: 0x%02x\n", status1, + status2); - res = cros_flash_physical_get_jedec_id(cros_flash_dev, - &manufacturer, + res = cros_flash_physical_get_jedec_id(cros_flash_dev, &manufacturer, &device); if (!res) - shell_fprintf(shell, - SHELL_NORMAL, + shell_fprintf(shell, SHELL_NORMAL, "Manufacturer: 0x%02x, DID: 0x%04x\n", manufacturer, device); diff --git a/zephyr/shim/src/gpio.c b/zephyr/shim/src/gpio.c index eb395813c8..9738bf3de2 100644 --- a/zephyr/shim/src/gpio.c +++ b/zephyr/shim/src/gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -41,26 +41,30 @@ struct gpio_config { * whereas the standard macros assume that only 8 bits of initial flags * will be needed. */ -#define OUR_DT_SPEC(id) \ - { \ - .port = DEVICE_DT_GET(DT_GPIO_CTLR(id, gpios)), \ - .pin = DT_GPIO_PIN(id, gpios), \ - .dt_flags = 0xFF & (DT_GPIO_FLAGS(id, gpios)), \ +#define OUR_DT_SPEC(id) \ + { \ + .port = DEVICE_DT_GET(DT_GPIO_CTLR(id, gpios)), \ + .pin = DT_GPIO_PIN(id, gpios), \ + .dt_flags = 0xFF & (DT_GPIO_FLAGS(id, gpios)), \ } -#define GPIO_CONFIG(id) \ - { \ - .spec = OUR_DT_SPEC(id), \ - .name = DT_NODE_FULL_NAME(id), \ - .init_flags = DT_GPIO_FLAGS(id, gpios), \ - .no_auto_init = DT_PROP(id, no_auto_init), \ +#define GPIO_CONFIG(id) \ + { \ + .spec = OUR_DT_SPEC(id), \ + .name = DT_NODE_FULL_NAME(id), \ + .init_flags = DT_GPIO_FLAGS(id, gpios), \ + .no_auto_init = DT_PROP(id, no_auto_init), \ }, +#define GPIO_IMPL_CONFIG(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, gpios), (GPIO_CONFIG(id)), ()) + static const struct gpio_config configs[] = { #if DT_NODE_EXISTS(DT_PATH(named_gpios)) - DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_CONFIG) + DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_IMPL_CONFIG) #endif }; +#undef GPIO_IMPL_CONFIG #undef GPIO_CONFIG #undef OUR_DT_SPEC @@ -73,9 +77,9 @@ static const struct gpio_config configs[] = { * point directly into the table by exposing the gpio_config struct. */ -#define GPIO_PTRS(id) const struct gpio_dt_spec * const \ - GPIO_DT_NAME(GPIO_SIGNAL(id)) = \ - &configs[GPIO_SIGNAL(id)].spec; +#define GPIO_PTRS(id) \ + const struct gpio_dt_spec *const GPIO_DT_NAME(GPIO_SIGNAL(id)) = \ + &configs[GPIO_SIGNAL(id)].spec; #if DT_NODE_EXISTS(DT_PATH(named_gpios)) DT_FOREACH_CHILD(DT_PATH(named_gpios), GPIO_PTRS) @@ -91,6 +95,30 @@ int gpio_get_level(enum gpio_signal signal) if (!gpio_is_implemented(signal)) return 0; + /* + * If an output GPIO, get the configured value of the output + * rather than the raw value of the pin. + */ + if (IS_ENABLED(CONFIG_GPIO_GET_CONFIG) && + configs[signal].init_flags & GPIO_OUTPUT) { + int rv; + gpio_flags_t flags; + + rv = gpio_pin_get_config_dt(&configs[signal].spec, &flags); + if (rv == 0) { + return (flags & GPIO_OUTPUT_INIT_HIGH) ? 1 : 0; + } + /* + * -ENOSYS is returned when this API call is not supported, + * so drop into the default method of returning the pin value. + */ + if (rv != -ENOSYS) { + LOG_ERR("Cannot get config for %s (%d)", + configs[signal].name, rv); + return 0; + } + } + const int l = gpio_pin_get_raw(configs[signal].spec.port, configs[signal].spec.pin); @@ -137,8 +165,7 @@ void gpio_set_level(enum gpio_signal signal, int value) return; int rv = gpio_pin_set_raw(configs[signal].spec.port, - configs[signal].spec.pin, - value); + configs[signal].spec.pin, value); if (rv < 0) { LOG_ERR("Cannot write %s (%d)", configs[signal].name, rv); @@ -167,15 +194,15 @@ int gpio_or_ioex_get_level(int signal, int *value) #define GPIO_CONVERSION_SAME_BITS \ (GPIO_OPEN_DRAIN | GPIO_PULL_UP | GPIO_PULL_DOWN | GPIO_VOLTAGE_1P8 | \ GPIO_INPUT | GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW | \ - GPIO_OUTPUT_INIT_HIGH) + GPIO_OUTPUT_INIT_HIGH) #define FLAGS_HANDLED_FROM_ZEPHYR \ (GPIO_CONVERSION_SAME_BITS | GPIO_INT_ENABLE | GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1 | GPIO_INT_LOW_0) + GPIO_INT_HIGH_1 | GPIO_INT_LOW_0) #define FLAGS_HANDLED_TO_ZEPHYR \ (GPIO_CONVERSION_SAME_BITS | GPIO_INT_F_RISING | GPIO_INT_F_FALLING | \ - GPIO_INT_F_LOW | GPIO_INT_F_HIGH) + GPIO_INT_F_LOW | GPIO_INT_F_HIGH) int convert_from_zephyr_flags(const gpio_flags_t zephyr) { @@ -219,11 +246,11 @@ gpio_flags_t convert_to_zephyr_flags(int ec_flags) } if (ec_flags & GPIO_INT_F_RISING) - zephyr_flags |= GPIO_INT_ENABLE - | GPIO_INT_EDGE | GPIO_INT_HIGH_1; + zephyr_flags |= GPIO_INT_ENABLE | GPIO_INT_EDGE | + GPIO_INT_HIGH_1; if (ec_flags & GPIO_INT_F_FALLING) - zephyr_flags |= GPIO_INT_ENABLE - | GPIO_INT_EDGE | GPIO_INT_LOW_0; + zephyr_flags |= GPIO_INT_ENABLE | GPIO_INT_EDGE | + GPIO_INT_LOW_0; if (ec_flags & GPIO_INT_F_LOW) zephyr_flags |= GPIO_INT_ENABLE | GPIO_INT_LOW_0; if (ec_flags & GPIO_INT_F_HIGH) @@ -276,7 +303,7 @@ static int init_gpios(const struct device *unused) */ if (is_sys_jumped && (flags & GPIO_OUTPUT)) { flags &= - ~(GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH); + ~(GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH); } rv = gpio_pin_configure_dt(&configs[i].spec, flags); diff --git a/zephyr/shim/src/gpio_id.c b/zephyr/shim/src/gpio_id.c index b562f405bc..b994154cd1 100644 --- a/zephyr/shim/src/gpio_id.c +++ b/zephyr/shim/src/gpio_id.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,10 +11,8 @@ #include "gpio.h" #include "util.h" -#define IS_BOARD_COMPATIBLE \ - DT_NODE_HAS_COMPAT(DT_PATH(board), cros_ec_gpio_id) -#define IS_SKU_COMPATIBLE \ - DT_NODE_HAS_COMPAT(DT_PATH(sku), cros_ec_gpio_id) +#define IS_BOARD_COMPATIBLE DT_NODE_HAS_COMPAT(DT_PATH(board), cros_ec_gpio_id) +#define IS_SKU_COMPATIBLE DT_NODE_HAS_COMPAT(DT_PATH(sku), cros_ec_gpio_id) #define CONVERT_NUMERAL_SYSTEM_EVAL(system, bits, nbits) \ system##_from_bits(bits, nbits) @@ -32,11 +30,8 @@ __override uint32_t board_get_sku_id(void) static uint32_t sku_id = (uint32_t)-1; if (sku_id == (uint32_t)-1) { - int bits[] = { - DT_FOREACH_PROP_ELEM(DT_PATH(sku), - bits, - READ_PIN_FROM_PHANDLE) - }; + int bits[] = { DT_FOREACH_PROP_ELEM(DT_PATH(sku), bits, + READ_PIN_FROM_PHANDLE) }; if (sizeof(bits) == 0) return (uint32_t)-1; @@ -58,11 +53,8 @@ __override int board_get_version(void) static int board_version = -1; if (board_version == -1) { - int bits[] = { - DT_FOREACH_PROP_ELEM(DT_PATH(board), - bits, - READ_PIN_FROM_PHANDLE) - }; + int bits[] = { DT_FOREACH_PROP_ELEM(DT_PATH(board), bits, + READ_PIN_FROM_PHANDLE) }; if (sizeof(bits) == 0) return -1; diff --git a/zephyr/shim/src/gpio_int.c b/zephyr/shim/src/gpio_int.c index 6f13976acc..8406f3abe8 100644 --- a/zephyr/shim/src/gpio_int.c +++ b/zephyr/shim/src/gpio_int.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -174,7 +174,7 @@ int gpio_enable_dt_interrupt(const struct gpio_int_config *conf) } const struct gpio_int_config * - gpio_interrupt_get_config(enum gpio_interrupts intr) +gpio_interrupt_get_config(enum gpio_interrupts intr) { return &gpio_int_data[intr]; } diff --git a/zephyr/shim/src/hooks.c b/zephyr/shim/src/hooks.c index 07bf27f3b0..da981dea6b 100644 --- a/zephyr/shim/src/hooks.c +++ b/zephyr/shim/src/hooks.c @@ -1,10 +1,9 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/kernel.h> -#include <zephyr/zephyr.h> #include <ap_power/ap_power.h> #include <ap_power/ap_power_events.h> @@ -23,21 +22,20 @@ * this code must manually generate references to the symbols generated by * STRUCT_SECTION_ITERABLE_ALTERNATE in zephyr_hooks_shim.h. */ -#define HOOK_LIST_EXTERNS(type) \ - extern const struct zephyr_shim_hook_info \ +#define HOOK_LIST_EXTERNS(type) \ + extern const struct zephyr_shim_hook_info \ _zephyr_shim_hook_##type##_list_start[]; \ - extern const struct zephyr_shim_hook_info \ + extern const struct zephyr_shim_hook_info \ _zephyr_shim_hook_##type##_list_end[]; FOR_EACH(HOOK_LIST_EXTERNS, (), HOOK_TYPES_LIST) -#define HOOK_LIST_ENTRY(type) \ - [type] = { \ +#define HOOK_LIST_ENTRY(type) \ + [type] = { \ .start = _zephyr_shim_hook_##type##_list_start, \ .end = _zephyr_shim_hook_##type##_list_end, \ } -static const struct zephyr_shim_hook_list hook_registry[] = { - FOR_EACH(HOOK_LIST_ENTRY, (,), HOOK_TYPES_LIST) -}; +static const struct zephyr_shim_hook_list hook_registry[] = { FOR_EACH( + HOOK_LIST_ENTRY, (, ), HOOK_TYPES_LIST) }; BUILD_ASSERT(ARRAY_SIZE(hook_registry) == HOOK_TYPE_COUNT, "All defined hook types must be represented in hook_registry"); BUILD_ASSERT(NUM_VA_ARGS_LESS_1(HOOK_TYPES_LIST) + 1 == HOOK_TYPE_COUNT, @@ -53,7 +51,7 @@ static void work_queue_error(const void *data, int rv) { cprints(CC_HOOK, "Warning: deferred call not submitted, " - "deferred_data=0x%pP, err=%d", + "deferred_data=0x%p, err=%d", data, rv); } diff --git a/zephyr/shim/src/host_command.c b/zephyr/shim/src/host_command.c index 7bf61ee551..c5a51332a1 100644 --- a/zephyr/shim/src/host_command.c +++ b/zephyr/shim/src/host_command.c @@ -1,16 +1,17 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "host_command.h" #include "task.h" struct host_command *zephyr_find_host_command(int command) { - STRUCT_SECTION_FOREACH(host_command, cmd) { + STRUCT_SECTION_FOREACH(host_command, cmd) + { if (cmd->command == command) return cmd; } diff --git a/zephyr/shim/src/hwtimer.c b/zephyr/shim/src/hwtimer.c index aaaf051d80..d99f7a826b 100644 --- a/zephyr/shim/src/hwtimer.c +++ b/zephyr/shim/src/hwtimer.c @@ -1,11 +1,10 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/kernel.h> #include <stdint.h> -#include <zephyr/zephyr.h> #include "hwtimer.h" diff --git a/zephyr/shim/src/i2c.c b/zephyr/shim/src/i2c.c index 8d55876629..0074327826 100644 --- a/zephyr/shim/src/i2c.c +++ b/zephyr/shim/src/i2c.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,11 +21,10 @@ * Initialize device bindings in i2c_devices. * This macro should be called from within DT_FOREACH_CHILD. */ -#define INIT_DEV_BINDING(id) \ - [I2C_PORT(id)] = DEVICE_DT_GET(DT_PHANDLE(id, i2c_port)), +#define INIT_DEV_BINDING(i2c_port_id) \ + [I2C_PORT_BUS(i2c_port_id)] = DEVICE_DT_GET(i2c_port_id), -#define INIT_REMOTE_PORTS(id) \ - [I2C_PORT(id)] = DT_PROP_OR(id, remote_port, -1), +#define INIT_REMOTE_PORTS(id) [I2C_PORT(id)] = DT_PROP_OR(id, remote_port, -1), #define I2C_PORT_FLAGS(id) \ COND_CODE_1(DT_PROP(id, dynamic_speed), (I2C_PORT_FLAG_DYNAMIC_SPEED), \ @@ -44,49 +43,14 @@ * Since all the ports will eventually be handled by device tree. This will * be removed at that point. */ -const struct i2c_port_t i2c_ports[] = { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), I2C_PORT_INIT) -}; +const struct i2c_port_t i2c_ports[] = { DT_FOREACH_CHILD( + DT_PATH(named_i2c_ports), I2C_PORT_INIT) }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); -static const int i2c_remote_ports[I2C_PORT_COUNT] = { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), INIT_REMOTE_PORTS) -}; -static int i2c_physical_ports[I2C_PORT_COUNT]; +static const int i2c_remote_ports[I2C_PORT_COUNT] = { DT_FOREACH_CHILD( + DT_PATH(named_i2c_ports), INIT_REMOTE_PORTS) }; -static const struct device *i2c_devices[I2C_PORT_COUNT] = { - DT_FOREACH_CHILD(DT_PATH(named_i2c_ports), INIT_DEV_BINDING) -}; - -static int init_device_bindings(const struct device *device) -{ - ARG_UNUSED(device); - - /* - * The EC application may lock the I2C bus for more than a single - * I2C transaction. Initialize the i2c_physical_ports[] array to map - * each named-i2c-ports child to the physical bus assignment. - */ - int i; - int physical_port = 0; - - i2c_physical_ports[0] = physical_port; - for (int child = 1; child < I2C_PORT_COUNT; child++) { - for (i = 0; i < child; i++) { - if (i2c_devices[child] == i2c_devices[i]) { - i2c_physical_ports[child] = - i2c_physical_ports[i]; - break; - } - } - if (i == child) - i2c_physical_ports[child] = ++physical_port; - } - __ASSERT(I2C_DEVICE_COUNT == 0 || - physical_port == (I2C_DEVICE_COUNT - 1), - "I2C_DEVICE_COUNT is invalid"); - return 0; -} -SYS_INIT(init_device_bindings, POST_KERNEL, 51); +static const struct device *i2c_devices[I2C_PORT_COUNT] = { I2C_FOREACH_PORT( + INIT_DEV_BINDING) }; const struct device *i2c_get_device_for_port(const int port) { @@ -110,31 +74,15 @@ int i2c_get_port_from_remote_port(int remote_port) return remote_port; } -int i2c_get_physical_port(int enum_port) -{ - int i2c_port; - - if (enum_port < 0 || enum_port >= I2C_PORT_COUNT) - return -1; - - i2c_port = i2c_physical_ports[enum_port]; - /* - * Return -1 for caller if physical port is not defined or the - * port number is out of port_mutex space. - * Please ensure the caller won't change anything if -1 received. - */ - return (i2c_port < I2C_DEVICE_COUNT) ? i2c_port : -1; -} - #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_I2C_PORTMAP -static int command_i2c_portmap(int argc, char **argv) +static int command_i2c_portmap(int argc, const char **argv) { int i; - ccprintf("Zephyr physical I2C ports (%d):\n", I2C_PORT_COUNT); - for (i = 0; i < I2C_PORT_COUNT; i++) { - ccprintf(" %d : %d\n", i, i2c_physical_ports[i]); + if (argc > 1) { + return EC_ERROR_PARAM_COUNT; } + ccprintf("Zephyr remote I2C ports (%d):\n", I2C_PORT_COUNT); for (i = 0; i < I2C_PORT_COUNT; i++) { ccprintf(" %d : %d\n", i, i2c_remote_ports[i]); diff --git a/zephyr/shim/src/ioex.c b/zephyr/shim/src/ioex.c index 56b10d1f48..a5d685bc48 100644 --- a/zephyr/shim/src/ioex.c +++ b/zephyr/shim/src/ioex.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -42,8 +42,8 @@ static int ioex_init_default(const struct device *unused) for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; i++) { /* IO Expander has been initialized, skip re-initializing */ - if (ioex_config[i].flags & (IOEX_FLAGS_INITIALIZED | - IOEX_FLAGS_DEFAULT_INIT_DISABLED)) + if (ioex_config[i].flags & + (IOEX_FLAGS_INITIALIZED | IOEX_FLAGS_DEFAULT_INIT_DISABLED)) continue; ret = ioex_init(i); diff --git a/zephyr/shim/src/ioex_drv.c b/zephyr/shim/src/ioex_drv.c index ccf142576d..96a0dd3a8e 100644 --- a/zephyr/shim/src/ioex_drv.c +++ b/zephyr/shim/src/ioex_drv.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/keyboard_raw.c b/zephyr/shim/src/keyboard_raw.c index ef2dadb29c..c9f465d06d 100644 --- a/zephyr/shim/src/keyboard_raw.c +++ b/zephyr/shim/src/keyboard_raw.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,7 +8,7 @@ #include <zephyr/device.h> #include <zephyr/logging/log.h> #include <soc.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "drivers/cros_kb_raw.h" #include "keyboard_raw.h" diff --git a/zephyr/shim/src/keyscan.c b/zephyr/shim/src/keyscan.c index a5503ecb48..514885379b 100644 --- a/zephyr/shim/src/keyscan.c +++ b/zephyr/shim/src/keyscan.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/led_driver/CMakeLists.txt b/zephyr/shim/src/led_driver/CMakeLists.txt index 7c21d6827e..179f540fe1 100644 --- a/zephyr/shim/src/led_driver/CMakeLists.txt +++ b/zephyr/shim/src/led_driver/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/shim/src/led_driver/led.c b/zephyr/shim/src/led_driver/led.c index 127c786ddf..011632ac83 100644 --- a/zephyr/shim/src/led_driver/led.c +++ b/zephyr/shim/src/led_driver/led.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -24,21 +24,14 @@ #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(led, LOG_LEVEL_ERR); -#define LED_COLOR_NODE DT_PATH(led_colors) +#define LED_COLOR_NODE DT_PATH(led_colors) struct led_color_node_t { struct led_pins_node_t *pins_node; int acc_period; }; -enum led_extra_flag_t { - NONE = 0, - LED_CHFLAG_FORCE_IDLE, - LED_CHFLAG_DEFAULT, -}; - -#define DECLARE_PINS_NODE(id) \ -extern struct led_pins_node_t PINS_NODE(id); +#define DECLARE_PINS_NODE(id) extern struct led_pins_node_t PINS_NODE(id); #if DT_HAS_COMPAT_STATUS_OKAY(COMPAT_PWM_LED) DT_FOREACH_CHILD(PWM_LED_PINS_NODE, DECLARE_PINS_NODE) @@ -59,12 +52,11 @@ DT_FOREACH_CHILD(GPIO_LED_PINS_NODE, DECLARE_PINS_NODE) * 3, 4, 5 < period_3 -> LED_COLOR_3 for 3 secs * 6, 7, 8 < period_4 -> LED_COLOR_4 for 3 secs */ -#define MAX_COLOR 4 +#define MAX_COLOR 4 struct node_prop_t { enum charge_state pwr_state; enum power_state chipset_state; - enum led_extra_flag_t led_extra_flag; int8_t batt_lvl[2]; int8_t charge_port; struct led_color_node_t led_colors[MAX_COLOR]; @@ -80,55 +72,51 @@ struct node_prop_t { * HOOT_TICK_INTERVAL_MS */ -#define PERIOD_VAL(id) COND_CODE_1(DT_NODE_HAS_PROP(id, period_ms), \ - (DT_PROP(id, period_ms) / HOOK_TICK_INTERVAL_MS), (0)) +#define PERIOD_VAL(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, period_ms), \ + (DT_PROP(id, period_ms) / HOOK_TICK_INTERVAL_MS), (0)) -#define LED_PERIOD(color_num, state_id) \ +#define LED_PERIOD(color_num, state_id) \ PERIOD_VAL(DT_CHILD(state_id, color_##color_num)) -#define LED_PLUS_PERIOD(color_num, state_id) \ - + LED_PERIOD(color_num, state_id) +#define LED_PLUS_PERIOD(color_num, state_id) +LED_PERIOD(color_num, state_id) -#define ACC_PERIOD(color_num, state_id) \ +#define ACC_PERIOD(color_num, state_id) \ (0 LISTIFY(color_num, LED_PLUS_PERIOD, (), state_id)) -#define PINS_NODE_ADDR(id) DT_PHANDLE(id, led_color) -#define LED_COLOR_INIT(color_num, color_num_plus_one, state_id) \ -{ \ - .pins_node = COND_CODE_1( \ - DT_NODE_EXISTS(DT_CHILD(state_id, color_##color_num)), \ - (&PINS_NODE(PINS_NODE_ADDR( \ - DT_CHILD(state_id, color_##color_num)))), \ - (NULL)), \ - .acc_period = ACC_PERIOD(color_num_plus_one, state_id) \ -} +#define PINS_NODE_ADDR(id) DT_PHANDLE(id, led_color) +#define LED_COLOR_INIT(color_num, color_num_plus_one, state_id) \ + { \ + .pins_node = COND_CODE_1( \ + DT_NODE_EXISTS(DT_CHILD(state_id, color_##color_num)), \ + (&PINS_NODE(PINS_NODE_ADDR( \ + DT_CHILD(state_id, color_##color_num)))), \ + (NULL)), \ + .acc_period = ACC_PERIOD(color_num_plus_one, state_id) \ + } /* * Initialize node_array struct with prop listed in dts */ -#define SET_LED_VALUES(state_id) \ -{ \ - .pwr_state = GET_PROP(state_id, charge_state), \ - .chipset_state = GET_PROP(state_id, chipset_state), \ - .led_extra_flag = GET_PROP(state_id, extra_flag), \ - .batt_lvl = COND_CODE_1( \ - DT_NODE_HAS_PROP(state_id, batt_lvl), \ - (DT_PROP(state_id, batt_lvl)), ({-1, -1})), \ - .charge_port = COND_CODE_1( \ - DT_NODE_HAS_PROP(state_id, charge_port), \ - (DT_PROP(state_id, charge_port)), (-1)), \ - .led_colors = {LED_COLOR_INIT(0, 1, state_id), \ - LED_COLOR_INIT(1, 2, state_id), \ - LED_COLOR_INIT(2, 3, state_id), \ - LED_COLOR_INIT(3, 4, state_id), \ - } \ -}, - -static const struct node_prop_t node_array[] = { - DT_FOREACH_CHILD(LED_COLOR_NODE, SET_LED_VALUES) -}; - -static enum power_state get_chipset_state(void) +#define SET_LED_VALUES(state_id) \ + { .pwr_state = GET_PROP(state_id, charge_state), \ + .chipset_state = GET_PROP(state_id, chipset_state), \ + .batt_lvl = COND_CODE_1(DT_NODE_HAS_PROP(state_id, batt_lvl), \ + (DT_PROP(state_id, batt_lvl)), \ + ({ -1, -1 })), \ + .charge_port = COND_CODE_1(DT_NODE_HAS_PROP(state_id, charge_port), \ + (DT_PROP(state_id, charge_port)), (-1)), \ + .led_colors = { \ + LED_COLOR_INIT(0, 1, state_id), \ + LED_COLOR_INIT(1, 2, state_id), \ + LED_COLOR_INIT(2, 3, state_id), \ + LED_COLOR_INIT(3, 4, state_id), \ + } }, + +static const struct node_prop_t node_array[] = { DT_FOREACH_CHILD( + LED_COLOR_NODE, SET_LED_VALUES) }; + +test_export_static enum power_state get_chipset_state(void) { enum power_state chipset_state = 0; @@ -149,33 +137,7 @@ static enum power_state get_chipset_state(void) return chipset_state; } -static bool find_node_with_extra_flag(int i) -{ - uint32_t chflags = charge_get_flags(); - bool found_node = false; - - switch (node_array[i].led_extra_flag) { - case LED_CHFLAG_FORCE_IDLE: - case LED_CHFLAG_DEFAULT: - if (chflags & CHARGE_FLAG_FORCE_IDLE) { - if (node_array[i].led_extra_flag == - LED_CHFLAG_FORCE_IDLE) - found_node = true; - } else { - if (node_array[i].led_extra_flag == LED_CHFLAG_DEFAULT) - found_node = true; - } - break; - default: - LOG_ERR("Invalid led extra flag %d", - node_array[i].led_extra_flag); - break; - } - - return found_node; -} - -#define GET_PERIOD(n_idx, c_idx) node_array[n_idx].led_colors[c_idx].acc_period +#define GET_PERIOD(n_idx, c_idx) node_array[n_idx].led_colors[c_idx].acc_period #define GET_PIN_NODE(n_idx, c_idx) node_array[n_idx].led_colors[c_idx].pins_node static void set_color(int node_idx, uint32_t ticks) @@ -258,11 +220,6 @@ static int match_node(int node_idx) return -1; } - /* Check if the node depends on any special flags */ - if (node_array[node_idx].led_extra_flag != NONE) - if (!find_node_with_extra_flag(node_idx)) - return -1; - /* We found the node that matches the current system state */ return node_idx; } diff --git a/zephyr/shim/src/led_driver/led.h b/zephyr/shim/src/led_driver/led.h index 8c4e7654d5..b8cedf5af7 100644 --- a/zephyr/shim/src/led_driver/led.h +++ b/zephyr/shim/src/led_driver/led.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,34 +11,32 @@ #include <zephyr/drivers/pwm.h> #define COMPAT_GPIO_LED cros_ec_gpio_led_pins -#define COMPAT_PWM_LED cros_ec_pwm_led_pins +#define COMPAT_PWM_LED cros_ec_pwm_led_pins -#define PINS_NODE(id) DT_CAT(PIN_NODE_, id) -#define PINS_ARRAY(id) DT_CAT(PINS_ARRAY_, id) +#define PINS_NODE(id) DT_CAT(PIN_NODE_, id) +#define PINS_ARRAY(id) DT_CAT(PINS_ARRAY_, id) /* * Return string-token if the property exists, otherwise return 0 */ -#define GET_PROP(id, prop) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, prop), \ - (DT_STRING_UPPER_TOKEN(id, prop)), \ - (0)) +#define GET_PROP(id, prop) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, prop), \ + (DT_STRING_UPPER_TOKEN(id, prop)), (0)) /* * Return string-token if the property exists, otherwise return -1 */ -#define GET_PROP_NVE(id, prop) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, prop), \ - (DT_STRING_UPPER_TOKEN(id, prop)), \ - (-1)) +#define GET_PROP_NVE(id, prop) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, prop), \ + (DT_STRING_UPPER_TOKEN(id, prop)), (-1)) -#define LED_ENUM(id, enum_name) DT_STRING_TOKEN(id, enum_name) -#define LED_ENUM_WITH_COMMA(id, enum_name) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), \ - (LED_ENUM(id, enum_name),), ()) +#define LED_ENUM(id, enum_name) DT_STRING_TOKEN(id, enum_name) +#define LED_ENUM_WITH_COMMA(id, enum_name) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), \ + (LED_ENUM(id, enum_name), ), ()) #define GPIO_LED_PINS_NODE DT_PATH(gpio_led_pins) -#define PWM_LED_PINS_NODE DT_PATH(pwm_led_pins) +#define PWM_LED_PINS_NODE DT_PATH(pwm_led_pins) enum led_color { LED_OFF, @@ -48,7 +46,7 @@ enum led_color { LED_YELLOW, LED_WHITE, LED_AMBER, - LED_COLOR_COUNT /* Number of colors, not a color itself */ + LED_COLOR_COUNT /* Number of colors, not a color itself */ }; /* @@ -63,9 +61,7 @@ struct gpio_pin_t { * Struct defining LED PWM pin and duty cycle to set. */ struct pwm_pin_t { - const struct device *pwm; - uint8_t channel; - pwm_flags_t flags; + struct pwm_dt_spec pwm; uint32_t pulse_ns; /* PWM Duty cycle ns */ }; @@ -122,6 +118,8 @@ void led_set_color_with_node(const struct led_pins_node_t *pins_node); #ifdef TEST_BUILD const struct led_pins_node_t *led_get_node(enum led_color color, enum ec_led_id led_id); + +enum power_state get_chipset_state(void); #endif /* TEST_BUILD */ #endif /* __CROS_EC_LED_H__ */ diff --git a/zephyr/shim/src/led_driver/led_gpio.c b/zephyr/shim/src/led_driver/led_gpio.c index 5a4735a162..122794dc82 100644 --- a/zephyr/shim/src/led_driver/led_gpio.c +++ b/zephyr/shim/src/led_driver/led_gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -17,46 +17,38 @@ LOG_MODULE_REGISTER(gpio_led, LOG_LEVEL_ERR); -#define SET_PIN(node_id, prop, i) \ -{ \ - .signal = GPIO_SIGNAL(DT_PHANDLE_BY_IDX(node_id, prop, i)), \ - .val = DT_PHA_BY_IDX(node_id, prop, i, value) \ -}, +#define SET_PIN(node_id, prop, i) \ + { .signal = GPIO_SIGNAL(DT_PHANDLE_BY_IDX(node_id, prop, i)), \ + .val = DT_PHA_BY_IDX(node_id, prop, i, value) }, -#define SET_GPIO_PIN(node_id) \ -{ \ - DT_FOREACH_PROP_ELEM(node_id, led_pins, SET_PIN) \ -}; +#define SET_GPIO_PIN(node_id) \ + { DT_FOREACH_PROP_ELEM(node_id, led_pins, SET_PIN) }; -#define GEN_PINS_ARRAY(id) \ -struct gpio_pin_t PINS_ARRAY(id)[] = SET_GPIO_PIN(id) +#define GEN_PINS_ARRAY(id) struct gpio_pin_t PINS_ARRAY(id)[] = SET_GPIO_PIN(id) DT_FOREACH_CHILD(GPIO_LED_PINS_NODE, GEN_PINS_ARRAY) -#define SET_PIN_NODE(node_id) \ -{ \ - .led_color = GET_PROP(node_id, led_color), \ - .led_id = GET_PROP(node_id, led_id), \ - .br_color = GET_PROP_NVE(node_id, br_color), \ - .gpio_pins = PINS_ARRAY(node_id), \ - .pins_count = DT_PROP_LEN(node_id, led_pins) \ -}; +#define SET_PIN_NODE(node_id) \ + { .led_color = GET_PROP(node_id, led_color), \ + .led_id = GET_PROP(node_id, led_id), \ + .br_color = GET_PROP_NVE(node_id, br_color), \ + .gpio_pins = PINS_ARRAY(node_id), \ + .pins_count = DT_PROP_LEN(node_id, led_pins) }; /* * Initialize led_pins_node_t struct for each pin node defined */ -#define GEN_PINS_NODES(id) \ -const struct led_pins_node_t PINS_NODE(id) = SET_PIN_NODE(id) +#define GEN_PINS_NODES(id) \ + const struct led_pins_node_t PINS_NODE(id) = SET_PIN_NODE(id) DT_FOREACH_CHILD(GPIO_LED_PINS_NODE, GEN_PINS_NODES) /* * Array of pointers to each pin node */ -#define PINS_NODE_PTR(id) &PINS_NODE(id), -const struct led_pins_node_t *pins_node[] = { - DT_FOREACH_CHILD(GPIO_LED_PINS_NODE, PINS_NODE_PTR) -}; +#define PINS_NODE_PTR(id) &PINS_NODE(id), +const struct led_pins_node_t *pins_node[] = { DT_FOREACH_CHILD( + GPIO_LED_PINS_NODE, PINS_NODE_PTR) }; /* * Set all the GPIO pins defined in the node to the defined value, @@ -65,8 +57,8 @@ const struct led_pins_node_t *pins_node[] = { void led_set_color_with_node(const struct led_pins_node_t *pins_node) { for (int j = 0; j < pins_node->pins_count; j++) { - gpio_pin_set_dt(gpio_get_dt_spec( - pins_node->gpio_pins[j].signal), + gpio_pin_set_dt( + gpio_get_dt_spec(pins_node->gpio_pins[j].signal), pins_node->gpio_pins[j].val); } } diff --git a/zephyr/shim/src/led_driver/led_pwm.c b/zephyr/shim/src/led_driver/led_pwm.c index 7935bc0d8a..00002fc32e 100644 --- a/zephyr/shim/src/led_driver/led_pwm.c +++ b/zephyr/shim/src/led_driver/led_pwm.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -27,54 +27,44 @@ LOG_MODULE_REGISTER(pwm_led, LOG_LEVEL_ERR); * e.g. freq = 500 Hz, period_ns = 1000000000/500 = 2000000ns * duty_cycle = 50 %, pulse_ns = (2000000*50)/100 = 1000000ns */ -const uint32_t period_ns = - (NSEC_PER_SEC / DT_PROP(PWM_LED_PINS_NODE, pwm_frequency)); - -#define SET_PIN(node_id, prop, i) \ -{ \ - .pwm = DEVICE_DT_GET( \ - DT_PWMS_CTLR(DT_PHANDLE_BY_IDX(node_id, prop, i))), \ - .channel = DT_PWMS_CHANNEL( \ - DT_PHANDLE_BY_IDX(node_id, prop, i)), \ - .flags = DT_PWMS_FLAGS(DT_PHANDLE_BY_IDX(node_id, prop, i)), \ - .pulse_ns = DIV_ROUND_NEAREST( \ - period_ns * DT_PHA_BY_IDX(node_id, prop, i, value), 100), \ -}, - -#define SET_PWM_PIN(node_id) \ -{ \ - DT_FOREACH_PROP_ELEM(node_id, led_pins, SET_PIN) \ -}; - -#define GEN_PINS_ARRAY(id) \ -struct pwm_pin_t PINS_ARRAY(id)[] = SET_PWM_PIN(id) + +#define SET_PIN(node_id, prop, i) \ + { \ + .pwm = PWM_DT_SPEC_GET(DT_PHANDLE_BY_IDX(node_id, prop, i)), \ + .pulse_ns = DIV_ROUND_NEAREST( \ + DT_PWMS_PERIOD(DT_PHANDLE_BY_IDX(node_id, prop, i)) * \ + DT_PHA_BY_IDX(node_id, prop, i, value), \ + 100), \ + }, + +#define SET_PWM_PIN(node_id) \ + { DT_FOREACH_PROP_ELEM(node_id, led_pins, SET_PIN) }; + +#define GEN_PINS_ARRAY(id) struct pwm_pin_t PINS_ARRAY(id)[] = SET_PWM_PIN(id) DT_FOREACH_CHILD(PWM_LED_PINS_NODE, GEN_PINS_ARRAY) -#define SET_PIN_NODE(node_id) \ -{ \ - .led_color = GET_PROP(node_id, led_color), \ - .led_id = GET_PROP(node_id, led_id), \ - .br_color = GET_PROP_NVE(node_id, br_color), \ - .pwm_pins = PINS_ARRAY(node_id), \ - .pins_count = DT_PROP_LEN(node_id, led_pins) \ -}; +#define SET_PIN_NODE(node_id) \ + { .led_color = GET_PROP(node_id, led_color), \ + .led_id = GET_PROP(node_id, led_id), \ + .br_color = GET_PROP_NVE(node_id, br_color), \ + .pwm_pins = PINS_ARRAY(node_id), \ + .pins_count = DT_PROP_LEN(node_id, led_pins) }; /* * Initialize led_pins_node_t struct for each pin node defined */ -#define GEN_PINS_NODES(id) \ -const struct led_pins_node_t PINS_NODE(id) = SET_PIN_NODE(id) +#define GEN_PINS_NODES(id) \ + const struct led_pins_node_t PINS_NODE(id) = SET_PIN_NODE(id) DT_FOREACH_CHILD(PWM_LED_PINS_NODE, GEN_PINS_NODES) /* * Array of pointers to each pin node */ -#define PINS_NODE_PTR(id) &PINS_NODE(id), -const struct led_pins_node_t *pins_node[] = { - DT_FOREACH_CHILD(PWM_LED_PINS_NODE, PINS_NODE_PTR) -}; +#define PINS_NODE_PTR(id) &PINS_NODE(id), +const struct led_pins_node_t *pins_node[] = { DT_FOREACH_CHILD( + PWM_LED_PINS_NODE, PINS_NODE_PTR) }; /* * Set all the PWM channels defined in the node to the defined value, @@ -83,13 +73,9 @@ const struct led_pins_node_t *pins_node[] = { */ void led_set_color_with_node(const struct led_pins_node_t *pins_node) { + struct pwm_pin_t *pwm_pins = pins_node->pwm_pins; for (int j = 0; j < pins_node->pins_count; j++) { - pwm_set( - pins_node->pwm_pins[j].pwm, - pins_node->pwm_pins[j].channel, - period_ns, - pins_node->pwm_pins[j].pulse_ns, - pins_node->pwm_pins[j].flags); + pwm_set_pulse_dt(&pwm_pins[j].pwm, pwm_pins[j].pulse_ns); } } @@ -109,11 +95,18 @@ void led_set_color(enum led_color color, enum ec_led_id led_id) void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { + memset(brightness_range, 0, EC_LED_COLOR_COUNT); + for (int i = 0; i < ARRAY_SIZE(pins_node); i++) { int br_color = pins_node[i]->br_color; - if (br_color != -1) + if (pins_node[i]->led_id != led_id) { + continue; + } + + if (br_color != -1) { brightness_range[br_color] = 100; + } } } @@ -124,6 +117,10 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) for (int i = 0; i < ARRAY_SIZE(pins_node); i++) { int br_color = pins_node[i]->br_color; + if (pins_node[i]->led_id != led_id) { + continue; + } + if ((br_color != -1) && (brightness[br_color] != 0)) { color_set = true; led_set_color(pins_node[i]->led_color, led_id); diff --git a/zephyr/shim/src/libgcc_arm.S b/zephyr/shim/src/libgcc_arm.S index ffdbefc675..9e087ecf5f 100644 --- a/zephyr/shim/src/libgcc_arm.S +++ b/zephyr/shim/src/libgcc_arm.S @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/log_backend_console_buffer.c b/zephyr/shim/src/log_backend_console_buffer.c new file mode 100644 index 0000000000..cafb690b87 --- /dev/null +++ b/zephyr/shim/src/log_backend_console_buffer.c @@ -0,0 +1,56 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/logging/log_backend.h> +#include <zephyr/logging/log_output.h> +#include <zephyr/logging/log_backend_std.h> + +#include "console.h" + +static uint8_t + char_out_buf[CONFIG_PLATFORM_EC_LOG_BACKEND_CONSOLE_BUFFER_TMP_BUF_SIZE]; + +static int char_out(uint8_t *data, size_t length, void *ctx) +{ + /* + * console_buf_notify_chars uses a mutex, which may not be + * locked in ISRs. + */ + if (k_is_in_isr()) + return 0; + return console_buf_notify_chars(data, length); +} +LOG_OUTPUT_DEFINE(log_output_console_buffer, char_out, char_out_buf, + sizeof(char_out_buf)); + +static void process(const struct log_backend *const backend, + union log_msg_generic *msg) +{ + uint32_t flags = log_backend_std_get_flags(); + log_format_func_t log_output_func = + log_format_func_t_get(LOG_OUTPUT_TEXT); + log_output_func(&log_output_console_buffer, &msg->log, flags); +} + +static void panic(struct log_backend const *const backend) +{ + log_backend_std_panic(&log_output_console_buffer); +} + +static void dropped(const struct log_backend *const backend, uint32_t cnt) +{ + log_backend_std_dropped(&log_output_console_buffer, cnt); +} + +const struct log_backend_api log_backend_console_buffer_api = { + .process = process, + .panic = panic, + .dropped = IS_ENABLED(CONFIG_LOG_MODE_DEFERRED) ? dropped : NULL, + /* TODO(b/244170593): Support switching output formats */ + .format_set = NULL, +}; + +LOG_BACKEND_DEFINE(log_backend_console_buffer, log_backend_console_buffer_api, + true); diff --git a/zephyr/shim/src/mkbp_event.c b/zephyr/shim/src/mkbp_event.c index 39bcb001b8..ac39d14120 100644 --- a/zephyr/shim/src/mkbp_event.c +++ b/zephyr/shim/src/mkbp_event.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,8 @@ const struct mkbp_event_source *zephyr_find_mkbp_event_source(uint8_t type) { - STRUCT_SECTION_FOREACH(mkbp_event_source, evtsrc) { + STRUCT_SECTION_FOREACH(mkbp_event_source, evtsrc) + { if (evtsrc->event_type == type) return evtsrc; } diff --git a/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc index 7db46811ad..a16c4f0fbc 100644 --- a/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/bma255-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/bma4xx-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bma4xx-drvinfo.inc index 2d40c55de7..3d02e5db70 100644 --- a/zephyr/shim/src/motionsense_driver/bma4xx-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/bma4xx-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc index dd7b21641b..36d20db7be 100644 --- a/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/bmi160-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc index 2457fca31a..72bfc5b4b3 100644 --- a/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/bmi260-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/bmi3xx-drvinfo.inc b/zephyr/shim/src/motionsense_driver/bmi3xx-drvinfo.inc index ce6f686cc2..c28f5c1786 100644 --- a/zephyr/shim/src/motionsense_driver/bmi3xx-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/bmi3xx-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h b/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h index 069587f90f..ab2f08a496 100644 --- a/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h +++ b/zephyr/shim/src/motionsense_driver/drvdata-accelgyro.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -23,28 +23,27 @@ * cover-scale = <1>; * }; */ -#define ACCELGYRO_ALS_CHANNEL_SCALE(id) \ - { \ - .k_channel_scale = \ - ALS_CHANNEL_SCALE(DT_PROP(id, k_channel_scale)),\ - .cover_scale = \ - ALS_CHANNEL_SCALE(DT_PROP(id, cover_scale)), \ +#define ACCELGYRO_ALS_CHANNEL_SCALE(id) \ + { \ + .k_channel_scale = \ + ALS_CHANNEL_SCALE(DT_PROP(id, k_channel_scale)), \ + .cover_scale = ALS_CHANNEL_SCALE(DT_PROP(id, cover_scale)), \ } -#define ALS_CALIBRATION_CHANNEL_SCALE(id) \ +#define ALS_CALIBRATION_CHANNEL_SCALE(id) \ .als_cal.channel_scale = ACCELGYRO_ALS_CHANNEL_SCALE(id), -#define ALS_CALIBRATION_SET(id) \ - .als_cal.scale = DT_PROP(id, scale), \ - .als_cal.uscale = DT_PROP(id, uscale), \ - .als_cal.offset = DT_PROP(id, offset), \ +#define ALS_CALIBRATION_SET(id) \ + .als_cal.scale = DT_PROP(id, scale), \ + .als_cal.uscale = DT_PROP(id, uscale), \ + .als_cal.offset = DT_PROP(id, offset), \ ALS_CALIBRATION_CHANNEL_SCALE(DT_CHILD(id, als_channel_scale)) /* * compatible = "cros-ec,accelgyro-als-drv-data" * als_drv_data_t in accelgyro.h * - * e.g) The following is the example in DT for als_drv_data_t + * e.g) The following is the example in DT for als_drv_data_t * als-drv-data { * compatible = "cros-ec,accelgyro-als-drv-data"; * als-cal { @@ -59,22 +58,21 @@ * }; * }; */ -#define ACCELGYRO_ALS_DRV_DATA(id) \ - { \ - ALS_CALIBRATION_SET(DT_CHILD(id, als_cal)) \ +#define ACCELGYRO_ALS_DRV_DATA(id) \ + { \ + ALS_CALIBRATION_SET(DT_CHILD(id, als_cal)) \ } -#define RGB_CAL_RGB_SET_SCALE(id) \ - .scale = ACCELGYRO_ALS_CHANNEL_SCALE(id), +#define RGB_CAL_RGB_SET_SCALE(id) .scale = ACCELGYRO_ALS_CHANNEL_SCALE(id), -#define RGB_CAL_RGB_SET_ONE(id, suffix) \ - .rgb_cal[suffix] = { \ - .offset = DT_PROP(id, offset), \ - .coeff[0] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 0)), \ - .coeff[1] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 1)), \ - .coeff[2] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 2)), \ - .coeff[3] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 3)), \ - RGB_CAL_RGB_SET_SCALE(DT_CHILD(id, als_channel_scale)) \ +#define RGB_CAL_RGB_SET_ONE(id, suffix) \ + .rgb_cal[suffix] = { \ + .offset = DT_PROP(id, offset), \ + .coeff[0] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 0)), \ + .coeff[1] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 1)), \ + .coeff[2] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 2)), \ + .coeff[3] = FLOAT_TO_FP(DT_PROP_BY_IDX(id, coeff, 3)), \ + RGB_CAL_RGB_SET_SCALE(DT_CHILD(id, als_channel_scale)) \ }, /* @@ -116,12 +114,12 @@ * }; * }; */ -#define ACCELGYRO_RGB_CALIBRATION(id) \ - { \ - RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_x), X) \ - RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_y), Y) \ - RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_z), Z) \ - .irt = INT_TO_FP(DT_PROP(id, irt)), \ +#define ACCELGYRO_RGB_CALIBRATION(id) \ + { \ + RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_x), X) \ + RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_y), Y) \ + RGB_CAL_RGB_SET_ONE(DT_CHILD(id, rgb_cal_z), Z).irt = \ + INT_TO_FP(DT_PROP(id, irt)), \ } #endif /* __ZEPHYR_SHIM_SRC_MOTIONSENSE_DRIVER_DRVDATA_ACCELGYRO_H */ diff --git a/zephyr/shim/src/motionsense_driver/icm42607-drvinfo.inc b/zephyr/shim/src/motionsense_driver/icm42607-drvinfo.inc index e8199eaacf..ede16342ea 100644 --- a/zephyr/shim/src/motionsense_driver/icm42607-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/icm42607-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/icm426xx-drvinfo.inc b/zephyr/shim/src/motionsense_driver/icm426xx-drvinfo.inc index 5513ff934c..d949829750 100644 --- a/zephyr/shim/src/motionsense_driver/icm426xx-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/icm426xx-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc b/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc index 800a9a1543..26885230e1 100644 --- a/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/kx022-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc b/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc index 433a9d4192..4605fcd749 100644 --- a/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/lis2dw12-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_driver/lsm6dsm-drvinfo.inc b/zephyr/shim/src/motionsense_driver/lsm6dsm-drvinfo.inc new file mode 100644 index 0000000000..32faaa087f --- /dev/null +++ b/zephyr/shim/src/motionsense_driver/lsm6dsm-drvinfo.inc @@ -0,0 +1,57 @@ +/* Copyright 2022 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/accelgyro_lsm6dsm.h" +#include "driver/stm_mems_common.h" + +/* + * CREATE_SENSOR_DATA which is defined in motionsense_sensors.c is + * the helper to create sensor driver specific data. + * + * CREATE_SENSOR_DATA gets two arguments. One is the compatible + * property value specified in device tree and the other one is the macro + * that actually creates sensor driver specific data. The macro gets + * node id and the name to be used for the sensor driver data. + */ + +/* + * Create driver data. This must be a separate instance for + * each entry of the lsm6dsm device in the motion_sensors array. + */ +#define CREATE_SENSOR_DATA_LSM6DSM(id, drvdata_name) \ + static struct lsm6dsm_data drvdata_name = LSM6DSM_DATA; + +/* + * Create driver data for each lsm6dsm drvinfo instance in device tree. + * (compatible = "cros-ec,drvdata-lsm6dsm") + */ +CREATE_SENSOR_DATA(cros_ec_drvdata_lsm6dsm, CREATE_SENSOR_DATA_LSM6DSM) +/* + * CREATE_MOTION_SENSOR which is defined in motionsense_sensors.c is + * the macro to create an entry in motion_sensors array. + * The macro gets value of compatible property of + * the sensor in device tree and sensor specific values like chip ID, + * type of sensor, name of driver, default min/max frequency. + * Then using the values, it creates the corresponding motion_sense_t entry + * in motion_sensors array. + */ + +/* + * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry + * for each lsm6dsm accel instance(compatible = "cros-ec,lsm6dsm-accel") + * in device tree. + */ +CREATE_MOTION_SENSOR(cros_ec_lsm6dsm_accel, MOTIONSENSE_CHIP_LSM6DSM, \ + MOTIONSENSE_TYPE_ACCEL, lsm6dsm_drv, \ + LSM6DSM_ODR_MIN_VAL, LSM6DSM_ODR_MAX_VAL) + +/* + * Here, we call CREATE_MOTION_SENSOR to create a motion_sensor_t entry + * for each lsm6dsm gyro instance (compatible = "cros-ec,lsm6dsm-gyro") + * in device tree. + */ +CREATE_MOTION_SENSOR(cros_ec_lsm6dsm_gyro, MOTIONSENSE_CHIP_LSM6DSM, \ + MOTIONSENSE_TYPE_GYRO, lsm6dsm_drv, \ + LSM6DSM_ODR_MIN_VAL, LSM6DSM_ODR_MAX_VAL) diff --git a/zephyr/shim/src/motionsense_driver/lsm6dso-drvinfo.inc b/zephyr/shim/src/motionsense_driver/lsm6dso-drvinfo.inc index a759993ba4..dfffa2fe2a 100644 --- a/zephyr/shim/src/motionsense_driver/lsm6dso-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/lsm6dso-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,8 +17,8 @@ */ /* - * Create driver data. It can be shared among the entries in - * motion_sensors array which are using the same lsm6dso driver. + * Create driver data. This must be a separate instance for + * each entry of the lsm6dso device in the motion_sensors array. */ #define CREATE_SENSOR_DATA_LSM6DSO(id, drvdata_name) \ static struct stprivate_data drvdata_name; diff --git a/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc b/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc index 2b70a6ec16..1ea1ba2a2d 100644 --- a/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc +++ b/zephyr/shim/src/motionsense_driver/sensor_drv_list.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -52,3 +52,6 @@ #ifdef CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSO #include "lsm6dso-drvinfo.inc" #endif +#ifdef CONFIG_PLATFORM_EC_ACCELGYRO_LSM6DSM +#include "lsm6dsm-drvinfo.inc" +#endif diff --git a/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc b/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc index 346688d646..9d42860ac7 100644 --- a/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc +++ b/zephyr/shim/src/motionsense_driver/tcs3400-drvinfo.inc @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/shim/src/motionsense_sensors.c b/zephyr/shim/src/motionsense_sensors.c index f0b76adf33..8d886192ac 100644 --- a/zephyr/shim/src/motionsense_sensors.c +++ b/zephyr/shim/src/motionsense_sensors.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,11 +13,11 @@ LOG_MODULE_REGISTER(shim_cros_motionsense_sensors); -#define SENSOR_MUTEX_NODE DT_PATH(motionsense_mutex) -#define SENSOR_MUTEX_NAME(id) DT_CAT(MUTEX_, id) +#define SENSOR_MUTEX_NODE DT_PATH(motionsense_mutex) +#define SENSOR_MUTEX_NAME(id) DT_CAT(MUTEX_, id) #if DT_NODE_EXISTS(SENSOR_MUTEX_NODE) -#define DECLARE_SENSOR_MUTEX(id) K_MUTEX_DEFINE(SENSOR_MUTEX_NAME(id)); +#define DECLARE_SENSOR_MUTEX(id) K_MUTEX_DEFINE(SENSOR_MUTEX_NAME(id)); /* * Declare mutex for @@ -28,18 +28,12 @@ LOG_MODULE_REGISTER(shim_cros_motionsense_sensors); DT_FOREACH_CHILD(SENSOR_MUTEX_NODE, DECLARE_SENSOR_MUTEX) #endif /* DT_NODE_EXISTS(SENSOR_MUTEX_NODE) */ -#define MAT_ITEM(i, id) FLOAT_TO_FP((int32_t)(DT_PROP_BY_IDX(id, mat33, i))) -#define DECLARE_SENSOR_ROT_REF(id) \ - const mat33_fp_t SENSOR_ROT_STD_REF_NAME(id) = { \ - { \ - FOR_EACH_FIXED_ARG(MAT_ITEM, (,), id, 0, 1, 2) \ - }, \ - { \ - FOR_EACH_FIXED_ARG(MAT_ITEM, (,), id, 3, 4, 5) \ - }, \ - { \ - FOR_EACH_FIXED_ARG(MAT_ITEM, (,), id, 6, 7, 8) \ - }, \ +#define MAT_ITEM(i, id) FLOAT_TO_FP((int32_t)(DT_PROP_BY_IDX(id, mat33, i))) +#define DECLARE_SENSOR_ROT_REF(id) \ + const mat33_fp_t SENSOR_ROT_STD_REF_NAME(id) = { \ + { FOR_EACH_FIXED_ARG(MAT_ITEM, (, ), id, 0, 1, 2) }, \ + { FOR_EACH_FIXED_ARG(MAT_ITEM, (, ), id, 3, 4, 5) }, \ + { FOR_EACH_FIXED_ARG(MAT_ITEM, (, ), id, 6, 7, 8) }, \ }; /* @@ -59,12 +53,12 @@ DT_FOREACH_CHILD(SENSOR_ROT_REF_NODE, DECLARE_SENSOR_ROT_REF) * * A driver data can be shared among the motion sensors. */ -#define SENSOR_DATA_NAME(id) DT_CAT(SENSOR_DAT_, id) -#define SENSOR_DATA_NODE DT_PATH(motionsense_sensor_data) +#define SENSOR_DATA_NAME(id) DT_CAT(SENSOR_DAT_, id) +#define SENSOR_DATA_NODE DT_PATH(motionsense_sensor_data) -#define SENSOR_DATA(inst, compat, create_data_macro) \ - create_data_macro(DT_INST(inst, compat), \ - SENSOR_DATA_NAME(DT_INST(inst, compat))) +#define SENSOR_DATA(inst, compat, create_data_macro) \ + create_data_macro(DT_INST(inst, compat), \ + SENSOR_DATA_NAME(DT_INST(inst, compat))) /* * CREATE_SENSOR_DATA is a helper macro that gets @@ -93,17 +87,17 @@ DT_FOREACH_CHILD(SENSOR_ROT_REF_NODE, DECLARE_SENSOR_ROT_REF) * CREATE_SENSOR_DATA(cros_ec_drvdata_tcs3400_clear, \ * CREATE_SENSOR_DATA_TCS3400_CLEAR) */ -#define CREATE_SENSOR_DATA(compat, create_data_macro) \ - LISTIFY(DT_NUM_INST_STATUS_OKAY(compat), SENSOR_DATA, (), \ - compat, create_data_macro) +#define CREATE_SENSOR_DATA(compat, create_data_macro) \ + LISTIFY(DT_NUM_INST_STATUS_OKAY(compat), SENSOR_DATA, (), compat, \ + create_data_macro) /* * sensor_drv_list.inc is included three times in this file. This is the first * time and it is for creating sensor driver-specific data. So we ignore * CREATE_MOTION_SENSOR() that creates motion sensor at this time. */ -#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, \ - s_min_freq, s_max_freq) +#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, s_min_freq, \ + s_max_freq) /* * Here, we declare all sensor driver data. How to create the data is @@ -119,33 +113,31 @@ DT_FOREACH_CHILD(SENSOR_ROT_REF_NODE, DECLARE_SENSOR_ROT_REF) * See motionsense-sensor-base.yaml and cros-ec,motionsense-mutex.yaml * for DT example and details. */ -#define SENSOR_MUTEX(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, mutex), \ - (.mutex = &SENSOR_MUTEX_NAME(DT_PHANDLE(id, mutex)),)) +#define SENSOR_MUTEX(id) \ + IF_ENABLED(DT_NODE_HAS_PROP(id, mutex), \ + (.mutex = &SENSOR_MUTEX_NAME(DT_PHANDLE(id, mutex)), )) /* * Set the interrupt pin which is referred by the phandle. */ -#define SENSOR_INT_SIGNAL(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, int_signal), \ - (.int_signal = GPIO_SIGNAL(DT_PHANDLE(id, int_signal)),)) +#define SENSOR_INT_SIGNAL(id) \ + IF_ENABLED(DT_NODE_HAS_PROP(id, int_signal), \ + (.int_signal = GPIO_SIGNAL(DT_PHANDLE(id, int_signal)), )) /* * Set flags based on values defined in the node. */ -#define SENSOR_FLAGS(id) \ - .flags = 0 \ - IF_ENABLED(DT_NODE_HAS_PROP(id, int_signal), \ - (|MOTIONSENSE_FLAG_INT_SIGNAL)) \ - , +#define SENSOR_FLAGS(id) \ + .flags = 0 IF_ENABLED(DT_NODE_HAS_PROP(id, int_signal), \ + (| MOTIONSENSE_FLAG_INT_SIGNAL)), /* * Get I2C port number which is referred by phandle. * See motionsense-sensor-base.yaml for DT example and details. */ -#define SENSOR_I2C_PORT(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, port), \ - (.port = I2C_PORT(DT_PHANDLE(id, port)),)) +#define SENSOR_I2C_PORT(id) \ + IF_ENABLED(DT_NODE_HAS_PROP(id, port), \ + (.port = I2C_PORT(DT_PHANDLE(id, port)), )) /* * Get I2C or SPI address. @@ -161,75 +153,74 @@ DT_FOREACH_CHILD(SENSOR_ROT_REF_NODE, DECLARE_SENSOR_ROT_REF) * See motionsense-sensor-base.yaml and cros-ec,motionsense-rotation-ref.yaml * for DT example and details. */ -#define SENSOR_ROT_STD_REF(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, rot_standard_ref), \ - (.rot_standard_ref = \ - &SENSOR_ROT_STD_REF_NAME(DT_PHANDLE(id, rot_standard_ref)),)) +#define SENSOR_ROT_STD_REF(id) \ + IF_ENABLED(DT_NODE_HAS_PROP(id, rot_standard_ref), \ + (.rot_standard_ref = &SENSOR_ROT_STD_REF_NAME( \ + DT_PHANDLE(id, rot_standard_ref)), )) /* * Get the address of driver-specific data which is referred by phandle. * See motionsense-sensor-base.yaml for DT example and details. */ -#define SENSOR_DRV_DATA(id) \ - IF_ENABLED(DT_NODE_HAS_PROP(id, drv_data), \ - (.drv_data = &SENSOR_DATA_NAME(DT_PHANDLE(id, drv_data)),)) +#define SENSOR_DRV_DATA(id) \ + IF_ENABLED(DT_NODE_HAS_PROP(id, drv_data), \ + (.drv_data = \ + &SENSOR_DATA_NAME(DT_PHANDLE(id, drv_data)), )) /* * Get odr and ec_rate for the motion sensor. * See motionsense-sensor-base.yaml and cros-ec,motionsense-sensor-config.yaml * for DT example and details. */ -#define SET_CONFIG_EC(cfg_id, cfg_suffix) \ - [SENSOR_CONFIG_##cfg_suffix] = { \ - IF_ENABLED(DT_NODE_HAS_PROP(cfg_id, odr), \ - (.odr = DT_PROP(cfg_id, odr),)) \ - IF_ENABLED(DT_NODE_HAS_PROP(cfg_id, ec_rate), \ - (.ec_rate = DT_PROP(cfg_id, ec_rate),)) \ +#define SET_CONFIG_EC(cfg_id, cfg_suffix) \ + [SENSOR_CONFIG_##cfg_suffix] = { \ + IF_ENABLED(DT_NODE_HAS_PROP(cfg_id, odr), \ + (.odr = DT_PROP(cfg_id, odr), )) \ + IF_ENABLED(DT_NODE_HAS_PROP(cfg_id, ec_rate), \ + (.ec_rate = DT_PROP(cfg_id, ec_rate), )) \ } /* Get configs */ -#define CREATE_SENSOR_CONFIG(cfgs_id) \ - .config = { \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ap)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ap), AP),)) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s0)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s0), EC_S0),)) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s3)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s3), EC_S3),)) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s5)), \ - (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s5), EC_S5),)) \ +#define CREATE_SENSOR_CONFIG(cfgs_id) \ + .config = { \ + IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ap)), \ + (SET_CONFIG_EC(DT_CHILD(cfgs_id, ap), AP), )) \ + IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(cfgs_id, ec_s0)), \ + (SET_CONFIG_EC(DT_CHILD(cfgs_id, ec_s0), \ + EC_S0), )) \ + IF_ENABLED(DT_NODE_EXISTS( \ + DT_CHILD(cfgs_id, ec_s3)), \ + (SET_CONFIG_EC(DT_CHILD(cfgs_id, \ + ec_s3), \ + EC_S3), )) \ + IF_ENABLED(DT_NODE_EXISTS(DT_CHILD( \ + cfgs_id, ec_s5)), \ + (SET_CONFIG_EC( \ + DT_CHILD(cfgs_id, \ + ec_s5), \ + EC_S5), )) \ } -#define SENSOR_CONFIG(id) \ - IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(id, configs)), \ - (CREATE_SENSOR_CONFIG(DT_CHILD(id, configs)),)) +#define SENSOR_CONFIG(id) \ + IF_ENABLED(DT_NODE_EXISTS(DT_CHILD(id, configs)), \ + (CREATE_SENSOR_CONFIG(DT_CHILD(id, configs)), )) /* Get and assign the basic information for a motion sensor */ -#define SENSOR_BASIC_INFO(id) \ - .name = DT_LABEL(id), \ - .active_mask = DT_STRING_TOKEN(id, active_mask), \ - .location = DT_STRING_TOKEN(id, location), \ - .default_range = DT_PROP(id, default_range), \ - SENSOR_I2C_SPI_ADDR_FLAGS(id) \ - SENSOR_MUTEX(id) \ - SENSOR_I2C_PORT(id) \ - SENSOR_ROT_STD_REF(id) \ - SENSOR_DRV_DATA(id) \ - SENSOR_CONFIG(id) \ - SENSOR_INT_SIGNAL(id) \ - SENSOR_FLAGS(id) +#define SENSOR_BASIC_INFO(id) \ + .name = DT_NODE_FULL_NAME(id), \ + .active_mask = DT_STRING_TOKEN(id, active_mask), \ + .location = DT_STRING_TOKEN(id, location), \ + .default_range = DT_PROP(id, default_range), \ + SENSOR_I2C_SPI_ADDR_FLAGS(id) SENSOR_MUTEX(id) SENSOR_I2C_PORT(id) \ + SENSOR_ROT_STD_REF(id) SENSOR_DRV_DATA(id) SENSOR_CONFIG(id) \ + SENSOR_INT_SIGNAL(id) SENSOR_FLAGS(id) /* Create motion sensor node with node ID */ -#define DO_MK_SENSOR_ENTRY( \ - id, s_chip, s_type, s_drv, s_min_freq, s_max_freq) \ - [SENSOR_ID(id)] = { \ - SENSOR_BASIC_INFO(id) \ - .chip = s_chip, \ - .type = s_type, \ - .drv = &s_drv, \ - .min_frequency = s_min_freq, \ - .max_frequency = s_max_freq \ - }, +#define DO_MK_SENSOR_ENTRY(id, s_chip, s_type, s_drv, s_min_freq, s_max_freq) \ + [SENSOR_ID(id)] = { SENSOR_BASIC_INFO(id).chip = s_chip, \ + .type = s_type, .drv = &s_drv, \ + .min_frequency = s_min_freq, \ + .max_frequency = s_max_freq }, /* Construct an entry iff the alternate_for property is missing. */ #define MK_SENSOR_ENTRY(inst, s_compat, s_chip, s_type, s_drv, s_min_freq, \ @@ -289,9 +280,9 @@ DT_FOREACH_CHILD(SENSOR_ROT_REF_NODE, DECLARE_SENSOR_ROT_REF) * MOTIONSENSE_TYPE_LIGHT_RGB, tcs3400_rgb_drv, 0, 0) * ----------------------------------------------- */ -#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, \ - s_min_freq, s_max_freq) \ - LISTIFY(DT_NUM_INST_STATUS_OKAY(s_compat), MK_SENSOR_ENTRY, (),\ +#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, s_min_freq, \ + s_max_freq) \ + LISTIFY(DT_NUM_INST_STATUS_OKAY(s_compat), MK_SENSOR_ENTRY, (), \ s_compat, s_chip, s_type, s_drv, s_min_freq, s_max_freq) /* @@ -309,10 +300,10 @@ struct motion_sensor_t motion_sensors[] = { * of alternate sensors that will be used at runtime. */ #undef CREATE_MOTION_SENSOR -#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, s_min_freq, \ - s_max_freq) \ - LISTIFY(DT_NUM_INST_STATUS_OKAY(s_compat), MK_SENSOR_ALT_ENTRY, (),\ - s_compat, s_chip, s_type, s_drv, s_min_freq, s_max_freq) +#define CREATE_MOTION_SENSOR(s_compat, s_chip, s_type, s_drv, s_min_freq, \ + s_max_freq) \ + LISTIFY(DT_NUM_INST_STATUS_OKAY(s_compat), MK_SENSOR_ALT_ENTRY, (), \ + s_compat, s_chip, s_type, s_drv, s_min_freq, s_max_freq) /* * The list of alternate motion sensors that may be used at runtime to replace @@ -356,12 +347,11 @@ const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); * }; */ #if DT_NODE_HAS_PROP(SENSOR_INFO_NODE, als_sensors) -#define ALS_SENSOR_ENTRY_WITH_COMMA(i, id) \ +#define ALS_SENSOR_ENTRY_WITH_COMMA(i, id) \ &motion_sensors[SENSOR_ID(DT_PHANDLE_BY_IDX(id, als_sensors, i))], -const struct motion_sensor_t *motion_als_sensors[] = { - LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, als_sensors), - ALS_SENSOR_ENTRY_WITH_COMMA, (), SENSOR_INFO_NODE) -}; +const struct motion_sensor_t *motion_als_sensors[] = { LISTIFY( + DT_PROP_LEN(SENSOR_INFO_NODE, als_sensors), ALS_SENSOR_ENTRY_WITH_COMMA, + (), SENSOR_INFO_NODE) }; BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); #endif @@ -378,28 +368,27 @@ BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); * }; */ #if DT_NODE_HAS_PROP(SENSOR_INFO_NODE, sensor_irqs) -#define SENSOR_GPIO_ENABLE_INTERRUPT(i, id) \ - gpio_enable_dt_interrupt( \ +#define SENSOR_GPIO_ENABLE_INTERRUPT(i, id) \ + gpio_enable_dt_interrupt( \ GPIO_INT_FROM_NODE(DT_PHANDLE_BY_IDX(id, sensor_irqs, i))); -static void sensor_enable_irqs(void) -{ +static void sensor_enable_irqs(void){ LISTIFY(DT_PROP_LEN(SENSOR_INFO_NODE, sensor_irqs), - SENSOR_GPIO_ENABLE_INTERRUPT, (), SENSOR_INFO_NODE) -} -DECLARE_HOOK(HOOK_INIT, sensor_enable_irqs, HOOK_PRIO_DEFAULT); + SENSOR_GPIO_ENABLE_INTERRUPT, (), SENSOR_INFO_NODE) +} DECLARE_HOOK(HOOK_INIT, sensor_enable_irqs, HOOK_PRIO_DEFAULT); #endif /* Handle the alternative motion sensors */ -#define CHECK_SSFC_AND_ENABLE_ALT_SENSOR(id) \ - do { \ - if (cros_cbi_ssfc_check_match(CBI_SSFC_VALUE_ID( \ - DT_PHANDLE(id, alternate_ssfc_indicator)))) { \ - LOG_INF("Replacing \"%s\" for \"%s\" based on SSFC", \ - motion_sensors[SENSOR_ID(DT_PHANDLE(id, \ - alternate_for))].name, \ - motion_sensors_alt[SENSOR_ID(id)].name); \ - ENABLE_ALT_MOTION_SENSOR(id); \ - } \ +#define CHECK_SSFC_AND_ENABLE_ALT_SENSOR(id) \ + do { \ + if (cros_cbi_ssfc_check_match(CBI_SSFC_VALUE_ID( \ + DT_PHANDLE(id, alternate_ssfc_indicator)))) { \ + LOG_INF("Replacing \"%s\" for \"%s\" based on SSFC", \ + motion_sensors[SENSOR_ID(DT_PHANDLE( \ + id, alternate_for))] \ + .name, \ + motion_sensors_alt[SENSOR_ID(id)].name); \ + ENABLE_ALT_MOTION_SENSOR(id); \ + } \ } while (0) #define ALT_SENSOR_CHECK_SSFC_ID(id) \ @@ -428,8 +417,7 @@ int motion_sense_probe(enum sensor_alt_id alt_idx) return res; } -void motion_sensors_check_ssfc(void) -{ +void motion_sensors_check_ssfc(void){ DT_FOREACH_CHILD(SENSOR_ALT_NODE, ALT_SENSOR_CHECK_SSFC_ID) } #endif /* DT_NODE_EXISTS(SENSOR_ALT_NODE) */ @@ -440,13 +428,13 @@ void motion_sensors_check_ssfc(void) #define DEF_MOTION_ISR_NAME(id) \ DEF_MOTION_ISR_NAME_ENUM_WITH_SUFFIX(DEF_MOTION_ISR_NAME_ENUM(id)) -#define DEF_MOTION_ISR(id) \ -void DEF_MOTION_ISR_NAME(id)(enum gpio_signal signal) \ -{ \ - __ASSERT(motion_sensors[SENSOR_ID(id)].drv->interrupt, \ - "No interrupt handler for signal: %x", signal); \ - motion_sensors[SENSOR_ID(id)].drv->interrupt(signal); \ -} +#define DEF_MOTION_ISR(id) \ + void DEF_MOTION_ISR_NAME(id)(enum gpio_signal signal) \ + { \ + __ASSERT(motion_sensors[SENSOR_ID(id)].drv->interrupt, \ + "No interrupt handler for signal: %x", signal); \ + motion_sensors[SENSOR_ID(id)].drv->interrupt(signal); \ + } #define DEF_MOTION_CHECK_ISR(id) \ COND_CODE_1(DT_NODE_HAS_PROP(id, int_signal), (DEF_MOTION_ISR(id)), ()) diff --git a/zephyr/shim/src/panic.c b/zephyr/shim/src/panic.c index 0685f52ede..20f0e9977e 100644 --- a/zephyr/shim/src/panic.c +++ b/zephyr/shim/src/panic.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ #include <zephyr/fatal.h> #include <zephyr/logging/log.h> #include <zephyr/logging/log_ctrl.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "common.h" #include "panic.h" @@ -27,15 +27,37 @@ #if defined(CONFIG_ARM) #define PANIC_ARCH PANIC_ARCH_CORTEX_M -#define PANIC_REG_LIST(M) \ - M(basic.r0, cm.frame[0], a1) \ - M(basic.r1, cm.frame[1], a2) \ - M(basic.r2, cm.frame[2], a3) \ - M(basic.r3, cm.frame[3], a4) \ - M(basic.r12, cm.frame[4], ip) \ - M(basic.lr, cm.frame[5], lr) \ - M(basic.pc, cm.frame[6], pc) \ - M(basic.xpsr, cm.frame[7], xpsr) +#if defined(CONFIG_EXTRA_EXCEPTION_INFO) +#define EXTRA_PANIC_REG_LIST(M) \ + M(extra_info.callee->v1, cm.regs[CORTEX_PANIC_REGISTER_R4], v1) \ + M(extra_info.callee->v2, cm.regs[CORTEX_PANIC_REGISTER_R5], v2) \ + M(extra_info.callee->v3, cm.regs[CORTEX_PANIC_REGISTER_R6], v3) \ + M(extra_info.callee->v4, cm.regs[CORTEX_PANIC_REGISTER_R7], v4) \ + M(extra_info.callee->v5, cm.regs[CORTEX_PANIC_REGISTER_R8], v5) \ + M(extra_info.callee->v6, cm.regs[CORTEX_PANIC_REGISTER_R9], v6) \ + M(extra_info.callee->v7, cm.regs[CORTEX_PANIC_REGISTER_R10], v7) \ + M(extra_info.callee->v8, cm.regs[CORTEX_PANIC_REGISTER_R11], v8) \ + M(extra_info.callee->psp, cm.regs[CORTEX_PANIC_REGISTER_PSP], psp) \ + M(extra_info.exc_return, cm.regs[CORTEX_PANIC_REGISTER_LR], exc_rtn) \ + M(extra_info.msp, cm.regs[CORTEX_PANIC_REGISTER_MSP], msp) +/* + * IPSR is not copied. IPSR is a subset of xPSR, which is already + * captured in PANIC_REG_LIST. + */ +#else +#define EXTRA_PANIC_REG_LIST(M) +#endif +/* TODO(b/245423691): Copy other status registers (e.g. CFSR) when available. */ +#define PANIC_REG_LIST(M) \ + M(basic.r0, cm.frame[0], a1) \ + M(basic.r1, cm.frame[1], a2) \ + M(basic.r2, cm.frame[2], a3) \ + M(basic.r3, cm.frame[3], a4) \ + M(basic.r12, cm.frame[4], ip) \ + M(basic.lr, cm.frame[5], lr) \ + M(basic.pc, cm.frame[6], pc) \ + M(basic.xpsr, cm.frame[7], xpsr) \ + EXTRA_PANIC_REG_LIST(M) #define PANIC_REG_EXCEPTION(pdata) pdata->cm.regs[1] #define PANIC_REG_REASON(pdata) pdata->cm.regs[3] #define PANIC_REG_INFO(pdata) pdata->cm.regs[4] @@ -48,13 +70,13 @@ */ #define PANIC_ARCH PANIC_ARCH_RISCV_RV32I #define PANIC_REG_LIST(M) \ - M(ra, riscv.regs[29], ra) \ - M(a0, riscv.regs[26], a0) \ - M(a1, riscv.regs[25], a1) \ - M(a2, riscv.regs[24], a2) \ - M(a3, riscv.regs[23], a3) \ - M(a4, riscv.regs[22], a4) \ - M(a5, riscv.regs[21], a5) \ + M(ra, riscv.regs[29], ra) \ + M(a0, riscv.regs[26], a0) \ + M(a1, riscv.regs[25], a1) \ + M(a2, riscv.regs[24], a2) \ + M(a3, riscv.regs[23], a3) \ + M(a4, riscv.regs[22], a4) \ + M(a5, riscv.regs[21], a5) \ M(a6, riscv.regs[20], a6) \ M(a7, riscv.regs[19], a7) \ M(t0, riscv.regs[18], t0) \ @@ -99,8 +121,9 @@ static void copy_esf_to_panic_data(const z_arch_esf_t *esf, { pdata->arch = PANIC_ARCH; pdata->struct_version = 2; - pdata->flags = (PANIC_ARCH == PANIC_ARCH_CORTEX_M) - ? PANIC_DATA_FLAG_FRAME_VALID : 0; + pdata->flags = (PANIC_ARCH == PANIC_ARCH_CORTEX_M) ? + PANIC_DATA_FLAG_FRAME_VALID : + 0; pdata->reserved = 0; pdata->struct_size = sizeof(*pdata); pdata->magic = PANIC_DATA_MAGIC; @@ -137,7 +160,7 @@ void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *esf) #ifdef CONFIG_PLATFORM_EC_SOFTWARE_PANIC void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception) { - struct panic_data * const pdata = get_panic_data_write(); + struct panic_data *const pdata = get_panic_data_write(); /* Setup panic data structure */ memset(pdata, 0, CONFIG_PANIC_DATA_SIZE); @@ -157,7 +180,7 @@ void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception) void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception) { - struct panic_data * const pdata = panic_get_data(); + struct panic_data *const pdata = panic_get_data(); if (pdata && pdata->struct_version == 2) { *exception = PANIC_REG_EXCEPTION(pdata); diff --git a/zephyr/shim/src/power.c b/zephyr/shim/src/power.c index 49f820e567..007c40ab71 100644 --- a/zephyr/shim/src/power.c +++ b/zephyr/shim/src/power.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,11 +11,8 @@ #if (SYSTEM_DT_POWER_SIGNAL_CONFIG) -const struct power_signal_info power_signal_list[] = { - DT_FOREACH_CHILD( - POWER_SIGNAL_LIST_NODE, - GEN_POWER_SIGNAL_STRUCT) -}; +const struct power_signal_info power_signal_list[] = { DT_FOREACH_CHILD( + POWER_SIGNAL_LIST_NODE, GEN_POWER_SIGNAL_STRUCT) }; BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); #endif /* SYSTEM_DT_POWER_SIGNAL_CONFIG */ diff --git a/zephyr/shim/src/power_host_sleep_api.c b/zephyr/shim/src/power_host_sleep_api.c index 1d283e1c3c..99d535bdff 100644 --- a/zephyr/shim/src/power_host_sleep_api.c +++ b/zephyr/shim/src/power_host_sleep_api.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,8 +7,8 @@ #include <ap_power/ap_power_interface.h> #include <power_host_sleep.h> -static enum power_state translate_ap_power_state( - enum power_states_ndsx ap_power_state) +static enum power_state +translate_ap_power_state(enum power_states_ndsx ap_power_state) { switch (ap_power_state) { case SYS_POWER_STATE_S5: @@ -24,8 +24,8 @@ static enum power_state translate_ap_power_state( } } -int ap_power_get_lazy_wake_mask( - enum power_states_ndsx state, host_event_t *mask) +int ap_power_get_lazy_wake_mask(enum power_states_ndsx state, + host_event_t *mask) { enum power_state st; @@ -36,9 +36,8 @@ int ap_power_get_lazy_wake_mask( } #if CONFIG_AP_PWRSEQ_HOST_SLEEP -void power_chipset_handle_host_sleep_event( - enum host_sleep_event state, - struct host_sleep_event_context *ctx) +void power_chipset_handle_host_sleep_event(enum host_sleep_event state, + struct host_sleep_event_context *ctx) { ap_power_chipset_handle_host_sleep_event(state, ctx); } diff --git a/zephyr/shim/src/ppc.c b/zephyr/shim/src/ppc.c index c1bf3cb0fd..87161407ae 100644 --- a/zephyr/shim/src/ppc.c +++ b/zephyr/shim/src/ppc.c @@ -1,50 +1,52 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/devicetree.h> #include "usbc_ppc.h" +#include "usbc/ppc_aoz1380.h" +#include "usbc/ppc_nx20p348x.h" #include "usbc/ppc_rt1739.h" #include "usbc/ppc_sn5s330.h" #include "usbc/ppc_syv682x.h" #include "usbc/ppc.h" -#if DT_HAS_COMPAT_STATUS_OKAY(RT1739_PPC_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(SN5S330_COMPAT) || \ +#if DT_HAS_COMPAT_STATUS_OKAY(AOZ1380_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(NX20P348X_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(RT1739_PPC_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(SN5S330_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(SYV682X_COMPAT) -#define PPC_CHIP_PRIM(id, fn) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), (), \ - (PPC_CHIP_ELE_PRIM(id, fn))) +#define PPC_CHIP_ENTRY(usbc_id, ppc_id, config_fn) \ + [USBC_PORT_NEW(usbc_id)] = config_fn(ppc_id) -#define PPC_CHIP_ALT(id, fn) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), \ - (PPC_CHIP_ELE_ALT(id, fn)), ()) +#define CHECK_COMPAT(compat, usbc_id, ppc_id, config_fn) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(ppc_id, compat), \ + (PPC_CHIP_ENTRY(usbc_id, ppc_id, config_fn)), ()) -#define PPC_CHIP_ELE_PRIM(id, fn) [USBC_PORT(id)] = fn(id) +#define PPC_CHIP_FIND(usbc_id, ppc_id) \ + CHECK_COMPAT(AOZ1380_COMPAT, usbc_id, ppc_id, PPC_CHIP_AOZ1380) \ + CHECK_COMPAT(NX20P348X_COMPAT, usbc_id, ppc_id, PPC_CHIP_NX20P348X) \ + CHECK_COMPAT(RT1739_PPC_COMPAT, usbc_id, ppc_id, PPC_CHIP_RT1739) \ + CHECK_COMPAT(SN5S330_COMPAT, usbc_id, ppc_id, PPC_CHIP_SN5S330) \ + CHECK_COMPAT(SYV682X_COMPAT, usbc_id, ppc_id, PPC_CHIP_SYV682X) -#define PPC_CHIP_ELE_ALT(id, fn) [PPC_ID(id)] = fn(id) +#define PPC_CHIP(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, ppc), \ + (PPC_CHIP_FIND(usbc_id, DT_PHANDLE(usbc_id, ppc))), ()) + +#define PPC_CHIP_ALT(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, ppc_alt), \ + (PPC_CHIP_FIND(usbc_id, DT_PHANDLE(usbc_id, ppc_alt))), \ + ()) + +struct ppc_config_t ppc_chips[] = { DT_FOREACH_STATUS_OKAY(named_usbc_port, + PPC_CHIP) }; -/* Power Path Controller */ -struct ppc_config_t ppc_chips[] = { - DT_FOREACH_STATUS_OKAY_VARGS(RT1739_PPC_COMPAT, PPC_CHIP_PRIM, - PPC_CHIP_RT1739) - DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_PRIM, - PPC_CHIP_SN5S330) - DT_FOREACH_STATUS_OKAY_VARGS(SYV682X_COMPAT, PPC_CHIP_PRIM, - PPC_CHIP_SYV682X) -}; unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); -/* Alt Power Path Controllers */ -struct ppc_config_t ppc_chips_alt[] = { - DT_FOREACH_STATUS_OKAY_VARGS(RT1739_PPC_COMPAT, PPC_CHIP_ALT, - PPC_CHIP_RT1739) - DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_ALT, - PPC_CHIP_SN5S330) - DT_FOREACH_STATUS_OKAY_VARGS(SYV682X_COMPAT, PPC_CHIP_ALT, - PPC_CHIP_SYV682X) -}; +struct ppc_config_t ppc_chips_alt[] = { DT_FOREACH_STATUS_OKAY(named_usbc_port, + PPC_CHIP_ALT) }; #endif /* #if DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/shim/src/pwm_hc.c b/zephyr/shim/src/pwm_hc.c index 00c8ddf69b..3b1a98f651 100644 --- a/zephyr/shim/src/pwm_hc.c +++ b/zephyr/shim/src/pwm_hc.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,17 +19,15 @@ LOG_MODULE_REGISTER(pwm_shim, LOG_LEVEL_ERR); -#define PWM_RAW_TO_PERCENT(v) \ - DIV_ROUND_NEAREST((uint32_t)(v) * 100, UINT16_MAX) -#define PWM_PERCENT_TO_RAW(v) ((uint32_t)(v) * UINT16_MAX / 100) +#define PWM_RAW_TO_PERCENT(v) DIV_ROUND_NEAREST((uint32_t)(v)*100, UINT16_MAX) +#define PWM_PERCENT_TO_RAW(v) ((uint32_t)(v)*UINT16_MAX / 100) -#define HAS_PWM_GENERIC_CHANNEL(compat) \ +#define HAS_PWM_GENERIC_CHANNEL(compat) \ DT_NODE_HAS_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), \ generic_pwm_channel) #define PWM_GENERIC_CHANNEL_ID(compat) \ - DT_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), \ - generic_pwm_channel) + DT_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(compat), generic_pwm_channel) #ifdef CONFIG_PWM_KBLIGHT static bool pwm_is_kblight(int type, int index) @@ -63,9 +61,8 @@ static bool pwm_is_displight(int type, int index) } #endif /* CONFIG_PLATFORM_EC_PWM_DISPLIGHT */ - -static enum ec_status host_command_pwm_set_duty( - struct host_cmd_handler_args *args) +static enum ec_status +host_command_pwm_set_duty(struct host_cmd_handler_args *args) { __maybe_unused const struct ec_params_pwm_set_duty *p = args->params; @@ -85,12 +82,11 @@ static enum ec_status host_command_pwm_set_duty( return EC_RES_INVALID_PARAM; } -DECLARE_HOST_COMMAND(EC_CMD_PWM_SET_DUTY, - host_command_pwm_set_duty, +DECLARE_HOST_COMMAND(EC_CMD_PWM_SET_DUTY, host_command_pwm_set_duty, EC_VER_MASK(0)); -static enum ec_status host_command_pwm_get_duty( - struct host_cmd_handler_args *args) +static enum ec_status +host_command_pwm_get_duty(struct host_cmd_handler_args *args) { __maybe_unused const struct ec_params_pwm_get_duty *p = args->params; __maybe_unused struct ec_response_pwm_get_duty *r = args->response; @@ -112,6 +108,5 @@ static enum ec_status host_command_pwm_get_duty( return EC_RES_INVALID_PARAM; } -DECLARE_HOST_COMMAND(EC_CMD_PWM_GET_DUTY, - host_command_pwm_get_duty, +DECLARE_HOST_COMMAND(EC_CMD_PWM_GET_DUTY, host_command_pwm_get_duty, EC_VER_MASK(0)); diff --git a/zephyr/shim/src/pwm_led.c b/zephyr/shim/src/pwm_led.c index 09fbd009b4..498c543ffb 100644 --- a/zephyr/shim/src/pwm_led.c +++ b/zephyr/shim/src/pwm_led.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,111 +22,112 @@ LOG_MODULE_REGISTER(pwm_led, LOG_LEVEL_ERR); BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) <= 1, "Multiple CrOS EC PWM LED instances defined"); -BUILD_ASSERT(DT_INST_PROP_LEN(0, leds) <= 2, + +#define PWM_LEDS_LEN DT_INST_PROP_LEN(0, leds) +BUILD_ASSERT((PWM_LEDS_LEN > 0) && (PWM_LEDS_LEN <= 2), "Unsupported number of LEDs defined"); -#define PWM_LED_PERIOD_NS (NSEC_PER_SEC/DT_INST_PROP(0, frequency)) -#define PWM_SIDESEL_PERIOD_NS (PWM_LED_PERIOD_NS * 2) +#define PWM_LED_0_0_PERIOD \ + DT_PWMS_PERIOD_BY_IDX(DT_INST_PHANDLE_BY_IDX(0, leds, 0), 0) +#define PWM_LED_PERIOD_BUILD_ASSERT(node_id, prop, idx, ...) \ + BUILD_ASSERT(PWM_LED_0_0_PERIOD == \ + DT_PWMS_PERIOD_BY_IDX(node_id, idx), \ + "PWM LED period mismatch"); +#define PWM_LEDS_BUILD_ASSERT(node_id, prop, idx) \ + DT_FOREACH_PROP_ELEM_VARGS(DT_PHANDLE_BY_IDX(node_id, prop, idx), \ + pwms, PWM_LED_PERIOD_BUILD_ASSERT) + +DT_INST_FOREACH_PROP_ELEM(0, leds, PWM_LEDS_BUILD_ASSERT) #define PWM_LED_NAME(node_id) DT_STRING_UPPER_TOKEN(node_id, ec_led_name) -#define PWM_LED_NAME_WITH_COMMA(node_id) PWM_LED_NAME(node_id), -const enum ec_led_id supported_led_ids[] = { - DT_INST_FOREACH_CHILD(0, PWM_LED_NAME_WITH_COMMA) -}; +const enum ec_led_id supported_led_ids[] = { DT_INST_FOREACH_CHILD_SEP( + 0, PWM_LED_NAME, (, )) }; const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); BUILD_ASSERT(ARRAY_SIZE(supported_led_ids) == DT_INST_PROP_LEN(0, leds), "Mismatch count of LED device phandles and LED name map entries."); -static void pwm_led_set_duty(const struct pwm_led_dt_channel *ch, int percent) +static void pwm_led_set_duty(const struct pwm_dt_spec *pwm, int percent) { uint32_t pulse_ns; int rv; - if (!device_is_ready(ch->dev)) { - LOG_ERR("PWM device %s not ready", ch->dev->name); + if (!device_is_ready(pwm->dev)) { + LOG_ERR("PWM device %s not ready", pwm->dev->name); return; } - pulse_ns = DIV_ROUND_NEAREST(ch->period_ns * percent, 100); + pulse_ns = DIV_ROUND_NEAREST(pwm->period * percent, 100); - LOG_DBG("LED PWM %s set percent (%d), pulse %d", ch->dev->name, percent, - pulse_ns); + LOG_DBG("LED PWM %s set percent (%d), pulse %d", pwm->dev->name, + percent, pulse_ns); - rv = pwm_set(ch->dev, ch->channel, ch->period_ns, pulse_ns, ch->flags); + rv = pwm_set_pulse_dt(pwm, pulse_ns); if (rv) { - LOG_ERR("pwm_set() failed %s (%d)", ch->dev->name, rv); + LOG_ERR("pwm_set_pulse_dt() failed %s (%d)", pwm->dev->name, + rv); } } -#define PWM_CHANNEL_DT_BY_IDX_INIT(node_id, led_ch, _period_ns) \ - { \ - .dev = DEVICE_DT_GET(DT_PWMS_CTLR_BY_IDX(node_id, led_ch)), \ - .channel = DT_PWMS_CHANNEL_BY_IDX(node_id, led_ch), \ - .flags = DT_PWMS_FLAGS_BY_IDX(node_id, led_ch), \ - .period_ns = _period_ns, \ - } - -#define PWM_CHANNEL_DT_BY_IDX(node_id, prop, idx, led_ch) \ - static const struct pwm_led_dt_channel _pwm_led_dt_##idx##_ch_##led_ch = \ - PWM_CHANNEL_DT_BY_IDX_INIT( \ - DT_PHANDLE_BY_IDX(node_id, prop, idx), led_ch, \ - PWM_LED_PERIOD_NS); +#define PWM_CHANNEL_DT_BY_IDX(node_id, prop, idx, led_ch) \ + static const struct pwm_dt_spec _pwm_dt_spec_##idx##_ch_##led_ch = \ + PWM_DT_SPEC_GET_BY_IDX(DT_PHANDLE_BY_IDX(node_id, prop, idx), \ + led_ch); -#define PWM_CHANNEL_DT_BY_IDX_COND(node_id, prop, idx, led_ch) \ - IF_ENABLED(DT_PROP_HAS_IDX( \ - DT_PHANDLE_BY_IDX(node_id, prop, idx), pwms, led_ch), \ - (PWM_CHANNEL_DT_BY_IDX(node_id, prop, idx, led_ch)) \ - ) +#define PWM_CHANNEL_DT_BY_IDX_COND(node_id, prop, idx, led_ch) \ + IF_ENABLED(DT_PROP_HAS_IDX(DT_PHANDLE_BY_IDX(node_id, prop, idx), \ + pwms, led_ch), \ + (PWM_CHANNEL_DT_BY_IDX(node_id, prop, idx, led_ch))) -#define PWM_LED_DT_INIT(node_id, prop, idx) \ +#define PWM_LED_DT_INIT(node_id, prop, idx) \ PWM_CHANNEL_DT_BY_IDX_COND(node_id, prop, idx, 0) \ PWM_CHANNEL_DT_BY_IDX_COND(node_id, prop, idx, 1) \ PWM_CHANNEL_DT_BY_IDX_COND(node_id, prop, idx, 2) DT_INST_FOREACH_PROP_ELEM(0, leds, PWM_LED_DT_INIT) -#define PWM_CHANNEL_BY_IDX_COND(node_id, prop, idx, led_ch) \ - COND_CODE_1(DT_PROP_HAS_IDX( \ - DT_PHANDLE_BY_IDX(node_id, prop, idx), pwms, led_ch), \ - (&_pwm_led_dt_##idx##_ch_##led_ch), \ - (PWM_LED_NO_CHANNEL)) +#define PWM_CHANNEL_BY_IDX_COND(node_id, prop, idx, led_ch) \ + COND_CODE_1(DT_PROP_HAS_IDX(DT_PHANDLE_BY_IDX(node_id, prop, idx), \ + pwms, led_ch), \ + (&_pwm_dt_spec_##idx##_ch_##led_ch), (PWM_LED_NO_CHANNEL)) -#define PWM_LED_INIT(node_id, prop, idx) \ - [PWM_LED##idx] = { \ +#define PWM_LED_INIT(node_id, prop, idx) \ + [PWM_LED##idx] = { \ .ch0 = PWM_CHANNEL_BY_IDX_COND(node_id, prop, idx, 0), \ .ch1 = PWM_CHANNEL_BY_IDX_COND(node_id, prop, idx, 1), \ .ch2 = PWM_CHANNEL_BY_IDX_COND(node_id, prop, idx, 2), \ - .set_duty = &pwm_led_set_duty, \ + .set_duty = &pwm_led_set_duty, \ }, -struct pwm_led pwm_leds[] = { - DT_INST_FOREACH_PROP_ELEM(0, leds, PWM_LED_INIT) -}; +struct pwm_led pwm_leds[] = { DT_INST_FOREACH_PROP_ELEM(0, leds, + PWM_LED_INIT) }; -#define EC_LED_COLOR_BLANK {0} +#define EC_LED_COLOR_BLANK \ + { \ + 0 \ + } struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { - [EC_LED_COLOR_RED] = DT_INST_PROP_OR(0, color_map_red, - EC_LED_COLOR_BLANK), - [EC_LED_COLOR_GREEN] = DT_INST_PROP_OR(0, color_map_green, - EC_LED_COLOR_BLANK), - [EC_LED_COLOR_BLUE] = DT_INST_PROP_OR(0, color_map_blue, - EC_LED_COLOR_BLANK), - [EC_LED_COLOR_YELLOW] = DT_INST_PROP_OR(0, color_map_yellow, - EC_LED_COLOR_BLANK), - [EC_LED_COLOR_WHITE] = DT_INST_PROP_OR(0, color_map_white, - EC_LED_COLOR_BLANK), - [EC_LED_COLOR_AMBER] = DT_INST_PROP_OR(0, color_map_amber, - EC_LED_COLOR_BLANK), + [EC_LED_COLOR_RED] = + DT_INST_PROP_OR(0, color_map_red, EC_LED_COLOR_BLANK), + [EC_LED_COLOR_GREEN] = + DT_INST_PROP_OR(0, color_map_green, EC_LED_COLOR_BLANK), + [EC_LED_COLOR_BLUE] = + DT_INST_PROP_OR(0, color_map_blue, EC_LED_COLOR_BLANK), + [EC_LED_COLOR_YELLOW] = + DT_INST_PROP_OR(0, color_map_yellow, EC_LED_COLOR_BLANK), + [EC_LED_COLOR_WHITE] = + DT_INST_PROP_OR(0, color_map_white, EC_LED_COLOR_BLANK), + [EC_LED_COLOR_AMBER] = + DT_INST_PROP_OR(0, color_map_amber, EC_LED_COLOR_BLANK), }; BUILD_ASSERT(DT_INST_PROP_LEN(0, brightness_range) == EC_LED_COLOR_COUNT, "brightness_range must have exactly EC_LED_COLOR_COUNT values"); -static const uint8_t dt_brigthness_range[EC_LED_COLOR_COUNT] = DT_INST_PROP( - 0, brightness_range); +static const uint8_t dt_brigthness_range[EC_LED_COLOR_COUNT] = + DT_INST_PROP(0, brightness_range); void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { @@ -135,8 +136,8 @@ void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) sizeof(dt_brigthness_range)); } -#define PWM_NAME_TO_ID(node_id) \ - case PWM_LED_NAME(node_id): \ +#define PWM_NAME_TO_ID(node_id) \ + case PWM_LED_NAME(node_id): \ pwm_id = DT_REG_ADDR(node_id); \ break; @@ -145,7 +146,7 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) enum pwm_led_id pwm_id; switch (led_id) { - DT_INST_FOREACH_CHILD(0, PWM_NAME_TO_ID) + DT_INST_FOREACH_CHILD(0, PWM_NAME_TO_ID) default: return EC_ERROR_UNKNOWN; } @@ -154,19 +155,19 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) brightness[EC_LED_COLOR_RED]) { set_pwm_led_color(pwm_id, EC_LED_COLOR_RED); } else if (DT_INST_NODE_HAS_PROP(0, color_map_green) && - brightness[EC_LED_COLOR_GREEN]) { + brightness[EC_LED_COLOR_GREEN]) { set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN); } else if (DT_INST_NODE_HAS_PROP(0, color_map_blue) && - brightness[EC_LED_COLOR_BLUE]) { + brightness[EC_LED_COLOR_BLUE]) { set_pwm_led_color(pwm_id, EC_LED_COLOR_BLUE); } else if (DT_INST_NODE_HAS_PROP(0, color_map_yellow) && - brightness[EC_LED_COLOR_YELLOW]) { + brightness[EC_LED_COLOR_YELLOW]) { set_pwm_led_color(pwm_id, EC_LED_COLOR_YELLOW); } else if (DT_INST_NODE_HAS_PROP(0, color_map_white) && - brightness[EC_LED_COLOR_WHITE]) { + brightness[EC_LED_COLOR_WHITE]) { set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); } else if (DT_INST_NODE_HAS_PROP(0, color_map_amber) && - brightness[EC_LED_COLOR_AMBER]) { + brightness[EC_LED_COLOR_AMBER]) { set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); } else { /* Otherwise, the "color" is "off". */ @@ -178,9 +179,12 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) #if DT_INST_NODE_HAS_PROP(0, sidesel) -static const struct pwm_led_dt_channel _pwm_led_dt_sidesel = - PWM_CHANNEL_DT_BY_IDX_INIT(DT_INST_PROP(0, sidesel), 0, - PWM_SIDESEL_PERIOD_NS); +BUILD_ASSERT((PWM_LED_0_0_PERIOD * 2) == + DT_PWMS_PERIOD(DT_INST_PROP(0, sidesel)), + "Sidesel PWM period not properly set"); + +static const struct pwm_dt_spec _pwm_dt_spec_sidesel = + PWM_DT_SPEC_GET_BY_IDX(DT_INST_PROP(0, sidesel), 0); /* Illuminates the LED on the side of the active charging port. If not charging, * illuminates both LEDs. @@ -203,14 +207,14 @@ static void led_set_charge_port_tick(void) } if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) - pwm_led_set_duty(&_pwm_led_dt_sidesel, side_select_duty); + pwm_led_set_duty(&_pwm_dt_spec_sidesel, side_select_duty); } DECLARE_HOOK(HOOK_TICK, led_set_charge_port_tick, HOOK_PRIO_DEFAULT); static void board_led_init(void) { /* Illuminate motherboard and daughter board LEDs equally to start. */ - pwm_led_set_duty(&_pwm_led_dt_sidesel, 50); + pwm_led_set_duty(&_pwm_dt_spec_sidesel, 50); } DECLARE_HOOK(HOOK_INIT, board_led_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/shim/src/rtc.c b/zephyr/shim/src/rtc.c index 9627089f2e..c8a0511c95 100644 --- a/zephyr/shim/src/rtc.c +++ b/zephyr/shim/src/rtc.c @@ -1,16 +1,16 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/logging/log.h> #include <zephyr/kernel.h> -#include <zephyr/zephyr.h> #include "console.h" #include "drivers/cros_rtc.h" #include "hooks.h" #include "host_command.h" +#include "system.h" #include "util.h" LOG_MODULE_REGISTER(shim_cros_rtc, LOG_LEVEL_ERR); @@ -135,7 +135,7 @@ void print_system_rtc(enum console_channel ch) * chip-specific code. We should factor out the common parts. */ #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC -static int command_system_rtc(int argc, char **argv) +static int command_system_rtc(int argc, const char **argv) { if (argc == 3 && !strcasecmp(argv[1], "set")) { char *e; @@ -160,7 +160,7 @@ DECLARE_CONSOLE_COMMAND(rtc, command_system_rtc, "[set <seconds>]", /** * Test the RTC alarm by setting an interrupt on RTC match. */ -static int command_rtc_alarm_test(int argc, char **argv) +static int command_rtc_alarm_test(int argc, const char **argv) { int s = 1, us = 0; char *e; diff --git a/zephyr/shim/src/switchcap_gpio.c b/zephyr/shim/src/switchcap_gpio.c index 18f8344943..91d9de942f 100644 --- a/zephyr/shim/src/switchcap_gpio.c +++ b/zephyr/shim/src/switchcap_gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,19 +17,24 @@ #define SC_PIN_ENABLE_PHANDLE \ DT_PHANDLE_BY_IDX(DT_PATH(switchcap), enable_pin, 0) -#define SC_PIN_ENABLE \ - GPIO_DT_FROM_NODE(SC_PIN_ENABLE_PHANDLE) +#define SC_PIN_ENABLE GPIO_DT_FROM_NODE(SC_PIN_ENABLE_PHANDLE) #define SC_PIN_POWER_GOOD_PHANDLE \ DT_PHANDLE_BY_IDX(DT_PATH(switchcap), power_good_pin, 0) -#define SC_PIN_POWER_GOOD_EXISTS \ - DT_NODE_EXISTS(SC_PIN_POWER_GOOD_PHANDLE) -#define SC_PIN_POWER_GOOD \ - GPIO_DT_FROM_NODE(SC_PIN_POWER_GOOD_PHANDLE) +#define SC_PIN_POWER_GOOD_EXISTS DT_NODE_EXISTS(SC_PIN_POWER_GOOD_PHANDLE) +#define SC_PIN_POWER_GOOD GPIO_DT_FROM_NODE(SC_PIN_POWER_GOOD_PHANDLE) + +#if DT_NODE_HAS_PROP(DT_PATH(switchcap), poff_delay_ms) +static const int32_t poff_delay_ms = DT_PROP(DT_PATH(switchcap), poff_delay_ms); +#else +static const int32_t poff_delay_ms; +#endif void board_set_switchcap_power(int enable) { gpio_pin_set_dt(SC_PIN_ENABLE, enable); + if (!enable && poff_delay_ms > 0) + k_msleep(poff_delay_ms); } int board_is_switchcap_enabled(void) diff --git a/zephyr/shim/src/switchcap_ln9310.c b/zephyr/shim/src/switchcap_ln9310.c index bd8612fb2e..ae62617895 100644 --- a/zephyr/shim/src/switchcap_ln9310.c +++ b/zephyr/shim/src/switchcap_ln9310.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -18,11 +18,9 @@ #define SC_PIN_ENABLE_PHANDLE \ DT_PHANDLE_BY_IDX(DT_PATH(switchcap), enable_pin, 0) -#define SC_PIN_ENABLE \ - GPIO_DT_FROM_NODE(SC_PIN_ENABLE_PHANDLE) +#define SC_PIN_ENABLE GPIO_DT_FROM_NODE(SC_PIN_ENABLE_PHANDLE) -#define SC_PORT_PHANDLE \ - DT_PHANDLE(DT_PATH(switchcap), port) +#define SC_PORT_PHANDLE DT_PHANDLE(DT_PATH(switchcap), port) #define SC_PORT DT_STRING_UPPER_TOKEN(SC_PORT_PHANDLE, enum_name) #define SC_ADDR_FLAGS DT_STRING_UPPER_TOKEN(DT_PATH(switchcap), addr_flags) diff --git a/zephyr/shim/src/system.c b/zephyr/shim/src/system.c index 807bbd50b0..a9cf544b97 100644 --- a/zephyr/shim/src/system.c +++ b/zephyr/shim/src/system.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,10 +14,10 @@ #include "system.h" #include "watchdog.h" -#define BBRAM_REGION_PD0 DT_PATH(named_bbram_regions, pd0) -#define BBRAM_REGION_PD1 DT_PATH(named_bbram_regions, pd1) -#define BBRAM_REGION_PD2 DT_PATH(named_bbram_regions, pd2) -#define BBRAM_REGION_TRY_SLOT DT_PATH(named_bbram_regions, try_slot) +#define BBRAM_REGION_PD0 DT_PATH(named_bbram_regions, pd0) +#define BBRAM_REGION_PD1 DT_PATH(named_bbram_regions, pd1) +#define BBRAM_REGION_PD2 DT_PATH(named_bbram_regions, pd2) +#define BBRAM_REGION_TRY_SLOT DT_PATH(named_bbram_regions, try_slot) #define GET_BBRAM_OFFSET(node) \ DT_PROP(DT_PATH(named_bbram_regions, node), offset) @@ -160,7 +160,7 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) /** * Print low power idle statistics */ -static int command_idle_stats(int argc, char **argv) +static int command_idle_stats(int argc, const char **argv) { const struct device *sys_dev = device_get_binding("CROS_SYSTEM"); @@ -172,9 +172,8 @@ static int command_idle_stats(int argc, char **argv) ccprintf("Total time on: %.6llds\n", ts.val); return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(idlestats, command_idle_stats, - "", - "Print last idle stats"); +DECLARE_CONSOLE_COMMAND(idlestats, command_idle_stats, "", + "Print last idle stats"); #endif const char *system_get_chip_vendor(void) @@ -198,7 +197,7 @@ const char *system_get_chip_revision(void) return cros_system_chip_revision(sys_dev); } -void system_reset(int flags) +test_mockable void system_reset(int flags) { int err; uint32_t save_flags; diff --git a/zephyr/shim/src/tasks.c b/zephyr/shim/src/tasks.c index 248d5e9607..4143215442 100644 --- a/zephyr/shim/src/tasks.c +++ b/zephyr/shim/src/tasks.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,9 +15,8 @@ /* Ensure that the idle task is at lower priority than lowest priority task. */ BUILD_ASSERT(EC_TASK_PRIORITY(EC_TASK_PRIO_LOWEST) < K_IDLE_PRIO, - "CONFIG_NUM_PREEMPT_PRIORITIES too small, some tasks would run at " - "idle priority"); - + "CONFIG_NUM_PREEMPT_PRIORITIES too small, some tasks would run at " + "idle priority"); /* Declare all task stacks here */ #define CROS_EC_TASK(name, e, p, size, pr) \ @@ -68,21 +67,19 @@ struct task_ctx_data { struct task_ctx_base_data base; }; -#define CROS_EC_TASK(_name, _entry, _parameter, _size, _prio) \ - { \ - .entry = _entry, \ - .parameter = _parameter, \ - .stack = _name##_STACK, \ - .stack_size = _size, \ - .priority = EC_TASK_PRIORITY(_prio), \ - COND_CODE_1(CONFIG_THREAD_NAME, (.name = #_name,), ()) \ - }, +#define CROS_EC_TASK(_name, _entry, _parameter, _size, _prio) \ + { .entry = _entry, \ + .parameter = _parameter, \ + .stack = _name##_STACK, \ + .stack_size = _size, \ + .priority = EC_TASK_PRIORITY(_prio), \ + COND_CODE_1(CONFIG_THREAD_NAME, (.name = #_name, ), ()) }, #define TASK_TEST(_name, _entry, _parameter, _size) \ CROS_EC_TASK(_name, _entry, _parameter, _size) const static struct task_ctx_cfg shimmed_tasks_cfg[TASK_ID_COUNT] = { CROS_EC_TASK_LIST #ifdef TEST_BUILD - [TASK_ID_TEST_RUNNER] = {}, + [TASK_ID_TEST_RUNNER] = {}, #endif }; @@ -238,8 +235,7 @@ uint32_t task_wait_event_mask(uint32_t event_mask, int timeout_us) return events & event_mask; } -static void task_entry(void *task_context_cfg, - void *task_context_data, +static void task_entry(void *task_context_cfg, void *task_context_data, void *unused1) { ARG_UNUSED(task_context_data); @@ -299,7 +295,7 @@ void set_test_runner_tid(void) } #ifdef CONFIG_TASKS_SET_TEST_RUNNER_TID_RULE -#include <ztest.h> +#include <zephyr/ztest.h> static void set_test_runner_tid_rule_before(const struct ztest_unit_test *test, void *data) { @@ -335,17 +331,11 @@ void start_ec_tasks(void) * comment in config.h for CONFIG_TASK_LIST for existing flags * implementation. */ - data->zephyr_tid = k_thread_create( - &data->zephyr_thread, - cfg->stack, - cfg->stack_size, - task_entry, - (void *)cfg, - data, - NULL, - cfg->priority, - 0, - K_NO_WAIT); + data->zephyr_tid = k_thread_create(&data->zephyr_thread, + cfg->stack, cfg->stack_size, + task_entry, (void *)cfg, + data, NULL, cfg->priority, 0, + K_NO_WAIT); #ifdef CONFIG_THREAD_NAME /* Name thread for debugging */ diff --git a/zephyr/shim/src/tcpc.c b/zephyr/shim/src/tcpc.c index 0f96beff15..cdeeb4771b 100644 --- a/zephyr/shim/src/tcpc.c +++ b/zephyr/shim/src/tcpc.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,39 +7,67 @@ #include <zephyr/sys/util.h> #include "usb_pd_tcpm.h" #include "usb_pd.h" +#include "usbc/tcpc_anx7447.h" #include "usbc/tcpc_ccgxxf.h" #include "usbc/tcpc_fusb302.h" +#include "usbc/tcpc_generic_emul.h" #include "usbc/tcpc_it8xxx2.h" #include "usbc/tcpc_nct38xx.h" #include "usbc/tcpc_ps8xxx.h" +#include "usbc/tcpc_ps8xxx_emul.h" +#include "usbc/tcpc_rt1718s.h" #include "usbc/tcpci.h" #include "usbc/utils.h" -#if DT_HAS_COMPAT_STATUS_OKAY(CCGXXF_TCPC_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(FUSB302_TCPC_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(IT8XXX2_TCPC_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(PS8XXX_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(NCT38XX_TCPC_COMPAT) || \ - DT_HAS_COMPAT_STATUS_OKAY(TCPCI_COMPAT) \ - -#define TCPC_CONFIG(id, fn) [USBC_PORT(id)] = fn(id) - -#define MAYBE_CONST COND_CODE_1(CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG, \ - (), (const)) - -MAYBE_CONST struct tcpc_config_t tcpc_config[] = { - DT_FOREACH_STATUS_OKAY_VARGS(CCGXXF_TCPC_COMPAT, TCPC_CONFIG, - TCPC_CONFIG_CCGXXF) - DT_FOREACH_STATUS_OKAY_VARGS(FUSB302_TCPC_COMPAT, TCPC_CONFIG, - TCPC_CONFIG_FUSB302) - DT_FOREACH_STATUS_OKAY_VARGS(IT8XXX2_TCPC_COMPAT, TCPC_CONFIG, - TCPC_CONFIG_IT8XXX2) - DT_FOREACH_STATUS_OKAY_VARGS(PS8XXX_COMPAT, TCPC_CONFIG, - TCPC_CONFIG_PS8XXX) - DT_FOREACH_STATUS_OKAY_VARGS(NCT38XX_TCPC_COMPAT, TCPC_CONFIG, - TCPC_CONFIG_NCT38XX) - DT_FOREACH_STATUS_OKAY_VARGS(TCPCI_COMPAT, TCPC_CONFIG, - TCPC_CONFIG_TCPCI) -}; +#define HAS_TCPC_PROP(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, tcpc), (|| 1), ()) + +#define DT_HAS_TCPC (0 DT_FOREACH_STATUS_OKAY(named_usbc_port, HAS_TCPC_PROP)) + +#if DT_HAS_TCPC + +#define TCPC_CHIP_ENTRY(usbc_id, tcpc_id, config_fn) \ + [USBC_PORT_NEW(usbc_id)] = config_fn(tcpc_id) + +#define CHECK_COMPAT(compat, usbc_id, tcpc_id, config_fn) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(tcpc_id, compat), \ + (TCPC_CHIP_ENTRY(usbc_id, tcpc_id, config_fn)), ()) + +#ifdef TEST_BUILD +#define TCPC_CHIP_FIND_EMUL(usbc_id, tcpc_id) \ + CHECK_COMPAT(TCPCI_EMUL_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_TCPCI_EMUL) \ + CHECK_COMPAT(PS8XXX_EMUL_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_PS8XXX_EMUL) +#else +#define TCPC_CHIP_FIND_EMUL(...) +#endif /* TEST_BUILD */ + +#define TCPC_CHIP_FIND(usbc_id, tcpc_id) \ + CHECK_COMPAT(ANX7447_TCPC_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_ANX7447) \ + CHECK_COMPAT(CCGXXF_TCPC_COMPAT, usbc_id, tcpc_id, TCPC_CONFIG_CCGXXF) \ + CHECK_COMPAT(FUSB302_TCPC_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_FUSB302) \ + CHECK_COMPAT(IT8XXX2_TCPC_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_IT8XXX2) \ + CHECK_COMPAT(PS8XXX_COMPAT, usbc_id, tcpc_id, TCPC_CONFIG_PS8XXX) \ + CHECK_COMPAT(NCT38XX_TCPC_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_NCT38XX) \ + CHECK_COMPAT(RT1718S_TCPC_COMPAT, usbc_id, tcpc_id, \ + TCPC_CONFIG_RT1718S) \ + CHECK_COMPAT(TCPCI_COMPAT, usbc_id, tcpc_id, TCPC_CONFIG_TCPCI) \ + TCPC_CHIP_FIND_EMUL(usbc_id, tcpc_id) + +#define TCPC_CHIP(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, tcpc), \ + (TCPC_CHIP_FIND(usbc_id, DT_PHANDLE(usbc_id, tcpc))), ()) + +#define MAYBE_CONST \ + COND_CODE_1(CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG, (), (const)) + +/* Type C Port Controllers */ +MAYBE_CONST struct tcpc_config_t tcpc_config[] = { DT_FOREACH_STATUS_OKAY( + named_usbc_port, TCPC_CHIP) }; #endif /* DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/shim/src/tcpc_nct38xx.c b/zephyr/shim/src/tcpc_nct38xx.c index f8c73d1aa0..9580759a6c 100644 --- a/zephyr/shim/src/tcpc_nct38xx.c +++ b/zephyr/shim/src/tcpc_nct38xx.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,20 +8,27 @@ #include "config.h" #include "usbc/tcpc_nct38xx.h" - -#define TCPC_PORT(id) DT_REG_ADDR(DT_PARENT(id)) +#include "usbc/utils.h" #define GPIO_DEV_WITH_COMMA(id) DEVICE_DT_GET(DT_PHANDLE(id, gpio_dev)), -#define GPIO_DEV_BINDING(id) \ - COND_CODE_1(DT_NODE_HAS_PROP(id, gpio_dev), \ - ([TCPC_PORT(id)] = GPIO_DEV_WITH_COMMA(id)), ()) +#define GPIO_DEV_BINDING(usbc_id, tcpc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(tcpc_id, gpio_dev), \ + ([USBC_PORT_NEW(usbc_id)] = GPIO_DEV_WITH_COMMA(tcpc_id)), \ + ()) + +#define NCT38XX_CHECK(usbc_id, tcpc_id) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(tcpc_id, nuvoton_nct38xx), \ + (GPIO_DEV_BINDING(usbc_id, tcpc_id)), ()) + +#define NCT38XX_GPIO(usbc_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(usbc_id, tcpc), \ + (NCT38XX_CHECK(usbc_id, DT_PHANDLE(usbc_id, tcpc))), ()) /* NCT38XX GPIO device pool for binding the TCPC port and NCT38XX GPIO device */ -static const struct device - *nct38xx_gpio_devices[CONFIG_USB_PD_PORT_MAX_COUNT] = { - DT_FOREACH_STATUS_OKAY(nuvoton_nct38xx, GPIO_DEV_BINDING) - }; +static const struct device *nct38xx_gpio_devices[CONFIG_USB_PD_PORT_MAX_COUNT] = { + DT_FOREACH_STATUS_OKAY(named_usbc_port, NCT38XX_GPIO) +}; const struct device *nct38xx_get_gpio_device_from_port(const int port) { diff --git a/zephyr/shim/src/temp_sensors.c b/zephyr/shim/src/temp_sensors.c index 4d8ff28945..371d7d7fc9 100644 --- a/zephyr/shim/src/temp_sensors.c +++ b/zephyr/shim/src/temp_sensors.c @@ -1,9 +1,11 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include "adc.h" +#include "charger/chg_rt9490.h" +#include "driver/charger/rt9490.h" #include "temp_sensor.h" #include "temp_sensor/pct2075.h" #include "temp_sensor/sb_tsi.h" @@ -11,24 +13,38 @@ #include "temp_sensor/thermistor.h" #include "temp_sensor/tmp112.h" -#if DT_NODE_EXISTS(DT_PATH(named_temp_sensors)) +#if DT_HAS_COMPAT_STATUS_OKAY(TEMP_SENSORS_COMPAT) + +BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(TEMP_SENSORS_COMPAT) == 1, + "Only one temperature sensors node is allowed"); #define GET_POWER_GOOD_PROP(node_id) DT_PROP(node_id, power_good_pin) -#define GET_POWER_GOOD_DEV(node_id) \ - DEVICE_DT_GET(DT_GPIO_CTLR(GET_POWER_GOOD_PROP(node_id), \ - gpios)) +#define GET_POWER_GOOD_DEV(node_id) \ + DEVICE_DT_GET(DT_GPIO_CTLR(GET_POWER_GOOD_PROP(node_id), gpios)) + +#define GET_POWER_GOOD_PIN(node_id) \ + DT_GPIO_PIN(GET_POWER_GOOD_PROP(node_id), gpios) + +#define POWER_GOOD_ENTRY(node_id) \ + .power_good_dev = GET_POWER_GOOD_DEV(node_id), \ + .power_good_pin = GET_POWER_GOOD_PIN(node_id), -#define GET_POWER_GOOD_PIN(node_id) DT_GPIO_PIN(GET_POWER_GOOD_PROP(node_id), \ - gpios) +#define POWER_GOOD_ENTRY_NULL(node_id) \ + .power_good_dev = NULL, .power_good_pin = 0, + +#define POWER_GOOD(node_id) \ + [TEMP_SENSOR_ID(node_id)] = { COND_CODE_1( \ + DT_NODE_HAS_PROP(node_id, power_good_pin), \ + (POWER_GOOD_ENTRY(node_id)), \ + (POWER_GOOD_ENTRY_NULL(node_id))) } #if ANY_INST_HAS_POWER_GOOD_PIN -#define FILL_POWER_GOOD(node_id) \ -COND_CODE_1(DT_NODE_HAS_PROP(node_id, power_good_pin), \ - (.power_good_dev = GET_POWER_GOOD_DEV(node_id), \ - .power_good_pin = GET_POWER_GOOD_PIN(node_id), ), \ - (.power_good_dev = NULL, \ - .power_good_pin = 0, )) +#define FILL_POWER_GOOD(node_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(node_id, power_good_pin), \ + (.power_good_dev = GET_POWER_GOOD_DEV(node_id), \ + .power_good_pin = GET_POWER_GOOD_PIN(node_id), ), \ + (.power_good_dev = NULL, .power_good_pin = 0, )) #else #define FILL_POWER_GOOD(node_id) #endif /* ANY_INST_HAS_POWER_GOOD_PIN */ @@ -43,137 +59,181 @@ static int thermistor_get_temp(const struct temp_sensor_t *sensor, #define GET_THERMISTOR_DATUM(node_sample_id) \ [DT_PROP(node_sample_id, \ sample_index)] = { .mv = DT_PROP(node_sample_id, milivolt), \ - .temp = DT_PROP(node_sample_id, temp) }, + .temp = DT_PROP(node_sample_id, temp) } -#define DEFINE_THERMISTOR_DATA(node_id) \ - static const struct thermistor_data_pair DT_CAT( \ - node_id, _thermistor_data)[] = { \ - DT_FOREACH_CHILD(node_id, GET_THERMISTOR_DATUM) \ +#define DEFINE_THERMISTOR_DATA(node_id) \ + static const struct thermistor_data_pair DT_CAT( \ + node_id, _thermistor_data)[] = { \ + DT_FOREACH_CHILD_SEP(node_id, GET_THERMISTOR_DATUM, (, )) \ }; #define GET_THERMISTOR_INFO(node_id) \ - (&(struct thermistor_info){ \ + (&(const struct thermistor_info){ \ .scaling_factor = DT_PROP(node_id, scaling_factor), \ .num_pairs = DT_PROP(node_id, num_pairs), \ .data = DT_CAT(node_id, _thermistor_data), \ }) -#define GET_ZEPHYR_TEMP_SENSOR_THERMISTOR(node_id) \ - (&(struct zephyr_temp_sensor){ \ - .read = &thermistor_get_temp, \ - .thermistor = \ - GET_THERMISTOR_INFO(DT_PHANDLE(node_id, thermistor)), \ - FILL_POWER_GOOD(node_id) \ - }) - -#define TEMP_THERMISTOR(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .idx = ZSHIM_ADC_ID(DT_PHANDLE(node_id, adc)), \ - .type = TEMP_SENSOR_TYPE_BOARD, \ - .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_THERMISTOR(node_id), \ - }, +#define GET_ZEPHYR_TEMP_SENSOR_THERMISTOR(named_id, sensor_id) \ + (&(const struct zephyr_temp_sensor){ \ + .read = &thermistor_get_temp, \ + .thermistor = GET_THERMISTOR_INFO( \ + DT_PHANDLE(sensor_id, thermistor)), \ + FILL_POWER_GOOD(named_id) }) + +#define TEMP_THERMISTOR(named_id, sensor_id) \ + [TEMP_SENSOR_ID(named_id)] = { \ + .name = DT_NODE_FULL_NAME(sensor_id), \ + .idx = ZSHIM_ADC_ID(DT_PHANDLE(sensor_id, adc)), \ + .type = TEMP_SENSOR_TYPE_BOARD, \ + .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_THERMISTOR(named_id, \ + sensor_id), \ + } DT_FOREACH_STATUS_OKAY(cros_ec_thermistor, DEFINE_THERMISTOR_DATA) -#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_temp_sensor_pct2075) -static int pct2075_get_temp(const struct temp_sensor_t *sensor, int *temp_ptr) +#if DT_HAS_COMPAT_STATUS_OKAY(PCT2075_COMPAT) +/* The function maybe unused because a temperature sensor can be added to dts + * without a reference in the cros_ec_temp_sensors node. + */ +__maybe_unused static int pct2075_get_temp(const struct temp_sensor_t *sensor, + int *temp_ptr) { return pct2075_get_val_k(sensor->idx, temp_ptr); } -#endif /* cros_ec_temp_sensor_pct2075 */ +#endif /* PCT2075_COMPAT */ -#define DEFINE_PCT2075_DATA(node_id) \ - [ZSHIM_PCT2075_SENSOR_ID(node_id)] = { \ - .i2c_port = I2C_PORT(DT_PHANDLE(node_id, port)), \ - .i2c_addr_flags = DT_STRING_TOKEN(node_id, i2c_addr_flags), \ +#define DEFINE_PCT2075_DATA(node_id) \ + [PCT2075_SENSOR_ID(node_id)] = { \ + .i2c_port = I2C_PORT_BY_DEV(node_id), \ + .i2c_addr_flags = \ + (DT_REG_ADDR(node_id) | I2C_FLAG_BIG_ENDIAN), \ }, -#define GET_ZEPHYR_TEMP_SENSOR_PCT2075(node_id) \ - (&(struct zephyr_temp_sensor){ \ - .read = &pct2075_get_temp, \ - .thermistor = NULL, \ - FILL_POWER_GOOD(node_id) \ - }) - -#define TEMP_PCT2075(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .idx = ZSHIM_PCT2075_SENSOR_ID(node_id), \ - .type = TEMP_SENSOR_TYPE_BOARD, \ - .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_PCT2075(node_id), \ - }, +#define GET_ZEPHYR_TEMP_SENSOR_PCT2075(named_id) \ + (&(const struct zephyr_temp_sensor){ .read = &pct2075_get_temp, \ + .thermistor = NULL, \ + FILL_POWER_GOOD(named_id) }) + +#define TEMP_PCT2075(named_id, sensor_id) \ + [TEMP_SENSOR_ID(named_id)] = { \ + .name = DT_NODE_FULL_NAME(sensor_id), \ + .idx = PCT2075_SENSOR_ID(sensor_id), \ + .type = TEMP_SENSOR_TYPE_BOARD, \ + .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_PCT2075(named_id), \ + } const struct pct2075_sensor_t pct2075_sensors[PCT2075_COUNT] = { - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_pct2075, DEFINE_PCT2075_DATA) + DT_FOREACH_STATUS_OKAY(PCT2075_COMPAT, DEFINE_PCT2075_DATA) }; -#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_temp_sensor_sb_tsi) -static int sb_tsi_get_temp(const struct temp_sensor_t *sensor, int *temp_ptr) +#if DT_HAS_COMPAT_STATUS_OKAY(SB_TSI_COMPAT) +/* The function maybe unused because a temperature sensor can be added to dts + * without a reference in the cros_ec_temp_sensors node. + */ +__maybe_unused static int sb_tsi_get_temp(const struct temp_sensor_t *sensor, + int *temp_ptr) { return sb_tsi_get_val(sensor->idx, temp_ptr); } /* There can be only one SB TSI sensor with current driver */ -#if DT_NUM_INST_STATUS_OKAY(cros_ec_temp_sensor_sb_tsi) > 1 +#if DT_NUM_INST_STATUS_OKAY(SB_TSI_COMPAT) > 1 #error "Unsupported number of SB TSI sensors" #endif -#endif /* cros_ec_temp_sensor_sb_tsi */ +#endif /* SB_TSI_COMPAT */ -#define GET_ZEPHYR_TEMP_SENSOR_SB_TSI(node_id) \ - (&(struct zephyr_temp_sensor){ \ - .read = &sb_tsi_get_temp, \ - .thermistor = NULL, \ - FILL_POWER_GOOD(node_id) \ - }) +#define GET_ZEPHYR_TEMP_SENSOR_SB_TSI(named_id) \ + (&(const struct zephyr_temp_sensor){ .read = &sb_tsi_get_temp, \ + .thermistor = NULL, \ + FILL_POWER_GOOD(named_id) }) -#define TEMP_SB_TSI(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .idx = 0, \ - .type = TEMP_SENSOR_TYPE_CPU, \ - .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_SB_TSI(node_id), \ - }, +#define TEMP_SB_TSI(named_id, sensor_id) \ + [TEMP_SENSOR_ID(named_id)] = { \ + .name = DT_NODE_FULL_NAME(sensor_id), \ + .idx = 0, \ + .type = TEMP_SENSOR_TYPE_CPU, \ + .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_SB_TSI(named_id), \ + } -#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_temp_sensor_tmp112) -static int tmp112_get_temp(const struct temp_sensor_t *sensor, int *temp_ptr) +#if DT_HAS_COMPAT_STATUS_OKAY(TMP112_COMPAT) +/* The function maybe unused because a temperature sensor can be added to dts + * without a reference in the cros_ec_temp_sensors node. + */ +__maybe_unused static int tmp112_get_temp(const struct temp_sensor_t *sensor, + int *temp_ptr) { return tmp112_get_val_k(sensor->idx, temp_ptr); } -#endif /* cros_ec_temp_sensor_tmp112 */ +#endif /* TMP112_COMPAT */ -#define DEFINE_TMP112_DATA(node_id) \ - [ZSHIM_TMP112_SENSOR_ID(node_id)] = { \ - .i2c_port = I2C_PORT(DT_PHANDLE(node_id, port)), \ - .i2c_addr_flags = DT_STRING_TOKEN(node_id, i2c_addr_flags), \ +#define DEFINE_TMP112_DATA(node_id) \ + [TMP112_SENSOR_ID(node_id)] = { \ + .i2c_port = I2C_PORT_BY_DEV(node_id), \ + .i2c_addr_flags = DT_REG_ADDR(node_id), \ }, -#define GET_ZEPHYR_TEMP_SENSOR_TMP112(node_id) \ - (&(struct zephyr_temp_sensor){ \ - .read = &tmp112_get_temp, \ - .thermistor = NULL, \ - FILL_POWER_GOOD(node_id) \ - }) - -#define TEMP_TMP112(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ - .name = DT_LABEL(node_id), \ - .idx = ZSHIM_TMP112_SENSOR_ID(node_id), \ - .type = TEMP_SENSOR_TYPE_BOARD, \ - .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_TMP112(node_id), \ - }, +#define GET_ZEPHYR_TEMP_SENSOR_TMP112(named_id) \ + (&(const struct zephyr_temp_sensor){ .read = &tmp112_get_temp, \ + .thermistor = NULL, \ + FILL_POWER_GOOD(named_id) }) + +#define TEMP_TMP112(named_id, sensor_id) \ + [TEMP_SENSOR_ID(named_id)] = { \ + .name = DT_NODE_FULL_NAME(sensor_id), \ + .idx = TMP112_SENSOR_ID(sensor_id), \ + .type = TEMP_SENSOR_TYPE_BOARD, \ + .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_TMP112(named_id), \ + } const struct tmp112_sensor_t tmp112_sensors[TMP112_COUNT] = { - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_tmp112, DEFINE_TMP112_DATA) + DT_FOREACH_STATUS_OKAY(TMP112_COMPAT, DEFINE_TMP112_DATA) }; -const struct temp_sensor_t temp_sensors[] = { - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_thermistor, TEMP_THERMISTOR) - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_pct2075, TEMP_PCT2075) - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_sb_tsi, TEMP_SB_TSI) - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor_tmp112, TEMP_TMP112) -}; +/* There can be only one thermistor on RT9490 with current driver */ +#define ADD_ONE(node_id) 1 + +#if DT_FOREACH_STATUS_OKAY_VARGS(RT9490_CHG_COMPAT, TEMP_RT9490_FN, \ + ADD_ONE) 0 > 1 +#error "Unsupported number of thermistor on RT9490" +#endif +#undef ADD_ONE + +#define GET_ZEPHYR_TEMP_SENSOR_RT9490(named_id, sensor_id) \ + (&(const struct zephyr_temp_sensor){ \ + .read = &rt9490_get_thermistor_val, \ + .thermistor = GET_THERMISTOR_INFO( \ + DT_PHANDLE(sensor_id, thermistor)), \ + FILL_POWER_GOOD(named_id) }) + +#define TEMP_RT9490(named_id, sensor_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(sensor_id, thermistor), ( \ + [TEMP_SENSOR_ID(named_id)] = { \ + .name = DT_NODE_FULL_NAME(sensor_id), \ + .idx = 0, \ + .type = TEMP_SENSOR_TYPE_BOARD, \ + .zephyr_info = GET_ZEPHYR_TEMP_SENSOR_RT9490(named_id, \ + sensor_id), \ + } ), ()) + +#define DT_DRV_COMPAT TEMP_SENSORS_COMPAT + +#define CHECK_COMPAT(compat, named_id, sensor_id, config_fn) \ + COND_CODE_1(DT_NODE_HAS_COMPAT(sensor_id, compat), \ + (config_fn(named_id, sensor_id)), ()) + +#define TEMP_SENSOR_FIND(named_id, sensor_id) \ + CHECK_COMPAT(THERMISTOR_COMPAT, named_id, sensor_id, TEMP_THERMISTOR) \ + CHECK_COMPAT(PCT2075_COMPAT, named_id, sensor_id, TEMP_PCT2075) \ + CHECK_COMPAT(SB_TSI_COMPAT, named_id, sensor_id, TEMP_SB_TSI) \ + CHECK_COMPAT(TMP112_COMPAT, named_id, sensor_id, TEMP_TMP112) \ + CHECK_COMPAT(RT9490_CHG_COMPAT, named_id, sensor_id, TEMP_RT9490) + +#define TEMP_SENSOR_ENTRY(named_id) \ + TEMP_SENSOR_FIND(named_id, DT_PHANDLE(named_id, sensor)) + +const struct temp_sensor_t temp_sensors[] = { DT_FOREACH_CHILD_SEP( + TEMP_SENSORS_NODEID, TEMP_SENSOR_ENTRY, (, )) }; int temp_sensor_read(enum temp_sensor_id id, int *temp_ptr) { @@ -194,4 +254,4 @@ int temp_sensor_read(enum temp_sensor_id id, int *temp_ptr) return sensor->zephyr_info->read(sensor, temp_ptr); } -#endif /* named_temp_sensors */ +#endif /* DT_HAS_COMPAT_STATUS_OKAY(TEMP_SENSORS_COMPAT) */ diff --git a/zephyr/shim/src/test_util.c b/zephyr/shim/src/test_util.c index 28be596043..e999772fc6 100644 --- a/zephyr/shim/src/test_util.c +++ b/zephyr/shim/src/test_util.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * diff --git a/zephyr/shim/src/thermal.c b/zephyr/shim/src/thermal.c index c31e2bfcc6..abe6b7da9e 100644 --- a/zephyr/shim/src/thermal.c +++ b/zephyr/shim/src/thermal.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,8 +7,8 @@ #include "temp_sensor/temp_sensor.h" #include "ec_commands.h" -#define THERMAL_CONFIG(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = { \ +#define THERMAL_CONFIG(node_id) \ + [TEMP_SENSOR_ID(node_id)] = { \ .temp_host = { \ [EC_TEMP_THRESH_WARN] = \ C_TO_K(DT_PROP_OR(node_id, \ @@ -43,10 +43,10 @@ .temp_fan_max = C_TO_K(DT_PROP_OR(node_id, \ temp_fan_max, \ -273)), \ - }, + } struct ec_thermal_config thermal_params[] = { -#if DT_NODE_EXISTS(DT_PATH(named_temp_sensors)) - DT_FOREACH_CHILD(DT_PATH(named_temp_sensors), THERMAL_CONFIG) -#endif /* named_temp_sensors */ +#if DT_HAS_COMPAT_STATUS_OKAY(TEMP_SENSORS_COMPAT) + DT_FOREACH_CHILD_SEP(TEMP_SENSORS_NODEID, THERMAL_CONFIG, (, )) +#endif /* DT_HAS_COMPAT_STATUS_OKAY(TEMP_SENSORS_COMPAT) */ }; diff --git a/zephyr/shim/src/usb_muxes.c b/zephyr/shim/src/usb_muxes.c index f96146258a..3f81e97787 100644 --- a/zephyr/shim/src/usb_muxes.c +++ b/zephyr/shim/src/usb_muxes.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,45 +9,83 @@ #include "usbc/usb_muxes.h" /** - * @brief Macro that can be used in USB_MUX_FOREACH_USBC_PORT as filter - * argument. It allows to evaluate to "1 ||" for each named USBC port - * that has usb-muxes property. + * This prevents creating struct usb_mux usb_muxes[] for platforms that didn't + * migrate USB mux configuration to DTS yet. */ -#define USB_MUX_PORT_HAS_MUX(unused1, unused2) 1 || +#if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_usb_mux_chain) /** - * Check if there is any named USBC port with usb-muxes property. It evaluates - * to "1 || 1 || ... 1 || 0" when there are multiple named USBC ports with - * usb-muxes property and to "0" when any named USBC port has usb-muxes - * property. + * @brief Check if @p mux_id is not part of @p chain_id or if @p chain_id USBC + * port is the same as @p mux_port. Result ends with && to construct + * logical expression using FOREACH macro. * - * This prevents creating struct usb_mux usb_muxes[] for platforms that didn't - * migrate USB mux configuration to DTS yet. + * @param chain_id Chain DTS node ID + * @param mux_id USB mux node ID + * @param mux_port Port which should be associated with @p mux_id */ -#if USB_MUX_FOREACH_USBC_PORT(USB_MUX_PORT_HAS_MUX, _) 0 +#define USB_MUX_NOT_IN_CHAIN_OR_PORT_EQ(chain_id, mux_id, mux_port) \ + ((USB_MUX_FIND_PORT(chain_id, mux_id)(-1)) == -1 || \ + USBC_PORT(chain_id) == mux_port) && + +/** + * @brief Check if all chains that contains @p mux_id have the same USB-C port + * + * @param mux_id USB mux node ID + * @param unused_conf Unused argument required by USB_MUX_FOREACH_MUX() + */ +#define USB_MUX_CHECK_ALL_PORTS_ARE_SAME(mux_id, unused_conf) \ + BUILD_ASSERT( \ + USB_MUX_FOREACH_CHAIN_VARGS(USB_MUX_NOT_IN_CHAIN_OR_PORT_EQ, \ + mux_id, USB_MUX_PORT(mux_id)) 1, \ + "USB mux " #mux_id " is in chains for different ports"); + +/** Check if for every mux, chains where mux is present have the same port */ +USB_MUX_FOREACH_MUX(USB_MUX_CHECK_ALL_PORTS_ARE_SAME) + +/** + * Declare all usb_mux_chain structures e.g. + * MAYBE_CONST struct usb_mux_chain + * USB_MUX_chain_port_<port_id>_mux_<position_id>; + */ +USB_MUX_FOREACH_CHAIN_VARGS(USB_MUX_FOREACH_NO_ROOT_MUX, + USB_MUX_CHAIN_STRUCT_DECLARE_OP) + +/** + * Define usb_mux_chain structures for main chain e.g. + * + * MAYBE_CONST struct usb_mux_chain + * USB_MUX_chain_port_<port_id>_mux_<position_id> = { + * .mux = &USB_MUX_NODE_DT_N_S_usbc_S_port0_0_S_virtual_mux_0, + * .next = &USB_MUX_chain_port_0_mux_1, + * } + */ +USB_MUX_FOREACH_CHAIN_VARGS(USB_MUX_FOR_MAIN_CHAIN, USB_MUX_FOREACH_NO_ROOT_MUX, + USB_MUX_CHAIN_STRUCT_DEFINE_OP) + +/** + * Forward declarations for board_init and board_set callbacks. e.g. + * int c0_mux0_board_init(const struct usb_mux *); + * int c1_mux0_board_set(const struct usb_mux *, mux_state_t); + */ +USB_MUX_FOREACH_MUX(USB_MUX_CB_BOARD_INIT_DECLARE_IF_EXISTS) +USB_MUX_FOREACH_MUX(USB_MUX_CB_BOARD_SET_DECLARE_IF_EXISTS) /** * Define root of each USB muxes chain e.g. * [0] = { - * .usb_port = 0, - * .next_mux = &USB_MUX_NODE_DT_N_S_usbc_S_port0_0_S_it5205_mux_0, - * .board_init = &board_init, - * .board_set = NULL, - * .flags = 0, - * .driver = &virtual_usb_mux_driver, - * .hpd_update = &virtual_hpd_update, + * .mux = &USB_MUX_NODE_DT_N_S_usbc_S_port0_0_S_virtual_mux_0, + * .next = &USB_MUX_chain_port_0_mux_1, * }, * [1] = { ... }, */ -MAYBE_CONST struct usb_mux usb_muxes[] = { - USB_MUX_FOREACH_USBC_PORT(USB_MUX_FIRST, USB_MUX_ARRAY) -}; +MAYBE_CONST struct usb_mux_chain usb_muxes[] = { USB_MUX_FOREACH_CHAIN_VARGS( + USB_MUX_FOR_MAIN_CHAIN, USB_MUX_DEFINE_ROOT_MUX) }; +BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == CONFIG_USB_PD_PORT_MAX_COUNT); /** - * Define all USB muxes except roots e.g. + * Define all USB muxes e.g. * MAYBE_CONST struct usb_mux USB_MUX_NODE_DT_N_S_usbc_S_port0_0_S_mux_0 = { * .usb_port = 0, - * .next_mux = NULL, * .board_init = NULL, * .board_set = NULL, * .flags = 0, @@ -56,30 +94,6 @@ MAYBE_CONST struct usb_mux usb_muxes[] = { * }; * MAYBE_CONST struct usb_mux USB_MUX_NODE_<node_id> = { ... }; */ -USB_MUX_FOREACH_USBC_PORT(USB_MUX_NO_FIRST, USB_MUX_DEFINE) - -/* Create bb_controls only if BB retimer driver is enabled */ -#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB -/** - * @brief bb_controls array should be constant only if configuration cannot - * change in runtime - */ -#define BB_CONTROLS_CONST \ - COND_CODE_1( \ - CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG,\ - (), (const)) - -/** - * Define bb_controls for BB retimers in USB muxes chain e.g. - * [0] = { - * .retimer_rst_gpio = IOEX_USB_C0_BB_RETIMER_RST, - * .usb_ls_en_gpio = IOEX_USB_C0_BB_RETIMER_LS_EN, - * }, - * [1] = { ... }, - */ -BB_CONTROLS_CONST struct bb_usb_control bb_controls[] = { - USB_MUX_FOREACH_USBC_PORT(USB_MUX_BB_RETIMERS, USB_MUX_ARRAY) -}; -#endif /* CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB */ +USB_MUX_FOREACH_MUX(USB_MUX_DEFINE) -#endif /* #if USB_MUX_FOREACH_USBC_PORT(USB_MUX_PORT_HAS_MUX, _) */ +#endif /* #if DT_HAS_COMPAT_STATUS_OKAY(cros_ec_usb_mux_chain) */ diff --git a/zephyr/shim/src/usba.c b/zephyr/shim/src/usba.c index e8e1ca373a..4db8c31e6a 100644 --- a/zephyr/shim/src/usba.c +++ b/zephyr/shim/src/usba.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,18 +10,18 @@ #if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) -#define PIN(node_id, prop, idx) GPIO_SIGNAL(DT_PHANDLE_BY_IDX(node_id, prop, idx)), +#define PIN(node_id, prop, idx) \ + GPIO_SIGNAL(DT_PHANDLE_BY_IDX(node_id, prop, idx)), BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 0, - "No compatible USBA Port Enable instance found"); + "No compatible USBA Port Enable instance found"); #define USBA_ENABLE_PINS(inst) DT_INST_FOREACH_PROP_ELEM(inst, enable_pins, PIN) #if !IS_ENABLED(CONFIG_PLATFORM_EC_USB_PORT_ENABLE_DYNAMIC) const #endif -int usb_port_enable[] = { - DT_INST_FOREACH_STATUS_OKAY(USBA_ENABLE_PINS) -}; + int usb_port_enable[] = { DT_INST_FOREACH_STATUS_OKAY( + USBA_ENABLE_PINS) }; #endif /* DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) */ diff --git a/zephyr/shim/src/watchdog.c b/zephyr/shim/src/watchdog.c index 00cd5c4c30..eb82f228d5 100644 --- a/zephyr/shim/src/watchdog.c +++ b/zephyr/shim/src/watchdog.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ #include <zephyr/device.h> #include <zephyr/drivers/watchdog.h> #include <zephyr/logging/log.h> -#include <zephyr/zephyr.h> +#include <zephyr/kernel.h> #include "config.h" #include "hooks.h" @@ -24,12 +24,12 @@ static void wdt_warning_handler(const struct device *wdt_dev, int channel_id) { /* TODO(b/176523207): watchdog warning message */ printk("Watchdog deadline is close!\n"); - #ifdef TEST_BUILD +#ifdef TEST_BUILD wdt_warning_triggered = true; - #endif +#endif #ifdef CONFIG_SOC_SERIES_MEC172X extern void cros_chip_wdt_handler(const struct device *wdt_dev, - int channel_id); + int channel_id); cros_chip_wdt_handler(wdt_dev, channel_id); #endif } diff --git a/zephyr/shim/src/ztest_system.c b/zephyr/shim/src/ztest_system.c index 18b172a341..5933f18f05 100644 --- a/zephyr/shim/src/ztest_system.c +++ b/zephyr/shim/src/ztest_system.c @@ -1,23 +1,24 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include "system.h" -#include "cros_version.h" #include "battery.h" #include "charge_manager.h" +#include "common.h" +#include "cros_version.h" #include "sysjump.h" +#include "system.h" #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) -struct jump_data mock_jump_data = {}; +char mock_jump_data[sizeof(struct jump_data) + 256]; /* When CONFIG_RAM_SIZE is defined, this is provided by common/system.c */ #ifndef CONFIG_RAM_SIZE struct jump_data *get_jump_data(void) { - return &mock_jump_data; + return (struct jump_data *)&mock_jump_data; } #endif @@ -26,6 +27,11 @@ __attribute__((weak)) void system_reset(int flags) __builtin_unreachable(); } +__attribute__((weak)) void software_panic(uint32_t reason, uint32_t info) +{ + __builtin_unreachable(); +} + static uint8_t bbram[SYSTEM_BBRAM_IDX_TRY_SLOT + 1]; test_mockable int system_get_bbram(enum system_bbram_idx idx, uint8_t *value) @@ -86,7 +92,7 @@ test_mockable const char *system_get_chip_revision(void) return ""; } -void board_reset_pd_mcu(void) +test_mockable void board_reset_pd_mcu(void) { } diff --git a/zephyr/subsys/Kconfig b/zephyr/subsys/Kconfig index f35a942afc..48011312d5 100644 --- a/zephyr/subsys/Kconfig +++ b/zephyr/subsys/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/subsys/ap_pwrseq/CMakeLists.txt b/zephyr/subsys/ap_pwrseq/CMakeLists.txt index 30edfae4dd..0a77bc821d 100644 --- a/zephyr/subsys/ap_pwrseq/CMakeLists.txt +++ b/zephyr/subsys/ap_pwrseq/CMakeLists.txt @@ -13,9 +13,10 @@ zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ signal_adc.c ) zephyr_library_sources_ifdef(CONFIG_X86_NON_DSX_PWRSEQ - x86_non_dsx_common_pwrseq_sm_handler.c) -zephyr_library_sources_ifdef(CONFIG_X86_NON_DSX_PWRSEQ + x86_non_dsx_common_pwrseq_sm_handler.c x86_non_dsx_chipset_power_state.c) +zephyr_library_sources_ifdef(CONFIG_AP_PWRSEQ_S0IX_ERROR_RECOVERY + x86_non_dsx_common_pwrseq_host_sleep.c) zephyr_library_sources_ifdef(CONFIG_X86_NON_DSX_PWRSEQ_CONSOLE x86_non_dsx_common_pwrseq_console.c) zephyr_library_sources_ifdef(CONFIG_X86_NON_DSX_PWRSEQ_HOST_CMD diff --git a/zephyr/subsys/ap_pwrseq/Kconfig b/zephyr/subsys/ap_pwrseq/Kconfig index 6f39906bf2..677bca7c6d 100644 --- a/zephyr/subsys/ap_pwrseq/Kconfig +++ b/zephyr/subsys/ap_pwrseq/Kconfig @@ -1,16 +1,19 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. menuconfig AP_PWRSEQ bool "AP Power sequencing support" select HAS_TASK_POWERBTN + select GPIO_GET_CONFIG help Enables AP power sequencing support with embedded controller. This includes normal shutdown, critical shutdown and reset handling. Enabling this automatically enables HAS_TASK_POWERBTN since this task is required to handle power button pressed/released by user. + Enabling this also enables retrieving the GPIO config feature + so that the value of output GPIOs can be determined. if AP_PWRSEQ @@ -104,4 +107,14 @@ config AP_PWRSEQ_S0IX required, AP_PWRSEQ_HOST_SLEEP for host sleep event handling is enabled. +config AP_PWRSEQ_S0IX_ERROR_RECOVERY + bool "Detect failure to enter or exit Sleep state" + depends on AP_PWRSEQ_HOST_SLEEP + help + Enables detection of the AP failing to go to sleep, perhaps due to a + bug in the internal SoC periodic housekeeping code. + + Failure information is reported via the EC_CMD_HOST_SLEEP_EVENT host + command. + endif diff --git a/zephyr/subsys/ap_pwrseq/ap_events.c b/zephyr/subsys/ap_pwrseq/ap_events.c index d5b78c2c33..0d99c0fe36 100644 --- a/zephyr/subsys/ap_pwrseq/ap_events.c +++ b/zephyr/subsys/ap_pwrseq/ap_events.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -71,7 +71,8 @@ void ap_power_ev_send_callbacks(enum ap_power_events event) return; } data.event = event; - SYS_SLIST_FOR_EACH_CONTAINER_SAFE(&callbacks, cb, tmp, node) { + SYS_SLIST_FOR_EACH_CONTAINER_SAFE(&callbacks, cb, tmp, node) + { if (cb->events & event) { cb->handler(cb, data); } diff --git a/zephyr/subsys/ap_pwrseq/ap_power_interface.c b/zephyr/subsys/ap_pwrseq/ap_power_interface.c index d6dc352033..1461ed139b 100644 --- a/zephyr/subsys/ap_pwrseq/ap_power_interface.c +++ b/zephyr/subsys/ap_pwrseq/ap_power_interface.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,12 +6,17 @@ #include <ap_power/ap_power_interface.h> #include <x86_non_dsx_common_pwrseq_sm_handler.h> -bool ap_power_in_state( - enum ap_power_state_mask state_mask) +LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); + +bool ap_power_in_state(enum ap_power_state_mask state_mask) { int need_mask = 0; switch (pwr_sm_get_state()) { + case SYS_POWER_STATE_UNINIT: + LOG_WRN("%s: init not yet complete; AP state is unknown", + __func__); + return false; case SYS_POWER_STATE_G3: need_mask = AP_POWER_STATE_HARD_OFF; break; @@ -21,16 +26,14 @@ bool ap_power_in_state( * In between hard and soft off states. Match only if caller * will accept both. */ - need_mask = AP_POWER_STATE_HARD_OFF | - AP_POWER_STATE_SOFT_OFF; + need_mask = AP_POWER_STATE_HARD_OFF | AP_POWER_STATE_SOFT_OFF; break; case SYS_POWER_STATE_S5: need_mask = AP_POWER_STATE_SOFT_OFF; break; case SYS_POWER_STATE_S5S4: case SYS_POWER_STATE_S4S5: - need_mask = AP_POWER_STATE_SOFT_OFF | - AP_POWER_STATE_SUSPEND; + need_mask = AP_POWER_STATE_SOFT_OFF | AP_POWER_STATE_SUSPEND; break; case SYS_POWER_STATE_S4: case SYS_POWER_STATE_S4S3: @@ -40,8 +43,7 @@ bool ap_power_in_state( break; case SYS_POWER_STATE_S3S0: case SYS_POWER_STATE_S0S3: - need_mask = AP_POWER_STATE_SUSPEND | - AP_POWER_STATE_ON; + need_mask = AP_POWER_STATE_SUSPEND | AP_POWER_STATE_ON; break; case SYS_POWER_STATE_S0: need_mask = AP_POWER_STATE_ON; @@ -60,10 +62,13 @@ bool ap_power_in_state( return (state_mask & need_mask) == need_mask; } -bool ap_power_in_or_transitioning_to_state( - enum ap_power_state_mask state_mask) +bool ap_power_in_or_transitioning_to_state(enum ap_power_state_mask state_mask) { switch (pwr_sm_get_state()) { + case SYS_POWER_STATE_UNINIT: + LOG_WRN("%s: init not yet complete; AP state is unknown", + __func__); + return 0; case SYS_POWER_STATE_G3: case SYS_POWER_STATE_S5G3: return state_mask & AP_POWER_STATE_HARD_OFF; @@ -107,7 +112,7 @@ void ap_power_exit_hardoff(void) power_state != SYS_POWER_STATE_S5G3 && power_state != SYS_POWER_STATE_S5) return; - request_exit_hardoff(true); + request_start_from_g3(); } void ap_power_init_reset_log(void) diff --git a/zephyr/subsys/ap_pwrseq/include/ap_power_host_sleep.h b/zephyr/subsys/ap_pwrseq/include/ap_power_host_sleep.h index 9bee8af826..7251f96b76 100644 --- a/zephyr/subsys/ap_pwrseq/include/ap_power_host_sleep.h +++ b/zephyr/subsys/ap_pwrseq/include/ap_power_host_sleep.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,8 +22,8 @@ void ap_power_set_active_wake_mask(void); * * @return 0 for success; -EINVAL if power state is not S3/S5/S0ix */ -int ap_power_get_lazy_wake_mask( - enum power_states_ndsx state, host_event_t *mask); +int ap_power_get_lazy_wake_mask(enum power_states_ndsx state, + host_event_t *mask); #if CONFIG_AP_PWRSEQ_S0IX /* For S0ix path, flag to notify sleep change */ @@ -56,4 +56,17 @@ enum ap_power_sleep_type ap_power_sleep_get_notify(void); void ap_power_sleep_notify_transition(enum ap_power_sleep_type check_state); #endif /* CONFIG_AP_PWRSEQ_S0IX */ +/* + * Get sleep timeout from host command context + */ +uint16_t host_get_sleep_timeout(void); + +/* + * Set sleep transitions for host command response + * + * @param val sleep transitions + * + */ +void host_set_sleep_transitions(uint32_t val); + #endif /* __AP_PWRSEQ_HOST_SLEEP_H */ diff --git a/zephyr/subsys/ap_pwrseq/include/ap_power_override_functions.h b/zephyr/subsys/ap_pwrseq/include/ap_power_override_functions.h index 229bfb7e60..0d9195e5f2 100644 --- a/zephyr/subsys/ap_pwrseq/include/ap_power_override_functions.h +++ b/zephyr/subsys/ap_pwrseq/include/ap_power_override_functions.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -75,7 +75,7 @@ bool board_ap_power_check_power_rails_enabled(void); /** * @brief macro to access configuration properties from DTS */ -#define AP_PWRSEQ_DT_VALUE(p) \ - DT_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(intel_ap_pwrseq), p) \ +#define AP_PWRSEQ_DT_VALUE(p) \ + DT_PROP(DT_COMPAT_GET_ANY_STATUS_OKAY(intel_ap_pwrseq), p) #endif /* __AP_PWRSEQ_AP_POWER_BOARD_FUNCTIONS_H__ */ diff --git a/zephyr/subsys/ap_pwrseq/include/power_signals.h b/zephyr/subsys/ap_pwrseq/include/power_signals.h index 8755f1005a..5d3e97a52e 100644 --- a/zephyr/subsys/ap_pwrseq/include/power_signals.h +++ b/zephyr/subsys/ap_pwrseq/include/power_signals.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -48,10 +48,10 @@ * included if that signal source is configured in the * devicetree. */ -#define HAS_GPIO_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_gpio) -#define HAS_VW_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_vw) -#define HAS_EXT_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_external) -#define HAS_ADC_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_adc) +#define HAS_GPIO_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_gpio) +#define HAS_VW_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_vw) +#define HAS_EXT_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_external) +#define HAS_ADC_SIGNALS DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq_adc) /** * @brief Definitions for AP power sequence signals. @@ -62,11 +62,9 @@ /** * @brief Generate the enum for this power signal. */ -#define PWR_SIGNAL_ENUM(id) \ - DT_STRING_UPPER_TOKEN(id, enum_name) +#define PWR_SIGNAL_ENUM(id) DT_STRING_UPPER_TOKEN(id, enum_name) -#define PWR_SIGNAL_ENUM_COMMA(id) \ - PWR_SIGNAL_ENUM(id), +#define PWR_SIGNAL_ENUM_COMMA(id) PWR_SIGNAL_ENUM(id), /** * @brief Enum of all power signals. * @@ -78,11 +76,14 @@ * must be the same as in power_signals.c */ enum power_signal { -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_gpio, PWR_SIGNAL_ENUM_COMMA) -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_vw, PWR_SIGNAL_ENUM_COMMA) -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_external, PWR_SIGNAL_ENUM_COMMA) -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_adc, PWR_SIGNAL_ENUM_COMMA) - POWER_SIGNAL_COUNT, + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_gpio, PWR_SIGNAL_ENUM_COMMA) + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_vw, + PWR_SIGNAL_ENUM_COMMA) + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_external, + PWR_SIGNAL_ENUM_COMMA) + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_adc, + PWR_SIGNAL_ENUM_COMMA) + POWER_SIGNAL_COUNT, }; #undef PWR_SIGNAL_ENUM_COMMA @@ -301,8 +302,7 @@ static inline bool power_signals_off(power_signal_mask_t want) * @return negative If the signals did not match before the timeout. */ int power_wait_mask_signals_timeout(power_signal_mask_t want, - power_signal_mask_t mask, - int timeout); + power_signal_mask_t mask, int timeout); /** * @brief Wait until the selected power signals match, with timeout diff --git a/zephyr/subsys/ap_pwrseq/include/signal_adc.h b/zephyr/subsys/ap_pwrseq/include/signal_adc.h index e43e73e1a7..81c6a1edd4 100644 --- a/zephyr/subsys/ap_pwrseq/include/signal_adc.h +++ b/zephyr/subsys/ap_pwrseq/include/signal_adc.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ #ifndef __AP_PWRSEQ_SIGNAL_ADC_H__ #define __AP_PWRSEQ_SIGNAL_ADC_H__ -#define PWR_SIG_TAG_ADC PWR_ADC_ +#define PWR_SIG_TAG_ADC PWR_ADC_ /* * Generate enums for the analogue converters. @@ -21,13 +21,13 @@ enum pwr_sig_adc { #if HAS_ADC_SIGNALS -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_adc, PWR_ADC_ENUM) + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_adc, PWR_ADC_ENUM) #endif - PWR_SIG_ADC_COUNT + PWR_SIG_ADC_COUNT }; -#undef PWR_ADC_ENUM -#undef TAG_ADC +#undef PWR_ADC_ENUM +#undef TAG_ADC /** * @brief Get the value of the ADC power signal. diff --git a/zephyr/subsys/ap_pwrseq/include/signal_gpio.h b/zephyr/subsys/ap_pwrseq/include/signal_gpio.h index e797f0c21f..7cdd4ec316 100644 --- a/zephyr/subsys/ap_pwrseq/include/signal_gpio.h +++ b/zephyr/subsys/ap_pwrseq/include/signal_gpio.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ #ifndef __AP_PWRSEQ_SIGNAL_GPIO_H__ #define __AP_PWRSEQ_SIGNAL_GPIO_H__ -#define PWR_SIG_TAG_GPIO PWR_GPIO_ +#define PWR_SIG_TAG_GPIO PWR_GPIO_ /* * Generate enums for the GPIOs. @@ -21,13 +21,13 @@ enum pwr_sig_gpio { #if HAS_GPIO_SIGNALS -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_gpio, PWR_GPIO_ENUM) + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_gpio, PWR_GPIO_ENUM) #endif - PWR_SIG_GPIO_COUNT + PWR_SIG_GPIO_COUNT }; -#undef PWR_GPIO_ENUM -#undef TAG_GPIO +#undef PWR_GPIO_ENUM +#undef TAG_GPIO /** * @brief Get the value of the GPIO power signal. diff --git a/zephyr/subsys/ap_pwrseq/include/signal_vw.h b/zephyr/subsys/ap_pwrseq/include/signal_vw.h index d005daaa40..55ecc73e99 100644 --- a/zephyr/subsys/ap_pwrseq/include/signal_vw.h +++ b/zephyr/subsys/ap_pwrseq/include/signal_vw.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ #ifndef __AP_PWRSEQ_SIGNAL_VW_H__ #define __AP_PWRSEQ_SIGNAL_VW_H__ -#define PWR_SIG_TAG_VW PWR_VW_ +#define PWR_SIG_TAG_VW PWR_VW_ /* * Generate enums for the virtual wire signals. @@ -21,13 +21,13 @@ enum pwr_sig_vw { #if HAS_VW_SIGNALS -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_vw, PWR_VW_ENUM) + DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_vw, PWR_VW_ENUM) #endif - PWR_SIG_VW_COUNT + PWR_SIG_VW_COUNT }; -#undef PWR_VW_ENUM -#undef TAG_VW +#undef PWR_VW_ENUM +#undef TAG_VW /** * @brief Get the value of the virtual wire signal. diff --git a/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h b/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h index 526b0b6ca6..dcb2b3b968 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_common_pwrseq.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -16,11 +16,6 @@ struct pwrseq_context { /* On power-on start boot up sequence */ enum power_states_ndsx power_state; - /* Indicate should exit G3 power state or not */ - bool want_g3_exit; - /* Indicate to exit G3 state or not with delay in ms*/ - uint32_t reboot_ap_at_g3_delay_ms; - }; #endif /* __X86_COMMON_PWRSEQ_H__ */ diff --git a/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h b/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h index f874879f04..2320e61965 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,7 +15,7 @@ #include <ap_power_host_sleep.h> #include <x86_common_pwrseq.h> -#define DT_DRV_COMPAT intel_ap_pwrseq +#define DT_DRV_COMPAT intel_ap_pwrseq /* The wait time is ~150 msec, allow for safety margin. */ #define IN_PCH_SLP_SUS_WAIT_TIME_MS 250 @@ -23,11 +23,11 @@ enum power_states_ndsx chipset_pwr_sm_run(enum power_states_ndsx curr_state); void init_chipset_pwr_seq_state(void); enum power_states_ndsx chipset_pwr_seq_get_state(void); -void request_exit_hardoff(bool should_exit); +void request_start_from_g3(void); enum power_states_ndsx pwr_sm_get_state(void); -const char * const pwr_sm_get_state_name(enum power_states_ndsx state); +const char *const pwr_sm_get_state_name(enum power_states_ndsx state); void apshutdown(void); void ap_pwrseq_handle_chipset_reset(void); -void set_reboot_ap_at_g3_delay_seconds(uint32_t d_time); +void set_start_from_g3_delay_seconds(uint32_t d_time); #endif /* __X86_NON_DSX_COMMON_PWRSEQ_SM_HANDLER_H__ */ diff --git a/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h b/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h index 4e1277dce7..7c7e25d951 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_power_signals.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,11 +8,15 @@ #ifndef __X86_POWER_SIGNALS_H__ #define __X86_POWER_SIGNALS_H__ -#define IN_PCH_SLP_S0 POWER_SIGNAL_MASK(PWR_SLP_S0) -#define IN_PCH_SLP_S3 POWER_SIGNAL_MASK(PWR_SLP_S3) -#define IN_PCH_SLP_S4 POWER_SIGNAL_MASK(PWR_SLP_S4) -#define IN_PCH_SLP_S5 POWER_SIGNAL_MASK(PWR_SLP_S5) +#define IN_PCH_SLP_S0 POWER_SIGNAL_MASK(PWR_SLP_S0) +#define IN_PCH_SLP_S3 POWER_SIGNAL_MASK(PWR_SLP_S3) +#define IN_PCH_SLP_S4 POWER_SIGNAL_MASK(PWR_SLP_S4) +#define IN_PCH_SLP_S5 POWER_SIGNAL_MASK(PWR_SLP_S5) +/* + * Define the chipset specific power signal masks and values + * matching the AP state. + */ #if defined(CONFIG_AP_X86_INTEL_ADL) /* Input state flags */ @@ -21,18 +25,31 @@ #define PWRSEQ_G3S5_UP_SIGNAL IN_PCH_SLP_SUS #define PWRSEQ_G3S5_UP_VALUE 0 -#define MASK_ALL_POWER_GOOD \ - (POWER_SIGNAL_MASK(PWR_RSMRST) | \ - POWER_SIGNAL_MASK(PWR_ALL_SYS_PWRGD) | \ - POWER_SIGNAL_MASK(PWR_DSW_PWROK) | \ - POWER_SIGNAL_MASK(PWR_PG_PP1P05)) -#define MASK_S0 \ - (MASK_ALL_POWER_GOOD | \ - POWER_SIGNAL_MASK(PWR_SLP_S0) | \ - POWER_SIGNAL_MASK(PWR_SLP_S3) | \ - POWER_SIGNAL_MASK(PWR_SLP_SUS) | \ - POWER_SIGNAL_MASK(PWR_SLP_S4) | \ +#define MASK_ALL_POWER_GOOD \ + (POWER_SIGNAL_MASK(PWR_RSMRST) | \ + POWER_SIGNAL_MASK(PWR_ALL_SYS_PWRGD) | \ + POWER_SIGNAL_MASK(PWR_DSW_PWROK) | POWER_SIGNAL_MASK(PWR_PG_PP1P05)) + +#define MASK_VW_POWER \ + (POWER_SIGNAL_MASK(PWR_RSMRST) | POWER_SIGNAL_MASK(PWR_DSW_PWROK) | \ + POWER_SIGNAL_MASK(PWR_SLP_SUS)) +#define VALUE_VW_POWER \ + (POWER_SIGNAL_MASK(PWR_RSMRST) | POWER_SIGNAL_MASK(PWR_DSW_PWROK)) + +#define MASK_S0 \ + (MASK_ALL_POWER_GOOD | POWER_SIGNAL_MASK(PWR_SLP_S0) | \ + POWER_SIGNAL_MASK(PWR_SLP_S3) | POWER_SIGNAL_MASK(PWR_SLP_SUS) | \ + POWER_SIGNAL_MASK(PWR_SLP_S4) | POWER_SIGNAL_MASK(PWR_SLP_S5)) +#define VALUE_S0 MASK_ALL_POWER_GOOD + +#define MASK_S3 MASK_S0 +#define VALUE_S3 (MASK_ALL_POWER_GOOD | POWER_SIGNAL_MASK(PWR_SLP_S3)) + +#define MASK_S5 \ + (POWER_SIGNAL_MASK(PWR_RSMRST) | POWER_SIGNAL_MASK(PWR_DSW_PWROK) | \ + POWER_SIGNAL_MASK(PWR_SLP_S3) | POWER_SIGNAL_MASK(PWR_SLP_S4) | \ POWER_SIGNAL_MASK(PWR_SLP_S5)) +#define VALUE_S5 MASK_S5 #elif defined(CONFIG_AP_X86_INTEL_MTL) @@ -41,21 +58,27 @@ #define PWRSEQ_G3S5_UP_VALUE IN_PGOOD_ALL_CORE #define MASK_ALL_POWER_GOOD \ - (POWER_SIGNAL_MASK(PWR_RSMRST) | \ - POWER_SIGNAL_MASK(PWR_ALL_SYS_PWRGD)) -#define MASK_S0 \ - (MASK_ALL_POWER_GOOD | \ - POWER_SIGNAL_MASK(PWR_SLP_S0) | \ - POWER_SIGNAL_MASK(PWR_SLP_S3) | \ - POWER_SIGNAL_MASK(PWR_SLP_S4) | \ + (POWER_SIGNAL_MASK(PWR_RSMRST) | POWER_SIGNAL_MASK(PWR_ALL_SYS_PWRGD)) + +#define MASK_VW_POWER POWER_SIGNAL_MASK(PWR_RSMRST) +#define VALUE_VW_POWER POWER_SIGNAL_MASK(PWR_RSMRST) + +#define MASK_S0 \ + (MASK_ALL_POWER_GOOD | POWER_SIGNAL_MASK(PWR_SLP_S0) | \ + POWER_SIGNAL_MASK(PWR_SLP_S3) | POWER_SIGNAL_MASK(PWR_SLP_S4) | \ POWER_SIGNAL_MASK(PWR_SLP_S5)) +#define VALUE_S0 MASK_ALL_POWER_GOOD + +#define MASK_S3 MASK_S0 +#define VALUE_S3 (MASK_ALL_POWER_GOOD | POWER_SIGNAL_MASK(PWR_SLP_S3)) + +#define MASK_S5 \ + (POWER_SIGNAL_MASK(PWR_RSMRST) | POWER_SIGNAL_MASK(PWR_SLP_S3) | \ + POWER_SIGNAL_MASK(PWR_SLP_S4) | POWER_SIGNAL_MASK(PWR_SLP_S5)) +#define VALUE_S5 MASK_S5 #else #warning("Input power signals state flags not defined"); #endif -#define MASK_S5 \ - (MASK_ALL_POWER_GOOD | \ - POWER_SIGNAL_MASK(PWR_SLP_S5)) - #endif /* __X86_POWER_SIGNALS_H__ */ diff --git a/zephyr/subsys/ap_pwrseq/power_host_sleep.c b/zephyr/subsys/ap_pwrseq/power_host_sleep.c index ff512fa941..30025d21ea 100644 --- a/zephyr/subsys/ap_pwrseq/power_host_sleep.c +++ b/zephyr/subsys/ap_pwrseq/power_host_sleep.c @@ -1,9 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <ap_power/ap_power_interface.h> +#include <ap_power/ap_pwrseq.h> #include <x86_non_dsx_common_pwrseq_sm_handler.h> LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); @@ -11,8 +12,9 @@ LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); #if CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI /* If host doesn't program S0ix lazy wake mask, use default S0ix mask */ -#define DEFAULT_WAKE_MASK_S0IX (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) +#define DEFAULT_WAKE_MASK_S0IX \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) /* * Set the wake mask according to the current power state: @@ -33,7 +35,7 @@ void power_update_wake_mask(void) if (state == SYS_POWER_STATE_S0) wake_mask = 0; else if (lpc_is_active_wm_set_by_host() || - ap_power_get_lazy_wake_mask(state, &wake_mask)) + ap_power_get_lazy_wake_mask(state, &wake_mask)) return; #if CONFIG_AP_PWRSEQ_S0IX if ((state == SYS_POWER_STATE_S0ix) && (wake_mask == 0)) @@ -48,8 +50,8 @@ static void power_update_wake_mask_deferred(struct k_work *work) power_update_wake_mask(); } -static K_WORK_DELAYABLE_DEFINE( - power_update_wake_mask_deferred_data, power_update_wake_mask_deferred); +static K_WORK_DELAYABLE_DEFINE(power_update_wake_mask_deferred_data, + power_update_wake_mask_deferred); void ap_power_set_active_wake_mask(void) { @@ -74,14 +76,16 @@ void ap_power_set_active_wake_mask(void) * has changed again and the work is not processed, we should * reschedule it. */ - rv = k_work_reschedule( - &power_update_wake_mask_deferred_data, K_MSEC(5)); + rv = k_work_reschedule(&power_update_wake_mask_deferred_data, + K_MSEC(5)); } __ASSERT(rv >= 0, "Set wake mask work queue error"); } #else /* CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI */ -static void ap_power_set_active_wake_mask(void) { } +static void ap_power_set_active_wake_mask(void) +{ +} #endif /* CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI */ #if CONFIG_AP_PWRSEQ_S0IX @@ -180,11 +184,14 @@ void ap_power_sleep_notify_transition(enum ap_power_sleep_type check_state) #if CONFIG_AP_PWRSEQ_HOST_SLEEP #define HOST_SLEEP_EVENT_DEFAULT_RESET 0 +static struct host_sleep_event_context *g_ctx; + void ap_power_reset_host_sleep_state(void) { power_set_host_sleep_state(HOST_SLEEP_EVENT_DEFAULT_RESET); - ap_power_chipset_handle_host_sleep_event( - HOST_SLEEP_EVENT_DEFAULT_RESET, NULL); + ap_power_ev_send_callbacks(AP_POWER_S0IX_RESET_TRACKING); + ap_power_chipset_handle_host_sleep_event(HOST_SLEEP_EVENT_DEFAULT_RESET, + NULL); } /* TODO: hook to reset event */ @@ -195,19 +202,21 @@ void ap_power_handle_chipset_reset(void) } void ap_power_chipset_handle_host_sleep_event( - enum host_sleep_event state, - struct host_sleep_event_context *ctx) + enum host_sleep_event state, struct host_sleep_event_context *ctx) { LOG_DBG("host sleep event = %d!", state); + + g_ctx = ctx; + #if CONFIG_AP_PWRSEQ_S0IX if (state == HOST_SLEEP_EVENT_S0IX_SUSPEND) { - /* * Indicate to power state machine that a new host event for * s0ix/s3 suspend has been received and so chipset suspend * notification needs to be sent to listeners. */ ap_power_sleep_set_notify(AP_POWER_SLEEP_SUSPEND); + ap_power_ev_send_callbacks(AP_POWER_S0IX_SUSPEND_START); power_signal_enable(PWR_SLP_S0); } else if (state == HOST_SLEEP_EVENT_S0IX_RESUME) { @@ -218,6 +227,7 @@ void ap_power_chipset_handle_host_sleep_event( ap_power_sleep_set_notify(AP_POWER_SLEEP_RESUME); power_s0ix_resume_restore_masks(); power_signal_disable(PWR_SLP_S0); + ap_power_ev_send_callbacks(AP_POWER_S0IX_RESUME_COMPLETE); /* * If the sleep signal timed out and never transitioned, then @@ -231,6 +241,17 @@ void ap_power_chipset_handle_host_sleep_event( power_signal_disable(PWR_SLP_S0); } #endif /* CONFIG_AP_PWRSEQ_S0IX */ + ap_pwrseq_wake(); +} + +uint16_t host_get_sleep_timeout(void) +{ + return g_ctx->sleep_timeout_ms; +} + +void host_set_sleep_transitions(uint32_t val) +{ + g_ctx->sleep_transitions = val; } #endif /* CONFIG_AP_PWRSEQ_HOST_SLEEP */ diff --git a/zephyr/subsys/ap_pwrseq/power_signals.c b/zephyr/subsys/ap_pwrseq/power_signals.c index 135a0d9ac1..a02eef6e6b 100644 --- a/zephyr/subsys/ap_pwrseq/power_signals.c +++ b/zephyr/subsys/ap_pwrseq/power_signals.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,6 +8,7 @@ #include <zephyr/logging/log.h> #include <zephyr/sys/atomic.h> +#include <ap_power/ap_pwrseq.h> #include <power_signals.h> #include "signal_gpio.h" @@ -18,7 +19,7 @@ LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); #if DT_HAS_COMPAT_STATUS_OKAY(intel_ap_pwrseq) BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(intel_ap_pwrseq) == 1, - "Only one node for intel_ap_pwrseq is allowed"); + "Only one node for intel_ap_pwrseq is allowed"); #endif BUILD_ASSERT(POWER_SIGNAL_COUNT <= 32, "Too many power signals"); @@ -41,49 +42,46 @@ struct ps_config { #define TAG_PWR_ENUM(tag, name) DT_CAT(tag, name) -#define PWR_ENUM(id, tag) \ - TAG_PWR_ENUM(tag, PWR_SIGNAL_ENUM(id)) +#define PWR_ENUM(id, tag) TAG_PWR_ENUM(tag, PWR_SIGNAL_ENUM(id)) -#define DBGNAME(id) \ - "(" DT_PROP(id, enum_name) ") " \ - DT_PROP(id, dbg_label) +#define DBGNAME(id) "(" DT_PROP(id, enum_name) ") " DT_PROP(id, dbg_label) -#define GEN_PS_ENTRY(id, src, tag) \ -{ \ - .debug_name = DBGNAME(id), \ - .source = src, \ - .src_enum = PWR_ENUM(id, tag), \ -}, - -#define GEN_PS_ENTRY_NO_ENUM(id, src) \ -{ \ - .debug_name = DBGNAME(id), \ - .source = src, \ -}, +#define GEN_PS_ENTRY(id, src, tag) \ + { \ + .debug_name = DBGNAME(id), \ + .source = src, \ + .src_enum = PWR_ENUM(id, tag), \ + }, +#define GEN_PS_ENTRY_NO_ENUM(id, src) \ + { \ + .debug_name = DBGNAME(id), \ + .source = src, \ + }, /* * Generate the power signal configuration array. */ static const struct ps_config sig_config[] = { -DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_gpio, GEN_PS_ENTRY, - PWR_SIG_SRC_GPIO, PWR_SIG_TAG_GPIO) -DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_vw, GEN_PS_ENTRY, - PWR_SIG_SRC_VW, PWR_SIG_TAG_VW) -DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_external, GEN_PS_ENTRY_NO_ENUM, - PWR_SIG_SRC_EXT) -DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_adc, GEN_PS_ENTRY, - PWR_SIG_SRC_ADC, PWR_SIG_TAG_ADC) + DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_gpio, GEN_PS_ENTRY, + PWR_SIG_SRC_GPIO, PWR_SIG_TAG_GPIO) + DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_vw, GEN_PS_ENTRY, + PWR_SIG_SRC_VW, PWR_SIG_TAG_VW) + DT_FOREACH_STATUS_OKAY_VARGS(intel_ap_pwrseq_external, + GEN_PS_ENTRY_NO_ENUM, + PWR_SIG_SRC_EXT) + DT_FOREACH_STATUS_OKAY_VARGS( + intel_ap_pwrseq_adc, GEN_PS_ENTRY, + PWR_SIG_SRC_ADC, PWR_SIG_TAG_ADC) }; -#define PWR_SIGNAL_POLLED(id) PWR_SIGNAL_ENUM(id), +#define PWR_SIGNAL_POLLED(id) PWR_SIGNAL_ENUM(id), /* * List of power signals that need to be polled. */ -static const uint8_t polled_signals[] = { -DT_FOREACH_STATUS_OKAY(intel_ap_pwrseq_external, PWR_SIGNAL_POLLED) -}; +static const uint8_t polled_signals[] = { DT_FOREACH_STATUS_OKAY( + intel_ap_pwrseq_external, PWR_SIGNAL_POLLED) }; /* * Bitmasks of power signals. A previous copy is held so that @@ -112,7 +110,7 @@ static inline void check_debug(enum power_signal signal) */ if ((CONFIG_AP_PWRSEQ_LOG_LEVEL >= LOG_LEVEL_INF) && (debug_signals & POWER_SIGNAL_MASK(signal))) { - bool value = atomic_test_bit(&power_signals, signal); + bool value = atomic_test_bit(&power_signals, signal); if (value != atomic_test_bit(&prev_power_signals, signal)) { LOG_INF("%s -> %d", power_signal_name(signal), value); @@ -137,11 +135,11 @@ void power_signal_interrupt(enum power_signal signal, int value) { atomic_set_bit_to(&power_signals, signal, value); check_debug(signal); + ap_pwrseq_wake(); } int power_wait_mask_signals_timeout(power_signal_mask_t mask, - power_signal_mask_t want, - int timeout) + power_signal_mask_t want, int timeout) { if (mask == 0) { return 0; @@ -166,7 +164,7 @@ int power_signal_get(enum power_signal signal) cp = &sig_config[signal]; switch (cp->source) { default: - return -EINVAL; /* should never happen */ + return -EINVAL; /* should never happen */ #if HAS_GPIO_SIGNALS case PWR_SIG_SRC_GPIO: diff --git a/zephyr/subsys/ap_pwrseq/signal_adc.c b/zephyr/subsys/ap_pwrseq/signal_adc.c index 4b8f0e0366..c23cd0d30a 100644 --- a/zephyr/subsys/ap_pwrseq/signal_adc.c +++ b/zephyr/subsys/ap_pwrseq/signal_adc.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,7 +11,7 @@ #include <power_signals.h> #include <signal_adc.h> -#define MY_COMPAT intel_ap_pwrseq_adc +#define MY_COMPAT intel_ap_pwrseq_adc #if HAS_ADC_SIGNALS @@ -26,74 +26,59 @@ struct adc_config { enum power_signal signal; }; -#define ADC_HIGH_DEV(id) DEVICE_DT_GET(DT_IO_CHANNELS_CTLR(id)) +#define ADC_HIGH_DEV(id) DEVICE_DT_GET(DT_IO_CHANNELS_CTLR(id)) -#define ADC_HIGH_CHAN(id) DT_IO_CHANNELS_INPUT(id) +#define ADC_HIGH_CHAN(id) DT_IO_CHANNELS_INPUT(id) -#define ADC_THRESH(id) DT_PROP(id, threshold_mv) +#define ADC_THRESH(id) DT_PROP(id, threshold_mv) -#define INIT_ADC_CONFIG(id) \ -{ \ - .dev_trig_high = DEVICE_DT_GET(DT_PHANDLE(id, trigger_high)), \ - .dev_trig_low = DEVICE_DT_GET(DT_PHANDLE(id, trigger_low)), \ - .adc_dev = ADC_HIGH_DEV(DT_PHANDLE(id, trigger_high)), \ - .adc_ch = ADC_HIGH_CHAN(DT_PHANDLE(id, trigger_high)), \ - .threshold = ADC_THRESH(DT_PHANDLE(id, trigger_high)), \ - .signal = PWR_SIGNAL_ENUM(id), \ -}, +#define INIT_ADC_CONFIG(id) \ + { \ + .dev_trig_high = DEVICE_DT_GET(DT_PHANDLE(id, trigger_high)), \ + .dev_trig_low = DEVICE_DT_GET(DT_PHANDLE(id, trigger_low)), \ + .adc_dev = ADC_HIGH_DEV(DT_PHANDLE(id, trigger_high)), \ + .adc_ch = ADC_HIGH_CHAN(DT_PHANDLE(id, trigger_high)), \ + .threshold = ADC_THRESH(DT_PHANDLE(id, trigger_high)), \ + .signal = PWR_SIGNAL_ENUM(id), \ + }, -static const struct adc_config config[] = { -DT_FOREACH_STATUS_OKAY(MY_COMPAT, INIT_ADC_CONFIG) -}; +static const struct adc_config config[] = { DT_FOREACH_STATUS_OKAY( + MY_COMPAT, INIT_ADC_CONFIG) }; /* * Bit allocations for atomic state */ -enum { - ADC_BIT_VALUE = 0, - ADC_BIT_LOW_ENABLED = 1, - ADC_BIT_HIGH_ENABLED = 2 -}; +enum { ADC_BIT_VALUE = 0, ADC_BIT_LOW_ENABLED = 1, ADC_BIT_HIGH_ENABLED = 2 }; atomic_t adc_state[ARRAY_SIZE(config)]; -static void set_trigger(const struct device *dev, - atomic_t *state, - int bit, +static void set_trigger(const struct device *dev, atomic_t *state, int bit, bool enable) { /* * Only enable or disable if the trigger is not * already enabled or disabled. */ - if (enable - ? !atomic_test_and_set_bit(state, bit) - : atomic_test_and_clear_bit(state, bit)) { + if (enable ? !atomic_test_and_set_bit(state, bit) : + atomic_test_and_clear_bit(state, bit)) { struct sensor_value val; val.val1 = enable; - sensor_attr_set(dev, - SENSOR_CHAN_VOLTAGE, - SENSOR_ATTR_ALERT, + sensor_attr_set(dev, SENSOR_CHAN_VOLTAGE, SENSOR_ATTR_ALERT, &val); } } static void set_low_trigger(enum pwr_sig_adc adc, bool enable) { - set_trigger(config[adc].dev_trig_low, - &adc_state[adc], - ADC_BIT_LOW_ENABLED, - enable); - + set_trigger(config[adc].dev_trig_low, &adc_state[adc], + ADC_BIT_LOW_ENABLED, enable); } static void set_high_trigger(enum pwr_sig_adc adc, bool enable) { - set_trigger(config[adc].dev_trig_high, - &adc_state[adc], - ADC_BIT_HIGH_ENABLED, - enable); + set_trigger(config[adc].dev_trig_high, &adc_state[adc], + ADC_BIT_HIGH_ENABLED, enable); } static void trigger_high(enum pwr_sig_adc adc) @@ -156,34 +141,30 @@ int power_signal_adc_disable(enum pwr_sig_adc adc) #define PWR_ADC_ENUM(id) TAG_ADC(PWR_SIG_TAG_ADC, PWR_SIGNAL_ENUM(id)) -#define ADC_CB(id, lev) cb_##lev##_##id +#define ADC_CB(id, lev) cb_##lev##_##id -#define ADC_CB_DEFINE(id, lev) \ -static void ADC_CB(id, lev)(const struct device *dev, \ - const struct sensor_trigger *trigger) \ -{ \ - trigger_##lev(PWR_ADC_ENUM(id)); \ -} +#define ADC_CB_DEFINE(id, lev) \ + static void ADC_CB(id, lev)(const struct device *dev, \ + const struct sensor_trigger *trigger) \ + { \ + trigger_##lev(PWR_ADC_ENUM(id)); \ + } DT_FOREACH_STATUS_OKAY_VARGS(MY_COMPAT, ADC_CB_DEFINE, high) DT_FOREACH_STATUS_OKAY_VARGS(MY_COMPAT, ADC_CB_DEFINE, low) -#define ADC_CB_COMMA(id, lev) ADC_CB(id, lev), +#define ADC_CB_COMMA(id, lev) ADC_CB(id, lev), void power_signal_adc_init(void) { - struct sensor_trigger trig = { - .type = SENSOR_TRIG_THRESHOLD, - .chan = SENSOR_CHAN_VOLTAGE - }; - sensor_trigger_handler_t low_cb[] = { - DT_FOREACH_STATUS_OKAY_VARGS(MY_COMPAT, ADC_CB_COMMA, low) - }; - sensor_trigger_handler_t high_cb[] = { - DT_FOREACH_STATUS_OKAY_VARGS(MY_COMPAT, ADC_CB_COMMA, high) - }; + struct sensor_trigger trig = { .type = SENSOR_TRIG_THRESHOLD, + .chan = SENSOR_CHAN_VOLTAGE }; + sensor_trigger_handler_t low_cb[] = { DT_FOREACH_STATUS_OKAY_VARGS( + MY_COMPAT, ADC_CB_COMMA, low) }; + sensor_trigger_handler_t high_cb[] = { DT_FOREACH_STATUS_OKAY_VARGS( + MY_COMPAT, ADC_CB_COMMA, high) }; int i, rv; - int32_t val; + int32_t val = 0; for (i = 0; i < ARRAY_SIZE(low_cb); i++) { /* @@ -202,11 +183,10 @@ void power_signal_adc_init(void) rv = adc_read(dev, &seq); if (rv) { - LOG_ERR("ADC %s:%d initial read failed", - dev->name, config[i].adc_ch); + LOG_ERR("ADC %s:%d initial read failed", dev->name, + config[i].adc_ch); } else { - adc_raw_to_millivolts(adc_ref_internal(dev), - ADC_GAIN_1, + adc_raw_to_millivolts(adc_ref_internal(dev), ADC_GAIN_1, CONFIG_PLATFORM_EC_ADC_RESOLUTION, &val); if (val >= config[i].threshold) { diff --git a/zephyr/subsys/ap_pwrseq/signal_gpio.c b/zephyr/subsys/ap_pwrseq/signal_gpio.c index 9f8c3adb48..1dbd430bef 100644 --- a/zephyr/subsys/ap_pwrseq/signal_gpio.c +++ b/zephyr/subsys/ap_pwrseq/signal_gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,16 +8,14 @@ #include <zephyr/drivers/gpio.h> #include "system.h" -#define MY_COMPAT intel_ap_pwrseq_gpio +#define MY_COMPAT intel_ap_pwrseq_gpio #if HAS_GPIO_SIGNALS -#define INIT_GPIO_SPEC(id) \ - GPIO_DT_SPEC_GET(id, gpios), +#define INIT_GPIO_SPEC(id) GPIO_DT_SPEC_GET(id, gpios), -const static struct gpio_dt_spec spec[] = { -DT_FOREACH_STATUS_OKAY(MY_COMPAT, INIT_GPIO_SPEC) -}; +const static struct gpio_dt_spec spec[] = { DT_FOREACH_STATUS_OKAY( + MY_COMPAT, INIT_GPIO_SPEC) }; /* * Configuration for GPIO inputs. @@ -29,17 +27,16 @@ struct ps_gpio_int { unsigned no_enable : 1; }; -#define INIT_GPIO_CONFIG(id) \ - { \ - .flags = DT_PROP_OR(id, interrupt_flags, 0), \ - .signal = PWR_SIGNAL_ENUM(id), \ - .no_enable = DT_PROP(id, no_enable), \ - .output = DT_PROP(id, output), \ - }, +#define INIT_GPIO_CONFIG(id) \ + { \ + .flags = DT_PROP_OR(id, interrupt_flags, 0), \ + .signal = PWR_SIGNAL_ENUM(id), \ + .no_enable = DT_PROP(id, no_enable), \ + .output = DT_PROP(id, output), \ + }, -const static struct ps_gpio_int gpio_config[] = { -DT_FOREACH_STATUS_OKAY(MY_COMPAT, INIT_GPIO_CONFIG) -}; +const static struct ps_gpio_int gpio_config[] = { DT_FOREACH_STATUS_OKAY( + MY_COMPAT, INIT_GPIO_CONFIG) }; static struct gpio_callback int_cb[ARRAY_SIZE(gpio_config)]; @@ -103,6 +100,34 @@ int power_signal_gpio_get(enum pwr_sig_gpio index) if (index < 0 || index >= ARRAY_SIZE(gpio_config)) { return -EINVAL; } + /* + * Getting the current value of an output is + * done by retrieving the config and checking what the + * output state has been set to, not by reading the + * physical level of the pin (open drain outputs + * may have a low voltage). + */ + if (IS_ENABLED(CONFIG_GPIO_GET_CONFIG) && gpio_config[index].output) { + int rv; + gpio_flags_t flags; + + rv = gpio_pin_get_config_dt(&spec[index], &flags); + if (rv == 0) { + int pin = (flags & GPIO_OUTPUT_INIT_HIGH) ? 1 : 0; + /* If active low signal, invert it */ + if (spec[index].dt_flags & GPIO_ACTIVE_LOW) { + pin = !pin; + } + return pin; + } + /* + * -ENOSYS is returned when this API call is not supported, + * so drop into the default method of returning the pin value. + */ + if (rv != -ENOSYS) { + return rv; + } + } return gpio_pin_get_dt(&spec[index]); } @@ -123,7 +148,8 @@ void power_signal_gpio_init(void) * to the deasserted state. */ gpio_flags_t out_flags = system_jumped_to_this_image() ? - GPIO_OUTPUT : GPIO_OUTPUT_INACTIVE; + GPIO_OUTPUT : + GPIO_OUTPUT_INACTIVE; for (int i = 0; i < ARRAY_SIZE(gpio_config); i++) { if (gpio_config[i].output) { @@ -133,8 +159,8 @@ void power_signal_gpio_init(void) /* If interrupt, initialise it */ if (gpio_config[i].flags) { gpio_init_callback(&int_cb[i], - power_signal_gpio_interrupt, - BIT(spec[i].pin)); + power_signal_gpio_interrupt, + BIT(spec[i].pin)); gpio_add_callback(spec[i].port, &int_cb[i]); /* * If the interrupt is to be enabled at diff --git a/zephyr/subsys/ap_pwrseq/signal_vw.c b/zephyr/subsys/ap_pwrseq/signal_vw.c index de2756c137..0e9e4affff 100644 --- a/zephyr/subsys/ap_pwrseq/signal_vw.c +++ b/zephyr/subsys/ap_pwrseq/signal_vw.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,40 +9,47 @@ #include "signal_vw.h" -#define MY_COMPAT intel_ap_pwrseq_vw +#define MY_COMPAT intel_ap_pwrseq_vw #if HAS_VW_SIGNALS +/* + * A callback must be registered on the ESPI device (for the + * bus events that are required to be handled) that calls + * power_signal_espi_cb(). + * + * This registration is done in a common ESPI initialisation module so + * that there is no possibility of missing events. + */ + LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); -#define INIT_ESPI_SIGNAL(id) \ -{ \ - .espi_signal = DT_STRING_UPPER_TOKEN(id, virtual_wire), \ - .signal = PWR_SIGNAL_ENUM(id), \ - .invert = DT_PROP(id, vw_invert), \ -}, +#define INIT_ESPI_SIGNAL(id) \ + { \ + .espi_signal = DT_STRING_UPPER_TOKEN(id, virtual_wire), \ + .signal = PWR_SIGNAL_ENUM(id), \ + .invert = DT_PROP(id, vw_invert), \ + }, /* * Struct containing the eSPI virtual wire config. */ struct vw_config { - uint8_t espi_signal; /* associated VW signal */ - uint8_t signal; /* power signal */ - bool invert; /* Invert the signal value */ + uint8_t espi_signal; /* associated VW signal */ + uint8_t signal; /* power signal */ + bool invert; /* Invert the signal value */ }; -const static struct vw_config vw_config[] = { -DT_FOREACH_STATUS_OKAY(MY_COMPAT, INIT_ESPI_SIGNAL) -}; +const static struct vw_config vw_config[] = { DT_FOREACH_STATUS_OKAY( + MY_COMPAT, INIT_ESPI_SIGNAL) }; /* * Current signal value. */ static atomic_t signal_data; /* - * Mask of valid signals. If the bus is reset, this is cleared, - * and when a signal is updated the associated bit is set to indicate - * the signal is valid. + * Mask of valid signals. A signal is considered valid once an + * initial value has been received for it. */ static atomic_t signal_valid; @@ -50,36 +57,63 @@ static atomic_t signal_valid; BUILD_ASSERT(ARRAY_SIZE(vw_config) <= (sizeof(atomic_t) * 8)); -static void espi_handler(const struct device *dev, - struct espi_callback *cb, - struct espi_event event) +/* + * Set the value of the VW signal, and optionally + * call the power signal interrupt handling. + */ +static void vw_set(int index, int data, bool notify) +{ + bool value = vw_config[index].invert ? !data : !!data; + + atomic_set_bit_to(&signal_data, index, value); + atomic_set_bit(&signal_valid, index); + if (notify) { + power_signal_interrupt(vw_config[index].signal, value); + } +} + +/* + * Update all the VW signals. + */ +static void vw_update_all(bool notify) +{ + for (int i = 0; i < ARRAY_SIZE(vw_config); i++) { + uint8_t vw_value; + + if (espi_receive_vwire(espi_dev, vw_config[i].espi_signal, + &vw_value) == 0) { + vw_set(i, vw_value, notify); + } + } +} + +void power_signal_espi_cb(const struct device *dev, struct espi_callback *cb, + struct espi_event event) { - LOG_DBG("ESPI event type 0x%x %d:%d", event.evt_type, - event.evt_details, event.evt_data); + LOG_DBG("ESPI event type 0x%x %d:%d", event.evt_type, event.evt_details, + event.evt_data); switch (event.evt_type) { default: - __ASSERT(0, "ESPI unknown event type: %d", - event.evt_type); + __ASSERT(0, "ESPI unknown event type: %d", event.evt_type); break; - case ESPI_BUS_RESET: - /* - * Clear the signal valid mask. - */ - atomic_clear(&signal_valid); + case ESPI_BUS_EVENT_CHANNEL_READY: + /* Virtual wire channel status change */ + if (event.evt_details == ESPI_CHANNEL_VWIRE) { + if (event.evt_data) { + /* If now ready, update all the signals */ + vw_update_all(true); + } else { + /* If not ready, invalidate the signals */ + atomic_clear(&signal_valid); + } + } break; case ESPI_BUS_EVENT_VWIRE_RECEIVED: for (int i = 0; i < ARRAY_SIZE(vw_config); i++) { if (event.evt_details == vw_config[i].espi_signal) { - bool value = vw_config[i].invert - ? !event.evt_data - : !!event.evt_data; - - atomic_set_bit_to(&signal_data, i, value); - atomic_set_bit(&signal_valid, i); - power_signal_interrupt(vw_config[i].signal, - value); + vw_set(i, event.evt_data, true); } } break; @@ -97,34 +131,12 @@ int power_signal_vw_get(enum pwr_sig_vw vw) void power_signal_vw_init(void) { - static struct espi_callback espi_cb; - - /* Assumes ESPI device is already configured. */ - - /* Configure handler for eSPI events */ - espi_init_callback(&espi_cb, espi_handler, - ESPI_BUS_RESET | - ESPI_BUS_EVENT_VWIRE_RECEIVED); - espi_add_callback(espi_dev, &espi_cb); /* * Check whether the bus is ready, and if so, * initialise the current values of the signals. */ if (espi_get_channel_status(espi_dev, ESPI_CHANNEL_VWIRE)) { - for (int i = 0; i < ARRAY_SIZE(vw_config); i++) { - uint8_t vw_value; - - if (espi_receive_vwire(espi_dev, - vw_config[i].espi_signal, - &vw_value) == 0) { - atomic_set_bit_to(&signal_data, i, - vw_config[i].invert - ? !vw_value - : !!vw_value); - atomic_set_bit(&signal_valid, i); - - } - } + vw_update_all(false); } } diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_adlp_pwrseq_sm.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_adlp_pwrseq_sm.c index 375e93c74f..9ef482b712 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_adlp_pwrseq_sm.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_adlp_pwrseq_sm.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -20,8 +20,7 @@ static int check_pch_out_of_suspend(void) /* * Wait for SLP_SUS deasserted. */ - ret = power_wait_mask_signals_timeout(IN_PCH_SLP_SUS, - 0, + ret = power_wait_mask_signals_timeout(IN_PCH_SLP_SUS, 0, IN_PCH_SLP_SUS_WAIT_TIME_MS); if (ret == 0) { LOG_DBG("SLP_SUS now %d", power_signal_get(PWR_SLP_SUS)); @@ -38,14 +37,21 @@ int all_sys_pwrgd_handler(void) { int retry = 0; + /* SLP_S3 is off */ + if (power_signal_get(PWR_SLP_S3) == 1) { + ap_off(); + return 1; + } + /* TODO: Add condition for no power sequencer */ - k_msleep(AP_PWRSEQ_DT_VALUE(all_sys_pwrgd_timeout)); + power_wait_signals_timeout(POWER_SIGNAL_MASK(PWR_ALL_SYS_PWRGD), + AP_PWRSEQ_DT_VALUE(all_sys_pwrgd_timeout)); if (power_signal_get(PWR_DSW_PWROK) == 0) { - /* Todo: Remove workaround for the retry - * without this change the system hits G3 as it detects - * ALL_SYS_PWRGD as 0 and then 1 as a glitch - */ + /* Todo: Remove workaround for the retry + * without this change the system hits G3 as it detects + * ALL_SYS_PWRGD as 0 and then 1 as a glitch + */ while (power_signal_get(PWR_ALL_SYS_PWRGD) == 0) { if (++retry > 2) { LOG_ERR("PG_EC_ALL_SYS_PWRGD not ok"); @@ -58,7 +64,7 @@ int all_sys_pwrgd_handler(void) /* PG_EC_ALL_SYS_PWRGD is asserted, enable VCCST_PWRGD_OD. */ - if (power_signal_get(PWR_VCCST_PWRGD) == 0) { + if (!power_signals_on(POWER_SIGNAL_MASK(PWR_VCCST_PWRGD))) { k_msleep(AP_PWRSEQ_DT_VALUE(vccst_pwrgd_delay)); power_signal_set(PWR_VCCST_PWRGD, 1); } diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_chipset_power_state.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_chipset_power_state.c index 97268e8fe6..e4ce364cb1 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_chipset_power_state.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_chipset_power_state.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,39 +14,41 @@ LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); */ enum power_states_ndsx chipset_pwr_seq_get_state(void) { + power_signal_mask_t sig = power_get_signals(); + /* - * Chip is shut down. + * Chip is shut down, G3 state. */ - if ((power_get_signals() & MASK_ALL_POWER_GOOD) == 0) { - LOG_DBG("Power rails off, G3 state"); + if ((sig & MASK_ALL_POWER_GOOD) == 0) { + LOG_DBG("All power rails off, G3 state"); return SYS_POWER_STATE_G3; } /* - * If not all the power rails are available, - * then force shutdown to G3 to get to known state. + * Not enough power rails up to read VW signals. + * Force a shutdown. */ - if ((power_get_signals() & MASK_ALL_POWER_GOOD) - != MASK_ALL_POWER_GOOD) { + if ((sig & MASK_VW_POWER) != VALUE_VW_POWER) { + LOG_ERR("Not enough power signals on (%#x), forcing shutdown", + sig); ap_power_force_shutdown(AP_POWER_SHUTDOWN_G3); - LOG_INF("Not all power rails up, forcing shutdown"); return SYS_POWER_STATE_G3; } /* - * All the power rails are good, so + * Enough power signals are up, so * wait for virtual wire signals to become available. * Not sure how long to wait? 5 seconds total. */ for (int delay = 0; delay < 500; k_msleep(10), delay++) { -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3) +#if defined(CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3) if (power_signal_get(PWR_SLP_S3) < 0) continue; #endif -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4) +#if defined(CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4) if (power_signal_get(PWR_SLP_S4) < 0) continue; #endif -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5) +#if defined(CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5) if (power_signal_get(PWR_SLP_S5) < 0) continue; #endif @@ -56,32 +58,34 @@ enum power_states_ndsx chipset_pwr_seq_get_state(void) LOG_DBG("All VW signals valid after %d ms", delay * 10); break; } + /* Re-read the power signals */ + sig = power_get_signals(); + /* * S0, all power OK, no suspend or sleep on. */ - if ((power_get_signals() & MASK_S0) == MASK_ALL_POWER_GOOD) { + if ((sig & MASK_S0) == VALUE_S0) { LOG_DBG("CPU in S0 state"); return SYS_POWER_STATE_S0; } /* * S3, all power OK, PWR_SLP_S3 on. */ - if ((power_get_signals() & MASK_S0) == - (MASK_ALL_POWER_GOOD | POWER_SIGNAL_MASK(PWR_SLP_S3))) { + if ((sig & MASK_S3) == VALUE_S3) { LOG_DBG("CPU in S3 state"); return SYS_POWER_STATE_S3; } /* - * S5, all power OK, PWR_SLP_S5 on. + * S5, some power signals on, PWR_SLP_S5 on. */ - if ((power_get_signals() & MASK_S5) == MASK_S5) { + if ((sig & MASK_S5) == VALUE_S5) { LOG_DBG("CPU in S5 state"); return SYS_POWER_STATE_S5; } /* * Unable to determine state, force to G3. */ + LOG_INF("Unable to determine CPU state (%#x), forcing shutdown", sig); ap_power_force_shutdown(AP_POWER_SHUTDOWN_G3); - LOG_INF("Unable to determine CPU state, forcing shutdown"); return SYS_POWER_STATE_G3; } diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_console.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_console.c index e671e46113..dbceeacc85 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_console.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_console.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,20 +11,19 @@ LOG_MODULE_DECLARE(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); /* Console commands */ static int powerinfo_handler(const struct shell *shell, size_t argc, - char **argv) + char **argv) { enum power_states_ndsx state = pwr_sm_get_state(); shell_fprintf(shell, SHELL_INFO, "power state %d = %s, in 0x%04x\n", - state, pwr_sm_get_state_name(state), - power_get_signals()); + state, pwr_sm_get_state_name(state), power_get_signals()); return 0; } SHELL_CMD_REGISTER(powerinfo, NULL, NULL, powerinfo_handler); static int powerindebug_handler(const struct shell *shell, size_t argc, - char **argv) + char **argv) { int i; char *e; @@ -42,29 +41,29 @@ static int powerindebug_handler(const struct shell *shell, size_t argc, /* Print the mask */ current = power_get_signals(); - shell_fprintf(shell, SHELL_INFO, "power in: 0x%04x\n", current); - shell_fprintf(shell, SHELL_INFO, "debug mask: 0x%04x\n", - power_get_debug()); + shell_fprintf(shell, SHELL_INFO, "power in: 0x%05x\n", current); + shell_fprintf(shell, SHELL_INFO, "debug mask: 0x%05x\n", + power_get_debug()); /* Print the decode */ shell_fprintf(shell, SHELL_INFO, "bit meanings:\n"); for (i = 0; i < POWER_SIGNAL_COUNT; i++) { power_signal_mask_t mask = POWER_SIGNAL_MASK(i); + bool valid = (power_signal_get(i) >= 0); - shell_fprintf(shell, SHELL_INFO, " 0x%04x %d %s\n", - mask, (current & mask) ? 1 : 0, - power_signal_name(i)); + shell_fprintf(shell, SHELL_INFO, " 0x%05x %d%s %s\n", mask, + (current & mask) ? 1 : 0, valid ? " " : "!", + power_signal_name(i)); } return 0; }; -SHELL_CMD_REGISTER(powerindebug, NULL, - "[mask] Get/set power input debug mask", powerindebug_handler); - +SHELL_CMD_REGISTER(powerindebug, NULL, "[mask] Get/set power input debug mask", + powerindebug_handler); static int apshutdown_handler(const struct shell *shell, size_t argc, - char **argv) + char **argv) { ap_power_force_shutdown(AP_POWER_SHUTDOWN_CONSOLE_CMD); return 0; @@ -72,8 +71,7 @@ static int apshutdown_handler(const struct shell *shell, size_t argc, SHELL_CMD_REGISTER(apshutdown, NULL, NULL, apshutdown_handler); -static int apreset_handler(const struct shell *shell, size_t argc, - char **argv) +static int apreset_handler(const struct shell *shell, size_t argc, char **argv) { ap_power_reset(AP_POWER_SHUTDOWN_CONSOLE_CMD); return 0; diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_command.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_command.c index 7bacbcd8cd..ee6e2cf41e 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_command.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_command.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,14 +12,14 @@ host_command_reboot_ap_on_g3(struct host_cmd_handler_args *args) const struct ec_params_reboot_ap_on_g3_v1 *cmd = args->params; /* Store request for processing at g3 */ - request_exit_hardoff(true); + request_start_from_g3(); switch (args->version) { case 0: break; case 1: /* Store user specified delay to wait in G3 state */ - set_reboot_ap_at_g3_delay_seconds(cmd->reboot_ap_at_g3_delay); + set_start_from_g3_delay_seconds(cmd->reboot_ap_at_g3_delay); break; default: return EC_RES_INVALID_PARAM; @@ -27,8 +27,66 @@ host_command_reboot_ap_on_g3(struct host_cmd_handler_args *args) return EC_RES_SUCCESS; } -DECLARE_HOST_COMMAND(EC_CMD_REBOOT_AP_ON_G3, - host_command_reboot_ap_on_g3, +DECLARE_HOST_COMMAND(EC_CMD_REBOOT_AP_ON_G3, host_command_reboot_ap_on_g3, EC_VER_MASK(0) | EC_VER_MASK(1)); +#if CONFIG_AP_PWRSEQ_HOST_SLEEP +/* Track last reported sleep event */ +static enum host_sleep_event host_sleep_state; + +static enum ec_status +host_command_host_sleep_event(struct host_cmd_handler_args *args) +{ + const struct ec_params_host_sleep_event_v1 *p = args->params; + struct ec_response_host_sleep_event_v1 *r = args->response; + struct host_sleep_event_context ctx; + enum host_sleep_event state = p->sleep_event; + + host_sleep_state = state; + ctx.sleep_transitions = 0; + switch (state) { + case HOST_SLEEP_EVENT_S0IX_SUSPEND: + case HOST_SLEEP_EVENT_S3_SUSPEND: + case HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND: + ctx.sleep_timeout_ms = EC_HOST_SLEEP_TIMEOUT_DEFAULT; + + /* The original version contained only state. */ + if (args->version >= 1) + ctx.sleep_timeout_ms = + p->suspend_params.sleep_timeout_ms; + + break; + + default: + break; + } + + ap_power_chipset_handle_host_sleep_event(host_sleep_state, &ctx); + switch (state) { + case HOST_SLEEP_EVENT_S0IX_RESUME: + case HOST_SLEEP_EVENT_S3_RESUME: + if (args->version >= 1) { + r->resume_response.sleep_transitions = + ctx.sleep_transitions; + + args->response_size = sizeof(*r); + } + + break; + + default: + break; + } + + return EC_RES_SUCCESS; +} +DECLARE_HOST_COMMAND(EC_CMD_HOST_SLEEP_EVENT, host_command_host_sleep_event, + EC_VER_MASK(0) | EC_VER_MASK(1)); + +void power_set_host_sleep_state(enum host_sleep_event state) +{ + host_sleep_state = state; +} +#endif /* CONFIG_AP_PWRSEQ_HOST_SLEEP */ + /* End of host commands */ diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_sleep.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_sleep.c new file mode 100644 index 0000000000..015cecb502 --- /dev/null +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_host_sleep.c @@ -0,0 +1,179 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <ap_power_host_sleep.h> +#include <x86_non_dsx_common_pwrseq_sm_handler.h> + +static uint16_t sleep_signal_timeout; +static uint16_t host_sleep_timeout_default = CONFIG_SLEEP_TIMEOUT_MS; +static uint32_t sleep_signal_transitions; +static enum sleep_hang_type timeout_hang_type; + +static void sleep_transition_timeout(struct k_work *work); + +static K_WORK_DELAYABLE_DEFINE(sleep_transition_timeout_data, + sleep_transition_timeout); + +/** + * Type of sleep hang detected + */ +enum sleep_hang_type { + SLEEP_HANG_NONE, + SLEEP_HANG_S0IX_SUSPEND, + SLEEP_HANG_S0IX_RESUME +}; + +void power_chipset_handle_sleep_hang(enum sleep_hang_type hang_type) +{ + /* + * Wake up the AP so they don't just chill in a non-suspended state and + * burn power. Overload a vaguely related event bit since event bits are + * at a premium. If the system never entered S0ix, then manually set the + * wake mask to pretend it did, so that the hang detect event wakes the + * system. + */ + if (pwr_sm_get_state() == SYS_POWER_STATE_S0) { + host_event_t sleep_wake_mask; + + ap_power_get_lazy_wake_mask(SYS_POWER_STATE_S0ix, + &sleep_wake_mask); + lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, sleep_wake_mask); + } + + ccprintf("Warning: Detected sleep hang! Waking host up!"); + host_set_single_event(EC_HOST_EVENT_HANG_DETECT); +} + +static void sleep_transition_timeout(struct k_work *work) +{ + /* Mark the timeout. */ + sleep_signal_transitions |= EC_HOST_RESUME_SLEEP_TIMEOUT; + k_work_cancel_delayable(&sleep_transition_timeout_data); + + if (timeout_hang_type != SLEEP_HANG_NONE) { + power_chipset_handle_sleep_hang(timeout_hang_type); + } +} + +static void sleep_increment_transition(void) +{ + if ((sleep_signal_transitions & EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK) < + EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK) + sleep_signal_transitions += 1; +} + +void sleep_suspend_transition(void) +{ + sleep_increment_transition(); + k_work_cancel_delayable(&sleep_transition_timeout_data); +} + +void sleep_resume_transition(void) +{ + sleep_increment_transition(); + + /* + * Start the timer again to ensure the AP doesn't get itself stuck in + * a state where it's no longer in a sleep state (S0ix/S3), but from + * the Linux perspective is still suspended. Perhaps a bug in the SoC- + * internal periodic housekeeping code might result in a situation + * like this. + */ + if (sleep_signal_timeout) { + timeout_hang_type = SLEEP_HANG_S0IX_RESUME; + k_work_schedule(&sleep_transition_timeout_data, + K_MSEC(sleep_signal_timeout)); + } +} + +void sleep_start_suspend(void) +{ + uint16_t timeout = host_get_sleep_timeout(); + + sleep_signal_transitions = 0; + + /* Use 0xFFFF to disable the timeout */ + if (timeout == EC_HOST_SLEEP_TIMEOUT_INFINITE) { + sleep_signal_timeout = 0; + return; + } + + /* Use zero internally to indicate host doesn't set timeout value; + * we will use default timeout. + */ + if (timeout == EC_HOST_SLEEP_TIMEOUT_DEFAULT) { + timeout = host_sleep_timeout_default; + } + + sleep_signal_timeout = timeout; + timeout_hang_type = SLEEP_HANG_S0IX_SUSPEND; + k_work_schedule(&sleep_transition_timeout_data, K_MSEC(timeout)); +} + +void sleep_complete_resume(void) +{ + /* + * Ensure we don't schedule another sleep_transition_timeout + * if the the HOST_SLEEP_EVENT_S0IX_RESUME message arrives before + * the CHIPSET task transitions to the POWER_S0ixS0 state. + */ + sleep_signal_timeout = 0; + k_work_cancel_delayable(&sleep_transition_timeout_data); + host_set_sleep_transitions(sleep_signal_transitions); +} + +void sleep_reset_tracking(void) +{ + sleep_signal_transitions = 0; + sleep_signal_timeout = 0; + timeout_hang_type = SLEEP_HANG_NONE; +} + +/* + * s0ix event handler. + */ +static void ap_power_sleep_event_handler(struct ap_power_ev_callback *cb, + struct ap_power_ev_data data) +{ + switch (data.event) { + case AP_POWER_S0IX_SUSPEND_START: + sleep_start_suspend(); + break; + case AP_POWER_S0IX_SUSPEND: + sleep_suspend_transition(); + break; + case AP_POWER_S0IX_RESUME: + sleep_resume_transition(); + break; + case AP_POWER_S0IX_RESUME_COMPLETE: + sleep_complete_resume(); + break; + case AP_POWER_S0IX_RESET_TRACKING: + sleep_reset_tracking(); + break; + default: + break; + } +} + +/* + * Registers callback for s0ix events. + */ +static int ap_power_sleep_s0ix_event(const struct device *unused) +{ + static struct ap_power_ev_callback cb; + + /* + * Register for all events. + */ + ap_power_ev_init_callback( + &cb, ap_power_sleep_event_handler, + AP_POWER_S0IX_SUSPEND_START | AP_POWER_S0IX_SUSPEND | + AP_POWER_S0IX_RESUME | AP_POWER_S0IX_RESUME_COMPLETE | + AP_POWER_S0IX_RESET_TRACKING); + ap_power_ev_add_callback(&cb); + return 0; +} +SYS_INIT(ap_power_sleep_s0ix_event, APPLICATION, 1); diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c index 2f38c36684..48cab7f6e7 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_common_pwrseq_sm_handler.c @@ -1,25 +1,42 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <atomic.h> #include <zephyr/init.h> #include <x86_non_dsx_common_pwrseq_sm_handler.h> -static K_KERNEL_STACK_DEFINE(pwrseq_thread_stack, - CONFIG_AP_PWRSEQ_STACK_SIZE); +static K_KERNEL_STACK_DEFINE(pwrseq_thread_stack, CONFIG_AP_PWRSEQ_STACK_SIZE); static struct k_thread pwrseq_thread_data; -static struct pwrseq_context pwrseq_ctx; +static struct pwrseq_context pwrseq_ctx = { + .power_state = SYS_POWER_STATE_UNINIT, +}; +static struct k_sem pwrseq_sem; + +static void s5_inactive_timer_handler(struct k_timer *timer); /* S5 inactive timer*/ -K_TIMER_DEFINE(s5_inactive_timer, NULL, NULL); +K_TIMER_DEFINE(s5_inactive_timer, s5_inactive_timer_handler, NULL); +/* + * Flags, may be set/cleared from other threads. + */ +enum { + S5_INACTIVE_TIMER_RUNNING, + START_FROM_G3, + FLAGS_MAX, +}; +static ATOMIC_DEFINE(flags, FLAGS_MAX); +/* Delay in ms when starting from G3 */ +static uint32_t start_from_g3_delay_ms; LOG_MODULE_REGISTER(ap_pwrseq, CONFIG_AP_PWRSEQ_LOG_LEVEL); /** * @brief power_state names for debug */ -static const char * const pwrsm_dbg[] = { +static const char *const pwrsm_dbg[] = { + [SYS_POWER_STATE_UNINIT] = "Unknown", [SYS_POWER_STATE_G3] = "G3", [SYS_POWER_STATE_S5] = "S5", [SYS_POWER_STATE_S4] = "S4", @@ -48,17 +65,17 @@ static const char * const pwrsm_dbg[] = { */ static inline bool signals_valid(power_signal_mask_t signals) { -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S3) +#if defined(CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S3) if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S3)) && power_signal_get(PWR_SLP_S3) < 0) return false; #endif -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4) +#if defined(CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4) if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S4)) && power_signal_get(PWR_SLP_S4) < 0) return false; #endif -#if defined(CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5) +#if defined(CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5) if ((signals & POWER_SIGNAL_MASK(PWR_SLP_S5)) && power_signal_get(PWR_SLP_S5) < 0) return false; @@ -81,7 +98,7 @@ enum power_states_ndsx pwr_sm_get_state(void) return pwrseq_ctx.power_state; } -const char * const pwr_sm_get_state_name(enum power_states_ndsx state) +const char *const pwr_sm_get_state_name(enum power_states_ndsx state) { return pwrsm_dbg[state]; } @@ -95,14 +112,34 @@ void pwr_sm_set_state(enum power_states_ndsx new_state) pwrseq_ctx.power_state = new_state; } -void request_exit_hardoff(bool should_exit) +void ap_pwrseq_wake(void) { - pwrseq_ctx.want_g3_exit = should_exit; + k_sem_give(&pwrseq_sem); } -static bool chipset_is_exit_hardoff(void) +/* + * Set a flag to enable starting the AP once it is in G3. + * This is called from ap_power_exit_hardoff() which checks + * to ensure that the AP is in S5 or G3 state before calling + * this function. + * It can also be called via a hostcmd, which allows the flag + * to be set in any AP state. + */ +void request_start_from_g3(void) { - return pwrseq_ctx.want_g3_exit; + LOG_INF("Request start from G3"); + atomic_set_bit(flags, START_FROM_G3); + /* + * If in S5, restart the timer to give the CPU more time + * to respond to a power button press (which is presumably + * why we are being called). This avoids having the S5 + * inactivity timer expiring before the AP can process + * the power button press and start up. + */ + if (pwr_sm_get_state() == SYS_POWER_STATE_S5) { + atomic_clear_bit(flags, S5_INACTIVE_TIMER_RUNNING); + } + ap_pwrseq_wake(); } void ap_power_force_shutdown(enum ap_power_shutdown_reason reason) @@ -110,6 +147,11 @@ void ap_power_force_shutdown(enum ap_power_shutdown_reason reason) board_ap_power_force_shutdown(); } +static void s5_inactive_timer_handler(struct k_timer *timer) +{ + ap_pwrseq_wake(); +} + static void shutdown_and_notify(enum ap_power_shutdown_reason reason) { ap_power_force_shutdown(reason); @@ -117,9 +159,9 @@ static void shutdown_and_notify(enum ap_power_shutdown_reason reason) ap_power_ev_send_callbacks(AP_POWER_SHUTDOWN_COMPLETE); } -void set_reboot_ap_at_g3_delay_seconds(uint32_t d_time) +void set_start_from_g3_delay_seconds(uint32_t d_time) { - pwrseq_ctx.reboot_ap_at_g3_delay_ms = d_time * MSEC; + start_from_g3_delay_ms = d_time * MSEC; } void apshutdown(void) @@ -190,15 +232,16 @@ static int common_pwr_sm_run(int state) { switch (state) { case SYS_POWER_STATE_G3: - if (chipset_is_exit_hardoff()) { - request_exit_hardoff(false); - /* - * G3->S0 transition should happen only after the - * user specified delay. Hence, wait until the - * user specified delay times out. - */ - k_msleep(pwrseq_ctx.reboot_ap_at_g3_delay_ms); - pwrseq_ctx.reboot_ap_at_g3_delay_ms = 0; + /* + * If the START_FROM_G3 flag is set, begin starting + * the AP. There may be a delay set, so only start + * after that delay. + */ + if (atomic_test_and_clear_bit(flags, START_FROM_G3)) { + LOG_INF("Starting from G3, delay %d ms", + start_from_g3_delay_ms); + k_msleep(start_from_g3_delay_ms); + start_from_g3_delay_ms = 0; return SYS_POWER_STATE_G3S5; } @@ -207,7 +250,7 @@ static int common_pwr_sm_run(int state) case SYS_POWER_STATE_G3S5: if ((power_get_signals() & PWRSEQ_G3S5_UP_SIGNAL) == - PWRSEQ_G3S5_UP_VALUE) + PWRSEQ_G3S5_UP_VALUE) return SYS_POWER_STATE_S5; else return SYS_POWER_STATE_S5G3; @@ -215,29 +258,56 @@ static int common_pwr_sm_run(int state) case SYS_POWER_STATE_S5: /* In S5 make sure no more signal lost */ /* If A-rails are stable then move to higher state */ - if (board_ap_power_check_power_rails_enabled() - && rsmrst_power_is_good()) { + if (board_ap_power_check_power_rails_enabled() && + rsmrst_power_is_good()) { /* rsmrst is intact */ rsmrst_pass_thru_handler(); if (signals_valid_and_off(IN_PCH_SLP_S5)) { k_timer_stop(&s5_inactive_timer); + /* Clear the timer running flag */ + atomic_clear_bit(flags, + S5_INACTIVE_TIMER_RUNNING); + /* Clear any request to exit hard-off */ + atomic_clear_bit(flags, START_FROM_G3); + LOG_INF("Clearing request to exit G3"); return SYS_POWER_STATE_S5S4; } } - /* S5 inactivity timeout, go to S5G3 */ + /* + * S5 state has an inactivity timer, so moving + * to S5G3 (where the power rails are turned off) is + * delayed for some time, usually ~10 seconds or so. + * The purpose of this delay is: + * - to handle AP initiated cold boot, where the AP + * will go to S5 for a short time and then restart. + * - give time for the power button to be pressed, + * which may set the START_FROM_G3 flag. + */ if (AP_PWRSEQ_DT_VALUE(s5_inactivity_timeout) == 0) return SYS_POWER_STATE_S5G3; else if (AP_PWRSEQ_DT_VALUE(s5_inactivity_timeout) > 0) { - if (k_timer_status_get(&s5_inactive_timer) > 0) + /* + * Test and set timer running flag. + * If it was 0, then the timer wasn't running + * and it is started (and the flag is set), + * otherwise it is already set, so no change. + */ + if (!atomic_test_and_set_bit( + flags, S5_INACTIVE_TIMER_RUNNING)) { + /* + * Timer is not started, or needs + * restarting. + */ + k_timer_start(&s5_inactive_timer, + K_SECONDS(AP_PWRSEQ_DT_VALUE( + s5_inactivity_timeout)), + K_NO_WAIT); + } else if (k_timer_status_get(&s5_inactive_timer) > 0) { /* Timer is expired */ + atomic_clear_bit(flags, + S5_INACTIVE_TIMER_RUNNING); return SYS_POWER_STATE_S5G3; - else if (k_timer_remaining_get( - &s5_inactive_timer) == 0) - /* Timer is not started or stopped */ - k_timer_start(&s5_inactive_timer, - K_SECONDS(AP_PWRSEQ_DT_VALUE( - s5_inactivity_timeout)), - K_NO_WAIT); + } } break; @@ -318,7 +388,7 @@ static int common_pwr_sm_run(int state) case SYS_POWER_STATE_S0ix: /* System in S0 only if SLP_S0 and SLP_S3 are de-asserted */ if (power_signals_off(IN_PCH_SLP_S0) && - signals_valid_and_off(IN_PCH_SLP_S3)) { + signals_valid_and_off(IN_PCH_SLP_S3)) { /* TODO: Make sure ap reset handling is done * before leaving S0ix. */ @@ -334,6 +404,7 @@ static int common_pwr_sm_run(int state) * HC already set sleep suspend state. */ ap_power_sleep_notify_transition(AP_POWER_SLEEP_SUSPEND); + ap_power_ev_send_callbacks(AP_POWER_S0IX_SUSPEND); /* * Enable idle task deep sleep. Allow the low power idle task @@ -354,9 +425,11 @@ static int common_pwr_sm_run(int state) */ disable_sleep(SLEEP_MASK_AP_RUN); + ap_power_ev_send_callbacks(AP_POWER_S0IX_RESUME #if CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK - ap_power_ev_send_callbacks(AP_POWER_RESUME_INIT); + | AP_POWER_RESUME_INIT #endif + ); return SYS_POWER_STATE_S0; @@ -370,19 +443,19 @@ static int common_pwr_sm_run(int state) return SYS_POWER_STATE_S0S3; #if CONFIG_AP_PWRSEQ_S0IX - /* - * SLP_S0 may assert in system idle scenario without a kernel - * freeze call. This may cause interrupt storm since there is - * no freeze/unfreeze of threads/process in the idle scenario. - * Ignore the SLP_S0 assertions in idle scenario by checking - * the host sleep state. - */ + /* + * SLP_S0 may assert in system idle scenario without a + * kernel freeze call. This may cause interrupt storm + * since there is no freeze/unfreeze of threads/process + * in the idle scenario. Ignore the SLP_S0 assertions in + * idle scenario by checking the host sleep state. + */ } else if (ap_power_sleep_get_notify() == - AP_POWER_SLEEP_SUSPEND && - power_signals_on(IN_PCH_SLP_S0)) { + AP_POWER_SLEEP_SUSPEND && + power_signals_on(IN_PCH_SLP_S0)) { return SYS_POWER_STATE_S0S0ix; } else if (ap_power_sleep_get_notify() == - AP_POWER_SLEEP_RESUME) { + AP_POWER_SLEEP_RESUME) { ap_power_sleep_notify_transition(AP_POWER_SLEEP_RESUME); #endif /* CONFIG_AP_PWRSEQ_S0IX */ } @@ -464,12 +537,16 @@ static void pwr_seq_set_initial_state(void) static void pwrseq_loop_thread(void *p1, void *p2, void *p3) { - int32_t t_wait_ms = 10; enum power_states_ndsx curr_state, new_state; power_signal_mask_t this_in_signals; power_signal_mask_t last_in_signals = 0; enum power_states_ndsx last_state = -1; + /* + * Let clients know that the AP power state is now + * initialized and ready. + */ + ap_power_ev_send_callbacks(AP_POWER_INITIALIZED); while (1) { curr_state = pwr_sm_get_state(); @@ -482,9 +559,8 @@ static void pwrseq_loop_thread(void *p1, void *p2, void *p3) this_in_signals = power_get_signals(); if (this_in_signals != last_in_signals || - curr_state != last_state) { - LOG_INF("power state %d = %s, in 0x%04x", - curr_state, + curr_state != last_state) { + LOG_INF("power state %d = %s, in 0x%04x", curr_state, pwr_sm_get_state_name(curr_state), this_in_signals); last_in_signals = this_in_signals; @@ -506,22 +582,24 @@ static void pwrseq_loop_thread(void *p1, void *p2, void *p3) if (curr_state != new_state) { pwr_sm_set_state(new_state); ap_power_set_active_wake_mask(); + } else { + /* + * No state transition, we can go to sleep and wait + * for any event to wake us up. + */ + k_sem_take(&pwrseq_sem, K_FOREVER); } - - k_msleep(t_wait_ms); } } static inline void create_pwrseq_thread(void) { - k_thread_create(&pwrseq_thread_data, - pwrseq_thread_stack, + k_thread_create(&pwrseq_thread_data, pwrseq_thread_stack, K_KERNEL_STACK_SIZEOF(pwrseq_thread_stack), - (k_thread_entry_t)pwrseq_loop_thread, - NULL, NULL, NULL, + (k_thread_entry_t)pwrseq_loop_thread, NULL, NULL, NULL, CONFIG_AP_PWRSEQ_THREAD_PRIORITY, 0, - IS_ENABLED(CONFIG_AP_PWRSEQ_AUTOSTART) ? K_NO_WAIT - : K_FOREVER); + IS_ENABLED(CONFIG_AP_PWRSEQ_AUTOSTART) ? K_NO_WAIT : + K_FOREVER); k_thread_name_set(&pwrseq_thread_data, "pwrseq_task"); } @@ -535,7 +613,7 @@ void ap_pwrseq_task_start(void) static void init_pwr_seq_state(void) { - request_exit_hardoff(false); + atomic_clear_bit(flags, START_FROM_G3); /* * The state of the CPU needs to be determined now * so that init routines can check the state of @@ -549,6 +627,7 @@ static int pwrseq_init(const struct device *dev) { LOG_INF("Pwrseq Init"); + k_sem_init(&pwrseq_sem, 0, 1); /* Initialize signal handlers */ power_signal_init(); LOG_DBG("Init pwr seq state"); @@ -559,7 +638,7 @@ static int pwrseq_init(const struct device *dev) } /* - * The initialisation must occur after system I/O initialisation that + * The initialization must occur after system I/O initialization that * the signals depend upon, such as GPIO, ADC etc. */ SYS_INIT(pwrseq_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY); diff --git a/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c b/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c index 5183824117..80fa06e454 100644 --- a/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c +++ b/zephyr/subsys/ap_pwrseq/x86_non_dsx_mtl_pwrseq_sm.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -33,8 +33,8 @@ static void generate_pwrok_handler(void) power_signal_set(PWR_EC_PCH_SYS_PWROK, all_sys_pwrgd_in); /* PCH_PWROK is set to combined result of ALL_SYS_PWRGD and SLP_S3 */ - power_signal_set(PWR_PCH_PWROK, all_sys_pwrgd_in && - !power_signal_get(PWR_SLP_S3)); + power_signal_set(PWR_PCH_PWROK, + all_sys_pwrgd_in && !power_signal_get(PWR_SLP_S3)); } /* Chipset specific power state machine handler */ diff --git a/zephyr/test/.pylintrc b/zephyr/test/.pylintrc index 9ca0b5f8c9..f4609e3781 100644 --- a/zephyr/test/.pylintrc +++ b/zephyr/test/.pylintrc @@ -1,15 +1,3 @@ -[MASTER] -init-hook='import sys; sys.path.append("/usr/lib64/python3.6/site-packages")' - -[MESSAGES CONTROL] - -disable=bad-continuation,bad-whitespace,format,fixme - -[format] - -max-line-length=88 -string-quote=double - [BASIC] additional-builtins= here, @@ -19,3 +7,21 @@ additional-builtins= register_npcx_project, register_raw_project, good-names=BUILD + +# cros lint doesn't inherit the pylintrc from the parent dir. +# These settings are copied from platform/ec/pylintrc +[MESSAGES CONTROL] + +disable= + bad-continuation, + bad-whitespace, + # These have nothing to do with black, they are just annoying + fixme, + too-many-arguments, + too-many-statements, + too-many-branches, + too-many-locals + +[format] + +string-quote=double diff --git a/zephyr/test/accel_cal/BUILD.py b/zephyr/test/accel_cal/BUILD.py deleted file mode 100644 index 8c743bf48b..0000000000 --- a/zephyr/test/accel_cal/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for accel_cal test.""" - -register_host_test("accel_cal") diff --git a/zephyr/test/accel_cal/CMakeLists.txt b/zephyr/test/accel_cal/CMakeLists.txt index 14fd70e01a..07c9ed8599 100644 --- a/zephyr/test/accel_cal/CMakeLists.txt +++ b/zephyr/test/accel_cal/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(accel_cal) # Ensure that we get the definitions from test_config.h diff --git a/zephyr/test/accel_cal/boards/native_posix.overlay b/zephyr/test/accel_cal/boards/native_posix.overlay new file mode 100644 index 0000000000..c4d4413ad7 --- /dev/null +++ b/zephyr/test/accel_cal/boards/native_posix.overlay @@ -0,0 +1,6 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> diff --git a/zephyr/test/accel_cal/prj.conf b/zephyr/test/accel_cal/prj.conf index 5efe3ec6b7..20e6ee59bf 100644 --- a/zephyr/test/accel_cal/prj.conf +++ b/zephyr/test/accel_cal/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/accel_cal/shimmed_test_tasks.h b/zephyr/test/accel_cal/shimmed_test_tasks.h index ff221a5ba3..12f4c8dc22 100644 --- a/zephyr/test/accel_cal/shimmed_test_tasks.h +++ b/zephyr/test/accel_cal/shimmed_test_tasks.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/test/accel_cal/testcase.yaml b/zephyr/test/accel_cal/testcase.yaml new file mode 100644 index 0000000000..21e63e4ed4 --- /dev/null +++ b/zephyr/test/accel_cal/testcase.yaml @@ -0,0 +1,5 @@ +common: + platform_allow: native_posix +tests: + accel_cal.default: {} + diff --git a/zephyr/test/ap_power/CMakeLists.txt b/zephyr/test/ap_power/CMakeLists.txt index 523db95ede..7b44013961 100644 --- a/zephyr/test/ap_power/CMakeLists.txt +++ b/zephyr/test/ap_power/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(ap_power) # Include the local test directory for shimmed_test_tasks.h diff --git a/zephyr/test/ap_power/Kconfig b/zephyr/test/ap_power/Kconfig index 6faf452ac6..ac7b264855 100644 --- a/zephyr/test/ap_power/Kconfig +++ b/zephyr/test/ap_power/Kconfig @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/ap_power/overlay.dts b/zephyr/test/ap_power/boards/native_posix.overlay index d961788c7a..c6cd8c3790 100644 --- a/zephyr/test/ap_power/overlay.dts +++ b/zephyr/test/ap_power/boards/native_posix.overlay @@ -1,8 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <board-overlays/native_posix.dts> #include <cros/binman.dtsi> #include <dt-bindings/gpio_defines.h> #include <freq.h> @@ -187,7 +188,6 @@ status = "okay"; compatible = "zephyr,espi-emul-espi-host"; reg = <0x0>; - label = "ESPI_HOST"; }; }; diff --git a/zephyr/test/ap_power/include/test_state.h b/zephyr/test/ap_power/include/test_state.h index c993fe8ff0..cb91f2b7c7 100644 --- a/zephyr/test/ap_power/include/test_state.h +++ b/zephyr/test/ap_power/include/test_state.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/test/ap_power/prj.conf b/zephyr/test/ap_power/prj.conf index 86c3f5082d..4dd31085bd 100644 --- a/zephyr/test/ap_power/prj.conf +++ b/zephyr/test/ap_power/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -43,8 +43,8 @@ CONFIG_HEAP_MEM_POOL_SIZE=1024 CONFIG_AP_PWRSEQ=y CONFIG_X86_NON_DSX_PWRSEQ_ADL=y CONFIG_AP_X86_INTEL_ADL=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y -CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y +CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y CONFIG_AP_PWRSEQ_STACK_SIZE=1024 CONFIG_ESPI=y @@ -54,6 +54,7 @@ CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION=y CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE=y CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD=y CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y # These items are not required. CONFIG_PLATFORM_EC_BACKLIGHT_LID=n diff --git a/zephyr/test/ap_power/src/board.c b/zephyr/test/ap_power/src/board.c index 96b30d21d3..26c9448396 100644 --- a/zephyr/test/ap_power/src/board.c +++ b/zephyr/test/ap_power/src/board.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <ap_power_override_functions.h> #include <ap_power/ap_power_interface.h> diff --git a/zephyr/test/ap_power/src/events.c b/zephyr/test/ap_power/src/events.c index de695e945f..ae7d2b870f 100644 --- a/zephyr/test/ap_power/src/events.c +++ b/zephyr/test/ap_power/src/events.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,9 +10,11 @@ #include <zephyr/device.h> +#include <zephyr/drivers/espi.h> +#include <zephyr/drivers/espi_emul.h> #include <zephyr/logging/log.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "ap_power/ap_power.h" #include "ap_power/ap_power_events.h" @@ -66,7 +68,7 @@ ZTEST(events, test_registration) ap_power_ev_remove_callback(&cb.cb); ap_power_ev_send_callbacks(AP_POWER_RESET); zassert_equal(1, cb.count, "Callback called"); - cb.count = 0; /* Reset to make it clear */ + cb.count = 0; /* Reset to make it clear */ cb.event = 0; /* Add it twice */ ap_power_ev_add_callback(&cb.cb); @@ -80,6 +82,36 @@ ZTEST(events, test_registration) } /** + * @brief TestPurpose: Verify reset callback from ESPI + * + * @details + * Validate that the reset callback is sent with ESPI PLTRST# + * + * Expected Results + * - The AP_POWER_RESET event is sent + */ +ZTEST(events, test_pltrst) +{ + static struct events cb; + const struct device *espi = + DEVICE_DT_GET_ANY(zephyr_espi_emul_controller); + + zassert_not_null(espi, "Cannot get ESPI device"); + + ap_power_ev_init_callback(&cb.cb, ev_handler, AP_POWER_RESET); + ap_power_ev_add_callback(&cb.cb); + + emul_espi_host_send_vw(espi, ESPI_VWIRE_SIGNAL_PLTRST, 0); + /* + * Since the event is being sent via a deferred function, + * wait for the deferral time. + */ + k_usleep(2 * 1000); + zassert_equal(1, cb.count, "Callback not called"); + zassert_equal(AP_POWER_RESET, cb.event, "Wrong event"); +} + +/** * @brief TestPurpose: Check event mask changes * * @details @@ -145,9 +177,9 @@ ZTEST(events, test_hooks) zassert_equal(0, count_hook_shutdown, "shutdown hook called"); zassert_equal(1, count_hook_startup, "startup hook not called"); zassert_equal(0, count_hook_shutdown, - "reset event, shutdown hook called"); + "reset event, shutdown hook called"); zassert_equal(1, count_hook_startup, - "reset event, startup hook called"); + "reset event, startup hook called"); ap_power_ev_send_callbacks(AP_POWER_SHUTDOWN); zassert_equal(1, count_hook_shutdown, "shutdown hook not called"); zassert_equal(1, count_hook_startup, "startup hook called"); @@ -156,5 +188,4 @@ ZTEST(events, test_hooks) /** * @brief Test Suite: Verifies AP power notification functionality. */ -ZTEST_SUITE(events, ap_power_predicate_post_main, - NULL, NULL, NULL, NULL); +ZTEST_SUITE(events, ap_power_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/ap_power/src/main.c b/zephyr/test/ap_power/src/main.c index 761fcfd997..d653b51164 100644 --- a/zephyr/test/ap_power/src/main.c +++ b/zephyr/test/ap_power/src/main.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "ec_app_main.h" #include "test_state.h" diff --git a/zephyr/test/ap_power/src/signals.c b/zephyr/test/ap_power/src/signals.c index c2ccffb8c9..e8bc6e426c 100644 --- a/zephyr/test/ap_power/src/signals.c +++ b/zephyr/test/ap_power/src/signals.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,12 +14,13 @@ #include <zephyr/drivers/espi_emul.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/logging/log.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "power_signals.h" #include "ec_tasks.h" +#include "emul/emul_stub_device.h" #include "gpio.h" #include "gpio/gpio.h" #include "gpio/gpio_int.h" @@ -37,19 +38,13 @@ static struct { enum power_signal signal; int pin; } signal_to_pin_table[] = { -{ PWR_EN_PP5000_A, 10}, -{ PWR_EN_PP3300_A, 11}, -{ PWR_RSMRST, 12}, -{ PWR_EC_PCH_RSMRST, 13}, -{ PWR_SLP_S0, 14}, -{ PWR_SLP_S3, 15}, -{ PWR_SLP_SUS, 16}, -{ PWR_EC_SOC_DSW_PWROK, 17}, -{ PWR_VCCST_PWRGD, 18}, -{ PWR_IMVP9_VRRDY, 19}, -{ PWR_PCH_PWROK, 20}, -{ PWR_EC_PCH_SYS_PWROK, 21}, -{ PWR_SYS_RST, 22}, + { PWR_EN_PP5000_A, 10 }, { PWR_EN_PP3300_A, 11 }, + { PWR_RSMRST, 12 }, { PWR_EC_PCH_RSMRST, 13 }, + { PWR_SLP_S0, 14 }, { PWR_SLP_S3, 15 }, + { PWR_SLP_SUS, 16 }, { PWR_EC_SOC_DSW_PWROK, 17 }, + { PWR_VCCST_PWRGD, 18 }, { PWR_IMVP9_VRRDY, 19 }, + { PWR_PCH_PWROK, 20 }, { PWR_EC_PCH_SYS_PWROK, 21 }, + { PWR_SYS_RST, 22 }, }; /* @@ -106,9 +101,9 @@ ZTEST(signals, test_validate_request) zassert_equal(-EINVAL, power_signal_enable(PWR_IMVP9_VRRDY), "enable interrupt on input pin without interrupt config"); /* Can't disable interrupt on input with no interrupt flags */ - zassert_equal(-EINVAL, - power_signal_disable(PWR_IMVP9_VRRDY), - "disable interrupt on input pin without interrupt config"); + zassert_equal( + -EINVAL, power_signal_disable(PWR_IMVP9_VRRDY), + "disable interrupt on input pin without interrupt config"); /* Invalid signal - should be rejectde */ zassert_equal(-EINVAL, power_signal_get(-1), "power_signal_get with -1 signal should fail"); @@ -135,7 +130,7 @@ ZTEST(signals, test_board_signals) * Check that the board level signals get correctly invoked. */ zassert_ok(power_signal_set(PWR_ALL_SYS_PWRGD, 1), - "power_signal_set on board signal failed"); + "power_signal_set on board signal failed"); zassert_equal(1, power_signal_get(PWR_ALL_SYS_PWRGD), "power_signal_get on board signal should return 1"); } @@ -153,12 +148,13 @@ ZTEST(signals, test_signal_name) { for (int signal = 0; signal < POWER_SIGNAL_COUNT; signal++) { zassert_not_null(power_signal_name(signal), - "Signal name for %d should be not null", signal); + "Signal name for %d should be not null", + signal); } zassert_is_null(power_signal_name(-1), - "Out of bounds signal name should be null"); + "Out of bounds signal name should be null"); zassert_is_null(power_signal_name(POWER_SIGNAL_COUNT), - "Out of bounds signal name should be null"); + "Out of bounds signal name should be null"); } /** @@ -180,18 +176,19 @@ ZTEST(signals, test_init_outputs) static const enum power_signal active_high[] = { PWR_EN_PP5000_A, PWR_EN_PP3300_A, PWR_EC_PCH_RSMRST, PWR_EC_SOC_DSW_PWROK, PWR_PCH_PWROK - }; + }; static const enum power_signal active_low[] = { PWR_SYS_RST }; for (int i = 0; i < ARRAY_SIZE(active_high); i++) { zassert_equal(0, emul_get(active_high[i]), - "Signal %d (%s) init to de-asserted state failed", - active_high[i], power_signal_name(active_high[i])); + "Signal %d (%s) init to de-asserted state failed", + active_high[i], + power_signal_name(active_high[i])); } for (int i = 0; i < ARRAY_SIZE(active_low); i++) { zassert_equal(1, emul_get(active_low[i]), - "Signal %d (%s) init to de-asserted state failed", - active_low[i], power_signal_name(active_low[i])); + "Signal %d (%s) init to de-asserted state failed", + active_low[i], power_signal_name(active_low[i])); } } @@ -212,14 +209,15 @@ ZTEST(signals, test_gpio_input) "power_signal_get of PWR_RSMRST should be 1"); emul_set(PWR_RSMRST, 0); zassert_equal(0, power_signal_get(PWR_RSMRST), - "power_signal_get of PWR_RSMRST should be 0"); + "power_signal_get of PWR_RSMRST should be 0"); /* ACTIVE_LOW input */ emul_set(PWR_SLP_S0, 0); - zassert_equal(1, power_signal_get(PWR_SLP_S0), - "power_signal_get of active-low signal PWR_SLP_S0 should be 1"); + zassert_equal( + 1, power_signal_get(PWR_SLP_S0), + "power_signal_get of active-low signal PWR_SLP_S0 should be 1"); emul_set(PWR_SLP_S0, 1); zassert_equal(0, power_signal_get(PWR_SLP_S0), - "power_signal_get of active-low PWR_SLP_S0 should be 0"); + "power_signal_get of active-low PWR_SLP_S0 should be 0"); } /** @@ -235,17 +233,17 @@ ZTEST(signals, test_gpio_output) { power_signal_set(PWR_PCH_PWROK, 1); zassert_equal(1, emul_get(PWR_PCH_PWROK), - "power_signal_set of PWR_PCH_PWROK should be 1"); + "power_signal_set of PWR_PCH_PWROK should be 1"); power_signal_set(PWR_PCH_PWROK, 0); zassert_equal(0, emul_get(PWR_PCH_PWROK), - "power_signal_set of PWR_PCH_PWROK should be 0"); + "power_signal_set of PWR_PCH_PWROK should be 0"); /* ACTIVE_LOW output */ power_signal_set(PWR_SYS_RST, 0); zassert_equal(1, emul_get(PWR_SYS_RST), - "power_signal_set of PWR_SYS_RST should be 1"); + "power_signal_set of PWR_SYS_RST should be 1"); power_signal_set(PWR_SYS_RST, 1); zassert_equal(0, emul_get(PWR_SYS_RST), - "power_signal_set of PWR_SYS_RST should be 0"); + "power_signal_set of PWR_SYS_RST should be 0"); } /** @@ -269,7 +267,8 @@ ZTEST(signals, test_signal_mask) * Set board level (polled) signal. */ power_signal_set(PWR_ALL_SYS_PWRGD, 1); - zassert_equal(bm, (power_get_signals() & bm), + zassert_equal( + bm, (power_get_signals() & bm), "Expected PWR_ALL_SYS_PWRGD signal to be present in mask"); /* * Use GPIO that does not interrupt to confirm that a pin change @@ -281,11 +280,11 @@ ZTEST(signals, test_signal_mask) emul_set(PWR_IMVP9_VRRDY, 1); zassert_equal(0, (power_get_signals() & vm), "Expected mask to be 0"); zassert_equal(true, power_signals_match(bm, bm), - "Expected match of mask to signal match"); + "Expected match of mask to signal match"); zassert_equal(-ETIMEDOUT, power_wait_mask_signals_timeout(bm, 0, 5), - "Expected timeout waiting for mask to be 0"); + "Expected timeout waiting for mask to be 0"); zassert_ok(power_wait_mask_signals_timeout(0, vm, 5), - "expected match with a 0 mask (always true)"); + "expected match with a 0 mask (always true)"); } /** @@ -305,7 +304,7 @@ ZTEST(signals, test_debug_mask) old = power_get_debug(); power_set_debug(dm); zassert_equal(dm, power_get_debug(), - "Debug mask does not match set value"); + "Debug mask does not match set value"); /* * Reset back to default. */ @@ -332,10 +331,10 @@ ZTEST(signals, test_gpio_interrupts) /* Check that GPIO pin changes update the signal mask. */ emul_set(PWR_RSMRST, 1); zassert_equal(true, power_signals_on(rsm), - "PWR_RSMRST not updated in mask"); + "PWR_RSMRST not updated in mask"); emul_set(PWR_RSMRST, 0); zassert_equal(true, power_signals_off(rsm), - "PWR_RSMRST not updated in mask"); + "PWR_RSMRST not updated in mask"); /* * Check that an ACTIVE_LOW signal gets asserted in @@ -343,10 +342,10 @@ ZTEST(signals, test_gpio_interrupts) */ emul_set(PWR_SLP_S3, 0); zassert_equal(true, power_signals_on(s3), - "SLP_S3 signal should be on in mask"); + "SLP_S3 signal should be on in mask"); emul_set(PWR_SLP_S3, 1); zassert_equal(true, power_signals_off(s3), - "SLP_S3 should be off in mask"); + "SLP_S3 should be off in mask"); /* * Check that disabled interrupt on the GPIO does not trigger @@ -354,18 +353,18 @@ ZTEST(signals, test_gpio_interrupts) */ emul_set(PWR_SLP_S0, 0); zassert_equal(false, power_signals_on(s0), - "SLP_S0 should not have updated"); + "SLP_S0 should not have updated"); emul_set(PWR_SLP_S0, 1); zassert_equal(false, power_signals_on(s0), - "SLP_S0 should not have updated"); + "SLP_S0 should not have updated"); power_signal_enable(PWR_SLP_S0); emul_set(PWR_SLP_S0, 0); zassert_equal(true, power_signals_on(s0), - "SLP_S0 should have updated the mask"); + "SLP_S0 should have updated the mask"); emul_set(PWR_SLP_S0, 1); zassert_equal(true, power_signals_off(s0), - "SLP_S0 should have updated the mask"); + "SLP_S0 should have updated the mask"); /* * Disable the GPIO interrupt again. @@ -373,10 +372,10 @@ ZTEST(signals, test_gpio_interrupts) power_signal_disable(PWR_SLP_S0); emul_set(PWR_SLP_S0, 0); zassert_equal(false, power_signals_on(s0), - "SLP_S0 should not have updated the mask"); + "SLP_S0 should not have updated the mask"); emul_set(PWR_SLP_S0, 1); zassert_equal(true, power_signals_off(s0), - "SLP_S0 should not have updated the mask"); + "SLP_S0 should not have updated the mask"); } /** @@ -400,16 +399,14 @@ ZTEST(signals, test_espi_vw) * so sending a 0 value should be received as a signal. */ emul_espi_host_send_vw(espi, ESPI_VWIRE_SIGNAL_SLP_S5, 0); - zassert_equal(1, power_signal_get(PWR_SLP_S5), - "VW SLP_S5 should be 1"); + zassert_equal(1, power_signal_get(PWR_SLP_S5), "VW SLP_S5 should be 1"); emul_espi_host_send_vw(espi, ESPI_VWIRE_SIGNAL_SLP_S5, 1); - zassert_equal(0, power_signal_get(PWR_SLP_S5), - "VW SLP_S5 should be 0"); + zassert_equal(0, power_signal_get(PWR_SLP_S5), "VW SLP_S5 should be 0"); } static void *init_dev(void) { - emul_port = device_get_binding("GPIO_0"); + emul_port = DEVICE_DT_GET(DT_NODELABEL(gpio0)); return NULL; } @@ -422,5 +419,9 @@ static void init_signals(void *data) /** * @brief Test Suite: Verifies power signal functionality. */ -ZTEST_SUITE(signals, ap_power_predicate_post_main, - init_dev, init_signals, NULL, NULL); +ZTEST_SUITE(signals, ap_power_predicate_post_main, init_dev, init_signals, NULL, + NULL); + +/* These 2 lines are needed because we don't define an espi host driver */ +#define DT_DRV_COMPAT zephyr_espi_emul_espi_host +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); diff --git a/zephyr/test/ap_power/testcase.yaml b/zephyr/test/ap_power/testcase.yaml new file mode 100644 index 0000000000..aaf8a530a6 --- /dev/null +++ b/zephyr/test/ap_power/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + ap_power.default: {} diff --git a/zephyr/test/base32/BUILD.py b/zephyr/test/base32/BUILD.py deleted file mode 100644 index 28023ccdc9..0000000000 --- a/zephyr/test/base32/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for base32 test.""" - -register_host_test("base32") diff --git a/zephyr/test/base32/CMakeLists.txt b/zephyr/test/base32/CMakeLists.txt index 674ad0d244..97e01b0ab7 100644 --- a/zephyr/test/base32/CMakeLists.txt +++ b/zephyr/test/base32/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(base32) target_sources(app PRIVATE "${PLATFORM_EC}/test/base32.c") diff --git a/zephyr/test/base32/boards/native_posix.overlay b/zephyr/test/base32/boards/native_posix.overlay new file mode 100644 index 0000000000..c4d4413ad7 --- /dev/null +++ b/zephyr/test/base32/boards/native_posix.overlay @@ -0,0 +1,6 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> diff --git a/zephyr/test/base32/prj.conf b/zephyr/test/base32/prj.conf index ec8c5035f5..2962b8f42f 100644 --- a/zephyr/test/base32/prj.conf +++ b/zephyr/test/base32/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/base32/testcase.yaml b/zephyr/test/base32/testcase.yaml new file mode 100644 index 0000000000..ea0374bbd0 --- /dev/null +++ b/zephyr/test/base32/testcase.yaml @@ -0,0 +1,5 @@ +common: + platform_allow: native_posix +tests: + base32.default: {} + diff --git a/zephyr/test/crc/BUILD.py b/zephyr/test/crc/BUILD.py deleted file mode 100644 index 8ca9c04936..0000000000 --- a/zephyr/test/crc/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for crc test.""" - -register_host_test("crc") diff --git a/zephyr/test/crc/CMakeLists.txt b/zephyr/test/crc/CMakeLists.txt index 0b46729578..b0b0996312 100644 --- a/zephyr/test/crc/CMakeLists.txt +++ b/zephyr/test/crc/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(crc) # Include the test source and the file under test diff --git a/zephyr/test/crc/boards/native_posix.overlay b/zephyr/test/crc/boards/native_posix.overlay new file mode 100644 index 0000000000..90c864d2fd --- /dev/null +++ b/zephyr/test/crc/boards/native_posix.overlay @@ -0,0 +1,6 @@ +/* Copyright 2020 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> diff --git a/zephyr/test/crc/main.c b/zephyr/test/crc/main.c index 50f7be79a0..0b13970d83 100644 --- a/zephyr/test/crc/main.c +++ b/zephyr/test/crc/main.c @@ -1,15 +1,16 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/kernel.h> -#include <ztest.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> #include "crc8.h" -/* Note this test makes the pure platform/ec test that uses the same value */ -static void test_crc8_known_data(void) +ZTEST_SUITE(crc_driver, NULL, NULL, NULL, NULL, NULL); + +ZTEST(crc_driver, test_crc8_known_data) { uint8_t buffer[10] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 8 }; @@ -18,10 +19,3 @@ static void test_crc8_known_data(void) /* Verifies polynomial values of 0x07 representing x^8 + x^2 + x + 1 */ zassert_equal(crc, 170, "CRC8 hash did not match"); } - -void test_main(void) -{ - ztest_test_suite(test_task_shim, - ztest_unit_test(test_crc8_known_data)); - ztest_run_test_suite(test_task_shim); -} diff --git a/zephyr/test/crc/prj.conf b/zephyr/test/crc/prj.conf index ec8c5035f5..89fdcc1efe 100644 --- a/zephyr/test/crc/prj.conf +++ b/zephyr/test/crc/prj.conf @@ -1,7 +1,8 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y CONFIG_PLATFORM_EC=y CONFIG_CROS_EC=y diff --git a/zephyr/test/crc/testcase.yaml b/zephyr/test/crc/testcase.yaml new file mode 100644 index 0000000000..2a7787979d --- /dev/null +++ b/zephyr/test/crc/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + crc.default: {} diff --git a/zephyr/test/drivers/BUILD.py b/zephyr/test/drivers/BUILD.py deleted file mode 100644 index c43579da2e..0000000000 --- a/zephyr/test/drivers/BUILD.py +++ /dev/null @@ -1,18 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for drivers test.""" - -register_host_test( - "drivers", - dts_overlays=[ - "overlay.dts", - here / "led_driver/led_pins.dts", - here / "led_driver/led_policy.dts", - ], - kconfig_files=[ - here / "led_driver/prj.conf", - ], - test_args=["-flash={test_temp_dir}/flash.bin"], -) diff --git a/zephyr/test/drivers/CMakeLists.txt b/zephyr/test/drivers/CMakeLists.txt index 33163427b5..9e51295d4d 100644 --- a/zephyr/test/drivers/CMakeLists.txt +++ b/zephyr/test/drivers/CMakeLists.txt @@ -1,79 +1,69 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(drivers) -# Include the local test directory for shimmed_test_tasks.h -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") -zephyr_include_directories("${PLATFORM_EC}/driver/ppc/") +add_subdirectory(common) -target_sources(app PRIVATE - src/battery.c - src/bb_retimer.c - src/bc12.c - src/bma2x2.c - src/bmi160.c - src/bmi260.c - src/charge_manager.c - src/chargesplash.c - src/console_cmd/charge_manager.c - src/console_cmd/charge_state.c - src/console_cmd/accelinit.c - src/console_cmd/accelinfo.c - src/console_cmd/accelspoof.c - src/console_cmd/accelrate.c - src/console_cmd/accelrange.c - src/console_cmd/accelread.c - src/console_cmd/accelres.c - src/console_cmd/usb_pd_console.c - src/cros_cbi.c - src/espi.c - src/gpio.c - src/host_cmd/motion_sense.c - src/integration/usbc/usb.c - src/integration/usbc/usb_20v_3a_pd_charger.c - src/integration/usbc/usb_5v_3a_pd_sink.c - src/integration/usbc/usb_5v_3a_pd_source.c - src/integration/usbc/usb_alt_mode.c - src/integration/usbc/usb_attach_src_snk.c - src/integration/usbc/usb_pd_ctrl_msg.c - src/integration/usbc/usb_malfunction_sink.c - src/i2c_passthru.c - src/isl923x.c - src/keyboard_scan.c - src/lid_switch.c - src/lis2dw12.c - src/ln9310.c - src/main.c - src/motion_sense/motion_sense.c - src/panic.c - src/power_common.c - src/ppc_sn5s330.c - src/ppc_syv682x.c - src/ps8xxx.c - src/smart.c - src/stm_mems_common.c - src/stubs.c - src/tcpci.c - src/tcpci_test_common.c - src/tcs3400.c - src/temp_sensor.c - src/test_mocks.c - src/test_rules.c - src/thermistor.c - src/uart_hostcmd.c - src/usb_mux.c - src/usb_pd_host_cmd.c - src/utils.c - src/vboot_hash.c - src/watchdog.c -) +get_target_property(TEST_SOURCES app SOURCES) -add_subdirectory(isl923x) -add_subdirectory(led_driver) +# Support zmake for now +if("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers") + set(CONFIG_LINK_TEST_SUITE_DEFAULT TRUE) + set(CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_DEFAULT=1) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-ap_mux_control") + set(CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-usb_retimer_fw_update") + set(CONFIG_LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-chargesplash") + set(CONFIG_LINK_TEST_SUITE_CHARGESPLASH TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_CHARGESPLASH=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-isl923x") + set(CONFIG_LINK_TEST_SUITE_ISL923X TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_ISL923X=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-led_driver") + set(CONFIG_LINK_TEST_SUITE_LED_DRIVER TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_LED_DRIVER=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-dps") + set(CONFIG_LINK_TEST_SUITE_USB_PD_DPS TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_USB_PD_DPS=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-usbc_alt_mode") + set(CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=1) +elseif("${ZMAKE_PROJECT_NAME}" STREQUAL "test-drivers-usbc_tbt_mode") + set(CONFIG_LINK_TEST_SUITE_USBC_TBT_MODE TRUE) + add_compile_definitions(CONFIG_LINK_TEST_SUITE_USBC_TBT_MODE=1) +endif() + +# Add linked suites here +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_DEFAULT default) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL ap_mux_control) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_CHARGESPLASH chargesplash) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_ISL923X isl923x) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_KEYBOARD_SCAN keyboard_scan) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_LED_DRIVER led_driver) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_MKBP mkbp) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK usb_malfunction_sink) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_USB_PD_DPS dps) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE usb_retimer_fw_update) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE usbc_alt_mode) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_USBC_TBT_MODE usbc_tbt_mode) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_USBC_OCP usbc_ocp) +add_subdirectory_ifdef(CONFIG_LINK_TEST_SUITE_HOST_COMMANDS host_cmd) + +get_target_property(TEST_SOURCES_NEW app SOURCES) + +# Check to make sure at least one suite was added +list(REMOVE_ITEM TEST_SOURCES_NEW ${TEST_SOURCES}) +if(NOT TEST_SOURCES_NEW) + message(FATAL_ERROR "Invalid configuration, must add test sources") +endif() set_compiler_property(APPEND PROPERTY coverage -O0) diff --git a/zephyr/test/drivers/Kconfig b/zephyr/test/drivers/Kconfig index 6e57a22c1f..cf877607ce 100644 --- a/zephyr/test/drivers/Kconfig +++ b/zephyr/test/drivers/Kconfig @@ -1,11 +1,47 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -config BUG209907615 - bool "Enable tests for b:209907615" - help - This flag may change as we protoype integration tests. - TODO(b/209907615): Remove when test finished. +config LINK_TEST_SUITE_DEFAULT + bool "Link and test the default test suite" + +config LINK_TEST_SUITE_AP_MUX_CONTROL + bool "Link and test the ap_mux_control tests" + +config LINK_TEST_SUITE_CHARGESPLASH + bool "Link and test the chargesplash tests" + +config LINK_TEST_SUITE_ISL923X + bool "Link and test the isl923x tests" + +config LINK_TEST_SUITE_KEYBOARD_SCAN + bool "Link and test the keyboard_scan tests" + +config LINK_TEST_SUITE_LED_DRIVER + bool "Link and test the led_driver tests" + +config LINK_TEST_SUITE_MKBP + bool "Link and test the mkbp tests" + +config LINK_TEST_SUITE_USB_MALFUNCTION_SINK + bool "Link and test the usb_malfunction_sink tests" + +config LINK_TEST_SUITE_USB_PD_DPS + bool "Link and test the dps tests" + +config LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE + bool "Link and test the usb_retimer_fw_update tests" + +config LINK_TEST_SUITE_USBC_ALT_MODE + bool "Link and test the usbc_alt_mode tests" + +config LINK_TEST_SUITE_USBC_TBT_MODE + bool "Link and test the usbc_tbt_mode tests" + +config LINK_TEST_SUITE_HOST_COMMANDS + bool "Link and test the host command tests" + +config LINK_TEST_SUITE_USBC_OCP + bool "Link tests for common USBC OCP code" source "Kconfig.zephyr" diff --git a/zephyr/test/drivers/README.md b/zephyr/test/drivers/README.md index 11c913baa8..7dfc5c51e5 100644 --- a/zephyr/test/drivers/README.md +++ b/zephyr/test/drivers/README.md @@ -1,31 +1,22 @@ -This is the combined driver test. The goal is to have many driver test suites -in one binary, so that compile time will be faster than many small tests, and +This is the drivers test directory. The goal is to have many driver test suites +in few binaries, so that compile time will be faster than many small tests, and so we can test interactions between different subsystems easily. ## Run all the test suites ```bash -(chroot) zmake test test-drivers +(chroot) ec $ ./twister -T zephyr/test/drivers ``` -To see all the output of zmake (for example if the build fails) +To see all the output of twister in stdout (for example if the build fails) ```bash -(chroot) zmake -l DEBUG -j 1 test test-drivers +(chroot) ec $ ./twister -v -i -T zephyr/test/drivers ``` ## Code coverage -To calculate code coverage for this test only - -```bash -(chroot) zmake test --coverage test-drivers -(chroot) genhtml --branch-coverage -q \ - -o build/zephyr/test-drivers/output/coverage_rpt \ - build/zephyr/test-drivers/output/zephyr.info -``` - -The report will be in build/zephyr/test-drivers/output/coverage_rpt/index.html +See the [EC code coverage] doc. ## Debugging @@ -35,15 +26,24 @@ You need the host version of gdb: (chroot) sudo emerge -j sys-devel/gdb ``` -Build the test +Build all the drivers tests ```bash -(chroot) zmake build test-drivers +(chroot) ec $ ./twister -b -T zephyr/test/drivers ``` Then run gdb +Example of running gdb on the `drivers.default` test binary: + ``` -(chroot) gdb build/zephyr/test-drivers/build-singleimage/zephyr/zephyr.exe +(chroot) ec $ gdb twister-out/native_posix/drivers.default/zephyr/zephyr.exe # Set breakpoints, run, etc. ``` +Another of running gdb now on the `drivers.chargesplash` test binary: + +``` +(chroot) ec $ gdb twister-out/native_posix/drivers.chargesplash/zephyr/zephyr.exe +``` + +[EC code coverage]: ../../../docs/code_coverage.md#zephyr-ztest-code-coverage diff --git a/zephyr/test/drivers/ap_mux_control/CMakeLists.txt b/zephyr/test/drivers/ap_mux_control/CMakeLists.txt new file mode 100644 index 0000000000..005e72e714 --- /dev/null +++ b/zephyr/test/drivers/ap_mux_control/CMakeLists.txt @@ -0,0 +1,19 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Create library name based on current directory +zephyr_library_get_current_dir_lib_name(${ZEPHYR_BASE} lib_name) + +# Create interface library +zephyr_interface_library_named(${lib_name}) + +# Add include paths +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") + +# Add source files +zephyr_library_sources("${CMAKE_CURRENT_SOURCE_DIR}/src/ap_mux_control.c") + +# Link in the library +zephyr_library_link_libraries(${lib_name}) diff --git a/zephyr/test/drivers/ap_mux_control/prj.conf b/zephyr/test/drivers/ap_mux_control/prj.conf new file mode 100644 index 0000000000..75b05bce0b --- /dev/null +++ b/zephyr/test/drivers/ap_mux_control/prj.conf @@ -0,0 +1,6 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC_USB_MUX_AP_CONTROL=y +CONFIG_PLATFORM_EC_USB_MUX_TASK=y diff --git a/zephyr/test/drivers/ap_mux_control/src/ap_mux_control.c b/zephyr/test/drivers/ap_mux_control/src/ap_mux_control.c new file mode 100644 index 0000000000..49c695b830 --- /dev/null +++ b/zephyr/test/drivers/ap_mux_control/src/ap_mux_control.c @@ -0,0 +1,87 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "usb_mux.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +static void ap_mux_control_before(void *data) +{ + /* Set chipset on to ensure muxes are "powered" */ + test_set_chipset_to_s0(); + + /* + * Set all muxes to NONE to begin with and give time for the USB_MUX + * task to process them. + */ + usb_mux_set(USBC_PORT_C0, USB_PD_MUX_NONE, USB_SWITCH_CONNECT, 0); + k_sleep(K_SECONDS(1)); + + /* And test the assumption that setting NONE worked */ + zassume_equal(usb_mux_get(USBC_PORT_C0), USB_PD_MUX_NONE, + "Failed to set mux to initial state"); +} + +static void ap_mux_control_after(void *data) +{ + /* + * Set all muxes to NONE now that we're done and give time for the + * USB_MUX task to process them. + */ + usb_mux_set(USBC_PORT_C0, USB_PD_MUX_NONE, USB_SWITCH_CONNECT, 0); + k_sleep(K_SECONDS(1)); +} + +ZTEST_SUITE(ap_mux_control, drivers_predicate_post_main, NULL, + ap_mux_control_before, ap_mux_control_after, NULL); + +ZTEST(ap_mux_control, test_set_muxes) +{ + struct ec_response_typec_status status; + struct typec_usb_mux_set mux_set; + uint32_t port_events; + int index; + uint8_t set_mode = USB_PD_MUX_DOCK; + + /* Test setting both mux indexes and receiving their events */ + /* TODO(b/239457738): Loop counter should come from device tree */ + for (index = 0; index < 2; index++) { + mux_set.mux_index = index; + mux_set.mux_flags = set_mode; + + host_cmd_typec_control_usb_mux_set(USBC_PORT_C0, mux_set); + + /* Give the task processing time */ + k_sleep(K_SECONDS(1)); + + /* + * TODO(b/239460181): The "AP" should receive + * EC_HOST_EVENT_PD_MCU + */ + + /* We should see the right index's event set on the port */ + status = host_cmd_typec_status(USBC_PORT_C0); + port_events = index ? PD_STATUS_EVENT_MUX_1_SET_DONE : + PD_STATUS_EVENT_MUX_0_SET_DONE; + zassert_true(status.events & port_events, "Port event missing"); + + /* Clear this mux's event */ + host_cmd_typec_control_clear_events(USBC_PORT_C0, port_events); + } + + /* + * Verify our mux mode is reported as set, and that our mux events are + * cleared out + */ + status = host_cmd_typec_status(USBC_PORT_C0); + port_events = PD_STATUS_EVENT_MUX_0_SET_DONE | + PD_STATUS_EVENT_MUX_1_SET_DONE; + zassert_false(status.events & port_events, "Port events still set"); + zassert_equal(status.mux_state, set_mode, + "Mux set to unexpected state"); +} diff --git a/zephyr/test/drivers/overlay.dts b/zephyr/test/drivers/boards/native_posix.overlay index d8c92a53ef..03b59c8ac7 100644 --- a/zephyr/test/drivers/overlay.dts +++ b/zephyr/test/drivers/boards/native_posix.overlay @@ -1,11 +1,13 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <board-overlays/native_posix.dts> #include <cros/binman.dtsi> #include <cros/thermistor/thermistor.dtsi> #include <dt-bindings/gpio_defines.h> +#include <dt-bindings/pwm/pwm.h> #include <freq.h> / { @@ -13,7 +15,9 @@ cros-ec,espi = &espi0; cros-ec,watchdog = &wdt_counter; cros-ec,raw-kb = &cros_kb_raw; + cros-ec,flash = &flash0; cros-ec,flash-controller = &cros_flash; + cros,rtc = &cros_rtc; }; aliases { @@ -31,17 +35,14 @@ port0@0 { compatible = "named-usbc-port"; reg = <0>; - - chg { - compatible = "intersil,isl923x"; - status = "okay"; - port = <&i2c_charger>; - }; + chg = <&isl923x_emul>; + tcpc = <&tcpci_emul>; }; port1@1 { compatible = "named-usbc-port"; reg = <1>; + tcpc = <&ps8xxx_emul>; }; }; @@ -54,19 +55,24 @@ compatible = "named-gpios"; gpio_acok_od: acok_od { - gpios = <&gpio0 2 GPIO_INPUT>; + gpios = <&gpio0 0 GPIO_INPUT>; enum-name = "GPIO_AC_PRESENT"; }; + + /* <&gpio0 1 x> is reserved as 'entering-rw' in + * src/platform/ec/zephyr/dts/board-overlays/native_posix.dts + */ + /* In test WP is output because CBI use it, but it is also * input, because test_all_tags set it to enable write * protection. */ gpio_wp_l: wp_l { - gpios = <&gpio0 3 (GPIO_INPUT | GPIO_OUTPUT | + gpios = <&gpio0 2 (GPIO_INPUT | GPIO_OUTPUT | GPIO_ACTIVE_LOW)>; }; gpio_ec_kso_02_inv: ec_kso_02_inv { - gpios = <&gpio0 4 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; + gpios = <&gpio0 3 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; }; pg_ec_dsw_pwrok { gpios = <&gpio0 4 GPIO_INPUT>; @@ -125,11 +131,11 @@ enum-name = "GPIO_AP_SUSPEND"; }; gpio_pmic_kpd_pwr_odl: pmic_kpd_pwr_odl { - gpios = <&gpio0 20 GPIO_ODR_HIGH>; + gpios = <&gpio0 20 GPIO_OUTPUT_HIGH>; enum-name = "GPIO_PMIC_KPD_PWR_ODL"; }; gpio_pmic_resin_l: pmic_resin_l { - gpios = <&gpio0 21 GPIO_ODR_HIGH>; + gpios = <&gpio0 21 GPIO_OUTPUT_HIGH>; enum-name = "GPIO_PMIC_RESIN_L"; }; gpio_warm_reset_l: warm_reset_l { @@ -174,14 +180,43 @@ #led-pin-cells = <1>; gpios = <&gpio0 31 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; }; + /* gpio1 */ gpio_ec_chg_led_y_c1: ec_chg_led_y_c1 { #led-pin-cells = <1>; - gpios = <&gpio0 32 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; + gpios = <&gpio1 0 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; }; gpio_ec_chg_led_w_c1: ec_chg_led_w_c1 { #led-pin-cells = <1>; - gpios = <&gpio0 33 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; + gpios = <&gpio1 1 (GPIO_INPUT | GPIO_OUTPUT_LOW)>; + }; + gpio_ap_ec_int_l: ap_ec_int_l { + gpios = <&gpio1 2 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_ec_voldn_btn_odl: ec_voldn_btn_odl { + gpios = <&gpio1 3 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_ec_volup_btn_odl: ec_volup_btn_odl { + gpios = <&gpio1 4 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; }; + gpio_ec_pg_pin_temp: ec_pg_pin_temp { + gpios = <&gpio0 4 GPIO_INPUT>; + }; + }; + + gpio1: gpio@101 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + reg = <0x101 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + ngpios = <5>; }; gpio-interrupts { @@ -237,41 +272,28 @@ named-i2c-ports { compatible = "named-i2c-ports"; - usb-c0 { + named_i2c0: i2c0 { i2c-port = <&i2c0>; - enum-name = "I2C_PORT_USB_C0"; - }; - usb-c1 { + enum-names = "I2C_PORT_BATTERY", + "I2C_PORT_POWER", + "I2C_PORT_CHARGER", + "I2C_PORT_EEPROM", + "I2C_PORT_ACCEL", + "I2C_PORT_VIRTUAL_BATTERY"; + }; + named_i2c1: i2c1 { i2c-port = <&i2c1>; - enum-name = "I2C_PORT_USB_C1"; + enum-names = "I2C_PORT_SENSOR"; }; - battery { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_BATTERY"; + named_i2c2: i2c2 { + i2c-port = <&i2c2>; + dynamic-speed; + enum-names = "I2C_PORT_USB_C0"; }; - power { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_POWER"; - }; - i2c_charger: charger { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_CHARGER"; - }; - eeprom { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_EEPROM"; - }; - i2c_accel: accel { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_ACCEL"; - }; - i2c_sensor: sensor { - i2c-port = <&i2c1>; - enum-name = "I2C_PORT_SENSOR"; - }; - virtual-battery { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_VIRTUAL_BATTERY"; + named_i2c3: i2c3 { + i2c-port = <&i2c3>; + dynamic-speed; + enum-names = "I2C_PORT_USB_C1"; }; }; @@ -335,7 +357,6 @@ nchannels = <6>; ref-internal-mv = <3300>; #io-channel-cells = <1>; - label = "ADC_0"; status = "okay"; }; @@ -343,96 +364,96 @@ compatible = "named-adc-channels"; adc_charger: charger { - label = "ADC_TEMP_SENSOR_CHARGER"; enum-name = "ADC_TEMP_SENSOR_CHARGER"; io-channels = <&adc0 0>; }; adc_pp3300_regulator: pp3300-regulator { - label = "ADC_TEMP_SENSOR_PP3300_REGULATOR"; enum-name = "ADC_TEMP_SENSOR_PP3300_REGULATOR"; io-channels = <&adc0 1>; }; adc_ddr_soc: ddr-soc { - label = "ADC_TEMP_SENSOR_DDR_SOC"; enum-name = "ADC_TEMP_SENSOR_DDR_SOC"; io-channels = <&adc0 2>; }; adc_fan: fan { - label = "ADC_TEMP_SENSOR_FAN"; enum-name = "ADC_TEMP_SENSOR_FAN"; io-channels = <&adc0 3>; }; amon_bmon { - label = "AMON_BMON"; enum-name = "ADC_AMON_BMON"; io-channels = <&adc0 4>; mul = <1000>; div = <20>; }; psys { - label = "PSYS"; enum-name = "ADC_PSYS"; io-channels = <&adc0 5>; mul = <124000>; }; }; + temp_charger: charger { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_13K7_47K_4050B>; + adc = <&adc_charger>; + }; + temp_pp3300_regulator: pp3300-regulator { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + adc = <&adc_pp3300_regulator>; + }; + temp_ddr_soc: ddr-soc { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V3_51K1_47K_4050B>; + adc = <&adc_ddr_soc>; + }; + temp_fan: fan { + compatible = "cros-ec,temp-sensor-thermistor"; + thermistor = <&thermistor_3V0_22K6_47K_4050B>; + adc = <&adc_fan>; + }; + named-temp-sensors { - charger { - thermistor = <&thermistor_3V3_13K7_47K_4050B>; + compatible = "cros-ec,temp-sensors"; + named_temp_charger: charger { status = "okay"; - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - label = "TEMP_SENSOR_CHARGER"; - enum-name = "TEMP_SENSOR_CHARGER"; temp_fan_off = <40>; temp_fan_max = <55>; temp_host_high = <75>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_charger>; + power-good-pin = <&gpio_ec_pg_pin_temp>; + sensor = <&temp_charger>; }; - pp3300-regulator { - thermistor = <&thermistor_3V3_30K9_47K_4050B>; + named_temp_pp3300_regulator: pp3300-regulator { status = "okay"; - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - label = "TEMP_SENSOR_PP3300_REGULATOR"; - enum-name = "TEMP_SENSOR_PP3300_REGULATOR"; temp_fan_off = <40>; temp_fan_max = <55>; temp_host_high = <75>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_pp3300_regulator>; + power-good-pin = <&gpio_ec_pg_pin_temp>; + sensor = <&temp_pp3300_regulator>; }; - ddr-soc { - thermistor = <&thermistor_3V3_51K1_47K_4050B>; + named_temp_ddr_soc: ddr-soc { status = "okay"; - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - label = "TEMP_SENSOR_DDR_SOC"; - enum-name = "TEMP_SENSOR_DDR_SOC"; temp_fan_off = <35>; temp_fan_max = <50>; temp_host_high = <70>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_ddr_soc>; + power-good-pin = <&gpio_ec_pg_pin_temp>; + sensor = <&temp_ddr_soc>; }; - fan { - thermistor = <&thermistor_3V0_22K6_47K_4050B>; + named_temp_fan: fan { status = "okay"; - compatible = "cros-ec,temp-sensor-thermistor", - "cros-ec,temp-sensor"; - label = "TEMP_SENSOR_FAN"; - enum-name = "TEMP_SENSOR_FAN"; temp_fan_off = <35>; temp_fan_max = <50>; temp_host_high = <70>; temp_host_halt = <80>; temp_host_release_high = <65>; - adc = <&adc_fan>; + power-good-pin = <&gpio_ec_pg_pin_temp>; + sensor = <&temp_fan>; }; }; @@ -446,19 +467,15 @@ motionsense-mutex { compatible = "cros-ec,motionsense-mutex"; mutex_bma255: bma255-mutex { - label = "BMA255_MUTEX"; }; mutex_bmi260: bmi260-mutex { - label = "BMI260_MUTEX"; }; mutex_bmi160: bmi160-mutex { - label = "BMI160_MUTEX"; }; mutex_lis2dw12: lis2dw12-mutex { - label = "LIS2DW12_MUTEX"; }; }; @@ -554,18 +571,18 @@ /* * List of motion sensors that creates motion_sensors array. - * The label "lid_accel" and "base_accel" are used to indicate + * The nodelabel "lid_accel" and "base_accel" are used to indicate * motion sensor IDs for lid angle calculation. */ motionsense-sensor { - ms_bma255: ms-bma255 { + base_accel: ms_bma255: ms-bma255 { compatible = "cros-ec,bma255"; status = "okay"; - label = "BMA255"; + active-mask = "SENSOR_ACTIVE_S0_S3_S5"; location = "MOTIONSENSE_LOC_LID"; mutex = <&mutex_bma255>; - port = <&i2c_accel>; + port = <&named_i2c0>; default-range = <2>; drv-data = <&bma255_data>; i2c-spi-addr-flags = "BMA2x2_I2C_ADDR1_FLAGS"; @@ -574,27 +591,23 @@ "cros-ec,motionsense-sensor-config"; ec-s0 { /* Run ALS sensor in S0 */ - label = "SENSOR_CONFIG_EC_S0"; odr = <1000>; }; ec-s3 { - label = "SENSOR_CONFIG_EC_S3"; odr = <10000>; }; ec-s5 { - label = "SENSOR_CONFIG_EC_S5"; odr = <10000>; }; }; }; - ms_bmi260_accel: ms-bmi260-accel { + lid_accel: ms_bmi260_accel: ms-bmi260-accel { compatible = "cros-ec,bmi260-accel"; status = "okay"; - label = "BMI260 emul accel"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; - port = <&i2c_accel>; + port = <&named_i2c0>; drv-data = <&bmi260_data>; default-range = <4>; i2c-spi-addr-flags = "BMI260_ADDR0_FLAGS"; @@ -604,10 +617,9 @@ compatible = "cros-ec,bmi260-gyro"; status = "okay"; - label = "BMI260 emul gyro"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi260>; - port = <&i2c_accel>; + port = <&named_i2c0>; drv-data = <&bmi260_data>; default-range = <1000>; /* dps */ i2c-spi-addr-flags = "BMI260_ADDR0_FLAGS"; @@ -617,11 +629,10 @@ compatible = "cros-ec,bmi160-accel"; status = "okay"; - label = "BMI160 emul accel"; active-mask = "SENSOR_ACTIVE_S0_S3_S5"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi160>; - port = <&i2c_sensor>; + port = <&named_i2c1>; drv-data = <&bmi160_data>; default-range = <4>; i2c-spi-addr-flags = "BMI160_ADDR0_FLAGS"; @@ -631,10 +642,9 @@ compatible = "cros-ec,bmi160-gyro"; status = "okay"; - label = "BMI160 emul gyro"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_bmi160>; - port = <&i2c_sensor>; + port = <&named_i2c1>; drv-data = <&bmi160_data>; default-range = <1000>; /* dps */ i2c-spi-addr-flags = "BMI160_ADDR0_FLAGS"; @@ -644,10 +654,9 @@ compatible = "cros-ec,lis2dw12"; status = "okay"; - label = "LIS2DW12"; location = "MOTIONSENSE_LOC_BASE"; mutex = <&mutex_lis2dw12>; - port = <&i2c_accel>; + port = <&named_i2c0>; drv-data = <&lis2dw12_data>; default-range = <2>; i2c-spi-addr-flags = "LIS2DWL_ADDR1_FLAGS"; @@ -657,9 +666,8 @@ compatible = "cros-ec,tcs3400-clear"; status = "okay"; - label = "Clear Light"; location = "MOTIONSENSE_LOC_BASE"; - port = <&i2c_sensor>; + port = <&named_i2c1>; default-range = <0x10000>; drv-data = <&tcs_clear_data>; i2c-spi-addr-flags = "TCS3400_I2C_ADDR_FLAGS"; @@ -668,7 +676,6 @@ "cros-ec,motionsense-sensor-config"; ec-s0 { /* Run ALS sensor in S0 */ - label = "SENSOR_CONFIG_EC_S0"; odr = <1000>; }; }; @@ -678,7 +685,6 @@ compatible = "cros-ec,tcs3400-rgb"; status = "okay"; - label = "RGB Light"; location = "MOTIONSENSE_LOC_BASE"; default-range = <0x10000>; /* scale = 1x, uscale = 0 */ drv-data = <&tcs_rgb_data>; @@ -691,8 +697,8 @@ }; /* - * Second i2c bus is required, because there are already devices with - * addresses 0x68, 0xb and 0x9 on the first bus + * Add extra i2c buses to test the I2C passthrough: 1 for sensor and + * 2 dedicated for TCPC. */ i2c1: i2c@400 { status = "okay"; @@ -701,39 +707,64 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x400 4>; - label = "I2C_1"; - - tcpci_ps8xxx_emul: tcpci_ps8xxx_emul@b { - compatible = "cros,tcpci-emul"; - status = "okay"; - reg = <0xb>; - label = "TCPCI_PS8XXX_EMUL"; - alert_gpio = <&usb_c1_tcpc_int_odl>; - }; - - ps8xxx_emul: ps8xxx_emul@b1 { - compatible = "cros,ps8xxx-emul"; - reg = <0xb1>; - tcpci-i2c = <&tcpci_ps8xxx_emul>; - p0-i2c-addr = <0x8>; - p1-i2c-addr = <0x9>; - gpio-i2c-addr = <0x1a>; - label = "PS8XXX_EMUL"; - }; tcs_emul: tcs@39 { compatible = "zephyr,tcs3400"; reg = <0x39>; - label = "TCS_EMUL"; error-on-ro-write; error-on-reserved-bit-write; error-on-msb-first-access; }; + accel_bmi160: bmi160@68 { + compatible = "zephyr,bmi"; + reg = <0x68>; + device-model = "BMI_EMUL_160"; + error-on-ro-write; + error-on-wo-read; + error-on-reserved-bit-write; + simulate-command-exec-time; + }; + }; + + i2c2: i2c@500 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x500 4>; + + pi3usb9201_emul: pi3usb9201@5f { + compatible = "zephyr,pi3usb9201-emul"; + reg = <0x5f>; + }; + + sn5s330_emul: sn5s330@40 { + compatible = "cros,sn5s330-emul"; + reg = <0x40>; + int-pin = <&gpio_usb_c0_ppc_int>; + }; + + tcpci_emul: tcpci_emul@82 { + compatible = "cros,tcpci-generic-emul"; + status = "okay"; + reg = <0x82>; + alert_gpio = <&usb_c0_tcpc_int_odl>; + }; + }; + + i2c3: i2c@600 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x600 4>; + syv682x_emul: syv682x@41 { compatible = "zephyr,syv682x-emul"; reg = <0x41>; - label = "SYV682X_EMUL"; frs_en_gpio = <&gpio_usb_c1_frs_en>; alert_gpio = <&gpio_usb_c1_ppc_int>; }; @@ -741,21 +772,18 @@ usb_c1_bb_retimer_emul: bbretimer@42 { compatible = "cros,bb-retimer-emul"; reg = <0x42>; - label = "USB_C1_BB_RETIMER"; vendor = "BB_RETIMER_VENDOR_ID_1"; error-on-ro-write; error-on-reserved-bit-write; }; - accel_bmi160: bmi160@68 { - compatible = "zephyr,bmi"; - reg = <0x68>; - label = "BMI160"; - device-model = "BMI_EMUL_160"; - error-on-ro-write; - error-on-wo-read; - error-on-reserved-bit-write; - simulate-command-exec-time; + ps8xxx_emul: ps8xxx_emul@b { + compatible = "cros,ps8xxx-emul"; + reg = <0xb>; + alert_gpio = <&usb_c1_tcpc_int_odl>; + p0-i2c-addr = <0x8>; + p1-i2c-addr = <0x9>; + gpio-i2c-addr = <0x1a>; }; }; @@ -768,17 +796,130 @@ compatible = "zephyr,counter-watchdog"; status = "okay"; counter = <&counter0>; - label = "WDT_COUNTER"; }; cros_kb_raw: kb-raw-emul { compatible = "cros-ec,kb-raw-emul"; - label = "KB_RAW"; }; cros_flash: cros-flash { compatible = "cros-ec,flash-emul"; - label = "FLASH"; + }; + + cros_rtc: cros-rtc { + compatible = "cros-ec,rtc-emul"; + }; + + pwms { + #address-cells = <1>; + #size-cells = <1>; + + pwm_blue_left: pwm@0 { + compatible = "cros,pwm-mock"; + reg = <0 1>; + #pwm-cells = <3>; + status = "okay"; + }; + pwm_white_left: pwm@1 { + compatible = "cros,pwm-mock"; + reg = <1 1>; + #pwm-cells = <3>; + status = "okay"; + }; + pwm_amber_right: pwm@2 { + compatible = "cros,pwm-mock"; + reg = <2 1>; + #pwm-cells = <3>; + status = "okay"; + }; + pwm_white_right: pwm@3 { + compatible = "cros,pwm-mock"; + reg = <3 1>; + #pwm-cells = <3>; + status = "okay"; + }; + pwm_kblight: pwm@4 { + compatible = "cros,pwm-mock"; + reg = <4 1>; + #pwm-cells = <3>; + status = "okay"; + }; + }; + + pwmleds { + compatible = "cros-ec,pwm-pin-config"; + + pwmled_blue_left: pwmled_b_left { + #led-pin-cells = <1>; + pwms = <&pwm_blue_left 0 1000000 PWM_POLARITY_NORMAL>; + }; + pwmled_white_left: pwmled_w_left { + #led-pin-cells = <1>; + pwms = <&pwm_white_left 0 1000000 PWM_POLARITY_NORMAL>; + }; + pwmled_amber_right: pwmled_y_right { + #led-pin-cells = <1>; + pwms = <&pwm_amber_right 0 1000000 PWM_POLARITY_NORMAL>; + }; + pwmled_white_right: pwmled_w_right { + #led-pin-cells = <1>; + pwms = <&pwm_white_right 0 1000000 PWM_POLARITY_NORMAL>; + }; + }; + + pwm-led-pins { + compatible = "cros-ec,pwm-led-pins"; + + color-off-left { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_LEFT_LED"; + led-pins = <&pwmled_blue_left 0>, + <&pwmled_white_left 0>; + }; + color-off-right { + led-color = "LED_OFF"; + led-id = "EC_LED_ID_RIGHT_LED"; + led-pins = <&pwmled_amber_right 0>, + <&pwmled_white_right 0>; + }; + color-blue-left { + led-color = "LED_BLUE"; + led-id = "EC_LED_ID_LEFT_LED"; + br-color = "EC_LED_COLOR_BLUE"; + led-pins = <&pwmled_blue_left 100>, + <&pwmled_white_left 0>; + }; + color-amber-right { + led-color = "LED_AMBER"; + led-id = "EC_LED_ID_RIGHT_LED"; + br-color = "EC_LED_COLOR_AMBER"; + led-pins = <&pwmled_amber_right 100>, + <&pwmled_white_right 0>; + }; + color-white-left { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_LEFT_LED"; + br-color = "EC_LED_COLOR_WHITE"; + led-pins = <&pwmled_blue_left 0>, + <&pwmled_white_left 100>; + }; + color-white-right { + led-color = "LED_WHITE"; + led-id = "EC_LED_ID_RIGHT_LED"; + br-color = "EC_LED_COLOR_WHITE"; + led-pins = <&pwmled_amber_right 0>, + <&pwmled_white_right 100>; + }; + }; + + led-colors { + compatible = "cros-ec,led-policy"; + }; + + kblight { + compatible = "cros-ec,kblight-pwm"; + pwms = <&pwm_kblight 0 PWM_KHZ(10) PWM_POLARITY_NORMAL>; + generic-pwm-channel = <0>; }; }; @@ -787,19 +928,17 @@ status = "okay"; compatible = "zephyr,espi-emul-espi-host"; reg = <0x0>; - label = "ESPI_HOST"; }; }; &gpio0 { - ngpios = <34>; + ngpios = <32>; }; &i2c0 { cbi_eeprom: eeprom@56 { compatible = "atmel,at24"; reg = <0x56>; - label = "EEPROM_CBI"; size = <512>; pagesize = <8>; address-width = <8>; @@ -809,41 +948,27 @@ battery: sb@b { compatible = "zephyr,smart-battery"; reg = <0xb>; - label = "BATTERY"; cycle-count = <99>; version = "BATTERY_SPEC_VER_1_1_WITH_PEC"; /* Real battery voltages are multiples of 4.4V. */ desired-charg-volt = <5000>; desired-charg-cur = <1000>; + mf-name = "LGC"; + dev-name = "AC17A8M"; }; bma_emul: bma@18 { compatible = "zephyr,bma255"; reg = <0x18>; - label = "BMA_EMUL"; error-on-compensation-not-ready; error-on-ro-write; error-on-reserved-bit-write; error-on-msb-first-access; }; - pi3usb9201_emul: pi3usb9201@5f { - compatible = "zephyr,pi3usb9201-emul"; - reg = <0x5f>; - label = "PI3USB9201_EMUL"; - }; - - sn5s330_emul: sn5s330@40 { - compatible = "cros,sn5s330-emul"; - reg = <0x40>; - label = "SN5S330_EMUL"; - int-pin = <&gpio_usb_c0_ppc_int>; - }; - accel_bmi260: bmi260@68 { compatible = "zephyr,bmi"; reg = <0x68>; - label = "BMI260"; device-model = "BMI_EMUL_260"; error-on-ro-write; error-on-wo-read; @@ -851,11 +976,10 @@ simulate-command-exec-time; }; - ln9310: ln9310@80 { + ln9310: ln9310@72 { compatible = "cros,ln9310-emul"; status = "okay"; - reg = <0x80>; - label = "LN9310"; + reg = <0x72>; pg-int-pin = <&gpio_switchcap_pg_int_l>; }; @@ -863,31 +987,22 @@ compatible = "cros,lis2dw12-emul"; status = "okay"; reg = <0x19>; - label = "LIS2DW12_EMUL"; }; i2c_mock: i2c_mock@84 { compatible = "cros,i2c-mock"; status = "okay"; reg = <0x84>; - label = "I2C_MOCK"; }; isl923x_emul: isl923x@9 { compatible = "cros,isl923x-emul"; status = "okay"; reg = <0x9>; - label = "ISL923X_EMUL"; battery = <&battery>; }; - tcpci_emul: tcpci_emul@82 { - compatible = "cros,tcpci-emul"; - status = "okay"; - reg = <0x82>; - label = "TCPCI_EMUL"; - alert_gpio = <&usb_c0_tcpc_int_odl>; - }; + }; /* Enable all thermistors for testing */ @@ -906,3 +1021,9 @@ &thermistor_3V3_51K1_47K_4050B { status = "okay"; }; + +&flash0 { + erase-block-size = <0x10000>; + write-block-size = <1>; + reg = <0x00000000 DT_SIZE_K(512)>; +}; diff --git a/zephyr/test/drivers/chargesplash/CMakeLists.txt b/zephyr/test/drivers/chargesplash/CMakeLists.txt new file mode 100644 index 0000000000..f0746a4cdd --- /dev/null +++ b/zephyr/test/drivers/chargesplash/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/chargesplash.c) diff --git a/zephyr/test/drivers/src/chargesplash.c b/zephyr/test/drivers/chargesplash/src/chargesplash.c index 3eec11bbe4..1b89262ce4 100644 --- a/zephyr/test/drivers/src/chargesplash.c +++ b/zephyr/test/drivers/chargesplash/src/chargesplash.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,7 @@ #include <zephyr/shell/shell.h> #include <zephyr/shell/shell_uart.h> #include <zephyr/sys/__assert.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "chipset.h" #include "config.h" @@ -44,35 +44,6 @@ static bool is_chargesplash_requested(void) return response.requested; } -static struct k_poll_signal shutdown_complete_signal = - K_POLL_SIGNAL_INITIALIZER(shutdown_complete_signal); -static struct k_poll_event shutdown_complete_event = K_POLL_EVENT_INITIALIZER( - K_POLL_TYPE_SIGNAL, K_POLL_MODE_NOTIFY_ONLY, &shutdown_complete_signal); - -static void handle_chipset_shutdown_complete_event(void) -{ - k_poll_signal_raise(&shutdown_complete_signal, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN_COMPLETE, - handle_chipset_shutdown_complete_event, HOOK_PRIO_LAST); - -static void force_chipset_off(void) -{ - if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) { - k_poll_signal_reset(&shutdown_complete_signal); - chipset_force_shutdown(CHIPSET_RESET_INIT); - k_poll(&shutdown_complete_event, 1, K_MSEC(1000)); - } - - /* - * Signal will trigger during S3->S5, but we want to wait until we're - * actually at S5. Give it a quick sleep if required. - */ - while (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) { - msleep(5); - } -} - static struct k_poll_signal s0_signal = K_POLL_SIGNAL_INITIALIZER(s0_signal); static struct k_poll_event s0_event = K_POLL_EVENT_INITIALIZER( K_POLL_TYPE_SIGNAL, K_POLL_MODE_NOTIFY_ONLY, &s0_signal); @@ -124,7 +95,7 @@ static void set_lid(bool open, bool inhibit_boot) if (inhibit_boot) { wait_for_chipset_startup(); - force_chipset_off(); + test_set_chipset_to_g3(); } } @@ -136,7 +107,13 @@ static void pulse_power_button(void) static void reset_state(void *unused) { - force_chipset_off(); + test_set_chipset_to_g3(); + + /* + * Prevent critical low battery from moving us back to G3 when + * lid is opened. + */ + test_set_battery_level(75); if (lid_is_open()) { set_lid(false, false); @@ -213,7 +190,7 @@ ZTEST_USER(chargesplash, test_lockout) wait_for_chipset_startup(); set_ac_enabled(false); - force_chipset_off(); + test_set_chipset_to_g3(); } set_ac_enabled(true); @@ -260,7 +237,7 @@ ZTEST_USER(chargesplash, test_manual_lockout_via_console) zassert_true(is_chargesplash_requested(), "chargesplash should be requested"); wait_for_chipset_startup(); - force_chipset_off(); + test_set_chipset_to_g3(); zassert_ok(shell_execute_cmd(get_ec_shell(), "chargesplash lockout"), NULL); @@ -288,7 +265,7 @@ ZTEST_USER(chargesplash, test_manual_lockout_via_hostcmd) zassert_true(is_chargesplash_requested(), "chargesplash should be requested"); wait_for_chipset_startup(); - force_chipset_off(); + test_set_chipset_to_g3(); zassert_ok(chargesplash_hostcmd(EC_CHARGESPLASH_LOCKOUT, &response), NULL); diff --git a/zephyr/test/drivers/common/CMakeLists.txt b/zephyr/test/drivers/common/CMakeLists.txt new file mode 100644 index 0000000000..854294ab11 --- /dev/null +++ b/zephyr/test/drivers/common/CMakeLists.txt @@ -0,0 +1,13 @@ +# Common sources +target_sources(app PRIVATE + src/main.c + src/test_mocks.c + src/test_rules.c + src/utils.c + src/stubs.c +) +target_include_directories(app PRIVATE + ${CMAKE_CURRENT_SOURCE_DIR}/include + ${PLATFORM_EC}/driver/ppc/ + ${PLATFORM_EC}/zephyr/shim/src/led_driver +) diff --git a/zephyr/test/drivers/include/test/drivers/charger_utils.h b/zephyr/test/drivers/common/include/test/drivers/charger_utils.h index 1712a5a384..22331c8575 100644 --- a/zephyr/test/drivers/include/test/drivers/charger_utils.h +++ b/zephyr/test/drivers/common/include/test/drivers/charger_utils.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/test/drivers/include/test/drivers/stubs.h b/zephyr/test/drivers/common/include/test/drivers/stubs.h index 2e03142d72..98f3fa1d15 100644 --- a/zephyr/test/drivers/include/test/drivers/stubs.h +++ b/zephyr/test/drivers/common/include/test/drivers/stubs.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,13 +6,14 @@ #ifndef __TEST_DRIVERS_STUBS_H #define __TEST_DRIVERS_STUBS_H -#include "fff.h" +#include <zephyr/fff.h> #include "power.h" enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; /* Structure used by usb_mux test. It is part of usb_muxes chain. */ extern struct usb_mux usbc1_virtual_usb_mux; +extern struct usb_mux usbc0_mux0; /** * @brief Set product ID that should be returned by board_get_ps8xxx_product_id @@ -24,6 +25,8 @@ void board_set_ps8xxx_product_id(uint16_t product_id); /* Declare fake function to allow tests to examine calls to this function */ DECLARE_FAKE_VOID_FUNC(system_hibernate, uint32_t, uint32_t); +DECLARE_FAKE_VOID_FUNC(board_reset_pd_mcu); + void sys_arch_reboot(int type); /* Declare GPIO_TEST interrupt handler */ diff --git a/zephyr/test/drivers/include/test/drivers/tcpci_test_common.h b/zephyr/test/drivers/common/include/test/drivers/tcpci_test_common.h index e39738a9d5..08d75cccf7 100644 --- a/zephyr/test/drivers/include/test/drivers/tcpci_test_common.h +++ b/zephyr/test/drivers/common/include/test/drivers/tcpci_test_common.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -18,7 +18,7 @@ */ void check_tcpci_reg_f(const struct emul *emul, int reg, uint16_t exp_val, int line); -#define check_tcpci_reg(emul, reg, exp_val) \ +#define check_tcpci_reg(emul, reg, exp_val) \ check_tcpci_reg_f((emul), (reg), (exp_val), __LINE__) /** @@ -32,80 +32,104 @@ void check_tcpci_reg_f(const struct emul *emul, int reg, uint16_t exp_val, */ void check_tcpci_reg_with_mask_f(const struct emul *emul, int reg, uint16_t exp_val, uint16_t mask, int line); -#define check_tcpci_reg_with_mask(emul, reg, exp_val, mask) \ +#define check_tcpci_reg_with_mask(emul, reg, exp_val, mask) \ check_tcpci_reg_with_mask_f((emul), (reg), (exp_val), (mask), __LINE__) /** * @brief Test TCPCI init and vbus level callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_init(const struct emul *emul, enum usbc_port port); +void test_tcpci_init(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI release callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_release(const struct emul *emul, enum usbc_port port); +void test_tcpci_release(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI get cc callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_get_cc(const struct emul *emul, enum usbc_port port); +void test_tcpci_get_cc(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI set cc callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_set_cc(const struct emul *emul, enum usbc_port port); +void test_tcpci_set_cc(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI set polarity callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_set_polarity(const struct emul *emul, enum usbc_port port); +void test_tcpci_set_polarity(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI set vconn callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_set_vconn(const struct emul *emul, enum usbc_port port); +void test_tcpci_set_vconn(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI set msg header callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_set_msg_header(const struct emul *emul, enum usbc_port port); +void test_tcpci_set_msg_header(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI rx and sop prime enable callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port); +void test_tcpci_set_rx_detect(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI get raw message from TCPC callback @@ -115,78 +139,115 @@ void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port); * tcpc_config */ void test_tcpci_get_rx_message_raw(const struct emul *emul, + struct i2c_common_emul_data *common_data, enum usbc_port port); /** * @brief Test TCPCI transmitting message from TCPC callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_transmit(const struct emul *emul, enum usbc_port port); +void test_tcpci_transmit(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI alert callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_alert(const struct emul *emul, enum usbc_port port); +void test_tcpci_alert(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI alert RX message callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port); +void test_tcpci_alert_rx_message(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI auto discharge on disconnect callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_auto_discharge(const struct emul *emul, enum usbc_port port); +void test_tcpci_auto_discharge(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI drp toggle callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_drp_toggle(const struct emul *emul, enum usbc_port port); +void test_tcpci_drp_toggle(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI get chip info callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_get_chip_info(const struct emul *emul, enum usbc_port port); +void test_tcpci_get_chip_info(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI enter low power mode callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_low_power_mode(const struct emul *emul, enum usbc_port port); +void test_tcpci_low_power_mode(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); /** * @brief Test TCPCI set bist test mode callback * * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to argument emul's i2c_common_emul_data * @param port Select USBC port that will be used to obtain tcpm_drv from * tcpc_config */ -void test_tcpci_set_bist_mode(const struct emul *emul, enum usbc_port port); +void test_tcpci_set_bist_mode(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); + +/** + * @brief Test TCPCI hard reset re-init callback + * + * @param emul Pointer to TCPCI emulator + * @param common_data Pointer to emulated I2C bus + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_hard_reset_reinit(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port); #endif /* __TCPCI_TEST_COMMON_H */ diff --git a/zephyr/test/drivers/include/test/drivers/test_mocks.h b/zephyr/test/drivers/common/include/test/drivers/test_mocks.h index f29cce97cc..8e481edef8 100644 --- a/zephyr/test/drivers/include/test/drivers/test_mocks.h +++ b/zephyr/test/drivers/common/include/test/drivers/test_mocks.h @@ -1,9 +1,9 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <fff.h> +#include <zephyr/fff.h> /* * Convenience macros @@ -42,27 +42,27 @@ * @param EXPECTED_VAL - The 8-bit value that was supposed to be written, or * `MOCK_IGNORE_VALUE` to suppress this check. */ -#define MOCK_ASSERT_I2C_WRITE(FAKE, CALL_NUM, EXPECTED_REG, EXPECTED_VAL) \ - do { \ - zassert_true((CALL_NUM) < FAKE##_fake.call_count, \ - "Call #%d did not occur (%d I2C writes total)", \ - (CALL_NUM), FAKE##_fake.call_count); \ - zassert_equal( \ - FAKE##_fake.arg1_history[(CALL_NUM)], (EXPECTED_REG), \ - "Expected I2C write #%d to register 0x%02x (" \ - #EXPECTED_REG ") but wrote to reg 0x%02x", \ - (CALL_NUM), (EXPECTED_REG), \ - FAKE##_fake.arg1_history[(CALL_NUM)]); \ - if ((EXPECTED_VAL) != MOCK_IGNORE_VALUE) { \ - zassert_equal( \ - FAKE##_fake.arg2_history[(CALL_NUM)], \ - (EXPECTED_VAL), \ - "Expected I2C write #%d to register 0x%02x (" \ - #EXPECTED_REG ") to write 0x%02x (" \ - #EXPECTED_VAL ") but wrote 0x%02x", \ - (CALL_NUM), (EXPECTED_REG), (EXPECTED_VAL), \ - FAKE##_fake.arg2_history[(CALL_NUM)]); \ - } \ +#define MOCK_ASSERT_I2C_WRITE(FAKE, CALL_NUM, EXPECTED_REG, EXPECTED_VAL) \ + do { \ + zassert_true((CALL_NUM) < FAKE##_fake.call_count, \ + "Call #%d did not occur (%d I2C writes total)", \ + (CALL_NUM), FAKE##_fake.call_count); \ + zassert_equal( \ + FAKE##_fake.arg1_history[(CALL_NUM)], (EXPECTED_REG), \ + "Expected I2C write #%d to register 0x%02x (" #EXPECTED_REG \ + ") but wrote to reg 0x%02x", \ + (CALL_NUM), (EXPECTED_REG), \ + FAKE##_fake.arg1_history[(CALL_NUM)]); \ + if ((EXPECTED_VAL) != MOCK_IGNORE_VALUE) { \ + zassert_equal( \ + FAKE##_fake.arg2_history[(CALL_NUM)], \ + (EXPECTED_VAL), \ + "Expected I2C write #%d to register 0x%02x (" #EXPECTED_REG \ + ") to write 0x%02x (" #EXPECTED_VAL \ + ") but wrote 0x%02x", \ + (CALL_NUM), (EXPECTED_REG), (EXPECTED_VAL), \ + FAKE##_fake.arg2_history[(CALL_NUM)]); \ + } \ } while (0) /** @brief Value to pass to MOCK_ASSERT_I2C_WRITE to ignore the actual value @@ -81,17 +81,17 @@ * @param EXPECTED_REG - The register address that was supposed to be read * from. */ -#define MOCK_ASSERT_I2C_READ(FAKE, CALL_NUM, EXPECTED_REG) \ - do { \ - zassert_true((CALL_NUM) < FAKE##_fake.call_count, \ - "Call #%d did not occur (%d I2C reads total)", \ - (CALL_NUM), FAKE##_fake.call_count); \ - zassert_equal( \ - FAKE##_fake.arg1_history[(CALL_NUM)], (EXPECTED_REG), \ - "Expected I2C read #%d from register 0x%02x (" \ - #EXPECTED_REG ") but read from reg 0x%02x", \ - (CALL_NUM), (EXPECTED_REG), \ - FAKE##_fake.arg1_history[(CALL_NUM)]); \ +#define MOCK_ASSERT_I2C_READ(FAKE, CALL_NUM, EXPECTED_REG) \ + do { \ + zassert_true((CALL_NUM) < FAKE##_fake.call_count, \ + "Call #%d did not occur (%d I2C reads total)", \ + (CALL_NUM), FAKE##_fake.call_count); \ + zassert_equal( \ + FAKE##_fake.arg1_history[(CALL_NUM)], (EXPECTED_REG), \ + "Expected I2C read #%d from register 0x%02x (" #EXPECTED_REG \ + ") but read from reg 0x%02x", \ + (CALL_NUM), (EXPECTED_REG), \ + FAKE##_fake.arg1_history[(CALL_NUM)]); \ } while (0) /* @@ -105,3 +105,10 @@ DECLARE_FAKE_VALUE_FUNC(int, init_rom_copy, int, int, int); /* Mocks for common/system.c */ DECLARE_FAKE_VALUE_FUNC(int, system_jumped_late); +DECLARE_FAKE_VALUE_FUNC(int, system_is_locked); +DECLARE_FAKE_VOID_FUNC(system_reset, int); +DECLARE_FAKE_VOID_FUNC(software_panic, uint32_t, uint32_t); +DECLARE_FAKE_VOID_FUNC(assert_post_action, const char *, unsigned int); + +/* Mocks for common/lid_angle.c */ +DECLARE_FAKE_VOID_FUNC(lid_angle_peripheral_enable, int); diff --git a/zephyr/test/drivers/include/test/drivers/test_state.h b/zephyr/test/drivers/common/include/test/drivers/test_state.h index fe8b3e8ffc..bea56224fc 100644 --- a/zephyr/test/drivers/include/test/drivers/test_state.h +++ b/zephyr/test/drivers/common/include/test/drivers/test_state.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/test/drivers/include/test/drivers/utils.h b/zephyr/test/drivers/common/include/test/drivers/utils.h index 17ea860dfd..306f2894d4 100644 --- a/zephyr/test/drivers/include/test/drivers/utils.h +++ b/zephyr/test/drivers/common/include/test/drivers/utils.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -8,123 +8,100 @@ #include <zephyr/drivers/emul.h> #include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/ztest.h> +#include <stddef.h> #include <string.h> #include "charger.h" +#include "lpc.h" #include "emul/tcpc/emul_tcpci_partner_src.h" #include "extpower.h" #include "host_command.h" - -/** @brief Set chipset to S0 state. Call all necessary hooks. */ -void test_set_chipset_to_s0(void); - -/** @brief Set chipset to G3 state. Call all necessary hooks. */ -void test_set_chipset_to_g3(void); - -/* - * TODO(b/217755888): Implement ztest assume API upstream - */ +#include "power.h" +#include "usbc/utils.h" /** - * @brief Assume that this function call won't be reached - * @param msg Optional message to print if the assumption fails - */ -#define zassume_unreachable(msg, ...) zassert_unreachable(msg, ##__VA_ARGS__) - -/** - * @brief Assume that @a cond is true - * @param cond Condition to check - * @param msg Optional message to print if the assumption fails - */ -#define zassume_true(cond, msg, ...) zassert_true(cond, msg, ##__VA_ARGS__) - -/** - * @brief Assume that @a cond is false - * @param cond Condition to check - * @param msg Optional message to print if the assumption fails + * @brief Helper macro for EMUL_GET_USBC_BINDING. If @p usbc_id has the same + * port number as @p port, then struct emul* for @p chip phandle is + * returned. + * + * @param usbc_id Named usbc port ID + * @param port Port number to match with named usbc port + * @param chip Name of chip phandle property */ -#define zassume_false(cond, msg, ...) zassert_false(cond, msg, ##__VA_ARGS__) +#define EMUL_GET_USBC_BINDING_IF_PORT_MATCH(usbc_id, port, chip) \ + COND_CODE_1(IS_EQ(USBC_PORT_NEW(usbc_id), port), \ + (EMUL_DT_GET(DT_PHANDLE(usbc_id, chip))), ()) /** - * @brief Assume that @a cond is 0 (success) - * @param cond Condition to check - * @param msg Optional message to print if the assumption fails + * @brief Get struct emul from phandle @p chip property of USBC @p port + * + * @param port Named usbc port number. The value has to be integer literal. + * @param chip Name of chip property that is phandle to required emulator. */ -#define zassume_ok(cond, msg, ...) zassert_ok(cond, msg, ##__VA_ARGS__) +#define EMUL_GET_USBC_BINDING(port, chip) \ + DT_FOREACH_STATUS_OKAY_VARGS(named_usbc_port, \ + EMUL_GET_USBC_BINDING_IF_PORT_MATCH, \ + port, chip) -/** - * @brief Assume that @a ptr is NULL - * @param ptr Pointer to compare - * @param msg Optional message to print if the assumption fails - */ -#define zassume_is_null(ptr, msg, ...) zassert_is_null(ptr, msg, ##__VA_ARGS__) +/** @brief Set emulated battery level. Call all necessary hooks. */ +void test_set_battery_level(int percentage); -/** - * @brief Assume that @a ptr is not NULL - * @param ptr Pointer to compare - * @param msg Optional message to print if the assumption fails - */ -#define zassume_not_null(ptr, msg, ...) \ - zassert_not_null(ptr, msg, ##__VA_ARGS__) +/** @brief Set chipset to S0 state. Call all necessary hooks. */ +void test_set_chipset_to_s0(void); /** - * @brief Assume that @a a equals @a b + * @brief Set the chipset to any stable state. Call all necessary hooks. * - * @a a and @a b won't be converted and will be compared directly. + * Supported states are: + * <ul> + * <li>POWER_G3 (same as calling test_set_chipset_to_g3())</li> + * <li>POWER_S5</li> + * <li>POWER_S4</li> + * <li>POWER_S3</li> + * <li>POWER_S0 (same as calling test_set_chipset_to_s0()</li> + * <li>POWER_S0ix (if either CONFIG_PLATFORM_EC_POWERSEQ_S0IX or + * CONFIG_AP_PWRSEQ_S0IX are enabled)</li> + * </ul> * - * @param a Value to compare - * @param b Value to compare - * @param msg Optional message to print if the assumption fails + * @param new_state The new state. Must be a steady state (see above). */ -#define zassume_equal(a, b, msg, ...) zassert_equal(a, b, msg, ##__VA_ARGS__) +void test_set_chipset_to_power_level(enum power_state new_state); -/** - * @brief Assume that @a a does not equal @a b - * - * @a a and @a b won't be converted and will be compared directly. - * - * @param a Value to compare - * @param b Value to compare - * @param msg Optional message to print if the assumption fails +/** @brief Set chipset to G3 state. Call all necessary hooks. */ +void test_set_chipset_to_g3(void); + +/* + * TODO(b/217755888): Implement ztest assume API upstream */ -#define zassume_not_equal(a, b, msg, ...) \ - zassert_not_equal(a, b, msg, ##__VA_ARGS__) /** - * @brief Assume that @a a equals @a b - * - * @a a and @a b will be converted to `void *` before comparing. - * - * @param a Value to compare - * @param b Value to compare + * @brief Assume that this function call won't be reached * @param msg Optional message to print if the assumption fails */ -#define zassume_equal_ptr(a, b, msg, ...) \ - zassert_equal_ptr(a, b, msg, ##__VA_ARGS__) +#define zassume_unreachable(msg, ...) zassert_unreachable(msg, ##__VA_ARGS__) /** - * @brief Assume that @a a is within @a b with delta @a d + * Run an ACPI read to the specified address. * - * @param a Value to compare - * @param b Value to compare - * @param d Delta - * @param msg Optional message to print if the assumption fails + * This function assumes a successful ACPI read process and will make a + * call to the zassume_* API. A failure here will skip the calling test. + * + * @param acpi_addr Address to query + * @return Byte read */ -#define zassume_within(a, b, d, msg, ...) \ - zassert_within(a, b, d, msg, ##__VA_ARGS__) +uint8_t acpi_read(uint8_t acpi_addr); /** - * @brief Assume that 2 memory buffers have the same contents + * Run an ACPI write to the specified address. * - * This macro calls the final memory comparison assumption macro. - * Using double expansion allows providing some arguments by macros that - * would expand to more than one values (ANSI-C99 defines that all the macro - * arguments have to be expanded before macro call). + * This function assumes a successful ACPI write process and will make a + * call to the zassume_* API. A failure here will skip the calling test. * - * @param ... Arguments, see @ref zassume_mem_equal__ - * for real arguments accepted. + * @param acpi_addr Address to write + * @param write_byte Byte to write to address */ -#define zassume_mem_equal(...) zassert_mem_equal(##__VA_ARGS__) +void acpi_write(uint8_t acpi_addr, uint8_t write_byte); /** * Run the host command to get the charge state for a given charger number. @@ -207,16 +184,40 @@ host_cmd_usb_pd_control(int port, enum usb_pd_control_swap swap) } /** - * Run the host command to get the charge state. + * Run the host command to suspend/resume PD ports + * + * This function assumes a successful host command processing and will make a + * call to the zassume_* API. A failure here will skip the calling test. + * + * @param port The USB port to operate on + * @param cmd The sub-command to run + */ +static inline void host_cmd_pd_control(int port, enum ec_pd_control_cmd cmd) +{ + struct ec_params_pd_control params = { .chip = port, .subcmd = cmd }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_PD_CONTROL, 0, params); + + zassume_ok(host_command_process(&args), + "Failed to process pd_control for port %d, cmd %d", port, + cmd); +} + +/** + * Run the host command to control or query the charge state * * @return The result of the query. */ static inline struct ec_response_charge_control -host_cmd_get_charge_control(void) +host_cmd_charge_control(enum ec_charge_control_mode mode, + enum ec_charge_control_cmd cmd) { - struct ec_params_charge_control params = { - .cmd = EC_CHARGE_CONTROL_CMD_GET - }; + struct ec_params_charge_control params = { .cmd = cmd, + .mode = mode, + .sustain_soc = { + .lower = -1, + .upper = -1, + } }; struct ec_response_charge_control response; struct host_cmd_handler_args args = BUILD_HOST_COMMAND(EC_CMD_CHARGE_CONTROL, 2, response, params); @@ -228,6 +229,17 @@ host_cmd_get_charge_control(void) } /** + * @brief Call the host command HOST_EVENT with the user supplied action. + * + * @param action - HOST_EVENT action parameter. + * @param mask_type - Event mask type to apply to the HOST_EVENT action. + * @param r - Pointer to the response object to fill. + */ +enum ec_status host_cmd_host_event(enum ec_host_event_action action, + enum ec_host_event_mask_type mask_type, + struct ec_response_host_event *r); + +/** * @brief Call the host command MOTION_SENSE with the dump sub-command * * Note: this function uses the zassume_ API. It will skip the test if the host @@ -431,9 +443,79 @@ int host_cmd_motion_sense_spoof(uint8_t sensor_num, uint8_t enable, */ void host_cmd_typec_discovery(int port, enum typec_partner_type partner_type, void *response, size_t response_size); +/** + * @brief Run the host command to get the PD alternative mode response. + * + * @param port The USB-C port number + * @param response Destination for command response. + * @param response_size Destination of response size from request params. + */ +void host_cmd_usb_pd_get_amode( + uint8_t port, uint16_t svid_idx, + struct ec_params_usb_pd_get_mode_response *response, + int *response_size); + +/** + * Run the host command to control PD port behavior, with the sub-command of + * TYPEC_CONTROL_COMMAND_ENTER_MODE + * + * @param port The USB-C port number + * @param mode Mode to enter + */ +void host_cmd_typec_control_enter_mode(int port, enum typec_mode mode); + +/** + * Run the host command to control PD port behavior, with the sub-command of + * TYPEC_CONTROL_COMMAND_EXIT_MODES + * + * @param port The USB-C port number + */ +void host_cmd_typec_control_exit_modes(int port); + +/** + * Run the host command to control PD port behavior, with the sub-command of + * TYPEC_CONTROL_COMMAND_USB_MUX_SET + * + * @param port The USB-C port number + * @param mux_set Mode and mux index to set + */ +void host_cmd_typec_control_usb_mux_set(int port, + struct typec_usb_mux_set mux_set); + +/** + * Run the host command to control PD port behavior, with the sub-command of + * TYPEC_CONTROL_COMMAND_CLEAR_EVENTS + * + * @param port The USB-C port number + * @param events Events to clear for the port (see PD_STATUS_EVENT_* + * definitions for options) + */ +void host_cmd_typec_control_clear_events(int port, uint32_t events); + +struct host_events_ctx { + host_event_t lpc_host_events; + host_event_t lpc_host_event_mask[LPC_HOST_EVENT_COUNT]; +}; + +/** + * Save all host events. This should be run as part of the "before" action for + * any test suite that manipulates the host events. + * + * @param host_events_ctx Caller allocated storage to save the host + * events. + */ +void host_events_save(struct host_events_ctx *host_events_ctx); + +/** + * Restore all host events. This should be run as part of the "after" action for + * any test suite that manipulates the host events. + * + * @param host_events_ctx Saved host events context information. + */ +void host_events_restore(struct host_events_ctx *host_events_ctx); #define GPIO_ACOK_OD_NODE DT_NODELABEL(gpio_acok_od) -#define GPIO_ACOK_OD_PIN DT_GPIO_PIN(GPIO_ACOK_OD_NODE, gpios) +#define GPIO_ACOK_OD_PIN DT_GPIO_PIN(GPIO_ACOK_OD_NODE, gpios) /** * Set whether or not AC is enabled. @@ -486,6 +568,26 @@ void disconnect_source_from_port(const struct emul *tcpci_emul, const struct emul *charger_emul); /** + * @brief Connect a power sink to a given port. + * + * Note: this is function currently only supports an ISL923X charger chip. + * + * @param partner Pointer to the emulated TCPCI partner device + * @param tcpci_emul The TCPCI emulator that the source will connect to + * @param charger_emul The charger chip emulator + */ +void connect_sink_to_port(struct tcpci_partner_data *partner, + const struct emul *tcpci_emul, + const struct emul *charger_emul); + +/** + * @brief Disconnect a power sink from a given port. + * + * @param tcpci_emul The TCPCI emulator that will be disconnected + */ +void disconnect_sink_from_port(const struct emul *tcpci_emul); + +/** * @brief Allocate memory for a test pourpose * * @param bytes Number of bytes to allocate @@ -501,4 +603,21 @@ void *test_malloc(size_t bytes); */ void test_free(void *mem); +/** + * @brief Force the chipset to state G3 and then transition to S3 and finally + * S5. + * + */ +void test_set_chipset_to_g3_then_transition_to_s5(void); + +/** + * @brief Checks console command with expected console output and expected + * return value + * + */ +#define CHECK_CONSOLE_CMD(cmd, expected_output, expected_rv) \ + check_console_cmd((cmd), (expected_output), (expected_rv), __FILE__, \ + __LINE__) +void check_console_cmd(const char *cmd, const char *expected_output, + const int expected_rv, const char *file, const int line); #endif /* ZEPHYR_TEST_DRIVERS_INCLUDE_UTILS_H_ */ diff --git a/zephyr/test/drivers/common/src/main.c b/zephyr/test/drivers/common/src/main.c new file mode 100644 index 0000000000..1c8497ab3f --- /dev/null +++ b/zephyr/test/drivers/common/src/main.c @@ -0,0 +1,63 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include "ec_app_main.h" +#include "hooks.h" +#include "test/drivers/test_state.h" + +/** + * @brief Semaphore that signals when hooks have completed + */ +static struct k_sem init_hooks_completed; + +/** + * @brief Hook callback function. Gets registered with the lowest priority so + * that we know all actual hooks have finished. Increments the semaphore. + */ +static void hook_completed_callback(void) +{ + /* Signal that hooks are completed */ + k_sem_give(&init_hooks_completed); +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, hook_completed_callback, HOOK_PRIO_LAST); + +bool drivers_predicate_pre_main(const void *state) +{ + return ((struct test_state *)state)->ec_app_main_run == false; +} + +bool drivers_predicate_post_main(const void *state) +{ + return !drivers_predicate_pre_main(state); +} + +void test_main(void) +{ + k_sem_init(&init_hooks_completed, 0, 1); + + struct test_state state = { + .ec_app_main_run = false, + }; + + /* Run all the suites that depend on main not being called yet */ + ztest_run_all(&state); + + ec_app_main(); + state.ec_app_main_run = true; + +/* Delay the post-main tests until hooks finish. Allow a generous + * timeout before failing. Tests with mocked power states interfere + * with this mechanism, so proceed normally in this case. + */ +#if !IS_ENABLED(CONFIG_POWER_SEQUENCE_MOCK) + zassert_ok(k_sem_take(&init_hooks_completed, K_SECONDS(10)), + "Timed out waiting for hooks to finish"); +#endif /* !IS_ENABLED(CONFIG_POWER_SEQUENCE_MOCK) */ + + /* Run all the suites that depend on main being called */ + ztest_run_all(&state); +} diff --git a/zephyr/test/drivers/src/stubs.c b/zephyr/test/drivers/common/src/stubs.c index 84ae387fb4..2683b326a8 100644 --- a/zephyr/test/drivers/src/stubs.c +++ b/zephyr/test/drivers/common/src/stubs.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,7 +11,7 @@ #include "charger/isl923x_public.h" #include "charger/isl9241_public.h" #include "config.h" -#include "fff.h" +#include <zephyr/fff.h> #include "gpio/gpio_int.h" #include "hooks.h" #include "i2c/i2c.h" @@ -30,8 +30,8 @@ #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(stubs); -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) /* All of these definitions are just to get the test to link. None of these * functions are useful or behave as they should. Please remove them once the @@ -55,8 +55,7 @@ BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); int board_set_active_charge_port(int port) { - int is_real_port = (port >= 0 && - port < CONFIG_USB_PD_PORT_MAX_COUNT); + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; if (!is_real_port && port != CHARGE_PORT_NONE) @@ -84,7 +83,6 @@ int board_set_active_charge_port(int port) return EC_ERROR_INVAL; } - CPRINTS("New charge port: p%d", port); /* @@ -117,29 +115,9 @@ void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, int charge_mv) { charge_set_input_current_limit( - MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); } -struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = DT_REG_ADDR(DT_NODELABEL(tcpci_emul)), - }, - .drv = &tcpci_tcpm_drv, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = DT_REG_ADDR(DT_NODELABEL( - tcpci_ps8xxx_emul)), - }, - .drv = &ps8xxx_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); static uint16_t ps8xxx_product_id = PS8805_PRODUCT_ID; @@ -170,10 +148,14 @@ int board_is_sourcing_vbus(int port) return ppc_is_sourcing_vbus(port); } -struct usb_mux usbc0_virtual_usb_mux = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, +/* TODO(b/239457738): Move to dts */ +struct usb_mux_chain usbc0_virtual_usb_mux_chain = { + .mux = + &(const struct usb_mux){ + .usb_port = USBC_PORT_C0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + }, }; struct usb_mux usbc1_virtual_usb_mux = { @@ -182,22 +164,32 @@ struct usb_mux usbc1_virtual_usb_mux = { .hpd_update = &virtual_hpd_update, }; -struct usb_mux usb_muxes[] = { +struct usb_mux_chain usbc1_virtual_usb_mux_chain = { + .mux = &usbc1_virtual_usb_mux, +}; + +struct usb_mux usbc0_mux0 = { + .usb_port = USBC_PORT_C0, + .driver = &tcpci_tcpm_usb_mux_driver, + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = DT_REG_ADDR(DT_NODELABEL(tcpci_emul)), +}; + +struct usb_mux_chain usb_muxes[] = { [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &tcpci_tcpm_usb_mux_driver, - .next_mux = &usbc0_virtual_usb_mux, - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = DT_REG_ADDR(DT_NODELABEL(tcpci_emul)), + .mux = &usbc0_mux0, + .next = &usbc0_virtual_usb_mux_chain, }, [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .next_mux = &usbc1_virtual_usb_mux, - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = DT_REG_ADDR(DT_NODELABEL( - usb_c1_bb_retimer_emul)), + .mux = &(const struct usb_mux){ + .usb_port = USBC_PORT_C1, + .driver = &bb_usb_retimer, + .hpd_update = bb_retimer_hpd_update, + .i2c_port = I2C_PORT_USB_C1, + .i2c_addr_flags = DT_REG_ADDR(DT_NODELABEL( + usb_c1_bb_retimer_emul)), + }, + .next = &usbc1_virtual_usb_mux_chain, }, }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); @@ -247,6 +239,8 @@ unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); DEFINE_FAKE_VOID_FUNC(system_hibernate, uint32_t, uint32_t); +DEFINE_FAKE_VOID_FUNC(board_reset_pd_mcu); + uint16_t tcpc_get_alert_status(void) { uint16_t status = 0; @@ -257,13 +251,13 @@ uint16_t tcpc_get_alert_status(void) */ if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(usb_c0_tcpc_int_odl))) { if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(usb_c0_tcpc_rst_l)) != 0) + GPIO_DT_FROM_NODELABEL(usb_c0_tcpc_rst_l)) != 0) status |= PD_STATUS_TCPC_ALERT_0; } if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(usb_c1_tcpc_int_odl))) { if (gpio_pin_get_dt( - GPIO_DT_FROM_NODELABEL(usb_c1_tcpc_rst_l)) != 0) + GPIO_DT_FROM_NODELABEL(usb_c1_tcpc_rst_l)) != 0) status |= PD_STATUS_TCPC_ALERT_1; } diff --git a/zephyr/test/drivers/src/test_mocks.c b/zephyr/test/drivers/common/src/test_mocks.c index f8bbb1a6c1..11887f7cb9 100644 --- a/zephyr/test/drivers/src/test_mocks.c +++ b/zephyr/test/drivers/common/src/test_mocks.c @@ -1,9 +1,9 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "test/drivers/test_mocks.h" @@ -16,6 +16,13 @@ DEFINE_FAKE_VALUE_FUNC(int, init_rom_copy, int, int, int); /* Mocks for common/system.c */ DEFINE_FAKE_VALUE_FUNC(int, system_jumped_late); +DEFINE_FAKE_VALUE_FUNC(int, system_is_locked); +DEFINE_FAKE_VOID_FUNC(system_reset, int); +DEFINE_FAKE_VOID_FUNC(software_panic, uint32_t, uint32_t); +DEFINE_FAKE_VOID_FUNC(assert_post_action, const char *, unsigned int); + +/* Mocks for common/lid_angle.c */ +DEFINE_FAKE_VOID_FUNC(lid_angle_peripheral_enable, int); /** * @brief Reset all the fakes before each test. @@ -30,6 +37,10 @@ static void fff_reset_rule_before(const struct ztest_unit_test *test, RESET_FAKE(init_rom_unmap); RESET_FAKE(init_rom_copy); RESET_FAKE(system_jumped_late); + RESET_FAKE(system_reset); + RESET_FAKE(software_panic); + RESET_FAKE(assert_post_action); + RESET_FAKE(lid_angle_peripheral_enable); } ZTEST_RULE(fff_reset_rule, fff_reset_rule_before, NULL); diff --git a/zephyr/test/drivers/common/src/test_rules.c b/zephyr/test/drivers/common/src/test_rules.c new file mode 100644 index 0000000000..e1b1d59480 --- /dev/null +++ b/zephyr/test/drivers/common/src/test_rules.c @@ -0,0 +1,38 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "emul/tcpc/emul_tcpci.h" +#include "motion_sense_fifo.h" +#include "test/drivers/stubs.h" +#include "test/drivers/utils.h" +#include "usb_pd_tcpm.h" + +static void motion_sense_fifo_reset_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + motion_sense_fifo_reset(); +} +ZTEST_RULE(motion_sense_fifo_reset, motion_sense_fifo_reset_before, NULL); + +static void tcpci_revision_reset_before(const struct ztest_unit_test *test, + void *data) +{ + ARG_UNUSED(test); + ARG_UNUSED(data); + const struct emul *tcpc_c0_emul = EMUL_GET_USBC_BINDING(0, tcpc); + const struct emul *tcpc_c1_emul = EMUL_GET_USBC_BINDING(1, tcpc); + + /* Set TCPCI to revision 2 for both emulators */ + tcpc_config[USBC_PORT_C0].flags |= TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(tcpc_c0_emul, TCPCI_EMUL_REV2_0_VER1_1); + + tcpc_config[USBC_PORT_C1].flags |= TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(tcpc_c1_emul, TCPCI_EMUL_REV2_0_VER1_1); +} +ZTEST_RULE(tcpci_revision_reset, tcpci_revision_reset_before, NULL); diff --git a/zephyr/test/drivers/src/utils.c b/zephyr/test/drivers/common/src/utils.c index 5ba78043b1..f083300886 100644 --- a/zephyr/test/drivers/src/utils.c +++ b/zephyr/test/drivers/common/src/utils.c @@ -1,47 +1,45 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> -#include <zephyr/shell/shell_uart.h> #include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/shell/shell.h> +#include <zephyr/shell/shell_dummy.h> /* nocheck */ +#include <zephyr/shell/shell_uart.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include "acpi.h" #include "battery.h" #include "battery_smart.h" +#include "charge_state.h" +#include "chipset.h" +#include "lpc.h" #include "emul/emul_isl923x.h" #include "emul/emul_smart_battery.h" +#include "emul/emul_stub_device.h" #include "emul/tcpc/emul_tcpci_partner_src.h" #include "hooks.h" #include "power.h" +#include "task.h" +#include "tcpm/tcpci.h" #include "test/drivers/stubs.h" -#include "chipset.h" #include "test/drivers/utils.h" -#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) +#define BATTERY_NODE DT_NODELABEL(battery) #define GPIO_BATT_PRES_ODL_PATH DT_PATH(named_gpios, ec_batt_pres_odl) #define GPIO_BATT_PRES_ODL_PORT DT_GPIO_PIN(GPIO_BATT_PRES_ODL_PATH, gpios) -void test_set_chipset_to_s0(void) +void test_set_battery_level(int percentage) { struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); const struct device *battery_gpio_dev = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_BATT_PRES_ODL_PATH, gpios)); - - printk("%s: Forcing power on\n", __func__); - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); - /* - * Make sure that battery is in good condition to - * not trigger hibernate in charge_state_v2.c - * Set battery voltage to expected value and capacity to 75%. Battery - * will not be full and accepts charging, but will not trigger - * hibernate. Charge level is chosen arbitrary. - */ - bat->cap = bat->full_cap * 3 / 4; + bat->cap = bat->full_cap * percentage / 100; bat->volt = battery_get_info()->voltage_normal; bat->design_mv = bat->volt; @@ -50,6 +48,28 @@ void test_set_chipset_to_s0(void) GPIO_BATT_PRES_ODL_PORT, 0), NULL); + /* We need to wait for the charge task to re-read battery parameters */ + WAIT_FOR(!charge_want_shutdown(), CHARGE_MAX_SLEEP_USEC + 1, + k_sleep(K_SECONDS(1))); +} + +void test_set_chipset_to_s0(void) +{ + printk("%s: Forcing power on\n", __func__); + + task_wake(TASK_ID_CHIPSET); + k_sleep(K_SECONDS(1)); + + /* + * Make sure that battery is in good condition to + * not trigger hibernate in charge_state_v2.c + * Set battery voltage to expected value and capacity to 50%. Battery + * will not be full and accepts charging, but will not trigger + * hibernate. Charge level is set to the default value of an emulator + * (emul/emul_smart_battery.c). b/244366201. + */ + test_set_battery_level(50); + /* The easiest way to power on seems to be the shell command. */ zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "power on"), NULL); @@ -61,8 +81,41 @@ void test_set_chipset_to_s0(void) power_get_state()); } +void test_set_chipset_to_power_level(enum power_state new_state) +{ + zassert_true(new_state == POWER_G3 || new_state == POWER_S5 || + new_state == POWER_S4 || new_state == POWER_S3 || + new_state == POWER_S0 +#ifdef CONFIG_POWER_S0IX + || new_state == POWER_S0ix +#endif + , + "Power state must be one of the steady states"); + task_wake(TASK_ID_CHIPSET); + k_sleep(K_SECONDS(1)); + + if (new_state == POWER_G3) { + test_set_chipset_to_g3(); + return; + } + + test_set_chipset_to_s0(); + + power_set_state(new_state); + + k_sleep(K_SECONDS(1)); + + /* Check if chipset is in correct state */ + zassert_equal(new_state, power_get_state(), "Expected %d, got %d", + new_state, power_get_state()); +} + void test_set_chipset_to_g3(void) { + /* Let power code to settle on a particular state first. */ + task_wake(TASK_ID_CHIPSET); + k_sleep(K_SECONDS(1)); + printk("%s: Forcing shutdown\n", __func__); chipset_force_shutdown(CHIPSET_RESET_KB_SYSRESET); k_sleep(K_SECONDS(20)); @@ -94,6 +147,94 @@ void disconnect_source_from_port(const struct emul *tcpci_emul, k_sleep(K_SECONDS(1)); } +void connect_sink_to_port(struct tcpci_partner_data *partner, + const struct emul *tcpci_emul, + const struct emul *charger_emul) +{ + /* + * TODO(b/221439302) Updating the TCPCI emulator registers, updating the + * vbus, as well as alerting should all be a part of the connect + * function. + */ + /* Enforce that we only support the isl923x emulator for now */ + __ASSERT_NO_MSG(EMUL_DT_GET(DT_NODELABEL(isl923x_emul)) == + charger_emul); + isl923x_emul_set_adc_vbus(charger_emul, 0); + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_VBUS_DET); + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_EXT_STATUS, + TCPC_REG_EXT_STATUS_SAFE0V); + + tcpci_tcpc_alert(0); + k_sleep(K_SECONDS(1)); + + zassume_ok(tcpci_partner_connect_to_tcpci(partner, tcpci_emul), NULL); + + /* Wait for PD negotiation and current ramp. + * TODO(b/213906889): Check message timing and contents. + */ + k_sleep(K_SECONDS(10)); +} + +void disconnect_sink_from_port(const struct emul *tcpci_emul) +{ + zassume_ok(tcpci_emul_disconnect_partner(tcpci_emul), NULL); + k_sleep(K_SECONDS(1)); +} + +uint8_t acpi_read(uint8_t acpi_addr) +{ + uint8_t readval; + /* + * See ec_commands.h for details on the required process + * First, send the read command, which should populate no data + */ + zassume_ok(acpi_ap_to_ec(true, EC_CMD_ACPI_READ, &readval), + "Failed to send read command"); + + /* Next, time for the address which should populate our result */ + zassume_equal(acpi_ap_to_ec(false, acpi_addr, &readval), 1, + "Failed to read value"); + return readval; +} + +void acpi_write(uint8_t acpi_addr, uint8_t write_byte) +{ + uint8_t readval; + /* + * See ec_commands.h for details on the required process + * First, send the read command, which should populate no data + */ + zassume_ok(acpi_ap_to_ec(true, EC_CMD_ACPI_WRITE, &readval), + "Failed to send read command"); + + /* Next, time for the address we want to write */ + zassume_ok(acpi_ap_to_ec(false, acpi_addr, &readval), + "Failed to write address"); + + /* Finally, time to write the data */ + zassume_ok(acpi_ap_to_ec(false, write_byte, &readval), + "Failed to write value"); +} + +enum ec_status host_cmd_host_event(enum ec_host_event_action action, + enum ec_host_event_mask_type mask_type, + struct ec_response_host_event *r) +{ + enum ec_status ret_val; + + struct ec_params_host_event params = { + .action = action, + .mask_type = mask_type, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_HOST_EVENT, 0, *r, params); + + ret_val = host_command_process(&args); + + return ret_val; +} + void host_cmd_motion_sense_dump(int max_sensor_count, struct ec_response_motion_sense *response) { @@ -340,6 +481,98 @@ void host_cmd_typec_discovery(int port, enum typec_partner_type partner_type, "Failed to get Type-C state for port %d", port); } +void host_cmd_typec_control_enter_mode(int port, enum typec_mode mode) +{ + struct ec_params_typec_control params = { + .port = port, + .command = TYPEC_CONTROL_COMMAND_ENTER_MODE, + .mode_to_enter = mode + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_TYPEC_CONTROL, 0, params); + + zassume_ok(host_command_process(&args), + "Failed to send Type-C control for port %d", port); +} + +void host_cmd_typec_control_exit_modes(int port) +{ + struct ec_params_typec_control params = { + .port = port, .command = TYPEC_CONTROL_COMMAND_EXIT_MODES + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_TYPEC_CONTROL, 0, params); + + zassume_ok(host_command_process(&args), + "Failed to send Type-C control for port %d", port); +} + +void host_cmd_typec_control_usb_mux_set(int port, + struct typec_usb_mux_set mux_set) +{ + struct ec_params_typec_control params = { + .port = port, + .command = TYPEC_CONTROL_COMMAND_USB_MUX_SET, + .mux_params = mux_set, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_TYPEC_CONTROL, 0, params); + + zassume_ok(host_command_process(&args), + "Failed to send Type-C control for port %d", port); +} + +void host_cmd_typec_control_clear_events(int port, uint32_t events) +{ + struct ec_params_typec_control params = { + .port = port, + .command = TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, + .clear_events_mask = events, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_TYPEC_CONTROL, 0, params); + + zassume_ok(host_command_process(&args), + "Failed to send Type-C control for port %d", port); +} + +void host_cmd_usb_pd_get_amode( + uint8_t port, uint16_t svid_idx, + struct ec_params_usb_pd_get_mode_response *response, int *response_size) +{ + struct ec_params_usb_pd_get_mode_request params = { + .port = port, + .svid_idx = svid_idx, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_USB_PD_GET_AMODE, 0, params); + args.response = response; + + zassume_ok(host_command_process(&args), + "Failed to get alternate-mode info for port %d", port); + *response_size = args.response_size; +} + +void host_events_save(struct host_events_ctx *host_events_ctx) +{ + host_events_ctx->lpc_host_events = lpc_get_host_events(); + + for (int i = 0; i < LPC_HOST_EVENT_COUNT; i++) { + host_events_ctx->lpc_host_event_mask[i] = + lpc_get_host_events_by_type(i); + } +} + +void host_events_restore(struct host_events_ctx *host_events_ctx) +{ + lpc_set_host_event_state(host_events_ctx->lpc_host_events); + + for (int i = 0; i < LPC_HOST_EVENT_COUNT; i++) { + lpc_set_host_event_mask( + i, host_events_ctx->lpc_host_event_mask[i]); + } +} + K_HEAP_DEFINE(test_heap, 2048); void *test_malloc(size_t bytes) @@ -359,3 +592,36 @@ void test_free(void *mem) { k_heap_free(&test_heap, mem); } + +int emul_init_stub(const struct device *dev) +{ + ARG_UNUSED(dev); + + return 0; +} + +/* These 2 lines are needed because we don't define an espi host driver */ +#define DT_DRV_COMPAT zephyr_espi_emul_espi_host +DT_INST_FOREACH_STATUS_OKAY(EMUL_STUB_DEVICE); + +void check_console_cmd(const char *cmd, const char *expected_output, + const int expected_rv, const char *file, const int line) +{ + const char *buffer; + size_t buffer_size; + int rv; + + shell_backend_dummy_clear_output(get_ec_shell()); + rv = shell_execute_cmd(get_ec_shell(), cmd); + + zassert_equal(expected_rv, rv, + "%s:%u \'%s\' - Expected %d, returned %d", file, line, + cmd, expected_rv, rv); + + if (expected_output) { + buffer = shell_backend_dummy_get_output(get_ec_shell(), + &buffer_size); + zassert_true(strstr(buffer, expected_output), + "Invalid console output %s", buffer); + } +} diff --git a/zephyr/test/drivers/default/CMakeLists.txt b/zephyr/test/drivers/default/CMakeLists.txt new file mode 100644 index 0000000000..8f5a33cfa1 --- /dev/null +++ b/zephyr/test/drivers/default/CMakeLists.txt @@ -0,0 +1,90 @@ +target_sources(app PRIVATE + src/battery.c + src/bb_retimer.c + src/bc12.c + src/bma2x2.c + src/bmi160.c + src/bmi260.c + src/charge_manager.c + src/console.c + src/console_cmd/adc.c + src/console_cmd/battery.c + src/console_cmd/cbi.c + src/console_cmd/charge_manager.c + src/console_cmd/charge_state.c + src/console_cmd/charger.c + src/console_cmd/accelinit.c + src/console_cmd/accelinfo.c + src/console_cmd/accelspoof.c + src/console_cmd/accelrate.c + src/console_cmd/accelrange.c + src/console_cmd/accelread.c + src/console_cmd/accelres.c + src/console_cmd/button.c + src/console_cmd/crash.c + src/console_cmd/cutoff.c + src/console_cmd/gpio.c + src/console_cmd/i2c_portmap.c + src/console_cmd/md.c + src/console_cmd/hcdebug.c + src/console_cmd/hibdelay.c + src/console_cmd/hostevent.c + src/console_cmd/panic_output.c + src/console_cmd/port80.c + src/console_cmd/powerindebug.c + src/console_cmd/power_button.c + src/console_cmd/rtc.c + src/console_cmd/rw.c + src/console_cmd/sleepmask.c + src/console_cmd/sleeptimeout.c + src/console_cmd/sysinfo.c + src/console_cmd/tcpci_dump.c + src/console_cmd/usb_pd_console.c + src/console_cmd/version.c + src/console_cmd/waitms.c + src/cros_cbi.c + src/espi.c + src/flash.c + src/gpio.c + src/integration/usbc/usb.c + src/integration/usbc/usb_20v_3a_pd_charger.c + src/integration/usbc/usb_5v_3a_pd_sink.c + src/integration/usbc/usb_5v_3a_pd_source.c + src/integration/usbc/usb_attach_src_snk.c + src/integration/usbc/usb_pd_bist_shared.c + src/integration/usbc/usb_pd_ctrl_msg.c + src/integration/usbc/usb_pd_rev3.c + src/i2c.c + src/i2c_passthru.c + src/isl923x.c + src/led.c + src/lid_angle.c + src/lid_switch.c + src/lis2dw12.c + src/ln9310.c + src/locate_chip.c + src/motion_sense/motion_sense.c + src/panic.c + src/panic_output.c + src/port80.c + src/power_common.c + src/ppc_sn5s330.c + src/ppc_syv682x.c + src/ps8xxx.c + src/smart.c + src/stm_mems_common.c + src/system.c + src/tablet_mode.c + src/tcpci.c + src/tcpci_test_common.c + src/tcs3400.c + src/temp_sensor.c + src/thermistor.c + src/uart_hostcmd.c + src/usb_mux.c + src/usb_pd_host_cmd.c + src/vboot_hash.c + src/virtual_battery.c + src/vstore.c + src/watchdog.c +) diff --git a/zephyr/test/drivers/default/prj.conf b/zephyr/test/drivers/default/prj.conf new file mode 100644 index 0000000000..a9981f31d2 --- /dev/null +++ b/zephyr/test/drivers/default/prj.conf @@ -0,0 +1,12 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC_CMD_BUTTON=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_RTC_ALARM=y +CONFIG_PLATFORM_EC_LED_DT=y +CONFIG_PLATFORM_EC_RTC=y +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y + +CONFIG_SYSTEM_FAKE=y diff --git a/zephyr/test/drivers/src/battery.c b/zephyr/test/drivers/default/src/battery.c index e454262aa2..6b01a5ca39 100644 --- a/zephyr/test/drivers/src/battery.c +++ b/zephyr/test/drivers/default/src/battery.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> @@ -14,6 +14,15 @@ #define GPIO_BATT_PRES_ODL_PATH DT_PATH(named_gpios, ec_batt_pres_odl) #define GPIO_BATT_PRES_ODL_PORT DT_GPIO_PIN(GPIO_BATT_PRES_ODL_PATH, gpios) +static void battery_after(void *data) +{ + const struct device *dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_BATT_PRES_ODL_PATH, gpios)); + + /* Set default state (battery is present) */ + gpio_emul_input_set(dev, GPIO_BATT_PRES_ODL_PORT, 0); +} + ZTEST_USER(battery, test_battery_is_present_gpio) { const struct device *dev = @@ -28,4 +37,5 @@ ZTEST_USER(battery, test_battery_is_present_gpio) zassert_equal(BP_NO, battery_is_present(), NULL); } -ZTEST_SUITE(battery, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +ZTEST_SUITE(battery, drivers_predicate_post_main, NULL, NULL, battery_after, + NULL); diff --git a/zephyr/test/drivers/src/bb_retimer.c b/zephyr/test/drivers/default/src/bb_retimer.c index dbe4d3143f..74d8fa86a2 100644 --- a/zephyr/test/drivers/src/bb_retimer.c +++ b/zephyr/test/drivers/default/src/bb_retimer.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> @@ -26,11 +26,9 @@ #define GPIO_USB_C1_LS_EN_PATH DT_PATH(named_gpios, usb_c1_ls_en) #define GPIO_USB_C1_LS_EN_PORT DT_GPIO_PIN(GPIO_USB_C1_LS_EN_PATH, gpios) #define GPIO_USB_C1_RT_RST_ODL_PATH DT_PATH(named_gpios, usb_c1_rt_rst_odl) -#define GPIO_USB_C1_RT_RST_ODL_PORT \ - DT_GPIO_PIN(GPIO_USB_C1_RT_RST_ODL_PATH, gpios) -#define EMUL_LABEL DT_NODELABEL(usb_c1_bb_retimer_emul) - -#define BB_RETIMER_ORD DT_DEP_ORD(EMUL_LABEL) +#define GPIO_USB_C1_RT_RST_ODL_PORT \ + DT_GPIO_PIN(GPIO_USB_C1_RT_RST_ODL_PATH, gpios) +#define BB_RETIMER_NODE DT_NODELABEL(usb_c1_bb_retimer_emul) /** Test is retimer fw update capable function. */ ZTEST_USER(bb_retimer, test_bb_is_fw_update_capable) @@ -40,39 +38,42 @@ ZTEST_USER(bb_retimer, test_bb_is_fw_update_capable) } /** Test is retimer fw update capable function. */ -ZTEST_USER(bb_retimer, test_bb_set_state) +ZTEST_USER(bb_retimer_no_tasks, test_bb_set_state) { struct pd_discovery *disc; uint32_t conn, exp_conn; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BB_RETIMER_NODE); + struct i2c_common_emul_data *common_data = + emul_bb_retimer_get_i2c_common_data(emul); bool ack_required; - emul = bb_emul_get(BB_RETIMER_ORD); - set_test_runner_tid(); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, + i2c_common_emul_set_write_fail_reg(common_data, BB_RETIMER_REG_CONNECTION_STATE); /* Test fail on reset register write */ zassert_equal(EC_ERROR_INVAL, - bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, USB_PD_MUX_NONE, &ack_required), NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set UFP role for whole test */ tc_set_data_role(USBC_PORT_C1, PD_ROLE_UFP); + zassume_equal(PD_ROLE_UFP, pd_get_data_role(USBC_PORT_C1), NULL); /* Test none mode */ bb_emul_set_reg(emul, BB_RETIMER_REG_CONNECTION_STATE, 0x12144678); - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_NONE, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_NONE, &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); /* Only UFP mode is set */ @@ -82,9 +83,10 @@ ZTEST_USER(bb_retimer, test_bb_set_state) /* Test USB3 gen1 mode */ prl_set_rev(USBC_PORT_C1, TCPCI_MSG_SOP_PRIME, PD_REV10); - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_USB_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB_ENABLED, &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | @@ -94,26 +96,28 @@ ZTEST_USER(bb_retimer, test_bb_set_state) exp_conn, conn); /* Test USB3 gen2 mode */ - disc = pd_get_am_discovery_and_notify_access( - USBC_PORT_C1, TCPCI_MSG_SOP_PRIME); + disc = pd_get_am_discovery_and_notify_access(USBC_PORT_C1, + TCPCI_MSG_SOP_PRIME); disc->identity.product_t1.p_rev30.ss = USB_R30_SS_U32_U40_GEN2; prl_set_rev(USBC_PORT_C1, TCPCI_MSG_SOP_PRIME, PD_REV30); - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_USB_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB_ENABLED, &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_USB_3_CONNECTION | - BB_RETIMER_USB_3_SPEED; + BB_RETIMER_USB_3_CONNECTION | BB_RETIMER_USB_3_SPEED; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); /* Test TBT mode */ - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | @@ -123,91 +127,93 @@ ZTEST_USER(bb_retimer, test_bb_set_state) exp_conn, conn); /* Test USB4 mode */ - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_USB4_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB4_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | - BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_USB4_ENABLED; + BB_RETIMER_DATA_CONNECTION_PRESENT | BB_RETIMER_USB4_ENABLED; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); /* Test USB4 mode with polarity inverted */ - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_USB4_ENABLED | - USB_PD_MUX_POLARITY_INVERTED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB4_ENABLED | + USB_PD_MUX_POLARITY_INVERTED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_CONNECTION_ORIENTATION | - BB_RETIMER_USB4_ENABLED; + BB_RETIMER_CONNECTION_ORIENTATION | BB_RETIMER_USB4_ENABLED; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); /* Test DP mode */ - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_DP_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_DP_ENABLED, &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | - BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_DP_CONNECTION; + BB_RETIMER_DATA_CONNECTION_PRESENT; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_DP_ENABLED | - USB_PD_MUX_HPD_IRQ, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_DP_ENABLED | + USB_PD_MUX_HPD_IRQ, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | - BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_DP_CONNECTION | - BB_RETIMER_IRQ_HPD; + BB_RETIMER_DATA_CONNECTION_PRESENT | BB_RETIMER_IRQ_HPD; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_DP_ENABLED | - USB_PD_MUX_HPD_LVL, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_DP_ENABLED | + USB_PD_MUX_HPD_LVL, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_USB_DATA_ROLE | - BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_DP_CONNECTION | - BB_RETIMER_HPD_LVL; + BB_RETIMER_DATA_CONNECTION_PRESENT | BB_RETIMER_HPD_LVL; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); } /** Test setting different options for DFP role */ -ZTEST_USER(bb_retimer, test_bb_set_dfp_state) +ZTEST_USER(bb_retimer_no_tasks, test_bb_set_dfp_state) { union tbt_mode_resp_device device_resp; union tbt_mode_resp_cable cable_resp; struct pd_discovery *disc, *dev_disc; uint32_t conn, exp_conn; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BB_RETIMER_NODE); bool ack_required; - emul = bb_emul_get(BB_RETIMER_ORD); - set_test_runner_tid(); tc_set_data_role(USBC_PORT_C1, PD_ROLE_DFP); + zassume_equal(PD_ROLE_DFP, pd_get_data_role(USBC_PORT_C1), NULL); /* Test PD mux none mode with DFP should clear all bits in state */ bb_emul_set_reg(emul, BB_RETIMER_REG_CONNECTION_STATE, 0x12144678); - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_NONE, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_NONE, &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = 0; @@ -215,8 +221,8 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) exp_conn, conn); /* Set active cable type */ - disc = pd_get_am_discovery_and_notify_access( - USBC_PORT_C1, TCPCI_MSG_SOP_PRIME); + disc = pd_get_am_discovery_and_notify_access(USBC_PORT_C1, + TCPCI_MSG_SOP_PRIME); disc->identity.idh.product_type = IDH_PTYPE_ACABLE; disc->identity.product_t2.a2_rev30.active_elem = ACTIVE_RETIMER; disc->identity.product_t1.p_rev30.ss = USB_R30_SS_U32_U40_GEN2; @@ -237,8 +243,8 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) disc->svids[0].mode_vdo[0] = cable_resp.raw_value; /* Set device VDO */ - dev_disc = pd_get_am_discovery_and_notify_access( - USBC_PORT_C1, TCPCI_MSG_SOP); + dev_disc = pd_get_am_discovery_and_notify_access(USBC_PORT_C1, + TCPCI_MSG_SOP); dev_disc->svid_cnt = 1; dev_disc->svids[0].svid = USB_VID_INTEL; dev_disc->svids[0].discovery = PD_DISC_COMPLETE; @@ -251,42 +257,43 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) dev_disc->svids[0].mode_vdo[0] = device_resp.raw_value; /* Test USB mode with active cable */ - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_USB_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_USB_ENABLED, &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_USB_3_CONNECTION | - BB_RETIMER_USB_3_SPEED | - BB_RETIMER_RE_TIMER_DRIVER | - BB_RETIMER_ACTIVE_PASSIVE; + BB_RETIMER_USB_3_CONNECTION | BB_RETIMER_USB_3_SPEED | + BB_RETIMER_RE_TIMER_DRIVER | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); /* Test TBT mode with active cable */ - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_ACTIVE_PASSIVE; + BB_RETIMER_TBT_CONNECTION | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); /* Test TBT mode with retimer */ cable_resp.retimer_type = USB_RETIMER; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_RE_TIMER_DRIVER | + BB_RETIMER_TBT_CONNECTION | BB_RETIMER_RE_TIMER_DRIVER | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); @@ -295,14 +302,15 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) cable_resp.retimer_type = USB_NOT_RETIMER; cable_resp.tbt_cable = TBT_CABLE_OPTICAL; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_TBT_CABLE_TYPE | + BB_RETIMER_TBT_CONNECTION | BB_RETIMER_TBT_CABLE_TYPE | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); @@ -311,15 +319,16 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) cable_resp.tbt_cable = TBT_CABLE_NON_OPTICAL; cable_resp.lsrx_comm = UNIDIR_LSRX_COMM; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); - exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_TBT_ACTIVE_LINK_TRAINING | - BB_RETIMER_ACTIVE_PASSIVE; + exp_conn = + BB_RETIMER_DATA_CONNECTION_PRESENT | BB_RETIMER_TBT_CONNECTION | + BB_RETIMER_TBT_ACTIVE_LINK_TRAINING | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); @@ -327,9 +336,11 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) cable_resp.lsrx_comm = BIDIR_LSRX_COMM; cable_resp.tbt_cable_speed = TBT_SS_U31_GEN1; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | @@ -341,9 +352,11 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) cable_resp.tbt_cable_speed = TBT_SS_U32_GEN1_GEN2; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | @@ -355,9 +368,11 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) cable_resp.tbt_cable_speed = TBT_SS_TBT_GEN3; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | @@ -371,15 +386,16 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) cable_resp.tbt_cable_speed = TBT_SS_RES_0; cable_resp.tbt_rounded = TBT_GEN3_GEN4_ROUNDED_NON_ROUNDED; disc->svids[0].mode_vdo[0] = cable_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); - exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_TBT_CABLE_GENERATION(1) | - BB_RETIMER_ACTIVE_PASSIVE; + exp_conn = + BB_RETIMER_DATA_CONNECTION_PRESENT | BB_RETIMER_TBT_CONNECTION | + BB_RETIMER_TBT_CABLE_GENERATION(1) | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); @@ -388,14 +404,15 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) disc->svids[0].mode_vdo[0] = cable_resp.raw_value; device_resp.tbt_adapter = TBT_ADAPTER_TBT2_LEGACY; dev_disc->svids[0].mode_vdo[0] = device_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_TBT_TYPE | + BB_RETIMER_TBT_CONNECTION | BB_RETIMER_TBT_TYPE | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); @@ -404,14 +421,15 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) device_resp.tbt_adapter = TBT_ADAPTER_TBT3; device_resp.intel_spec_b0 = VENDOR_SPECIFIC_SUPPORTED; dev_disc->svids[0].mode_vdo[0] = device_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_ACTIVE_PASSIVE; + BB_RETIMER_TBT_CONNECTION | BB_RETIMER_ACTIVE_PASSIVE; if (IS_ENABLED(CONFIG_USBC_RETIMER_INTEL_BB_VPRO_CAPABLE)) exp_conn |= BB_RETIMER_VPRO_DOCK_DP_OVERDRIVE; @@ -423,15 +441,16 @@ ZTEST_USER(bb_retimer, test_bb_set_dfp_state) device_resp.intel_spec_b0 = VENDOR_SPECIFIC_NOT_SUPPORTED; device_resp.vendor_spec_b1 = VENDOR_SPECIFIC_SUPPORTED; dev_disc->svids[0].mode_vdo[0] = device_resp.raw_value; - zassert_equal(EC_SUCCESS, bb_usb_retimer.set(&usb_muxes[USBC_PORT_C1], - USB_PD_MUX_TBT_COMPAT_ENABLED, - &ack_required), NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.set(usb_muxes[USBC_PORT_C1].mux, + USB_PD_MUX_TBT_COMPAT_ENABLED, + &ack_required), + NULL); zassert_false(ack_required, "ACK is never required for BB retimer"); conn = bb_emul_get_reg(emul, BB_RETIMER_REG_CONNECTION_STATE); - exp_conn = BB_RETIMER_DATA_CONNECTION_PRESENT | - BB_RETIMER_TBT_CONNECTION | - BB_RETIMER_VPRO_DOCK_DP_OVERDRIVE | - BB_RETIMER_ACTIVE_PASSIVE; + exp_conn = + BB_RETIMER_DATA_CONNECTION_PRESENT | BB_RETIMER_TBT_CONNECTION | + BB_RETIMER_VPRO_DOCK_DP_OVERDRIVE | BB_RETIMER_ACTIVE_PASSIVE; zassert_equal(exp_conn, conn, "Expected state 0x%lx, got 0x%lx", exp_conn, conn); } @@ -441,86 +460,90 @@ ZTEST_USER(bb_retimer, test_bb_init) { const struct device *gpio_dev = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_USB_C1_LS_EN_PATH, gpios)); - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BB_RETIMER_NODE); + struct i2c_common_emul_data *common_data = + emul_bb_retimer_get_i2c_common_data(emul); zassert_not_null(gpio_dev, "Cannot get GPIO device"); - emul = bb_emul_get(BB_RETIMER_ORD); - /* Set AP to normal state and wait for chipset task */ test_set_chipset_to_s0(); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BB_RETIMER_REG_VENDOR_ID); + i2c_common_emul_set_read_fail_reg(common_data, + BB_RETIMER_REG_VENDOR_ID); /* Test fail on vendor ID read */ zassert_equal(EC_ERROR_INVAL, - bb_usb_retimer.init(&usb_muxes[USBC_PORT_C1]), NULL); + bb_usb_retimer.init(usb_muxes[USBC_PORT_C1].mux), NULL); /* Enable pins should be set always after init, when AP is on */ zassert_equal(1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_LS_EN_PORT), NULL); - zassert_equal(1, gpio_emul_output_get(gpio_dev, - GPIO_USB_C1_RT_RST_ODL_PORT), - NULL); + zassert_equal( + 1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_RT_RST_ODL_PORT), + NULL); /* Setup wrong vendor ID */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); bb_emul_set_reg(emul, BB_RETIMER_REG_VENDOR_ID, 0x12144678); /* Test fail on wrong vendor ID */ zassert_equal(EC_ERROR_INVAL, - bb_usb_retimer.init(&usb_muxes[USBC_PORT_C1]), NULL); + bb_usb_retimer.init(usb_muxes[USBC_PORT_C1].mux), NULL); zassert_equal(1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_LS_EN_PORT), NULL); - zassert_equal(1, gpio_emul_output_get(gpio_dev, - GPIO_USB_C1_RT_RST_ODL_PORT), - NULL); + zassert_equal( + 1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_RT_RST_ODL_PORT), + NULL); /* Setup emulator fail on device ID read */ - i2c_common_emul_set_read_fail_reg(emul, BB_RETIMER_REG_DEVICE_ID); + i2c_common_emul_set_read_fail_reg(common_data, + BB_RETIMER_REG_DEVICE_ID); bb_emul_set_reg(emul, BB_RETIMER_REG_VENDOR_ID, BB_RETIMER_VENDOR_ID_1); /* Test fail on device ID read */ zassert_equal(EC_ERROR_INVAL, - bb_usb_retimer.init(&usb_muxes[USBC_PORT_C1]), NULL); + bb_usb_retimer.init(usb_muxes[USBC_PORT_C1].mux), NULL); zassert_equal(1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_LS_EN_PORT), NULL); - zassert_equal(1, gpio_emul_output_get(gpio_dev, - GPIO_USB_C1_RT_RST_ODL_PORT), - NULL); + zassert_equal( + 1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_RT_RST_ODL_PORT), + NULL); /* Setup wrong device ID */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); bb_emul_set_reg(emul, BB_RETIMER_REG_DEVICE_ID, 0x12144678); /* Test fail on wrong device ID */ zassert_equal(EC_ERROR_INVAL, - bb_usb_retimer.init(&usb_muxes[USBC_PORT_C1]), NULL); + bb_usb_retimer.init(usb_muxes[USBC_PORT_C1].mux), NULL); zassert_equal(1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_LS_EN_PORT), NULL); - zassert_equal(1, gpio_emul_output_get(gpio_dev, - GPIO_USB_C1_RT_RST_ODL_PORT), - NULL); + zassert_equal( + 1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_RT_RST_ODL_PORT), + NULL); /* Test successful init */ bb_emul_set_reg(emul, BB_RETIMER_REG_DEVICE_ID, BB_RETIMER_DEVICE_ID); - zassert_equal(EC_SUCCESS, bb_usb_retimer.init(&usb_muxes[USBC_PORT_C1]), - NULL); + zassert_equal(EC_SUCCESS, + bb_usb_retimer.init(usb_muxes[USBC_PORT_C1].mux), NULL); zassert_equal(1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_LS_EN_PORT), NULL); - zassert_equal(1, gpio_emul_output_get(gpio_dev, - GPIO_USB_C1_RT_RST_ODL_PORT), - NULL); + zassert_equal( + 1, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_RT_RST_ODL_PORT), + NULL); /* Set AP to off state and wait for chipset task */ test_set_chipset_to_g3(); /* With AP off, init should fail and pins should be unset */ zassert_equal(EC_ERROR_NOT_POWERED, - bb_usb_retimer.init(&usb_muxes[USBC_PORT_C1]), NULL); + bb_usb_retimer.init(usb_muxes[USBC_PORT_C1].mux), NULL); zassert_equal(0, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_LS_EN_PORT), NULL); msleep(1); - zassert_equal(0, gpio_emul_output_get(gpio_dev, - GPIO_USB_C1_RT_RST_ODL_PORT), - NULL); + zassert_equal( + 0, gpio_emul_output_get(gpio_dev, GPIO_USB_C1_RT_RST_ODL_PORT), + NULL); } /** Test BB retimer console command */ @@ -549,4 +572,7 @@ ZTEST_USER(bb_retimer, test_bb_console_cmd) zassert_equal(EC_ERROR_PARAM4, rv, "rv=%d", rv); } +ZTEST_SUITE(bb_retimer_no_tasks, drivers_predicate_pre_main, NULL, NULL, NULL, + NULL); + ZTEST_SUITE(bb_retimer, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/bc12.c b/zephyr/test/drivers/default/src/bc12.c index d1a96131c1..a8d23e73ce 100644 --- a/zephyr/test/drivers/src/bc12.c +++ b/zephyr/test/drivers/default/src/bc12.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> @@ -16,19 +16,18 @@ #include "extpower.h" #include "test/drivers/stubs.h" #include "test/drivers/test_state.h" +#include "test/drivers/utils.h" #include <zephyr/logging/log.h> LOG_MODULE_REGISTER(test_drivers_bc12, LOG_LEVEL_DBG); -#define EMUL_LABEL DT_NODELABEL(pi3usb9201_emul) - -#define PI3USB9201_ORD DT_DEP_ORD(EMUL_LABEL) +#define EMUL_NODE DT_NODELABEL(pi3usb9201_emul) /* Control_1 register bit definitions */ #define PI3USB9201_REG_CTRL_1_INT_MASK BIT(0) #define PI3USB9201_REG_CTRL_1_MODE_SHIFT 1 -#define PI3USB9201_REG_CTRL_1_MODE_MASK (0x7 << \ - PI3USB9201_REG_CTRL_1_MODE_SHIFT) +#define PI3USB9201_REG_CTRL_1_MODE_MASK \ + (0x7 << PI3USB9201_REG_CTRL_1_MODE_SHIFT) /* Control_2 register bit definitions */ #define PI3USB9201_REG_CTRL_2_AUTO_SW BIT(1) @@ -67,38 +66,35 @@ struct bc12_status { }; static const struct bc12_status bc12_chg_limits[] = { - [CHG_OTHER] = { .supplier = CHARGE_SUPPLIER_OTHER, - .current_limit = 500 }, - [CHG_2_4A] = { .supplier = CHARGE_SUPPLIER_PROPRIETARY, - .current_limit = USB_CHARGER_MAX_CURR_MA }, - [CHG_2_0A] = { .supplier = CHARGE_SUPPLIER_PROPRIETARY, - .current_limit = USB_CHARGER_MAX_CURR_MA }, - [CHG_1_0A] = { .supplier = CHARGE_SUPPLIER_PROPRIETARY, - .current_limit = 1000 }, + [CHG_OTHER] = { .supplier = CHARGE_SUPPLIER_OTHER, + .current_limit = 500 }, + [CHG_2_4A] = { .supplier = CHARGE_SUPPLIER_PROPRIETARY, + .current_limit = USB_CHARGER_MAX_CURR_MA }, + [CHG_2_0A] = { .supplier = CHARGE_SUPPLIER_PROPRIETARY, + .current_limit = USB_CHARGER_MAX_CURR_MA }, + [CHG_1_0A] = { .supplier = CHARGE_SUPPLIER_PROPRIETARY, + .current_limit = 1000 }, [CHG_RESERVED] = { .supplier = CHARGE_SUPPLIER_NONE, .current_limit = 0 }, - [CHG_CDP] = { .supplier = CHARGE_SUPPLIER_BC12_CDP, - .current_limit = USB_CHARGER_MAX_CURR_MA }, - [CHG_SDP] = { .supplier = CHARGE_SUPPLIER_BC12_SDP, - .current_limit = 500 }, + [CHG_CDP] = { .supplier = CHARGE_SUPPLIER_BC12_CDP, + .current_limit = USB_CHARGER_MAX_CURR_MA }, + [CHG_SDP] = { .supplier = CHARGE_SUPPLIER_BC12_SDP, + .current_limit = 500 }, #if defined(CONFIG_CHARGE_RAMP_SW) || defined(CONFIG_CHARGE_RAMP_HW) - [CHG_DCP] = { .supplier = CHARGE_SUPPLIER_BC12_DCP, - .current_limit = USB_CHARGER_MAX_CURR_MA }, + [CHG_DCP] = { .supplier = CHARGE_SUPPLIER_BC12_DCP, + .current_limit = USB_CHARGER_MAX_CURR_MA }, #else - [CHG_DCP] = { .supplier = CHARGE_SUPPLIER_BC12_DCP, - .current_limit = 500 }, + [CHG_DCP] = { .supplier = CHARGE_SUPPLIER_BC12_DCP, + .current_limit = 500 }, #endif }; #define GPIO_BATT_PRES_ODL_PATH DT_PATH(named_gpios, ec_batt_pres_odl) #define GPIO_BATT_PRES_ODL_PORT DT_GPIO_PIN(GPIO_BATT_PRES_ODL_PATH, gpios) -#define GPIO_ACOK_OD_PATH DT_PATH(named_gpios, acok_od) -#define GPIO_ACOK_OD_PORT DT_GPIO_PIN(GPIO_ACOK_OD_PATH, gpios) - static void test_bc12_pi3usb9201_host_mode(void) { - struct i2c_emul *emul = pi3usb9201_emul_get(PI3USB9201_ORD); + const struct emul *emul = EMUL_DT_GET(EMUL_NODE); uint8_t a, b; /* @@ -140,11 +136,12 @@ static void test_bc12_pi3usb9201_host_mode(void) pi3usb9201_emul_set_reg(emul, PI3USB9201_REG_HOST_STS, 0); } -static void test_bc12_pi3usb9201_client_mode( - enum pi3usb9201_client_sts detect_result, - enum charge_supplier supplier, int current_limit) +static void +test_bc12_pi3usb9201_client_mode(enum pi3usb9201_client_sts detect_result, + enum charge_supplier supplier, + int current_limit) { - struct i2c_emul *emul = pi3usb9201_emul_get(PI3USB9201_ORD); + const struct emul *emul = EMUL_DT_GET(EMUL_NODE); uint8_t a, b; int port, voltage; @@ -188,14 +185,11 @@ static void test_bc12_pi3usb9201_client_mode( } /* Wait for the charge port to update. */ msleep(500); - zassert_equal(charge_manager_get_active_charge_port(), - port, NULL); - zassert_equal(charge_manager_get_supplier(), - supplier, NULL); - zassert_equal(charge_manager_get_charger_current(), - current_limit, NULL); - zassert_equal(charge_manager_get_charger_voltage(), - voltage, NULL); + zassert_equal(charge_manager_get_active_charge_port(), port, NULL); + zassert_equal(charge_manager_get_supplier(), supplier, NULL); + zassert_equal(charge_manager_get_charger_current(), current_limit, + NULL); + zassert_equal(charge_manager_get_charger_voltage(), voltage, NULL); /* * Pretend that the USB-C Port Manager (TCPMv2) has set the port data @@ -213,10 +207,10 @@ static void test_bc12_pi3usb9201_client_mode( b |= PI3USB9201_REG_CTRL_1_INT_MASK; zassert_equal(a, b, NULL); /* Expect the charge manager to have no active supplier. */ - zassert_equal(charge_manager_get_active_charge_port(), - CHARGE_PORT_NONE, NULL); - zassert_equal(charge_manager_get_supplier(), - CHARGE_SUPPLIER_NONE, NULL); + zassert_equal(charge_manager_get_active_charge_port(), CHARGE_PORT_NONE, + NULL); + zassert_equal(charge_manager_get_supplier(), CHARGE_SUPPLIER_NONE, + NULL); zassert_equal(charge_manager_get_charger_current(), 0, NULL); zassert_equal(charge_manager_get_charger_voltage(), 0, NULL); } @@ -234,18 +228,15 @@ ZTEST_USER(bc12, test_bc12_pi3usb9201) { const struct device *batt_pres_dev = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_BATT_PRES_ODL_PATH, gpios)); - const struct device *acok_dev = - DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_ACOK_OD_PATH, gpios)); - struct i2c_emul *emul = pi3usb9201_emul_get(PI3USB9201_ORD); + const struct emul *emul = EMUL_DT_GET(EMUL_NODE); uint8_t a, b; /* Pretend we have battery and AC so charging works normally. */ - zassert_ok(gpio_emul_input_set(batt_pres_dev, - GPIO_BATT_PRES_ODL_PORT, 0), NULL); + zassert_ok(gpio_emul_input_set(batt_pres_dev, GPIO_BATT_PRES_ODL_PORT, + 0), + NULL); zassert_equal(BP_YES, battery_is_present(), NULL); - zassert_ok(gpio_emul_input_set(acok_dev, GPIO_ACOK_OD_PORT, 1), NULL); - msleep(CONFIG_EXTPOWER_DEBOUNCE_MS + 1); - zassert_equal(1, extpower_is_present(), NULL); + set_ac_enabled(true); /* Wait long enough for TCPMv2 to be idle. */ msleep(2000); @@ -269,14 +260,18 @@ ZTEST_USER(bc12, test_bc12_pi3usb9201) test_bc12_pi3usb9201_host_mode(); for (int c = CHG_OTHER; c <= CHG_DCP; c++) { - test_bc12_pi3usb9201_client_mode(c, - bc12_chg_limits[c].supplier, - bc12_chg_limits[c].current_limit); + test_bc12_pi3usb9201_client_mode( + c, bc12_chg_limits[c].supplier, + bc12_chg_limits[c].current_limit); } } /* * TODO(b/216660795): Cleanup state using a teardown_fn */ +static void bc12_after(void *unused) +{ + set_ac_enabled(false); +} -ZTEST_SUITE(bc12, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +ZTEST_SUITE(bc12, drivers_predicate_post_main, NULL, NULL, bc12_after, NULL); diff --git a/zephyr/test/drivers/src/bma2x2.c b/zephyr/test/drivers/default/src/bma2x2.c index 1995adc571..e848a265fd 100644 --- a/zephyr/test/drivers/src/bma2x2.c +++ b/zephyr/test/drivers/default/src/bma2x2.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "i2c.h" @@ -19,19 +19,15 @@ /** How accurate comparision of vectors should be. */ #define V_EPS 8 -#define EMUL_LABEL DT_NODELABEL(bma_emul) - -#define BMA_ORD DT_DEP_ORD(EMUL_LABEL) +#define BMA_NODE DT_NODELABEL(bma_emul) /** Mutex for test motion sensor */ static mutex_t sensor_mutex; /** Rotation used in some tests */ -static const mat33_fp_t test_rotation = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; +static const mat33_fp_t test_rotation = { { 0, FLOAT_TO_FP(1), 0 }, + { FLOAT_TO_FP(-1), 0, 0 }, + { 0, 0, FLOAT_TO_FP(-1) } }; /** Rotate given vector by test rotation */ void rotate_int3v_by_test_rotation(int16_t *v) @@ -53,14 +49,14 @@ static struct motion_sensor_t ms = { .drv = &bma2x2_accel_drv, .mutex = &sensor_mutex, .drv_data = &acc_data, - .port = NAMED_I2C(accel), - .i2c_spi_addr_flags = DT_REG_ADDR(EMUL_LABEL), + .port = I2C_PORT_NODELABEL(i2c0), + .i2c_spi_addr_flags = DT_REG_ADDR(BMA_NODE), .rot_standard_ref = NULL, .current_range = 0, }; /** Set emulator offset values to vector of three int16_t */ -static void set_emul_offset(struct i2c_emul *emul, int16_t *offset) +static void set_emul_offset(const struct emul *emul, int16_t *offset) { bma_emul_set_off(emul, BMA_EMUL_AXIS_X, offset[0]); bma_emul_set_off(emul, BMA_EMUL_AXIS_Y, offset[1]); @@ -68,7 +64,7 @@ static void set_emul_offset(struct i2c_emul *emul, int16_t *offset) } /** Save emulator offset values to vector of three int16_t */ -static void get_emul_offset(struct i2c_emul *emul, int16_t *offset) +static void get_emul_offset(const struct emul *emul, int16_t *offset) { offset[0] = bma_emul_get_off(emul, BMA_EMUL_AXIS_X); offset[1] = bma_emul_get_off(emul, BMA_EMUL_AXIS_Y); @@ -76,7 +72,7 @@ static void get_emul_offset(struct i2c_emul *emul, int16_t *offset) } /** Set emulator accelerometer values to vector of three int16_t */ -static void set_emul_acc(struct i2c_emul *emul, int16_t *acc) +static void set_emul_acc(const struct emul *emul, int16_t *acc) { bma_emul_set_acc(emul, BMA_EMUL_AXIS_X, acc[0]); bma_emul_set_acc(emul, BMA_EMUL_AXIS_Y, acc[1]); @@ -99,7 +95,8 @@ static void compare_int3v_f(int16_t *exp_v, int16_t *v, int line) int i; for (i = 0; i < 3; i++) { - zassert_within(exp_v[i], v[i], V_EPS, + zassert_within( + exp_v[i], v[i], V_EPS, "Expected [%d; %d; %d], got [%d; %d; %d]; line: %d", exp_v[0], exp_v[1], exp_v[2], v[0], v[1], v[2], line); } @@ -122,7 +119,7 @@ struct reset_func_data { * accessing register data.ok_before_fail times. Error is returned during next * data.fail_attempts times. */ -static int emul_read_reset(struct i2c_emul *emul, int reg, uint8_t *buf, +static int emul_read_reset(const struct emul *emul, int reg, uint8_t *buf, int bytes, void *data) { struct reset_func_data *d = data; @@ -157,26 +154,30 @@ static int emul_read_reset(struct i2c_emul *emul, int reg, uint8_t *buf, */ ZTEST_USER(bma2x2, test_bma_get_offset) { - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); int16_t ret_offset[3]; int16_t exp_offset[3]; int16_t temp; - emul = bma_emul_get(BMA_ORD); - /* Test fail on each axis */ - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_OFFSET_X_AXIS_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, + BMA2x2_OFFSET_X_AXIS_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->get_offset(&ms, ret_offset, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_OFFSET_Y_AXIS_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, + BMA2x2_OFFSET_Y_AXIS_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->get_offset(&ms, ret_offset, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_OFFSET_Z_AXIS_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, + BMA2x2_OFFSET_Z_AXIS_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->get_offset(&ms, ret_offset, &temp), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set emulator offset */ exp_offset[0] = BMA_EMUL_1G / 10; @@ -208,26 +209,30 @@ ZTEST_USER(bma2x2, test_bma_get_offset) */ ZTEST_USER(bma2x2, test_bma_set_offset) { - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); int16_t ret_offset[3]; - int16_t exp_offset[3]; + int16_t exp_offset[3] = { 0, 0, 0 }; int16_t temp = 0; - emul = bma_emul_get(BMA_ORD); - /* Test fail on each axis */ - i2c_common_emul_set_write_fail_reg(emul, BMA2x2_OFFSET_X_AXIS_ADDR); + i2c_common_emul_set_write_fail_reg(common_data, + BMA2x2_OFFSET_X_AXIS_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->set_offset(&ms, exp_offset, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMA2x2_OFFSET_Y_AXIS_ADDR); + i2c_common_emul_set_write_fail_reg(common_data, + BMA2x2_OFFSET_Y_AXIS_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->set_offset(&ms, exp_offset, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMA2x2_OFFSET_Z_AXIS_ADDR); + i2c_common_emul_set_write_fail_reg(common_data, + BMA2x2_OFFSET_Z_AXIS_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->set_offset(&ms, exp_offset, temp), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set input offset */ exp_offset[0] = BMA_EMUL_1G / 10; @@ -260,7 +265,7 @@ ZTEST_USER(bma2x2, test_bma_set_offset) * Try to set range and check if expected range was set in driver and in * emulator. */ -static void check_set_range_f(struct i2c_emul *emul, int range, int rnd, +static void check_set_range_f(const struct emul *emul, int range, int rnd, int exp_range, int line) { uint8_t exp_range_reg; @@ -269,8 +274,8 @@ static void check_set_range_f(struct i2c_emul *emul, int range, int rnd, zassert_equal(EC_SUCCESS, ms.drv->set_range(&ms, range, rnd), "set_range failed; line: %d", line); zassert_equal(exp_range, ms.current_range, - "Expected range %d, got %d; line %d", - exp_range, ms.current_range, line); + "Expected range %d, got %d; line %d", exp_range, + ms.current_range, line); range_reg = bma_emul_get_reg(emul, BMA2x2_RANGE_SELECT_ADDR); range_reg &= BMA2x2_RANGE_SELECT_MSK; @@ -299,23 +304,24 @@ static void check_set_range_f(struct i2c_emul *emul, int range, int rnd, "Expected range reg 0x%x, got 0x%x; line %d", exp_range_reg, range_reg, line); } -#define check_set_range(emul, range, rnd, exp_range) \ +#define check_set_range(emul, range, rnd, exp_range) \ check_set_range_f(emul, range, rnd, exp_range, __LINE__) /** Test set range with and without I2C errors. */ ZTEST_USER(bma2x2, test_bma_set_range) { - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); int start_range; - emul = bma_emul_get(BMA_ORD); - /* Setup starting range, shouldn't be changed on error */ start_range = 2; ms.current_range = start_range; bma_emul_set_reg(emul, BMA2x2_RANGE_SELECT_ADDR, BMA2x2_RANGE_2G); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_RANGE_SELECT_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, + BMA2x2_RANGE_SELECT_ADDR); /* Test fail on read */ zassert_equal(EC_ERROR_INVAL, ms.drv->set_range(&ms, 12, 0), NULL); @@ -328,10 +334,12 @@ ZTEST_USER(bma2x2, test_bma_set_range) bma_emul_get_reg(emul, BMA2x2_RANGE_SELECT_ADDR), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMA2x2_RANGE_SELECT_ADDR); + i2c_common_emul_set_write_fail_reg(common_data, + BMA2x2_RANGE_SELECT_ADDR); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms.drv->set_range(&ms, 12, 0), NULL); @@ -344,7 +352,8 @@ ZTEST_USER(bma2x2, test_bma_set_range) bma_emul_get_reg(emul, BMA2x2_RANGE_SELECT_ADDR), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting range with rounding down */ check_set_range(emul, 1, 0, 2); @@ -379,47 +388,51 @@ ZTEST_USER(bma2x2, test_bma_set_range) ZTEST_USER(bma2x2, test_bma_init) { struct reset_func_data reset_func_data; - struct i2c_emul *emul; - - emul = bma_emul_get(BMA_ORD); + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); /* Setup emulator fail read function */ - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_CHIP_ID_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_CHIP_ID_ADDR); /* Test fail on chip id read */ zassert_equal(EC_ERROR_UNKNOWN, ms.drv->init(&ms), NULL); /* Disable failing on chip id read, but set wrong value */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); bma_emul_set_reg(emul, BMA2x2_CHIP_ID_ADDR, 23); /* Test wrong chip id */ zassert_equal(EC_ERROR_ACCESS_DENIED, ms.drv->init(&ms), NULL); /* Set correct chip id, but fail on reset reg read */ - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_RST_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_RST_ADDR); bma_emul_set_reg(emul, BMA2x2_CHIP_ID_ADDR, BMA255_CHIP_ID_MAJOR); /* Test fail on reset register read */ zassert_equal(EC_ERROR_INVAL, ms.drv->init(&ms), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMA2x2_RST_ADDR); + i2c_common_emul_set_write_fail_reg(common_data, BMA2x2_RST_ADDR); /* Test fail on reset register write */ zassert_equal(EC_ERROR_INVAL, ms.drv->init(&ms), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail reset read function */ reset_func_data.ok_before_fail = 1; reset_func_data.fail_attempts = 100; reset_func_data.reset_value = 0; - i2c_common_emul_set_read_func(emul, emul_read_reset, &reset_func_data); + i2c_common_emul_set_read_func(common_data, emul_read_reset, + &reset_func_data); /* Test fail on too many reset read errors */ zassert_equal(EC_ERROR_TIMEOUT, ms.drv->init(&ms), NULL); @@ -444,14 +457,14 @@ ZTEST_USER(bma2x2, test_bma_init) zassert_equal(EC_RES_SUCCESS, ms.drv->init(&ms), NULL); /* Remove custom emulator read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } /* * Try to set data rate and check if expected rate was set in driver and in * emulator. */ -static void check_set_rate_f(struct i2c_emul *emul, int rate, int rnd, +static void check_set_rate_f(const struct emul *emul, int rate, int rnd, int exp_rate, int line) { uint8_t exp_rate_reg; @@ -500,21 +513,21 @@ static void check_set_rate_f(struct i2c_emul *emul, int rate, int rnd, } zassert_equal(exp_rate_reg, rate_reg, - "Expected rate reg 0x%x, got 0x%x; line %d", - exp_rate_reg, rate_reg, line); + "Expected rate reg 0x%x, got 0x%x; line %d", exp_rate_reg, + rate_reg, line); } -#define check_set_rate(emul, rate, rnd, exp_rate) \ +#define check_set_rate(emul, rate, rnd, exp_rate) \ check_set_rate_f(emul, rate, rnd, exp_rate, __LINE__) /** Test set and get rate with and without I2C errors. */ ZTEST_USER(bma2x2, test_bma_rate) { - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); uint8_t reg_rate; int drv_rate; - emul = bma_emul_get(BMA_ORD); - /* Test setting rate with rounding down */ check_set_rate(emul, 1, 0, 7812); check_set_rate(emul, 1, 0, 7812); @@ -578,7 +591,7 @@ ZTEST_USER(bma2x2, test_bma_rate) reg_rate = bma_emul_get_reg(emul, BMA2x2_BW_SELECT_ADDR); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_BW_SELECT_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_BW_SELECT_ADDR); /* Test fail on read */ zassert_equal(EC_ERROR_INVAL, ms.drv->set_data_rate(&ms, 15625, 0), @@ -589,14 +602,15 @@ ZTEST_USER(bma2x2, test_bma_rate) zassert_equal(EC_ERROR_INVAL, ms.drv->set_data_rate(&ms, 15625, 1), NULL); zassert_equal(drv_rate, ms.drv->get_data_rate(&ms), NULL); - zassert_equal(reg_rate, - bma_emul_get_reg(emul, BMA2x2_BW_SELECT_ADDR), NULL); + zassert_equal(reg_rate, bma_emul_get_reg(emul, BMA2x2_BW_SELECT_ADDR), + NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMA2x2_BW_SELECT_ADDR); + i2c_common_emul_set_write_fail_reg(common_data, BMA2x2_BW_SELECT_ADDR); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms.drv->set_data_rate(&ms, 15625, 0), @@ -611,40 +625,42 @@ ZTEST_USER(bma2x2, test_bma_rate) NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); } /** Test read with and without I2C errors. */ ZTEST_USER(bma2x2, test_bma_read) { - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); int16_t ret_acc[3]; int16_t exp_acc[3]; intv3_t ret_acc_v; - emul = bma_emul_get(BMA_ORD); - /* Set offset 0 to simplify test */ bma_emul_set_off(emul, BMA_EMUL_AXIS_X, 0); bma_emul_set_off(emul, BMA_EMUL_AXIS_Y, 0); bma_emul_set_off(emul, BMA_EMUL_AXIS_Z, 0); /* Test fail on each axis */ - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_X_AXIS_LSB_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_X_AXIS_LSB_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->read(&ms, ret_acc_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_X_AXIS_MSB_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_X_AXIS_MSB_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->read(&ms, ret_acc_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_Y_AXIS_LSB_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_Y_AXIS_LSB_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->read(&ms, ret_acc_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_Y_AXIS_MSB_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_Y_AXIS_MSB_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->read(&ms, ret_acc_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_Z_AXIS_LSB_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_Z_AXIS_LSB_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->read(&ms, ret_acc_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_Z_AXIS_MSB_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, BMA2x2_Z_AXIS_MSB_ADDR); zassert_equal(EC_ERROR_INVAL, ms.drv->read(&ms, ret_acc_v), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set input accelerometer values */ exp_acc[0] = BMA_EMUL_1G / 10; @@ -706,7 +722,7 @@ struct calib_func_data { * error when offset control register is accessed when cal ready bit is not set * and data.read_fail is not zero. */ -static int emul_read_calib_func(struct i2c_emul *emul, int reg, uint8_t *val, +static int emul_read_calib_func(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { struct calib_func_data *d = data; @@ -738,7 +754,7 @@ static int emul_read_calib_func(struct i2c_emul *emul, int reg, uint8_t *val, * calib_start field in data with time when offset compensation process was * triggerd. */ -static int emul_write_calib_func(struct i2c_emul *emul, int reg, uint8_t val, +static int emul_write_calib_func(const struct emul *emul, int reg, uint8_t val, int bytes, void *data) { struct calib_func_data *d = data; @@ -759,19 +775,17 @@ static int emul_write_calib_func(struct i2c_emul *emul, int reg, uint8_t val, ZTEST_USER(bma2x2, test_bma_perform_calib) { struct calib_func_data func_data; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMA_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); int16_t start_off[3]; int16_t exp_off[3]; int16_t ret_off[3]; int range; int rate; - mat33_fp_t rot = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} - }; - - emul = bma_emul_get(BMA_ORD); + mat33_fp_t rot = { { FLOAT_TO_FP(1), 0, 0 }, + { 0, FLOAT_TO_FP(1), 0 }, + { 0, 0, FLOAT_TO_FP(-1) } }; /* Range and rate cannot change after calibration */ range = 4; @@ -800,8 +814,10 @@ ZTEST_USER(bma2x2, test_bma_perform_calib) exp_off[2] = BMA_EMUL_1G - exp_off[2]; /* Setup emulator calibration functions */ - i2c_common_emul_set_read_func(emul, emul_read_calib_func, &func_data); - i2c_common_emul_set_write_func(emul, emul_write_calib_func, &func_data); + i2c_common_emul_set_read_func(common_data, emul_read_calib_func, + &func_data); + i2c_common_emul_set_write_func(common_data, emul_write_calib_func, + &func_data); /* Setup emulator to fail on first access to offset control register */ func_data.calib_start = k_uptime_get_32(); @@ -875,8 +891,8 @@ ZTEST_USER(bma2x2, test_bma_perform_calib) /* Enable rotation with negative value on Z axis */ ms.rot_standard_ref = &rot; /* Expected offset -1G - accelerometer[Z] */ - exp_off[2] = -((int)BMA_EMUL_1G) - bma_emul_get_acc(emul, - BMA_EMUL_AXIS_Z); + exp_off[2] = + -((int)BMA_EMUL_1G) - bma_emul_get_acc(emul, BMA_EMUL_AXIS_Z); /* Test successful offset compenastion with negative Z rotation */ zassert_equal(EC_SUCCESS, ms.drv->perform_calib(&ms, 1), NULL); @@ -899,8 +915,8 @@ ZTEST_USER(bma2x2, test_bma_perform_calib) compare_int3v(exp_off, ret_off); /* Remove custom emulator functions */ - i2c_common_emul_set_read_func(emul, NULL, NULL); - i2c_common_emul_set_write_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); } /** Test get resolution. */ @@ -917,5 +933,10 @@ static void *bma2x2_setup(void) return NULL; } -ZTEST_SUITE(bma2x2, drivers_predicate_post_main, bma2x2_setup, NULL, NULL, - NULL); +static void bma2x2_after(void *data) +{ + ms.rot_standard_ref = NULL; +} + +ZTEST_SUITE(bma2x2, drivers_predicate_post_main, bma2x2_setup, NULL, + bma2x2_after, NULL); diff --git a/zephyr/test/drivers/src/bmi160.c b/zephyr/test/drivers/default/src/bmi160.c index 56e38e6f9a..3f06e7f0fd 100644 --- a/zephyr/test/drivers/src/bmi160.c +++ b/zephyr/test/drivers/default/src/bmi160.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "i2c.h" @@ -17,28 +17,27 @@ #include "driver/accelgyro_bmi_common.h" #include "test/drivers/test_state.h" -#define BMI_ORD DT_DEP_ORD(DT_NODELABEL(accel_bmi160)) -#define BMI_ACC_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi160_accel)) -#define BMI_GYR_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi160_gyro)) -#define BMI_INT_EVENT \ +#define BMI_NODE DT_NODELABEL(accel_bmi160) +#define BMI_ACC_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi160_accel)) +#define BMI_GYR_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi160_gyro)) +#define BMI_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(bmi160_int))) /** How accurate comparision of vectors should be */ -#define V_EPS 8 +#define V_EPS 8 /** Convert from one type of vector to another */ -#define convert_int3v_int16(v, r) do { \ - r[0] = v[0]; \ - r[1] = v[1]; \ - r[2] = v[2]; \ +#define convert_int3v_int16(v, r) \ + do { \ + r[0] = v[0]; \ + r[1] = v[1]; \ + r[2] = v[2]; \ } while (0) /** Rotation used in some tests */ -static const mat33_fp_t test_rotation = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; +static const mat33_fp_t test_rotation = { { 0, FLOAT_TO_FP(1), 0 }, + { FLOAT_TO_FP(-1), 0, 0 }, + { 0, 0, FLOAT_TO_FP(-1) } }; /** Rotate given vector by test rotation */ static void rotate_int3v_by_test_rotation(intv3_t v) { @@ -51,7 +50,7 @@ static void rotate_int3v_by_test_rotation(intv3_t v) } /** Set emulator accelerometer offset values to intv3_t vector */ -static void set_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) +static void set_emul_acc_offset(const struct emul *emul, intv3_t offset) { bmi_emul_set_off(emul, BMI_EMUL_ACC_X, offset[0]); bmi_emul_set_off(emul, BMI_EMUL_ACC_Y, offset[1]); @@ -59,7 +58,7 @@ static void set_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) } /** Save emulator accelerometer offset values to intv3_t vector */ -static void get_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) +static void get_emul_acc_offset(const struct emul *emul, intv3_t offset) { offset[0] = bmi_emul_get_off(emul, BMI_EMUL_ACC_X); offset[1] = bmi_emul_get_off(emul, BMI_EMUL_ACC_Y); @@ -67,7 +66,7 @@ static void get_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) } /** Set emulator accelerometer values to intv3_t vector */ -static void set_emul_acc(struct i2c_emul *emul, intv3_t acc) +static void set_emul_acc(const struct emul *emul, intv3_t acc) { bmi_emul_set_value(emul, BMI_EMUL_ACC_X, acc[0]); bmi_emul_set_value(emul, BMI_EMUL_ACC_Y, acc[1]); @@ -75,7 +74,7 @@ static void set_emul_acc(struct i2c_emul *emul, intv3_t acc) } /** Set emulator gyroscope offset values to intv3_t vector */ -static void set_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) +static void set_emul_gyr_offset(const struct emul *emul, intv3_t offset) { bmi_emul_set_off(emul, BMI_EMUL_GYR_X, offset[0]); bmi_emul_set_off(emul, BMI_EMUL_GYR_Y, offset[1]); @@ -83,7 +82,7 @@ static void set_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) } /** Save emulator gyroscope offset values to intv3_t vector */ -static void get_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) +static void get_emul_gyr_offset(const struct emul *emul, intv3_t offset) { offset[0] = bmi_emul_get_off(emul, BMI_EMUL_GYR_X); offset[1] = bmi_emul_get_off(emul, BMI_EMUL_GYR_Y); @@ -91,7 +90,7 @@ static void get_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) } /** Set emulator gyroscope values to vector of three int16_t */ -static void set_emul_gyr(struct i2c_emul *emul, intv3_t gyr) +static void set_emul_gyr(const struct emul *emul, intv3_t gyr) { bmi_emul_set_value(emul, BMI_EMUL_GYR_X, gyr[0]); bmi_emul_set_value(emul, BMI_EMUL_GYR_Y, gyr[1]); @@ -125,7 +124,8 @@ static void compare_int3v_f(intv3_t exp_v, intv3_t v, int eps, int line) int i; for (i = 0; i < 3; i++) { - zassert_within(exp_v[i], v[i], eps, + zassert_within( + exp_v[i], v[i], eps, "Expected [%d; %d; %d], got [%d; %d; %d]; line: %d", exp_v[0], exp_v[1], exp_v[2], v[0], v[1], v[2], line); } @@ -137,13 +137,14 @@ static void compare_int3v_f(intv3_t exp_v, intv3_t v, int eps, int line) ZTEST_USER(bmi160, test_bmi_acc_get_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int16_t ret[3]; intv3_t ret_v; intv3_t exp_v; int16_t temp; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Set emulator offset */ @@ -157,23 +158,23 @@ ZTEST_USER(bmi160, test_bmi_acc_get_offset) exp_v[2] = -1000 / 30; /* Test fail on offset read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_ACC70); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_ACC70); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_ACC70 + 1); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_ACC70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_ACC70 + 2); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_ACC70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Disable rotation */ ms->rot_standard_ref = NULL; /* Test get offset without rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v(exp_v, ret_v); @@ -183,8 +184,7 @@ ZTEST_USER(bmi160, test_bmi_acc_get_offset) rotate_int3v_by_test_rotation(exp_v); /* Test get offset with rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v(exp_v, ret_v); @@ -194,17 +194,19 @@ ZTEST_USER(bmi160, test_bmi_acc_get_offset) ZTEST_USER(bmi160, test_bmi_gyr_get_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int16_t ret[3]; intv3_t ret_v; intv3_t exp_v; int16_t temp; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set emulator offset */ exp_v[0] = BMI_EMUL_125_DEG_S / 100; @@ -217,26 +219,26 @@ ZTEST_USER(bmi160, test_bmi_gyr_get_offset) exp_v[2] = -125000 / 300; /* Test fail on offset read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_GYR70); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_GYR70); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_GYR70 + 1); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_GYR70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_GYR70 + 2); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_GYR70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Disable rotation */ ms->rot_standard_ref = NULL; /* Test get offset without rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v_eps(exp_v, ret_v, 64); @@ -246,8 +248,7 @@ ZTEST_USER(bmi160, test_bmi_gyr_get_offset) rotate_int3v_by_test_rotation(exp_v); /* Test get offset with rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v_eps(exp_v, ret_v, 64); @@ -260,36 +261,42 @@ ZTEST_USER(bmi160, test_bmi_gyr_get_offset) ZTEST_USER(bmi160, test_bmi_acc_set_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int16_t input_v[3]; int16_t temp = 0; intv3_t ret_v; intv3_t exp_v; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Test fail on OFFSET EN GYR98 register read and write */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on offset write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_ACC70); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_OFFSET_ACC70); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_ACC70 + 1); + i2c_common_emul_set_write_fail_reg(common_data, + BMI160_OFFSET_ACC70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_ACC70 + 2); + i2c_common_emul_set_write_fail_reg(common_data, + BMI160_OFFSET_ACC70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set input offset */ exp_v[0] = BMI_EMUL_1G / 10; @@ -312,7 +319,8 @@ ZTEST_USER(bmi160, test_bmi_acc_set_offset) compare_int3v_eps(exp_v, ret_v, 64); /* Accelerometer offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_ACC_EN, NULL); + BMI160_OFFSET_ACC_EN, + NULL); /* Setup rotation and rotate input for set_offset function */ ms->rot_standard_ref = &test_rotation; @@ -326,7 +334,8 @@ ZTEST_USER(bmi160, test_bmi_acc_set_offset) compare_int3v_eps(exp_v, ret_v, 64); /* Accelerometer offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_ACC_EN, NULL); + BMI160_OFFSET_ACC_EN, + NULL); } /** @@ -336,36 +345,42 @@ ZTEST_USER(bmi160, test_bmi_acc_set_offset) ZTEST_USER(bmi160, test_bmi_gyr_set_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int16_t input_v[3]; int16_t temp = 0; intv3_t ret_v; intv3_t exp_v; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Test fail on OFFSET EN GYR98 register read and write */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on offset write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_GYR70); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_OFFSET_GYR70); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_GYR70 + 1); + i2c_common_emul_set_write_fail_reg(common_data, + BMI160_OFFSET_GYR70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_GYR70 + 2); + i2c_common_emul_set_write_fail_reg(common_data, + BMI160_OFFSET_GYR70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set input offset */ exp_v[0] = BMI_EMUL_125_DEG_S / 100; @@ -384,7 +399,8 @@ ZTEST_USER(bmi160, test_bmi_gyr_set_offset) compare_int3v(exp_v, ret_v); /* Gyroscope offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_GYRO_EN, NULL); + BMI160_OFFSET_GYRO_EN, + NULL); /* Setup rotation and rotate input for set_offset function */ ms->rot_standard_ref = &test_rotation; @@ -397,14 +413,15 @@ ZTEST_USER(bmi160, test_bmi_gyr_set_offset) get_emul_gyr_offset(emul, ret_v); compare_int3v(exp_v, ret_v); zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_GYRO_EN, NULL); + BMI160_OFFSET_GYRO_EN, + NULL); } /** * Try to set accelerometer range and check if expected range was set * in driver and in emulator. */ -static void check_set_acc_range_f(struct i2c_emul *emul, +static void check_set_acc_range_f(const struct emul *emul, struct motion_sensor_t *ms, int range, int rnd, int exp_range, int line) { @@ -414,8 +431,8 @@ static void check_set_acc_range_f(struct i2c_emul *emul, zassert_equal(EC_SUCCESS, ms->drv->set_range(ms, range, rnd), "set_range failed; line: %d", line); zassert_equal(exp_range, ms->current_range, - "Expected range %d, got %d; line %d", - exp_range, ms->current_range, line); + "Expected range %d, got %d; line %d", exp_range, + ms->current_range, line); range_reg = bmi_emul_get_reg(emul, BMI160_ACC_RANGE); switch (exp_range) { @@ -443,17 +460,18 @@ static void check_set_acc_range_f(struct i2c_emul *emul, "Expected range reg 0x%x, got 0x%x; line %d", exp_range_reg, range_reg, line); } -#define check_set_acc_range(emul, ms, range, rnd, exp_range) \ +#define check_set_acc_range(emul, ms, range, rnd, exp_range) \ check_set_acc_range_f(emul, ms, range, rnd, exp_range, __LINE__) /** Test set accelerometer range with and without I2C errors */ ZTEST_USER(bmi160, test_bmi_acc_set_range) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int start_range; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Setup starting range, shouldn't be changed on error */ @@ -461,20 +479,21 @@ ZTEST_USER(bmi160, test_bmi_acc_set_range) ms->current_range = start_range; bmi_emul_set_reg(emul, BMI160_ACC_RANGE, BMI160_GSEL_2G); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_ACC_RANGE); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_ACC_RANGE); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_range(ms, 12, 0), NULL); zassert_equal(start_range, ms->current_range, NULL); - zassert_equal(BMI160_GSEL_2G, - bmi_emul_get_reg(emul, BMI160_ACC_RANGE), NULL); + zassert_equal(BMI160_GSEL_2G, bmi_emul_get_reg(emul, BMI160_ACC_RANGE), + NULL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_range(ms, 12, 1), NULL); zassert_equal(start_range, ms->current_range, NULL); - zassert_equal(BMI160_GSEL_2G, - bmi_emul_get_reg(emul, BMI160_ACC_RANGE), NULL); + zassert_equal(BMI160_GSEL_2G, bmi_emul_get_reg(emul, BMI160_ACC_RANGE), + NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting range with rounding down */ check_set_acc_range(emul, ms, 1, 0, 2); @@ -509,7 +528,7 @@ ZTEST_USER(bmi160, test_bmi_acc_set_range) * Try to set gyroscope range and check if expected range was set in driver and * in emulator. */ -static void check_set_gyr_range_f(struct i2c_emul *emul, +static void check_set_gyr_range_f(const struct emul *emul, struct motion_sensor_t *ms, int range, int rnd, int exp_range, int line) { @@ -519,8 +538,8 @@ static void check_set_gyr_range_f(struct i2c_emul *emul, zassert_equal(EC_SUCCESS, ms->drv->set_range(ms, range, rnd), "set_range failed; line: %d", line); zassert_equal(exp_range, ms->current_range, - "Expected range %d, got %d; line %d", - exp_range, ms->current_range, line); + "Expected range %d, got %d; line %d", exp_range, + ms->current_range, line); range_reg = bmi_emul_get_reg(emul, BMI160_GYR_RANGE); switch (exp_range) { @@ -551,17 +570,18 @@ static void check_set_gyr_range_f(struct i2c_emul *emul, "Expected range reg 0x%x, got 0x%x; line %d", exp_range_reg, range_reg, line); } -#define check_set_gyr_range(emul, ms, range, rnd, exp_range) \ +#define check_set_gyr_range(emul, ms, range, rnd, exp_range) \ check_set_gyr_range_f(emul, ms, range, rnd, exp_range, __LINE__) /** Test set gyroscope range with and without I2C errors */ ZTEST_USER(bmi160, test_bmi_gyr_set_range) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int start_range; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Setup starting range, shouldn't be changed on error */ @@ -569,7 +589,7 @@ ZTEST_USER(bmi160, test_bmi_gyr_set_range) ms->current_range = start_range; bmi_emul_set_reg(emul, BMI160_GYR_RANGE, BMI160_DPS_SEL_250); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_GYR_RANGE); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_GYR_RANGE); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_range(ms, 125, 0), NULL); @@ -582,7 +602,8 @@ ZTEST_USER(bmi160, test_bmi_gyr_set_range) bmi_emul_get_reg(emul, BMI160_GYR_RANGE), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting range with rounding down */ check_set_gyr_range(emul, ms, 1, 0, 125); @@ -643,7 +664,7 @@ ZTEST_USER(bmi160, test_bmi_get_resolution) * Try to set accelerometer data rate and check if expected rate was set * in driver and in emulator. */ -static void check_set_acc_rate_f(struct i2c_emul *emul, +static void check_set_acc_rate_f(const struct emul *emul, struct motion_sensor_t *ms, int rate, int rnd, int exp_rate, int line) { @@ -693,22 +714,23 @@ static void check_set_acc_rate_f(struct i2c_emul *emul, } zassert_equal(exp_rate_reg, rate_reg, - "Expected rate reg 0x%x, got 0x%x; line %d", - exp_rate_reg, rate_reg, line); + "Expected rate reg 0x%x, got 0x%x; line %d", exp_rate_reg, + rate_reg, line); } -#define check_set_acc_rate(emul, ms, rate, rnd, exp_rate) \ +#define check_set_acc_rate(emul, ms, rate, rnd, exp_rate) \ check_set_acc_rate_f(emul, ms, rate, rnd, exp_rate, __LINE__) /** Test set and get accelerometer rate with and without I2C errors */ ZTEST_USER(bmi160, test_bmi_acc_rate) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); uint8_t reg_rate; int pmu_status; int drv_rate; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Test setting rate with rounding down */ @@ -750,8 +772,8 @@ ZTEST_USER(bmi160, test_bmi_acc_rate) check_set_acc_rate(emul, ms, 200000, 1, 200000); /* Test out of range rate with rounding down */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 0), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 0), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 12499, 0), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -760,10 +782,10 @@ ZTEST_USER(bmi160, test_bmi_acc_rate) ms->drv->set_data_rate(ms, 2000000, 0), NULL); /* Test out of range rate with rounding up */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 1), NULL); - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 6250, 1), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 1), + NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 6250, 1), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 200001, 1), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -776,7 +798,7 @@ ZTEST_USER(bmi160, test_bmi_acc_rate) reg_rate = bmi_emul_get_reg(emul, BMI160_ACC_CONF); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_CONF); /* Test fail on read */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -789,10 +811,11 @@ ZTEST_USER(bmi160, test_bmi_acc_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI160_ACC_CONF), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_ACC_CONF); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_ACC_CONF); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -805,7 +828,8 @@ ZTEST_USER(bmi160, test_bmi_acc_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI160_ACC_CONF), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test disabling sensor */ pmu_status = BMI160_PMU_NORMAL << BMI160_PMU_ACC_OFFSET; @@ -832,7 +856,7 @@ ZTEST_USER(bmi160, test_bmi_acc_rate) * Try to set gyroscope data rate and check if expected rate was set * in driver and in emulator. */ -static void check_set_gyr_rate_f(struct i2c_emul *emul, +static void check_set_gyr_rate_f(const struct emul *emul, struct motion_sensor_t *ms, int rate, int rnd, int exp_rate, int line) { @@ -882,22 +906,23 @@ static void check_set_gyr_rate_f(struct i2c_emul *emul, } zassert_equal(exp_rate_reg, rate_reg, - "Expected rate reg 0x%x, got 0x%x; line %d", - exp_rate_reg, rate_reg, line); + "Expected rate reg 0x%x, got 0x%x; line %d", exp_rate_reg, + rate_reg, line); } -#define check_set_gyr_rate(emul, ms, rate, rnd, exp_rate) \ +#define check_set_gyr_rate(emul, ms, rate, rnd, exp_rate) \ check_set_gyr_rate_f(emul, ms, rate, rnd, exp_rate, __LINE__) /** Test set and get gyroscope rate with and without I2C errors */ ZTEST_USER(bmi160, test_bmi_gyr_rate) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); uint8_t reg_rate; int pmu_status; int drv_rate; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Test setting rate with rounding down */ @@ -933,8 +958,8 @@ ZTEST_USER(bmi160, test_bmi_gyr_rate) check_set_gyr_rate(emul, ms, 200000, 1, 200000); /* Test out of range rate with rounding down */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 0), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 0), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 24999, 0), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -943,8 +968,8 @@ ZTEST_USER(bmi160, test_bmi_gyr_rate) ms->drv->set_data_rate(ms, 4000000, 0), NULL); /* Test out of range rate with rounding up */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 1), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 1), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 12499, 1), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -959,7 +984,7 @@ ZTEST_USER(bmi160, test_bmi_gyr_rate) reg_rate = bmi_emul_get_reg(emul, BMI160_GYR_CONF); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_CONF); /* Test fail on read */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -972,10 +997,11 @@ ZTEST_USER(bmi160, test_bmi_gyr_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI160_GYR_CONF), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_GYR_CONF); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_GYR_CONF); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -988,7 +1014,8 @@ ZTEST_USER(bmi160, test_bmi_gyr_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI160_GYR_CONF), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test disabling sensor */ pmu_status = BMI160_PMU_NORMAL << BMI160_PMU_ACC_OFFSET; @@ -1019,7 +1046,7 @@ ZTEST_USER(bmi160, test_bmi_scale) { struct motion_sensor_t *ms; int16_t ret_scale[3]; - int16_t exp_scale[3] = {100, 231, 421}; + int16_t exp_scale[3] = { 100, 231, 421 }; int16_t t; /* Test accelerometer */ @@ -1049,27 +1076,29 @@ ZTEST_USER(bmi160, test_bmi_scale) ZTEST_USER(bmi160, test_bmi_read_temp) { struct motion_sensor_t *ms_acc, *ms_gyr; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int ret_temp; int exp_temp; - emul = bmi_emul_get(BMI_ORD); ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_TEMPERATURE_0); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_TEMPERATURE_0); zassert_equal(EC_ERROR_NOT_POWERED, ms_acc->drv->read_temp(ms_acc, &ret_temp), NULL); zassert_equal(EC_ERROR_NOT_POWERED, ms_gyr->drv->read_temp(ms_gyr, &ret_temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_TEMPERATURE_1); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_TEMPERATURE_1); zassert_equal(EC_ERROR_NOT_POWERED, ms_acc->drv->read_temp(ms_acc, &ret_temp), NULL); zassert_equal(EC_ERROR_NOT_POWERED, ms_gyr->drv->read_temp(ms_gyr, &ret_temp), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Fail on invalid temperature */ bmi_emul_set_reg(emul, BMI160_TEMPERATURE_0, 0x00); @@ -1128,14 +1157,15 @@ ZTEST_USER(bmi160, test_bmi_read_temp) ZTEST_USER(bmi160, test_bmi_acc_read) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); intv3_t ret_v; intv3_t exp_v; - int16_t scale[3] = {MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE}; + int16_t scale[3] = { MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE }; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Set offset 0 to simplify test */ @@ -1144,10 +1174,11 @@ ZTEST_USER(bmi160, test_bmi_acc_read) bmi_emul_set_off(emul, BMI_EMUL_ACC_Z, 0); /* Fail on read status */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* When not ready, driver should return saved raw value */ exp_v[0] = 100; @@ -1215,20 +1246,21 @@ ZTEST_USER(bmi160, test_bmi_acc_read) compare_int3v(exp_v, ret_v); /* Fail on read of data registers */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_X_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_X_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_X_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_X_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_Y_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_Y_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_Y_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_Y_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_Z_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_Z_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_Z_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_Z_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); ms->rot_standard_ref = NULL; } @@ -1236,14 +1268,15 @@ ZTEST_USER(bmi160, test_bmi_acc_read) ZTEST_USER(bmi160, test_bmi_gyr_read) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); intv3_t ret_v; intv3_t exp_v; - int16_t scale[3] = {MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE}; + int16_t scale[3] = { MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE }; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Set offset 0 to simplify test */ @@ -1252,10 +1285,11 @@ ZTEST_USER(bmi160, test_bmi_gyr_read) bmi_emul_set_off(emul, BMI_EMUL_GYR_Z, 0); /* Fail on read status */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* When not ready, driver should return saved raw value */ exp_v[0] = 100; @@ -1323,20 +1357,21 @@ ZTEST_USER(bmi160, test_bmi_gyr_read) compare_int3v(exp_v, ret_v); /* Fail on read of data registers */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_X_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_X_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_X_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_X_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_Y_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_Y_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_Y_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_Y_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_Z_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_Z_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_Z_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_Z_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); ms->rot_standard_ref = NULL; } @@ -1344,7 +1379,7 @@ ZTEST_USER(bmi160, test_bmi_gyr_read) * Custom emulatro read function which always return not ready STATUS register. * Used in calibration test. */ -static int emul_nrdy(struct i2c_emul *emul, int reg, uint8_t *val, int byte, +static int emul_nrdy(const struct emul *emul, int reg, uint8_t *val, int byte, void *data) { if (reg == BMI160_STATUS) { @@ -1361,20 +1396,19 @@ static int emul_nrdy(struct i2c_emul *emul, int reg, uint8_t *val, int byte, ZTEST_USER(bmi160, test_bmi_acc_perform_calib) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); uint8_t pmu_status; intv3_t start_off; intv3_t exp_off; intv3_t ret_off; int range; int rate; - mat33_fp_t rot = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} - }; + mat33_fp_t rot = { { FLOAT_TO_FP(1), 0, 0 }, + { 0, FLOAT_TO_FP(1), 0 }, + { 0, 0, FLOAT_TO_FP(-1) } }; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Enable sensors */ @@ -1409,13 +1443,13 @@ ZTEST_USER(bmi160, test_bmi_acc_perform_calib) exp_off[2] = BMI_EMUL_1G - exp_off[2]; /* Test fail on rate set */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_ACC_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_ACC_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on status read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); @@ -1423,13 +1457,14 @@ ZTEST_USER(bmi160, test_bmi_acc_perform_calib) bmi_emul_set_reg(emul, BMI160_CMD_REG, BMI160_CMD_NOOP); /* Test fail on data not ready */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_read_func(emul, emul_nrdy, NULL); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_func(common_data, emul_nrdy, NULL); zassert_equal(EC_RES_TIMEOUT, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Remove custom emulator read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); /* Stop fast offset compensation before next test */ bmi_emul_set_reg(emul, BMI160_CMD_REG, BMI160_CMD_NOOP); @@ -1447,7 +1482,8 @@ ZTEST_USER(bmi160, test_bmi_acc_perform_calib) compare_int3v_eps(exp_off, ret_off, 64); /* Acelerometer offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_ACC_EN, NULL); + BMI160_OFFSET_ACC_EN, + NULL); /* Enable rotation with negative value on Z axis */ ms->rot_standard_ref = &rot; @@ -1463,7 +1499,8 @@ ZTEST_USER(bmi160, test_bmi_acc_perform_calib) compare_int3v_eps(exp_off, ret_off, 64); /* Acelerometer offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_ACC_EN, NULL); + BMI160_OFFSET_ACC_EN, + NULL); /* Set positive rotation on Z axis */ rot[2][2] = FLOAT_TO_FP(1); @@ -1479,7 +1516,8 @@ ZTEST_USER(bmi160, test_bmi_acc_perform_calib) compare_int3v_eps(exp_off, ret_off, 64); /* Acelerometer offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_ACC_EN, NULL); + BMI160_OFFSET_ACC_EN, + NULL); /* Disable rotation */ ms->rot_standard_ref = NULL; } @@ -1488,7 +1526,9 @@ ZTEST_USER(bmi160, test_bmi_acc_perform_calib) ZTEST_USER(bmi160, test_bmi_gyr_perform_calib) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); uint8_t pmu_status; intv3_t start_off; intv3_t exp_off; @@ -1496,7 +1536,6 @@ ZTEST_USER(bmi160, test_bmi_gyr_perform_calib) int range; int rate; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Enable sensors */ @@ -1533,13 +1572,13 @@ ZTEST_USER(bmi160, test_bmi_gyr_perform_calib) zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on rate set */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_GYR_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_GYR_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on status read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); @@ -1547,13 +1586,14 @@ ZTEST_USER(bmi160, test_bmi_gyr_perform_calib) bmi_emul_set_reg(emul, BMI160_CMD_REG, BMI160_CMD_NOOP); /* Test fail on data not ready */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_read_func(emul, emul_nrdy, NULL); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_func(common_data, emul_nrdy, NULL); zassert_equal(EC_RES_TIMEOUT, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Remove custom emulator read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); /* Stop fast offset compensation before next test */ bmi_emul_set_reg(emul, BMI160_CMD_REG, BMI160_CMD_NOOP); @@ -1569,16 +1609,15 @@ ZTEST_USER(bmi160, test_bmi_gyr_perform_calib) compare_int3v_eps(exp_off, ret_off, 32); /* Gyroscope offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI160_OFFSET_EN_GYR98) & - BMI160_OFFSET_GYRO_EN, NULL); + BMI160_OFFSET_GYRO_EN, + NULL); } /** Test init function of BMI160 accelerometer and gyroscope sensors */ ZTEST_USER(bmi160, test_bmi_init) { struct motion_sensor_t *ms_acc, *ms_gyr; - struct i2c_emul *emul; - emul = bmi_emul_get(BMI_ORD); ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; @@ -1598,7 +1637,7 @@ struct fifo_func_data { * to value passed as additional data. It sets interrupt registers to 0 after * access. */ -static int emul_fifo_func(struct i2c_emul *emul, int reg, uint8_t *val, +static int emul_fifo_func(const struct emul *emul, int reg, uint8_t *val, int byte, void *data) { struct fifo_func_data *d = data; @@ -1622,9 +1661,8 @@ static int emul_fifo_func(struct i2c_emul *emul, int reg, uint8_t *val, */ static void check_fifo_f(struct motion_sensor_t *ms_acc, struct motion_sensor_t *ms_gyr, - struct bmi_emul_frame *frame, - int acc_range, int gyr_range, - int line) + struct bmi_emul_frame *frame, int acc_range, + int gyr_range, int line) { struct ec_response_motion_sensor_data vector; struct bmi_emul_frame *f_acc, *f_gyr; @@ -1705,7 +1743,7 @@ static void check_fifo_f(struct motion_sensor_t *ms_acc, zassert_is_null(f_gyr, "Not all gyroscope frames are read, line %d", line); } -#define check_fifo(ms_acc, ms_gyr, frame, acc_range, gyr_range) \ +#define check_fifo(ms_acc, ms_gyr, frame, acc_range, gyr_range) \ check_fifo_f(ms_acc, ms_gyr, frame, acc_range, gyr_range, __LINE__) /** Test irq handler of accelerometer sensor */ @@ -1714,12 +1752,13 @@ ZTEST_USER(bmi160, test_bmi_acc_fifo) struct motion_sensor_t *ms, *ms_gyr; struct fifo_func_data func_data; struct bmi_emul_frame f[3]; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int gyr_range = 125; int acc_range = 2; int event; - emul = bmi_emul_get(BMI_ORD); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; @@ -1738,11 +1777,12 @@ ZTEST_USER(bmi160, test_bmi_acc_fifo) event = BMI_INT_EVENT; /* Test fail to read interrupt status registers */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_INT_STATUS_0); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_INT_STATUS_0); zassert_equal(EC_ERROR_INVAL, ms->drv->irq_handler(ms, &event), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_INT_STATUS_1); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_INT_STATUS_1); zassert_equal(EC_ERROR_INVAL, ms->drv->irq_handler(ms, &event), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test no interrupt */ bmi_emul_set_reg(emul, BMI160_INT_STATUS_0, 0); @@ -1755,7 +1795,7 @@ ZTEST_USER(bmi160, test_bmi_acc_fifo) check_fifo(ms, ms_gyr, NULL, acc_range, gyr_range); /* Set custom function for FIFO test */ - i2c_common_emul_set_read_func(emul, emul_fifo_func, &func_data); + i2c_common_emul_set_read_func(common_data, emul_fifo_func, &func_data); /* Set range */ zassert_equal(EC_SUCCESS, ms->drv->set_range(ms, acc_range, 0), NULL); zassert_equal(EC_SUCCESS, ms_gyr->drv->set_range(ms_gyr, gyr_range, 0), @@ -1838,7 +1878,7 @@ ZTEST_USER(bmi160, test_bmi_acc_fifo) check_fifo(ms, ms_gyr, f, acc_range, gyr_range); /* Remove custom emulator read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } /** Test irq handler of gyroscope sensor */ @@ -1859,8 +1899,7 @@ ZTEST_USER(bmi160, test_bmi_gyr_fifo) ZTEST_USER(bmi160, test_bmi_sec_raw_read8) { struct motion_sensor_t *ms = &motion_sensors[BMI_ACC_SENSOR_ID]; - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); - + const struct emul *emul = EMUL_DT_GET(BMI_NODE); uint8_t expected_read_value = 0xAA; uint8_t requested_reg_addr = 0x55; uint8_t actual_reg_addr; @@ -1892,8 +1931,7 @@ ZTEST_USER(bmi160, test_bmi_sec_raw_read8) ZTEST_USER(bmi160, test_bmi_sec_raw_write8) { struct motion_sensor_t *ms = &motion_sensors[BMI_ACC_SENSOR_ID]; - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); - + const struct emul *emul = EMUL_DT_GET(BMI_NODE); uint8_t expected_write_value = 0xAB; uint8_t requested_reg_addr = 0x56; uint8_t actual_reg_addr; @@ -1926,8 +1964,7 @@ ZTEST_USER(bmi160, test_bmi_set_offset_invalid_type) { struct motion_sensor_t ms_fake; int ret; - - int16_t unused_offset; + int16_t unused_offset = 0; int16_t temp = 0; /* make a copy of the accel motion sensor so we modify its type */ @@ -1961,7 +1998,7 @@ ZTEST_USER(bmi160, test_bmi_perform_calib_invalid_type) /** Test reading the onboard temperature sensor */ ZTEST_USER(bmi160, test_bmi_temp_sensor) { - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); int ret; /* Part 1: @@ -2022,24 +2059,27 @@ ZTEST_USER(bmi160, test_bmi_interrupt_handler) /* Make an I2C emulator mock wrapped in FFF for use with test_bmi_init_chip_id() */ -FAKE_VALUE_FUNC(int, bmi_init_chip_id_mock_write_fn, struct i2c_emul *, int, +FAKE_VALUE_FUNC(int, bmi_init_chip_id_mock_write_fn, const struct emul *, int, uint8_t, int, void *); /** Test handling of invalid or unreadable chip IDs in init() */ ZTEST_USER(bmi160, test_bmi_init_chip_id) { struct motion_sensor_t *ms = &motion_sensors[BMI_ACC_SENSOR_ID]; - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); int ret; /* Part 1: Cannot read the Chip ID register */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_CHIP_ID); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_CHIP_ID); ret = ms->drv->init(ms); zassert_equal(ret, EC_ERROR_UNKNOWN, "Expected %d but got %d", EC_ERROR_UNKNOWN, ret); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Part 2: Incorrect chip ID - this triggers a series of writes in an * attempt to 'unlock' the chip. @@ -2052,8 +2092,8 @@ ZTEST_USER(bmi160, test_bmi_init_chip_id) RESET_FAKE(bmi_init_chip_id_mock_write_fn); bmi_init_chip_id_mock_write_fn_fake.return_val = 1; - i2c_common_emul_set_write_func(emul, bmi_init_chip_id_mock_write_fn, - NULL); + i2c_common_emul_set_write_func(common_data, + bmi_init_chip_id_mock_write_fn, NULL); /* Return a phony chip ID */ bmi_emul_set_reg(emul, BMI160_CHIP_ID, 0xFF); @@ -2076,7 +2116,73 @@ ZTEST_USER(bmi160, test_bmi_init_chip_id) MOCK_ASSERT_I2C_WRITE(bmi_init_chip_id_mock_write_fn, 4, BMI160_CMD_EXT_MODE_ADDR, 0); - i2c_common_emul_set_write_func(emul, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); +} + +static void bmi160_before(void *fixture) +{ + ARG_UNUSED(fixture); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); + struct motion_sensor_t *acc_ms; + struct motion_sensor_t *gyr_ms; + + acc_ms = &motion_sensors[BMI_ACC_SENSOR_ID]; + gyr_ms = &motion_sensors[BMI_GYR_SENSOR_ID]; + + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + bmi_emul_set_reg(emul, BMI160_CHIP_ID, 0xd1); + + /* Disable rotation */ + gyr_ms->rot_standard_ref = NULL; + acc_ms->rot_standard_ref = NULL; + + zassume_equal(EC_SUCCESS, acc_ms->drv->set_data_rate(acc_ms, 50000, 0), + NULL); + zassume_equal(EC_SUCCESS, gyr_ms->drv->set_data_rate(gyr_ms, 50000, 0), + NULL); +} + +static void bmi160_after(void *state) +{ + ARG_UNUSED(state); + struct motion_sensor_t *acc_ms, *gyr_ms; + + acc_ms = &motion_sensors[BMI_ACC_SENSOR_ID]; + gyr_ms = &motion_sensors[BMI_GYR_SENSOR_ID]; + + acc_ms->drv->set_data_rate(acc_ms, 0, 0); + gyr_ms->drv->set_data_rate(gyr_ms, 0, 0); +} + +ZTEST_SUITE(bmi160, drivers_predicate_pre_main, NULL, bmi160_before, + bmi160_after, NULL); + +/** Cause an interrupt and verify the motion_sense task handled it. */ +ZTEST_USER(bmi160_tasks, test_irq_handling) +{ + struct bmi_emul_frame f[3]; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + + f[0].type = BMI_EMUL_FRAME_ACC; + f[0].acc_x = BMI_EMUL_1G / 10; + f[0].acc_y = BMI_EMUL_1G / 20; + f[0].acc_z = -(int)BMI_EMUL_1G / 30; + f[0].next = NULL; + bmi_emul_append_frame(emul, f); + bmi_emul_set_reg(emul, BMI160_INT_STATUS_0, BMI160_FWM_INT & 0xff); + bmi_emul_set_reg(emul, BMI160_INT_STATUS_1, + (BMI160_FWM_INT >> 8) & 0xff); + + bmi160_interrupt(0); + k_sleep(K_SECONDS(10)); + + /* Verify that the motion_sense_task read it. */ + zassert_equal(bmi_emul_get_reg(emul, BMI160_INT_STATUS_0), 0, NULL); + zassert_equal(bmi_emul_get_reg(emul, BMI160_INT_STATUS_1), 0, NULL); } -ZTEST_SUITE(bmi160, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +ZTEST_SUITE(bmi160_tasks, drivers_predicate_post_main, NULL, bmi160_before, + bmi160_after, NULL); diff --git a/zephyr/test/drivers/src/bmi260.c b/zephyr/test/drivers/default/src/bmi260.c index abcab72898..9295d631ca 100644 --- a/zephyr/test/drivers/src/bmi260.c +++ b/zephyr/test/drivers/default/src/bmi260.c @@ -1,11 +1,11 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <fff.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/fff.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "i2c.h" @@ -18,28 +18,27 @@ #include "test/drivers/test_mocks.h" #include "test/drivers/test_state.h" -#define BMI_ORD DT_DEP_ORD(DT_NODELABEL(accel_bmi260)) -#define BMI_ACC_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi260_accel)) -#define BMI_GYR_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi260_gyro)) -#define BMI_INT_EVENT \ +#define BMI_NODE DT_NODELABEL(accel_bmi260) +#define BMI_ACC_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi260_accel)) +#define BMI_GYR_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi260_gyro)) +#define BMI_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(bmi260_int))) /** How accurate comparision of vectors should be */ -#define V_EPS 8 +#define V_EPS 8 /** Convert from one type of vector to another */ -#define convert_int3v_int16(v, r) do { \ - r[0] = v[0]; \ - r[1] = v[1]; \ - r[2] = v[2]; \ +#define convert_int3v_int16(v, r) \ + do { \ + r[0] = v[0]; \ + r[1] = v[1]; \ + r[2] = v[2]; \ } while (0) /** Rotation used in some tests */ -static const mat33_fp_t test_rotation = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; +static const mat33_fp_t test_rotation = { { 0, FLOAT_TO_FP(1), 0 }, + { FLOAT_TO_FP(-1), 0, 0 }, + { 0, 0, FLOAT_TO_FP(-1) } }; /** Rotate given vector by test rotation */ static void rotate_int3v_by_test_rotation(intv3_t v) { @@ -52,7 +51,7 @@ static void rotate_int3v_by_test_rotation(intv3_t v) } /** Set emulator accelerometer offset values to intv3_t vector */ -static void set_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) +static void set_emul_acc_offset(const struct emul *emul, intv3_t offset) { bmi_emul_set_off(emul, BMI_EMUL_ACC_X, offset[0]); bmi_emul_set_off(emul, BMI_EMUL_ACC_Y, offset[1]); @@ -60,7 +59,7 @@ static void set_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) } /** Save emulator accelerometer offset values to intv3_t vector */ -static void get_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) +static void get_emul_acc_offset(const struct emul *emul, intv3_t offset) { offset[0] = bmi_emul_get_off(emul, BMI_EMUL_ACC_X); offset[1] = bmi_emul_get_off(emul, BMI_EMUL_ACC_Y); @@ -68,7 +67,7 @@ static void get_emul_acc_offset(struct i2c_emul *emul, intv3_t offset) } /** Set emulator accelerometer values to intv3_t vector */ -static void set_emul_acc(struct i2c_emul *emul, intv3_t acc) +static void set_emul_acc(const struct emul *emul, intv3_t acc) { bmi_emul_set_value(emul, BMI_EMUL_ACC_X, acc[0]); bmi_emul_set_value(emul, BMI_EMUL_ACC_Y, acc[1]); @@ -76,7 +75,7 @@ static void set_emul_acc(struct i2c_emul *emul, intv3_t acc) } /** Set emulator gyroscope offset values to intv3_t vector */ -static void set_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) +static void set_emul_gyr_offset(const struct emul *emul, intv3_t offset) { bmi_emul_set_off(emul, BMI_EMUL_GYR_X, offset[0]); bmi_emul_set_off(emul, BMI_EMUL_GYR_Y, offset[1]); @@ -84,7 +83,7 @@ static void set_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) } /** Save emulator gyroscope offset values to intv3_t vector */ -static void get_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) +static void get_emul_gyr_offset(const struct emul *emul, intv3_t offset) { offset[0] = bmi_emul_get_off(emul, BMI_EMUL_GYR_X); offset[1] = bmi_emul_get_off(emul, BMI_EMUL_GYR_Y); @@ -92,7 +91,7 @@ static void get_emul_gyr_offset(struct i2c_emul *emul, intv3_t offset) } /** Set emulator gyroscope values to vector of three int16_t */ -static void set_emul_gyr(struct i2c_emul *emul, intv3_t gyr) +static void set_emul_gyr(const struct emul *emul, intv3_t gyr) { bmi_emul_set_value(emul, BMI_EMUL_GYR_X, gyr[0]); bmi_emul_set_value(emul, BMI_EMUL_GYR_Y, gyr[1]); @@ -126,7 +125,8 @@ static void compare_int3v_f(intv3_t exp_v, intv3_t v, int eps, int line) int i; for (i = 0; i < 3; i++) { - zassert_within(exp_v[i], v[i], eps, + zassert_within( + exp_v[i], v[i], eps, "Expected [%d; %d; %d], got [%d; %d; %d]; line: %d", exp_v[0], exp_v[1], exp_v[2], v[0], v[1], v[2], line); } @@ -138,8 +138,8 @@ static void compare_int3v_f(intv3_t exp_v, intv3_t v, int eps, int line) * Custom emulator read function which always return INIT OK status in * INTERNAL STATUS register. Used in init test. */ -static int emul_init_ok(struct i2c_emul *emul, int reg, uint8_t *val, int byte, - void *data) +static int emul_init_ok(const struct emul *emul, int reg, uint8_t *val, + int byte, void *data) { bmi_emul_set_reg(emul, BMI260_INTERNAL_STATUS, BMI260_INIT_OK); @@ -151,9 +151,11 @@ static void bmi_init_emul(void) { struct motion_sensor_t *ms_acc; struct motion_sensor_t *ms_gyr; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; + int ret; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; @@ -162,24 +164,30 @@ static void bmi_init_emul(void) * BMI260_INTERNAL_STATUS register, because init function triggers reset * which clears value set in this register before test. */ - i2c_common_emul_set_read_func(emul, emul_init_ok, NULL); - zassert_equal(EC_RES_SUCCESS, ms_acc->drv->init(ms_acc), NULL); - zassert_equal(EC_RES_SUCCESS, ms_gyr->drv->init(ms_gyr), NULL); + i2c_common_emul_set_read_func(common_data, emul_init_ok, NULL); + + ret = ms_acc->drv->init(ms_acc); + zassert_equal(EC_RES_SUCCESS, ret, "Got accel init error %d", ret); + + ret = ms_gyr->drv->init(ms_gyr); + zassert_equal(EC_RES_SUCCESS, ret, "Got gyro init error %d", ret); + /* Remove custom emulator read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } /** Test get accelerometer offset with and without rotation */ ZTEST_USER(bmi260, test_bmi_acc_get_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int16_t ret[3]; intv3_t ret_v; intv3_t exp_v; int16_t temp; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Set emulator offset */ @@ -193,23 +201,23 @@ ZTEST_USER(bmi260, test_bmi_acc_get_offset) exp_v[2] = -1000 / 30; /* Test fail on offset read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_ACC70); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_ACC70); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_ACC70 + 1); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_ACC70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_ACC70 + 2); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_ACC70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Disable rotation */ ms->rot_standard_ref = NULL; /* Test get offset without rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v(exp_v, ret_v); @@ -219,8 +227,7 @@ ZTEST_USER(bmi260, test_bmi_acc_get_offset) rotate_int3v_by_test_rotation(exp_v); /* Test get offset with rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v(exp_v, ret_v); @@ -230,17 +237,19 @@ ZTEST_USER(bmi260, test_bmi_acc_get_offset) ZTEST_USER(bmi260, test_bmi_gyr_get_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int16_t ret[3]; intv3_t ret_v; intv3_t exp_v; int16_t temp; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set emulator offset */ exp_v[0] = BMI_EMUL_125_DEG_S / 100; @@ -253,26 +262,26 @@ ZTEST_USER(bmi260, test_bmi_gyr_get_offset) exp_v[2] = -125000 / 300; /* Test fail on offset read */ - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_GYR70); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_GYR70); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_GYR70 + 1); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_GYR70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_GYR70 + 2); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_GYR70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI160_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, BMI160_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->get_offset(ms, ret, &temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Disable rotation */ ms->rot_standard_ref = NULL; /* Test get offset without rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v_eps(exp_v, ret_v, 64); @@ -282,8 +291,7 @@ ZTEST_USER(bmi260, test_bmi_gyr_get_offset) rotate_int3v_by_test_rotation(exp_v); /* Test get offset with rotation */ - zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), - NULL); + zassert_equal(EC_SUCCESS, ms->drv->get_offset(ms, ret, &temp), NULL); zassert_equal(temp, (int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, NULL); convert_int3v_int16(ret, ret_v); compare_int3v_eps(exp_v, ret_v, 64); @@ -296,37 +304,43 @@ ZTEST_USER(bmi260, test_bmi_gyr_get_offset) ZTEST_USER(bmi260, test_bmi_acc_set_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; - int16_t input_v[3]; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; + int16_t input_v[3] = { 0, 0, 0 }; int16_t temp = 0; intv3_t ret_v; intv3_t exp_v; uint8_t nv_c; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Test fail on NV CONF register read and write */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_NV_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_NV_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(emul, BMI260_NV_CONF); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_NV_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on offset write */ - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_ACC70); + i2c_common_emul_set_write_fail_reg(common_data, BMI160_OFFSET_ACC70); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_ACC70 + 1); + i2c_common_emul_set_write_fail_reg(common_data, + BMI160_OFFSET_ACC70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI160_OFFSET_ACC70 + 2); + i2c_common_emul_set_write_fail_reg(common_data, + BMI160_OFFSET_ACC70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup NV_CONF register value */ bmi_emul_set_reg(emul, BMI260_NV_CONF, 0x7); @@ -352,8 +366,8 @@ ZTEST_USER(bmi260, test_bmi_acc_set_offset) nv_c = bmi_emul_get_reg(emul, BMI260_NV_CONF); /* Only ACC_OFFSET_EN bit should be changed */ zassert_equal(0x7 | BMI260_ACC_OFFSET_EN, nv_c, - "Expected 0x%x, got 0x%x", - 0x7 | BMI260_ACC_OFFSET_EN, nv_c); + "Expected 0x%x, got 0x%x", 0x7 | BMI260_ACC_OFFSET_EN, + nv_c); /* Setup NV_CONF register value */ bmi_emul_set_reg(emul, BMI260_NV_CONF, 0); @@ -380,36 +394,42 @@ ZTEST_USER(bmi260, test_bmi_acc_set_offset) ZTEST_USER(bmi260, test_bmi_gyr_set_offset) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int16_t input_v[3]; int16_t temp = 0; intv3_t ret_v; intv3_t exp_v; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Test fail on OFFSET EN GYR98 register read and write */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(emul, BMI260_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on offset write */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_OFFSET_GYR70); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_OFFSET_GYR70); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI260_OFFSET_GYR70 + 1); + i2c_common_emul_set_write_fail_reg(common_data, + BMI260_OFFSET_GYR70 + 1); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, BMI260_OFFSET_GYR70 + 2); + i2c_common_emul_set_write_fail_reg(common_data, + BMI260_OFFSET_GYR70 + 2); zassert_equal(EC_ERROR_INVAL, ms->drv->set_offset(ms, input_v, temp), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Set input offset */ exp_v[0] = BMI_EMUL_125_DEG_S / 100; @@ -432,7 +452,8 @@ ZTEST_USER(bmi260, test_bmi_gyr_set_offset) compare_int3v_eps(exp_v, ret_v, 32); /* Gyroscope offset should be enabled */ zassert_true(bmi_emul_get_reg(emul, BMI260_OFFSET_EN_GYR98) & - BMI260_OFFSET_GYRO_EN, NULL); + BMI260_OFFSET_GYRO_EN, + NULL); /* Setup rotation and rotate input for set_offset function */ ms->rot_standard_ref = &test_rotation; @@ -445,14 +466,15 @@ ZTEST_USER(bmi260, test_bmi_gyr_set_offset) get_emul_gyr_offset(emul, ret_v); compare_int3v_eps(exp_v, ret_v, 32); zassert_true(bmi_emul_get_reg(emul, BMI260_OFFSET_EN_GYR98) & - BMI260_OFFSET_GYRO_EN, NULL); + BMI260_OFFSET_GYRO_EN, + NULL); } /** * Try to set accelerometer range and check if expected range was set * in driver and in emulator. */ -static void check_set_acc_range_f(struct i2c_emul *emul, +static void check_set_acc_range_f(const struct emul *emul, struct motion_sensor_t *ms, int range, int rnd, int exp_range, int line) { @@ -462,8 +484,8 @@ static void check_set_acc_range_f(struct i2c_emul *emul, zassert_equal(EC_SUCCESS, ms->drv->set_range(ms, range, rnd), "set_range failed; line: %d", line); zassert_equal(exp_range, ms->current_range, - "Expected range %d, got %d; line %d", - exp_range, ms->current_range, line); + "Expected range %d, got %d; line %d", exp_range, + ms->current_range, line); range_reg = bmi_emul_get_reg(emul, BMI260_ACC_RANGE); switch (exp_range) { @@ -491,17 +513,18 @@ static void check_set_acc_range_f(struct i2c_emul *emul, "Expected range reg 0x%x, got 0x%x; line %d", exp_range_reg, range_reg, line); } -#define check_set_acc_range(emul, ms, range, rnd, exp_range) \ +#define check_set_acc_range(emul, ms, range, rnd, exp_range) \ check_set_acc_range_f(emul, ms, range, rnd, exp_range, __LINE__) /** Test set accelerometer range with and without I2C errors */ ZTEST_USER(bmi260, test_bmi_acc_set_range) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int start_range; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Setup starting range, shouldn't be changed on error */ @@ -509,20 +532,21 @@ ZTEST_USER(bmi260, test_bmi_acc_set_range) ms->current_range = start_range; bmi_emul_set_reg(emul, BMI260_ACC_RANGE, BMI260_GSEL_2G); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_ACC_RANGE); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_ACC_RANGE); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_range(ms, 12, 0), NULL); zassert_equal(start_range, ms->current_range, NULL); - zassert_equal(BMI260_GSEL_2G, - bmi_emul_get_reg(emul, BMI260_ACC_RANGE), NULL); + zassert_equal(BMI260_GSEL_2G, bmi_emul_get_reg(emul, BMI260_ACC_RANGE), + NULL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_range(ms, 12, 1), NULL); zassert_equal(start_range, ms->current_range, NULL); - zassert_equal(BMI260_GSEL_2G, - bmi_emul_get_reg(emul, BMI260_ACC_RANGE), NULL); + zassert_equal(BMI260_GSEL_2G, bmi_emul_get_reg(emul, BMI260_ACC_RANGE), + NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting range with rounding down */ check_set_acc_range(emul, ms, 1, 0, 2); @@ -557,7 +581,7 @@ ZTEST_USER(bmi260, test_bmi_acc_set_range) * Try to set gyroscope range and check if expected range was set in driver and * in emulator. */ -static void check_set_gyr_range_f(struct i2c_emul *emul, +static void check_set_gyr_range_f(const struct emul *emul, struct motion_sensor_t *ms, int range, int rnd, int exp_range, int line) { @@ -567,8 +591,8 @@ static void check_set_gyr_range_f(struct i2c_emul *emul, zassert_equal(EC_SUCCESS, ms->drv->set_range(ms, range, rnd), "set_range failed; line: %d", line); zassert_equal(exp_range, ms->current_range, - "Expected range %d, got %d; line %d", - exp_range, ms->current_range, line); + "Expected range %d, got %d; line %d", exp_range, + ms->current_range, line); range_reg = bmi_emul_get_reg(emul, BMI260_GYR_RANGE); switch (exp_range) { @@ -599,17 +623,18 @@ static void check_set_gyr_range_f(struct i2c_emul *emul, "Expected range reg 0x%x, got 0x%x; line %d", exp_range_reg, range_reg, line); } -#define check_set_gyr_range(emul, ms, range, rnd, exp_range) \ +#define check_set_gyr_range(emul, ms, range, rnd, exp_range) \ check_set_gyr_range_f(emul, ms, range, rnd, exp_range, __LINE__) /** Test set gyroscope range with and without I2C errors */ ZTEST_USER(bmi260, test_bmi_gyr_set_range) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int start_range; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Setup starting range, shouldn't be changed on error */ @@ -617,7 +642,7 @@ ZTEST_USER(bmi260, test_bmi_gyr_set_range) ms->current_range = start_range; bmi_emul_set_reg(emul, BMI260_GYR_RANGE, BMI260_DPS_SEL_250); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_GYR_RANGE); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_GYR_RANGE); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_range(ms, 125, 0), NULL); @@ -630,7 +655,8 @@ ZTEST_USER(bmi260, test_bmi_gyr_set_range) bmi_emul_get_reg(emul, BMI260_GYR_RANGE), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting range with rounding down */ check_set_gyr_range(emul, ms, 1, 0, 125); @@ -691,7 +717,7 @@ ZTEST_USER(bmi260, test_bmi_get_resolution) * Try to set accelerometer data rate and check if expected rate was set * in driver and in emulator. */ -static void check_set_acc_rate_f(struct i2c_emul *emul, +static void check_set_acc_rate_f(const struct emul *emul, struct motion_sensor_t *ms, int rate, int rnd, int exp_rate, int line) { @@ -741,22 +767,23 @@ static void check_set_acc_rate_f(struct i2c_emul *emul, } zassert_equal(exp_rate_reg, rate_reg, - "Expected rate reg 0x%x, got 0x%x; line %d", - exp_rate_reg, rate_reg, line); + "Expected rate reg 0x%x, got 0x%x; line %d", exp_rate_reg, + rate_reg, line); } -#define check_set_acc_rate(emul, ms, rate, rnd, exp_rate) \ +#define check_set_acc_rate(emul, ms, rate, rnd, exp_rate) \ check_set_acc_rate_f(emul, ms, rate, rnd, exp_rate, __LINE__) /** Test set and get accelerometer rate with and without I2C errors */ ZTEST_USER(bmi260, test_bmi_acc_rate) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; uint8_t reg_rate; uint8_t pwr_ctrl; int drv_rate; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Test setting rate with rounding down */ @@ -798,8 +825,8 @@ ZTEST_USER(bmi260, test_bmi_acc_rate) check_set_acc_rate(emul, ms, 200000, 1, 200000); /* Test out of range rate with rounding down */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 0), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 0), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 12499, 0), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -808,10 +835,10 @@ ZTEST_USER(bmi260, test_bmi_acc_rate) ms->drv->set_data_rate(ms, 2000000, 0), NULL); /* Test out of range rate with rounding up */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 1), NULL); - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 6250, 1), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 1), + NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 6250, 1), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 200001, 1), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -824,7 +851,7 @@ ZTEST_USER(bmi260, test_bmi_acc_rate) reg_rate = bmi_emul_get_reg(emul, BMI260_ACC_CONF); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_CONF); /* Test fail on read */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -837,10 +864,11 @@ ZTEST_USER(bmi260, test_bmi_acc_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI260_ACC_CONF), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_ACC_CONF); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_ACC_CONF); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -853,7 +881,8 @@ ZTEST_USER(bmi260, test_bmi_acc_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI260_ACC_CONF), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test disabling sensor */ bmi_emul_set_reg(emul, BMI260_PWR_CTRL, @@ -877,25 +906,27 @@ ZTEST_USER(bmi260, test_bmi_acc_rate) zassert_true(reg_rate & BMI260_FILTER_PERF, NULL); /* Test disabling sensor (by setting rate to 0) but failing. */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_PWR_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_PWR_CTRL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 0, 0), "Did not properly handle failed power down."); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test enabling sensor but failing. (after first disabling it) */ ms->drv->set_data_rate(ms, 0, 0); - i2c_common_emul_set_write_fail_reg(emul, BMI260_PWR_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_PWR_CTRL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), "Did not properly handle failed power up."); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); } /** * Try to set gyroscope data rate and check if expected rate was set * in driver and in emulator. */ -static void check_set_gyr_rate_f(struct i2c_emul *emul, +static void check_set_gyr_rate_f(const struct emul *emul, struct motion_sensor_t *ms, int rate, int rnd, int exp_rate, int line) { @@ -945,22 +976,23 @@ static void check_set_gyr_rate_f(struct i2c_emul *emul, } zassert_equal(exp_rate_reg, rate_reg, - "Expected rate reg 0x%x, got 0x%x; line %d", - exp_rate_reg, rate_reg, line); + "Expected rate reg 0x%x, got 0x%x; line %d", exp_rate_reg, + rate_reg, line); } -#define check_set_gyr_rate(emul, ms, rate, rnd, exp_rate) \ +#define check_set_gyr_rate(emul, ms, rate, rnd, exp_rate) \ check_set_gyr_rate_f(emul, ms, rate, rnd, exp_rate, __LINE__) /** Test set and get gyroscope rate with and without I2C errors */ ZTEST_USER(bmi260, test_bmi_gyr_rate) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; uint8_t reg_rate; uint8_t pwr_ctrl; int drv_rate; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Test setting rate with rounding down */ @@ -996,8 +1028,8 @@ ZTEST_USER(bmi260, test_bmi_gyr_rate) check_set_gyr_rate(emul, ms, 200000, 1, 200000); /* Test out of range rate with rounding down */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 0), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 0), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 24999, 0), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -1006,8 +1038,8 @@ ZTEST_USER(bmi260, test_bmi_gyr_rate) ms->drv->set_data_rate(ms, 4000000, 0), NULL); /* Test out of range rate with rounding up */ - zassert_equal(EC_RES_INVALID_PARAM, - ms->drv->set_data_rate(ms, 1, 1), NULL); + zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 1, 1), + NULL); zassert_equal(EC_RES_INVALID_PARAM, ms->drv->set_data_rate(ms, 12499, 1), NULL); zassert_equal(EC_RES_INVALID_PARAM, @@ -1022,7 +1054,7 @@ ZTEST_USER(bmi260, test_bmi_gyr_rate) reg_rate = bmi_emul_get_reg(emul, BMI260_GYR_CONF); /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_CONF); /* Test fail on read */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -1035,10 +1067,11 @@ ZTEST_USER(bmi260, test_bmi_gyr_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI260_GYR_CONF), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup emulator fail on write */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_GYR_CONF); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_GYR_CONF); /* Test fail on write */ zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 50000, 0), @@ -1051,7 +1084,8 @@ ZTEST_USER(bmi260, test_bmi_gyr_rate) zassert_equal(reg_rate, bmi_emul_get_reg(emul, BMI260_GYR_CONF), NULL); /* Do not fail on write */ - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test disabling sensor */ bmi_emul_set_reg(emul, BMI260_PWR_CTRL, @@ -1086,7 +1120,7 @@ ZTEST_USER(bmi260, test_bmi_scale) { struct motion_sensor_t *ms; int16_t ret_scale[3]; - int16_t exp_scale[3] = {100, 231, 421}; + int16_t exp_scale[3] = { 100, 231, 421 }; int16_t t; /* Test accelerometer */ @@ -1116,27 +1150,29 @@ ZTEST_USER(bmi260, test_bmi_scale) ZTEST_USER(bmi260, test_bmi_read_temp) { struct motion_sensor_t *ms_acc, *ms_gyr; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int ret_temp; int exp_temp; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Setup emulator fail on read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_TEMPERATURE_0); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_TEMPERATURE_0); zassert_equal(EC_ERROR_NOT_POWERED, ms_acc->drv->read_temp(ms_acc, &ret_temp), NULL); zassert_equal(EC_ERROR_NOT_POWERED, ms_gyr->drv->read_temp(ms_gyr, &ret_temp), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_TEMPERATURE_1); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_TEMPERATURE_1); zassert_equal(EC_ERROR_NOT_POWERED, ms_acc->drv->read_temp(ms_acc, &ret_temp), NULL); zassert_equal(EC_ERROR_NOT_POWERED, ms_gyr->drv->read_temp(ms_gyr, &ret_temp), NULL); /* Do not fail on read */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Fail on invalid temperature */ bmi_emul_set_reg(emul, BMI260_TEMPERATURE_0, 0x00); @@ -1195,14 +1231,15 @@ ZTEST_USER(bmi260, test_bmi_read_temp) ZTEST_USER(bmi260, test_bmi_acc_read) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; intv3_t ret_v; intv3_t exp_v; - int16_t scale[3] = {MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE}; + int16_t scale[3] = { MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE }; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Set offset 0 to simplify test */ @@ -1211,10 +1248,11 @@ ZTEST_USER(bmi260, test_bmi_acc_read) bmi_emul_set_off(emul, BMI_EMUL_ACC_Z, 0); /* Fail on read status */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* When not ready, driver should return saved raw value */ exp_v[0] = 100; @@ -1282,20 +1320,21 @@ ZTEST_USER(bmi260, test_bmi_acc_read) compare_int3v(exp_v, ret_v); /* Fail on read of data registers */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_X_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_X_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_X_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_X_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_Y_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_Y_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_Y_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_Y_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_Z_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_Z_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_Z_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_Z_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); ms->rot_standard_ref = NULL; } @@ -1303,14 +1342,15 @@ ZTEST_USER(bmi260, test_bmi_acc_read) ZTEST_USER(bmi260, test_bmi_gyr_read) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; intv3_t ret_v; intv3_t exp_v; - int16_t scale[3] = {MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE}; + int16_t scale[3] = { MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE }; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; /* Set offset 0 to simplify test */ @@ -1319,10 +1359,11 @@ ZTEST_USER(bmi260, test_bmi_gyr_read) bmi_emul_set_off(emul, BMI_EMUL_GYR_Z, 0); /* Fail on read status */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* When not ready, driver should return saved raw value */ exp_v[0] = 100; @@ -1390,35 +1431,37 @@ ZTEST_USER(bmi260, test_bmi_gyr_read) compare_int3v(exp_v, ret_v); /* Fail on read of data registers */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_X_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_X_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_X_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_X_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_Y_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_Y_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_Y_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_Y_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_Z_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_Z_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_Z_H_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_Z_H_G); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, ret_v), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); ms->rot_standard_ref = NULL; } -/** Test acceleromtere calibration */ +/** Test accelerometer calibration */ ZTEST_USER(bmi260, test_bmi_acc_perform_calib) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; intv3_t start_off; intv3_t exp_off; intv3_t ret_off; int range; int rate; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; bmi_init_emul(); @@ -1455,20 +1498,22 @@ ZTEST_USER(bmi260, test_bmi_acc_perform_calib) zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on rate read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on status read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on data not ready */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); bmi_emul_set_reg(emul, BMI260_STATUS, 0); zassert_equal(EC_ERROR_TIMEOUT, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); @@ -1478,18 +1523,19 @@ ZTEST_USER(bmi260, test_bmi_acc_perform_calib) bmi_emul_set_reg(emul, BMI260_STATUS, BMI260_DRDY_ACC); /* Test fail on data read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_ACC_X_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_ACC_X_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on setting offset */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_NV_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_NV_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test successful offset compenastion */ zassert_equal(EC_SUCCESS, ms->drv->perform_calib(ms, 1), NULL); @@ -1507,16 +1553,19 @@ ZTEST_USER(bmi260, test_bmi_acc_perform_calib) ZTEST_USER(bmi260, test_bmi_gyr_perform_calib) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; intv3_t start_off; intv3_t exp_off; intv3_t ret_off; int range; int rate; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_GYR_SENSOR_ID]; + bmi_init_emul(); + /* Range and rate cannot change after calibration */ range = 125; rate = 50000; @@ -1546,20 +1595,22 @@ ZTEST_USER(bmi260, test_bmi_gyr_perform_calib) zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on rate read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_CONF); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_CONF); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on status read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on data not ready */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); bmi_emul_set_reg(emul, BMI260_STATUS, 0); zassert_equal(EC_ERROR_TIMEOUT, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); @@ -1573,18 +1624,19 @@ ZTEST_USER(bmi260, test_bmi_gyr_perform_calib) BMI260_DRDY_ACC | BMI260_DRDY_GYR); /* Test fail on data read */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_GYR_X_L_G); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_GYR_X_L_G); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); /* Test fail on setting offset */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_OFFSET_EN_GYR98); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_OFFSET_EN_GYR98); zassert_equal(EC_ERROR_INVAL, ms->drv->perform_calib(ms, 1), NULL); zassert_equal(range, ms->current_range, NULL); zassert_equal(rate, ms->drv->get_data_rate(ms), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test successful offset compenastion */ zassert_equal(EC_SUCCESS, ms->drv->perform_calib(ms, 1), NULL); @@ -1611,9 +1663,10 @@ static const void *init_rom_map_addr_passthru(const void *addr, int size) ZTEST_USER(bmi260, test_bmi_init) { struct motion_sensor_t *ms_acc, *ms_gyr; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; @@ -1634,7 +1687,7 @@ struct fifo_func_data { * to value passed as additional data. It sets interrupt registers to 0 after * access. */ -static int emul_fifo_func(struct i2c_emul *emul, int reg, uint8_t *val, +static int emul_fifo_func(const struct emul *emul, int reg, uint8_t *val, int byte, void *data) { struct fifo_func_data *d = data; @@ -1658,9 +1711,8 @@ static int emul_fifo_func(struct i2c_emul *emul, int reg, uint8_t *val, */ static void check_fifo_f(struct motion_sensor_t *ms_acc, struct motion_sensor_t *ms_gyr, - struct bmi_emul_frame *frame, - int acc_range, int gyr_range, - int line) + struct bmi_emul_frame *frame, int acc_range, + int gyr_range, int line) { struct ec_response_motion_sensor_data vector; struct bmi_emul_frame *f_acc, *f_gyr; @@ -1741,7 +1793,7 @@ static void check_fifo_f(struct motion_sensor_t *ms_acc, zassert_is_null(f_gyr, "Not all gyroscope frames are read, line %d", line); } -#define check_fifo(ms_acc, ms_gyr, frame, acc_range, gyr_range) \ +#define check_fifo(ms_acc, ms_gyr, frame, acc_range, gyr_range) \ check_fifo_f(ms_acc, ms_gyr, frame, acc_range, gyr_range, __LINE__) /** Test irq handler of accelerometer sensor */ @@ -1750,12 +1802,13 @@ ZTEST_USER(bmi260, test_bmi_acc_fifo) struct motion_sensor_t *ms, *ms_gyr; struct fifo_func_data func_data; struct bmi_emul_frame f[3]; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; int gyr_range = 125; int acc_range = 2; int event; - emul = bmi_emul_get(BMI_ORD); + common_data = emul_bmi_get_i2c_common_data(emul); ms = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; @@ -1772,11 +1825,12 @@ ZTEST_USER(bmi260, test_bmi_acc_fifo) event = BMI_INT_EVENT; /* Test fail to read interrupt status registers */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_INT_STATUS_0); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_INT_STATUS_0); zassert_equal(EC_ERROR_INVAL, ms->drv->irq_handler(ms, &event), NULL); - i2c_common_emul_set_read_fail_reg(emul, BMI260_INT_STATUS_1); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_INT_STATUS_1); zassert_equal(EC_ERROR_INVAL, ms->drv->irq_handler(ms, &event), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test no interrupt */ bmi_emul_set_reg(emul, BMI260_INT_STATUS_0, 0); @@ -1789,7 +1843,7 @@ ZTEST_USER(bmi260, test_bmi_acc_fifo) check_fifo(ms, ms_gyr, NULL, acc_range, gyr_range); /* Set custom function for FIFO test */ - i2c_common_emul_set_read_func(emul, emul_fifo_func, &func_data); + i2c_common_emul_set_read_func(common_data, emul_fifo_func, &func_data); /* Set range */ zassert_equal(EC_SUCCESS, ms->drv->set_range(ms, acc_range, 0), NULL); zassert_equal(EC_SUCCESS, ms_gyr->drv->set_range(ms_gyr, gyr_range, 0), @@ -1872,7 +1926,7 @@ ZTEST_USER(bmi260, test_bmi_acc_fifo) check_fifo(ms, ms_gyr, f, acc_range, gyr_range); /* Remove custom emulator read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } /** Test irq handler of gyroscope sensor */ @@ -1906,7 +1960,7 @@ ZTEST_USER(bmi260, test_unsupported_configs) memcpy(&ms_fake, &motion_sensors[BMI_ACC_SENSOR_ID], sizeof(ms_fake)); ms_fake.type = MOTIONSENSE_TYPE_MAG; - int16_t offset[3]; + int16_t offset[3] = { 0 }; int ret = ms_fake.drv->set_offset(&ms_fake, (const int16_t *)&offset, 0); zassert_equal( @@ -1953,19 +2007,22 @@ ZTEST_USER(bmi260, test_interrupt_handler) ZTEST_USER(bmi260, test_bmi_init_chip_id) { - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data = + emul_bmi_get_i2c_common_data(emul); struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; /* Part 1: * Error occurs while reading the chip ID */ - i2c_common_emul_set_read_fail_reg(emul, BMI260_CHIP_ID); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_CHIP_ID); int ret = ms_acc->drv->init(ms_acc); zassert_equal(ret, EC_ERROR_UNKNOWN, "Expected %d (EC_ERROR_UNKNOWN) but got %d", EC_ERROR_UNKNOWN, ret); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Part 2: * Test cases where the returned chip ID does not match what is @@ -2007,9 +2064,10 @@ ZTEST_USER(bmi260, test_bmi_init_chip_id) /* Make an I2C emulator mock wrapped in FFF */ FAKE_VALUE_FUNC(int, bmi_config_load_no_mapped_flash_mock_read_fn, - struct i2c_emul *, int, uint8_t *, int, void *); + const struct emul *, int, uint8_t *, int, void *); +struct i2c_common_emul_data *common_data; static int bmi_config_load_no_mapped_flash_mock_read_fn_helper( - struct i2c_emul *emul, int reg, uint8_t *val, int bytes, void *data) + const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { if (reg == BMI260_INTERNAL_STATUS && val) { /* We want to force-return a status of 'initialized' when this @@ -2029,10 +2087,13 @@ ZTEST_USER(bmi260, test_bmi_config_load_no_mapped_flash) * `bmi_config_load()` returns NULL) */ - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; int ret, num_status_reg_reads; + common_data = emul_bmi_get_i2c_common_data(emul); + /* Force bmi_config_load() to have to manually copy from memory */ RESET_FAKE(init_rom_map); init_rom_map_fake.return_val = NULL; @@ -2046,7 +2107,8 @@ ZTEST_USER(bmi260, test_bmi_config_load_no_mapped_flash) */ bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); i2c_common_emul_set_read_func( - emul, bmi_config_load_no_mapped_flash_mock_read_fn, NULL); + common_data, bmi_config_load_no_mapped_flash_mock_read_fn, + NULL); RESET_FAKE(bmi_config_load_no_mapped_flash_mock_read_fn); bmi_config_load_no_mapped_flash_mock_read_fn_fake.custom_fake = bmi_config_load_no_mapped_flash_mock_read_fn_helper; @@ -2066,13 +2128,14 @@ ZTEST_USER(bmi260, test_bmi_config_load_no_mapped_flash) num_status_reg_reads, 1); /* Part 2: write to `BMI260_INIT_ADDR_0` fails */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_INIT_ADDR_0); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_INIT_ADDR_0); ret = ms_acc->drv->init(ms_acc); zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Got %d but expected %d", ret, EC_ERROR_INVALID_CONFIG); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Part 3: init_rom_copy() fails w/ a non-zero return code of 255. */ init_rom_copy_fake.return_val = 255; @@ -2084,16 +2147,17 @@ ZTEST_USER(bmi260, test_bmi_config_load_no_mapped_flash) init_rom_copy_fake.return_val = 0; /* Part 4: write to `BMI260_INIT_DATA` fails */ - i2c_common_emul_set_write_fail_reg(emul, BMI260_INIT_DATA); + i2c_common_emul_set_write_fail_reg(common_data, BMI260_INIT_DATA); ret = ms_acc->drv->init(ms_acc); zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Got %d but expected %d", ret, EC_ERROR_INVALID_CONFIG); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Cleanup */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } ZTEST_USER(bmi260, test_bmi_config_unsupported_chip) @@ -2108,9 +2172,12 @@ ZTEST_USER(bmi260, test_bmi_config_unsupported_chip) "CONFIG_ACCELGYRO_BMI220 defined." #endif - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; struct motion_sensor_t ms_fake; + common_data = emul_bmi_get_i2c_common_data(emul); + /* Set up struct and emaulator to be a BMI220 chip, which * `bmi_config_load()` does not support in the current configuration */ @@ -2131,13 +2198,16 @@ ZTEST_USER(bmi260, test_init_config_read_failure) * BMI260_INTERNAL_STATUS. */ - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; int ret; + common_data = emul_bmi_get_i2c_common_data(emul); + /* Set up i2c emulator and mocks */ bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); - i2c_common_emul_set_read_fail_reg(emul, BMI260_INTERNAL_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, BMI260_INTERNAL_STATUS); RESET_FAKE(init_rom_map); init_rom_map_fake.custom_fake = init_rom_map_addr_passthru; @@ -2151,7 +2221,7 @@ ZTEST_USER(bmi260, test_init_config_read_failure) * waiting for the chip to initialize */ static int timeout_test_status_reg_access_count; -static int status_timeout_mock_read_fn(struct i2c_emul *emul, int reg, +static int status_timeout_mock_read_fn(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { if (reg == BMI260_INTERNAL_STATUS && val) { @@ -2172,14 +2242,18 @@ ZTEST_USER(bmi260, test_init_config_status_timeout) * before the timeout. */ - struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; int ret; + common_data = emul_bmi_get_i2c_common_data(emul); + /* Set up i2c emulator and mocks */ bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); timeout_test_status_reg_access_count = 0; - i2c_common_emul_set_read_func(emul, status_timeout_mock_read_fn, NULL); + i2c_common_emul_set_read_func(common_data, status_timeout_mock_read_fn, + NULL); RESET_FAKE(init_rom_map); init_rom_map_fake.custom_fake = init_rom_map_addr_passthru; @@ -2192,4 +2266,40 @@ ZTEST_USER(bmi260, test_init_config_status_timeout) EC_ERROR_INVALID_CONFIG, ret); } -ZTEST_SUITE(bmi260, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +/** + * @brief Put the driver and emulator in to a consistent state before each test. + * + * @param arg Test fixture (unused) + */ +static void bmi260_test_before(void *arg) +{ + ARG_UNUSED(arg); + + const struct emul *emul = EMUL_DT_GET(BMI_NODE); + struct i2c_common_emul_data *common_data; + struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; + struct motion_sensor_t *ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; + + common_data = emul_bmi_get_i2c_common_data(emul); + + /* Reset I2C */ + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_func(common_data, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); + + /* Reset local fakes(s) */ + RESET_FAKE(bmi_config_load_no_mapped_flash_mock_read_fn); + + /* Clear rotation matrices */ + ms_acc->rot_standard_ref = NULL; + ms_gyr->rot_standard_ref = NULL; + + /* Set Chip ID register to BMI260 (required for init() to succeed) */ + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); +} + +ZTEST_SUITE(bmi260, drivers_predicate_pre_main, NULL, bmi260_test_before, NULL, + NULL); diff --git a/zephyr/test/drivers/src/charge_manager.c b/zephyr/test/drivers/default/src/charge_manager.c index 13668924fd..85048178ae 100644 --- a/zephyr/test/drivers/src/charge_manager.c +++ b/zephyr/test/drivers/default/src/charge_manager.c @@ -1,9 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "charge_manager.h" #include "ec_commands.h" diff --git a/zephyr/test/drivers/default/src/console.c b/zephyr/test/drivers/default/src/console.c new file mode 100644 index 0000000000..c74fd3ea1c --- /dev/null +++ b/zephyr/test/drivers/default/src/console.c @@ -0,0 +1,88 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include <zephyr/shell/shell_dummy.h> + +#include "builtin/stdio.h" +#include "test/drivers/test_state.h" +#include "console.h" +#include "uart.h" +#include "ec_commands.h" + +ZTEST_USER(console, printf_overflow) +{ + char buffer[10]; + + zassert_equal(-EC_ERROR_OVERFLOW, + crec_snprintf(buffer, 4, "1234567890"), NULL); + zassert_equal(0, strcmp(buffer, "123"), "got '%s'", buffer); + zassert_equal(-EC_ERROR_OVERFLOW, + crec_snprintf(buffer, 4, "%%%%%%%%%%"), NULL); + zassert_equal(0, strcmp(buffer, "%%%"), "got '%s'", buffer); +} + +/* This test is identical to test_buf_notify_null in + * test/console_edit.c. Please keep them in sync to verify that + * uart_console_read_buffer works identically in legacy EC and zephyr. + */ +ZTEST_USER(console, buf_notify_null) +{ + char buffer[100]; + uint16_t write_count; + size_t consumed_count; + + /* Flush the console buffer before we start. */ + zassert_ok(uart_console_read_buffer_init(), NULL); + + /* Write a nul char to the buffer. */ + consumed_count = console_buf_notify_chars("ab\0c", 4); + + /* Check if all bytes were consumed by console buffer */ + zassert_equal(consumed_count, 4, "got %d", consumed_count); + + /* Check if the nul is present in the buffer. */ + zassert_ok(uart_console_read_buffer_init(), NULL); + zassert_ok(uart_console_read_buffer(CONSOLE_READ_RECENT, buffer, + sizeof(buffer), &write_count), + NULL); + zassert_equal(0, strncmp(buffer, "abc", 4), "got '%s'", buffer); + zassert_equal(write_count, 4, "got %d", write_count); +} + +static const char *large_string = + "This is a very long string, it will cause a buffer flush at " + "some point while printing to the shell. Long long text. Blah " + "blah. Long long text. Blah blah. Long long text. Blah blah."; +ZTEST_USER(console, shell_fprintf_full) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + zassert_true(strlen(large_string) >= + shell_zephyr->fprintf_ctx->buffer_size, + "large_string is too short, fix test."); + + shell_backend_dummy_clear_output(shell_zephyr); + shell_fprintf(shell_zephyr, SHELL_NORMAL, "%s", large_string); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_true(strncmp(outbuffer, large_string, strlen(large_string)) == + 0, + "Invalid console output %s", outbuffer); +} + +ZTEST_USER(console, cprint_too_big) +{ + zassert_true(strlen(large_string) >= CONFIG_SHELL_PRINTF_BUFF_SIZE, + "buffer is too short, fix test."); + + zassert_equal(cprintf(CC_COMMAND, "%s", large_string), + -EC_ERROR_OVERFLOW, NULL); +} + +ZTEST_SUITE(console, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/console_cmd/accelinfo.c b/zephyr/test/drivers/default/src/console_cmd/accelinfo.c index e60d00b596..11638fcc70 100644 --- a/zephyr/test/drivers/src/console_cmd/accelinfo.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelinfo.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "config.h" #include "console.h" diff --git a/zephyr/test/drivers/src/console_cmd/accelinit.c b/zephyr/test/drivers/default/src/console_cmd/accelinit.c index 24538ef648..c440faebba 100644 --- a/zephyr/test/drivers/src/console_cmd/accelinit.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelinit.c @@ -1,11 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <fff.h> +#include <zephyr/fff.h> #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "accelgyro.h" #include "console.h" @@ -80,7 +80,7 @@ ZTEST_USER(console_cmd_accelinit, test_state_was_set) ZTEST_USER_F(console_cmd_accelinit, test_fail_3_times) { mock_init_fake.return_val = 1; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; motion_sensors[0].state = SENSOR_INITIALIZED; zassert_ok(shell_execute_cmd(get_ec_shell(), "accelinit 0"), NULL); diff --git a/zephyr/test/drivers/src/console_cmd/accelrange.c b/zephyr/test/drivers/default/src/console_cmd/accelrange.c index b78702e486..ff9d03bfe2 100644 --- a/zephyr/test/drivers/src/console_cmd/accelrange.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelrange.c @@ -1,11 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> #include <zephyr/devicetree.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "console.h" #include "driver/accel_bma2x2.h" @@ -16,17 +16,20 @@ #include "motion_sense.h" #include "test/drivers/test_state.h" -#define EMUL_LABEL DT_NODELABEL(bma_emul) +#define EMUL_NODE DT_NODELABEL(bma_emul) #define BMA_ORD DT_DEP_ORD(EMUL_LABEL) static void console_cmd_accelrange_after(void *fixture) { - struct i2c_emul *emul = bma_emul_get(BMA_ORD); + const struct emul *emul = EMUL_DT_GET(EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); ARG_UNUSED(fixture); shell_execute_cmd(get_ec_shell(), "accelrange 0 2"); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST_SUITE(console_cmd_accelrange, drivers_predicate_post_main, NULL, NULL, @@ -101,10 +104,13 @@ ZTEST_USER(console_cmd_accelrange, test_set_range_round_down) ZTEST_USER(console_cmd_accelrange, test_i2c_error) { - struct i2c_emul *emul = bma_emul_get(BMA_ORD); + const struct emul *emul = EMUL_DT_GET(EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_bma_get_i2c_common_data(emul); int rv; - i2c_common_emul_set_read_fail_reg(emul, BMA2x2_RANGE_SELECT_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, + BMA2x2_RANGE_SELECT_ADDR); rv = shell_execute_cmd(get_ec_shell(), "accelrange 0 3"); zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", diff --git a/zephyr/test/drivers/src/console_cmd/accelrate.c b/zephyr/test/drivers/default/src/console_cmd/accelrate.c index 6ae4b96343..59482ed866 100644 --- a/zephyr/test/drivers/src/console_cmd/accelrate.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelrate.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "console.h" #include "ec_commands.h" diff --git a/zephyr/test/drivers/src/console_cmd/accelread.c b/zephyr/test/drivers/default/src/console_cmd/accelread.c index 8ab9407dfe..81ebf87e55 100644 --- a/zephyr/test/drivers/src/console_cmd/accelread.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelread.c @@ -1,11 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <fff.h> +#include <zephyr/fff.h> #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "accelgyro.h" #include "console.h" @@ -58,7 +58,7 @@ static void console_cmd_accelread_after(void *fixture) motion_sensors[0].drv = this->sensor_0_drv; } -ZTEST_SUITE(console_cmd_accelread, drivers_predicate_post_main, +ZTEST_SUITE(console_cmd_accelread, drivers_predicate_pre_main, console_cmd_accelread_setup, console_cmd_accelread_before, console_cmd_accelread_after, NULL); @@ -96,9 +96,10 @@ int mock_read_call_super(const struct motion_sensor_t *s, int *v) ZTEST_USER_F(console_cmd_accelread, test_read) { - current_fixture = this; + current_fixture = fixture; mock_read_fake.custom_fake = mock_read_call_super; - motion_sensors[0].drv = &this->mock_drv; + mock_get_data_rate_fake.return_val = 100; + motion_sensors[0].drv = &fixture->mock_drv; zassert_ok(shell_execute_cmd(get_ec_shell(), "accelread 0"), NULL); zassert_equal(1, mock_read_fake.call_count, @@ -114,7 +115,7 @@ ZTEST_USER_F(console_cmd_accelread, test_read) ZTEST_USER_F(console_cmd_accelread, test_read_fail) { mock_read_fake.return_val = 1; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; zassert_ok(shell_execute_cmd(get_ec_shell(), "accelread 0"), NULL); zassert_equal(1, mock_read_fake.call_count, diff --git a/zephyr/test/drivers/src/console_cmd/accelres.c b/zephyr/test/drivers/default/src/console_cmd/accelres.c index 72b52b1c58..5e29a0572d 100644 --- a/zephyr/test/drivers/src/console_cmd/accelres.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelres.c @@ -1,11 +1,11 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <fff.h> +#include <zephyr/fff.h> #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "accelgyro.h" #include "console.h" @@ -112,7 +112,7 @@ ZTEST_USER_F(console_cmd_accelres, test_set_res__bad_res_value) int rv; set_resolution_fake.return_val = EC_ERROR_INVAL; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; rv = shell_execute_cmd(get_ec_shell(), "accelres 0 0"); zassert_equal(EC_ERROR_PARAM2, rv, "Expected %d, but got %d", EC_ERROR_PARAM2, rv); diff --git a/zephyr/test/drivers/src/console_cmd/accelspoof.c b/zephyr/test/drivers/default/src/console_cmd/accelspoof.c index 2d9887a2ab..3e183ca296 100644 --- a/zephyr/test/drivers/src/console_cmd/accelspoof.c +++ b/zephyr/test/drivers/default/src/console_cmd/accelspoof.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "console.h" #include "ec_commands.h" diff --git a/zephyr/test/drivers/default/src/console_cmd/adc.c b/zephyr/test/drivers/default/src/console_cmd/adc.c new file mode 100644 index 0000000000..85dfda939a --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/adc.c @@ -0,0 +1,43 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +/* Default adc command, lists out channels */ +ZTEST_USER(console_cmd_adc, test_adc_noname) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "adc"), + "Failed default print"); +} + +/* adc with named channels */ +ZTEST_USER(console_cmd_adc, test_adc_named_channels) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "adc charger"), + "Failed to get charger adc channel."); + zassert_ok(shell_execute_cmd(get_ec_shell(), "adc ddr-soc"), + "Failed to get ddr-soc adc channel."); + zassert_ok(shell_execute_cmd(get_ec_shell(), "adc fan"), + "Failed to get fan adc channel."); + zassert_ok(shell_execute_cmd(get_ec_shell(), "adc psys"), + "Failed to get psys adc channel."); +} + +/* adc with unknown channel */ +ZTEST_USER(console_cmd_adc, test_adc_wrong_name) +{ + int rv = shell_execute_cmd(get_ec_shell(), "adc fish"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_SUITE(console_cmd_adc, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/battery.c b/zephyr/test/drivers/default/src/console_cmd/battery.c new file mode 100644 index 0000000000..9c3e21fcf1 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/battery.c @@ -0,0 +1,90 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/emul.h> +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "battery_smart.h" +#include "console.h" +#include "ec_commands.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_smart_battery.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +struct console_cmd_battery_fixture { + const struct emul *emul; + struct i2c_common_emul_data *i2c_emul; +}; + +static void *console_cmd_battery_setup(void) +{ + static struct console_cmd_battery_fixture fixture = { + .emul = EMUL_DT_GET(DT_NODELABEL(battery)), + }; + + fixture.i2c_emul = emul_smart_battery_get_i2c_common_data(fixture.emul); + + return &fixture; +} + +static void console_cmd_battery_after(void *f) +{ + struct console_cmd_battery_fixture *fixture = f; + + i2c_common_emul_set_read_fail_reg(fixture->i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); +} + +/* Default battery command */ +ZTEST_USER(console_cmd_battery, test_battery_default) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "battery"), + "Failed default print"); +} + +ZTEST_USER_F(console_cmd_battery, test_battery_status_i2c_error) +{ + /* Force a failure on the battery i2c write to SB_BATTERY_STATUS */ + i2c_common_emul_set_read_fail_reg(fixture->i2c_emul, SB_BATTERY_STATUS); + zassert_ok(shell_execute_cmd(get_ec_shell(), "battery"), + "Failed default print"); +} + +/* Battery command with repeat */ +ZTEST_USER(console_cmd_battery, test_battery_repeat) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "battery 2"), + "Failed default print"); + zassert_ok(shell_execute_cmd(get_ec_shell(), "battery 8"), + "Failed default print"); +} + +/* Battery command with repeat and sleep */ +ZTEST_USER(console_cmd_battery, test_battery_repeat_sleep) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "battery 2 400"), + "Failed default print"); + zassert_ok(shell_execute_cmd(get_ec_shell(), "battery 8 200"), + "Failed default print"); +} + +/* Battery command with invalid repeat and sleep */ +ZTEST_USER(console_cmd_battery, test_battery_bad_repeat_sleep) +{ + int rv = shell_execute_cmd(get_ec_shell(), "battery fish 400"); + + zassert_equal(rv, EC_ERROR_INVAL, "Expected %d, but got %d", + EC_ERROR_INVAL, rv); + + rv = shell_execute_cmd(get_ec_shell(), "battery 2 fish"); + + zassert_equal(rv, EC_ERROR_INVAL, "Expected %d, but got %d", + EC_ERROR_INVAL, rv); +} + +ZTEST_SUITE(console_cmd_battery, drivers_predicate_post_main, + console_cmd_battery_setup, NULL, console_cmd_battery_after, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/button.c b/zephyr/test/drivers/default/src/console_cmd/button.c new file mode 100644 index 0000000000..9272b2ce2d --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/button.c @@ -0,0 +1,67 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(console_cmd_button, test_button_no_arg) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "button"); + + zassert_equal(EC_ERROR_PARAM_COUNT, rv, "Expected %d, returned %d", + EC_ERROR_PARAM_COUNT, rv); +} + +ZTEST_USER(console_cmd_button, test_button_vup) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "button vup a"); + + zassert_equal(EC_ERROR_PARAM2, rv, "Expected %d, returned %d", + EC_ERROR_PARAM2, rv); + + rv = shell_execute_cmd(get_ec_shell(), "button vup 50"); + + zassert_ok(rv, "Expected %d, returned %d", EC_SUCCESS, rv); +} + +ZTEST_USER(console_cmd_button, test_button_vdown) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "button vdown a"); + + zassert_equal(EC_ERROR_PARAM2, rv, "Expected %d, returned %d", + EC_ERROR_PARAM2, rv); + + rv = shell_execute_cmd(get_ec_shell(), "button vdown 50"); + + zassert_ok(rv, "Expected %d, returned %d", EC_SUCCESS, rv); +} + +ZTEST_USER(console_cmd_button, test_button_rec) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "button rec 50"); + + if (IS_ENABLED(CONFIG_DEDICATED_RECOVERY_BUTTON)) { + zassert_ok(rv, "Expected %d, returned %d", EC_SUCCESS, rv); + } else { + /* Recovery button does not exist */ + zassert_equal(EC_ERROR_PARAM1, rv, "Expected %d, returned %d", + EC_ERROR_PARAM1, rv); + } +} + +ZTEST_SUITE(console_cmd_button, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/cbi.c b/zephyr/test/drivers/default/src/console_cmd/cbi.c new file mode 100644 index 0000000000..495ffd7e4c --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/cbi.c @@ -0,0 +1,81 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "test/drivers/test_state.h" + +static void set_wp(bool value) +{ + const struct gpio_dt_spec *wp = GPIO_DT_FROM_NODELABEL(gpio_wp_l); + + gpio_pin_set_dt(wp, value); +} + +static void before(void *unused) +{ + /* Ensure eeprom is ready */ + set_wp(false); + zassert_ok(shell_execute_cmd(get_ec_shell(), "cbi remove 42 init"), + NULL); +} + +static void after(void *unused) +{ + /* re-enable WP */ + set_wp(true); +} + +ZTEST_SUITE(console_cmd_cbi, drivers_predicate_post_main, NULL, before, after, + NULL); + +ZTEST_USER(console_cmd_cbi, test_base) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "cbi"), NULL); +} + +ZTEST_USER(console_cmd_cbi, test_wp) +{ + set_wp(true); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi remove 42"), NULL); +} + +ZTEST_USER(console_cmd_cbi, test_remove) +{ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi remove"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "cbi remove 42"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi remove abc"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi remove 42 1"), NULL); +} + +ZTEST_USER(console_cmd_cbi, test_set) +{ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi set"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi set 10"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi set 11 1"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "cbi set 12 1 4"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi set 13 1 4 4"), + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi set 14 1 10"), NULL); +} + +ZTEST_USER(console_cmd_cbi, test_extra) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), + "cbi remove 42 skip_write"), + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "cbi remove 42 init"), + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), + "cbi remove 42 init skip_write"), + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), + "cbi remove 42 skip_write init"), + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "cbi remove 42 extra"), + NULL); +} diff --git a/zephyr/test/drivers/src/console_cmd/charge_manager.c b/zephyr/test/drivers/default/src/console_cmd/charge_manager.c index c6e4821623..f6ee049ea1 100644 --- a/zephyr/test/drivers/src/console_cmd/charge_manager.c +++ b/zephyr/test/drivers/default/src/console_cmd/charge_manager.c @@ -1,44 +1,20 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "charge_manager.h" #include "console.h" #include "emul/emul_isl923x.h" +#include "emul/tcpc/emul_tcpci.h" #include "emul/tcpc/emul_tcpci_partner_snk.h" #include "tcpm/tcpci.h" #include "test/drivers/test_state.h" #include "test/drivers/utils.h" -static void connect_sink_to_port(const struct emul *charger_emul, - const struct emul *tcpci_emul, - struct tcpci_partner_data *partner) -{ - isl923x_emul_set_adc_vbus(charger_emul, 0); - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_VBUS_DET); - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_EXT_STATUS, - TCPC_REG_EXT_STATUS_SAFE0V); - tcpci_tcpc_alert(0); - zassume_ok(tcpci_partner_connect_to_tcpci(partner, tcpci_emul), - NULL); - - /* Wait for PD negotiation and current ramp. - * TODO(b/213906889): Check message timing and contents. - */ - k_sleep(K_SECONDS(10)); -} - -static inline void disconnect_sink_from_port(const struct emul *tcpci_emul) -{ - zassume_ok(tcpci_emul_disconnect_partner(tcpci_emul), NULL); - k_sleep(K_SECONDS(1)); -} - struct console_cmd_charge_manager_fixture { struct tcpci_partner_data sink_5v_3a; struct tcpci_snk_emul_data sink_ext; @@ -51,17 +27,13 @@ static void *console_cmd_charge_manager_setup(void) static struct console_cmd_charge_manager_fixture test_fixture; /* Get references for the emulators */ - test_fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - test_fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); - tcpci_emul_set_rev(test_fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); /* Initialized the sink to request 5V and 3A */ tcpci_partner_init(&test_fixture.sink_5v_3a, PD_REV20); - test_fixture.sink_5v_3a.extensions = - tcpci_snk_emul_init(&test_fixture.sink_ext, - &test_fixture.sink_5v_3a, NULL); + test_fixture.sink_5v_3a.extensions = tcpci_snk_emul_init( + &test_fixture.sink_ext, &test_fixture.sink_5v_3a, NULL); test_fixture.sink_ext.pdo[1] = PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); @@ -129,8 +101,8 @@ ZTEST_USER_F(console_cmd_charge_manager, test_chgoverride_0_from_sink) /* TODO(b/214401892): Check why need to give time TCPM to spin */ k_sleep(K_SECONDS(1)); - connect_sink_to_port(this->charger_emul, this->tcpci_emul, - &this->sink_5v_3a); + connect_sink_to_port(&fixture->sink_5v_3a, fixture->tcpci_emul, + fixture->charger_emul); zassert_equal(shell_execute_cmd(get_ec_shell(), "chgoverride 0"), EC_ERROR_INVAL, NULL); } diff --git a/zephyr/test/drivers/src/console_cmd/charge_state.c b/zephyr/test/drivers/default/src/console_cmd/charge_state.c index 25c03928d4..d5dc9fe415 100644 --- a/zephyr/test/drivers/src/console_cmd/charge_state.c +++ b/zephyr/test/drivers/default/src/console_cmd/charge_state.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "charge_state.h" #include "charge_state_v2.h" @@ -173,16 +173,13 @@ static void *console_cmd_charge_state_setup(void) static struct console_cmd_charge_state_fixture fixture; /* Get references for the emulators */ - fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); + fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); /* Initialized the source to supply 5V and 3A */ tcpci_partner_init(&fixture.source_5v_3a, PD_REV20); - fixture.source_5v_3a.extensions = - tcpci_src_emul_init(&fixture.source_ext, - &fixture.source_5v_3a, NULL); + fixture.source_5v_3a.extensions = tcpci_src_emul_init( + &fixture.source_ext, &fixture.source_5v_3a, NULL); fixture.source_ext.pdo[1] = PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); @@ -205,8 +202,8 @@ ZTEST_SUITE(console_cmd_charge_state, drivers_predicate_post_main, ZTEST_USER_F(console_cmd_charge_state, test_idle_on_from_normal) { /* Connect a source so we start charging */ - connect_source_to_port(&this->source_5v_3a, &this->source_ext, 1, - this->tcpci_emul, this->charger_emul); + connect_source_to_port(&fixture->source_5v_3a, &fixture->source_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); /* Verify that we're in "normal" mode */ zassume_equal(get_chg_ctrl_mode(), CHARGE_CONTROL_NORMAL, NULL); @@ -219,8 +216,8 @@ ZTEST_USER_F(console_cmd_charge_state, test_idle_on_from_normal) ZTEST_USER_F(console_cmd_charge_state, test_normal_from_idle) { /* Connect a source so we start charging */ - connect_source_to_port(&this->source_5v_3a, &this->source_ext, 1, - this->tcpci_emul, this->charger_emul); + connect_source_to_port(&fixture->source_5v_3a, &fixture->source_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); /* Verify that we're in "normal" mode */ zassume_equal(get_chg_ctrl_mode(), CHARGE_CONTROL_NORMAL, NULL); @@ -238,8 +235,8 @@ ZTEST_USER_F(console_cmd_charge_state, test_normal_from_idle) ZTEST_USER_F(console_cmd_charge_state, test_discharge_on) { /* Connect a source so we start charging */ - connect_source_to_port(&this->source_5v_3a, &this->source_ext, 1, - this->tcpci_emul, this->charger_emul); + connect_source_to_port(&fixture->source_5v_3a, &fixture->source_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); /* Verify that we're in "normal" mode */ zassume_equal(get_chg_ctrl_mode(), CHARGE_CONTROL_NORMAL, NULL); @@ -253,8 +250,8 @@ ZTEST_USER_F(console_cmd_charge_state, test_discharge_on) ZTEST_USER_F(console_cmd_charge_state, test_discharge_off) { /* Connect a source so we start charging */ - connect_source_to_port(&this->source_5v_3a, &this->source_ext, 1, - this->tcpci_emul, this->charger_emul); + connect_source_to_port(&fixture->source_5v_3a, &fixture->source_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); /* Verify that we're in "normal" mode */ zassume_equal(get_chg_ctrl_mode(), CHARGE_CONTROL_NORMAL, NULL); @@ -278,7 +275,8 @@ ZTEST_USER(console_cmd_charge_state, test_sustain) zassert_ok(shell_execute_cmd(get_ec_shell(), "chgstate sustain 30 50"), NULL); - charge_control_values = host_cmd_get_charge_control(); + charge_control_values = host_cmd_charge_control( + CHARGE_CONTROL_NORMAL, EC_CHARGE_CONTROL_CMD_GET); zassert_equal(charge_control_values.sustain_soc.lower, 30, NULL); zassert_equal(charge_control_values.sustain_soc.upper, 50, NULL); } diff --git a/zephyr/test/drivers/default/src/console_cmd/charger.c b/zephyr/test/drivers/default/src/console_cmd/charger.c new file mode 100644 index 0000000000..9adda29a8d --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/charger.c @@ -0,0 +1,184 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "dptf.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +/* Tests which need no fixture */ +ZTEST_USER(console_cmd_charger, test_default_dump) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "charger"), + "Failed default print"); +} + +ZTEST_USER(console_cmd_charger, test_good_index) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "charger 0"), + "Failed index 0 print"); +} + +/* Bad parameter tests */ +ZTEST_USER(console_cmd_charger, test_bad_index) +{ + int rv = shell_execute_cmd(get_ec_shell(), "charger 55"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_charger, test_bad_command) +{ + int rv = shell_execute_cmd(get_ec_shell(), "charger fish"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_charger, test_bad_input_current) +{ + int rv = shell_execute_cmd(get_ec_shell(), "charger input fish"); + + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_charger, test_bad_current) +{ + int rv = shell_execute_cmd(get_ec_shell(), "charger current fish"); + + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_charger, test_bad_voltage) +{ + int rv = shell_execute_cmd(get_ec_shell(), "charger voltage fish"); + + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_charger, test_bad_dptf_current) +{ + int rv = shell_execute_cmd(get_ec_shell(), "charger dptf fish"); + + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +/* Good parameter sub-command tests */ +ZTEST_USER(console_cmd_charger, test_good_input_current) +{ + int input_current; + + zassert_ok(shell_execute_cmd(get_ec_shell(), "charger input 1000"), + "Failed to set input current"); + zassume_ok(charger_get_input_current_limit(0, &input_current), + "Failed to get input current"); + zassert_equal(input_current, 1000, + "Input current not set in charger: %d", input_current); +} + +ZTEST_USER(console_cmd_charger, test_good_dptf) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "charger dptf 1000"), + "Failed to set dptf current"); + zassert_equal(dptf_get_charging_current_limit(), 1000, + "Unexpected dptf current"); +} + +ZTEST_USER(console_cmd_charger, test_unsupported_dump) +{ + /* Must define CONFIG_CMD_CHARGER_DUMP for this sub-command */ + int rv = shell_execute_cmd(get_ec_shell(), "charger dump"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +/* Fixture needed to supply AC for manual current/voltage set */ +struct console_cmd_charger_fixture { + struct tcpci_partner_data source_5v_3a; + struct tcpci_src_emul_data source_ext; + const struct emul *tcpci_emul; + const struct emul *charger_emul; +}; + +static void *console_cmd_charger_setup(void) +{ + static struct console_cmd_charger_fixture fixture; + + /* Assume we have one charger at index 0 */ + zassume_true(board_get_charger_chip_count() > 0, + "Insufficient chargers found"); + + /* Get references for the emulators */ + fixture.tcpci_emul = EMUL_DT_GET(DT_NODELABEL(tcpci_emul)); + fixture.charger_emul = EMUL_DT_GET(DT_NODELABEL(isl923x_emul)); + + /* Initialized the source to supply 5V and 3A */ + tcpci_partner_init(&fixture.source_5v_3a, PD_REV20); + fixture.source_5v_3a.extensions = tcpci_src_emul_init( + &fixture.source_ext, &fixture.source_5v_3a, NULL); + fixture.source_ext.pdo[1] = + PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); + + return &fixture; +} + +static void console_cmd_charger_after(void *data) +{ + struct console_cmd_charger_fixture *fixture = data; + + /* Disconnect the source, and ensure we reset charge params */ + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); + host_cmd_charge_control(CHARGE_CONTROL_NORMAL, + EC_CHARGE_CONTROL_CMD_SET); +} + +/* Tests that need the fixture */ +ZTEST_USER_F(console_cmd_charger, test_good_current) +{ + int current; + + /* Connect a source so we start charging */ + connect_source_to_port(&fixture->source_5v_3a, &fixture->source_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); + zassert_ok(shell_execute_cmd(get_ec_shell(), "charger current 1000"), + "Failed to set current"); + + /* Give the charger task time to pick up the manual current */ + k_sleep(K_SECONDS(1)); + + zassume_ok(charger_get_current(0, ¤t), "Failed to get current"); + zassert_equal(current, 1000, "Current not set in charger: %d", current); +} + +ZTEST_USER_F(console_cmd_charger, test_good_voltage) +{ + int voltage; + + /* Connect a source so we start charging */ + connect_source_to_port(&fixture->source_5v_3a, &fixture->source_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); + /* Note: select a fake voltage larger than the charger's minimum */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "charger voltage 3000"), + "Failed to set voltage"); + + /* Give the charger task time to pick up the manual voltage */ + k_sleep(K_SECONDS(1)); + + zassume_ok(charger_get_voltage(0, &voltage), "Failed to get voltage"); + zassert_equal(voltage, 3000, "Voltage not set in charger: %d", voltage); +} + +ZTEST_SUITE(console_cmd_charger, drivers_predicate_post_main, + console_cmd_charger_setup, NULL, console_cmd_charger_after, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/crash.c b/zephyr/test/drivers/default/src/console_cmd/crash.c new file mode 100644 index 0000000000..bc0b5d0254 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/crash.c @@ -0,0 +1,34 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "builtin/assert.h" +#include "console.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(console_cmd_crash, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); + +ZTEST_USER(console_cmd_crash, test_wrong_num_args) +{ + int rv = shell_execute_cmd(get_ec_shell(), "crash"); + + zassert_equal(EC_ERROR_PARAM1, rv, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_crash, test_assert) +{ + int rv; + + RESET_FAKE(assert_post_action); + rv = shell_execute_cmd(get_ec_shell(), "crash assert"); + + zassert_equal(EC_ERROR_UNKNOWN, rv, NULL); + zassert_equal(1, assert_post_action_fake.call_count, NULL); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/cutoff.c b/zephyr/test/drivers/default/src/console_cmd/cutoff.c new file mode 100644 index 0000000000..00ce40660f --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/cutoff.c @@ -0,0 +1,86 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "battery.h" +#include "console.h" +#include "ec_commands.h" +#include "hooks.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +static void console_cmd_cutoff_after(void *unused) +{ + ARG_UNUSED(unused); + set_ac_enabled(true); + hook_notify(HOOK_AC_CHANGE); + k_msleep(500); +} + +ZTEST_SUITE(console_cmd_cutoff, drivers_predicate_post_main, NULL, NULL, + console_cmd_cutoff_after, NULL); + +ZTEST_USER(console_cmd_cutoff, test_sb_cutoff) +{ + int rv = shell_execute_cmd(get_ec_shell(), "cutoff"); + + zassert_equal(EC_RES_SUCCESS, rv, "Expected %d, but got %d", + EC_RES_SUCCESS, rv); + zassert_true(battery_is_cut_off(), NULL); +} + +ZTEST_USER(console_cmd_cutoff, test_invalid_arg1) +{ + int rv = shell_execute_cmd(get_ec_shell(), "cutoff bad_arg"); + + zassert_equal(EC_ERROR_INVAL, rv, "Expected %d, but got %d", + EC_ERROR_INVAL, rv); + zassert_false(battery_is_cut_off(), NULL); +} + +ZTEST_USER(console_cmd_cutoff, test_at_shutdown) +{ + int rv = shell_execute_cmd(get_ec_shell(), "cutoff at-shutdown"); + + zassert_equal(EC_RES_SUCCESS, rv, "Expected %d, but got %d", + EC_RES_SUCCESS, rv); + zassert_false(battery_is_cut_off(), NULL); + hook_notify(HOOK_CHIPSET_SHUTDOWN); + zassert_true(WAIT_FOR(battery_is_cut_off(), 1500000, k_msleep(250)), + NULL); +} + +ZTEST_USER(console_cmd_cutoff, test_clear_pending_shutdown) +{ + int rv = shell_execute_cmd(get_ec_shell(), "cutoff at-shutdown"); + + zassume_true(extpower_is_present(), NULL); + zassert_equal(EC_RES_SUCCESS, rv, "Expected %d, but got %d", + EC_RES_SUCCESS, rv); + + /* Triggering the AC_CHANGE hook will cancel the pending cutoff */ + hook_notify(HOOK_AC_CHANGE); + + /* The shutdown will no longer cutoff the battery */ + hook_notify(HOOK_CHIPSET_SHUTDOWN); + zassert_false(WAIT_FOR(battery_is_cut_off(), 1500000, k_msleep(250)), + NULL); +} + +ZTEST_USER(console_cmd_cutoff, test_ac_change_exits_cutoff) +{ + int rv; + + set_ac_enabled(false); + + rv = shell_execute_cmd(get_ec_shell(), "cutoff"); + zassert_equal(EC_RES_SUCCESS, rv, "Expected %d, but got %d", + EC_RES_SUCCESS, rv); + + set_ac_enabled(true); + zassert_false(battery_is_cut_off(), NULL); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/gpio.c b/zephyr/test/drivers/default/src/console_cmd/gpio.c new file mode 100644 index 0000000000..164f272e27 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/gpio.c @@ -0,0 +1,37 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(console_cmd_gpio, test_read_invoke_success) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "gpioget test"), NULL); +} + +ZTEST_USER(console_cmd_gpio, test_read_invoke_fail) +{ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "gpioget DOES_NOT_EXIST"), + NULL); +} + +ZTEST_USER(console_cmd_gpio, test_set_gpio) +{ + const struct gpio_dt_spec *gp = GPIO_DT_FROM_NODELABEL(gpio_test); + + zassert_ok(gpio_pin_set_dt(gp, 0), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "gpioset test 1"), NULL); + zassert_equal(gpio_pin_get_dt(gp), 1, NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "gpioset test 0"), NULL); + zassert_equal(gpio_pin_get_dt(gp), 0, NULL); +} + +ZTEST_SUITE(console_cmd_gpio, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/hcdebug.c b/zephyr/test/drivers/default/src/console_cmd/hcdebug.c new file mode 100644 index 0000000000..71adb02690 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/hcdebug.c @@ -0,0 +1,49 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" + +static void console_cmd_hcdebug_after(void *fixture) +{ + ARG_UNUSED(fixture); + shell_execute_cmd(get_ec_shell(), "hcdebug off"); +} + +ZTEST_SUITE(console_cmd_hcdebug, drivers_predicate_post_main, NULL, NULL, + console_cmd_hcdebug_after, NULL); + +ZTEST_USER(console_cmd_hcdebug, test_too_many_args) +{ + int rv = shell_execute_cmd(get_ec_shell(), "hcdebug arg1 arg2"); + + zassert_not_equal(rv, EC_SUCCESS, "Expected %d, but got %d", + EC_ERROR_PARAM_COUNT, rv); +} + +ZTEST_USER(console_cmd_hcdebug, test_no_args) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "hcdebug"), NULL); +} + +ZTEST_USER(console_cmd_hcdebug, test_invalid_arg) +{ + int rv = shell_execute_cmd(get_ec_shell(), "hcdebug bar"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_hcdebug, test_valid_args) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "hcdebug off"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "hcdebug normal"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "hcdebug every"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "hcdebug params"), NULL); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/hibdelay.c b/zephyr/test/drivers/default/src/console_cmd/hibdelay.c new file mode 100644 index 0000000000..c72a2bf66a --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/hibdelay.c @@ -0,0 +1,37 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(console_cmd_hibdelay, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); + +ZTEST_USER(console_cmd_hibdelay, test_too_many_args) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "hibdelay 1 2"), NULL); +} + +ZTEST_USER(console_cmd_hibdelay, test_no_args) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "hibdelay"), NULL); +} + +ZTEST_USER(console_cmd_hibdelay, test_invalid_arg) +{ + int rv = shell_execute_cmd(get_ec_shell(), "hibdelay 3.4"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_USER(console_cmd_hibdelay, test_valid_args) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "hibdelay 5"), NULL); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/hostevent.c b/zephyr/test/drivers/default/src/console_cmd/hostevent.c new file mode 100644 index 0000000000..af9b37edd1 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/hostevent.c @@ -0,0 +1,193 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "include/lpc.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#ifdef CONFIG_HOST_EVENT64 +#define HOSTEVENT_PRINT_FORMAT "016" PRIx64 +#else +#define HOSTEVENT_PRINT_FORMAT "08" PRIx32 +#endif + +struct console_cmd_hostevent_fixture { + struct host_events_ctx ctx; +}; + +static void *console_cmd_hostevent_setup(void) +{ + static struct console_cmd_hostevent_fixture fixture = { 0 }; + + return &fixture; +} + +static void console_cmd_hostevent_before(void *fixture) +{ + struct console_cmd_hostevent_fixture *f = fixture; + + host_events_save(&f->ctx); +} + +static void console_cmd_hostevent_after(void *fixture) +{ + struct console_cmd_hostevent_fixture *f = fixture; + + host_events_restore(&f->ctx); +} + +static int console_cmd_hostevent(const char *subcommand, host_event_t mask) +{ + int rv; + char cmd_buf[CONFIG_SHELL_CMD_BUFF_SIZE]; + + rv = snprintf(cmd_buf, CONFIG_SHELL_CMD_BUFF_SIZE, + "hostevent %s 0x%" HOSTEVENT_PRINT_FORMAT, subcommand, + mask); + + zassume_between_inclusive(rv, 0, CONFIG_SHELL_CMD_BUFF_SIZE, + "hostevent console command too long"); + + return shell_execute_cmd(get_ec_shell(), cmd_buf); +} + +/* hostevent with no arguments */ +ZTEST_USER(console_cmd_hostevent, test_hostevent) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "hostevent"), + "Failed default print"); +} + +/* hostevent with invalid arguments */ +ZTEST_USER(console_cmd_hostevent, test_hostevent_invalid) +{ + int rv; + host_event_t mask = 0; + + /* Test invalid sub-command */ + rv = console_cmd_hostevent("invalid", mask); + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); + + /* Test invalid mask */ + rv = shell_execute_cmd(get_ec_shell(), "hostevent set invalid-mask"); + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM2, rv); +} + +/* hostevent with sub-commands and verification */ +ZTEST_USER(console_cmd_hostevent, test_hostevent_sub_commands) +{ + int rv; + enum ec_status ret_val; + host_event_t event_mask; + host_event_t all_events = 0; + host_event_t set_events; + struct ec_response_host_event result = { 0 }; + struct { + enum lpc_host_event_type type; + const char *name; + host_event_t mask; + } subcommand[] = { + { + .type = LPC_HOST_EVENT_SMI, + .name = "SMI", + .mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED), + }, + { + .type = LPC_HOST_EVENT_SCI, + .name = "SCI", + .mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN), + }, + { + .type = LPC_HOST_EVENT_WAKE, + .name = "WAKE", + .mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON), + }, + { + .type = LPC_HOST_EVENT_ALWAYS_REPORT, + .name = "ALWAYS_REPORT", + .mask = EC_HOST_EVENT_MASK( + EC_HOST_EVENT_AC_DISCONNECTED), + }, + }; + + for (int i = 0; i < ARRAY_SIZE(subcommand); i++) { + event_mask = lpc_get_host_event_mask(subcommand[i].type); + zassert_false(event_mask & subcommand[i].mask, + "%s mask is set before test started", + subcommand[i].name); + /* + * Setting mask value overwrites existing setting, so OR in + * the test bit. + */ + event_mask |= subcommand[i].mask; + rv = console_cmd_hostevent(subcommand[i].name, event_mask); + zassert_ok(rv, "Subcommand %s failed", subcommand[i].name); + zassert_true(lpc_get_host_event_mask(subcommand[i].type) & + subcommand[i].mask, + "Failed to set %s event mask", subcommand[i].name); + + /* + * It is only valid to set host events, once at least one mask + * value includes the event. Setting host events preserves + * existing events. + */ + zassert_false(host_get_events() & subcommand[i].mask, + "Host event is set before test started"); + rv = console_cmd_hostevent("set", subcommand[i].mask); + zassert_ok(rv, "Subcommand SET failed"); + + all_events |= subcommand[i].mask; + } + + /* Verify all host events were set, and none were lost */ + zassert_true((host_get_events() & all_events) == all_events, + "Failed to set host events"); + + /* Test clearing of host events */ + set_events = all_events; + for (int i = 0; i < ARRAY_SIZE(subcommand); i++) { + set_events &= ~subcommand[i].mask; + rv = console_cmd_hostevent("clear", subcommand[i].mask); + zassert_ok(rv, "Subcommand CLEAR failed"); + + zassert_true((host_get_events() & set_events) == set_events, + "Failed to clear host event"); + } + + /* Verify the backup host events were set, and none were cleared */ + ret_val = host_cmd_host_event(EC_HOST_EVENT_GET, EC_HOST_EVENT_B, + &result); + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected=%d, returned=%d", + EC_RES_SUCCESS, ret_val); + zassert_true((result.value & all_events) == all_events, + "Failed to set host events backup"); + + /* Test clearing of backup host events */ + set_events = all_events; + for (int i = 0; i < ARRAY_SIZE(subcommand); i++) { + set_events &= ~subcommand[i].mask; + rv = console_cmd_hostevent("clearb", subcommand[i].mask); + zassert_ok(rv, "Subcommand CLEAR failed"); + + ret_val = host_cmd_host_event(EC_HOST_EVENT_GET, + EC_HOST_EVENT_B, &result); + zassert_equal(ret_val, EC_RES_SUCCESS, + "Expected=%d, returned=%d", EC_RES_SUCCESS, + ret_val); + zassert_true((result.value & set_events) == set_events, + "Failed to clear host events backup"); + } +} + +ZTEST_SUITE(console_cmd_hostevent, drivers_predicate_post_main, + console_cmd_hostevent_setup, console_cmd_hostevent_before, + console_cmd_hostevent_after, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/i2c_portmap.c b/zephyr/test/drivers/default/src/console_cmd/i2c_portmap.c new file mode 100644 index 0000000000..4b2ec548a2 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/i2c_portmap.c @@ -0,0 +1,27 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(console_cmd_i2c_portmap, drivers_predicate_post_main, NULL, NULL, + NULL, NULL); + +ZTEST_USER(console_cmd_i2c_portmap, test_too_many_args) +{ + int rv = shell_execute_cmd(get_ec_shell(), "i2c_portmap arg1"); + + zassert_equal(rv, EC_ERROR_PARAM_COUNT, "Expected %d, but got %d", + EC_ERROR_PARAM_COUNT, rv); +} + +ZTEST_USER(console_cmd_i2c_portmap, test_get_i2c_portmap) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "i2c_portmap"), NULL); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/md.c b/zephyr/test/drivers/default/src/console_cmd/md.c new file mode 100644 index 0000000000..c8c3e2c130 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/md.c @@ -0,0 +1,83 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(console_cmd_md, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); + +ZTEST_USER(console_cmd_md, test_too_few_args) +{ + zassert_equal(EC_ERROR_PARAM_COUNT, + shell_execute_cmd(get_ec_shell(), "md"), NULL); +} + +ZTEST_USER(console_cmd_md, test_error_param1) +{ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "md .j"), NULL); +} + +ZTEST_USER(console_cmd_md, test_error_bad_address) +{ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "md not_an_address"), + NULL); +} + +ZTEST_USER(console_cmd_md, test_default_count) +{ + uint8_t memory[] = { 0x01, 0x02, 0x03, 0x04 }; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "md %" PRIuPTR, (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); +} + +ZTEST_USER(console_cmd_md, test_count_arg) +{ + uint8_t memory[] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08 }; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "md %" PRIuPTR " 2", (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); +} + +ZTEST_USER(console_cmd_md, test_byte_format) +{ + uint8_t memory[] = { 0x01, 0x02, 0x03, 0x04 }; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "md .b %" PRIuPTR, (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); +} + +ZTEST_USER(console_cmd_md, test_half_format) +{ + uint8_t memory[] = { 0x01, 0x02, 0x03, 0x04 }; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "md .h %" PRIuPTR, (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); +} + +ZTEST_USER(console_cmd_md, test_string_format) +{ + char memory[] = "hello world"; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "md .s %" PRIuPTR " 12", (uintptr_t)memory) != + 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/panic_output.c b/zephyr/test/drivers/default/src/console_cmd/panic_output.c new file mode 100644 index 0000000000..7cc809e835 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/panic_output.c @@ -0,0 +1,71 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "panic.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +/* Test panicinfo when a panic hasn't occurred */ +ZTEST_USER(console_cmd_panic_output, test_panicinfo) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "panicinfo"), + "Failed default print"); +} + +/* Test panicinfo when a panic hasn't occurred with an extra arg. */ +/* Should return successfully. */ +ZTEST_USER(console_cmd_panic_output, test_panicinfo_bad_arg) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "panicinfo fish"), + "Failed default print with a bad argument"); +} + +/* Fixture needed to save panic data state */ +struct console_cmd_panic_output_fixture { + struct panic_data *p_data; + struct panic_data cpy_data; +}; + +static void *console_cmd_panic_setup(void) +{ + static struct console_cmd_panic_output_fixture fixture; + + return &fixture; +} + +static void console_cmd_panic_before(void *data) +{ + struct console_cmd_panic_output_fixture *fixture = data; + + fixture->p_data = get_panic_data_write(); + fixture->cpy_data = *fixture->p_data; +} + +static void console_cmd_panic_after(void *data) +{ + struct console_cmd_panic_output_fixture *fixture = data; + + struct panic_data *p_data = fixture->p_data; + + *p_data = fixture->cpy_data; +} + +/* Tests that need the fixture */ +ZTEST_USER_F(console_cmd_panic_output, test_panicinfo_with_panic) +{ + fixture->p_data->flags = 0x1; + fixture->p_data->struct_size = CONFIG_PANIC_DATA_SIZE; + fixture->p_data->magic = PANIC_DATA_MAGIC; + zassert_ok(shell_execute_cmd(get_ec_shell(), "panicinfo"), + "Failed to print details about panic."); +} + +ZTEST_SUITE(console_cmd_panic_output, NULL, console_cmd_panic_setup, + console_cmd_panic_before, console_cmd_panic_after, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/port80.c b/zephyr/test/drivers/default/src/console_cmd/port80.c new file mode 100644 index 0000000000..792895eb27 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/port80.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * @brief Unit Tests for ESPI port 80 console command + */ + +#include <zephyr/logging/log.h> +#include <zephyr/shell/shell.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "port80.h" + +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +/** + * @brief TestPurpose: Verify port 80 console commands + * + * @details + * Validate that the port 80 console commands work. + * + * Expected Results + * - The port 80 console commands return the appropriate result + */ +ZTEST(port80, test_port80_console) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "port80"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "port80 flush"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "port80 scroll"), NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), "port80 intprint"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "port80 unknown_param"), + NULL); +} + +/** + * @brief Test Suite: Verifies port 80 console commands. + */ +ZTEST_SUITE(console_cmd_port80, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/power_button.c b/zephyr/test/drivers/default/src/console_cmd/power_button.c new file mode 100644 index 0000000000..92d0aeaf78 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/power_button.c @@ -0,0 +1,34 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> +#include <console.h> + +ZTEST_SUITE(console_cmd_power_button, NULL, NULL, NULL, NULL, NULL); + +ZTEST_USER(console_cmd_power_button, test_return_ok) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "powerbtn"), NULL); +} + +ZTEST_USER(console_cmd_power_button, test_negative_delay) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "powerbtn -1"); + + zassert_not_equal(rv, EC_SUCCESS, + "Command should error on negative delay"); +} + +ZTEST_USER(console_cmd_power_button, test_invalid_arg) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "powerbtn foo"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/powerindebug.c b/zephyr/test/drivers/default/src/console_cmd/powerindebug.c new file mode 100644 index 0000000000..9f52a9b569 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/powerindebug.c @@ -0,0 +1,36 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(console_cmd_powerindebug, test_no_params) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "powerindebug"), + "Failed to get debug mask"); +} + +ZTEST_USER(console_cmd_powerindebug, test_good_params) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "powerindebug 0x10"), + "Failed to set debug mask"); + zassert_ok(shell_execute_cmd(get_ec_shell(), "powerindebug 0"), + "Failed to set debug mask"); +} + +ZTEST_USER(console_cmd_powerindebug, test_bad_params) +{ + int rv = shell_execute_cmd(get_ec_shell(), "powerindebug fish"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_SUITE(console_cmd_powerindebug, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/rtc.c b/zephyr/test/drivers/default/src/console_cmd/rtc.c new file mode 100644 index 0000000000..80530129af --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/rtc.c @@ -0,0 +1,73 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "system.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(console_cmd_rtc, test_rtc_no_arg) +{ + char expected_buffer[32]; + uint32_t sec = 7; + + snprintf(expected_buffer, sizeof(expected_buffer), + "RTC: 0x%08x (%d.00 s)", sec, sec); + + system_set_rtc(sec); + + CHECK_CONSOLE_CMD("rtc", expected_buffer, EC_SUCCESS); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_invalid) +{ + CHECK_CONSOLE_CMD("rtc set", NULL, EC_ERROR_INVAL); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_set) +{ + char command[32]; + char expected_buffer[32]; + uint32_t sec = 48879; + + snprintf(expected_buffer, sizeof(expected_buffer), + "RTC: 0x%08x (%d.00 s)", sec, sec); + snprintf(command, sizeof(command), "rtc set %d", sec); + + CHECK_CONSOLE_CMD(command, expected_buffer, EC_SUCCESS); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_set_bad) +{ + CHECK_CONSOLE_CMD("rtc set t", NULL, EC_ERROR_PARAM2); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_alarm_no_args) +{ + CHECK_CONSOLE_CMD("rtc_alarm", "Setting RTC alarm", EC_SUCCESS); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_alarm_good_args) +{ + CHECK_CONSOLE_CMD("rtc_alarm 1", "Setting RTC alarm", EC_SUCCESS); + CHECK_CONSOLE_CMD("rtc_alarm 1 5", "Setting RTC alarm", EC_SUCCESS); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_alarm_bad_args) +{ + CHECK_CONSOLE_CMD("rtc_alarm t", NULL, EC_ERROR_PARAM1); + CHECK_CONSOLE_CMD("rtc_alarm 1 t", NULL, EC_ERROR_PARAM2); +} + +ZTEST_USER(console_cmd_rtc, test_rtc_alarm_reset) +{ + CHECK_CONSOLE_CMD("rtc_alarm 0", "Setting RTC alarm", EC_SUCCESS); + CHECK_CONSOLE_CMD("rtc_alarm 0 0", "Setting RTC alarm", EC_SUCCESS); +} + +ZTEST_SUITE(console_cmd_rtc, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/rw.c b/zephyr/test/drivers/default/src/console_cmd/rw.c new file mode 100644 index 0000000000..2bf59b30d5 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/rw.c @@ -0,0 +1,98 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(console_cmd_rw, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); + +ZTEST_USER(console_cmd_rw, test_too_few_args) +{ + zassert_equal(EC_ERROR_PARAM_COUNT, + shell_execute_cmd(get_ec_shell(), "rw"), NULL); +} + +ZTEST_USER(console_cmd_rw, test_error_param1) +{ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "rw .j"), NULL); +} + +ZTEST_USER(console_cmd_rw, test_error_bad_address) +{ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "rw not_an_address"), + NULL); + zassert_equal(EC_ERROR_PARAM2, + shell_execute_cmd(get_ec_shell(), "rw .b not_an_address"), + NULL); +} + +ZTEST_USER(console_cmd_rw, test_read) +{ + uint8_t memory[] = { 0x01, 0x02, 0x03, 0x04 }; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "rw .b %" PRIuPTR, (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + + zassume_true(sprintf(cmd, "rw .h %" PRIuPTR, (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + + zassume_true(sprintf(cmd, "rw %" PRIuPTR, (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); +} + +ZTEST_USER(console_cmd_rw, test_write_invalid_value) +{ + zassert_equal(EC_ERROR_PARAM2, + shell_execute_cmd(get_ec_shell(), "rw 0 not-a-value"), + NULL); + zassert_equal(EC_ERROR_PARAM3, + shell_execute_cmd(get_ec_shell(), "rw .b 0 not-a-value"), + NULL); +} + +ZTEST_USER(console_cmd_rw, test_write) +{ + uint8_t memory[4] = { 0 }; + char cmd[128] = { 0 }; + + zassume_true(sprintf(cmd, "rw .b %" PRIuPTR " 1", (uintptr_t)memory) != + 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + zassert_equal(1, memory[0], "memory[0] was %u", memory[0]); + zassert_equal(0, memory[1], "memory[1] was %u", memory[1]); + zassert_equal(0, memory[2], "memory[2] was %u", memory[2]); + zassert_equal(0, memory[3], "memory[3] was %u", memory[3]); + + memset(memory, 0, 4); + zassume_true(sprintf(cmd, "rw .h %" PRIuPTR " 258", + (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + zassert_equal(2, memory[0], "memory[0] was %u", memory[0]); + zassert_equal(1, memory[1], "memory[1] was %u", memory[1]); + zassert_equal(0, memory[2], "memory[2] was %u", memory[2]); + zassert_equal(0, memory[3], "memory[3] was %u", memory[3]); + + memset(memory, 0, 4); + zassume_true(sprintf(cmd, "rw %" PRIuPTR " 16909060", + (uintptr_t)memory) != 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + zassert_equal(4, memory[0], "memory[0] was %u", memory[0]); + zassert_equal(3, memory[1], "memory[1] was %u", memory[1]); + zassert_equal(2, memory[2], "memory[2] was %u", memory[2]); + zassert_equal(1, memory[3], "memory[3] was %u", memory[3]); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/sleepmask.c b/zephyr/test/drivers/default/src/console_cmd/sleepmask.c new file mode 100644 index 0000000000..6ae017dc66 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/sleepmask.c @@ -0,0 +1,100 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/emul.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "system.h" + +ZTEST_USER(console_cmd_sleepmask, test_no_args) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask"), NULL); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0, NULL); + zassert_not_null(strstr(outbuffer, "sleep mask"), NULL); +} + +ZTEST_USER(console_cmd_sleepmask, test_bad_args) +{ + const struct shell *shell_zephyr = get_ec_shell(); + + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_zephyr, "sleepmask whoopsie"), + NULL); +} + +ZTEST_USER(console_cmd_sleepmask, test_set_sleep_mask_directly) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + + /* Set mask as 0 */ + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask 0"), NULL); + shell_backend_dummy_clear_output(shell_zephyr); + + /* Get mask and weakly verify mask is 0 */ + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask"), NULL); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_not_null(strstr(outbuffer, "0"), NULL); + zassert_is_null(strstr(outbuffer, "1"), NULL); + + /* Set mask as 1 */ + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask 1"), NULL); + shell_backend_dummy_clear_output(shell_zephyr); + + /* Get mask and weakly verify mask is 1 */ + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask"), NULL); + zassert_not_null(strstr(outbuffer, "1"), NULL); +} + +ZTEST_USER(console_cmd_sleepmask, test_enable_disable_force_sleepmask) +{ + const struct shell *shell_zephyr = get_ec_shell(); + + /* Verifying enabled to disabled */ + + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask on"), NULL); + + int enabled_bits = sleep_mask & SLEEP_MASK_FORCE_NO_DSLEEP; + + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask off"), NULL); + + int disabled_bits = sleep_mask & SLEEP_MASK_FORCE_NO_DSLEEP; + + zassert_false(enabled_bits & disabled_bits, NULL); + + /* Verifying disabled to enabled */ + + zassert_ok(shell_execute_cmd(shell_zephyr, "sleepmask on"), NULL); + + enabled_bits = sleep_mask & SLEEP_MASK_FORCE_NO_DSLEEP; + zassert_false(enabled_bits & disabled_bits, NULL); +} + +static void console_cmd_sleepmask_before_after(void *test_data) +{ + ARG_UNUSED(test_data); + + enable_sleep(-1); +} + +ZTEST_SUITE(console_cmd_sleepmask, drivers_predicate_post_main, NULL, + console_cmd_sleepmask_before_after, + console_cmd_sleepmask_before_after, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/sleeptimeout.c b/zephyr/test/drivers/default/src/console_cmd/sleeptimeout.c new file mode 100644 index 0000000000..d802eb5948 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/sleeptimeout.c @@ -0,0 +1,44 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(console_cmd_sleeptimeout, test_no_params) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "sleeptimeout"), + "Failed default print"); +} + +ZTEST_USER(console_cmd_sleeptimeout, test_good_params) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "sleeptimeout default"), + "Failed to set default sleep timeout"); + zassert_ok(shell_execute_cmd(get_ec_shell(), "sleeptimeout infinite"), + "Failed to disable sleep timeout"); + zassert_ok(shell_execute_cmd(get_ec_shell(), "sleeptimeout 1500"), + "Failed to set sleep timeout to a custom value"); +} + +ZTEST_USER(console_cmd_sleeptimeout, test_bad_params) +{ + int rv = shell_execute_cmd(get_ec_shell(), "sleeptimeout 0"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); + + rv = shell_execute_cmd(get_ec_shell(), + "sleeptimeout EC_HOST_SLEEP_TIMEOUT_INFINITE"); + + zassert_equal(rv, EC_ERROR_PARAM1, "Expected %d, but got %d", + EC_ERROR_PARAM1, rv); +} + +ZTEST_SUITE(console_cmd_sleeptimeout, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/sysinfo.c b/zephyr/test/drivers/default/src/console_cmd/sysinfo.c new file mode 100644 index 0000000000..3aeef6510c --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/sysinfo.c @@ -0,0 +1,84 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/emul.h> +#include <zephyr/fff.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "system.h" + +ZTEST_USER(console_cmd_sysinfo, test_no_args) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + + zassert_ok(shell_execute_cmd(shell_zephyr, "sysinfo"), NULL); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0, NULL); + + /* Weakly verify some contents */ + zassert_not_null(strstr(outbuffer, "Reset flags:"), NULL); + zassert_not_null(strstr(outbuffer, "Copy:"), NULL); + zassert_not_null(strstr(outbuffer, "Jumped:"), NULL); + zassert_not_null(strstr(outbuffer, "Recovery:"), NULL); + zassert_not_null(strstr(outbuffer, "Flags:"), NULL); +} + +ZTEST_USER(console_cmd_sysinfo, test_no_args__sys_locked) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + /* System unlocked */ + shell_backend_dummy_clear_output(shell_zephyr); + system_is_locked_fake.return_val = false; + + zassert_ok(shell_execute_cmd(shell_zephyr, "sysinfo"), NULL); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0, NULL); + zassert_not_null(strstr(outbuffer, "unlocked"), NULL); + + /* System locked */ + shell_backend_dummy_clear_output(shell_zephyr); + system_is_locked_fake.return_val = true; + + zassert_true(buffer_size > 0, NULL); + zassert_ok(shell_execute_cmd(shell_zephyr, "sysinfo"), NULL); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_not_null(strstr(outbuffer, "locked"), NULL); + + /* Verify system_is_locked in sysinfo cmd response remains */ + shell_backend_dummy_clear_output(shell_zephyr); + system_is_locked_fake.return_val = false; + + zassert_ok(shell_execute_cmd(shell_zephyr, "sysinfo"), NULL); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0, NULL); + zassert_not_null(strstr(outbuffer, "locked"), NULL); +} + +static void console_cmd_sysinfo_before_after(void *test_data) +{ + ARG_UNUSED(test_data); + + system_common_reset_state(); +} + +ZTEST_SUITE(console_cmd_sysinfo, drivers_predicate_post_main, NULL, + console_cmd_sysinfo_before_after, console_cmd_sysinfo_before_after, + NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/tcpci_dump.c b/zephyr/test/drivers/default/src/console_cmd/tcpci_dump.c new file mode 100644 index 0000000000..9652519cab --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/tcpci_dump.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(console_cmd_tcpci_dump, test_no_params) +{ + int rv = shell_execute_cmd(get_ec_shell(), "tcpci_dump"); + + zassert_equal(rv, EC_ERROR_PARAM_COUNT, "Expected %d, but got %d", + EC_ERROR_PARAM_COUNT, rv); +} + +ZTEST_USER(console_cmd_tcpci_dump, test_good_index) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "tcpci_dump 0"), + "Failed index 0 print"); +} + +ZTEST_USER(console_cmd_tcpci_dump, test_bad_index) +{ + int rv = shell_execute_cmd(get_ec_shell(), "tcpci_dump 84"); + + zassert_equal(rv, EC_ERROR_INVAL, "Expected %d, but got %d", + EC_ERROR_INVAL, rv); +} + +static void console_cmd_tcpci_dump_begin(void *data) +{ + ARG_UNUSED(data); + + /* Assume we have at least one TCPC */ + zassume_true(board_get_charger_chip_count() > 0, + "Insufficient TCPCs found"); +} + +ZTEST_SUITE(console_cmd_tcpci_dump, drivers_predicate_post_main, NULL, + console_cmd_tcpci_dump_begin, NULL, NULL); diff --git a/zephyr/test/drivers/src/console_cmd/usb_pd_console.c b/zephyr/test/drivers/default/src/console_cmd/usb_pd_console.c index 4902591c67..21056056d4 100644 --- a/zephyr/test/drivers/src/console_cmd/usb_pd_console.c +++ b/zephyr/test/drivers/default/src/console_cmd/usb_pd_console.c @@ -1,15 +1,16 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "console.h" #include "ec_commands.h" #include "test/drivers/test_state.h" #include "test/drivers/utils.h" +#include "usb_prl_sm.h" static void console_cmd_usb_pd_after(void *fixture) { @@ -20,6 +21,10 @@ static void console_cmd_usb_pd_after(void *fixture) k_sleep(K_SECONDS(1)); test_set_chipset_to_s0(); k_sleep(K_SECONDS(10)); + + /* Keep port used by testsuite enabled (default state) */ + pd_comm_enable(0, 1); + pd_set_suspend(0, 0); } ZTEST_SUITE(console_cmd_usb_pd, drivers_predicate_post_main, NULL, NULL, @@ -151,6 +156,24 @@ ZTEST_USER(console_cmd_usb_pd, test_enable) rv); } +ZTEST_USER(console_cmd_usb_pd, test_suspend) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "pd 0 suspend"); + zassert_equal(rv, EC_SUCCESS, "Expected %d, but got %d", EC_SUCCESS, + rv); +} + +ZTEST_USER(console_cmd_usb_pd, test_resume) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "pd 0 resume"); + zassert_equal(rv, EC_SUCCESS, "Expected %d, but got %d", EC_SUCCESS, + rv); +} + ZTEST_USER(console_cmd_usb_pd, test_hard) { int rv; @@ -253,3 +276,83 @@ ZTEST_USER(console_cmd_usb_pd, test_timer) zassert_equal(rv, EC_SUCCESS, "Expected %d, but got %d", EC_SUCCESS, rv); } + +static void set_device_vdo(int port, enum tcpci_msg_type type) +{ + union tbt_mode_resp_device device_resp; + struct pd_discovery *dev_disc; + + dev_disc = pd_get_am_discovery_and_notify_access(port, type); + dev_disc->svid_cnt = 1; + dev_disc->svids[0].svid = USB_VID_INTEL; + dev_disc->svids[0].discovery = PD_DISC_COMPLETE; + dev_disc->svids[0].mode_cnt = 1; + device_resp.tbt_alt_mode = TBT_ALTERNATE_MODE; + device_resp.tbt_adapter = TBT_ADAPTER_TBT3; + device_resp.intel_spec_b0 = VENDOR_SPECIFIC_NOT_SUPPORTED; + device_resp.vendor_spec_b0 = VENDOR_SPECIFIC_NOT_SUPPORTED; + device_resp.vendor_spec_b1 = VENDOR_SPECIFIC_NOT_SUPPORTED; + dev_disc->svids[0].mode_vdo[0] = device_resp.raw_value; +} + +static void set_active_cable_type(int port, enum tcpci_msg_type type, + enum idh_ptype ptype) +{ + struct pd_discovery *dev_disc; + + dev_disc = pd_get_am_discovery_and_notify_access(port, type); + dev_disc->identity.idh.product_type = ptype; + prl_set_rev(port, type, PD_REV30); +} + +ZTEST_USER(console_cmd_usb_pd, test_pe) +{ + int rv; + + pd_set_identity_discovery(0, TCPCI_MSG_SOP, PD_DISC_COMPLETE); + + rv = shell_execute_cmd(get_ec_shell(), "pe 0 dump"); + zassert_ok(rv, "Expected %d, but got %d", EC_SUCCESS, rv); + + set_device_vdo(0, TCPCI_MSG_SOP); + rv = shell_execute_cmd(get_ec_shell(), "pe 0 dump"); + zassert_ok(rv, "Expected %d, but got %d", EC_SUCCESS, rv); + + /* Handle error scenarios */ + rv = shell_execute_cmd(get_ec_shell(), "pe 0"); + zassert_equal(rv, EC_ERROR_PARAM_COUNT, "Expected %d, but got %d", + EC_ERROR_PARAM_COUNT, rv); + + rv = shell_execute_cmd(get_ec_shell(), "pe x dump"); + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM2, rv); +} + +ZTEST_USER(console_cmd_usb_pd, test_pdcable) +{ + int rv; + + rv = shell_execute_cmd(get_ec_shell(), "pdcable 0"); + zassert_ok(rv, "Expected %d, but got %d", EC_SUCCESS, rv); + + set_device_vdo(0, TCPCI_MSG_SOP_PRIME); + + /* Set active cable type IDH_PTYPE_ACABLE */ + set_active_cable_type(0, TCPCI_MSG_SOP_PRIME, IDH_PTYPE_ACABLE); + rv = shell_execute_cmd(get_ec_shell(), "pdcable 0"); + zassert_ok(rv, "Expected %d, but got %d", EC_SUCCESS, rv); + + /* Set active cable type IDH_PTYPE_PCABLE */ + set_active_cable_type(0, TCPCI_MSG_SOP_PRIME, IDH_PTYPE_PCABLE); + rv = shell_execute_cmd(get_ec_shell(), "pdcable 0"); + zassert_ok(rv, "Expected %d, but got %d", EC_SUCCESS, rv); + + /* Handle error scenarios */ + rv = shell_execute_cmd(get_ec_shell(), "pdcable"); + zassert_equal(rv, EC_ERROR_PARAM_COUNT, "Expected %d, but got %d", + EC_ERROR_PARAM_COUNT, rv); + + rv = shell_execute_cmd(get_ec_shell(), "pdcable t"); + zassert_equal(rv, EC_ERROR_PARAM2, "Expected %d, but got %d", + EC_ERROR_PARAM2, rv); +} diff --git a/zephyr/test/drivers/default/src/console_cmd/version.c b/zephyr/test/drivers/default/src/console_cmd/version.c new file mode 100644 index 0000000000..932cc51449 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/version.c @@ -0,0 +1,37 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/emul.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "system.h" + +ZTEST_USER(console_cmd_version, test_no_args) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + + zassert_ok(shell_execute_cmd(shell_zephyr, "version"), NULL); + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(buffer_size > 0, NULL); + + /* Weakly verify some contents */ + zassert_not_null(strstr(outbuffer, "Chip:"), NULL); + zassert_not_null(strstr(outbuffer, "Board:"), NULL); + zassert_not_null(strstr(outbuffer, "RO:"), NULL); + zassert_not_null(strstr(outbuffer, "RW:"), NULL); + zassert_not_null(strstr(outbuffer, "Build:"), NULL); +} + +ZTEST_SUITE(console_cmd_version, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); diff --git a/zephyr/test/drivers/default/src/console_cmd/waitms.c b/zephyr/test/drivers/default/src/console_cmd/waitms.c new file mode 100644 index 0000000000..0d03ee7414 --- /dev/null +++ b/zephyr/test/drivers/default/src/console_cmd/waitms.c @@ -0,0 +1,51 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdio.h> +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "timer.h" + +static void test_int(int ms) +{ + char cmd[32]; + unsigned long measured; + timestamp_t start; + timestamp_t end; + + sprintf(cmd, "waitms %d", ms); + start = get_time(); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), + "Failed to execute 'waitms' command"); + end = get_time(); + measured = (end.val - start.val) / 1000; + zassert_equal(measured, ms, "'waitms %d' failed, took %ld ms", ms, + measured); +} + +ZTEST_SUITE(console_cmd_waitms, NULL, NULL, NULL, NULL, NULL); + +ZTEST_USER(console_cmd_waitms, test_waitms) +{ + /* + * Test across three orders of magnitude. Beyond ~3s the watchdog will + * trigger so don't need to bother testing 10s of seconds or greater. + */ + test_int(0); + test_int(5); + test_int(75); + test_int(250); + test_int(1000); + + /* A plain string should fail. */ + zassert_true(shell_execute_cmd(get_ec_shell(), "waitms string"), NULL); + + /* Floats and negative ints should fail. */ + zassert_true(shell_execute_cmd(get_ec_shell(), "waitms 123.456"), NULL); + zassert_true(shell_execute_cmd(get_ec_shell(), "waitms -67.3"), NULL); + zassert_true(shell_execute_cmd(get_ec_shell(), "waitms -7"), NULL); +} diff --git a/zephyr/test/drivers/src/cros_cbi.c b/zephyr/test/drivers/default/src/cros_cbi.c index d0afdaecdb..e92765cb52 100644 --- a/zephyr/test/drivers/src/cros_cbi.c +++ b/zephyr/test/drivers/default/src/cros_cbi.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/device.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "cros_cbi.h" #include "test/drivers/test_state.h" diff --git a/zephyr/test/drivers/default/src/espi.c b/zephyr/test/drivers/default/src/espi.c new file mode 100644 index 0000000000..9843471ae7 --- /dev/null +++ b/zephyr/test/drivers/default/src/espi.c @@ -0,0 +1,326 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <string.h> +#include <zephyr/fff.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "gpio.h" +#include "host_command.h" +#include "system.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#define PORT 0 + +#define AC_OK_OD_GPIO_NAME "acok_od" + +static void espi_before(void *state) +{ + ARG_UNUSED(state); + RESET_FAKE(system_is_locked); +} + +static void espi_after(void *state) +{ + ARG_UNUSED(state); + RESET_FAKE(system_is_locked); +} + +ZTEST_USER(espi, test_host_command_get_protocol_info) +{ + struct ec_response_get_protocol_info response; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_GET_PROTOCOL_INFO, 0, response); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(response.protocol_versions, BIT(3), NULL); + zassert_equal(response.max_request_packet_size, EC_LPC_HOST_PACKET_SIZE, + NULL); + zassert_equal(response.max_response_packet_size, + EC_LPC_HOST_PACKET_SIZE, NULL); + zassert_equal(response.flags, 0, NULL); +} + +ZTEST_USER(espi, test_host_command_usb_pd_power_info) +{ + /* Only test we've enabled the command */ + struct ec_response_usb_pd_power_info response; + struct ec_params_usb_pd_power_info params = { .port = PORT }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_USB_PD_POWER_INFO, 0, response, params); + + args.params = ¶ms; + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); +} + +ZTEST_USER(espi, test_host_command_typec_status) +{ + /* Only test we've enabled the command */ + struct ec_params_typec_status params = { .port = PORT }; + struct ec_response_typec_status response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_TYPEC_STATUS, 0, response, params); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); +} + +ZTEST_USER(espi, test_host_command_usb_pd_get_amode) +{ + /* Only test we've enabled the command */ + struct ec_params_usb_pd_get_mode_request params = { + .port = PORT, + .svid_idx = 0, + }; + struct ec_params_usb_pd_get_mode_response response; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_USB_PD_GET_AMODE, 0, response, params); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + /* Note: with no SVIDs the response size is the size of the svid field. + * See the usb alt mode test for verifying larger struct sizes + */ + zassert_equal(args.response_size, sizeof(response.svid), NULL); +} + +ZTEST_USER(espi, test_host_command_gpio_get_v0) +{ + struct ec_params_gpio_get p = { + /* Checking for AC enabled */ + .name = AC_OK_OD_GPIO_NAME, + }; + struct ec_response_gpio_get response; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 0, response, p); + + set_ac_enabled(true); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_true(response.val, NULL); + + set_ac_enabled(false); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_false(response.val, NULL); +} + +ZTEST_USER(espi, test_host_command_gpio_get_v1_get_by_name) +{ + struct ec_params_gpio_get_v1 p = { + .subcmd = EC_GPIO_GET_BY_NAME, + /* Checking for AC enabled */ + .get_value_by_name = { + AC_OK_OD_GPIO_NAME, + }, + }; + struct ec_response_gpio_get_v1 response; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 1, response, p); + + set_ac_enabled(true); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response.get_value_by_name), + NULL); + zassert_true(response.get_info.val, NULL); + + set_ac_enabled(false); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response.get_value_by_name), + NULL); + zassert_false(response.get_info.val, NULL); +} + +ZTEST_USER(espi, test_host_command_gpio_get_v1_get_count) +{ + struct ec_params_gpio_get_v1 p = { + .subcmd = EC_GPIO_GET_COUNT, + }; + struct ec_response_gpio_get_v1 response; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 1, response, p); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response.get_count), NULL); + zassert_equal(response.get_count.val, GPIO_COUNT, NULL); +} + +ZTEST_USER(espi, test_host_command_gpio_get_v1_get_info) +{ + const enum gpio_signal signal = GPIO_SIGNAL(DT_NODELABEL(gpio_acok_od)); + struct ec_params_gpio_get_v1 p = { + .subcmd = EC_GPIO_GET_INFO, + .get_info = { + .index = signal, + }, + }; + struct ec_response_gpio_get_v1 response; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 1, response, p); + + set_ac_enabled(true); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_ok(strcmp(response.get_info.name, AC_OK_OD_GPIO_NAME), NULL); + zassert_true(response.get_info.val, NULL); + + set_ac_enabled(false); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_ok(strcmp(response.get_info.name, AC_OK_OD_GPIO_NAME), NULL); + zassert_false(response.get_info.val, NULL); +} + +ZTEST_USER(espi, test_host_command_gpio_set) +{ + struct nothing { + int place_holder; + }; + const struct gpio_dt_spec *gp = GPIO_DT_FROM_NODELABEL(gpio_test); + struct ec_params_gpio_set p = { + .name = "test", + .val = 0, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_GPIO_SET, 0, p); + + /* Force value to 1 to see change */ + zassume_ok(gpio_pin_set_dt(gp, 1), NULL); + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(gpio_pin_get_dt(gp), p.val, NULL); + + p.val = 1; + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(gpio_pin_get_dt(gp), p.val, NULL); +} + +ZTEST(espi, test_hc_gpio_get_v0_invalid_name) +{ + struct ec_response_gpio_get response; + struct ec_params_gpio_get params = { .name = "INVALID_GPIO_NAME" }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 0, response, params); + + zassert_equal(EC_RES_ERROR, host_command_process(&args), NULL); +} + +ZTEST(espi, test_hc_gpio_get_v1_get_by_name_invalid_name) +{ + struct ec_response_gpio_get_v1 response; + struct ec_params_gpio_get_v1 params = { + .subcmd = EC_GPIO_GET_BY_NAME, + .get_value_by_name.name = "INVALID_GPIO_NAME", + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 1, response, params); + + zassert_equal(EC_RES_ERROR, host_command_process(&args), NULL); +} + +ZTEST(espi, test_hc_gpio_get_v1_get_info_invalid_index) +{ + struct ec_response_gpio_get_v1 response; + struct ec_params_gpio_get_v1 params = { + .subcmd = EC_GPIO_GET_INFO, + .get_info.index = GPIO_COUNT, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 1, response, params); + + zassert_equal(EC_RES_ERROR, host_command_process(&args), NULL); +} + +ZTEST(espi, test_hc_gpio_get_v1_invalid_subcmd) +{ + struct ec_response_gpio_get_v1 response; + struct ec_params_gpio_get_v1 params = { + .subcmd = EC_CMD_GPIO_GET, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_GPIO_GET, 1, response, params); + + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&args), NULL); +} + +/* EC_CMD_GET_FEATURES */ +ZTEST_USER(espi, test_host_command_ec_cmd_get_features) +{ + struct ec_response_get_features response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_FEATURES, 0, response); + + int rv = host_command_process(&args); + + zassert_equal(rv, EC_RES_SUCCESS, "Expected %d, but got %d", + EC_RES_SUCCESS, rv); + + /* Check features returned */ + uint32_t feature_mask; + + feature_mask = EC_FEATURE_MASK_0(EC_FEATURE_FLASH); + feature_mask |= EC_FEATURE_MASK_0(EC_FEATURE_MOTION_SENSE); + feature_mask |= EC_FEATURE_MASK_0(EC_FEATURE_KEYB); + zassert_true((response.flags[0] & feature_mask), + "Known features were not returned."); + feature_mask = EC_FEATURE_MASK_1(EC_FEATURE_UNIFIED_WAKE_MASKS); + feature_mask |= EC_FEATURE_MASK_1(EC_FEATURE_HOST_EVENT64); + feature_mask |= EC_FEATURE_MASK_1(EC_FEATURE_EXEC_IN_RAM); + zassert_true((response.flags[1] & feature_mask), + "Known features were not returned."); +} + +ZTEST(espi, test_hc_gpio_set_system_is_locked) +{ + struct ec_params_gpio_set params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_GPIO_SET, 0, params); + + system_is_locked_fake.return_val = 1; + zassert_equal(EC_RES_ACCESS_DENIED, host_command_process(&args), NULL); +} + +ZTEST(espi, test_hc_gpio_set_invalid_gpio_name) +{ + struct ec_params_gpio_set params = { + .name = "", + .val = 0, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_GPIO_SET, 0, params); + + zassert_equal(EC_RES_ERROR, host_command_process(&args), NULL); +} + +ZTEST_SUITE(espi, drivers_predicate_post_main, NULL, espi_before, espi_after, + NULL); diff --git a/zephyr/test/drivers/default/src/flash.c b/zephyr/test/drivers/default/src/flash.c new file mode 100644 index 0000000000..b49d21b997 --- /dev/null +++ b/zephyr/test/drivers/default/src/flash.c @@ -0,0 +1,444 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "emul/emul_flash.h" +#include "flash.h" +#include "host_command.h" +#include "system.h" +#include "test/drivers/test_state.h" + +#define WP_L_GPIO_PATH DT_PATH(named_gpios, wp_l) + +static int gpio_wp_l_set(int value) +{ + const struct device *wp_l_gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(WP_L_GPIO_PATH, gpios)); + + return gpio_emul_input_set(wp_l_gpio_dev, + DT_GPIO_PIN(WP_L_GPIO_PATH, gpios), value); +} + +ZTEST_USER(flash, test_hostcmd_flash_protect_wp_asserted) +{ + struct ec_response_flash_protect response; + struct ec_params_flash_protect params = { + .mask = 0, + .flags = 0, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_FLASH_PROTECT, 0, response, params); + /* The original flags not 0 as GPIO WP_L asserted */ + uint32_t expected_flags = EC_FLASH_PROTECT_GPIO_ASSERTED; + + /* Get the flash protect */ + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Enable RO_AT_BOOT */ + params.mask = EC_FLASH_PROTECT_RO_AT_BOOT; + params.flags = EC_FLASH_PROTECT_RO_AT_BOOT; + expected_flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Disable RO_AT_BOOT; should change nothing as GPIO WP_L is asserted */ + params.mask = EC_FLASH_PROTECT_RO_AT_BOOT; + params.flags = 0; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Enable ALL_NOW */ + params.mask = EC_FLASH_PROTECT_ALL_NOW; + params.flags = EC_FLASH_PROTECT_ALL_NOW; + expected_flags |= EC_FLASH_PROTECT_ALL_NOW; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Disable ALL_NOW; should change nothing as GPIO WP_L is asserted */ + params.mask = EC_FLASH_PROTECT_ALL_NOW; + params.flags = 0; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Disable RO_AT_BOOT; should change nothing as GPIO WP_L is asserted */ + params.mask = EC_FLASH_PROTECT_RO_AT_BOOT; + params.flags = 0; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); +} + +ZTEST_USER(flash, test_hostcmd_flash_protect_wp_deasserted) +{ + struct ec_response_flash_protect response; + struct ec_params_flash_protect params = { + .mask = 0, + .flags = 0, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_FLASH_PROTECT, 0, response, params); + /* The original flags 0 as GPIO WP_L deasserted */ + uint32_t expected_flags = 0; + + zassert_ok(gpio_wp_l_set(1), NULL); + + /* Get the flash protect */ + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Enable RO_AT_BOOT */ + params.mask = EC_FLASH_PROTECT_RO_AT_BOOT; + params.flags = EC_FLASH_PROTECT_RO_AT_BOOT; + expected_flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Disable RO_AT_BOOT */ + params.mask = EC_FLASH_PROTECT_RO_AT_BOOT; + params.flags = 0; + expected_flags &= + ~(EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW); + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Enable RO_AT_BOOT */ + params.mask = EC_FLASH_PROTECT_RO_AT_BOOT; + params.flags = EC_FLASH_PROTECT_RO_AT_BOOT; + expected_flags |= EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); + + /* Enable ALL_NOW; should change nothing as GPIO WP_L is deasserted */ + params.mask = EC_FLASH_PROTECT_ALL_NOW; + params.flags = EC_FLASH_PROTECT_ALL_NOW; + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flags, expected_flags, "response.flags = %d", + response.flags); +} + +#define TEST_BUF_SIZE 0x100 + +ZTEST_USER(flash, test_hostcmd_flash_write_and_erase) +{ + uint8_t in_buf[TEST_BUF_SIZE]; + uint8_t out_buf[sizeof(struct ec_params_flash_write) + TEST_BUF_SIZE]; + + struct ec_params_flash_read read_params = { + .offset = 0x10000, + .size = TEST_BUF_SIZE, + }; + struct host_cmd_handler_args read_args = + BUILD_HOST_COMMAND(EC_CMD_FLASH_READ, 0, in_buf, read_params); + + struct ec_params_flash_erase erase_params = { + .offset = 0x10000, + .size = 0x10000, + }; + struct host_cmd_handler_args erase_args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_FLASH_ERASE, 0, erase_params); + + /* The write host command structs need to be filled run-time */ + struct ec_params_flash_write *write_params = + (struct ec_params_flash_write *)out_buf; + struct host_cmd_handler_args write_args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_FLASH_WRITE, 0); + + write_params->offset = 0x10000; + write_params->size = TEST_BUF_SIZE; + write_args.params = write_params; + write_args.params_size = sizeof(*write_params) + TEST_BUF_SIZE; + + /* Flash write to all 0xec */ + memset(write_params + 1, 0xec, TEST_BUF_SIZE); + zassert_ok(host_command_process(&write_args), NULL); + + /* Flash read and compare the readback data */ + zassert_ok(host_command_process(&read_args), NULL); + zassert_equal(read_args.response_size, TEST_BUF_SIZE, NULL); + zassert_equal(in_buf[0], 0xec, "readback data not expected: 0x%x", + in_buf[0]); + zassert_equal(in_buf[TEST_BUF_SIZE - 1], 0xec, + "readback data not expected: 0x%x", in_buf[0]); + + /* Flash erase */ + zassert_ok(host_command_process(&erase_args), NULL); + + /* Flash read and compare the readback data */ + zassert_ok(host_command_process(&read_args), NULL); + zassert_equal(in_buf[0], 0xff, "readback data not expected: 0x%x", + in_buf[0]); + zassert_equal(in_buf[TEST_BUF_SIZE - 1], 0xff, + "readback data not expected: 0x%x", in_buf[0]); +} + +#define EC_FLASH_REGION_START \ + MIN(CONFIG_EC_PROTECTED_STORAGE_OFF, CONFIG_EC_WRITABLE_STORAGE_OFF) + +static void test_region_info(uint32_t region, uint32_t expected_offset, + uint32_t expected_size) +{ + struct ec_response_flash_region_info response; + struct ec_params_flash_region_info params = { + .region = region, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_FLASH_REGION_INFO, 1, response, params); + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.offset, expected_offset, NULL); + zassert_equal(response.size, expected_size, NULL); +} + +ZTEST_USER(flash, test_hostcmd_flash_region_info_ro) +{ + test_region_info(EC_FLASH_REGION_RO, + CONFIG_EC_PROTECTED_STORAGE_OFF + + CONFIG_RO_STORAGE_OFF - EC_FLASH_REGION_START, + EC_FLASH_REGION_RO_SIZE); +} + +ZTEST_USER(flash, test_hostcmd_flash_region_info_active) +{ + test_region_info(EC_FLASH_REGION_ACTIVE, + flash_get_rw_offset(system_get_active_copy()) - + EC_FLASH_REGION_START, + CONFIG_EC_WRITABLE_STORAGE_SIZE); +} + +ZTEST_USER(flash, test_hostcmd_flash_region_info_active_wp_ro) +{ + test_region_info(EC_FLASH_REGION_WP_RO, + CONFIG_WP_STORAGE_OFF - EC_FLASH_REGION_START, + CONFIG_WP_STORAGE_SIZE); +} + +ZTEST_USER(flash, test_hostcmd_flash_region_info_active_update) +{ + test_region_info(EC_FLASH_REGION_UPDATE, + flash_get_rw_offset(system_get_update_copy()) - + EC_FLASH_REGION_START, + CONFIG_EC_WRITABLE_STORAGE_SIZE); +} + +ZTEST_USER(flash, test_hostcmd_flash_region_info_active_invalid) +{ + struct ec_response_flash_region_info response; + struct ec_params_flash_region_info params = { + /* Get an invalid region */ + .region = 10, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_FLASH_REGION_INFO, 1, response, params); + + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, NULL); +} + +ZTEST_USER(flash, test_hostcmd_flash_info) +{ + struct ec_response_flash_info_1 response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_FLASH_INFO, 1, response); + + /* Get the flash info. */ + zassert_ok(host_command_process(&args), NULL); + zassert_equal(response.flash_size, + CONFIG_FLASH_SIZE_BYTES - EC_FLASH_REGION_START, + "response.flash_size = %d", response.flash_size); + zassert_equal(response.flags, 0, "response.flags = %d", response.flags); + zassert_equal(response.write_block_size, CONFIG_FLASH_WRITE_SIZE, + "response.write_block_size = %d", + response.write_block_size); + zassert_equal(response.erase_block_size, CONFIG_FLASH_ERASE_SIZE, + "response.erase_block_size = %d", + response.erase_block_size); + zassert_equal(response.protect_block_size, CONFIG_FLASH_BANK_SIZE, + "response.protect_block_size = %d", + response.protect_block_size); + zassert_equal( + response.write_ideal_size, + (args.response_max - sizeof(struct ec_params_flash_write)) & + ~(CONFIG_FLASH_WRITE_SIZE - 1), + "response.write_ideal_size = %d", response.write_ideal_size); +} + +ZTEST_USER(flash, test_console_cmd_flashwp__invalid) +{ + /* Command requires a 2nd CLI arg */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "flashwp"), NULL); +} + +ZTEST_USER(flash, test_console_cmd_flashwp__now) +{ + uint32_t current; + + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp true"), NULL); + + current = crec_flash_get_protect(); + zassert_true(EC_FLASH_PROTECT_GPIO_ASSERTED & current, "current = %08x", + current); + zassert_true(EC_FLASH_PROTECT_RO_AT_BOOT & current, "current = %08x", + current); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp now"), NULL); + + current = crec_flash_get_protect(); + zassert_true(current & EC_FLASH_PROTECT_ALL_NOW, "current = %08x", + current); +} + +ZTEST_USER(flash, test_console_cmd_flashwp__all) +{ + uint32_t current; + + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp true"), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp all"), NULL); + + current = crec_flash_get_protect(); + zassert_true(EC_FLASH_PROTECT_ALL_NOW & current, "current = %08x", + current); +} + +ZTEST_USER(flash, test_console_cmd_flashwp__bool_false) +{ + uint32_t current; + + /* Set RO_AT_BOOT and verify */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp true"), NULL); + + current = crec_flash_get_protect(); + zassert_true(current & EC_FLASH_PROTECT_RO_AT_BOOT, "current = %08x", + current); + + gpio_wp_l_set(1); + + /* Now clear it */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp false"), NULL); + + current = crec_flash_get_protect(); + zassert_false(current & EC_FLASH_PROTECT_RO_AT_BOOT, "current = %08x", + current); +} + +ZTEST_USER(flash, test_console_cmd_flashwp__bool_true) +{ + uint32_t current; + + gpio_wp_l_set(1); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "flashwp true"), NULL); + + current = crec_flash_get_protect(); + zassert_equal(EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW, + current, "current = %08x", current); +} + +ZTEST_USER(flash, test_console_cmd_flashwp__bad_param) +{ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "flashwp xyz"), NULL); +} + +/** + * @brief Prepare a region of flash for the test_crec_flash_is_erased* tests + * + * @param offset Offset to write bytes at. + * @param size Number of bytes to erase. + * @param make_write If true, write an arbitrary byte after erase so the region + * is no longer fully erased. + */ +static void setup_flash_region_helper(uint32_t offset, uint32_t size, + bool make_write) +{ + struct ec_params_flash_erase erase_params = { + .offset = offset, + .size = size, + }; + struct host_cmd_handler_args erase_args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_FLASH_ERASE, 0, erase_params); + + zassume_ok(host_command_process(&erase_args), NULL); + + if (make_write) { + /* Sized for flash_write header plus one byte of data */ + uint8_t out_buf[sizeof(struct ec_params_flash_write) + + sizeof(uint8_t)]; + + struct ec_params_flash_write *write_params = + (struct ec_params_flash_write *)out_buf; + struct host_cmd_handler_args write_args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_FLASH_WRITE, 0); + + write_params->offset = offset; + write_params->size = 1; + write_args.params = write_params; + write_args.params_size = sizeof(out_buf); + + /* Write one byte at start of region */ + out_buf[sizeof(*write_params)] = 0xec; + + zassume_ok(host_command_process(&write_args), NULL); + } +} + +ZTEST_USER(flash, test_crec_flash_is_erased__happy) +{ + uint32_t offset = 0x10000; + + setup_flash_region_helper(offset, TEST_BUF_SIZE, false); + + zassert_true(crec_flash_is_erased(offset, TEST_BUF_SIZE), NULL); +} + +ZTEST_USER(flash, test_crec_flash_is_erased__not_erased) +{ + uint32_t offset = 0x10000; + + setup_flash_region_helper(offset, TEST_BUF_SIZE, true); + + zassert_true(!crec_flash_is_erased(offset, TEST_BUF_SIZE), NULL); +} + +static void flash_reset(void) +{ + /* Set the GPIO WP_L to default */ + gpio_wp_l_set(0); + + /* Reset the protection flags */ + cros_flash_emul_protect_reset(); +} + +static void flash_before(void *data) +{ + ARG_UNUSED(data); + flash_reset(); +} + +static void flash_after(void *data) +{ + ARG_UNUSED(data); + flash_reset(); + + /* The test modifies this bank. Erase it in case of failure. */ + crec_flash_erase(0x10000, 0x10000); +} + +ZTEST_SUITE(flash, drivers_predicate_post_main, NULL, flash_before, flash_after, + NULL); diff --git a/zephyr/test/drivers/src/gpio.c b/zephyr/test/drivers/default/src/gpio.c index e49222f08f..acfa0de26e 100644 --- a/zephyr/test/drivers/src/gpio.c +++ b/zephyr/test/drivers/default/src/gpio.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,8 +12,8 @@ #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/logging/log.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "ec_tasks.h" @@ -116,8 +116,8 @@ ZTEST(gpio, test_convert_to_zephyr_flags) */ ZTEST(gpio, test_signal_is_gpio) { - zassert_true(signal_is_gpio( - GPIO_SIGNAL(DT_NODELABEL(gpio_test))), "Expected true"); + zassert_true(signal_is_gpio(GPIO_SIGNAL(DT_NODELABEL(gpio_test))), + "Expected true"); } /** @@ -301,7 +301,6 @@ ZTEST(gpio, test_gpio_get_default_flags) zassert_equal(flags, GPIO_OUTPUT, "Flags set 0x%x", flags); } - /** * @brief TestPurpose: Verify GPIO no-auto-init. * @@ -319,16 +318,13 @@ ZTEST(gpio, test_gpio_no_auto_init) gpio_flags_t flags; flags = gpio_helper_get_flags(signal); - zassert_equal(0, flags, - "Expected 0x%08x, returned 0x%08X", - 0, flags); + zassert_equal(0, flags, "Expected 0x%08x, returned 0x%08X", 0, flags); /* Configure pin. */ gpio_pin_configure_dt(gp, GPIO_INPUT | GPIO_OUTPUT); flags = gpio_helper_get_flags(signal); - zassert_equal(flags, - (GPIO_ACTIVE_LOW | GPIO_OUTPUT | GPIO_INPUT), - "Flags set 0x%x", flags); + zassert_equal(flags, (GPIO_ACTIVE_LOW | GPIO_OUTPUT | GPIO_INPUT), + "Flags set 0x%x", flags); } /** diff --git a/zephyr/test/drivers/default/src/i2c.c b/zephyr/test/drivers/default/src/i2c.c new file mode 100644 index 0000000000..caced4aedf --- /dev/null +++ b/zephyr/test/drivers/default/src/i2c.c @@ -0,0 +1,145 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "host_command.h" +#include "i2c.h" +#include "test/drivers/test_state.h" + +ZTEST_USER(i2c, test_i2c_set_speed_success) +{ + struct ec_response_i2c_control response; + struct ec_params_i2c_control get_params = { + .port = I2C_PORT_USB_C0, + .cmd = EC_I2C_CONTROL_GET_SPEED, + }; + struct host_cmd_handler_args get_args = + BUILD_HOST_COMMAND(EC_CMD_I2C_CONTROL, 0, response, get_params); + struct ec_params_i2c_control set_params = { + .port = I2C_PORT_USB_C0, + .cmd = EC_I2C_CONTROL_SET_SPEED, + }; + struct host_cmd_handler_args set_args = + BUILD_HOST_COMMAND(EC_CMD_I2C_CONTROL, 0, response, set_params); + + /* Get the speed: 100. */ + zassert_ok(host_command_process(&get_args), NULL); + zassert_ok(get_args.result, NULL); + zassert_equal(get_args.response_size, sizeof(response), NULL); + zassert_equal(response.cmd_response.speed_khz, 100, + "response.cmd_response.speed_khz = %d", + response.cmd_response.speed_khz); + + /* Set the speed to 400. */ + set_params.cmd_params.speed_khz = 400; + zassert_ok(host_command_process(&set_args), NULL); + zassert_ok(set_args.result, NULL); + zassert_equal(set_args.response_size, sizeof(response), NULL); + zassert_equal(response.cmd_response.speed_khz, 100, + "response.cmd_response.speed_khz = %d", + response.cmd_response.speed_khz); + + /* Get the speed to verify. */ + zassert_ok(host_command_process(&get_args), NULL); + zassert_ok(get_args.result, NULL); + zassert_equal(get_args.response_size, sizeof(response), NULL); + zassert_equal(response.cmd_response.speed_khz, 400, + "response.cmd_response.speed_khz = %d", + response.cmd_response.speed_khz); + + /* Set the speed back to 100. */ + set_params.cmd_params.speed_khz = 100; + zassert_ok(host_command_process(&set_args), NULL); + zassert_ok(set_args.result, NULL); + zassert_equal(set_args.response_size, sizeof(response), NULL); + zassert_equal(response.cmd_response.speed_khz, 400, + "response.cmd_response.speed_khz = %d", + response.cmd_response.speed_khz); +} + +ZTEST_USER(i2c, test_i2c_set_speed_not_dynamic) +{ + struct ec_response_i2c_control response; + struct ec_params_i2c_control set_params = { + .port = I2C_PORT_POWER, + .cmd = EC_I2C_CONTROL_SET_SPEED, + .cmd_params.speed_khz = 400, + }; + struct host_cmd_handler_args set_args = + BUILD_HOST_COMMAND(EC_CMD_I2C_CONTROL, 0, response, set_params); + + /* Set the speed to 400 on a bus which doesn't support dynamic-speed. */ + zassert_equal(EC_RES_ERROR, host_command_process(&set_args), NULL); +} + +ZTEST_USER(i2c, test_i2c_control_wrong_port) +{ + struct ec_response_i2c_control response; + struct ec_params_i2c_control get_params = { + .port = 10, + .cmd = EC_I2C_CONTROL_GET_SPEED, + }; + struct host_cmd_handler_args get_args = + BUILD_HOST_COMMAND(EC_CMD_I2C_CONTROL, 0, response, get_params); + + /* Set the .port=10, which is not defined. */ + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&get_args), + NULL); +} + +ZTEST_USER(i2c, test_i2c_control_wrong_cmd) +{ + struct ec_response_i2c_control response; + struct ec_params_i2c_control params = { + .port = I2C_PORT_USB_C0, + .cmd = 10, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_I2C_CONTROL, 0, response, params); + + /* Call the .cmd=10, which is not defined. */ + zassert_equal(EC_RES_INVALID_COMMAND, host_command_process(&args), + NULL); +} + +ZTEST_USER(i2c, test_i2c_set_speed_wrong_freq) +{ + struct ec_response_i2c_control response; + struct ec_params_i2c_control set_params = { + .port = I2C_PORT_USB_C0, + .cmd = EC_I2C_CONTROL_SET_SPEED, + .cmd_params.speed_khz = 123, + }; + struct host_cmd_handler_args set_args = + BUILD_HOST_COMMAND(EC_CMD_I2C_CONTROL, 0, response, set_params); + + /* Set the speed to 123 KHz (an invalid speed). */ + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&set_args), + NULL); +} + +static void i2c_freq_reset(void) +{ + /* The test modifies this port. Reset it to the DTS defined. */ + zassert_ok(i2c_set_freq(I2C_PORT_USB_C0, I2C_FREQ_100KHZ), NULL); +} + +static void *i2c_setup(void) +{ + i2c_freq_reset(); + return NULL; +} + +static void i2c_teardown(void *state) +{ + ARG_UNUSED(state); + i2c_freq_reset(); +} + +ZTEST_SUITE(i2c, drivers_predicate_post_main, i2c_setup, NULL, NULL, + i2c_teardown); diff --git a/zephyr/test/drivers/default/src/i2c_passthru.c b/zephyr/test/drivers/default/src/i2c_passthru.c new file mode 100644 index 0000000000..aea81fc198 --- /dev/null +++ b/zephyr/test/drivers/default/src/i2c_passthru.c @@ -0,0 +1,123 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "driver/ln9310.h" +#include "ec_commands.h" +#include "host_command.h" +#include "i2c.h" +#include "test/drivers/test_state.h" + +ZTEST_USER(i2c_passthru, test_read_without_write) +{ + uint8_t param_buf[sizeof(struct ec_params_i2c_passthru) + + sizeof(struct ec_params_i2c_passthru_msg)]; + uint8_t response_buf[sizeof(struct ec_response_i2c_passthru) + 2]; + struct ec_params_i2c_passthru *params = + (struct ec_params_i2c_passthru *)¶m_buf; + struct ec_response_i2c_passthru *response = + (struct ec_response_i2c_passthru *)&response_buf; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_I2C_PASSTHRU, 0); + + params->port = I2C_PORT_POWER; + params->num_msgs = 1; + params->msg[0].addr_flags = LN9310_I2C_ADDR_0_FLAGS | EC_I2C_FLAG_READ; + params->msg[0].len = 1; + args.params = ¶m_buf; + args.params_size = sizeof(param_buf); + args.response = &response_buf; + args.response_max = sizeof(response_buf); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(response->i2c_status, EC_I2C_STATUS_NAK, NULL); + zassert_equal(args.response_size, + sizeof(struct ec_response_i2c_passthru), NULL); +} + +ZTEST_USER(i2c_passthru, test_passthru_protect) +{ + struct ec_response_i2c_passthru_protect response; + struct ec_params_i2c_passthru_protect status_params = { + .port = I2C_PORT_SENSOR, + .subcmd = EC_CMD_I2C_PASSTHRU_PROTECT_STATUS, + }; + struct host_cmd_handler_args status_args = BUILD_HOST_COMMAND( + EC_CMD_I2C_PASSTHRU_PROTECT, 0, response, status_params); + struct ec_params_i2c_passthru_protect enable_params = { + .port = I2C_PORT_SENSOR, + .subcmd = EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE, + }; + struct host_cmd_handler_args enable_args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_I2C_PASSTHRU_PROTECT, 0, enable_params); + + /* Check the protect status: 0 (unprotected) */ + zassert_ok(host_command_process(&status_args), NULL); + zassert_ok(status_args.result, NULL); + zassert_equal(status_args.response_size, sizeof(response), NULL); + zassert_equal(response.status, 0, "response.status = %d", + response.status); + + /* Protect the bus */ + zassert_ok(host_command_process(&enable_args), NULL); + zassert_ok(enable_args.result, NULL); + + /* Check the protect status: 1 (protected) */ + zassert_ok(host_command_process(&status_args), NULL); + zassert_ok(status_args.result, NULL); + zassert_equal(status_args.response_size, sizeof(response), NULL); + zassert_equal(response.status, 1, "response.status = %d", + response.status); + + /* Error case: wrong subcmd */ + status_params.subcmd = 10; + zassert_equal(host_command_process(&status_args), + EC_RES_INVALID_COMMAND, NULL); + status_params.subcmd = EC_CMD_I2C_PASSTHRU_PROTECT_STATUS; + + /* Error case: wrong port */ + status_params.port = 10; + zassert_equal(host_command_process(&status_args), EC_RES_INVALID_PARAM, + NULL); + status_params.port = I2C_PORT_SENSOR; + + /* Error case: response size not enough */ + status_args.response_max = 0; + zassert_equal(host_command_process(&status_args), EC_RES_INVALID_PARAM, + NULL); + status_args.response_max = sizeof(response); + + /* Error case: params size not enough */ + status_args.params_size = 0; + zassert_equal(host_command_process(&status_args), EC_RES_INVALID_PARAM, + NULL); + status_args.params_size = sizeof(status_params); +} + +ZTEST_USER(i2c_passthru, test_passthru_protect_tcpcs) +{ + struct ec_params_i2c_passthru_protect enable_params = { + .port = I2C_PORT_SENSOR, + .subcmd = EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE_TCPCS, + }; + struct host_cmd_handler_args enable_args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_I2C_PASSTHRU_PROTECT, 0, enable_params); + + /* Protect the all TCPC buses */ + zassert_ok(host_command_process(&enable_args), NULL); + zassert_ok(enable_args.result, NULL); +} + +static void i2c_passthru_after(void *state) +{ + ARG_UNUSED(state); + i2c_passthru_protect_reset(); +} + +ZTEST_SUITE(i2c_passthru, drivers_predicate_post_main, NULL, NULL, + i2c_passthru_after, NULL); diff --git a/zephyr/test/drivers/src/integration/usbc/usb.c b/zephyr/test/drivers/default/src/integration/usbc/usb.c index 0a6443ded9..0436f55e93 100644 --- a/zephyr/test/drivers/src/integration/usbc/usb.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include "battery_smart.h" @@ -25,10 +25,7 @@ #include "test/drivers/utils.h" #include "test/drivers/test_state.h" -#define TCPCI_EMUL_LABEL DT_NODELABEL(tcpci_emul) -#define TCPCI_EMUL_LABEL2 DT_NODELABEL(tcpci_ps8xxx_emul) - -#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) +#define BATTERY_NODE DT_NODELABEL(battery) #define GPIO_AC_OK_PATH DT_PATH(named_gpios, acok_od) #define GPIO_AC_OK_PIN DT_GPIO_PIN(GPIO_AC_OK_PATH, gpios) @@ -38,16 +35,13 @@ static void integration_usb_before(void *state) { - const struct emul *tcpci_emul = - emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); - const struct emul *tcpci_emul2 = - emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL2)); - const struct emul *charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); + const struct emul *tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + const struct emul *tcpci_emul2 = EMUL_GET_USBC_BINDING(1, tcpc); + const struct emul *charger_emul = EMUL_GET_USBC_BINDING(0, chg); /* Reset vbus to 0mV */ /* TODO(b/217610871): Remove redundant test state cleanup */ isl923x_emul_set_adc_vbus(charger_emul, 0); - struct i2c_emul *i2c_emul; + const struct emul *battery_emul = EMUL_DT_GET(BATTERY_NODE); struct sbat_emul_bat_data *bat; const struct device *gpio_dev = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_AC_OK_PATH, gpios)); @@ -58,6 +52,7 @@ static void integration_usb_before(void *state) */ zassert_ok(tcpc_config[0].drv->init(0), NULL); zassert_ok(tcpc_config[1].drv->init(1), NULL); + tcpc_config[USBC_PORT_C0].flags &= ~TCPC_FLAGS_TCPCI_REV2_0; tcpci_emul_set_rev(tcpci_emul, TCPCI_EMUL_REV1_0_VER1_0); pd_set_suspend(0, 0); pd_set_suspend(1, 0); @@ -69,8 +64,7 @@ static void integration_usb_before(void *state) zassert_ok(tcpci_emul_disconnect_partner(tcpci_emul2), NULL); /* Battery defaults to charging, so reset to not charging. */ - i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); - bat = sbat_emul_get_bat_data(i2c_emul); + bat = sbat_emul_get_bat_data(battery_emul); bat->cur = -5; /* @@ -81,12 +75,9 @@ static void integration_usb_before(void *state) static void integration_usb_after(void *state) { - const struct emul *tcpci_emul = - emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); - const struct emul *tcpci_emul2 = - emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL2)); - const struct emul *charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); + const struct emul *tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + const struct emul *tcpci_emul2 = EMUL_GET_USBC_BINDING(1, tcpc); + const struct emul *charger_emul = EMUL_GET_USBC_BINDING(0, chg); ARG_UNUSED(state); /* TODO: This function should trigger gpios to signal there is nothing @@ -106,8 +97,7 @@ static void integration_usb_after(void *state) ZTEST(integration_usb, test_attach_drp) { - const struct emul *tcpci_emul = - emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); + const struct emul *tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); struct tcpci_partner_data my_drp; struct tcpci_drp_emul_data drp_ext; struct tcpci_src_emul_data src_ext; @@ -121,14 +111,12 @@ ZTEST(integration_usb, test_attach_drp) /* Attach emulated sink */ tcpci_partner_init(&my_drp, PD_REV20); - my_drp.extensions = - tcpci_drp_emul_init( - &drp_ext, &my_drp, PD_ROLE_SINK, - tcpci_src_emul_init(&src_ext, &my_drp, NULL), - tcpci_snk_emul_init(&snk_ext, &my_drp, NULL)); - - zassert_ok(tcpci_partner_connect_to_tcpci(&my_drp, tcpci_emul), - NULL); + my_drp.extensions = tcpci_drp_emul_init( + &drp_ext, &my_drp, PD_ROLE_SINK, + tcpci_src_emul_init(&src_ext, &my_drp, NULL), + tcpci_snk_emul_init(&snk_ext, &my_drp, NULL)); + + zassert_ok(tcpci_partner_connect_to_tcpci(&my_drp, tcpci_emul), NULL); /* Wait for PD negotiation */ k_sleep(K_SECONDS(10)); diff --git a/zephyr/test/drivers/src/integration/usbc/usb_20v_3a_pd_charger.c b/zephyr/test/drivers/default/src/integration/usbc/usb_20v_3a_pd_charger.c index 79cbb21b96..3fc73337b9 100644 --- a/zephyr/test/drivers/src/integration/usbc/usb_20v_3a_pd_charger.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_20v_3a_pd_charger.c @@ -1,9 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "battery_smart.h" #include "emul/emul_isl923x.h" @@ -13,7 +13,7 @@ #include "test/drivers/utils.h" #include "usb_pd.h" -#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) +#define BATTERY_NODE DT_NODELABEL(battery) struct usb_attach_20v_3a_pd_charger_fixture { struct tcpci_partner_data charger_20v; @@ -26,13 +26,12 @@ static inline void connect_charger_to_port(struct usb_attach_20v_3a_pd_charger_fixture *fixture) { set_ac_enabled(true); - zassume_ok(tcpci_partner_connect_to_tcpci( - &fixture->charger_20v, fixture->tcpci_emul), + zassume_ok(tcpci_partner_connect_to_tcpci(&fixture->charger_20v, + fixture->tcpci_emul), NULL); - isl923x_emul_set_adc_vbus( - fixture->charger_emul, - PDO_FIXED_GET_VOLT(fixture->src_ext.pdo[1])); + isl923x_emul_set_adc_vbus(fixture->charger_emul, + PDO_FIXED_GET_VOLT(fixture->src_ext.pdo[1])); /* Wait for PD negotiation and current ramp. * TODO(b/213906889): Check message timing and contents. @@ -54,16 +53,13 @@ static void *usb_attach_20v_3a_pd_charger_setup(void) static struct usb_attach_20v_3a_pd_charger_fixture test_fixture; /* Get references for the emulators */ - test_fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - test_fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); /* Initialized the charger to supply 20V and 3A */ tcpci_partner_init(&test_fixture.charger_20v, PD_REV20); - test_fixture.charger_20v.extensions = - tcpci_src_emul_init(&test_fixture.src_ext, - &test_fixture.charger_20v, NULL); + test_fixture.charger_20v.extensions = tcpci_src_emul_init( + &test_fixture.src_ext, &test_fixture.charger_20v, NULL); test_fixture.src_ext.pdo[1] = PDO_FIXED(20000, 3000, PDO_FIXED_UNCONSTRAINED); @@ -89,10 +85,10 @@ ZTEST_SUITE(usb_attach_20v_3a_pd_charger, drivers_predicate_post_main, ZTEST(usb_attach_20v_3a_pd_charger, test_battery_is_charging) { - struct i2c_emul *i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); uint16_t battery_status; - zassume_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + zassume_ok(sbat_emul_get_word_val(emul, SB_BATTERY_STATUS, &battery_status), NULL); zassert_equal(battery_status & STATUS_DISCHARGING, 0, @@ -157,11 +153,11 @@ ZTEST(usb_attach_20v_3a_pd_charger, test_power_info) ZTEST_F(usb_attach_20v_3a_pd_charger, test_disconnect_battery_not_charging) { - struct i2c_emul *i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); uint16_t battery_status; - disconnect_charger_from_port(this); - zassert_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + disconnect_charger_from_port(fixture); + zassert_ok(sbat_emul_get_word_val(emul, SB_BATTERY_STATUS, &battery_status), NULL); zassert_equal(battery_status & STATUS_DISCHARGING, STATUS_DISCHARGING, @@ -172,7 +168,7 @@ ZTEST_F(usb_attach_20v_3a_pd_charger, test_disconnect_charge_state) { struct ec_response_charge_state charge_state; - disconnect_charger_from_port(this); + disconnect_charger_from_port(fixture); charge_state = host_cmd_charge_state(0); zassert_false(charge_state.get_state.ac, "AC_OK not triggered"); @@ -190,7 +186,7 @@ ZTEST_F(usb_attach_20v_3a_pd_charger, test_disconnect_typec_status) { struct ec_response_typec_status typec_status; - disconnect_charger_from_port(this); + disconnect_charger_from_port(fixture); typec_status = host_cmd_typec_status(0); zassert_false(typec_status.pd_enabled, NULL); @@ -208,7 +204,7 @@ ZTEST_F(usb_attach_20v_3a_pd_charger, test_disconnect_power_info) { struct ec_response_usb_pd_power_info power_info; - disconnect_charger_from_port(this); + disconnect_charger_from_port(fixture); power_info = host_cmd_power_info(0); zassert_equal(power_info.role, USB_PD_PORT_POWER_DISCONNECTED, diff --git a/zephyr/test/drivers/src/integration/usbc/usb_5v_3a_pd_sink.c b/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_sink.c index 1cbdda49b0..5654754838 100644 --- a/zephyr/test/drivers/src/integration/usbc/usb_5v_3a_pd_sink.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_sink.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <stdint.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "battery_smart.h" #include "emul/emul_isl923x.h" @@ -14,7 +14,6 @@ #include "test/drivers/test_state.h" #include "test/drivers/utils.h" #include "timer.h" -#include "usb_common.h" #include "usb_pd.h" struct usb_attach_5v_3a_pd_sink_fixture { @@ -33,51 +32,13 @@ struct usb_attach_5v_3a_pd_sink_fixture { /* Only used to verify sink capabilities being received by SRC port */ #define TEST_ADDITIONAL_SINK_CAP PDO_FIXED(TEST_SRC_PORT_VBUS_MV, 5000, 0) -static void -connect_sink_to_port(struct usb_attach_5v_3a_pd_sink_fixture *fixture) -{ - /* - * TODO(b/221439302) Updating the TCPCI emulator registers, updating the - * vbus, as well as alerting should all be a part of the connect - * function. - */ - isl923x_emul_set_adc_vbus(fixture->charger_emul, 0); - tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_VBUS_DET); - tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_EXT_STATUS, - TCPC_REG_EXT_STATUS_SAFE0V); - - tcpci_tcpc_alert(0); - k_sleep(K_SECONDS(1)); - - zassume_ok(tcpci_partner_connect_to_tcpci( - &fixture->sink_5v_3a, - fixture->tcpci_emul), - NULL); - - /* Wait for PD negotiation and current ramp. - * TODO(b/213906889): Check message timing and contents. - */ - k_sleep(K_SECONDS(10)); -} - -static inline void disconnect_sink_from_port( - struct usb_attach_5v_3a_pd_sink_fixture *fixture) -{ - zassume_ok(tcpci_emul_disconnect_partner(fixture->tcpci_emul), NULL); - k_sleep(K_SECONDS(1)); -} - static void *usb_attach_5v_3a_pd_sink_setup(void) { static struct usb_attach_5v_3a_pd_sink_fixture test_fixture; /* Get references for the emulators */ - test_fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - test_fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); - tcpci_emul_set_rev(test_fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); return &test_fixture; } @@ -94,37 +55,37 @@ static void usb_attach_5v_3a_pd_sink_before(void *data) /* Initialized the sink to request 5V and 3A */ tcpci_partner_init(&test_fixture->sink_5v_3a, PD_REV20); - test_fixture->sink_5v_3a.extensions = - tcpci_snk_emul_init(&test_fixture->snk_ext, - &test_fixture->sink_5v_3a, NULL); + test_fixture->sink_5v_3a.extensions = tcpci_snk_emul_init( + &test_fixture->snk_ext, &test_fixture->sink_5v_3a, NULL); test_fixture->snk_ext.pdo[0] = TEST_INITIAL_SINK_CAP; test_fixture->snk_ext.pdo[1] = TEST_ADDITIONAL_SINK_CAP; - connect_sink_to_port(test_fixture); + connect_sink_to_port(&test_fixture->sink_5v_3a, + test_fixture->tcpci_emul, + test_fixture->charger_emul); } static void usb_attach_5v_3a_pd_sink_after(void *data) { - disconnect_sink_from_port( - (struct usb_attach_5v_3a_pd_sink_fixture *)data); + struct usb_attach_5v_3a_pd_sink_fixture *test_fixture = data; + + disconnect_sink_from_port(test_fixture->tcpci_emul); } ZTEST_SUITE(usb_attach_5v_3a_pd_sink, drivers_predicate_post_main, - usb_attach_5v_3a_pd_sink_setup, - usb_attach_5v_3a_pd_sink_before, + usb_attach_5v_3a_pd_sink_setup, usb_attach_5v_3a_pd_sink_before, usb_attach_5v_3a_pd_sink_after, NULL); ZTEST_F(usb_attach_5v_3a_pd_sink, test_partner_pd_completed) { - zassert_true(this->snk_ext.pd_completed, NULL); + zassert_true(fixture->snk_ext.pd_completed, NULL); } ZTEST(usb_attach_5v_3a_pd_sink, test_battery_is_discharging) { - struct i2c_emul *i2c_emul = - sbat_emul_get_ptr(DT_DEP_ORD(DT_NODELABEL(battery))); + const struct emul *emul = EMUL_DT_GET(DT_NODELABEL(battery)); uint16_t battery_status; - zassume_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + zassume_ok(sbat_emul_get_word_val(emul, SB_BATTERY_STATUS, &battery_status), NULL); zassert_equal(battery_status & STATUS_DISCHARGING, STATUS_DISCHARGING, @@ -167,21 +128,20 @@ ZTEST(usb_attach_5v_3a_pd_sink, test_power_info) "Current max expected to be 1500mV, but was %dmV", info.meas.current_max); zassert_equal(info.meas.current_lim, 0, - "VBUS max is set to 0mA, but PD is reporting %dmA", - info.meas.current_lim); + "VBUS max is set to 0mA, but PD is reporting %dmA", + info.meas.current_lim); zassert_equal(info.max_power, 0, - "Charging expected to be at %duW, but PD max is %duW", - 0, info.max_power); + "Charging expected to be at %duW, but PD max is %duW", 0, + info.max_power); } ZTEST_F(usb_attach_5v_3a_pd_sink, test_disconnect_battery_discharging) { - struct i2c_emul *i2c_emul = - sbat_emul_get_ptr(DT_DEP_ORD(DT_NODELABEL(battery))); + const struct emul *emul = EMUL_DT_GET(DT_NODELABEL(battery)); uint16_t battery_status; - disconnect_sink_from_port(this); - zassert_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + disconnect_sink_from_port(fixture->tcpci_emul); + zassert_ok(sbat_emul_get_word_val(emul, SB_BATTERY_STATUS, &battery_status), NULL); zassert_equal(battery_status & STATUS_DISCHARGING, STATUS_DISCHARGING, @@ -192,7 +152,7 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, test_disconnect_charge_state) { struct ec_response_charge_state charge_state; - disconnect_sink_from_port(this); + disconnect_sink_from_port(fixture->tcpci_emul); charge_state = host_cmd_charge_state(0); zassert_false(charge_state.get_state.ac, "AC_OK not triggered"); @@ -210,7 +170,7 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, test_disconnect_typec_status) { struct ec_response_typec_status typec_status; - disconnect_sink_from_port(this); + disconnect_sink_from_port(fixture->tcpci_emul); typec_status = host_cmd_typec_status(0); zassert_false(typec_status.pd_enabled, NULL); @@ -228,7 +188,7 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, test_disconnect_power_info) { struct ec_response_usb_pd_power_info power_info; - disconnect_sink_from_port(this); + disconnect_sink_from_port(fixture->tcpci_emul); power_info = host_cmd_power_info(0); zassert_equal(power_info.role, USB_PD_PORT_POWER_DISCONNECTED, @@ -270,7 +230,7 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, verify_goto_min) pd_dpm_request(0, DPM_REQUEST_GOTO_MIN); k_sleep(K_SECONDS(1)); - zassert_true(this->snk_ext.pd_completed, NULL); + zassert_true(fixture->snk_ext.pd_completed, NULL); } /** @@ -286,33 +246,10 @@ ZTEST_F(usb_attach_5v_3a_pd_sink, verify_goto_min) */ ZTEST_F(usb_attach_5v_3a_pd_sink, verify_ping_msg) { - tcpci_snk_emul_clear_ping_received(&this->snk_ext); + tcpci_snk_emul_clear_ping_received(&fixture->snk_ext); pd_dpm_request(0, DPM_REQUEST_SEND_PING); k_sleep(K_USEC(PD_T_SOURCE_ACTIVITY)); - zassert_true(this->snk_ext.ping_received, NULL); -} - -/** - * @brief TestPurpose: Verify Alert message. - * - * @details - * - Clear alert_received in emulated partner - * - Broadcast PD Alert - * - Check pd_broadcast_alert_msg can set the ADO and run pd_dpm_request - * - Check that emulated partner received a PD_DATA_ALERT message - * - * Expected Results - * - EC_SUCCESS returned from pd_broadcast_alert_msg - * - sink_5v_3a.data.alert_received is true - */ -ZTEST_F(usb_attach_5v_3a_pd_sink, verify_alert_msg) -{ - tcpci_snk_emul_clear_alert_received(&this->snk_ext); - zassert_false(this->snk_ext.alert_received, NULL); - zassert_equal(pd_broadcast_alert_msg(ADO_OTP_EVENT), EC_SUCCESS, NULL); - - k_sleep(K_SECONDS(2)); - zassert_true(this->snk_ext.alert_received, NULL); + zassert_true(fixture->snk_ext.ping_received, NULL); } diff --git a/zephyr/test/drivers/src/integration/usbc/usb_5v_3a_pd_source.c b/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_source.c index 39745dd70b..4d89e8c0d3 100644 --- a/zephyr/test/drivers/src/integration/usbc/usb_5v_3a_pd_source.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_5v_3a_pd_source.c @@ -1,24 +1,20 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "battery_smart.h" #include "emul/emul_isl923x.h" #include "emul/emul_smart_battery.h" #include "emul/tcpc/emul_tcpci_partner_src.h" -#include "hooks.h" -#include "test/drivers/stubs.h" +#include "system.h" #include "test/drivers/test_state.h" #include "test/drivers/utils.h" #include "usb_pd.h" -#include "usb_prl_sm.h" -#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) - -#define TEST_USB_PORT USBC_PORT_C0 +#define BATTERY_NODE DT_NODELABEL(battery) struct usb_attach_5v_3a_pd_source_fixture { struct tcpci_partner_data source_5v_3a; @@ -32,20 +28,13 @@ static void *usb_attach_5v_3a_pd_source_setup(void) static struct usb_attach_5v_3a_pd_source_fixture test_fixture; /* Get references for the emulators */ - test_fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - test_fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); - - /* Configure TCPCI revision in board config and emulator */ - tcpc_config[0].flags |= TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(test_fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); /* Initialized the charger to supply 5V and 3A */ tcpci_partner_init(&test_fixture.source_5v_3a, PD_REV20); - test_fixture.source_5v_3a.extensions = - tcpci_src_emul_init(&test_fixture.src_ext, - &test_fixture.source_5v_3a, NULL); + test_fixture.source_5v_3a.extensions = tcpci_src_emul_init( + &test_fixture.src_ext, &test_fixture.source_5v_3a, NULL); test_fixture.src_ext.pdo[1] = PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); @@ -68,16 +57,15 @@ static void usb_attach_5v_3a_pd_source_after(void *data) } ZTEST_SUITE(usb_attach_5v_3a_pd_source, drivers_predicate_post_main, - usb_attach_5v_3a_pd_source_setup, - usb_attach_5v_3a_pd_source_before, + usb_attach_5v_3a_pd_source_setup, usb_attach_5v_3a_pd_source_before, usb_attach_5v_3a_pd_source_after, NULL); ZTEST(usb_attach_5v_3a_pd_source, test_battery_is_charging) { - struct i2c_emul *i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); uint16_t battery_status; - zassume_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + zassume_ok(sbat_emul_get_word_val(emul, SB_BATTERY_STATUS, &battery_status), NULL); zassert_equal(battery_status & STATUS_DISCHARGING, 0, @@ -142,11 +130,11 @@ ZTEST(usb_attach_5v_3a_pd_source, test_power_info) ZTEST_F(usb_attach_5v_3a_pd_source, test_disconnect_battery_not_charging) { - struct i2c_emul *i2c_emul = sbat_emul_get_ptr(BATTERY_ORD); + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); uint16_t battery_status; - disconnect_source_from_port(this->tcpci_emul, this->charger_emul); - zassert_ok(sbat_emul_get_word_val(i2c_emul, SB_BATTERY_STATUS, + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); + zassert_ok(sbat_emul_get_word_val(emul, SB_BATTERY_STATUS, &battery_status), NULL); zassert_equal(battery_status & STATUS_DISCHARGING, STATUS_DISCHARGING, @@ -157,7 +145,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source, test_disconnect_charge_state) { struct ec_response_charge_state charge_state; - disconnect_source_from_port(this->tcpci_emul, this->charger_emul); + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); charge_state = host_cmd_charge_state(0); zassert_false(charge_state.get_state.ac, "AC_OK not triggered"); @@ -175,7 +163,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source, test_disconnect_typec_status) { struct ec_response_typec_status typec_status; - disconnect_source_from_port(this->tcpci_emul, this->charger_emul); + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); typec_status = host_cmd_typec_status(0); zassert_false(typec_status.pd_enabled, NULL); @@ -193,7 +181,7 @@ ZTEST_F(usb_attach_5v_3a_pd_source, test_disconnect_power_info) { struct ec_response_usb_pd_power_info power_info; - disconnect_source_from_port(this->tcpci_emul, this->charger_emul); + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); power_info = host_cmd_power_info(0); zassert_equal(power_info.role, USB_PD_PORT_POWER_DISCONNECTED, @@ -219,57 +207,42 @@ ZTEST_F(usb_attach_5v_3a_pd_source, test_disconnect_power_info) power_info.meas.current_lim); } -ZTEST_F(usb_attach_5v_3a_pd_source, verify_dock_with_power_button) +ZTEST(usb_attach_5v_3a_pd_source, + test_ap_can_boot_on_low_battery_while_charging) { - /* Clear Alert and Status receive checks */ - tcpci_src_emul_clear_alert_received(&this->src_ext); - tcpci_src_emul_clear_status_received(&this->src_ext); - zassert_false(this->src_ext.alert_received, NULL); - zassert_false(this->src_ext.status_received, NULL); - - /* Setting up revision for the full Status message */ - prl_set_rev(TEST_USB_PORT, TCPCI_MSG_SOP, PD_REV30); - k_sleep(K_MSEC(10)); - pd_dpm_request(TEST_USB_PORT, DPM_REQUEST_GET_REVISION); - k_sleep(K_MSEC(10)); - - /* Suspend and check partner received Alert and Status messages */ - hook_notify(HOOK_CHIPSET_SUSPEND); - k_sleep(K_SECONDS(2)); - zassert_true(this->src_ext.alert_received, NULL); - zassert_true(this->src_ext.status_received, NULL); - tcpci_src_emul_clear_alert_received(&this->src_ext); - tcpci_src_emul_clear_status_received(&this->src_ext); - zassert_false(this->src_ext.alert_received, NULL); - zassert_false(this->src_ext.status_received, NULL); - - /* Shutdown and check partner received Alert and Status messages */ - hook_notify(HOOK_CHIPSET_SHUTDOWN); - k_sleep(K_SECONDS(2)); - zassert_true(this->src_ext.alert_received, NULL); - zassert_true(this->src_ext.status_received, NULL); - tcpci_src_emul_clear_alert_received(&this->src_ext); - tcpci_src_emul_clear_status_received(&this->src_ext); - zassert_false(this->src_ext.alert_received, NULL); - zassert_false(this->src_ext.status_received, NULL); - - /* Startup and check partner received Alert and Status messages */ - hook_notify(HOOK_CHIPSET_STARTUP); - k_sleep(K_SECONDS(2)); - zassert_true(this->src_ext.alert_received, NULL); - zassert_true(this->src_ext.status_received, NULL); - tcpci_src_emul_clear_alert_received(&this->src_ext); - tcpci_src_emul_clear_status_received(&this->src_ext); - zassert_false(this->src_ext.alert_received, NULL); - zassert_false(this->src_ext.status_received, NULL); - - /* Resume and check partner received Alert and Status messages */ - hook_notify(HOOK_CHIPSET_RESUME); - k_sleep(K_SECONDS(2)); - zassert_true(this->src_ext.alert_received, NULL); - zassert_true(this->src_ext.status_received, NULL); - tcpci_src_emul_clear_alert_received(&this->src_ext); - tcpci_src_emul_clear_status_received(&this->src_ext); - zassert_false(this->src_ext.alert_received, NULL); - zassert_false(this->src_ext.status_received, NULL); + const struct emul *smart_batt_emul = EMUL_DT_GET(DT_NODELABEL(battery)); + struct sbat_emul_bat_data *batt_data = + sbat_emul_get_bat_data(smart_batt_emul); + + /* Set capacity to what gives a charge percentage less than required + * for booting the AP + * + * Capacaity is reset by emulator's ZTEST_RULE + */ + batt_data->cap = (CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON * + batt_data->design_cap / 100) - + 1; + + zassert_true(system_can_boot_ap(), NULL); +} + +ZTEST_F(usb_attach_5v_3a_pd_source, + test_ap_fails_to_boot_on_low_battery_while_not_charging) +{ + const struct emul *smart_batt_emul = EMUL_DT_GET(DT_NODELABEL(battery)); + struct sbat_emul_bat_data *batt_data = + sbat_emul_get_bat_data(smart_batt_emul); + + /* Set capacity to what gives a charge percentage less than required + * for booting the AP + * + * Capacaity is reset by emulator's ZTEST_RULE + */ + batt_data->cap = (CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON * + batt_data->design_cap / 100) - + 1; + + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); + + zassert_false(system_can_boot_ap(), NULL); } diff --git a/zephyr/test/drivers/src/integration/usbc/usb_attach_src_snk.c b/zephyr/test/drivers/default/src/integration/usbc/usb_attach_src_snk.c index 31d5c329b1..761bb9daf1 100644 --- a/zephyr/test/drivers/src/integration/usbc/usb_attach_src_snk.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_attach_src_snk.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include "ec_commands.h" @@ -25,9 +25,6 @@ #define SNK_PORT USBC_PORT_C0 #define SRC_PORT USBC_PORT_C1 -#define TCPCI_EMUL_LABEL DT_NODELABEL(tcpci_emul) -#define TCPCI_PS8XXX_EMUL_LABEL DT_NODELABEL(tcpci_ps8xxx_emul) - #define DEFAULT_VBUS_MV 5000 /* Determined by CONFIG_PLATFORM_EC_USB_PD_PULLUP */ @@ -60,12 +57,9 @@ struct integration_usb_attach_snk_then_src_fixture { static void integration_usb_setup(struct emul_state *fixture) { - const struct emul *tcpci_emul = - emul_get_binding(DT_LABEL(TCPCI_EMUL_LABEL)); - const struct emul *tcpci_emul2 = - emul_get_binding(DT_LABEL(TCPCI_PS8XXX_EMUL_LABEL)); - const struct emul *charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); + const struct emul *tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + const struct emul *tcpci_emul2 = EMUL_GET_USBC_BINDING(1, tcpc); + const struct emul *charger_emul = EMUL_GET_USBC_BINDING(0, chg); /* Setting these are required because compiler believes these values are * not compile time constants. @@ -167,9 +161,6 @@ static void attach_emulated_snk(struct emul_state *my_emul_state) struct tcpci_partner_data *my_snk = &my_emul_state->my_snk; uint16_t power_reg_val; - /* Attach emulated sink */ - tcpci_emul_set_rev(tcpci_emul_snk, TCPCI_EMUL_REV2_0_VER1_1); - /* Turn on VBUS detection */ /* * TODO(b/223901282): integration tests should not be setting vbus @@ -200,9 +191,6 @@ static void attach_emulated_src(struct emul_state *my_emul_state) struct tcpci_partner_data *my_src = &my_emul_state->my_src; uint16_t power_reg_val; - /* Attach emulated charger. */ - tcpci_emul_set_rev(tcpci_emul_src, TCPCI_EMUL_REV2_0_VER1_1); - /* Turn on VBUS detection */ /* * TODO(b/223901282): integration tests should not be setting vbus @@ -605,15 +593,15 @@ static void usb_detach_test_after(void *state) ZTEST_F(usb_detach_test, verify_detach_src_snk) { - struct emul_state *fixture = &this->fixture; + struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info src_power_info = { 0 }; struct ec_response_usb_pd_power_info snk_power_info = { 0 }; - integration_usb_test_source_detach(fixture); - integration_usb_test_sink_detach(fixture); + integration_usb_test_source_detach(emul_state); + integration_usb_test_sink_detach(emul_state); k_sleep(K_SECONDS(10)); - isl923x_emul_set_adc_vbus(fixture->charger_isl923x_emul, 0); + isl923x_emul_set_adc_vbus(emul_state->charger_isl923x_emul, 0); snk_power_info = host_cmd_power_info(SNK_PORT); src_power_info = host_cmd_power_info(SRC_PORT); @@ -667,15 +655,15 @@ ZTEST_F(usb_detach_test, verify_detach_src_snk) ZTEST_F(usb_detach_test, verify_detach_snk_src) { - struct emul_state *fixture = &this->fixture; + struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info src_power_info = { 0 }; struct ec_response_usb_pd_power_info snk_power_info = { 0 }; - integration_usb_test_sink_detach(fixture); - integration_usb_test_source_detach(fixture); + integration_usb_test_sink_detach(emul_state); + integration_usb_test_source_detach(emul_state); k_sleep(K_SECONDS(10)); - isl923x_emul_set_adc_vbus(fixture->charger_isl923x_emul, 0); + isl923x_emul_set_adc_vbus(emul_state->charger_isl923x_emul, 0); snk_power_info = host_cmd_power_info(SNK_PORT); src_power_info = host_cmd_power_info(SRC_PORT); @@ -729,12 +717,12 @@ ZTEST_F(usb_detach_test, verify_detach_snk_src) ZTEST_F(usb_detach_test, verify_detach_sink) { - struct emul_state *fixture = &this->fixture; + struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info pd_power_info = { 0 }; - integration_usb_test_sink_detach(fixture); + integration_usb_test_sink_detach(emul_state); k_sleep(K_SECONDS(10)); - isl923x_emul_set_adc_vbus(fixture->charger_isl923x_emul, 0); + isl923x_emul_set_adc_vbus(emul_state->charger_isl923x_emul, 0); pd_power_info = host_cmd_power_info(SNK_PORT); @@ -771,12 +759,12 @@ ZTEST_F(usb_detach_test, verify_detach_sink) ZTEST_F(usb_detach_test, verify_detach_source) { - struct emul_state *fixture = &this->fixture; + struct emul_state *emul_state = &fixture->fixture; struct ec_response_usb_pd_power_info pd_power_info = { SNK_PORT }; - integration_usb_test_source_detach(fixture); + integration_usb_test_source_detach(emul_state); k_sleep(K_SECONDS(10)); - isl923x_emul_set_adc_vbus(fixture->charger_isl923x_emul, 0); + isl923x_emul_set_adc_vbus(emul_state->charger_isl923x_emul, 0); pd_power_info = host_cmd_power_info(SNK_PORT); diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c new file mode 100644 index 0000000000..9c76f862f8 --- /dev/null +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_bist_shared.c @@ -0,0 +1,193 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "emul/emul_isl923x.h" +#include "emul/emul_smart_battery.h" +#include "emul/tcpc/emul_tcpci_partner_snk.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "usb_common.h" +#include "usb_pd.h" +#include "util.h" + +struct usb_pd_bist_shared_fixture { + struct tcpci_partner_data sink_5v_500ma; + struct tcpci_snk_emul_data snk_ext_500ma; + struct tcpci_partner_data src; + struct tcpci_src_emul_data src_ext; + const struct emul *tcpci_emul; /* USBC_PORT_C0 in dts */ + const struct emul *tcpci_ps8xxx_emul; /* USBC_PORT_C1 in dts */ + const struct emul *charger_emul; +}; + +static void *usb_pd_bist_shared_setup(void) +{ + static struct usb_pd_bist_shared_fixture test_fixture; + + /* Get references for the emulators */ + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); + test_fixture.tcpci_ps8xxx_emul = EMUL_GET_USBC_BINDING(1, tcpc); + + return &test_fixture; +} + +static void usb_pd_bist_shared_before(void *data) +{ + struct usb_pd_bist_shared_fixture *test_fixture = data; + + /* Set chipset to ON, this will set TCPM to DRP */ + test_set_chipset_to_s0(); + + /* TODO(b/214401892): Check why need to give time TCPM to spin */ + k_sleep(K_SECONDS(1)); + + /* Initialized the sink to request 5V and 500mA */ + tcpci_partner_init(&test_fixture->sink_5v_500ma, PD_REV30); + test_fixture->sink_5v_500ma.extensions = + tcpci_snk_emul_init(&test_fixture->snk_ext_500ma, + &test_fixture->sink_5v_500ma, NULL); + test_fixture->snk_ext_500ma.pdo[0] = PDO_FIXED(5000, 500, 0); + + /* Initialized the source */ + tcpci_partner_init(&test_fixture->src, PD_REV30); + test_fixture->src.extensions = tcpci_src_emul_init( + &test_fixture->src_ext, &test_fixture->src, NULL); + + /* Initially connect the 5V 500mA partner to C0 */ + connect_sink_to_port(&test_fixture->sink_5v_500ma, + test_fixture->tcpci_emul, + test_fixture->charger_emul); +} + +static void usb_pd_bist_shared_after(void *data) +{ + struct usb_pd_bist_shared_fixture *test_fixture = data; + + /* Disocnnect C0 as sink, C1 as source */ + disconnect_sink_from_port(test_fixture->tcpci_emul); + disconnect_source_from_port(test_fixture->tcpci_ps8xxx_emul, + test_fixture->charger_emul); +} + +ZTEST_SUITE(usb_pd_bist_shared, drivers_predicate_post_main, + usb_pd_bist_shared_setup, usb_pd_bist_shared_before, + usb_pd_bist_shared_after, NULL); + +ZTEST_F(usb_pd_bist_shared, verify_bist_shared_mode) +{ + uint32_t bist_data; + uint32_t f5v_cap; + + /* + * Verify we were offered the 1.5A source cap because of our low current + * needs initially + */ + f5v_cap = fixture->snk_ext_500ma.last_5v_source_cap; + /* Capability should be 5V fixed, 1.5 A */ + zassert_equal((f5v_cap & PDO_TYPE_MASK), PDO_TYPE_FIXED, + "PDO type wrong"); + zassert_equal(PDO_FIXED_VOLTAGE(f5v_cap), 5000, "PDO voltage wrong"); + zassert_equal(PDO_FIXED_CURRENT(f5v_cap), 1500, + "PDO initial current wrong"); + + /* Start up BIST shared test mode */ + bist_data = BDO(BDO_MODE_SHARED_ENTER, 0); + zassume_ok(tcpci_partner_send_data_msg(&fixture->sink_5v_500ma, + PD_DATA_BIST, &bist_data, 1, 0), + "Failed to send BIST enter message"); + + /* The DUT has tBISTSharedTestMode (1 second) to offer us 3A now */ + k_sleep(K_SECONDS(1)); + + f5v_cap = fixture->snk_ext_500ma.last_5v_source_cap; + /* Capability should be 5V fixed, 3.0 A */ + zassert_equal((f5v_cap & PDO_TYPE_MASK), PDO_TYPE_FIXED, + "PDO type wrong"); + zassert_equal(PDO_FIXED_VOLTAGE(f5v_cap), 5000, "PDO voltage wrong"); + zassert_equal(PDO_FIXED_CURRENT(f5v_cap), 3000, + "PDO current didn't increase in BIST mode"); + + /* Leave BIST shared test mode */ + bist_data = BDO(BDO_MODE_SHARED_EXIT, 0); + zassume_ok(tcpci_partner_send_data_msg(&fixture->sink_5v_500ma, + PD_DATA_BIST, &bist_data, 1, 0), + "Failed to send BIST exit message"); + + /* + * The DUT may now execute ErrorRecovery or simply send a new + * Source_Cap. Either way, we should go back to 1.5 A + */ + k_sleep(K_SECONDS(5)); + + f5v_cap = fixture->snk_ext_500ma.last_5v_source_cap; + /* Capability should be 5V fixed, 1.5 A */ + zassert_equal((f5v_cap & PDO_TYPE_MASK), PDO_TYPE_FIXED, + "PDO type wrong"); + zassert_equal(PDO_FIXED_VOLTAGE(f5v_cap), 5000, "PDO voltage wrong"); + zassert_equal(PDO_FIXED_CURRENT(f5v_cap), 1500, + "PDO current didn't decrease after BIST exit"); +} + +ZTEST_F(usb_pd_bist_shared, verify_bist_shared_no_snk_entry) +{ + uint32_t bist_data; + uint32_t f5v_cap; + + /* + * Ensure we only enter BIST shared mode when acting as a source. We + * must not enter shared mode from PE_SNK_Ready. + */ + + /* Attach a new source */ + connect_source_to_port(&fixture->src, &fixture->src_ext, 1, + fixture->tcpci_ps8xxx_emul, + fixture->charger_emul); + + /* Have the source send the BIST Enter Mode */ + bist_data = BDO(BDO_MODE_SHARED_ENTER, 0); + zassume_ok(tcpci_partner_send_data_msg(&fixture->src, PD_DATA_BIST, + &bist_data, 1, 0), + "Failed to send BIST enter message"); + + /* Wait tBISTSharedTestMode (1 second) */ + k_sleep(K_SECONDS(1)); + + /* Verify our low power sink on C0 still only has 1.5 A */ + f5v_cap = fixture->snk_ext_500ma.last_5v_source_cap; + /* Capability should be 5V fixed, 1.5 A */ + zassert_equal((f5v_cap & PDO_TYPE_MASK), PDO_TYPE_FIXED, + "PDO type wrong"); + zassert_equal(PDO_FIXED_VOLTAGE(f5v_cap), 5000, "PDO voltage wrong"); + zassert_equal(PDO_FIXED_CURRENT(f5v_cap), 1500, + "PDO current incorrect after bad BIST entry"); +} + +ZTEST_F(usb_pd_bist_shared, verify_bist_shared_exit_no_action) +{ + uint32_t bist_data; + uint32_t f5v_cap; + + /* + * Verify that if we receive a BIST shared mode exit with no entry, we + * take no action on the port. + */ + tcpci_snk_emul_clear_last_5v_cap(&fixture->snk_ext_500ma); + + bist_data = BDO(BDO_MODE_SHARED_EXIT, 0); + zassume_ok(tcpci_partner_send_data_msg(&fixture->sink_5v_500ma, + PD_DATA_BIST, &bist_data, 1, 0), + "Failed to send BIST exit message"); + + /* Wait for the time it would take to settle out exit */ + k_sleep(K_SECONDS(5)); + + /* Verify we didn't receive any new source caps due to the mode exit */ + f5v_cap = fixture->snk_ext_500ma.last_5v_source_cap; + zassert_equal(f5v_cap, 0, "Received unexpected source cap"); +} diff --git a/zephyr/test/drivers/src/integration/usbc/usb_pd_ctrl_msg.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c index dd4c805590..894deaed13 100644 --- a/zephyr/test/drivers/src/integration/usbc/usb_pd_ctrl_msg.c +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_ctrl_msg.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <stdint.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "common.h" #include "ec_tasks.h" @@ -17,9 +17,8 @@ #include "test/usb_pe.h" #include "usb_pd.h" -#define TEST_USB_PORT USBC_PORT_C0 - -#define TCPCI_EMUL_LABEL DT_NODELABEL(tcpci_emul) +#define TEST_USB_PORT 0 +BUILD_ASSERT(TEST_USB_PORT == USBC_PORT_C0); #define TEST_ADDED_PDO PDO_FIXED(10000, 3000, PDO_FIXED_UNCONSTRAINED) @@ -41,10 +40,10 @@ struct usb_pd_ctrl_msg_test_source_fixture { struct usb_pd_ctrl_msg_test_fixture fixture; }; -static void tcpci_drp_emul_connect_partner( - struct tcpci_partner_data *partner_emul, - const struct emul *tcpci_emul, - const struct emul *charger_emul) +static void +tcpci_drp_emul_connect_partner(struct tcpci_partner_data *partner_emul, + const struct emul *tcpci_emul, + const struct emul *charger_emul) { /* * TODO(b/221439302) Updating the TCPCI emulator registers, updating the @@ -75,12 +74,8 @@ static void *usb_pd_ctrl_msg_setup_emul(void) static struct usb_pd_ctrl_msg_test_fixture fixture; /* Get references for the emulators */ - fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); - - tcpci_emul_set_rev(fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); + fixture.tcpci_emul = EMUL_GET_USBC_BINDING(TEST_USB_PORT, tcpc); + fixture.charger_emul = EMUL_GET_USBC_BINDING(TEST_USB_PORT, chg); return &fixture; } @@ -122,15 +117,13 @@ static void usb_pd_ctrl_msg_before(void *data) /* Initialized DRP */ tcpci_partner_init(&fixture->partner_emul, PD_REV20); - fixture->partner_emul.extensions = - tcpci_drp_emul_init(&fixture->drp_ext, &fixture->partner_emul, - fixture->drp_partner_pd_role, - tcpci_src_emul_init(&fixture->src_ext, - &fixture->partner_emul, - NULL), - tcpci_snk_emul_init(&fixture->snk_ext, - &fixture->partner_emul, - NULL)); + fixture->partner_emul.extensions = tcpci_drp_emul_init( + &fixture->drp_ext, &fixture->partner_emul, + fixture->drp_partner_pd_role, + tcpci_src_emul_init(&fixture->src_ext, &fixture->partner_emul, + NULL), + tcpci_snk_emul_init(&fixture->snk_ext, &fixture->partner_emul, + NULL)); /* Add additional Sink PDO to partner to verify * PE_DR_SNK_Get_Sink_Cap/PE_SRC_Get_Sink_Cap (these are shared PE * states) state was reached @@ -166,7 +159,7 @@ ZTEST_SUITE(usb_pd_ctrl_msg_test_source, drivers_predicate_post_main, ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_vconn_swap) { - struct usb_pd_ctrl_msg_test_fixture *fixture = &this->fixture; + struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; struct ec_response_typec_status snk_resp = { 0 }; int rv = 0; @@ -176,7 +169,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_vconn_swap) "SNK Returned vconn_role=%u", snk_resp.vconn_role); /* Send VCONN_SWAP request */ - rv = tcpci_partner_send_control_msg(&fixture->partner_emul, + rv = tcpci_partner_send_control_msg(&super_fixture->partner_emul, PD_CTRL_VCONN_SWAP, 0); zassert_ok(rv, "Failed to send VCONN_SWAP request, rv=%d", rv); @@ -189,7 +182,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_vconn_swap) ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_pr_swap) { - struct usb_pd_ctrl_msg_test_fixture *fixture = &this->fixture; + struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; struct ec_response_typec_status snk_resp = { 0 }; int rv = 0; @@ -201,16 +194,16 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_pr_swap) /* Ignore ACCEPT in common handler for PR Swap request, * causes soft reset */ - tcpci_partner_common_handler_mask_msg(&fixture->partner_emul, + tcpci_partner_common_handler_mask_msg(&super_fixture->partner_emul, PD_CTRL_ACCEPT, true); /* Send PR_SWAP request */ - rv = tcpci_partner_send_control_msg(&fixture->partner_emul, + rv = tcpci_partner_send_control_msg(&super_fixture->partner_emul, PD_CTRL_PR_SWAP, 0); zassert_ok(rv, "Failed to send PR_SWAP request, rv=%d", rv); /* Send PS_RDY request */ - rv = tcpci_partner_send_control_msg(&fixture->partner_emul, + rv = tcpci_partner_send_control_msg(&super_fixture->partner_emul, PD_CTRL_PS_RDY, 15); zassert_ok(rv, "Failed to send PS_RDY request, rv=%d", rv); @@ -255,7 +248,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_sink, verify_dr_swap) */ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_dr_swap_rejected) { - struct usb_pd_ctrl_msg_test_fixture *fixture = &this->fixture; + struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; struct ec_response_typec_status typec_status = { 0 }; int rv = 0; @@ -264,7 +257,7 @@ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_dr_swap_rejected) "Returned data_role=%u", typec_status.data_role); /* Send DR_SWAP request */ - rv = tcpci_partner_send_control_msg(&fixture->partner_emul, + rv = tcpci_partner_send_control_msg(&super_fixture->partner_emul, PD_CTRL_DR_SWAP, 0); zassert_ok(rv, "Failed to send DR_SWAP request, rv=%d", rv); @@ -359,11 +352,11 @@ ZTEST(usb_pd_ctrl_msg_test_sink, verify_get_sink_cap) */ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_bist_tx_mode2) { - struct usb_pd_ctrl_msg_test_fixture *fixture = &this->fixture; + struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; uint32_t bdo = BDO(BDO_MODE_CARRIER2, 0); - tcpci_partner_send_data_msg(&fixture->partner_emul, - PD_DATA_BIST, &bdo, 1, 0); + tcpci_partner_send_data_msg(&super_fixture->partner_emul, PD_DATA_BIST, + &bdo, 1, 0); pd_dpm_request(TEST_USB_PORT, DPM_REQUEST_BIST_TX); k_sleep(K_MSEC(10)); @@ -386,17 +379,17 @@ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_bist_tx_mode2) */ ZTEST_F(usb_pd_ctrl_msg_test_source, verify_bist_tx_test_data) { - struct usb_pd_ctrl_msg_test_fixture *fixture = &this->fixture; + struct usb_pd_ctrl_msg_test_fixture *super_fixture = &fixture->fixture; uint32_t bdo = BDO(BDO_MODE_TEST_DATA, 0); - tcpci_partner_send_data_msg(&fixture->partner_emul, - PD_DATA_BIST, &bdo, 1, 0); + tcpci_partner_send_data_msg(&super_fixture->partner_emul, PD_DATA_BIST, + &bdo, 1, 0); pd_dpm_request(TEST_USB_PORT, DPM_REQUEST_BIST_TX); k_sleep(K_SECONDS(5)); zassert_equal(get_state_pe(TEST_USB_PORT), PE_BIST_TX, NULL); - tcpci_partner_common_send_hard_reset(&fixture->partner_emul); + tcpci_partner_common_send_hard_reset(&super_fixture->partner_emul); k_sleep(K_SECONDS(1)); zassert_equal(get_state_pe(TEST_USB_PORT), PE_SNK_READY, NULL); } diff --git a/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c new file mode 100644 index 0000000000..fbe634a838 --- /dev/null +++ b/zephyr/test/drivers/default/src/integration/usbc/usb_pd_rev3.c @@ -0,0 +1,358 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "battery.h" +#include "battery_smart.h" +#include "chipset.h" +#include "emul/emul_isl923x.h" +#include "emul/emul_smart_battery.h" +#include "emul/tcpc/emul_tcpci_partner_src.h" +#include "hooks.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "usb_common.h" +#include "usb_pd.h" +#include "util.h" + +struct usb_attach_5v_3a_pd_source_rev3_fixture { + struct tcpci_partner_data source_5v_3a; + struct tcpci_src_emul_data src_ext; + const struct emul *tcpci_emul; + const struct emul *charger_emul; +}; + +static void *usb_attach_5v_3a_pd_source_setup(void) +{ + static struct usb_attach_5v_3a_pd_source_rev3_fixture test_fixture; + + /* Get references for the emulators */ + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(0, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(0, chg); + + /* Initialized the charger to supply 5V and 3A */ + tcpci_partner_init(&test_fixture.source_5v_3a, PD_REV30); + test_fixture.source_5v_3a.extensions = tcpci_src_emul_init( + &test_fixture.src_ext, &test_fixture.source_5v_3a, NULL); + test_fixture.src_ext.pdo[1] = + PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); + + return &test_fixture; +} + +static void usb_attach_5v_3a_pd_source_before(void *data) +{ + struct usb_attach_5v_3a_pd_source_rev3_fixture *fixture = data; + + connect_source_to_port(&fixture->source_5v_3a, &fixture->src_ext, 1, + fixture->tcpci_emul, fixture->charger_emul); + + /* Clear Alert and Status receive checks */ + tcpci_src_emul_clear_alert_received(&fixture->src_ext); + tcpci_src_emul_clear_status_received(&fixture->src_ext); + zassume_false(fixture->src_ext.alert_received, NULL); + zassume_false(fixture->src_ext.status_received, NULL); + + /* Initial check on power state */ + zassume_true(chipset_in_state(CHIPSET_STATE_ON), NULL); +} + +static void usb_attach_5v_3a_pd_source_after(void *data) +{ + struct usb_attach_5v_3a_pd_source_rev3_fixture *fixture = data; + + disconnect_source_from_port(fixture->tcpci_emul, fixture->charger_emul); +} + +ZTEST_SUITE(usb_attach_5v_3a_pd_source_rev3, drivers_predicate_post_main, + usb_attach_5v_3a_pd_source_setup, usb_attach_5v_3a_pd_source_before, + usb_attach_5v_3a_pd_source_after, NULL); + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_batt_cap) +{ + int battery_index = 0; + + tcpci_partner_common_send_get_battery_capabilities( + &fixture->source_5v_3a, battery_index); + + /* Allow some time for TCPC to process and respond */ + k_sleep(K_SECONDS(1)); + + zassert_true(fixture->source_5v_3a.battery_capabilities + .have_response[battery_index], + "No battery capabilities response stored."); + + /* The response */ + struct pd_bcdb *bcdb = + &fixture->source_5v_3a.battery_capabilities.bcdb[battery_index]; + + zassert_equal(USB_VID_GOOGLE, bcdb->vid, "Incorrect battery VID"); + zassert_equal(CONFIG_USB_PID, bcdb->pid, "Incorrect battery PID"); + zassert_false((bcdb->battery_type) & BIT(0), + "Invalid battery ref bit should not be set"); + + /* Verify the battery capacity and last full charge capacity. These + * fields require that the battery is present and that we can + * access information about the nominal voltage and capacity. + * + * TODO(b/237427945): Add test for case when battery is not present + */ + + /* See pe_give_battery_cap_entry() in common/usbc/usb_pe_drp_sm.c */ + + zassume_true(battery_is_present(), "Battery must be present"); + zassume_true(IS_ENABLED(HAS_TASK_HOSTCMD) && + *host_get_memmap(EC_MEMMAP_BATTERY_VERSION) != 0, + "Cannot access battery data"); + + /* Millivolts */ + int design_volt = *(int *)host_get_memmap(EC_MEMMAP_BATT_DVLT); + + /* Milliamphours */ + int design_cap = *(int *)host_get_memmap(EC_MEMMAP_BATT_DCAP); + int full_cap = *(int *)host_get_memmap(EC_MEMMAP_BATT_LFCC); + + /* Multiply millivolts by milliamphours and scale to deciwatthours + * (0.1 Wh), the unit of energy used in the PD messages. + */ + + int expected_design_cap = + DIV_ROUND_NEAREST((design_cap * design_volt), 1000 * 1000 / 10); + + int expected_last_charge_cap = + DIV_ROUND_NEAREST((design_cap * full_cap), 1000 * 1000 / 10); + + zassert_equal(expected_design_cap, bcdb->design_cap, + "Design capacity not correct. Expected %d but got %d", + expected_design_cap, bcdb->design_cap); + zassert_equal( + expected_last_charge_cap, bcdb->last_full_charge_cap, + "Last full charge capacity not correct. Expected %d but got %d", + expected_last_charge_cap, bcdb->last_full_charge_cap); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, test_batt_cap_invalid) +{ + /* Request data on a battery that does not exist. The PD stack only + * supports battery 0. + */ + + int battery_index = 5; + + tcpci_partner_common_send_get_battery_capabilities( + &fixture->source_5v_3a, battery_index); + + /* Allow some time for TCPC to process and respond */ + k_sleep(K_SECONDS(1)); + + /* Ensure we get a response that says our battery index was invalid */ + + zassert_true(fixture->source_5v_3a.battery_capabilities + .have_response[battery_index], + "No battery capabilities response stored."); + zassert_true( + (fixture->source_5v_3a.battery_capabilities.bcdb[battery_index] + .battery_type) & + BIT(0), + "Invalid battery ref bit should be set"); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_alert_msg) +{ + zassume_equal(pd_broadcast_alert_msg(ADO_OTP_EVENT), EC_SUCCESS, NULL); + + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_alert_on_power_state_change) +{ + /* Suspend and check partner received Alert and Status messages */ + hook_notify(HOOK_CHIPSET_SUSPEND); + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); + zassert_true(fixture->src_ext.status_received, NULL); + tcpci_src_emul_clear_alert_received(&fixture->src_ext); + tcpci_src_emul_clear_status_received(&fixture->src_ext); + zassume_false(fixture->src_ext.alert_received, NULL); + zassume_false(fixture->src_ext.status_received, NULL); + + /* Shutdown and check partner received Alert and Status messages */ + hook_notify(HOOK_CHIPSET_SHUTDOWN); + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); + zassert_true(fixture->src_ext.status_received, NULL); + tcpci_src_emul_clear_alert_received(&fixture->src_ext); + tcpci_src_emul_clear_status_received(&fixture->src_ext); + zassume_false(fixture->src_ext.alert_received, NULL); + zassume_false(fixture->src_ext.status_received, NULL); + + /* Startup and check partner received Alert and Status messages */ + hook_notify(HOOK_CHIPSET_STARTUP); + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); + zassert_true(fixture->src_ext.status_received, NULL); + tcpci_src_emul_clear_alert_received(&fixture->src_ext); + tcpci_src_emul_clear_status_received(&fixture->src_ext); + zassume_false(fixture->src_ext.alert_received, NULL); + zassume_false(fixture->src_ext.status_received, NULL); + + /* Resume and check partner received Alert and Status messages */ + hook_notify(HOOK_CHIPSET_RESUME); + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); + zassert_true(fixture->src_ext.status_received, NULL); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, + verify_inaction_on_pd_button_press_while_awake) +{ + uint32_t ado; + + /* While awake expect nothing on valid press */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_false(fixture->src_ext.alert_received, NULL); + zassert_false(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ON), NULL); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, + verify_inaction_on_invalid_pd_button_press) +{ + uint32_t ado; + + /* Shutdown device to test wake from USB PD power button */ + chipset_force_shutdown(CHIPSET_SHUTDOWN_BUTTON); + k_sleep(K_SECONDS(10)); + + /* Clear alert and status flags set during shutdown */ + tcpci_src_emul_clear_alert_received(&fixture->src_ext); + tcpci_src_emul_clear_status_received(&fixture->src_ext); + zassume_false(fixture->src_ext.alert_received, NULL); + zassume_false(fixture->src_ext.status_received, NULL); + zassume_true(chipset_in_state(CHIPSET_STATE_ANY_OFF), NULL); + + /* While in S5/G3 expect nothing on invalid (too long) press */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(10)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_false(fixture->src_ext.alert_received, NULL); + zassert_false(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ANY_OFF), NULL); + + /* Wake device to setup for subsequent tests */ + chipset_power_on(); + k_sleep(K_SECONDS(10)); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_startup_on_pd_button_press) +{ + uint32_t ado; + + /* Shutdown device to test wake from USB PD power button */ + chipset_force_shutdown(CHIPSET_SHUTDOWN_BUTTON); + k_sleep(K_SECONDS(10)); + + /* Clear alert and status flags set during shutdown */ + tcpci_src_emul_clear_alert_received(&fixture->src_ext); + tcpci_src_emul_clear_status_received(&fixture->src_ext); + zassume_false(fixture->src_ext.alert_received, NULL); + zassume_false(fixture->src_ext.status_received, NULL); + zassume_true(chipset_in_state(CHIPSET_STATE_ANY_OFF), NULL); + + /* While in S5/G3 expect Alert->Get_Status->Status on valid press */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); + zassert_true(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ON), NULL); +} + +ZTEST_F(usb_attach_5v_3a_pd_source_rev3, verify_chipset_on_pd_button_behavior) +{ + uint32_t ado; + + /* Expect no power state change on short press */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_false(fixture->src_ext.alert_received, NULL); + zassert_false(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ON), NULL); + + /* Expect no change on invalid button press while chipset is on */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(10)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_false(fixture->src_ext.alert_received, NULL); + zassert_false(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ON), NULL); + + /* + * Expect no power state change on 6 second press->press->release due + * to the timers resetting on the second press. + */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(3)); + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(3)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_false(fixture->src_ext.alert_received, NULL); + zassert_false(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ON), NULL); + + /* Expect power state change on long press */ + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_PRESS; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(6)); + ado = ADO_EXTENDED_ALERT_EVENT | ADO_POWER_BUTTON_RELEASE; + tcpci_partner_send_data_msg(&fixture->source_5v_3a, PD_DATA_ALERT, &ado, + 1, 0); + k_sleep(K_SECONDS(2)); + zassert_true(fixture->src_ext.alert_received, NULL); + zassert_true(fixture->src_ext.status_received, NULL); + zassert_true(chipset_in_state(CHIPSET_STATE_ANY_OFF), NULL); + + /* Wake device to setup for subsequent tests */ + chipset_power_on(); + k_sleep(K_SECONDS(10)); +} diff --git a/zephyr/test/drivers/src/isl923x.c b/zephyr/test/drivers/default/src/isl923x.c index 203a2ed979..9144730887 100644 --- a/zephyr/test/drivers/src/isl923x.c +++ b/zephyr/test/drivers/default/src/isl923x.c @@ -1,11 +1,11 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/emul.h> -#include <fff.h> +#include <zephyr/fff.h> #include "battery.h" #include "battery_smart.h" @@ -45,9 +45,10 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_CHARGER_ISL9238), #endif #define CHARGER_NUM get_charger_num(&isl923x_drv) -#define ISL923X_EMUL emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))) +#define ISL923X_EMUL EMUL_DT_GET(DT_NODELABEL(isl923x_emul)) +#define COMMON_DATA emul_isl923x_get_i2c_common_data(ISL923X_EMUL) -static int mock_write_fn_always_fail(struct i2c_emul *emul, int reg, +static int mock_write_fn_always_fail(const struct emul *emul, int reg, uint8_t val, int bytes, void *data) { ztest_test_fail(); @@ -56,8 +57,6 @@ static int mock_write_fn_always_fail(struct i2c_emul *emul, int reg, ZTEST(isl923x, test_isl923x_set_current) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); int expected_current_milli_amps[] = { EXPECTED_CURRENT_MA(0), EXPECTED_CURRENT_MA(4), EXPECTED_CURRENT_MA(8), EXPECTED_CURRENT_MA(16), @@ -69,13 +68,13 @@ ZTEST(isl923x, test_isl923x_set_current) int current_milli_amps; /* Test I2C failure when reading charge current */ - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CHG_CURRENT); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CHG_CURRENT); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_current(CHARGER_NUM, ¤t_milli_amps), NULL); /* Reset fail register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); for (int i = 0; i < ARRAY_SIZE(expected_current_milli_amps); ++i) { @@ -129,43 +128,40 @@ ZTEST(isl923x, test_isl923x_set_voltage) ZTEST(isl923x, test_isl923x_set_input_current_limit) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); - int expected_current_milli_amps[] = { - EXPECTED_INPUT_CURRENT_MA(0), - EXPECTED_INPUT_CURRENT_MA(4), - EXPECTED_INPUT_CURRENT_MA(8), - EXPECTED_INPUT_CURRENT_MA(16), - EXPECTED_INPUT_CURRENT_MA(32), - EXPECTED_INPUT_CURRENT_MA(64), - EXPECTED_INPUT_CURRENT_MA(128), - EXPECTED_INPUT_CURRENT_MA(256), - EXPECTED_INPUT_CURRENT_MA(512), - EXPECTED_INPUT_CURRENT_MA(1024), - EXPECTED_INPUT_CURRENT_MA(2048), - EXPECTED_INPUT_CURRENT_MA(4096) }; + int expected_current_milli_amps[] = { EXPECTED_INPUT_CURRENT_MA(0), + EXPECTED_INPUT_CURRENT_MA(4), + EXPECTED_INPUT_CURRENT_MA(8), + EXPECTED_INPUT_CURRENT_MA(16), + EXPECTED_INPUT_CURRENT_MA(32), + EXPECTED_INPUT_CURRENT_MA(64), + EXPECTED_INPUT_CURRENT_MA(128), + EXPECTED_INPUT_CURRENT_MA(256), + EXPECTED_INPUT_CURRENT_MA(512), + EXPECTED_INPUT_CURRENT_MA(1024), + EXPECTED_INPUT_CURRENT_MA(2048), + EXPECTED_INPUT_CURRENT_MA(4096) }; int current_milli_amps; /* Test failing to write to current limit 1 reg */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_ADAPTER_CURRENT_LIMIT1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.set_input_current_limit(CHARGER_NUM, 0), NULL); /* Test failing to write to current limit 2 reg */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_ADAPTER_CURRENT_LIMIT2); zassert_equal(EC_ERROR_INVAL, isl923x_drv.set_input_current_limit(CHARGER_NUM, 0), NULL); /* Reset fail register */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test failing to read current limit 1 reg */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_ADAPTER_CURRENT_LIMIT1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_input_current_limit(CHARGER_NUM, @@ -173,7 +169,7 @@ ZTEST(isl923x, test_isl923x_set_input_current_limit) NULL); /* Reset fail register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test normal code path */ @@ -201,7 +197,6 @@ ZTEST(isl923x, test_isl923x_psys) ZTEST(isl923x, test_manufacturer_id) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); int id; isl923x_emul_set_manufacturer_id(isl923x_emul, 0x1234); @@ -209,20 +204,19 @@ ZTEST(isl923x, test_manufacturer_id) zassert_equal(0x1234, id, NULL); /* Test read error */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_MANUFACTURER_ID); zassert_equal(EC_ERROR_INVAL, isl923x_drv.manufacturer_id(CHARGER_NUM, &id), NULL); /* Reset fail register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST(isl923x, test_device_id) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); int id; isl923x_emul_set_device_id(isl923x_emul, 0x5678); @@ -230,48 +224,45 @@ ZTEST(isl923x, test_device_id) zassert_equal(0x5678, id, NULL); /* Test read error */ - i2c_common_emul_set_read_fail_reg(i2c_emul, - ISL923X_REG_DEVICE_ID); - zassert_equal(EC_ERROR_INVAL, - isl923x_drv.device_id(CHARGER_NUM, &id), NULL); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_DEVICE_ID); + zassert_equal(EC_ERROR_INVAL, isl923x_drv.device_id(CHARGER_NUM, &id), + NULL); /* Reset fail register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST(isl923x, test_options) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint32_t option; /* Test failed control 0 read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL0); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL0); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_option(CHARGER_NUM, &option), NULL); /* Test failed control 1 read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_option(CHARGER_NUM, &option), NULL); /* Reset failed read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test failed control 0 write */ - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL0); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL0); zassert_equal(EC_ERROR_INVAL, isl923x_drv.set_option(CHARGER_NUM, option), NULL); /* Test failed control 1 write */ - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.set_option(CHARGER_NUM, option), NULL); /* Reset failed write */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test normal write/read, note that bits 23 and 0 are always 0 */ @@ -335,7 +326,6 @@ ZTEST(isl923x, test_set_ac_prochot) { const struct emul *isl923x_emul = ISL923X_EMUL; const struct device *i2c_dev = isl923x_emul_get_parent(isl923x_emul); - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint16_t expected_current_milli_amps[] = { EXPECTED_INPUT_CURRENT_MA(0), EXPECTED_INPUT_CURRENT_MA(128), @@ -354,12 +344,12 @@ ZTEST(isl923x, test_set_ac_prochot) NULL); /* Test failed I2C write to prochot register */ - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_PROCHOT_AC); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_PROCHOT_AC); zassert_equal(EC_ERROR_INVAL, isl923x_set_ac_prochot(CHARGER_NUM, 0), NULL); /* Clear write fail reg */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); for (int i = 0; i < ARRAY_SIZE(expected_current_milli_amps); ++i) { @@ -379,8 +369,9 @@ ZTEST(isl923x, test_set_ac_prochot) CHARGER_NUM, expected_current_milli_amps[i]), "Failed to set AC prochot to %dmA", expected_current_milli_amps[i]); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ¤t_milli_amps, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), + ¤t_milli_amps, sizeof(current_milli_amps)), "Failed to read AC prochot register"); zassert_equal(EXPECTED_INPUT_CURRENT_REG( @@ -396,7 +387,6 @@ ZTEST(isl923x, test_set_dc_prochot) { const struct emul *isl923x_emul = ISL923X_EMUL; const struct device *i2c_dev = isl923x_emul_get_parent(isl923x_emul); - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint16_t expected_current_milli_amps[] = { EXPECTED_CURRENT_MA(256), EXPECTED_CURRENT_MA(512), EXPECTED_CURRENT_MA(1024), EXPECTED_CURRENT_MA(2048), @@ -411,12 +401,12 @@ ZTEST(isl923x, test_set_dc_prochot) NULL); /* Test failed I2C write to prochot register */ - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_PROCHOT_DC); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_PROCHOT_DC); zassert_equal(EC_ERROR_INVAL, isl923x_set_dc_prochot(CHARGER_NUM, 0), NULL); /* Clear write fail reg */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); for (int i = 0; i < ARRAY_SIZE(expected_current_milli_amps); ++i) { @@ -435,8 +425,9 @@ ZTEST(isl923x, test_set_dc_prochot) CHARGER_NUM, expected_current_milli_amps[i]), "Failed to set DC prochot to %dmA", expected_current_milli_amps[i]); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ¤t_milli_amps, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), + ¤t_milli_amps, sizeof(current_milli_amps)), "Failed to read DC prochot register"); zassert_equal( @@ -452,44 +443,44 @@ ZTEST(isl923x, test_comparator_inversion) { const struct emul *isl923x_emul = ISL923X_EMUL; const struct device *i2c_dev = isl923x_emul_get_parent(isl923x_emul); - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint8_t reg_addr = ISL923X_REG_CONTROL2; uint16_t reg_value; uint8_t tx_buf[] = { reg_addr, 0, 0 }; /* Test failed read, should not write */ - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL2); - i2c_common_emul_set_write_func(i2c_emul, mock_write_fn_always_fail, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL2); + i2c_common_emul_set_write_func(COMMON_DATA, mock_write_fn_always_fail, NULL); zassert_equal(EC_ERROR_INVAL, isl923x_set_comparator_inversion(CHARGER_NUM, false), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_write_func(COMMON_DATA, NULL, NULL); /* Test failed write */ - zassert_ok(i2c_write(i2c_dev, tx_buf, sizeof(tx_buf), i2c_emul->addr), + zassert_ok(i2c_write(i2c_dev, tx_buf, sizeof(tx_buf), + isl923x_emul->bus.i2c->addr), "Failed to clear CTRL2 register"); - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL2); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL2); zassert_equal(EC_ERROR_INVAL, isl923x_set_comparator_inversion(CHARGER_NUM, true), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test enable comparator inversion */ zassert_ok(isl923x_set_comparator_inversion(CHARGER_NUM, true), NULL); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ®_value, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), ®_value, sizeof(reg_value)), "Failed to read CTRL 2 register"); zassert_true((reg_value & ISL923X_C2_INVERT_CMOUT) != 0, NULL); /* Test disable comparator inversion */ zassert_ok(isl923x_set_comparator_inversion(CHARGER_NUM, false), NULL); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ®_value, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), ®_value, sizeof(reg_value)), "Failed to read CTRL 2 register"); zassert_true((reg_value & ISL923X_C2_INVERT_CMOUT) == 0, NULL); @@ -499,39 +490,39 @@ ZTEST(isl923x, test_discharge_on_ac) { const struct emul *isl923x_emul = ISL923X_EMUL; const struct device *i2c_dev = isl923x_emul_get_parent(isl923x_emul); - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + const struct i2c_common_emul_cfg *cfg = + isl923x_emul_get_cfg(isl923x_emul); uint8_t reg_addr = ISL923X_REG_CONTROL1; uint8_t tx_buf[] = { reg_addr, 0, 0 }; uint16_t reg_value; /* Test failure to read CTRL1 register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.discharge_on_ac(CHARGER_NUM, true), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set CTRL1 register to 0 */ - zassert_ok(i2c_write(i2c_dev, tx_buf, sizeof(tx_buf), i2c_emul->addr), - NULL); + zassert_ok(i2c_write(i2c_dev, tx_buf, sizeof(tx_buf), cfg->addr), NULL); /* Test failure to write CTRL1 register */ - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.discharge_on_ac(CHARGER_NUM, true), NULL); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ®_value, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), ®_value, sizeof(reg_value)), NULL); zassert_equal(0, reg_value, NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test enabling discharge on AC */ zassert_ok(isl923x_drv.discharge_on_ac(CHARGER_NUM, true), NULL); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ®_value, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), ®_value, sizeof(reg_value)), NULL); zassert_true((reg_value & ISL923X_C1_LEARN_MODE_ENABLE) != 0, NULL); @@ -539,8 +530,8 @@ ZTEST(isl923x, test_discharge_on_ac) /* Test disabling discharge on AC */ zassert_ok(isl923x_drv.discharge_on_ac(CHARGER_NUM, false), NULL); - zassert_ok(i2c_write_read(i2c_dev, i2c_emul->addr, ®_addr, - sizeof(reg_addr), ®_value, + zassert_ok(i2c_write_read(i2c_dev, isl923x_emul->bus.i2c->addr, + ®_addr, sizeof(reg_addr), ®_value, sizeof(reg_value)), NULL); zassert_true((reg_value & ISL923X_C1_LEARN_MODE_ENABLE) == 0, NULL); @@ -549,17 +540,16 @@ ZTEST(isl923x, test_discharge_on_ac) ZTEST(isl923x, test_get_vbus_voltage) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); /* Standard fixed-power PD source voltages. */ int test_voltage_mv[] = { 5000, 9000, 15000, 20000 }; int voltage; /* Test fail to read the ADC vbus register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, RAA489000_REG_ADC_VBUS); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, RAA489000_REG_ADC_VBUS); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_vbus_voltage(CHARGER_NUM, 0, &voltage), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); for (int i = 0; i < ARRAY_SIZE(test_voltage_mv); ++i) { @@ -576,22 +566,21 @@ ZTEST(isl923x, test_get_vbus_voltage) * VBUS. */ zassert_within(expected_voltage_mv, voltage, 100, - "Expected %dmV but got %dmV", expected_voltage_mv, - voltage); + "Expected %dmV but got %dmV", + expected_voltage_mv, voltage); } } ZTEST(isl923x, test_init) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); int input_current; /* Test failed CTRL2 register read (prochot debounce) */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL2); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL2); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), @@ -601,9 +590,9 @@ ZTEST(isl923x, test_init) /* Test failed CTRL2 register write */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL2); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL2); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), @@ -613,37 +602,35 @@ ZTEST(isl923x, test_init) /* Test failed CTRL 0 read */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL0); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL0); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), NULL); zassert_equal(0, input_current, - "Expected input current 0mA but got %dmA", - input_current); + "Expected input current 0mA but got %dmA", input_current); /* Test failed CTRL 0 write */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL0); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL0); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), NULL); zassert_equal(0, input_current, - "Expected input current 0mA but got %dmA", - input_current); + "Expected input current 0mA but got %dmA", input_current); /* Test failed CTRL 3 read */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL9238_REG_CONTROL3); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL9238_REG_CONTROL3); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), @@ -653,9 +640,9 @@ ZTEST(isl923x, test_init) /* Test failed CTRL 3 write */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL9238_REG_CONTROL3); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL9238_REG_CONTROL3); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), @@ -665,10 +652,10 @@ ZTEST(isl923x, test_init) /* Test failed write adapter current limit */ isl923x_emul_reset_registers(isl923x_emul); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, ISL923X_REG_ADAPTER_CURRENT_LIMIT1); isl923x_drv.init(CHARGER_NUM); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_ok(isl923x_drv.get_input_current_limit(CHARGER_NUM, &input_current), @@ -702,7 +689,6 @@ ZTEST(isl923x, test_init_late_jump) ZTEST(isl923x, test_isl923x_is_acok) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); enum ec_error_list rv; bool acok; @@ -712,13 +698,13 @@ ZTEST(isl923x, test_isl923x_is_acok) "Invalid charger num, but AC OK check succeeded"); /* Part 2: error accessing register */ - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL9238_REG_INFO2); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL9238_REG_INFO2); rv = raa489000_is_acok(CHARGER_NUM, &acok); zassert_equal(EC_ERROR_INVAL, rv, "Register read failure, but AC OK check succeeded"); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); /* Part 3: successful path - ACOK is true */ @@ -739,7 +725,6 @@ ZTEST(isl923x, test_isl923x_is_acok) ZTEST(isl923x, test_isl923x_enable_asgate) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); int rv; /* Part 1: Try enabling the ASGATE */ @@ -748,7 +733,7 @@ ZTEST(isl923x, test_isl923x_enable_asgate) zassert_equal(EC_SUCCESS, rv, "Expected return code of %d but got %d", EC_SUCCESS, rv); zassert_true( - isl923x_emul_peek_reg(i2c_emul, RAA489000_REG_CONTROL8) & + isl923x_emul_peek_reg(isl923x_emul, RAA489000_REG_CONTROL8) & RAA489000_C8_ASGATE_ON_READY, "RAA489000_C8_ASGATE_ON_READY bit not set in Control Reg 8"); @@ -757,15 +742,16 @@ ZTEST(isl923x, test_isl923x_enable_asgate) zassert_equal(EC_SUCCESS, rv, "Expected return code of %d but got %d", EC_SUCCESS, rv); - zassert_false(isl923x_emul_peek_reg(i2c_emul, RAA489000_REG_CONTROL8) & + zassert_false(isl923x_emul_peek_reg(isl923x_emul, + RAA489000_REG_CONTROL8) & RAA489000_C8_ASGATE_ON_READY, "RAA489000_C8_ASGATE_ON_READY bit set in Control Reg 8"); } /* Mock read and write functions to use in the hibernation test */ -FAKE_VALUE_FUNC(int, hibernate_mock_read_fn, struct i2c_emul *, int, uint8_t *, - int, void *); -FAKE_VALUE_FUNC(int, hibernate_mock_write_fn, struct i2c_emul *, int, uint8_t, +FAKE_VALUE_FUNC(int, hibernate_mock_read_fn, const struct emul *, int, + uint8_t *, int, void *); +FAKE_VALUE_FUNC(int, hibernate_mock_write_fn, const struct emul *, int, uint8_t, int, void *); /** @@ -773,8 +759,6 @@ FAKE_VALUE_FUNC(int, hibernate_mock_write_fn, struct i2c_emul *, int, uint8_t, */ static void isl923x_hibernate_before(void *state) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); ARG_UNUSED(state); /* Reset mocks and make the read/write mocks pass all data through */ @@ -783,13 +767,15 @@ static void isl923x_hibernate_before(void *state) hibernate_mock_read_fn_fake.return_val = 1; hibernate_mock_write_fn_fake.return_val = 1; - i2c_common_emul_set_read_func(i2c_emul, hibernate_mock_read_fn, NULL); - i2c_common_emul_set_write_func(i2c_emul, hibernate_mock_write_fn, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, hibernate_mock_read_fn, + NULL); + i2c_common_emul_set_write_func(COMMON_DATA, hibernate_mock_write_fn, + NULL); /* Don't fail on any register access */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); } @@ -798,31 +784,28 @@ static void isl923x_hibernate_before(void *state) */ static void isl923x_hibernate_after(void *state) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); ARG_UNUSED(state); /* Clear the mock read/write functions */ - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, NULL, NULL); + i2c_common_emul_set_write_func(COMMON_DATA, NULL, NULL); /* Don't fail on any register access */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(COMMON_DATA, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST(isl923x_hibernate, test_isl923x_hibernate__happy_path) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint16_t actual; raa489000_hibernate(CHARGER_NUM, false); /* Check ISL923X_REG_CONTROL0 */ - actual = isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL0); + actual = isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL0); zassert_false(actual & RAA489000_C0_EN_CHG_PUMPS_TO_100PCT, "RAA489000_C0_EN_CHG_PUMPS_TO_100PCT should not be set"); @@ -830,10 +813,11 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__happy_path) "RAA489000_C0_BGATE_FORCE_ON should not be set"); /* Check ISL923X_REG_CONTROL1 */ - actual = isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1); + actual = isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1); - zassert_false(actual & RAA489000_C1_ENABLE_SUPP_SUPPORT_MODE, - "RAA489000_C1_ENABLE_SUPP_SUPPORT_MODE should not be set"); + zassert_false( + actual & RAA489000_C1_ENABLE_SUPP_SUPPORT_MODE, + "RAA489000_C1_ENABLE_SUPP_SUPPORT_MODE should not be set"); zassert_false(actual & ISL923X_C1_ENABLE_PSYS, "ISL923X_C1_ENABLE_PSYS should not be set"); zassert_true(actual & RAA489000_C1_BGATE_FORCE_OFF, @@ -842,13 +826,13 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__happy_path) "ISL923X_C1_DISABLE_MON should be set"); /* Check ISL9238_REG_CONTROL3 (disable_adc = false) */ - actual = isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3); + actual = isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3); zassert_true(actual & RAA489000_ENABLE_ADC, "RAA489000_ENABLE_ADC should be set"); /* Check ISL9238_REG_CONTROL4 */ - actual = isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL4); + actual = isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL4); zassert_true(actual & RAA489000_C4_DISABLE_GP_CMP, "RAA489000_C4_DISABLE_GP_CMP should be set"); @@ -889,10 +873,7 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__invalid_charger_number) ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL923X_REG_CONTROL0) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); - - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL0); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL0); raa489000_hibernate(CHARGER_NUM, false); @@ -907,10 +888,7 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL923X_REG_CONTROL0) ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL923X_REG_CONTROL1) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); - - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL923X_REG_CONTROL1); raa489000_hibernate(CHARGER_NUM, false); @@ -931,10 +909,7 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL923X_REG_CONTROL1) ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL9238_REG_CONTROL3) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); - - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL9238_REG_CONTROL3); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL9238_REG_CONTROL3); raa489000_hibernate(CHARGER_NUM, false); @@ -955,10 +930,7 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL9238_REG_CONTROL3) ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL9238_REG_CONTROL4) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); - - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL9238_REG_CONTROL4); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, ISL9238_REG_CONTROL4); raa489000_hibernate(CHARGER_NUM, false); @@ -977,13 +949,12 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__fail_at_ISL9238_REG_CONTROL4) ZTEST(isl923x_hibernate, test_isl923x_hibernate__adc_disable) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint16_t expected; raa489000_hibernate(CHARGER_NUM, true); /* Check ISL9238_REG_CONTROL3 (disable_adc = true) */ - expected = isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3); + expected = isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3); expected &= ~RAA489000_ENABLE_ADC; MOCK_ASSERT_I2C_READ(hibernate_mock_read_fn, 4, ISL9238_REG_CONTROL3); @@ -997,40 +968,39 @@ ZTEST(isl923x_hibernate, test_isl923x_hibernate__adc_disable) ZTEST(isl923x_hibernate, test_isl9238c_hibernate) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint16_t control1_expected, control2_expected, control3_expected; int rv; /* Part 1: Happy path */ control1_expected = - (isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1) & - ~ISL923X_C1_ENABLE_PSYS) | + (isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1) & + ~ISL923X_C1_ENABLE_PSYS) | ISL923X_C1_DISABLE_MON; control2_expected = - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL2) | + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL2) | ISL923X_C2_COMPARATOR; control3_expected = - isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3) | + isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3) | ISL9238_C3_BGATE_OFF; rv = isl9238c_hibernate(CHARGER_NUM); zassert_equal(EC_SUCCESS, rv, "Expected return code %d but got %d", EC_SUCCESS, rv); - zassert_equal(isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1), + zassert_equal(isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1), control1_expected, "Unexpected register value 0x%02x. Should be 0x%02x", - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1), + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1), control1_expected); - zassert_equal(isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL2), + zassert_equal(isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL2), control2_expected, "Unexpected register value 0x%02x. Should be 0x%02x", - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL2), + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL2), control2_expected); - zassert_equal(isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3), + zassert_equal(isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3), control3_expected, "Unexpected register value 0x%02x. Should be 0x%02x", - isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3), + isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3), control3_expected); /* Part 2: Fail reading each register and check for error code */ @@ -1038,7 +1008,7 @@ ZTEST(isl923x_hibernate, test_isl9238c_hibernate) ISL9238_REG_CONTROL3 }; for (int i = 0; i < ARRAY_SIZE(registers); i++) { - i2c_common_emul_set_read_fail_reg(i2c_emul, registers[i]); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, registers[i]); rv = isl9238c_hibernate(CHARGER_NUM); @@ -1051,39 +1021,38 @@ ZTEST(isl923x_hibernate, test_isl9238c_hibernate) ZTEST(isl923x_hibernate, test_isl9238c_resume) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); uint16_t control1_expected, control2_expected, control3_expected; int rv; /* Part 1: Happy path */ control1_expected = - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1) | + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1) | ISL923X_C1_ENABLE_PSYS; control2_expected = - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL2) & + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL2) & ~ISL923X_C2_COMPARATOR; control3_expected = - isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3) & + isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3) & ~ISL9238_C3_BGATE_OFF; rv = isl9238c_resume(CHARGER_NUM); zassert_equal(EC_SUCCESS, rv, "Expected return code %d but got %d", EC_SUCCESS, rv); - zassert_equal(isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1), + zassert_equal(isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1), control1_expected, "Unexpected register value 0x%02x. Should be 0x%02x", - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL1), + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL1), control1_expected); - zassert_equal(isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL2), + zassert_equal(isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL2), control2_expected, "Unexpected register value 0x%02x. Should be 0x%02x", - isl923x_emul_peek_reg(i2c_emul, ISL923X_REG_CONTROL2), + isl923x_emul_peek_reg(isl923x_emul, ISL923X_REG_CONTROL2), control2_expected); - zassert_equal(isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3), + zassert_equal(isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3), control3_expected, "Unexpected register value 0x%02x. Should be 0x%02x", - isl923x_emul_peek_reg(i2c_emul, ISL9238_REG_CONTROL3), + isl923x_emul_peek_reg(isl923x_emul, ISL9238_REG_CONTROL3), control3_expected); /* Part 2: Fail reading each register and check for error code */ @@ -1091,7 +1060,7 @@ ZTEST(isl923x_hibernate, test_isl9238c_resume) ISL9238_REG_CONTROL3 }; for (int i = 0; i < ARRAY_SIZE(registers); i++) { - i2c_common_emul_set_read_fail_reg(i2c_emul, registers[i]); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, registers[i]); rv = isl9238c_resume(CHARGER_NUM); @@ -1101,7 +1070,7 @@ ZTEST(isl923x_hibernate, test_isl9238c_resume) } } -ZTEST_SUITE(isl923x, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +ZTEST_SUITE(isl923x, drivers_predicate_pre_main, NULL, NULL, NULL, NULL); ZTEST_SUITE(isl923x_hibernate, drivers_predicate_post_main, NULL, isl923x_hibernate_before, isl923x_hibernate_after, NULL); diff --git a/zephyr/test/drivers/default/src/led.c b/zephyr/test/drivers/default/src/led.c new file mode 100644 index 0000000000..e89a3d8b66 --- /dev/null +++ b/zephyr/test/drivers/default/src/led.c @@ -0,0 +1,92 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> +#include <zephyr/ztest_assert.h> + +#include <zephyr/device.h> +#include <zephyr/drivers/pwm.h> + +#include "ec_commands.h" +#include "led.h" +#include "led_common.h" +#include "pwm_mock.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_SUITE(pwm_led_driver, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); + +ZTEST(pwm_led_driver, test_led_set_brightness) +{ + const uint8_t brightness_off[EC_LED_COLOR_COUNT] = {}; + const uint8_t brightness_white[EC_LED_COLOR_COUNT] = { + [EC_LED_COLOR_WHITE] = 1 + }; + const uint8_t brightness_amber[EC_LED_COLOR_COUNT] = { + [EC_LED_COLOR_AMBER] = 1 + }; + const struct device *pwm_blue_left = + DEVICE_DT_GET(DT_NODELABEL(pwm_blue_left)); + const struct device *pwm_white_left = + DEVICE_DT_GET(DT_NODELABEL(pwm_white_left)); + const struct device *pwm_amber_right = + DEVICE_DT_GET(DT_NODELABEL(pwm_amber_right)); + const struct device *pwm_white_right = + DEVICE_DT_GET(DT_NODELABEL(pwm_white_right)); + + /* Turn off all LEDs */ + led_set_brightness(EC_LED_ID_LEFT_LED, brightness_off); + led_set_brightness(EC_LED_ID_RIGHT_LED, brightness_off); + zassert_equal(pwm_mock_get_duty(pwm_blue_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_amber_right, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_right, 0), 0, NULL); + + /* Call led_set_color(LED_WHITE, LEFT_LED) */ + led_set_brightness(EC_LED_ID_LEFT_LED, brightness_white); + zassert_equal(pwm_mock_get_duty(pwm_blue_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_left, 0), 100, NULL); + zassert_equal(pwm_mock_get_duty(pwm_amber_right, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_right, 0), 0, NULL); + + /* Unsupporte, call led_set_color(LED_OFF, LEFT_LED) */ + led_set_brightness(EC_LED_ID_LEFT_LED, brightness_amber); + zassert_equal(pwm_mock_get_duty(pwm_blue_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_amber_right, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_right, 0), 0, NULL); + + /* Call led_set_color(AMBER, RIGHT_LED) */ + led_set_brightness(EC_LED_ID_RIGHT_LED, brightness_amber); + zassert_equal(pwm_mock_get_duty(pwm_blue_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_left, 0), 0, NULL); + zassert_equal(pwm_mock_get_duty(pwm_amber_right, 0), 100, NULL); + zassert_equal(pwm_mock_get_duty(pwm_white_right, 0), 0, NULL); +} + +ZTEST(pwm_led_driver, test_led_get_brightness) +{ + uint8_t brightness[EC_LED_COLOR_COUNT]; + const uint8_t expected_left[EC_LED_COLOR_COUNT] = { + [EC_LED_COLOR_BLUE] = 100, + [EC_LED_COLOR_WHITE] = 100, + }; + const uint8_t expected_right[EC_LED_COLOR_COUNT] = { + [EC_LED_COLOR_WHITE] = 100, + [EC_LED_COLOR_AMBER] = 100, + }; + + /* Verify LED colors defined in device tree are reflected in the + * brightness array. + */ + memset(brightness, 255, sizeof(brightness)); + led_get_brightness_range(EC_LED_ID_LEFT_LED, brightness); + zassert_mem_equal(brightness, expected_left, sizeof(brightness), NULL); + + memset(brightness, 255, sizeof(brightness)); + led_get_brightness_range(EC_LED_ID_RIGHT_LED, brightness); + zassert_mem_equal(brightness, expected_right, sizeof(brightness), NULL); +} diff --git a/zephyr/test/drivers/default/src/lid_angle.c b/zephyr/test/drivers/default/src/lid_angle.c new file mode 100644 index 0000000000..568057d95a --- /dev/null +++ b/zephyr/test/drivers/default/src/lid_angle.c @@ -0,0 +1,70 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "lid_angle.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" + +#define LID_ANGLE_MIN_LARGE_ANGLE 0 +#define LID_ANGLE_MAX_LARGE_ANGLE 360 + +static void lid_angle_after(void *f) +{ + ARG_UNUSED(f); + /* Reset the wake angle */ + lid_angle_set_wake_angle(180); + /* Flush the buffer */ + lid_angle_update(LID_ANGLE_UNRELIABLE); + lid_angle_update(LID_ANGLE_UNRELIABLE); + lid_angle_update(LID_ANGLE_UNRELIABLE); + lid_angle_update(LID_ANGLE_UNRELIABLE); +} + +ZTEST_SUITE(lid_angle, drivers_predicate_post_main, NULL, NULL, lid_angle_after, + NULL); + +ZTEST(lid_angle, test_get_set_wake_angle) +{ + lid_angle_set_wake_angle(LID_ANGLE_MIN_LARGE_ANGLE - 1); + zassert_equal(LID_ANGLE_MIN_LARGE_ANGLE, lid_angle_get_wake_angle(), + NULL); + + lid_angle_set_wake_angle(LID_ANGLE_MAX_LARGE_ANGLE + 1); + zassert_equal(LID_ANGLE_MAX_LARGE_ANGLE, lid_angle_get_wake_angle(), + NULL); + + lid_angle_set_wake_angle( + (LID_ANGLE_MIN_LARGE_ANGLE + LID_ANGLE_MAX_LARGE_ANGLE) / 2); + zassert_equal((LID_ANGLE_MIN_LARGE_ANGLE + LID_ANGLE_MAX_LARGE_ANGLE) / + 2, + lid_angle_get_wake_angle(), NULL); +} + +ZTEST(lid_angle, test_no_wake_min_large_angle) +{ + lid_angle_set_wake_angle(LID_ANGLE_MIN_LARGE_ANGLE); + lid_angle_update(45); + lid_angle_update(45); + lid_angle_update(45); + lid_angle_update(45); + + zassert_equal(1, lid_angle_peripheral_enable_fake.call_count, NULL); + zassert_equal(0, lid_angle_peripheral_enable_fake.arg0_val, NULL); +} + +ZTEST(lid_angle, test_wake_max_large_angle) +{ + lid_angle_set_wake_angle(LID_ANGLE_MAX_LARGE_ANGLE); + lid_angle_update(45); + lid_angle_update(45); + lid_angle_update(45); + lid_angle_update(45); + + zassert_equal(1, lid_angle_peripheral_enable_fake.call_count, NULL); + zassert_equal(1, lid_angle_peripheral_enable_fake.arg0_val, NULL); +} diff --git a/zephyr/test/drivers/src/lid_switch.c b/zephyr/test/drivers/default/src/lid_switch.c index 42d91495f4..1647f73e00 100644 --- a/zephyr/test/drivers/src/lid_switch.c +++ b/zephyr/test/drivers/default/src/lid_switch.c @@ -1,9 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/emul.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> @@ -12,6 +12,7 @@ #include <console.h> #include "test/drivers/test_state.h" +#include "test/drivers/utils.h" #include "ec_commands.h" #include "host_command.h" @@ -34,18 +35,44 @@ int emul_lid_close(void) return gpio_emul_input_set(lid_gpio_dev, LID_GPIO_PIN, 0); } -static void cleanup(void *unused) +static void *lid_switch_setup(void) +{ + /** + * Set chipset to S0 as chipset power on after opening lid may disturb + * test + */ + test_set_chipset_to_s0(); + + return NULL; +} + +static void lid_switch_before(void *unused) +{ + /* Make sure that interrupt fire at the next lid open/close */ + zassume_ok(emul_lid_close(), NULL); + zassume_ok(emul_lid_open(), NULL); + k_sleep(K_MSEC(100)); +} + +static void lid_switch_after(void *unused) { struct ec_params_force_lid_open params = { .enabled = 0, }; struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS(EC_CMD_FORCE_LID_OPEN, 0, params); + int res; - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); + res = host_command_process(&args); + if (res) + TC_ERROR("host_command_process() failed (%d)\n", res); - zassert_ok(emul_lid_open(), NULL); + if (args.result) + TC_ERROR("args.result != 0 (%d != 0)\n", args.result); + + res = emul_lid_open(); + if (res) + TC_ERROR("emul_lid_open() failed (%d)\n", res); k_sleep(K_MSEC(100)); } @@ -246,5 +273,5 @@ ZTEST(lid_switch, test_hc_force_lid_open) zassert_equal(lid_is_open(), 1, NULL); } -ZTEST_SUITE(lid_switch, drivers_predicate_post_main, NULL, NULL, &cleanup, - NULL); +ZTEST_SUITE(lid_switch, drivers_predicate_post_main, lid_switch_setup, + lid_switch_before, lid_switch_after, NULL); diff --git a/zephyr/test/drivers/src/lis2dw12.c b/zephyr/test/drivers/default/src/lis2dw12.c index 56f71cc406..4cb29796f8 100644 --- a/zephyr/test/drivers/src/lis2dw12.c +++ b/zephyr/test/drivers/default/src/lis2dw12.c @@ -1,9 +1,9 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/emul.h> #include "driver/accel_lis2dw12.h" #include "emul/emul_common_i2c.h" @@ -12,7 +12,7 @@ #define LIS2DW12_NODELABEL DT_NODELABEL(ms_lis2dw12_accel) #define LIS2DW12_SENSOR_ID SENSOR_ID(LIS2DW12_NODELABEL) -#define EMUL_LABEL DT_LABEL(DT_NODELABEL(lis2dw12_emul)) +#define LIS2DW12_EMUL_NODE DT_NODELABEL(lis2dw12_emul) #include <stdio.h> @@ -37,7 +37,7 @@ enum lis2dw12_round_mode { static inline void lis2dw12_setup(void) { - lis2dw12_emul_reset(emul_get_binding(EMUL_LABEL)); + lis2dw12_emul_reset(EMUL_DT_GET(LIS2DW12_EMUL_NODE)); /* Reset certain sensor struct values */ struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; @@ -59,19 +59,20 @@ static void lis2dw12_after(void *state) ZTEST(lis2dw12, test_lis2dw12_init__fail_read_who_am_i) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; - i2c_common_emul_set_read_fail_reg(lis2dw12_emul_to_i2c_emul(emul), - LIS2DW12_WHO_AM_I_REG); + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_WHO_AM_I_REG); rv = ms->drv->init(ms); zassert_equal(EC_ERROR_INVAL, rv, NULL); } ZTEST(lis2dw12, test_lis2dw12_init__fail_who_am_i) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; @@ -85,11 +86,13 @@ ZTEST(lis2dw12, test_lis2dw12_init__fail_who_am_i) ZTEST(lis2dw12, test_lis2dw12_init__fail_write_soft_reset) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; - i2c_common_emul_set_write_fail_reg(lis2dw12_emul_to_i2c_emul(emul), + i2c_common_emul_set_write_fail_reg(common_data, LIS2DW12_SOFT_RESET_ADDR); rv = ms->drv->init(ms); zassert_equal(EC_ERROR_INVAL, rv, NULL); @@ -97,20 +100,22 @@ ZTEST(lis2dw12, test_lis2dw12_init__fail_write_soft_reset) ZTEST(lis2dw12, test_lis2dw12_init__timeout_read_soft_reset) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; - i2c_common_emul_set_read_fail_reg(lis2dw12_emul_to_i2c_emul(emul), + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_SOFT_RESET_ADDR); rv = ms->drv->init(ms); zassert_equal(EC_ERROR_TIMEOUT, rv, "init returned %d but expected %d", rv, EC_ERROR_TIMEOUT); } -static int lis2dw12_test_mock_write_fail_set_bdu(struct i2c_emul *emul, int reg, - uint8_t val, int bytes, - void *data) +static int lis2dw12_test_mock_write_fail_set_bdu(const struct emul *emul, + int reg, uint8_t val, + int bytes, void *data) { if (reg == LIS2DW12_BDU_ADDR && bytes == 1 && (val & LIS2DW12_BDU_MASK) != 0) { @@ -121,28 +126,30 @@ static int lis2dw12_test_mock_write_fail_set_bdu(struct i2c_emul *emul, int reg, ZTEST(lis2dw12, test_lis2dw12_init__fail_set_bdu) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; - i2c_common_emul_set_write_func(lis2dw12_emul_to_i2c_emul(emul), - lis2dw12_test_mock_write_fail_set_bdu, - NULL); + i2c_common_emul_set_write_func( + common_data, lis2dw12_test_mock_write_fail_set_bdu, NULL); rv = ms->drv->init(ms); zassert_equal(EC_ERROR_INVAL, rv, "init returned %d but expected %d", rv, EC_ERROR_INVAL); zassert_true(lis2dw12_emul_get_soft_reset_count(emul) > 0, - "expected at least one soft reset"); + "expected at least one soft reset"); } ZTEST(lis2dw12, test_lis2dw12_init__fail_set_lir) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; - i2c_common_emul_set_read_fail_reg(lis2dw12_emul_to_i2c_emul(emul), - LIS2DW12_LIR_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_LIR_ADDR); rv = ms->drv->init(ms); zassert_equal(EC_ERROR_INVAL, rv, "init returned %d but expected %d", @@ -151,7 +158,7 @@ ZTEST(lis2dw12, test_lis2dw12_init__fail_set_lir) "expected at least one soft reset"); } -static int lis2dw12_test_mock_write_fail_set_power_mode(struct i2c_emul *emul, +static int lis2dw12_test_mock_write_fail_set_power_mode(const struct emul *emul, int reg, uint8_t val, int bytes, void *data) { @@ -165,13 +172,15 @@ static int lis2dw12_test_mock_write_fail_set_power_mode(struct i2c_emul *emul, ZTEST(lis2dw12, test_lis2dw12_init__fail_set_power_mode) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; i2c_common_emul_set_write_func( - lis2dw12_emul_to_i2c_emul(emul), - lis2dw12_test_mock_write_fail_set_power_mode, NULL); + common_data, lis2dw12_test_mock_write_fail_set_power_mode, + NULL); rv = ms->drv->init(ms); zassert_equal(EC_ERROR_INVAL, rv, "init returned %d but expected %d", @@ -182,7 +191,7 @@ ZTEST(lis2dw12, test_lis2dw12_init__fail_set_power_mode) ZTEST(lis2dw12, test_lis2dw12_init__success) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; struct stprivate_data *drvdata = ms->drv_data; @@ -200,7 +209,9 @@ ZTEST(lis2dw12, test_lis2dw12_init__success) ZTEST(lis2dw12, test_lis2dw12_set_power_mode) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; @@ -216,8 +227,7 @@ ZTEST(lis2dw12, test_lis2dw12_set_power_mode) EC_ERROR_UNIMPLEMENTED, rv); /* Part 3: attempt to set mode but cannot modify reg. */ - i2c_common_emul_set_read_fail_reg(lis2dw12_emul_to_i2c_emul(emul), - LIS2DW12_ACC_MODE_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_ACC_MODE_ADDR); rv = lis2dw12_set_power_mode(ms, LIS2DW12_LOW_POWER, LIS2DW12_LOW_POWER_MODE_2); zassert_equal(rv, EC_ERROR_INVAL, "Expected %d but got %d", @@ -226,7 +236,9 @@ ZTEST(lis2dw12, test_lis2dw12_set_power_mode) ZTEST(lis2dw12, test_lis2dw12_set_range) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; int rv; @@ -241,8 +253,7 @@ ZTEST(lis2dw12, test_lis2dw12_set_range) ms->current_range); /* Part 2: Error accessing register */ - i2c_common_emul_set_read_fail_reg(lis2dw12_emul_to_i2c_emul(emul), - LIS2DW12_FS_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_FS_ADDR); rv = ms->drv->set_range(ms, LIS2DW12_ACCEL_FS_MAX_VAL, 0); zassert_equal(rv, EC_ERROR_INVAL, "Expected %d but got %d", EC_ERROR_INVAL, rv); @@ -250,8 +261,7 @@ ZTEST(lis2dw12, test_lis2dw12_set_range) ZTEST(lis2dw12, test_lis2dw12_set_rate) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); - struct i2c_emul *i2c_emul = lis2dw12_emul_to_i2c_emul(emul); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; struct stprivate_data *drv_data = ms->drv_data; int rv; @@ -259,11 +269,9 @@ ZTEST(lis2dw12, test_lis2dw12_set_rate) /* Part 1: Turn off sensor with rate=0 */ rv = ms->drv->set_data_rate(ms, 0, 0); - zassert_equal(lis2dw12_emul_peek_odr(i2c_emul), - LIS2DW12_ODR_POWER_OFF_VAL, + zassert_equal(lis2dw12_emul_peek_odr(emul), LIS2DW12_ODR_POWER_OFF_VAL, "Output data rate should be %d but got %d", - LIS2DW12_ODR_POWER_OFF_VAL, - lis2dw12_emul_peek_odr(i2c_emul)); + LIS2DW12_ODR_POWER_OFF_VAL, lis2dw12_emul_peek_odr(emul)); zassert_equal(drv_data->base.odr, LIS2DW12_ODR_POWER_OFF_VAL, "Output data rate should be %d but got %d", LIS2DW12_ODR_POWER_OFF_VAL, drv_data->base.odr); @@ -319,7 +327,7 @@ ZTEST(lis2dw12, test_lis2dw12_set_rate) test_params[i].expected_norm_rate, drv_data->base.odr); /* Read ODR and mode bits back from CTRL1 register */ - uint8_t odr_bits = lis2dw12_emul_peek_odr(i2c_emul); + uint8_t odr_bits = lis2dw12_emul_peek_odr(emul); zassert_equal( odr_bits, test_params[i].expected_reg_val, @@ -332,8 +340,8 @@ ZTEST(lis2dw12, test_lis2dw12_set_rate) * 200,000mHz */ - uint8_t mode_bits = lis2dw12_emul_peek_mode(i2c_emul); - uint8_t lpmode_bits = lis2dw12_emul_peek_lpmode(i2c_emul); + uint8_t mode_bits = lis2dw12_emul_peek_mode(emul); + uint8_t lpmode_bits = lis2dw12_emul_peek_lpmode(emul); if (odr_bits > LIS2DW12_ODR_200HZ_VAL) { /* High performance mode, LP mode immaterial */ @@ -357,8 +365,10 @@ ZTEST(lis2dw12, test_lis2dw12_set_rate) ZTEST(lis2dw12, test_lis2dw12_read) { - const struct emul *emul = emul_get_binding(EMUL_LABEL); - struct i2c_emul *i2c_emul = lis2dw12_emul_to_i2c_emul(emul); + const struct emul *emul = EMUL_DT_GET(LIS2DW12_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_lis2dw12_get_i2c_common_data(emul); + struct motion_sensor_t *ms = &motion_sensors[LIS2DW12_SENSOR_ID]; struct stprivate_data *drvdata = ms->drv_data; intv3_t sample = { 0, 0, 0 }; @@ -376,7 +386,7 @@ ZTEST(lis2dw12, test_lis2dw12_read) * ready bit */ - i2c_common_emul_set_read_fail_reg(i2c_emul, LIS2DW12_STATUS_REG); + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_STATUS_REG); rv = ms->drv->read(ms, sample); @@ -388,7 +398,7 @@ ZTEST(lis2dw12, test_lis2dw12_read) * case, the driver should return the reading in from `ms->raw_xyz` */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); lis2dw12_emul_clear_accel_reading(emul); ms->raw_xyz[X] = 123; @@ -406,7 +416,7 @@ ZTEST(lis2dw12, test_lis2dw12_read) */ intv3_t fake_sample = { 100, 200, 300 }; - i2c_common_emul_set_read_fail_reg(i2c_emul, LIS2DW12_OUT_X_L_ADDR); + i2c_common_emul_set_read_fail_reg(common_data, LIS2DW12_OUT_X_L_ADDR); lis2dw12_emul_set_accel_reading(emul, fake_sample); rv = ms->drv->read(ms, sample); @@ -425,11 +435,11 @@ ZTEST(lis2dw12, test_lis2dw12_read) * output */ - expected_sample[i] = fake_sample[i] * - (1 << (16 - LIS2DW12_RESOLUTION)); + expected_sample[i] = + fake_sample[i] * (1 << (16 - LIS2DW12_RESOLUTION)); } - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); lis2dw12_emul_set_accel_reading(emul, fake_sample); diff --git a/zephyr/test/drivers/src/ln9310.c b/zephyr/test/drivers/default/src/ln9310.c index e4bf37c4bd..326e8480ef 100644 --- a/zephyr/test/drivers/src/ln9310.c +++ b/zephyr/test/drivers/default/src/ln9310.c @@ -1,12 +1,12 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/emul.h> #include <zephyr/kernel.h> -#include <ztest_assert.h> +#include <zephyr/ztest_assert.h> #include <zephyr/drivers/i2c_emul.h> #include "driver/ln9310.h" @@ -21,6 +21,8 @@ */ #define TEST_DELAY_MS 50 +#define EMUL_LN9310_NODE DT_NODELABEL(ln9310) + /* * Chip revisions below LN9310_BC_STS_C_CHIP_REV_FIXED require an alternative * software startup to properly initialize and power up. @@ -30,12 +32,11 @@ ZTEST(ln9310, test_ln9310_read_chip_fails) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -43,7 +44,7 @@ ZTEST(ln9310, test_ln9310_read_chip_fails) ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); - i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_BC_STS_C); + i2c_common_emul_set_read_fail_reg(common_data, LN9310_REG_BC_STS_C); zassert_true(ln9310_init() != 0, NULL); zassert_false(ln9310_emul_is_init(emulator), NULL); @@ -52,14 +53,13 @@ ZTEST(ln9310, test_ln9310_read_chip_fails) k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST(ln9310, test_ln9310_2s_powers_up) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); zassert_not_null(emulator, NULL); @@ -83,8 +83,7 @@ ZTEST(ln9310, test_ln9310_2s_powers_up) ZTEST(ln9310, test_ln9310_3s_powers_up) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); zassert_not_null(emulator, NULL); @@ -111,7 +110,7 @@ struct startup_workaround_data { bool startup_workaround_should_fail; }; -static int mock_write_fn_intercept_startup_workaround(struct i2c_emul *emul, +static int mock_write_fn_intercept_startup_workaround(const struct emul *emul, int reg, uint8_t val, int bytes, void *data) { @@ -134,10 +133,9 @@ static int mock_write_fn_intercept_startup_workaround(struct i2c_emul *emul, ZTEST(ln9310, test_ln9310_2s_cfly_precharge_startup) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - - struct i2c_emul *emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct startup_workaround_data test_data = { .startup_workaround_attempted = false, @@ -160,7 +158,8 @@ ZTEST(ln9310, test_ln9310_2s_cfly_precharge_startup) zassert_false(ln9310_power_good(), NULL); i2c_common_emul_set_write_func( - emul, mock_write_fn_intercept_startup_workaround, &test_data); + common_data, mock_write_fn_intercept_startup_workaround, + &test_data); ln9310_software_enable(true); zassert_true(test_data.startup_workaround_attempted, NULL); @@ -175,14 +174,14 @@ ZTEST(ln9310, test_ln9310_2s_cfly_precharge_startup) k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); - i2c_common_emul_set_write_func(emul, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); } ZTEST(ln9310, test_ln9310_3s_cfly_precharge_startup) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct startup_workaround_data test_data = { .startup_workaround_attempted = false, @@ -205,7 +204,8 @@ ZTEST(ln9310, test_ln9310_3s_cfly_precharge_startup) zassert_false(ln9310_power_good(), NULL); i2c_common_emul_set_write_func( - emul, mock_write_fn_intercept_startup_workaround, &test_data); + common_data, mock_write_fn_intercept_startup_workaround, + &test_data); ln9310_software_enable(true); zassert_true(test_data.startup_workaround_attempted, NULL); @@ -220,15 +220,14 @@ ZTEST(ln9310, test_ln9310_3s_cfly_precharge_startup) k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); - i2c_common_emul_set_write_func(emul, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); } ZTEST(ln9310, test_ln9310_cfly_precharge_exceeds_retries) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - - struct i2c_emul *emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct startup_workaround_data test_data = { .startup_workaround_attempted = false, @@ -255,7 +254,8 @@ ZTEST(ln9310, test_ln9310_cfly_precharge_exceeds_retries) zassert_false(ln9310_power_good(), NULL); i2c_common_emul_set_write_func( - emul, mock_write_fn_intercept_startup_workaround, &test_data); + common_data, mock_write_fn_intercept_startup_workaround, + &test_data); ln9310_software_enable(true); zassert_true(test_data.startup_workaround_attempted, NULL); @@ -264,13 +264,12 @@ ZTEST(ln9310, test_ln9310_cfly_precharge_exceeds_retries) k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); - i2c_common_emul_set_write_func(emul, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); } ZTEST(ln9310, test_ln9310_battery_unknown) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); zassert_not_null(emulator, NULL); @@ -299,12 +298,11 @@ ZTEST(ln9310, test_ln9310_battery_unknown) ZTEST(ln9310, test_ln9310_2s_battery_read_fails) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -312,7 +310,7 @@ ZTEST(ln9310, test_ln9310_2s_battery_read_fails) ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); - i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_BC_STS_B); + i2c_common_emul_set_read_fail_reg(common_data, LN9310_REG_BC_STS_B); zassert_true(ln9310_init() != 0, NULL); zassert_false(ln9310_emul_is_init(emulator), NULL); @@ -326,21 +324,20 @@ ZTEST(ln9310, test_ln9310_2s_battery_read_fails) ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); - i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_TRACK_CTRL); + i2c_common_emul_set_read_fail_reg(common_data, LN9310_REG_TRACK_CTRL); zassert_false(ln9310_init() == 0, NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST(ln9310, test_ln9310_lion_ctrl_reg_fails) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -348,7 +345,7 @@ ZTEST(ln9310, test_ln9310_lion_ctrl_reg_fails) ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); - i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_LION_CTRL); + i2c_common_emul_set_read_fail_reg(common_data, LN9310_REG_LION_CTRL); zassert_true(ln9310_init() != 0, NULL); zassert_false(ln9310_emul_is_init(emulator), NULL); @@ -362,17 +359,16 @@ ZTEST(ln9310, test_ln9310_lion_ctrl_reg_fails) ln9310_software_enable(true); zassert_false(ln9310_power_good(), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } - struct precharge_timeout_data { timestamp_t time_to_mock; bool handled_clearing_standby_en_bit_timeout; }; -static int mock_intercept_startup_ctrl_reg(struct i2c_emul *emul, int reg, +static int mock_intercept_startup_ctrl_reg(const struct emul *emulator, int reg, uint8_t val, int bytes, void *data) { struct precharge_timeout_data *test_data = data; @@ -397,9 +393,9 @@ static int mock_intercept_startup_ctrl_reg(struct i2c_emul *emul, int reg, ZTEST(ln9310, test_ln9310_cfly_precharge_timesout) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct precharge_timeout_data test_data = { .time_to_mock = { .val = -1, @@ -412,7 +408,6 @@ ZTEST(ln9310, test_ln9310_cfly_precharge_timesout) }; zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -429,7 +424,7 @@ ZTEST(ln9310, test_ln9310_cfly_precharge_timesout) zassert_false(ln9310_power_good(), NULL); i2c_common_emul_set_write_func( - i2c_emul, mock_intercept_startup_ctrl_reg, &test_data); + common_data, mock_intercept_startup_ctrl_reg, &test_data); ln9310_software_enable(true); /* TODO(b/201420132) */ @@ -438,7 +433,7 @@ ZTEST(ln9310, test_ln9310_cfly_precharge_timesout) /* It only times out on one attempt, it should subsequently startup */ zassert_true(ln9310_power_good(), NULL); - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); } struct reg_to_fail_data { @@ -446,7 +441,7 @@ struct reg_to_fail_data { int reg_access_fail_countdown; }; -static int mock_read_intercept_reg_to_fail(struct i2c_emul *emul, int reg, +static int mock_read_intercept_reg_to_fail(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { struct reg_to_fail_data *test_data = data; @@ -461,16 +456,15 @@ static int mock_read_intercept_reg_to_fail(struct i2c_emul *emul, int reg, ZTEST(ln9310, test_ln9310_interrupt_reg_fail) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct reg_to_fail_data test_data = { .reg_access_to_fail = 0, .reg_access_fail_countdown = 0, }; zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -482,7 +476,7 @@ ZTEST(ln9310, test_ln9310_interrupt_reg_fail) zassert_true(ln9310_emul_is_init(emulator), NULL); i2c_common_emul_set_read_func( - i2c_emul, mock_read_intercept_reg_to_fail, &test_data); + common_data, mock_read_intercept_reg_to_fail, &test_data); /* Fail in beginning of software enable */ test_data.reg_access_to_fail = LN9310_REG_INT1; @@ -504,21 +498,20 @@ ZTEST(ln9310, test_ln9310_interrupt_reg_fail) zassert_false(ln9310_power_good(), NULL); zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } ZTEST(ln9310, test_ln9310_sys_sts_reg_fail) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct reg_to_fail_data test_data = { .reg_access_to_fail = 0, .reg_access_fail_countdown = 0, }; zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -530,7 +523,7 @@ ZTEST(ln9310, test_ln9310_sys_sts_reg_fail) zassert_true(ln9310_emul_is_init(emulator), NULL); i2c_common_emul_set_read_func( - i2c_emul, &mock_read_intercept_reg_to_fail, &test_data); + common_data, &mock_read_intercept_reg_to_fail, &test_data); /* Register only read once and in the interrupt handler */ test_data.reg_access_to_fail = LN9310_REG_SYS_STS; @@ -544,7 +537,7 @@ ZTEST(ln9310, test_ln9310_sys_sts_reg_fail) zassert_false(ln9310_power_good(), NULL); zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } struct reg_to_intercept { @@ -552,7 +545,7 @@ struct reg_to_intercept { uint8_t replace_val; }; -static int mock_read_interceptor(struct i2c_emul *emul, int reg, uint8_t *val, +static int mock_read_interceptor(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { struct reg_to_intercept *test_data = data; @@ -567,16 +560,15 @@ static int mock_read_interceptor(struct i2c_emul *emul, int reg, uint8_t *val, ZTEST(ln9310, test_ln9310_reset_explicit_detected_startup) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct reg_to_intercept test_data = { .reg = LN9310_REG_LION_CTRL, .replace_val = 0, }; zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -587,7 +579,7 @@ ZTEST(ln9310, test_ln9310_reset_explicit_detected_startup) zassert_ok(ln9310_init(), NULL); zassert_true(ln9310_emul_is_init(emulator), NULL); - i2c_common_emul_set_read_func(i2c_emul, &mock_read_interceptor, + i2c_common_emul_set_read_func(common_data, &mock_read_interceptor, &test_data); ln9310_software_enable(true); @@ -597,21 +589,20 @@ ZTEST(ln9310, test_ln9310_reset_explicit_detected_startup) zassert_true(ln9310_power_good(), NULL); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } ZTEST(ln9310, test_ln9310_update_startup_seq_fails) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct reg_to_fail_data test_data = { .reg_access_to_fail = LN9310_REG_CFG_4, .reg_access_fail_countdown = 1, }; zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -622,7 +613,7 @@ ZTEST(ln9310, test_ln9310_update_startup_seq_fails) REQUIRES_CFLY_PRECHARGE_STARTUP_CHIP_REV); i2c_common_emul_set_read_func( - i2c_emul, &mock_read_intercept_reg_to_fail, &test_data); + common_data, &mock_read_intercept_reg_to_fail, &test_data); zassert_false(ln9310_init() == 0, NULL); zassert_false(ln9310_emul_is_init(emulator), NULL); @@ -635,21 +626,20 @@ ZTEST(ln9310, test_ln9310_update_startup_seq_fails) zassert_false(ln9310_power_good(), NULL); zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } ZTEST(ln9310, test_ln9310_state_change_only_on_mode_change_interrupt) { - const struct emul *emulator = - emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); - struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + const struct emul *emulator = EMUL_DT_GET(EMUL_LN9310_NODE); + struct i2c_common_emul_data *common_data = + emul_ln9310_get_i2c_common_data(emulator); struct reg_to_intercept test_data = { .reg = LN9310_REG_INT1, .replace_val = 0, }; zassert_not_null(emulator, NULL); - zassert_not_null(i2c_emul, NULL); ln9310_emul_set_context(emulator); ln9310_emul_reset(emulator); @@ -660,7 +650,7 @@ ZTEST(ln9310, test_ln9310_state_change_only_on_mode_change_interrupt) zassert_ok(ln9310_init(), NULL); zassert_true(ln9310_emul_is_init(emulator), NULL); - i2c_common_emul_set_read_func(i2c_emul, &mock_read_interceptor, + i2c_common_emul_set_read_func(common_data, &mock_read_interceptor, &test_data); ln9310_software_enable(true); @@ -670,7 +660,7 @@ ZTEST(ln9310, test_ln9310_state_change_only_on_mode_change_interrupt) zassert_false(ln9310_power_good(), NULL); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } static inline void reset_ln9310_state(void) diff --git a/zephyr/test/drivers/default/src/locate_chip.c b/zephyr/test/drivers/default/src/locate_chip.c new file mode 100644 index 0000000000..6842543971 --- /dev/null +++ b/zephyr/test/drivers/default/src/locate_chip.c @@ -0,0 +1,134 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/fff.h> +#include <zephyr/shell/shell.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "host_command.h" + +/** + * @brief TestPurpose: test the TCPC locate valid case. + */ +ZTEST_USER(locate_chip, test_hc_locate_chip_tcpc) +{ + int ret; + struct ec_params_locate_chip p; + struct ec_response_locate_chip r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_LOCATE_CHIP, 0, r, p); + + p.type = EC_CHIP_TYPE_TCPC; + p.index = 0; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_RES_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(r.bus_type, EC_BUS_TYPE_I2C, "Unexpected bus_type: %d", + r.bus_type); + zassert_equal(r.i2c_info.port, 2, "Unexpected port: %d", + r.i2c_info.port); + zassert_equal(r.i2c_info.addr_flags, 0x82, "Unexpected addr_flags: %d", + r.i2c_info.addr_flags); + + p.type = EC_CHIP_TYPE_TCPC; + p.index = 1; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_RES_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(r.bus_type, EC_BUS_TYPE_I2C, "Unexpected bus_type: %d", + r.bus_type); + zassert_equal(r.i2c_info.port, 3, "Unexpected port: %d", + r.i2c_info.port); + zassert_equal(r.i2c_info.addr_flags, 0x0b, "Unexpected addr_flags: %d", + r.i2c_info.addr_flags); +} + +/** + * @brief TestPurpose: test the TCPC index overflow case. + */ +ZTEST_USER(locate_chip, test_hc_locate_chip_tcpc_overflow) +{ + int ret; + struct ec_params_locate_chip p; + struct ec_response_locate_chip r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_LOCATE_CHIP, 0, r, p); + + p.type = EC_CHIP_TYPE_TCPC; + p.index = 10; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_RES_OVERFLOW, "Unexpected return value: %d", ret); +} + +/** + * @brief TestPurpose: test the EEPROM locate valid case. + */ +ZTEST_USER(locate_chip, test_hc_locate_chip_eeprom) +{ + int ret; + struct ec_params_locate_chip p; + struct ec_response_locate_chip r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_LOCATE_CHIP, 0, r, p); + + p.type = EC_CHIP_TYPE_CBI_EEPROM; + p.index = 0; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_RES_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(r.bus_type, EC_BUS_TYPE_I2C, "Unexpected bus_type: %d", + r.bus_type); + zassert_equal(r.i2c_info.port, I2C_PORT_EEPROM, "Unexpected port: %d", + r.i2c_info.port); + zassert_equal(r.i2c_info.addr_flags, I2C_ADDR_EEPROM_FLAGS, + "Unexpected addr_flags: %d", r.i2c_info.addr_flags); +} + +/** + * @brief TestPurpose: test the EEPROM index overflow case. + */ +ZTEST_USER(locate_chip, test_hc_locate_chip_eeprom_overflow) +{ + int ret; + struct ec_params_locate_chip p; + struct ec_response_locate_chip r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_LOCATE_CHIP, 0, r, p); + + p.type = EC_CHIP_TYPE_CBI_EEPROM; + p.index = 1; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_RES_OVERFLOW, "Unexpected return value: %d", ret); +} + +/** + * @brief TestPurpose: test the invalid parameter case. + */ +ZTEST_USER(locate_chip, test_hc_locate_chip_invalid) +{ + int ret; + struct ec_params_locate_chip p; + struct ec_response_locate_chip r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_LOCATE_CHIP, 0, r, p); + + p.type = EC_CHIP_TYPE_COUNT; + ret = host_command_process(&args); + + zassert_equal(ret, EC_RES_INVALID_PARAM, "Unexpected return value: %d", + ret); +} + +ZTEST_SUITE(locate_chip, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/motion_sense/motion_sense.c b/zephyr/test/drivers/default/src/motion_sense/motion_sense.c index 5b6839bbae..d39c3ce335 100644 --- a/zephyr/test/drivers/src/motion_sense/motion_sense.c +++ b/zephyr/test/drivers/default/src/motion_sense/motion_sense.c @@ -1,9 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "motion_sense.h" #include "test/drivers/test_state.h" diff --git a/zephyr/test/drivers/src/panic.c b/zephyr/test/drivers/default/src/panic.c index 2615c22156..4b97ed63d9 100644 --- a/zephyr/test/drivers/src/panic.c +++ b/zephyr/test/drivers/default/src/panic.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,8 +11,8 @@ #include <zephyr/device.h> #include <zephyr/logging/log.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "ec_tasks.h" @@ -20,10 +20,42 @@ #include "test/drivers/stubs.h" #include "test/drivers/test_state.h" +struct panic_test_fixture { + struct panic_data saved_pdata; +}; + +static void *panic_test_setup(void) +{ + static struct panic_test_fixture panic_fixture = { 0 }; + + return &panic_fixture; +} + +static void panic_before(void *state) +{ + struct panic_test_fixture *fixture = state; + struct panic_data *pdata = get_panic_data_write(); + + ARG_UNUSED(state); + + fixture->saved_pdata = *pdata; +} + +static void panic_after(void *state) +{ + struct panic_test_fixture *fixture = state; + struct panic_data *pdata = get_panic_data_write(); + + ARG_UNUSED(state); + + *pdata = fixture->saved_pdata; +} + /** * @brief Test Suite: Verifies panic functionality. */ -ZTEST_SUITE(panic, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +ZTEST_SUITE(panic, drivers_predicate_post_main, panic_test_setup, panic_before, + panic_after, NULL); /** * @brief TestPurpose: Verify panic set/get reason. @@ -58,3 +90,19 @@ ZTEST(panic, test_panic_reason) panic_data_print(pdata); } + +ZTEST(panic, test_panic_data_start_bad_magic) +{ + struct panic_data *pdata = get_panic_data_write(); + + pdata->magic = PANIC_DATA_MAGIC + 1; + zassert_equal(0, get_panic_data_start(), NULL); +} + +ZTEST(panic, test_get_panic_data_start) +{ + struct panic_data *pdata = get_panic_data_write(); + + pdata->magic = PANIC_DATA_MAGIC; + zassert_equal((uintptr_t)pdata, get_panic_data_start(), NULL); +} diff --git a/zephyr/test/drivers/default/src/panic_output.c b/zephyr/test/drivers/default/src/panic_output.c new file mode 100644 index 0000000000..210c862901 --- /dev/null +++ b/zephyr/test/drivers/default/src/panic_output.c @@ -0,0 +1,74 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "panic.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(panic_output, drivers_predicate_post_main, NULL, NULL, NULL, NULL); + +ZTEST(panic_output, test_panic_printf) +{ + panic_printf("test output string from %s\n", __func__); +} + +ZTEST(panic_output, test_panic_puts) +{ + panic_puts("test output string\n"); +} + +ZTEST(panic_output, test_panic_sw_reason_is_valid) +{ + zassert_false(panic_sw_reason_is_valid(PANIC_SW_BASE - 1), NULL); + /* PANIC_SW_DIV_ZERO */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE), NULL); + /* PANIC_SW_STACK_OVERFLOW */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE + 1), NULL); + /* PANIC_SW_PD_CRASH */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE + 2), NULL); + /* PANIC_SW_ASSERT */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE + 3), NULL); + /* PANIC_SW_WATCHDOG */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE + 4), NULL); + /* PANIC_SW_RNG */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE + 5), NULL); + /* PANIC_SW_PMIC_FAULT */ + zassert_true(panic_sw_reason_is_valid(PANIC_SW_BASE + 6), NULL); + zassert_false(panic_sw_reason_is_valid(PANIC_SW_BASE + 7), NULL); +} + +ZTEST(panic_output, test_panic) +{ + panic(__func__); + zassert_equal(1, system_reset_fake.call_count, + "Expected system_reset() to be called once, but was " + "called %d times", + system_reset_fake.call_count); + zassert_equal(0, system_reset_fake.arg0_val, + "Expected system_reset() to be called with flags=0, but " + "got flags=%d", + system_reset_fake.arg0_val); +} + +ZTEST(panic_output, test_panic_assert_fail) +{ + int line_num = __LINE__; + + panic_assert_fail("Test panic message", __func__, __FILE__, line_num); + zassert_equal(1, software_panic_fake.call_count, + "Expected sofware_panic() to be called once, but was " + "called %d times", + software_panic_fake.call_count); + zassert_equal(PANIC_SW_ASSERT, software_panic_fake.arg0_val, + "Expected software_panic() to be called with " + "reason=%d (PANIC_SW_ASSERT) but got %d", + PANIC_SW_ASSERT, software_panic_fake.arg0_val); + zassert_equal(line_num, software_panic_fake.arg1_val, + "Expected software_panic() to be called with " + "line=%d but got %d", + line_num, software_panic_fake.arg1_val); +} diff --git a/zephyr/test/drivers/default/src/port80.c b/zephyr/test/drivers/default/src/port80.c new file mode 100644 index 0000000000..8563c2e478 --- /dev/null +++ b/zephyr/test/drivers/default/src/port80.c @@ -0,0 +1,191 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * @brief Unit Tests for ESPI port 80 writes + */ + +#include <zephyr/logging/log.h> +#include <zephyr/shell/shell.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "host_command.h" +#include "port80.h" + +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +/* + * Flush any existing writes. + */ +static void port80_flush(void) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "port80 flush"), NULL); +} + +/** + * @brief TestPurpose: Verify port 80 writes + * + * @details + * Validate that the port 80 writes are processed correctly. + * + * Expected Results + * - The port 80 writes are received + */ +ZTEST(port80, test_port80_write) +{ + struct ec_response_port80_read response; + struct ec_params_port80_read params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_PORT80_READ, 1, response, params); + + port80_flush(); + port_80_write(0x12); + port_80_write(0x34); + /* Check the buffer using the host cmd */ + + /* Get the buffer info */ + params.subcmd = EC_PORT80_GET_INFO; + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response.get_info), NULL); + zassert_equal(response.get_info.writes, 2, NULL); + /* Read the buffer */ + params.subcmd = EC_PORT80_READ_BUFFER; + params.read_buffer.offset = 0; + params.read_buffer.num_entries = 2; + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(uint16_t) * 2, NULL); + zassert_equal(response.data.codes[0], 0x12, NULL); + zassert_equal(response.data.codes[1], 0x34, NULL); +} + +/** + * @brief TestPurpose: Verify port 80 read parameters + * + * @details + * Validate that the port 80 read parameters are checked + * + * Expected Results + * - The port 80 parameters are verified + */ +ZTEST(port80, test_port80_offset) +{ + struct ec_response_port80_read response; + struct ec_params_port80_read params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_PORT80_READ, 1, response, params); + + port80_flush(); + + params.subcmd = EC_PORT80_READ_BUFFER; + params.read_buffer.offset = 0; + params.read_buffer.num_entries = 0; + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, NULL); + params.read_buffer.offset = 0xFFFF; + params.read_buffer.num_entries = 2; + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, NULL); + params.read_buffer.offset = 0; + params.read_buffer.num_entries = 0xFFFF; + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, NULL); +} + +/** + * @brief TestPurpose: Verify port 80 reset event + * + * @details + * Validate that the port 80 handling works for the reset event + * + * Expected Results + * - The port 80 handling detects the reset event. + */ +ZTEST(port80, test_port80_special) +{ + struct ec_params_port80_read params; + struct ec_response_port80_last_boot response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_PORT80_READ, 0, response, params); + + port80_flush(); + port_80_write(0xDEAD); + port_80_write(0xAA); /* must be < 0x100 */ + port_80_write(PORT_80_EVENT_RESET); + /* Check the buffer using the host cmd version 0*/ + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(response.code, 0xAA, NULL); +} + +/** + * @brief TestPurpose: Verify port 80 subcommand + * + * @details + * Validate that the port 80 host subcommand is checked. + * + * Expected Results + * - The port 80 handling detects an invalid subcommand. + */ +ZTEST(port80, test_port80_subcmd) +{ + struct ec_params_port80_read params; + struct ec_response_port80_last_boot response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_PORT80_READ, 1, response, params); + + params.subcmd = 0xFFFF; + zassert_ok(!host_command_process(&args), NULL); +} + +/** + * @brief TestPurpose: Verify port 80 write wrap + * + * @details + * Validate that the port 80 host writes wrap around. + * + * Expected Results + * - The port 80 writes overwrites the history array. + */ +ZTEST(port80, test_port80_wrap) +{ + struct ec_params_port80_read params; + struct ec_response_port80_read response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_PORT80_READ, 1, response, params); + uint32_t size, count; + + port80_flush(); + /* Get the history array size */ + params.subcmd = EC_PORT80_GET_INFO; + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response.get_info), NULL); + size = response.get_info.history_size; + count = size + size / 2; /* Ensure write will wrap the history */ + for (uint32_t i = 0; i < count; i++) { + port_80_write(i); + } + /* + * Retrieve the first entry in the history array. + * It should equal the size of the array. + */ + params.subcmd = EC_PORT80_READ_BUFFER; + params.read_buffer.offset = 0; + params.read_buffer.num_entries = 1; + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(uint16_t), NULL); + zassert_equal(response.data.codes[0], size, NULL); +} + +/** + * @brief Test Suite: Verifies port 80 writes. + */ +ZTEST_SUITE(port80, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/power_common.c b/zephyr/test/drivers/default/src/power_common.c index 03832b6c0c..3579cb7b3c 100644 --- a/zephyr/test/drivers/src/power_common.c +++ b/zephyr/test/drivers/default/src/power_common.c @@ -1,12 +1,14 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <string.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/shell/shell.h> +#include <zephyr/shell/shell_dummy.h> #include <zephyr/shell/shell_uart.h> #include "chipset.h" @@ -27,7 +29,7 @@ #include "battery_smart.h" #include "test/drivers/utils.h" -#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) +#define BATTERY_NODE DT_NODELABEL(battery) /* Description of all power states with chipset state masks */ static struct { @@ -296,22 +298,23 @@ ZTEST(power_common, test_power_hc_smart_discharge) struct ec_params_smart_discharge params; struct host_cmd_handler_args args = BUILD_HOST_COMMAND(EC_CMD_SMART_DISCHARGE, 0, response, params); - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); int hours_to_zero; int hibern_drate; int cutoff_drate; int stayup_cap; int cutoff_cap; - emul = sbat_emul_get_ptr(BATTERY_ORD); - /* Set up host command parameters */ params.flags = EC_SMART_DISCHARGE_FLAGS_SET; /* Test fail when battery capacity is not available */ - i2c_common_emul_set_read_fail_reg(emul, SB_FULL_CHARGE_CAPACITY); + i2c_common_emul_set_read_fail_reg(common_data, SB_FULL_CHARGE_CAPACITY); zassert_equal(EC_RES_UNAVAILABLE, host_command_process(&args), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup discharge rates */ params.drate.hibern = 10; @@ -391,12 +394,13 @@ ZTEST(power_common, test_power_board_system_is_idle) struct host_cmd_handler_args args = BUILD_HOST_COMMAND(EC_CMD_SMART_DISCHARGE, 0, response, params); struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); uint64_t last_shutdown_time = 0; uint64_t target; uint64_t now; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Set up host command parameters */ @@ -421,11 +425,12 @@ ZTEST(power_common, test_power_board_system_is_idle) * Test hibernation is requested when battery remaining capacity * is not available */ - i2c_common_emul_set_read_fail_reg(emul, SB_REMAINING_CAPACITY); + i2c_common_emul_set_read_fail_reg(common_data, SB_REMAINING_CAPACITY); zassert_equal(CRITICAL_SHUTDOWN_HIBERNATE, board_system_is_idle(last_shutdown_time, &target, now), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Setup remaining capacity to trigger cutoff */ bat->cap = response.dzone.cutoff - 5; @@ -447,6 +452,42 @@ ZTEST(power_common, test_power_board_system_is_idle) } /** + * Test power console command + */ +ZTEST(power_common, power_console_cmd) +{ + const char *buffer; + size_t buffer_size; + + test_set_chipset_to_g3(); + shell_backend_dummy_clear_output(get_ec_shell()); + zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "power"), + NULL); + buffer = shell_backend_dummy_get_output(get_ec_shell(), &buffer_size); + zassert_true(strcmp(buffer, "\r\noff\r\n") == 0 || + strcmp(buffer, "\r\nOFF\r\n") == 0, + "Invalid console output %s", buffer); + + test_set_chipset_to_s0(); + shell_backend_dummy_clear_output(get_ec_shell()); + zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "power"), + NULL); + buffer = shell_backend_dummy_get_output(get_ec_shell(), &buffer_size); + zassert_true(strcmp(buffer, "\r\non\r\n") == 0 || + strcmp(buffer, "\r\nON\r\n") == 0, + "Invalid console output %s", buffer); + + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "power x"), NULL); + + zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "power on"), + NULL); + + zassert_equal(EC_SUCCESS, + shell_execute_cmd(get_ec_shell(), "power off"), NULL); +} + +/** * Common setup for hibernation delay tests. Smart discharge zone is setup, * battery is set in safe zone (which trigger hibernation), power state is * set to G3 and AC is disabled. system_hibernate mock is reset. @@ -458,10 +499,9 @@ static void setup_hibernation_delay(void *state) struct host_cmd_handler_args args = BUILD_HOST_COMMAND(EC_CMD_SMART_DISCHARGE, 0, response, params); struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); ARG_UNUSED(state); - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Setup smart discharge zone and set capacity to safe zone */ @@ -500,7 +540,7 @@ ZTEST(power_common_hibernation, test_power_hc_hibernation_delay) zassert_ok(shell_execute_cmd(get_ec_shell(), "lidclose"), NULL); zassert_equal(power_get_state(), POWER_G3, - "Power state is %d, expected G3", power_get_state()); + "Power state is %d, expected G3", power_get_state()); /* This is a no-op, but it will reset the last_shutdown_time. */ power_set_state(POWER_G3); @@ -612,28 +652,23 @@ ZTEST(power_common_hibernation, test_power_cmd_hibernation_delay) int sleep_time; zassert_equal(power_get_state(), POWER_G3, - "Power state is %d, expected G3", power_get_state()); + "Power state is %d, expected G3", power_get_state()); /* This is a no-op, but it will reset the last_shutdown_time. */ power_set_state(POWER_G3); /* Test success on call without argument */ - zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "hibdelay"), + zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "hibdelay"), NULL); /* Test error on hibernation delay argument that is not a number */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "hibdelay test1"), + shell_execute_cmd(get_ec_shell(), "hibdelay test1"), NULL); /* Set hibernate delay */ h_delay = 3; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "hibdelay 3"), - NULL); + shell_execute_cmd(get_ec_shell(), "hibdelay 3"), NULL); /* Kick chipset task to process new hibernation delay */ task_wake(TASK_ID_CHIPSET); diff --git a/zephyr/test/drivers/src/ppc_sn5s330.c b/zephyr/test/drivers/default/src/ppc_sn5s330.c index bd38f874f7..c9ba62cf20 100644 --- a/zephyr/test/drivers/src/ppc_sn5s330.c +++ b/zephyr/test/drivers/default/src/ppc_sn5s330.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,8 +7,8 @@ #include <zephyr/device.h> #include <zephyr/devicetree.h> #include <zephyr/drivers/emul.h> -#include <ztest.h> -#include <fff.h> +#include <zephyr/ztest.h> +#include <zephyr/fff.h> #include "driver/ppc/sn5s330.h" #include "driver/ppc/sn5s330_public.h" @@ -20,7 +20,8 @@ /** This must match the index of the sn5s330 in ppc_chips[] */ #define SN5S330_PORT 0 -#define EMUL emul_get_binding(DT_LABEL(DT_NODELABEL(sn5s330_emul))) +#define EMUL EMUL_DT_GET(DT_NODELABEL(sn5s330_emul)) +#define COMMON_DATA emul_sn5s330_get_i2c_common_data(EMUL) #define FUNC_SET1_ILIMPP1_MSK 0x1F #define SN5S330_INTERRUPT_DELAYMS 15 @@ -42,7 +43,7 @@ struct intercept_read_data { uint8_t replacement_val; }; -static int intercept_read_func(struct i2c_emul *emul, int reg, uint8_t *val, +static int intercept_read_func(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { struct intercept_read_data *test_data = data; @@ -53,7 +54,7 @@ static int intercept_read_func(struct i2c_emul *emul, int reg, uint8_t *val, return EC_SUCCESS; } -static int intercept_write_func(struct i2c_emul *emul, int reg, uint8_t val, +static int intercept_write_func(const struct emul *emul, int reg, uint8_t val, int bytes, void *data) { struct intercept_write_data *test_data = data; @@ -64,7 +65,7 @@ static int intercept_write_func(struct i2c_emul *emul, int reg, uint8_t val, return 1; } -static int fail_until_write_func(struct i2c_emul *emul, int reg, uint8_t val, +static int fail_until_write_func(const struct emul *emul, int reg, uint8_t val, int bytes, void *data) { uint32_t *count = data; @@ -79,23 +80,21 @@ static int fail_until_write_func(struct i2c_emul *emul, int reg, uint8_t val, ZTEST(ppc_sn5s330, test_fail_once_func_set1) { const struct emul *emul = EMUL; - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(emul); uint32_t count = 1; uint8_t func_set1_value; - i2c_common_emul_set_write_func(i2c_emul, fail_until_write_func, &count); + i2c_common_emul_set_write_func(COMMON_DATA, fail_until_write_func, + &count); zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); zassert_equal(count, 0, NULL); sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET1, &func_set1_value); zassert_true((func_set1_value & SN5S330_ILIM_1_62) != 0, NULL); - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_write_func(COMMON_DATA, NULL, NULL); } ZTEST(ppc_sn5s330, test_dead_battery_boot_force_pp2_fets_set) { - const struct emul *emul = EMUL; - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(emul); struct intercept_write_data test_write_data = { .reg_to_intercept = SN5S330_FUNC_SET3, .val_intercepted = 0, @@ -106,9 +105,9 @@ ZTEST(ppc_sn5s330, test_dead_battery_boot_force_pp2_fets_set) .replacement_val = SN5S330_DB_BOOT, }; - i2c_common_emul_set_write_func(i2c_emul, intercept_write_func, + i2c_common_emul_set_write_func(COMMON_DATA, intercept_write_func, &test_write_data); - i2c_common_emul_set_read_func(i2c_emul, intercept_read_func, + i2c_common_emul_set_read_func(COMMON_DATA, intercept_read_func, &test_read_data); zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); @@ -194,9 +193,8 @@ ZTEST(ppc_sn5s330, test_vbus_source_sink_enable) } /* This test depends on EC GIPO initialization happening before I2C */ -BUILD_ASSERT( - CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY < CONFIG_I2C_INIT_PRIORITY, - "GPIO initialization must happen before I2C"); +BUILD_ASSERT(CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY < CONFIG_I2C_INIT_PRIORITY, + "GPIO initialization must happen before I2C"); ZTEST(ppc_sn5s330, test_vbus_discharge) { const struct emul *emul = EMUL; @@ -385,18 +383,17 @@ ZTEST(ppc_sn5s330, test_sn5s330_set_vconn_fet) } /* Make an I2C emulator mock read func wrapped in FFF */ -FAKE_VALUE_FUNC(int, dump_read_fn, struct i2c_emul *, int, uint8_t *, int, +FAKE_VALUE_FUNC(int, dump_read_fn, const struct emul *, int, uint8_t *, int, void *); ZTEST(ppc_sn5s330, test_dump) { int ret; - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); /* Set up our fake read function to pass through to the real emul */ RESET_FAKE(dump_read_fn); dump_read_fn_fake.return_val = 1; - i2c_common_emul_set_read_func(i2c_emul, dump_read_fn, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, dump_read_fn, NULL); ret = sn5s330_drv.reg_dump(SN5S330_PORT); @@ -438,74 +435,85 @@ enum i2c_operation { I2C_READ, }; -#define INIT_I2C_FAIL_HELPER(EMUL, RW, REG) \ - do { \ - if ((RW) == I2C_READ) { \ - i2c_common_emul_set_read_fail_reg((EMUL), (REG)); \ - i2c_common_emul_set_write_fail_reg( \ - (EMUL), I2C_COMMON_EMUL_NO_FAIL_REG); \ - } else if ((RW) == I2C_WRITE) { \ - i2c_common_emul_set_read_fail_reg( \ - (EMUL), I2C_COMMON_EMUL_NO_FAIL_REG); \ - i2c_common_emul_set_write_fail_reg((EMUL), (REG)); \ - } else { \ - zassert_true(false, "Invalid I2C operation"); \ - } \ - zassert_equal( \ - EC_ERROR_INVAL, sn5s330_drv.init(SN5S330_PORT), \ - "Did not get EC_ERROR_INVAL when reg %s (0x%02x)" \ - "could not be %s", \ - #REG, (REG), \ - ((RW) == I2C_READ) ? "read" : "written"); \ +#define INIT_I2C_FAIL_HELPER(COMMON_DATA, RW, REG) \ + do { \ + if ((RW) == I2C_READ) { \ + i2c_common_emul_set_read_fail_reg((COMMON_DATA), \ + (REG)); \ + i2c_common_emul_set_write_fail_reg( \ + (COMMON_DATA), I2C_COMMON_EMUL_NO_FAIL_REG); \ + } else if ((RW) == I2C_WRITE) { \ + i2c_common_emul_set_read_fail_reg( \ + (COMMON_DATA), I2C_COMMON_EMUL_NO_FAIL_REG); \ + i2c_common_emul_set_write_fail_reg((COMMON_DATA), \ + (REG)); \ + } else { \ + zassert_true(false, "Invalid I2C operation"); \ + } \ + zassert_equal( \ + EC_ERROR_INVAL, sn5s330_drv.init(SN5S330_PORT), \ + "Did not get EC_ERROR_INVAL when reg %s (0x%02x)" \ + "could not be %s", \ + #REG, (REG), ((RW) == I2C_READ) ? "read" : "written"); \ } while (0) ZTEST(ppc_sn5s330, test_init_reg_fails) { - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); - /* Fail on each of the I2C operations the init function does to ensure * we get the correct return value. This includes operations made by * clr_flags() and set_flags(). */ - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET5); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_READ, SN5S330_FUNC_SET6); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET6); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET2); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET9); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET11); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_READ, SN5S330_FUNC_SET8); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET8); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_READ, SN5S330_FUNC_SET4); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET4); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_READ, SN5S330_FUNC_SET3); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET3); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_READ, SN5S330_FUNC_SET10); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_FUNC_SET10); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_STATUS_REG4); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_MASK_RISE_REG1); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_MASK_FALL_REG1); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_MASK_RISE_REG2); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_MASK_FALL_REG2); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_MASK_RISE_REG3); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_MASK_FALL_REG3); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_READ, SN5S330_INT_STATUS_REG4); - - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_TRIP_RISE_REG1); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_TRIP_RISE_REG2); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_TRIP_RISE_REG3); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_TRIP_FALL_REG1); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_TRIP_FALL_REG2); - INIT_I2C_FAIL_HELPER(i2c_emul, I2C_WRITE, SN5S330_INT_TRIP_FALL_REG3); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET5); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_READ, SN5S330_FUNC_SET6); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET6); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET2); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET9); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET11); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_READ, SN5S330_FUNC_SET8); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET8); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_READ, SN5S330_FUNC_SET4); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET4); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_READ, SN5S330_FUNC_SET3); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET3); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_READ, SN5S330_FUNC_SET10); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_FUNC_SET10); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, SN5S330_INT_STATUS_REG4); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_MASK_RISE_REG1); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_MASK_FALL_REG1); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_MASK_RISE_REG2); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_MASK_FALL_REG2); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_MASK_RISE_REG3); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_MASK_FALL_REG3); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_READ, SN5S330_INT_STATUS_REG4); + + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_TRIP_RISE_REG1); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_TRIP_RISE_REG2); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_TRIP_RISE_REG3); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_TRIP_FALL_REG1); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_TRIP_FALL_REG2); + INIT_I2C_FAIL_HELPER(COMMON_DATA, I2C_WRITE, + SN5S330_INT_TRIP_FALL_REG3); } -static int pp_fet_test_mock_read_fn(struct i2c_emul *emul, int reg, +static int pp_fet_test_mock_read_fn(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { int *counter = data; @@ -537,11 +545,10 @@ ZTEST(ppc_sn5s330, test_pp_fet_enable_fail) * battery mode, which we take care of in the mock read function. */ - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); int counter; int ret; - i2c_common_emul_set_read_func(i2c_emul, pp_fet_test_mock_read_fn, + i2c_common_emul_set_read_func(COMMON_DATA, pp_fet_test_mock_read_fn, &counter); /* Allow only the first access to the reg to succeed. This tests the @@ -594,10 +601,9 @@ ZTEST(ppc_sn5s330, test_set_polarity) ZTEST(ppc_sn5s330, test_set_vbus_source_current_limit_fail) { - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); int ret; - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET1); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET1); ret = sn5s330_drv.set_vbus_source_current_limit(SN5S330_PORT, TYPEC_RP_3A0); @@ -607,10 +613,9 @@ ZTEST(ppc_sn5s330, test_set_vbus_source_current_limit_fail) ZTEST(ppc_sn5s330, test_sn5s330_discharge_vbus_fail) { - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); int ret; - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET3); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET3); ret = sn5s330_drv.discharge_vbus(SN5S330_PORT, false); zassert_equal(EC_ERROR_INVAL, ret, "Expected EC_ERROR_INVAL but got %d", @@ -621,25 +626,24 @@ ZTEST(ppc_sn5s330, test_low_power_mode_fail) { /* Test failed I2C operations in the enter low power mode function */ - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); int ret; - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET3); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET3); ret = sn5s330_drv.enter_low_power_mode(SN5S330_PORT); zassert_equal(EC_ERROR_INVAL, ret, "Expected EC_ERROR_INVAL but got %d", ret); - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET4); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET4); ret = sn5s330_drv.enter_low_power_mode(SN5S330_PORT); zassert_equal(EC_ERROR_INVAL, ret, "Expected EC_ERROR_INVAL but got %d", ret); - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET2); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET2); ret = sn5s330_drv.enter_low_power_mode(SN5S330_PORT); zassert_equal(EC_ERROR_INVAL, ret, "Expected EC_ERROR_INVAL but got %d", ret); - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET9); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET9); ret = sn5s330_drv.enter_low_power_mode(SN5S330_PORT); zassert_equal(EC_ERROR_INVAL, ret, "Expected EC_ERROR_INVAL but got %d", ret); @@ -649,10 +653,9 @@ ZTEST(ppc_sn5s330, test_sn5s330_set_vconn_fail) { /* Test failed I2C operations in the set Vconn function */ - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); int ret; - i2c_common_emul_set_read_fail_reg(i2c_emul, SN5S330_FUNC_SET4); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, SN5S330_FUNC_SET4); ret = sn5s330_drv.set_vconn(SN5S330_PORT, 0); zassert_equal(EC_ERROR_INVAL, ret, "Expected EC_ERROR_INVAL but got %d", ret); @@ -660,14 +663,12 @@ ZTEST(ppc_sn5s330, test_sn5s330_set_vconn_fail) static inline void reset_sn5s330_state(void) { - struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); - - i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); - i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, - I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_read_fail_reg(i2c_emul, - I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_func(COMMON_DATA, NULL, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, NULL, NULL); + i2c_common_emul_set_write_fail_reg(COMMON_DATA, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(COMMON_DATA, + I2C_COMMON_EMUL_NO_FAIL_REG); sn5s330_emul_reset(EMUL); RESET_FAKE(sn5s330_emul_interrupt_set_stub); } diff --git a/zephyr/test/drivers/src/ppc_syv682x.c b/zephyr/test/drivers/default/src/ppc_syv682x.c index aa08c26745..edfbd45171 100644 --- a/zephyr/test/drivers/src/ppc_syv682x.c +++ b/zephyr/test/drivers/default/src/ppc_syv682x.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,10 +7,10 @@ #include <zephyr/devicetree/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/drivers/gpio.h> -#include <fff.h> -#include <zephyr/zephyr.h> -#include <ztest.h> -#include <ztest_assert.h> +#include <zephyr/fff.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include <zephyr/ztest_assert.h> #include "emul/emul_common_i2c.h" #include "emul/emul_syv682x.h" @@ -21,11 +21,12 @@ #include "test/drivers/utils.h" #include "usbc_ppc.h" -#define SYV682X_ORD DT_DEP_ORD(DT_NODELABEL(syv682x_emul)) +#define SYV682X_NODE DT_NODELABEL(syv682x_emul) #define GPIO_USB_C1_FRS_EN_PATH DT_PATH(named_gpios, usb_c1_frs_en) struct ppc_syv682x_fixture { - struct i2c_emul *ppc_emul; + const struct emul *ppc_emul; + struct i2c_common_emul_data *common_data; const struct device *frs_en_gpio_port; int frs_en_gpio_pin; }; @@ -42,7 +43,9 @@ static void *syv682x_test_setup(void) { static struct ppc_syv682x_fixture fixture; - fixture.ppc_emul = syv682x_emul_get(SYV682X_ORD); + fixture.ppc_emul = EMUL_DT_GET(SYV682X_NODE); + fixture.common_data = + emul_syv682x_get_i2c_common_data(fixture.ppc_emul); zassume_not_null(fixture.ppc_emul, NULL); fixture.frs_en_gpio_port = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_USB_C1_FRS_EN_PATH, gpios)); @@ -55,7 +58,8 @@ static void *syv682x_test_setup(void) static void syv682x_test_after(void *data) { struct ppc_syv682x_fixture *fixture = data; - struct i2c_emul *emul = fixture->ppc_emul; + const struct emul *emul = fixture->ppc_emul; + struct i2c_common_emul_data *common_data = fixture->common_data; /* Disable the power path and clear interrupt conditions. */ zassume_ok(syv682x_emul_set_reg(emul, SYV682X_CONTROL_1_REG, @@ -65,12 +69,14 @@ static void syv682x_test_after(void *data) SYV682X_CONTROL_4_NONE); /* Clear the mock read/write functions */ - i2c_common_emul_set_read_func(emul, NULL, NULL); - i2c_common_emul_set_write_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); + i2c_common_emul_set_write_func(common_data, NULL, NULL); /* Don't fail on any register access */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST_SUITE(ppc_syv682x, drivers_predicate_post_main, syv682x_test_setup, NULL, @@ -114,14 +120,15 @@ ZTEST_F(ppc_syv682x, test_syv682x_init_dead_battery) * With a dead battery, the device powers up sinking VBUS, and the * driver should keep that going. */ - zassume_ok(syv682x_emul_set_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, + zassume_ok(syv682x_emul_set_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, SYV682X_CONTROL_1_CH_SEL), NULL); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_VSAFE_5V, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_VSAFE_5V, SYV682X_CONTROL_4_NONE); zassert_ok(ppc_init(syv682x_port), "PPC init failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), NULL); zassert_true(reg & SYV682X_CONTROL_1_CH_SEL, "Dead battery init, but CH_SEL set to 5V power path"); @@ -137,14 +144,15 @@ ZTEST_F(ppc_syv682x, test_syv682x_init_vsafe0v) uint8_t reg; /* With VBUS at vSafe0V, init should set the default configuration. */ - zassume_ok(syv682x_emul_set_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, + zassume_ok(syv682x_emul_set_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, SYV682X_CONTROL_1_PWR_ENB), NULL); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_VSAFE_0V, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_VSAFE_0V, SYV682X_CONTROL_4_NONE); zassert_ok(ppc_init(syv682x_port), "PPC init failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), NULL); check_control_1_default_init(reg); } @@ -154,14 +162,15 @@ ZTEST_F(ppc_syv682x, test_syv682x_init_sink_disabled) uint8_t reg; /* With sink disabled, init should do the same thing. */ - zassume_ok(syv682x_emul_set_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, + zassume_ok(syv682x_emul_set_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, SYV682X_CONTROL_1_CH_SEL), NULL); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_VSAFE_0V, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_VSAFE_0V, SYV682X_CONTROL_4_NONE); zassert_ok(ppc_init(syv682x_port), "PPC init failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), NULL); check_control_1_default_init(reg); } @@ -172,8 +181,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_init_common) int ilim; zassert_ok(ppc_init(syv682x_port), "PPC init failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), NULL); /* @@ -181,14 +190,14 @@ ZTEST_F(ppc_syv682x, test_syv682x_init_common) * current limit according to configuration, set over-current, over- * voltage, and discharge parameters appropriately, and enable CC lines. */ - zassert_equal(gpio_emul_output_get(this->frs_en_gpio_port, - this->frs_en_gpio_pin), + zassert_equal(gpio_emul_output_get(fixture->frs_en_gpio_port, + fixture->frs_en_gpio_pin), 0, "FRS enabled, but FRS GPIO not asserted"); ilim = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; zassert_equal(ilim, CONFIG_PLATFORM_EC_USB_PD_PULLUP, "Default init, but 5V current limit set to %d", ilim); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_2_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_2_REG, ®), NULL); zassert_equal(reg, (SYV682X_OC_DELAY_10MS << SYV682X_OC_DELAY_SHIFT) | @@ -196,15 +205,15 @@ ZTEST_F(ppc_syv682x, test_syv682x_init_common) << SYV682X_DSG_RON_SHIFT) | (SYV682X_DSG_TIME_50MS << SYV682X_DSG_TIME_SHIFT), "Default init, but CONTROL_2 is 0x%x", reg); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_3_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_3_REG, ®), NULL); zassert_equal(reg, (SYV682X_OVP_23_7 << SYV682X_OVP_BIT_SHIFT) | SYV682X_RVS_MASK, "Default init, but CONTROL_3 is 0x%x", reg); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), NULL); zassert_equal(reg & ~SYV682X_CONTROL_4_INT_MASK, SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS, @@ -217,8 +226,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_vbus_source_enable) zassert_ok(ppc_vbus_source_enable(syv682x_port, true), "VBUS enable failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "VBUS sourcing enabled but power path disabled"); @@ -239,7 +248,7 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_source_oc) zassume_ok(ppc_vbus_source_enable(syv682x_port, true), "VBUS enable failed"); /* An OC event less than 100 ms should not cause VBUS to turn off. */ - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_OC_5V, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_OC_5V, SYV682X_CONTROL_4_NONE); msleep(50); zassert_true(ppc_is_sourcing_vbus(syv682x_port), @@ -259,7 +268,7 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_tsd) */ zassume_ok(ppc_vbus_source_enable(syv682x_port, true), "Source enable failed"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_TSD, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_TSD, SYV682X_CONTROL_4_NONE); msleep(1); zassert_false(ppc_is_sourcing_vbus(syv682x_port), @@ -271,7 +280,7 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_vbus_ovp) /* An OVP event should cause the driver to disable the source path. */ zassume_ok(ppc_vbus_source_enable(syv682x_port, true), "Source enable failed"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_OVP, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_OVP, SYV682X_CONTROL_4_NONE); msleep(1); zassert_false(ppc_is_sourcing_vbus(syv682x_port), @@ -289,29 +298,29 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_vbus_hv_oc) */ zassume_ok(ppc_vbus_sink_enable(syv682x_port, true), "Sink enable failed"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_OC_HV, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_OC_HV, SYV682X_CONTROL_4_NONE); msleep(1); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "Power path disabled after HV_OC handled"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_OC_HV, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_OC_HV, SYV682X_CONTROL_4_NONE); /* Alert GPIO doesn't change so wait for delayed syv682x interrupt */ msleep(15); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "Power path disabled after HV_OC handled"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_OC_HV, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_OC_HV, SYV682X_CONTROL_4_NONE); /* Alert GPIO doesn't change so wait for delayed syv682x interrupt */ msleep(15); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, SYV682X_CONTROL_1_PWR_ENB, @@ -327,18 +336,18 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_vconn_oc) * VCONN off. */ ppc_set_vconn(syv682x_port, true); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_NONE, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_NONE, SYV682X_CONTROL_4_VCONN_OCP); msleep(1); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), "VCONN disabled after initial VCONN OC"); msleep(50); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), @@ -348,8 +357,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_vconn_oc) * should turn VCONN off. */ msleep(60); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_false(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), @@ -367,11 +376,11 @@ ZTEST_F(ppc_syv682x, test_syv682x_interrupt_vconn_ov) * driver should then run generic CC over-voltage handling. */ ppc_set_vconn(syv682x_port, true); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_NONE, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_NONE, SYV682X_CONTROL_4_VBAT_OVP); msleep(1); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & SYV682X_CONTROL_4_CC1_BPS, "CC1 disabled after handling VBAT_OVP"); @@ -397,10 +406,10 @@ ZTEST_F(ppc_syv682x, test_syv682x_frs_enable) "PPC is sourcing VBUS after sink enabled"); ppc_set_polarity(syv682x_port, 0 /* CC1 */); ppc_set_frs_enable(syv682x_port, true); - zassert_equal(gpio_emul_output_get(gpio_dev, this->frs_en_gpio_pin), 1, - "FRS enabled, but FRS GPIO not asserted"); - zassert_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassert_equal(gpio_emul_output_get(gpio_dev, fixture->frs_en_gpio_pin), + 1, "FRS enabled, but FRS GPIO not asserted"); + zassert_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_equal( reg & (SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS), @@ -420,10 +429,10 @@ ZTEST_F(ppc_syv682x, test_syv682x_frs_disable) ppc_set_polarity(syv682x_port, 0 /* CC1 */); ppc_set_frs_enable(syv682x_port, false); - zassert_equal(gpio_emul_output_get(gpio_dev, this->frs_en_gpio_pin), 0, - "FRS disabled, but FRS GPIO not deasserted"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_4_REG, - ®), + zassert_equal(gpio_emul_output_get(gpio_dev, fixture->frs_en_gpio_pin), + 0, "FRS disabled, but FRS GPIO not deasserted"); + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_equal( reg & (SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS), @@ -437,12 +446,12 @@ ZTEST_F(ppc_syv682x, test_syv682x_frs_trigger) * An FRS event when the PPC is Sink should cause the PPC to switch from * Sink to Source. */ - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_FRS, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_FRS, SYV682X_CONTROL_4_NONE); msleep(1); zassert_true(ppc_is_sourcing_vbus(syv682x_port), "PPC is not sourcing VBUS after FRS signal handled"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_NONE, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_NONE, SYV682X_CONTROL_4_NONE); } @@ -454,8 +463,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_source_current_limit_usb_default) zassert_ok(ppc_set_vbus_source_current_limit(syv682x_port, TYPEC_RP_USB), "Could not set source current limit"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); ilim_val = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; zassert_equal(reg & SYV682X_5V_ILIM_MASK, SYV682X_5V_ILIM_1_25, @@ -470,8 +479,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_source_current_limit_1500ma) zassert_ok(ppc_set_vbus_source_current_limit(syv682x_port, TYPEC_RP_1A5), "Could not set source current limit"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); ilim_val = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; zassert_equal(ilim_val, SYV682X_5V_ILIM_1_75, @@ -486,8 +495,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_source_current_limit_3000ma) zassert_ok(ppc_set_vbus_source_current_limit(syv682x_port, TYPEC_RP_3A0), "Could not set source current limit"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); ilim_val = (reg & SYV682X_5V_ILIM_MASK) >> SYV682X_5V_ILIM_BIT_SHIFT; zassert_equal(ilim_val, SYV682X_5V_ILIM_3_30, @@ -503,7 +512,7 @@ ZTEST_F(ppc_syv682x, test_syv682x_write_busy) * timeout. It is not a goal of this test to verify the frequency of * polling or the exact value of the timeout. */ - syv682x_emul_set_busy_reads(this->ppc_emul, 1000); + syv682x_emul_set_busy_reads(fixture->ppc_emul, 1000); zassert_equal(ppc_set_vbus_source_current_limit(syv682x_port, TYPEC_RP_USB), EC_ERROR_TIMEOUT, "SYV682 busy, but write completed"); @@ -514,12 +523,12 @@ ZTEST_F(ppc_syv682x, test_syv682x_write_busy) * If the busy bit clears before the driver reaches its timeout, the * write should succeed. */ - syv682x_emul_set_busy_reads(this->ppc_emul, 1); + syv682x_emul_set_busy_reads(fixture->ppc_emul, 1); zassert_equal(ppc_set_vbus_source_current_limit(syv682x_port, TYPEC_RP_USB), 0, "SYV682 not busy, but write failed"); - syv682x_emul_set_busy_reads(this->ppc_emul, 0); + syv682x_emul_set_busy_reads(fixture->ppc_emul, 0); } ZTEST_F(ppc_syv682x, test_syv682x_dev_is_connected) @@ -528,16 +537,16 @@ ZTEST_F(ppc_syv682x, test_syv682x_dev_is_connected) zassert_ok(ppc_dev_is_connected(syv682x_port, PPC_DEV_SRC), "Could not connect device as source"); - zassert_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_2_REG, - ®), + zassert_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_2_REG, ®), "Reading CONTROL_2 failed"); zassert_false(reg & SYV682X_CONTROL_2_FDSG, "Connected as source, but force discharge enabled"); zassert_ok(ppc_dev_is_connected(syv682x_port, PPC_DEV_DISCONNECTED), "Could not disconnect device"); - zassert_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_2_REG, - ®), + zassert_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_2_REG, ®), "Reading CONTROL_2 failed"); zassert_true(reg & SYV682X_CONTROL_2_FDSG, "Disconnected, but force discharge disabled"); @@ -571,8 +580,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_vbus_sink_enable_power_path) "VBUS enable failed"); zassert_ok(ppc_vbus_sink_enable(syv682x_port, true), "Sink disable failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), NULL); zassert_true(reg & SYV682X_CONTROL_1_CH_SEL, "Sink enabled, but CH_SEL set to 5V power path"); @@ -596,8 +605,8 @@ ZTEST_F(ppc_syv682x, test_syv682x_vbus_sink_disable) zassert_ok(ppc_vbus_sink_enable(syv682x_port, false), "Sink disable failed"); - zassume_ok(syv682x_emul_get_reg(this->ppc_emul, SYV682X_CONTROL_1_REG, - ®), + zassume_ok(syv682x_emul_get_reg(fixture->ppc_emul, + SYV682X_CONTROL_1_REG, ®), NULL); zassert_true(reg & SYV682X_CONTROL_1_PWR_ENB, "Sink disabled, but power path enabled"); @@ -613,11 +622,12 @@ ZTEST_F(ppc_syv682x, test_syv682x_vbus_sink_oc_limit) * cleared by sink disable. */ for (int i = 0; i < 4; ++i) { - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_OC_HV, + syv682x_emul_set_condition(fixture->ppc_emul, + SYV682X_STATUS_OC_HV, SYV682X_CONTROL_4_NONE); msleep(15); } - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_NONE, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_NONE, SYV682X_CONTROL_4_NONE); zassert_not_equal(ppc_vbus_sink_enable(syv682x_port, true), EC_SUCCESS, @@ -633,7 +643,7 @@ ZTEST_F(ppc_syv682x, test_syv682x_vbus_sink_oc_limit) ZTEST_F(ppc_syv682x, test_syv682x_set_vconn) { - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_NONE, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_NONE, SYV682X_CONTROL_4_VBAT_OVP); zassert_not_equal(ppc_set_vconn(syv682x_port, true), EC_SUCCESS, "VBAT OVP, but ppc_set_vconn succeeded"); @@ -654,7 +664,7 @@ ZTEST(ppc_syv682x, test_syv682x_ppc_dump) * reg_access_to_fail on read number N, where N is the initial value of * reg_access_fail_countdown. */ -static int mock_read_intercept_reg_fail(struct i2c_emul *emul, int reg, +static int mock_read_intercept_reg_fail(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { struct reg_to_fail_data *test_data = data; @@ -670,10 +680,11 @@ static int mock_read_intercept_reg_fail(struct i2c_emul *emul, int reg, ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_status) { /* Failed STATUS read should cause init to fail. */ - i2c_common_emul_set_read_fail_reg(this->ppc_emul, SYV682X_STATUS_REG); + i2c_common_emul_set_read_fail_reg(fixture->common_data, + SYV682X_STATUS_REG); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "STATUS read error, but init succeeded"); - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } @@ -686,7 +697,7 @@ ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_control_1) }; /* Failed CONTROL_1 read */ - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, SYV682X_CONTROL_1_REG); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_1 read error, but init succeeded"); @@ -704,34 +715,34 @@ ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_control_1) "succeeded"); zassert_ok(drv->reg_dump(syv682x_port), "CONTROL_1 read error, and ppc_dump failed"); - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Init reads CONTROL_1 several times. The 3rd read happens while * setting the source current limit. Check that init fails when that * read fails. */ - i2c_common_emul_set_read_func(this->ppc_emul, + i2c_common_emul_set_read_func(fixture->common_data, &mock_read_intercept_reg_fail, ®_fail); reg_fail.reg_access_to_fail = SYV682X_CONTROL_1_REG; reg_fail.reg_access_fail_countdown = 3; zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_1 read error, but init succeeded"); - i2c_common_emul_set_read_func(this->ppc_emul, NULL, NULL); + i2c_common_emul_set_read_func(fixture->common_data, NULL, NULL); /* Failed CONTROL_1 write */ - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, SYV682X_CONTROL_1_REG); /* During init, the driver will write CONTROL_1 either to disable all * power paths (normal case) or to enable the sink path (dead battery * case). vSafe0V in STATUS is one indication of the normal case. */ - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_VSAFE_0V, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_VSAFE_0V, SYV682X_CONTROL_4_NONE); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_1 write error, but init succeeded"); - syv682x_emul_set_condition(this->ppc_emul, SYV682X_STATUS_NONE, + syv682x_emul_set_condition(fixture->ppc_emul, SYV682X_STATUS_NONE, SYV682X_CONTROL_4_NONE); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_1 write error, but init succeeded"); @@ -740,65 +751,65 @@ ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_control_1) EC_SUCCESS, "CONTROL_1 write error, but VBUS source " "enable succeeded"); - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_control_2) { /* Failed CONTROL_2 read */ - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, SYV682X_CONTROL_2_REG); zassert_not_equal(ppc_discharge_vbus(syv682x_port, true), EC_SUCCESS, "CONTROL_2 read error, but VBUS discharge succeeded"); - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Failed CONTROL_2 write */ - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, SYV682X_CONTROL_2_REG); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_2 write error, but init succeeded"); - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_control_3) { /* Failed CONTROL_3 read */ - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, SYV682X_CONTROL_3_REG); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_3 read error, but VBUS discharge succeeded"); - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Failed CONTROL_3 write */ - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, SYV682X_CONTROL_3_REG); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_3 write error, but init succeeded"); - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } ZTEST_F(ppc_syv682x, test_syv682x_i2c_error_control_4) { /* Failed CONTROL_4 read */ - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, SYV682X_CONTROL_4_REG); zassert_not_equal(ppc_set_vconn(syv682x_port, true), EC_SUCCESS, "CONTROL_2 read error, but VCONN set succeeded"); - i2c_common_emul_set_read_fail_reg(this->ppc_emul, + i2c_common_emul_set_read_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Failed CONTROL_4 write */ - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, SYV682X_CONTROL_4_REG); zassert_not_equal(ppc_init(syv682x_port), EC_SUCCESS, "CONTROL_4 write error, but init succeeded"); zassert_not_equal(ppc_set_vconn(syv682x_port, true), EC_SUCCESS, "CONTROL_4 write error, but VCONN set succeeded"); - i2c_common_emul_set_write_fail_reg(this->ppc_emul, + i2c_common_emul_set_write_fail_reg(fixture->common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } diff --git a/zephyr/test/drivers/src/ps8xxx.c b/zephyr/test/drivers/default/src/ps8xxx.c index dc1695d793..29d720a639 100644 --- a/zephyr/test/drivers/src/ps8xxx.c +++ b/zephyr/test/drivers/default/src/ps8xxx.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "emul/emul_common_i2c.h" @@ -20,32 +20,32 @@ #include "driver/tcpm/ps8xxx_public.h" #include "test/drivers/test_state.h" -#define PS8XXX_EMUL_LABEL DT_LABEL(DT_NODELABEL(ps8xxx_emul)) +#define PS8XXX_EMUL_NODE DT_NODELABEL(ps8xxx_emul) /** Test PS8xxx init fail conditions common for all PS8xxx devices */ static void test_ps8xxx_init_fail(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); /* Test fail on FW reg read */ - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, PS8XXX_REG_FW_REV); + i2c_common_emul_set_read_fail_reg(common_data, PS8XXX_REG_FW_REV); zassert_equal(EC_ERROR_TIMEOUT, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on FW reg set to 0 */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x0); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x0); zassert_equal(EC_ERROR_TIMEOUT, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); /* Set arbitrary FW reg value != 0 for rest of the test */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x31); /* Test fail on TCPCI init */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_POWER_STATUS, TCPC_REG_POWER_STATUS_UNINIT); zassert_equal(EC_ERROR_TIMEOUT, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); @@ -67,61 +67,60 @@ ZTEST(ps8815, test_init_fail) */ ZTEST(ps8805, test_ps8805_init) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *p1_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); + struct i2c_common_emul_data *p1_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_1); /* Set arbitrary FW reg value != 0 for this test */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x31); /* Set correct power status for this test */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, 0x0); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_POWER_STATUS, 0x0); /* Test fail on read I2C debug reg */ - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, PS8XXX_REG_I2C_DEBUGGING_ENABLE); - zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), - NULL); - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on read DCI reg */ - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, PS8XXX_P1_REG_MUX_USB_DCI_CFG); - zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), - NULL); - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test successful init */ zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); - check_tcpci_reg(tcpci_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, + check_tcpci_reg(ps8xxx_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, PS8XXX_REG_I2C_DEBUGGING_ENABLE_ON); zassert_equal(PS8XXX_REG_MUX_USB_DCI_CFG_MODE_OFF, ps8xxx_emul_get_dci_cfg(ps8xxx_emul) & - PS8XXX_REG_MUX_USB_DCI_CFG_MODE_MASK, NULL); + PS8XXX_REG_MUX_USB_DCI_CFG_MODE_MASK, + NULL); } /** Test PS8815 init */ ZTEST(ps8815, test_ps8815_init) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *p1_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *p1_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_1); /* Set arbitrary FW reg value != 0 for this test */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x31); /* Set correct power status for rest of the test */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, 0x0); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_POWER_STATUS, 0x0); /* Test fail on reading HW revision register */ - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, PS8815_P1_REG_HW_REVISION); - zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), - NULL); - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test successful init */ @@ -131,23 +130,22 @@ ZTEST(ps8815, test_ps8815_init) /** Test PS8xxx release */ static void test_ps8xxx_release(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); + uint64_t start_ms; /* Test successful release with correct FW reg read */ start_ms = k_uptime_get(); - zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.release(USBC_PORT_C1), - NULL); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.release(USBC_PORT_C1), NULL); zassert_true(k_uptime_get() - start_ms < 10, "release on correct FW reg read shouldn't wait for chip"); /* Test delay on FW reg read fail */ - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, PS8XXX_REG_FW_REV); + i2c_common_emul_set_read_fail_reg(common_data, PS8XXX_REG_FW_REV); start_ms = k_uptime_get(); - zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.release(USBC_PORT_C1), - NULL); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.release(USBC_PORT_C1), NULL); zassert_true(k_uptime_get() - start_ms >= 10, "release on FW reg read fail should wait for chip"); } @@ -169,12 +167,11 @@ ZTEST(ps8815, test_release) static void check_ps8815_set_cc(enum tcpc_rp_value rp, enum tcpc_cc_pull cc, uint16_t rp_detect_ctrl, const char *test_case) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); uint16_t reg_val, exp_role_ctrl; /* Clear RP detect register to see if it is set after test */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_RP_DETECT_CONTROL, 0); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_RP_DETECT_CONTROL, 0); exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc); @@ -184,12 +181,13 @@ static void check_ps8815_set_cc(enum tcpc_rp_value rp, enum tcpc_cc_pull cc, zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.set_cc(USBC_PORT_C1, cc), "Failed to set CC for case: %s", test_case); - zassert_ok(tcpci_emul_get_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, ®_val), + zassert_ok(tcpci_emul_get_reg(ps8xxx_emul, TCPC_REG_ROLE_CTRL, + ®_val), "Failed tcpci_emul_get_reg() for case: %s", test_case); zassert_equal(exp_role_ctrl, reg_val, "0x%x != (role_ctrl = 0x%x) for case: %s", exp_role_ctrl, reg_val, test_case); - zassert_ok(tcpci_emul_get_reg(tcpci_emul, PS8XXX_REG_RP_DETECT_CONTROL, + zassert_ok(tcpci_emul_get_reg(ps8xxx_emul, PS8XXX_REG_RP_DETECT_CONTROL, ®_val), "Failed tcpci_emul_get_reg() for case: %s", test_case); zassert_equal(rp_detect_ctrl, reg_val, @@ -200,13 +198,19 @@ static void check_ps8815_set_cc(enum tcpc_rp_value rp, enum tcpc_cc_pull cc, /** Test PS8815 set cc and device specific workarounds */ ZTEST(ps8815, test_ps8815_set_cc) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); int64_t start_time; int64_t delay; + /* + * Set other hw revision to disable workaround for b/171430855 (delay + * 1 ms on role control reg update). Delay could introduce thread switch + * which may disturb this test. + */ + ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a02); + /* Set firmware version <= 0x10 to set "disable rp detect" workaround */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x8); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x8); zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, RP_DETECT_DISABLE, @@ -226,7 +230,7 @@ ZTEST(ps8815, test_ps8815_set_cc) * Set firmware version <= 0x10 to set "disable rp detect" workaround * again */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0xa); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0xa); zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); /* CC RD shouldn't trigger "disable rp detect" workaround */ @@ -237,7 +241,7 @@ ZTEST(ps8815, test_ps8815_set_cc) * Set firmware version > 0x10 to unset "disable rp detect" * workaround */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x12); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x12); zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); /* Firmware > 0x10 shouldn't trigger "disable rp detect" workaround */ @@ -255,8 +259,8 @@ ZTEST(ps8815, test_ps8815_set_cc) check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, "delay on HW rev 0x0a00"); delay = k_uptime_delta(&start_time); - zassert_true(delay >= 1, - "expected delay on HW rev 0x0a00 (delay %lld)", delay); + zassert_true(delay >= 1, "expected delay on HW rev 0x0a00 (delay %lld)", + delay); /* * Set hw revision 0x0a01 to enable workaround for b/171430855 (delay @@ -268,8 +272,8 @@ ZTEST(ps8815, test_ps8815_set_cc) check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, "delay on HW rev 0x0a01"); delay = k_uptime_delta(&start_time); - zassert_true(delay >= 1, - "expected delay on HW rev 0x0a01 (delay %lld)", delay); + zassert_true(delay >= 1, "expected delay on HW rev 0x0a01 (delay %lld)", + delay); /* * Set other hw revision to disable workaround for b/171430855 (delay @@ -319,47 +323,51 @@ ZTEST(ps8815, test_set_vconn) /** Test PS8xxx transmitting message from TCPC */ static void test_ps8xxx_transmit(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); + struct tcpci_emul_msg *msg; uint64_t exp_cnt, cnt; uint16_t reg_val; - msg = tcpci_emul_get_tx_msg(tcpci_emul); + msg = tcpci_emul_get_tx_msg(ps8xxx_emul); /* Test fail on transmitting BIST MODE 2 message */ - i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_TRANSMIT); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_TRANSMIT); zassert_equal(EC_ERROR_INVAL, - ps8xxx_tcpm_drv.transmit(USBC_PORT_C1, - TCPCI_MSG_TX_BIST_MODE_2, 0, - NULL), NULL); - i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, + ps8xxx_tcpm_drv.transmit( + USBC_PORT_C1, TCPCI_MSG_TX_BIST_MODE_2, 0, NULL), + NULL); + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test sending BIST MODE 2 message */ exp_cnt = PS8751_BIST_COUNTER; zassert_equal(EC_SUCCESS, - ps8xxx_tcpm_drv.transmit(USBC_PORT_C1, - TCPCI_MSG_TX_BIST_MODE_2, 0, - NULL), NULL); - check_tcpci_reg(tcpci_emul, PS8XXX_REG_BIST_CONT_MODE_CTR, 0); - zassert_equal(TCPCI_MSG_TX_BIST_MODE_2, msg->type, NULL); + ps8xxx_tcpm_drv.transmit( + USBC_PORT_C1, TCPCI_MSG_TX_BIST_MODE_2, 0, NULL), + NULL); + check_tcpci_reg(ps8xxx_emul, PS8XXX_REG_BIST_CONT_MODE_CTR, 0); + zassert_equal(TCPCI_MSG_TX_BIST_MODE_2, msg->sop_type, NULL); /* Check BIST counter value */ - zassert_ok(tcpci_emul_get_reg(tcpci_emul, + zassert_ok(tcpci_emul_get_reg(ps8xxx_emul, PS8XXX_REG_BIST_CONT_MODE_BYTE2, - ®_val), NULL); + ®_val), + NULL); cnt = reg_val; cnt <<= 8; - zassert_ok(tcpci_emul_get_reg(tcpci_emul, + zassert_ok(tcpci_emul_get_reg(ps8xxx_emul, PS8XXX_REG_BIST_CONT_MODE_BYTE1, - ®_val), NULL); + ®_val), + NULL); cnt |= reg_val; cnt <<= 8; - zassert_ok(tcpci_emul_get_reg(tcpci_emul, + zassert_ok(tcpci_emul_get_reg(ps8xxx_emul, PS8XXX_REG_BIST_CONT_MODE_BYTE0, - ®_val), NULL); + ®_val), + NULL); cnt |= reg_val; zassert_equal(exp_cnt, cnt, "0x%llx != 0x%llx", exp_cnt, cnt); } @@ -377,34 +385,35 @@ ZTEST(ps8815, test_transmit) /** Test PS8805 and PS8815 drp toggle */ static void test_ps88x5_drp_toggle(bool delay_expected) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); + uint16_t exp_role_ctrl; int64_t start_time; int64_t delay; /* Test fail on command write */ - i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_COMMAND); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_COMMAND); zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), NULL); /* Test fail on role control write */ - i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_ROLE_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_ROLE_CTRL); zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), NULL); - i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on CC status read */ - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, TCPC_REG_CC_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_CC_STATUS); zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), NULL); - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set CC status as snk, CC lines set arbitrary */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_CC_STATUS, + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_CC_STATUS, TCPC_REG_CC_STATUS_SET(1, TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA)); @@ -424,12 +433,12 @@ static void test_ps88x5_drp_toggle(bool delay_expected) } else { zassert_true(delay == 0, "unexpected delay (%lld ms)", delay); } - check_tcpci_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); - check_tcpci_reg(tcpci_emul, TCPC_REG_COMMAND, + check_tcpci_reg(ps8xxx_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); + check_tcpci_reg(ps8xxx_emul, TCPC_REG_COMMAND, TCPC_REG_COMMAND_LOOK4CONNECTION); /* Set CC status as src, CC lines set arbitrary */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_CC_STATUS, + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_CC_STATUS, TCPC_REG_CC_STATUS_SET(0, TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA)); @@ -445,15 +454,15 @@ static void test_ps88x5_drp_toggle(bool delay_expected) } else { zassert_true(delay == 0, "unexpected delay (%lld ms)", delay); } - check_tcpci_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); - check_tcpci_reg(tcpci_emul, TCPC_REG_COMMAND, + check_tcpci_reg(ps8xxx_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); + check_tcpci_reg(ps8xxx_emul, TCPC_REG_COMMAND, TCPC_REG_COMMAND_LOOK4CONNECTION); } /** Test PS8815 drp toggle */ ZTEST(ps8815, test_ps8815_drp_toggle) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); /* * Set hw revision 0x0a00 to enable workaround for b/171430855 (delay @@ -481,9 +490,10 @@ ZTEST(ps8805, test_drp_toggle) /** Test PS8xxx get chip info code used by all PS8xxx devices */ static void test_ps8xxx_get_chip_info(uint16_t current_product_id) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); + struct ec_response_pd_chip_info_v1 info; uint16_t vendor, product, device_id, fw_rev; @@ -495,17 +505,17 @@ static void test_ps8xxx_get_chip_info(uint16_t current_product_id) device_id = 0x2; /* Arbitrary revision */ fw_rev = 0x32; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_BCD_DEV, device_id); - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_BCD_DEV, device_id); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, fw_rev); /* Test fail on reading FW revision */ - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, PS8XXX_REG_FW_REV); + i2c_common_emul_set_read_fail_reg(common_data, PS8XXX_REG_FW_REV); zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), NULL); - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test reading chip info */ @@ -519,18 +529,18 @@ static void test_ps8xxx_get_chip_info(uint16_t current_product_id) /* Test fail on wrong vendor id */ vendor = 0x0; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); zassert_equal(EC_ERROR_UNKNOWN, ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), NULL); /* Set correct vendor id */ vendor = PS8XXX_VENDOR_ID; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); /* Set firmware revision to 0 */ fw_rev = 0x0; - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, fw_rev); /* * Test fail on firmware revision equals to 0 when getting chip info @@ -554,7 +564,7 @@ static void test_ps8xxx_get_chip_info(uint16_t current_product_id) /* Set wrong vendor id */ vendor = 0; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); /* Test fail on vendor id mismatch on live device */ zassert_equal(EC_ERROR_UNKNOWN, @@ -572,11 +582,11 @@ static void test_ps8xxx_get_chip_info(uint16_t current_product_id) /* Set correct vendor id */ vendor = PS8XXX_VENDOR_ID; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); /* Set wrong product id */ product = 0; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_PRODUCT_ID, product); /* Test fail on product id mismatch on live device */ zassert_equal(EC_ERROR_UNKNOWN, @@ -609,10 +619,10 @@ ZTEST(ps8815, test_ps8815_get_chip_info) /** Test PS8805 get chip info and indirectly ps8805_make_device_id */ ZTEST(ps8805, test_ps8805_get_chip_info_fix_dev_id) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *p0_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_0); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *p0_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_0); struct ec_response_pd_chip_info_v1 info; uint16_t vendor, product, device_id, fw_rev; uint16_t chip_rev; @@ -638,26 +648,26 @@ ZTEST(ps8805, test_ps8805_get_chip_info_fix_dev_id) product = PS8805_PRODUCT_ID; /* Arbitrary revision */ fw_rev = 0x32; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, fw_rev); /* Set correct power status for this test */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, 0x0); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_POWER_STATUS, 0x0); /* Init to allow access to "hidden" I2C ports */ zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); /* Set device id which requires fixing */ device_id = 0x1; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_BCD_DEV, device_id); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_BCD_DEV, device_id); /* Test error on fixing device id because of fail chip revision read */ - i2c_common_emul_set_read_fail_reg(p0_i2c_emul, + i2c_common_emul_set_read_fail_reg(p0_i2c_common_data, PS8805_P0_REG_CHIP_REVISION); zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), NULL); - i2c_common_emul_set_read_fail_reg(p0_i2c_emul, + i2c_common_emul_set_read_fail_reg(p0_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set wrong chip revision */ @@ -674,37 +684,39 @@ ZTEST(ps8805, test_ps8805_get_chip_info_fix_dev_id) ps8xxx_emul_set_chip_rev(ps8xxx_emul, test_param[i].chip_rev); /* Test correct device id after fixing */ - zassert_equal(EC_SUCCESS, - ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, - &info), - "Failed to get chip info in test case %d (chip_rev 0x%x)", - i, test_param[i].chip_rev); - zassert_equal(vendor, info.vendor_id, - "0x%x != (vendor = 0x%x) in test case %d (chip_rev 0x%x)", - vendor, info.vendor_id, - i, test_param[i].chip_rev); - zassert_equal(product, info.product_id, - "0x%x != (product = 0x%x) in test case %d (chip_rev 0x%x)", - product, info.product_id, - i, test_param[i].chip_rev); - zassert_equal(test_param[i].exp_dev_id, info.device_id, - "0x%x != (device = 0x%x) in test case %d (chip_rev 0x%x)", - test_param[i].exp_dev_id, info.device_id, - i, test_param[i].chip_rev); - zassert_equal(fw_rev, info.fw_version_number, - "0x%x != (FW rev = 0x%x) in test case %d (chip_rev 0x%x)", - fw_rev, info.fw_version_number, - i, test_param[i].chip_rev); + zassert_equal( + EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + "Failed to get chip info in test case %d (chip_rev 0x%x)", + i, test_param[i].chip_rev); + zassert_equal( + vendor, info.vendor_id, + "0x%x != (vendor = 0x%x) in test case %d (chip_rev 0x%x)", + vendor, info.vendor_id, i, test_param[i].chip_rev); + zassert_equal( + product, info.product_id, + "0x%x != (product = 0x%x) in test case %d (chip_rev 0x%x)", + product, info.product_id, i, test_param[i].chip_rev); + zassert_equal( + test_param[i].exp_dev_id, info.device_id, + "0x%x != (device = 0x%x) in test case %d (chip_rev 0x%x)", + test_param[i].exp_dev_id, info.device_id, i, + test_param[i].chip_rev); + zassert_equal( + fw_rev, info.fw_version_number, + "0x%x != (FW rev = 0x%x) in test case %d (chip_rev 0x%x)", + fw_rev, info.fw_version_number, i, + test_param[i].chip_rev); } } /** Test PS8815 get chip info and indirectly ps8815_make_device_id */ ZTEST(ps8815, test_ps8815_get_chip_info_fix_dev_id) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *p1_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *p1_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_1); struct ec_response_pd_chip_info_v1 info; uint16_t vendor, product, device_id, fw_rev; uint16_t hw_rev; @@ -735,21 +747,21 @@ ZTEST(ps8815, test_ps8815_get_chip_info_fix_dev_id) product = PS8815_PRODUCT_ID; /* Arbitrary revision */ fw_rev = 0x32; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, fw_rev); /* Set device id which requires fixing */ device_id = 0x1; - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_BCD_DEV, device_id); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_BCD_DEV, device_id); /* Test error on fixing device id because of fail hw revision read */ - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, PS8815_P1_REG_HW_REVISION); zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), NULL); - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set wrong hw revision */ @@ -766,36 +778,39 @@ ZTEST(ps8815, test_ps8815_get_chip_info_fix_dev_id) ps8xxx_emul_set_hw_rev(ps8xxx_emul, test_param[i].hw_rev); /* Test correct device id after fixing */ - zassert_equal(EC_SUCCESS, - ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, - &info), - "Failed to get chip info in test case %d (hw_rev 0x%x)", - i, test_param[i].hw_rev); - zassert_equal(vendor, info.vendor_id, - "0x%x != (vendor = 0x%x) in test case %d (hw_rev 0x%x)", - vendor, info.vendor_id, i, test_param[i].hw_rev); - zassert_equal(product, info.product_id, - "0x%x != (product = 0x%x) in test case %d (hw_rev 0x%x)", - product, info.product_id, - i, test_param[i].hw_rev); - zassert_equal(test_param[i].exp_dev_id, info.device_id, - "0x%x != (device = 0x%x) in test case %d (hw_rev 0x%x)", - test_param[i].exp_dev_id, info.device_id, - i, test_param[i].hw_rev); - zassert_equal(fw_rev, info.fw_version_number, - "0x%x != (FW rev = 0x%x) in test case %d (hw_rev 0x%x)", - fw_rev, info.fw_version_number, - i, test_param[i].hw_rev); + zassert_equal( + EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + "Failed to get chip info in test case %d (hw_rev 0x%x)", + i, test_param[i].hw_rev); + zassert_equal( + vendor, info.vendor_id, + "0x%x != (vendor = 0x%x) in test case %d (hw_rev 0x%x)", + vendor, info.vendor_id, i, test_param[i].hw_rev); + zassert_equal( + product, info.product_id, + "0x%x != (product = 0x%x) in test case %d (hw_rev 0x%x)", + product, info.product_id, i, test_param[i].hw_rev); + zassert_equal( + test_param[i].exp_dev_id, info.device_id, + "0x%x != (device = 0x%x) in test case %d (hw_rev 0x%x)", + test_param[i].exp_dev_id, info.device_id, i, + test_param[i].hw_rev); + zassert_equal( + fw_rev, info.fw_version_number, + "0x%x != (FW rev = 0x%x) in test case %d (hw_rev 0x%x)", + fw_rev, info.fw_version_number, i, + test_param[i].hw_rev); } } /** Test PS8805 get/set gpio */ ZTEST(ps8805, test_ps8805_gpio) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *gpio_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_GPIO); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *gpio_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_GPIO); uint8_t exp_ctrl, gpio_ctrl; int level; @@ -851,9 +866,9 @@ ZTEST(ps8805, test_ps8805_gpio) }; /* Set arbitrary FW reg value != 0 for this test */ - tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x31); /* Set correct power status for this test */ - tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, 0x0); + tcpci_emul_set_reg(ps8xxx_emul, TCPC_REG_POWER_STATUS, 0x0); /* Init to allow access to "hidden" I2C ports */ zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); @@ -863,10 +878,11 @@ ZTEST(ps8805, test_ps8805_gpio) NULL); zassert_equal(EC_ERROR_INVAL, ps8805_gpio_get_level(USBC_PORT_C1, PS8805_GPIO_NUM, - &level), NULL); + &level), + NULL); /* Setup fail on gpio control reg read */ - i2c_common_emul_set_read_fail_reg(gpio_i2c_emul, + i2c_common_emul_set_read_fail_reg(gpio_i2c_common_data, PS8805_REG_GPIO_CONTROL); /* Test fail on reading gpio control reg */ @@ -875,19 +891,20 @@ ZTEST(ps8805, test_ps8805_gpio) NULL); zassert_equal(EC_ERROR_INVAL, ps8805_gpio_get_level(USBC_PORT_C1, PS8805_GPIO_0, - &level), NULL); + &level), + NULL); /* Do not fail on gpio control reg read */ - i2c_common_emul_set_read_fail_reg(gpio_i2c_emul, + i2c_common_emul_set_read_fail_reg(gpio_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on writing gpio control reg */ - i2c_common_emul_set_write_fail_reg(gpio_i2c_emul, + i2c_common_emul_set_write_fail_reg(gpio_i2c_common_data, PS8805_REG_GPIO_CONTROL); zassert_equal(EC_ERROR_INVAL, ps8805_gpio_set_level(USBC_PORT_C1, PS8805_GPIO_0, 1), NULL); - i2c_common_emul_set_write_fail_reg(gpio_i2c_emul, + i2c_common_emul_set_write_fail_reg(gpio_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Clear gpio control reg */ @@ -901,37 +918,41 @@ ZTEST(ps8805, test_ps8805_gpio) } else { exp_ctrl &= ~test_param[i].gpio_reg; } - zassert_equal(EC_SUCCESS, - ps8805_gpio_set_level(USBC_PORT_C1, - test_param[i].signal, - test_param[i].level), - "Failed gpio_set in test case %d (gpio %d, level %d)", - i, test_param[i].signal, test_param[i].level); - zassert_equal(EC_SUCCESS, - ps8805_gpio_get_level(USBC_PORT_C1, - test_param[i].signal, - &level), - "Failed gpio_get in test case %d (gpio %d, level %d)", - i, test_param[i].signal, test_param[i].level); - zassert_equal(test_param[i].level, level, - "%d != (gpio_get_level = %d) in test case %d (gpio %d, level %d)", - test_param[i].level, level, i, - test_param[i].signal, test_param[i].level); + zassert_equal( + EC_SUCCESS, + ps8805_gpio_set_level(USBC_PORT_C1, + test_param[i].signal, + test_param[i].level), + "Failed gpio_set in test case %d (gpio %d, level %d)", + i, test_param[i].signal, test_param[i].level); + zassert_equal( + EC_SUCCESS, + ps8805_gpio_get_level(USBC_PORT_C1, + test_param[i].signal, &level), + "Failed gpio_get in test case %d (gpio %d, level %d)", + i, test_param[i].signal, test_param[i].level); + zassert_equal( + test_param[i].level, level, + "%d != (gpio_get_level = %d) in test case %d (gpio %d, level %d)", + test_param[i].level, level, i, test_param[i].signal, + test_param[i].level); gpio_ctrl = ps8xxx_emul_get_gpio_ctrl(ps8xxx_emul); - zassert_equal(exp_ctrl, gpio_ctrl, - "0x%x != (gpio_ctrl = 0x%x) in test case %d (gpio %d, level %d)", - exp_ctrl, gpio_ctrl, i, test_param[i].signal, - test_param[i].level); + zassert_equal( + exp_ctrl, gpio_ctrl, + "0x%x != (gpio_ctrl = 0x%x) in test case %d (gpio %d, level %d)", + exp_ctrl, gpio_ctrl, i, test_param[i].signal, + test_param[i].level); } } /** Test TCPCI init and vbus level */ static void test_ps8xxx_tcpci_init(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_init(tcpci_emul, USBC_PORT_C1); + test_tcpci_init(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_init) @@ -947,10 +968,11 @@ ZTEST(ps8815, test_tcpci_init) /** Test TCPCI release */ static void test_ps8xxx_tcpci_release(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_release(tcpci_emul, USBC_PORT_C1); + test_tcpci_release(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_release) @@ -966,10 +988,11 @@ ZTEST(ps8815, test_tcpci_release) /** Test TCPCI get cc */ static void test_ps8xxx_tcpci_get_cc(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_get_cc(tcpci_emul, USBC_PORT_C1); + test_tcpci_get_cc(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_get_cc) @@ -985,10 +1008,11 @@ ZTEST(ps8815, test_tcpci_get_cc) /** Test TCPCI set cc */ static void test_ps8xxx_tcpci_set_cc(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_set_cc(tcpci_emul, USBC_PORT_C1); + test_tcpci_set_cc(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_set_cc) @@ -1004,10 +1028,11 @@ ZTEST(ps8815, test_tcpci_set_cc) /** Test TCPCI set polarity */ static void test_ps8xxx_tcpci_set_polarity(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_set_polarity(tcpci_emul, USBC_PORT_C1); + test_tcpci_set_polarity(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_set_polarity) @@ -1023,10 +1048,11 @@ ZTEST(ps8815, test_tcpci_set_polarity) /** Test TCPCI set vconn */ static void test_ps8xxx_tcpci_set_vconn(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_set_vconn(tcpci_emul, USBC_PORT_C1); + test_tcpci_set_vconn(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_set_vconn) @@ -1042,10 +1068,11 @@ ZTEST(ps8815, test_tcpci_set_vconn) /** Test TCPCI set msg header */ static void test_ps8xxx_tcpci_set_msg_header(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_set_msg_header(tcpci_emul, USBC_PORT_C1); + test_tcpci_set_msg_header(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_set_msg_header) @@ -1061,10 +1088,11 @@ ZTEST(ps8815, test_tcpci_set_msg_header) /** Test TCPCI get raw message */ static void test_ps8xxx_tcpci_get_rx_message_raw(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_get_rx_message_raw(tcpci_emul, USBC_PORT_C1); + test_tcpci_get_rx_message_raw(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_get_rx_message_raw) @@ -1080,10 +1108,11 @@ ZTEST(ps8815, test_tcpci_get_rx_message_raw) /** Test TCPCI transmitting message */ static void test_ps8xxx_tcpci_transmit(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_transmit(tcpci_emul, USBC_PORT_C1); + test_tcpci_transmit(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_transmit) @@ -1099,10 +1128,11 @@ ZTEST(ps8815, test_tcpci_transmit) /** Test TCPCI alert */ static void test_ps8xxx_tcpci_alert(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_alert(tcpci_emul, USBC_PORT_C1); + test_tcpci_alert(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_alert) @@ -1118,10 +1148,11 @@ ZTEST(ps8815, test_tcpci_alert) /** Test TCPCI alert RX message */ static void test_ps8xxx_tcpci_alert_rx_message(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_alert_rx_message(tcpci_emul, USBC_PORT_C1); + test_tcpci_alert_rx_message(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_alert_rx_message) @@ -1137,17 +1168,18 @@ ZTEST(ps8815, test_tcpci_alert_rx_message) /** Test TCPCI enter low power mode */ static void test_ps8xxx_tcpci_low_power_mode(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); /* * PS8751/PS8815 has the auto sleep function that enters * low power mode on its own in ~2 seconds. Other chips * don't have it. Stub it out for PS8751/PS8815. */ if (board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8751_PRODUCT_ID || - board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8815_PRODUCT_ID) + board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8815_PRODUCT_ID) return; - test_tcpci_low_power_mode(tcpci_emul, USBC_PORT_C1); + test_tcpci_low_power_mode(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_low_power_mode) @@ -1163,10 +1195,11 @@ ZTEST(ps8815, test_tcpci_low_power_mode) /** Test TCPCI set bist test mode */ static void test_ps8xxx_tcpci_set_bist_mode(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); - test_tcpci_set_bist_mode(tcpci_emul, USBC_PORT_C1); + test_tcpci_set_bist_mode(ps8xxx_emul, common_data, USBC_PORT_C1); } ZTEST(ps8805, test_tcpci_set_bist_mode) @@ -1182,39 +1215,43 @@ ZTEST(ps8815, test_tcpci_set_bist_mode) /* Setup no fail for all I2C devices associated with PS8xxx emulator */ static void setup_no_fail_all(void) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); - const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); - struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); - struct i2c_emul *p0_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_0); - struct i2c_emul *p1_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); - struct i2c_emul *gpio_i2c_emul = - ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_GPIO); - - i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(ps8xxx_emul); + + struct i2c_common_emul_data *p0_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_0); + struct i2c_common_emul_data *p1_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_1); + struct i2c_common_emul_data *gpio_i2c_common_data = + ps8xxx_emul_get_i2c_common_data(ps8xxx_emul, + PS8XXX_EMUL_PORT_GPIO); + + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); - if (p0_i2c_emul != NULL) { - i2c_common_emul_set_read_fail_reg(p0_i2c_emul, + if (p0_i2c_common_data != NULL) { + i2c_common_emul_set_read_fail_reg(p0_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(p0_i2c_emul, + i2c_common_emul_set_write_fail_reg(p0_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } - if (p1_i2c_emul != NULL) { - i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + if (p1_i2c_common_data != NULL) { + i2c_common_emul_set_read_fail_reg(p1_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(p1_i2c_emul, + i2c_common_emul_set_write_fail_reg(p1_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } - if (gpio_i2c_emul != NULL) { - i2c_common_emul_set_read_fail_reg(gpio_i2c_emul, + if (gpio_i2c_common_data != NULL) { + i2c_common_emul_set_read_fail_reg(gpio_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); - i2c_common_emul_set_write_fail_reg(gpio_i2c_emul, + i2c_common_emul_set_write_fail_reg(gpio_i2c_common_data, I2C_COMMON_EMUL_NO_FAIL_REG); } } @@ -1225,12 +1262,22 @@ static void setup_no_fail_all(void) */ static void ps8805_before(void *state) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); ARG_UNUSED(state); board_set_ps8xxx_product_id(PS8805_PRODUCT_ID); ps8xxx_emul_set_product_id(ps8xxx_emul, PS8805_PRODUCT_ID); setup_no_fail_all(); + zassume_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); +} + +static void ps8805_after(void *state) +{ + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + ARG_UNUSED(state); + + /* Set correct firmware revision */ + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x31); } /** @@ -1239,17 +1286,26 @@ static void ps8805_before(void *state) */ static void ps8815_before(void *state) { - const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); ARG_UNUSED(state); board_set_ps8xxx_product_id(PS8815_PRODUCT_ID); ps8xxx_emul_set_product_id(ps8xxx_emul, PS8815_PRODUCT_ID); setup_no_fail_all(); + zassume_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); } +static void ps8815_after(void *state) +{ + const struct emul *ps8xxx_emul = EMUL_DT_GET(PS8XXX_EMUL_NODE); + ARG_UNUSED(state); + + /* Set correct firmware revision */ + tcpci_emul_set_reg(ps8xxx_emul, PS8XXX_REG_FW_REV, 0x31); +} -ZTEST_SUITE(ps8805, drivers_predicate_post_main, NULL, ps8805_before, NULL, - NULL); +ZTEST_SUITE(ps8805, drivers_predicate_pre_main, NULL, ps8805_before, + ps8805_after, NULL); -ZTEST_SUITE(ps8815, drivers_predicate_post_main, NULL, ps8815_before, NULL, - NULL); +ZTEST_SUITE(ps8815, drivers_predicate_pre_main, NULL, ps8815_before, + ps8815_after, NULL); diff --git a/zephyr/test/drivers/src/smart.c b/zephyr/test/drivers/default/src/smart.c index 3628a68d3e..96200f1b91 100644 --- a/zephyr/test/drivers/src/smart.c +++ b/zephyr/test/drivers/default/src/smart.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/shell/shell.h> #include <zephyr/shell/shell_uart.h> @@ -18,18 +18,17 @@ #include "battery_smart.h" #include "test/drivers/test_state.h" -#define BATTERY_ORD DT_DEP_ORD(DT_NODELABEL(battery)) +#define BATTERY_NODE DT_NODELABEL(battery) /** Test all simple getters */ ZTEST_USER(smart_battery, test_battery_getters) { struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); char block[32]; int expected; int word; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); zassert_equal(EC_SUCCESS, battery_get_mode(&word), NULL); @@ -40,22 +39,22 @@ ZTEST_USER(smart_battery, test_battery_getters) zassert_equal(expected, word, "%d != %d", expected, word); zassert_equal(EC_SUCCESS, battery_cycle_count(&word), NULL); - zassert_equal(bat->cycle_count, word, "%d != %d", - bat->cycle_count, word); + zassert_equal(bat->cycle_count, word, "%d != %d", bat->cycle_count, + word); zassert_equal(EC_SUCCESS, battery_design_voltage(&word), NULL); zassert_equal(bat->design_mv, word, "%d != %d", bat->design_mv, word); zassert_equal(EC_SUCCESS, battery_serial_number(&word), NULL); zassert_equal(bat->sn, word, "%d != %d", bat->sn, word); zassert_equal(EC_SUCCESS, get_battery_manufacturer_name(block, 32), NULL); - zassert_mem_equal(block, bat->mf_name, bat->mf_name_len, - "%s != %s", block, bat->mf_name); + zassert_mem_equal(block, bat->mf_name, bat->mf_name_len, "%s != %s", + block, bat->mf_name); zassert_equal(EC_SUCCESS, battery_device_name(block, 32), NULL); - zassert_mem_equal(block, bat->dev_name, bat->dev_name_len, - "%s != %s", block, bat->dev_name); + zassert_mem_equal(block, bat->dev_name, bat->dev_name_len, "%s != %s", + block, bat->dev_name); zassert_equal(EC_SUCCESS, battery_device_chemistry(block, 32), NULL); - zassert_mem_equal(block, bat->dev_chem, bat->dev_chem_len, - "%s != %s", block, bat->dev_chem); + zassert_mem_equal(block, bat->dev_chem, bat->dev_chem_len, "%s != %s", + block, bat->dev_chem); word = battery_get_avg_current(); zassert_equal(bat->avg_cur, word, "%d != %d", bat->avg_cur, word); word = battery_get_avg_voltage(); @@ -81,19 +80,21 @@ ZTEST_USER(smart_battery, test_battery_getters) ZTEST_USER(smart_battery, test_battery_get_capacity) { struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); int word; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Test fail when checking battery mode */ - i2c_common_emul_set_read_fail_reg(emul, SB_BATTERY_MODE); + i2c_common_emul_set_read_fail_reg(common_data, SB_BATTERY_MODE); zassert_equal(EC_ERROR_INVAL, battery_remaining_capacity(&word), NULL); zassert_equal(EC_ERROR_INVAL, battery_full_charge_capacity(&word), NULL); zassert_equal(EC_ERROR_INVAL, battery_design_capacity(&word), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test getting remaining capacity and if mAh mode is forced */ bat->mode |= MODE_CAPACITY; @@ -114,16 +115,14 @@ ZTEST_USER(smart_battery, test_battery_get_capacity) zassert_false(bat->mode & MODE_CAPACITY, "mAh mode not forced"); } - /** Test battery status */ ZTEST_USER(smart_battery, test_battery_status) { struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); int expected; int status; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); bat->status = 0; @@ -144,16 +143,18 @@ ZTEST_USER(smart_battery, test_battery_status) /** Test wait for stable function */ ZTEST_USER(smart_battery, test_battery_wait_for_stable) { - struct i2c_emul *emul; - - emul = sbat_emul_get_ptr(BATTERY_ORD); + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); /* Should fail when read function always fail */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_FAIL_ALL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_FAIL_ALL_REG); zassert_equal(EC_ERROR_NOT_POWERED, battery_wait_for_stable(), NULL); /* Should be ok with default handler */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); zassert_equal(EC_SUCCESS, battery_wait_for_stable(), NULL); } @@ -161,14 +162,13 @@ ZTEST_USER(smart_battery, test_battery_wait_for_stable) ZTEST_USER(smart_battery, test_battery_manufacture_date) { struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); int day, month, year; int exp_month = 5; int exp_year = 2018; int exp_day = 19; uint16_t date; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); date = sbat_emul_date_to_word(exp_day, exp_month, exp_year); @@ -185,12 +185,13 @@ ZTEST_USER(smart_battery, test_battery_manufacture_date) ZTEST_USER(smart_battery, test_battery_time_at_rate) { struct sbat_emul_bat_data *bat; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); int expect_time; int minutes; int rate; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Test fail on rate 0 */ @@ -203,16 +204,18 @@ ZTEST_USER(smart_battery, test_battery_time_at_rate) rate = -6000; /* Test fail on writing at rate register */ - i2c_common_emul_set_write_fail_reg(emul, SB_AT_RATE); + i2c_common_emul_set_write_fail_reg(common_data, SB_AT_RATE); zassert_equal(EC_ERROR_INVAL, battery_time_at_rate(rate, &minutes), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on reading at rate ok register */ - i2c_common_emul_set_read_fail_reg(emul, SB_AT_RATE_OK); + i2c_common_emul_set_read_fail_reg(common_data, SB_AT_RATE_OK); zassert_equal(EC_ERROR_INVAL, battery_time_at_rate(rate, &minutes), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* * Expected discharging rate is less then 10s, @@ -244,87 +247,91 @@ ZTEST_USER(smart_battery, test_battery_get_params) { struct sbat_emul_bat_data *bat; struct batt_params batt; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); int flags; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Fail temperature read */ - i2c_common_emul_set_read_fail_reg(emul, SB_TEMPERATURE); + i2c_common_emul_set_read_fail_reg(common_data, SB_TEMPERATURE); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_TEMPERATURE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail state of charge read; want charge cannot be set */ - i2c_common_emul_set_read_fail_reg(emul, SB_RELATIVE_STATE_OF_CHARGE); + i2c_common_emul_set_read_fail_reg(common_data, + SB_RELATIVE_STATE_OF_CHARGE); flags = BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_STATE_OF_CHARGE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail voltage read */ - i2c_common_emul_set_read_fail_reg(emul, SB_VOLTAGE); + i2c_common_emul_set_read_fail_reg(common_data, SB_VOLTAGE); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_VOLTAGE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail current read */ - i2c_common_emul_set_read_fail_reg(emul, SB_CURRENT); + i2c_common_emul_set_read_fail_reg(common_data, SB_CURRENT); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_CURRENT; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail average current read */ - i2c_common_emul_set_read_fail_reg(emul, SB_AVERAGE_CURRENT); + i2c_common_emul_set_read_fail_reg(common_data, SB_AVERAGE_CURRENT); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_AVERAGE_CURRENT; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail charging voltage read; want charge cannot be set */ - i2c_common_emul_set_read_fail_reg(emul, SB_CHARGING_VOLTAGE); + i2c_common_emul_set_read_fail_reg(common_data, SB_CHARGING_VOLTAGE); flags = BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_DESIRED_VOLTAGE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail charging voltage read; want charge cannot be set */ - i2c_common_emul_set_read_fail_reg(emul, SB_CHARGING_CURRENT); + i2c_common_emul_set_read_fail_reg(common_data, SB_CHARGING_CURRENT); flags = BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_DESIRED_CURRENT; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail remaining capacity read */ - i2c_common_emul_set_read_fail_reg(emul, SB_REMAINING_CAPACITY); + i2c_common_emul_set_read_fail_reg(common_data, SB_REMAINING_CAPACITY); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_REMAINING_CAPACITY; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail full capacity read */ - i2c_common_emul_set_read_fail_reg(emul, SB_FULL_CHARGE_CAPACITY); + i2c_common_emul_set_read_fail_reg(common_data, SB_FULL_CHARGE_CAPACITY); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_FULL_CAPACITY; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail status read */ - i2c_common_emul_set_read_fail_reg(emul, SB_BATTERY_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, SB_BATTERY_STATUS); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_STATUS; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Fail all */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_FAIL_ALL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_FAIL_ALL_REG); flags = BATT_FLAG_BAD_ANY; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); /* Use default handler, everything should be ok */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); @@ -336,7 +343,7 @@ struct mfgacc_data { int len; }; -static int mfgacc_read_func(struct i2c_emul *emul, int reg, uint8_t *val, +static int mfgacc_read_func(const struct emul *emul, int reg, uint8_t *val, int bytes, void *data) { struct mfgacc_data *conf = data; @@ -353,13 +360,14 @@ ZTEST_USER(smart_battery, test_battery_mfacc) { struct sbat_emul_bat_data *bat; struct mfgacc_data mfacc_conf; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); uint8_t recv_buf[10]; uint8_t mf_data[10]; uint16_t cmd; int len; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Select arbitrary command number for the test */ @@ -369,22 +377,26 @@ ZTEST_USER(smart_battery, test_battery_mfacc) len = 2; zassert_equal(EC_ERROR_INVAL, sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, - len), NULL); + len), + NULL); /* Set correct length for rest of the test */ len = 10; /* Test fail on writing SB_MANUFACTURER_ACCESS register */ - i2c_common_emul_set_write_fail_reg(emul, SB_MANUFACTURER_ACCESS); + i2c_common_emul_set_write_fail_reg(common_data, SB_MANUFACTURER_ACCESS); zassert_equal(EC_ERROR_INVAL, sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, - len), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + len), + NULL); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on reading manufacturer data (custom handler is not set) */ zassert_equal(EC_ERROR_INVAL, sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, - len), NULL); + len), + NULL); /* Set arbitrary manufacturer data */ for (int i = 1; i < len; i++) { @@ -397,12 +409,14 @@ ZTEST_USER(smart_battery, test_battery_mfacc) mfacc_conf.reg = SB_ALT_MANUFACTURER_ACCESS; mfacc_conf.len = len; mfacc_conf.buf = mf_data; - i2c_common_emul_set_read_func(emul, mfgacc_read_func, &mfacc_conf); + i2c_common_emul_set_read_func(common_data, mfgacc_read_func, + &mfacc_conf); /* Test error when mf_data doesn't start with command */ zassert_equal(EC_ERROR_UNKNOWN, sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, - len), NULL); + len), + NULL); /* Set beginning of the manufacturer data */ mf_data[1] = cmd & 0xff; @@ -411,12 +425,13 @@ ZTEST_USER(smart_battery, test_battery_mfacc) /* Test successful manufacturer data read */ zassert_equal(EC_SUCCESS, sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, - len), NULL); + len), + NULL); /* Compare received data ignoring length byte */ zassert_mem_equal(mf_data + 1, recv_buf, len - 1, NULL); /* Disable custom read function */ - i2c_common_emul_set_read_func(emul, NULL, NULL); + i2c_common_emul_set_read_func(common_data, NULL, NULL); } /** Test battery fake charge level set and read */ @@ -424,40 +439,36 @@ ZTEST_USER(smart_battery, test_battery_fake_charge) { struct sbat_emul_bat_data *bat; struct batt_params batt; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct i2c_common_emul_data *common_data = + emul_smart_battery_get_i2c_common_data(emul); int remaining_cap; int fake_charge; int charge; int flags; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Success on command with no argument */ - zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "battfake"), NULL); + zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "battfake"), + NULL); /* Fail on command with argument which is not a number */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "battfake test"), NULL); + shell_execute_cmd(get_ec_shell(), "battfake test"), NULL); /* Fail on command with charge level above 100% */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "battfake 123"), NULL); + shell_execute_cmd(get_ec_shell(), "battfake 123"), NULL); /* Fail on command with charge level below 0% */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "battfake -23"), NULL); + shell_execute_cmd(get_ec_shell(), "battfake -23"), NULL); /* Set fake charge level */ fake_charge = 65; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "battfake 65"), NULL); + shell_execute_cmd(get_ec_shell(), "battfake 65"), NULL); /* Test that fake charge level is applied */ flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; @@ -470,7 +481,7 @@ ZTEST_USER(smart_battery, test_battery_fake_charge) remaining_cap, batt.remaining_capacity); /* Test fake remaining capacity when full capacity is not available */ - i2c_common_emul_set_read_fail_reg(emul, SB_FULL_CHARGE_CAPACITY); + i2c_common_emul_set_read_fail_reg(common_data, SB_FULL_CHARGE_CAPACITY); flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | BATT_FLAG_BAD_FULL_CAPACITY; battery_get_params(&batt); @@ -480,22 +491,22 @@ ZTEST_USER(smart_battery, test_battery_fake_charge) remaining_cap = bat->design_cap * fake_charge / 100; zassert_equal(remaining_cap, batt.remaining_capacity, "%d != %d", remaining_cap, batt.remaining_capacity); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Disable fake charge level */ zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "battfake -1"), NULL); + shell_execute_cmd(get_ec_shell(), "battfake -1"), NULL); /* Test that fake charge level is not applied */ flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); charge = 100 * bat->cap / bat->full_cap; - zassert_equal(charge, batt.state_of_charge, "%d%% != %d%%", - charge, batt.state_of_charge); - zassert_equal(bat->cap, batt.remaining_capacity, "%d != %d", - bat->cap, batt.remaining_capacity); + zassert_equal(charge, batt.state_of_charge, "%d%% != %d%%", charge, + batt.state_of_charge); + zassert_equal(bat->cap, batt.remaining_capacity, "%d != %d", bat->cap, + batt.remaining_capacity); } /** Test battery fake temperature set and read */ @@ -503,57 +514,55 @@ ZTEST_USER(smart_battery, test_battery_fake_temperature) { struct sbat_emul_bat_data *bat; struct batt_params batt; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); int fake_temp; int flags; - emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); /* Success on command with no argument */ zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "batttempfake"), NULL); + shell_execute_cmd(get_ec_shell(), "batttempfake"), NULL); /* Fail on command with argument which is not a number */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "batttempfake test"), NULL); + shell_execute_cmd(get_ec_shell(), "batttempfake test"), + NULL); /* Fail on command with too high temperature (above 500.0 K) */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "batttempfake 5001"), NULL); + shell_execute_cmd(get_ec_shell(), "batttempfake 5001"), + NULL); /* Fail on command with too low temperature (below 0 K) */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "batttempfake -23"), NULL); + shell_execute_cmd(get_ec_shell(), "batttempfake -23"), + NULL); /* Set fake temperature */ fake_temp = 2840; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "batttempfake 2840"), NULL); + shell_execute_cmd(get_ec_shell(), "batttempfake 2840"), + NULL); /* Test that fake temperature is applied */ flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); - zassert_equal(fake_temp, batt.temperature, "%d != %d", - fake_temp, batt.temperature); + zassert_equal(fake_temp, batt.temperature, "%d != %d", fake_temp, + batt.temperature); /* Disable fake temperature */ zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "batttempfake -1"), NULL); + shell_execute_cmd(get_ec_shell(), "batttempfake -1"), + NULL); /* Test that fake temperature is not applied */ flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; battery_get_params(&batt); zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); - zassert_equal(bat->temp, batt.temperature, "%d != %d", - bat->temp, batt.temperature); + zassert_equal(bat->temp, batt.temperature, "%d != %d", bat->temp, + batt.temperature); } ZTEST_SUITE(smart_battery, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/stm_mems_common.c b/zephyr/test/drivers/default/src/stm_mems_common.c index fef0766c7d..f7c59105b0 100644 --- a/zephyr/test/drivers/src/stm_mems_common.c +++ b/zephyr/test/drivers/default/src/stm_mems_common.c @@ -1,9 +1,9 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include <zephyr/device.h> #include <zephyr/devicetree.h> #include <errno.h> @@ -15,15 +15,16 @@ #include "i2c/i2c.h" #include "test/drivers/test_state.h" -#define MOCK_EMUL emul_get_binding(DT_LABEL(DT_NODELABEL(i2c_mock))) +#define MOCK_EMUL EMUL_DT_GET(DT_NODELABEL(i2c_mock)) +#define COMMON_DATA emul_i2c_mock_get_i2c_common_data(MOCK_EMUL) struct mock_properties { /* Incremented by the mock function every time it is called */ int call_count; }; -static int mock_read_fn(struct i2c_emul *emul, int reg, uint8_t *val, int bytes, - void *data) +static int mock_read_fn(const struct emul *emul, int reg, uint8_t *val, + int bytes, void *data) { ztest_check_expected_value(reg); ztest_check_expected_value(bytes); @@ -34,8 +35,8 @@ static int mock_read_fn(struct i2c_emul *emul, int reg, uint8_t *val, int bytes, return ztest_get_return_value(); } -static int mock_write_fn(struct i2c_emul *emul, int reg, uint8_t val, int bytes, - void *data) +static int mock_write_fn(const struct emul *emul, int reg, uint8_t val, + int bytes, void *data) { struct mock_properties *props = (struct mock_properties *)data; @@ -51,10 +52,10 @@ static int mock_write_fn(struct i2c_emul *emul, int reg, uint8_t val, int bytes, ZTEST(stm_mems_common, test_st_raw_read_n) { const struct emul *emul = MOCK_EMUL; - struct i2c_emul *i2c_emul = i2c_mock_to_i2c_emul(emul); + int rv; - i2c_common_emul_set_read_func(i2c_emul, mock_read_fn, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, mock_read_fn, NULL); /* * Ensure the MSb (auto-increment bit) in the register address gets * set, but also return an error condition @@ -72,10 +73,10 @@ ZTEST(stm_mems_common, test_st_raw_read_n) ZTEST(stm_mems_common, test_st_raw_read_n_noinc) { const struct emul *emul = MOCK_EMUL; - struct i2c_emul *i2c_emul = i2c_mock_to_i2c_emul(emul); + int rv; - i2c_common_emul_set_read_func(i2c_emul, mock_read_fn, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, mock_read_fn, NULL); /* * Unlike `st_raw_read_n`, the MSb (auto-increment bit) in the register * address should NOT be automatically set. Also return an error. @@ -94,7 +95,7 @@ ZTEST(stm_mems_common, test_st_raw_read_n_noinc) ZTEST(stm_mems_common, test_st_write_data_with_mask) { const struct emul *emul = MOCK_EMUL; - struct i2c_emul *i2c_emul = i2c_mock_to_i2c_emul(emul); + int rv; const struct motion_sensor_t sensor = { @@ -111,7 +112,7 @@ ZTEST(stm_mems_common, test_st_write_data_with_mask) (test_data & test_mask); /* Part 1: error occurs when reading initial value from sensor */ - i2c_common_emul_set_read_func(i2c_emul, mock_read_fn, NULL); + i2c_common_emul_set_read_func(COMMON_DATA, mock_read_fn, NULL); ztest_expect_value(mock_read_fn, reg, test_addr); ztest_expect_value(mock_read_fn, bytes, 0); /* Value is immaterial but ztest has no way to explicitly ignore it */ @@ -136,7 +137,7 @@ ZTEST(stm_mems_common, test_st_write_data_with_mask) .call_count = 0, }; - i2c_common_emul_set_write_func(i2c_emul, mock_write_fn, + i2c_common_emul_set_write_func(COMMON_DATA, mock_write_fn, &write_fn_props); rv = st_write_data_with_mask(&sensor, test_addr, test_mask, test_data); @@ -317,14 +318,14 @@ ZTEST(stm_mems_common, test_st_normalize) st_normalize(&sensor, (int *)&actual_output, (uint8_t *)input_reading); zassert_within(actual_output[X], expected_output[X], 0.5f, - "X output is %d but expected %d", actual_output[X], - expected_output[X]); + "X output is %d but expected %d", actual_output[X], + expected_output[X]); zassert_within(actual_output[Y], expected_output[Y], 0.5f, - "Y output is %d but expected %d", actual_output[Y], - expected_output[Y]); + "Y output is %d but expected %d", actual_output[Y], + expected_output[Y]); zassert_within(actual_output[Z], expected_output[Z], 0.5f, - "Z output is %d but expected %d", actual_output[Z], - expected_output[Z]); + "Z output is %d but expected %d", actual_output[Z], + expected_output[Z]); } static void stm_mems_common_before(void *state) diff --git a/zephyr/test/drivers/default/src/system.c b/zephyr/test/drivers/default/src/system.c new file mode 100644 index 0000000000..01956d8721 --- /dev/null +++ b/zephyr/test/drivers/default/src/system.c @@ -0,0 +1,113 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "host_command.h" +#include "system.h" +#include "test/drivers/test_state.h" + +/* System Host Commands */ + +ZTEST_USER(system, test_hostcmd_sysinfo) +{ + struct ec_response_sysinfo response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_SYSINFO, 0, response); + + /* Simply issue the command and get the results */ + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(response.reset_flags, 0, "response.reset_flags = %d", + response.reset_flags); + zassert_equal(response.current_image, EC_IMAGE_RO, + "response.current_image = %d", response.current_image); + zassert_equal(response.flags, 0, "response.flags = %d", response.flags); +} + +ZTEST_USER(system, test_hostcmd_board_version) +{ + struct ec_response_board_version response; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_GET_BOARD_VERSION, 0, response); + + /* Get the board version, which is default 0. */ + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(response.board_version, 0, "response.board_version = %d", + response.board_version); +} + +/* System Function Testing */ + +static void system_flags_before_after(void *data) +{ + ARG_UNUSED(data); + system_clear_reset_flags(-1); +} + +ZTEST(system_save_flags, test_system_encode_save_flags) +{ + int flags_to_save = 0; + uint32_t saved_flags = 0; + int arbitrary_reset_flags = 1; + + /* Save all possible flags */ + flags_to_save = -1; + + /* Clear all reset flags and set them arbitrarily */ + system_set_reset_flags(arbitrary_reset_flags); + + system_encode_save_flags(flags_to_save, &saved_flags); + + /* Verify all non-mutually exclusive flags */ + zassert_equal(1, saved_flags & system_get_reset_flags(), NULL); + zassert_not_equal(0, saved_flags & EC_RESET_FLAG_AP_OFF, NULL); + zassert_not_equal(0, saved_flags & EC_RESET_FLAG_STAY_IN_RO, NULL); + zassert_not_equal(0, saved_flags & EC_RESET_FLAG_AP_WATCHDOG, NULL); +} + +ZTEST(system_save_flags, + test_system_encode_save_flags_mutually_exclusive_reset_flags) +{ + int flags_to_save = 0; + uint32_t saved_flags = 0; + + /* Verify reset hard takes precedence over hibernate/soft */ + flags_to_save = SYSTEM_RESET_HARD | SYSTEM_RESET_HIBERNATE; + + system_encode_save_flags(flags_to_save, &saved_flags); + + zassert_not_equal(0, saved_flags & EC_RESET_FLAG_HARD, NULL); + zassert_equal(0, saved_flags & EC_RESET_FLAG_HIBERNATE, NULL); + zassert_equal(0, saved_flags & EC_RESET_FLAG_SOFT, NULL); + + /* Verify reset hibernate takes precedence over soft */ + flags_to_save = SYSTEM_RESET_HIBERNATE; + + system_encode_save_flags(flags_to_save, &saved_flags); + + zassert_equal(0, saved_flags & EC_RESET_FLAG_HARD, NULL); + zassert_not_equal(0, saved_flags & EC_RESET_FLAG_HIBERNATE, NULL); + zassert_equal(0, saved_flags & EC_RESET_FLAG_SOFT, NULL); + + /* Verify reset soft is always saved given no other flags */ + flags_to_save = 0; + + system_encode_save_flags(flags_to_save, &saved_flags); + + zassert_equal(0, saved_flags & EC_RESET_FLAG_HARD, NULL); + zassert_equal(0, saved_flags & EC_RESET_FLAG_HIBERNATE, NULL); + zassert_not_equal(0, saved_flags & EC_RESET_FLAG_SOFT, NULL); +} + +ZTEST_SUITE(system, drivers_predicate_post_main, NULL, NULL, NULL, NULL); + +ZTEST_SUITE(system_save_flags, drivers_predicate_post_main, NULL, + system_flags_before_after, system_flags_before_after, NULL); diff --git a/zephyr/test/drivers/default/src/tablet_mode.c b/zephyr/test/drivers/default/src/tablet_mode.c new file mode 100644 index 0000000000..d600d26072 --- /dev/null +++ b/zephyr/test/drivers/default/src/tablet_mode.c @@ -0,0 +1,168 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/fff.h> +#include <zephyr/shell/shell.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "tablet_mode.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +static void tabletmode_before(void *state) +{ + ARG_UNUSED(state); + tablet_reset(); +} + +static void tabletmode_after(void *state) +{ + ARG_UNUSED(state); + tablet_reset(); +} + +/** + * @brief TestPurpose: various tablet_set_mode operations, make sure lid and + * base works independently. + */ +ZTEST_USER(tabletmode, test_tablet_set_mode) +{ + int ret; + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet initial mode: %d", ret); + + tablet_set_mode(1, TABLET_TRIGGER_LID); + + ret = tablet_get_mode(); + zassert_equal(ret, 1, "unexepcted tablet mode: %d", ret); + + tablet_set_mode(1, TABLET_TRIGGER_BASE); + + ret = tablet_get_mode(); + zassert_equal(ret, 1, "unexepcted tablet mode: %d", ret); + + tablet_set_mode(0, TABLET_TRIGGER_LID); + + ret = tablet_get_mode(); + zassert_equal(ret, 1, "unexepcted tablet mode: %d", ret); + + tablet_set_mode(0, TABLET_TRIGGER_BASE); + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet mode: %d", ret); +} + +/** + * @brief TestPurpose: test the tablet_disable functionality. + */ +ZTEST_USER(tabletmode, test_tablet_disable) +{ + int ret; + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet initial mode: %d", ret); + + tablet_disable(); + tablet_set_mode(1, TABLET_TRIGGER_LID); + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet mode: %d", ret); +} + +/** + * @brief TestPurpose: check that tabletmode on and off changes the mode. + */ +ZTEST_USER(tabletmode, test_settabletmode_on_off) +{ + int ret; + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet initial mode: %d", ret); + + ret = shell_execute_cmd(get_ec_shell(), "tabletmode"); + zassert_equal(ret, EC_SUCCESS, "unexepcted command return status: %d", + ret); + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet mode: %d", ret); + + ret = shell_execute_cmd(get_ec_shell(), "tabletmode on"); + zassert_equal(ret, EC_SUCCESS, "unexepcted command return status: %d", + ret); + + ret = tablet_get_mode(); + zassert_equal(ret, 1, "unexepcted tablet mode: %d", ret); + + ret = shell_execute_cmd(get_ec_shell(), "tabletmode off"); + zassert_equal(ret, EC_SUCCESS, "unexepcted command return status: %d", + ret); + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet mode: %d", ret); +} + +/** + * @brief TestPurpose: ensure that console tabletmode forces the status, + * inhibiting tablet_set_mode, and then unforce it with reset. + */ +ZTEST_USER(tabletmode, test_settabletmode_forced) +{ + int ret; + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet initial mode: %d", ret); + + ret = shell_execute_cmd(get_ec_shell(), "tabletmode on"); + zassert_equal(ret, EC_SUCCESS, "unexepcted command return status: %d", + ret); + + ret = tablet_get_mode(); + zassert_equal(ret, 1, "unexepcted tablet mode: %d", ret); + + tablet_set_mode(0, TABLET_TRIGGER_LID); + + ret = tablet_get_mode(); + zassert_equal(ret, 1, "unexepcted tablet mode: %d", ret); + + ret = shell_execute_cmd(get_ec_shell(), "tabletmode reset"); + zassert_equal(ret, EC_SUCCESS, "unexepcted command return status: %d", + ret); + + tablet_set_mode(0, TABLET_TRIGGER_LID); + + ret = tablet_get_mode(); + zassert_equal(ret, 0, "unexepcted tablet mode: %d", ret); +} + +/** + * @brief TestPurpose: check the "too many arguments" case. + */ +ZTEST_USER(tabletmode, test_settabletmode_too_many_args) +{ + int ret; + + ret = shell_execute_cmd(get_ec_shell(), + "tabletmode too many arguments"); + zassert_equal(ret, EC_ERROR_PARAM_COUNT, + "unexepcted command return status: %d", ret); +} + +/** + * @brief TestPurpose: check the "unknown argument" case. + */ +ZTEST_USER(tabletmode, test_settabletmode_unknown_arg) +{ + int ret; + + ret = shell_execute_cmd(get_ec_shell(), "tabletmode X"); + zassert_equal(ret, EC_ERROR_PARAM1, + "unexepcted command return status: %d", ret); +} + +ZTEST_SUITE(tabletmode, drivers_predicate_post_main, NULL, tabletmode_before, + tabletmode_after, NULL); diff --git a/zephyr/test/drivers/src/tcpci.c b/zephyr/test/drivers/default/src/tcpci.c index 167744f3a9..e549e5056a 100644 --- a/zephyr/test/drivers/src/tcpci.c +++ b/zephyr/test/drivers/default/src/tcpci.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> @@ -20,177 +20,210 @@ #include "tcpm/tcpci.h" #include "test/drivers/test_state.h" -#define EMUL_LABEL DT_NODELABEL(tcpci_emul) +#define TCPCI_EMUL_NODE DT_NODELABEL(tcpci_emul) /** Test TCPCI init and vbus level */ ZTEST(tcpci, test_generic_tcpci_init) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_init(emul, USBC_PORT_C0); + test_tcpci_init(emul, common_data, USBC_PORT_C0); } /** Test TCPCI release */ ZTEST(tcpci, test_generic_tcpci_release) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_release(emul, USBC_PORT_C0); + test_tcpci_release(emul, common_data, USBC_PORT_C0); } /** Test TCPCI get cc */ ZTEST(tcpci, test_generic_tcpci_get_cc) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_get_cc(emul, USBC_PORT_C0); + test_tcpci_get_cc(emul, common_data, USBC_PORT_C0); } /** Test TCPCI set cc */ ZTEST(tcpci, test_generic_tcpci_set_cc) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_set_cc(emul, USBC_PORT_C0); + test_tcpci_set_cc(emul, common_data, USBC_PORT_C0); } /** Test TCPCI set polarity */ ZTEST(tcpci, test_generic_tcpci_set_polarity) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_set_polarity(emul, USBC_PORT_C0); + test_tcpci_set_polarity(emul, common_data, USBC_PORT_C0); } /** Test TCPCI set vconn */ ZTEST(tcpci, test_generic_tcpci_set_vconn) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_set_vconn(emul, USBC_PORT_C0); + test_tcpci_set_vconn(emul, common_data, USBC_PORT_C0); } /** Test TCPCI set msg header */ ZTEST(tcpci, test_generic_tcpci_set_msg_header) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_set_msg_header(emul, USBC_PORT_C0); + test_tcpci_set_msg_header(emul, common_data, USBC_PORT_C0); } /** Test TCPCI rx and sop prime enable */ ZTEST(tcpci, test_generic_tcpci_set_rx_detect) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_set_rx_detect(emul, USBC_PORT_C0); + test_tcpci_set_rx_detect(emul, common_data, USBC_PORT_C0); } /** Test TCPCI get raw message from TCPC revision 2.0 */ ZTEST(tcpci, test_generic_tcpci_get_rx_message_raw_rev2) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - tcpc_config[USBC_PORT_C0].flags = TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); - - test_tcpci_get_rx_message_raw(emul, USBC_PORT_C0); + /* Revision 2.0 is set by default in test_rules */ + test_tcpci_get_rx_message_raw(emul, common_data, USBC_PORT_C0); } /** Test TCPCI get raw message from TCPC revision 1.0 */ ZTEST(tcpci, test_generic_tcpci_get_rx_message_raw_rev1) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); tcpc_config[USBC_PORT_C0].flags = 0; tcpci_emul_set_rev(emul, TCPCI_EMUL_REV1_0_VER1_0); - test_tcpci_get_rx_message_raw(emul, USBC_PORT_C0); + test_tcpci_get_rx_message_raw(emul, common_data, USBC_PORT_C0); } /** Test TCPCI transmitting message from TCPC revision 2.0 */ ZTEST(tcpci, test_generic_tcpci_transmit_rev2) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - - tcpc_config[USBC_PORT_C0].flags = TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_transmit(emul, USBC_PORT_C0); + /* Revision 2.0 is set by default in test_rules */ + test_tcpci_transmit(emul, common_data, USBC_PORT_C0); } /** Test TCPCI transmitting message from TCPC revision 1.0 */ ZTEST(tcpci, test_generic_tcpci_transmit_rev1) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); tcpc_config[USBC_PORT_C0].flags = 0; tcpci_emul_set_rev(emul, TCPCI_EMUL_REV1_0_VER1_0); - test_tcpci_transmit(emul, USBC_PORT_C0); + test_tcpci_transmit(emul, common_data, USBC_PORT_C0); } /** Test TCPCI alert */ ZTEST(tcpci, test_generic_tcpci_alert) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_alert(emul, USBC_PORT_C0); + test_tcpci_alert(emul, common_data, USBC_PORT_C0); } - /** Test TCPCI alert RX message */ ZTEST(tcpci, test_generic_tcpci_alert_rx_message) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_alert_rx_message(emul, USBC_PORT_C0); + test_tcpci_alert_rx_message(emul, common_data, USBC_PORT_C0); } /** Test TCPCI auto discharge on disconnect */ ZTEST(tcpci, test_generic_tcpci_auto_discharge) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_auto_discharge(emul, USBC_PORT_C0); + test_tcpci_auto_discharge(emul, common_data, USBC_PORT_C0); } /** Test TCPCI drp toggle */ ZTEST(tcpci, test_generic_tcpci_drp_toggle) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_drp_toggle(emul, USBC_PORT_C0); + test_tcpci_drp_toggle(emul, common_data, USBC_PORT_C0); } /** Test TCPCI get chip info */ ZTEST(tcpci, test_generic_tcpci_get_chip_info) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_get_chip_info(emul, USBC_PORT_C0); + test_tcpci_get_chip_info(emul, common_data, USBC_PORT_C0); } /** Test TCPCI enter low power mode */ ZTEST(tcpci, test_generic_tcpci_low_power_mode) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_low_power_mode(emul, USBC_PORT_C0); + test_tcpci_low_power_mode(emul, common_data, USBC_PORT_C0); } /** Test TCPCI set bist test mode */ ZTEST(tcpci, test_generic_tcpci_set_bist_mode) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); - test_tcpci_set_bist_mode(emul, USBC_PORT_C0); + test_tcpci_set_bist_mode(emul, common_data, USBC_PORT_C0); } /** Test TCPCI discharge vbus */ ZTEST(tcpci, test_generic_tcpci_discharge_vbus) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); uint8_t exp_ctrl, initial_ctrl; /* Set initial value for POWER ctrl register. Chosen arbitrary. */ @@ -212,7 +245,7 @@ ZTEST(tcpci, test_generic_tcpci_discharge_vbus) /** Test TCPC xfer */ ZTEST(tcpci, test_tcpc_xfer) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); uint16_t val, exp_val; uint8_t reg; @@ -231,7 +264,7 @@ ZTEST(tcpci, test_tcpc_xfer) /** Test TCPCI debug accessory enable/disable */ ZTEST(tcpci, test_generic_tcpci_debug_accessory) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); uint8_t exp_val, initial_val; /* Set initial value for STD output register. Chosen arbitrary. */ @@ -255,61 +288,60 @@ ZTEST(tcpci, test_generic_tcpci_debug_accessory) /* Setup TCPCI usb mux to behave as it is used only for usb mux */ static void set_usb_mux_not_tcpc(void) { - usb_muxes[USBC_PORT_C0].flags = USB_MUX_FLAG_NOT_TCPC; + usbc0_mux0.flags = USB_MUX_FLAG_NOT_TCPC; } /* Setup TCPCI usb mux to behave as it is used for usb mux and TCPC */ static void set_usb_mux_tcpc(void) { - usb_muxes[USBC_PORT_C0].flags = 0; + usbc0_mux0.flags = 0; } /** Test TCPCI mux init */ ZTEST(tcpci, test_generic_tcpci_mux_init) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - struct usb_mux *tcpci_usb_mux = &usb_muxes[USBC_PORT_C0]; + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); + const struct usb_mux *tcpci_usb_mux = usb_muxes[USBC_PORT_C0].mux; /* Set as usb mux with TCPC for first init call */ set_usb_mux_tcpc(); /* Make sure that TCPC is not accessed */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_FAIL_ALL_REG); - zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_init(tcpci_usb_mux), - NULL); + zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); /* Set as only usb mux without TCPC for rest of the test */ set_usb_mux_not_tcpc(); /* Test fail on power status read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_POWER_STATUS); - zassert_equal(EC_ERROR_INVAL, tcpci_tcpm_mux_init(tcpci_usb_mux), - NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_POWER_STATUS); + zassert_equal(EC_ERROR_INVAL, tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on uninitialised bit set */ tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, TCPC_REG_POWER_STATUS_UNINIT); - zassert_equal(EC_ERROR_TIMEOUT, - tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); + zassert_equal(EC_ERROR_TIMEOUT, tcpci_tcpm_mux_init(tcpci_usb_mux), + NULL); /* Set default power status for rest of the test */ tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, TCPC_REG_POWER_STATUS_VBUS_DET); /* Test fail on alert mask write fail */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ALERT_MASK); - zassert_equal(EC_ERROR_UNKNOWN, - tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_ALERT_MASK); + zassert_equal(EC_ERROR_UNKNOWN, tcpci_tcpm_mux_init(tcpci_usb_mux), + NULL); /* Test fail on alert write fail */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ALERT); - zassert_equal(EC_ERROR_UNKNOWN, - tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_ALERT); + zassert_equal(EC_ERROR_UNKNOWN, tcpci_tcpm_mux_init(tcpci_usb_mux), + NULL); + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set arbitrary value to alert and alert mask registers */ @@ -317,8 +349,7 @@ ZTEST(tcpci, test_generic_tcpci_mux_init) tcpci_emul_set_reg(emul, TCPC_REG_ALERT_MASK, 0xffff); /* Test success init */ - zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_init(tcpci_usb_mux), - NULL); + zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, 0); check_tcpci_reg(emul, TCPC_REG_ALERT, 0); } @@ -326,34 +357,32 @@ ZTEST(tcpci, test_generic_tcpci_mux_init) /** Test TCPCI mux enter low power mode */ ZTEST(tcpci, test_generic_tcpci_mux_enter_low_power) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - struct usb_mux *tcpci_usb_mux = &usb_muxes[USBC_PORT_C0]; + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); + const struct usb_mux *tcpci_usb_mux = usb_muxes[USBC_PORT_C0].mux; /* Set as usb mux with TCPC for first enter_low_power call */ set_usb_mux_tcpc(); /* Make sure that TCPC is not accessed */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_FAIL_ALL_REG); - zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), + zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), NULL); /* Set as only usb mux without TCPC for rest of the test */ set_usb_mux_not_tcpc(); /* Test error on failed command set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_COMMAND); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_COMMAND); zassert_equal(EC_ERROR_INVAL, - tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), - NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), NULL); + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test correct command is issued */ - zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), + zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), NULL); check_tcpci_reg(emul, TCPC_REG_COMMAND, TCPC_REG_COMMAND_I2CIDLE); } @@ -361,9 +390,10 @@ ZTEST(tcpci, test_generic_tcpci_mux_enter_low_power) /** Test TCPCI mux set and get */ static void test_generic_tcpci_mux_set_get(void) { - const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - struct usb_mux *tcpci_usb_mux = &usb_muxes[USBC_PORT_C0]; + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); + const struct usb_mux *tcpci_usb_mux = usb_muxes[USBC_PORT_C0].mux; mux_state_t mux_state, mux_state_get; uint16_t exp_val, initial_val; bool ack; @@ -371,23 +401,21 @@ static void test_generic_tcpci_mux_set_get(void) mux_state = USB_PD_MUX_NONE; /* Test fail on standard output config register read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_CONFIG_STD_OUTPUT); + i2c_common_emul_set_read_fail_reg(common_data, + TCPC_REG_CONFIG_STD_OUTPUT); zassert_equal(EC_ERROR_INVAL, - tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), - NULL); + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); zassert_equal(EC_ERROR_INVAL, - tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), - NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), NULL); + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on standard output config register write */ - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_CONFIG_STD_OUTPUT); zassert_equal(EC_ERROR_INVAL, - tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), - NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set initial value for STD output register. Chosen arbitrary. */ @@ -403,13 +431,11 @@ static void test_generic_tcpci_mux_set_get(void) exp_val &= ~TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; mux_state = USB_PD_MUX_NONE; zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), - NULL); + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); zassert_false(ack, "Ack from host shouldn't be required"); zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), - NULL); + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), NULL); zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", mux_state, mux_state_get); @@ -419,13 +445,11 @@ static void test_generic_tcpci_mux_set_get(void) TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; mux_state = USB_PD_MUX_DP_ENABLED | USB_PD_MUX_POLARITY_INVERTED; zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), - NULL); + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); zassert_false(ack, "Ack from host shouldn't be required"); zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), - NULL); + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), NULL); zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", mux_state, mux_state_get); @@ -435,13 +459,11 @@ static void test_generic_tcpci_mux_set_get(void) exp_val &= ~TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; mux_state = USB_PD_MUX_USB_ENABLED; zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), - NULL); + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); zassert_false(ack, "Ack from host shouldn't be required"); zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), - NULL); + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), NULL); zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", mux_state, mux_state_get); @@ -453,13 +475,11 @@ static void test_generic_tcpci_mux_set_get(void) mux_state = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | USB_PD_MUX_POLARITY_INVERTED; zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), - NULL); + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); zassert_false(ack, "Ack from host shouldn't be required"); zassert_equal(EC_SUCCESS, - tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), - NULL); + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), NULL); zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", mux_state, mux_state_get); } @@ -476,13 +496,29 @@ ZTEST(tcpci, test_generic_tcpci_mux_set_get__not_tcpc) set_usb_mux_tcpc(); } +ZTEST(tcpci, test_generic_tcpci_hard_reset_reinit) +{ + const struct emul *emul = EMUL_DT_GET(TCPCI_EMUL_NODE); + struct i2c_common_emul_data *common_data = + emul_tcpci_generic_get_i2c_common_data(emul); + + test_tcpci_hard_reset_reinit(emul, common_data, USBC_PORT_C0); +} + static void *tcpci_setup(void) { /* This test suite assumes that first usb mux for port C0 is TCPCI */ - __ASSERT(usb_muxes[USBC_PORT_C0].driver == &tcpci_tcpm_usb_mux_driver, + __ASSERT(usb_muxes[USBC_PORT_C0].mux->driver == + &tcpci_tcpm_usb_mux_driver, "Invalid config of usb_muxes in test/drivers/src/stubs.c"); return NULL; } -ZTEST_SUITE(tcpci, drivers_predicate_post_main, tcpci_setup, NULL, NULL, NULL); +static void tcpci_after(void *state) +{ + set_usb_mux_tcpc(); +} + +ZTEST_SUITE(tcpci, drivers_predicate_pre_main, tcpci_setup, NULL, tcpci_after, + NULL); diff --git a/zephyr/test/drivers/src/tcpci_test_common.c b/zephyr/test/drivers/default/src/tcpci_test_common.c index ccd250e11f..f2c0c58bf9 100644 --- a/zephyr/test/drivers/src/tcpci_test_common.c +++ b/zephyr/test/drivers/default/src/tcpci_test_common.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "emul/emul_common_i2c.h" @@ -34,25 +34,24 @@ void check_tcpci_reg_with_mask_f(const struct emul *emul, int reg, zassert_ok(tcpci_emul_get_reg(emul, reg, ®_val), "Failed tcpci_emul_get_reg(); line: %d", line); zassert_equal(exp_val & mask, reg_val & mask, - "Expected 0x%x, got 0x%x, mask 0x%x; line: %d", - exp_val, reg_val, mask, line); + "Expected 0x%x, got 0x%x, mask 0x%x; line: %d", exp_val, + reg_val, mask, line); } /** Test TCPCI init and vbus level */ -void test_tcpci_init(const struct emul *emul, enum usbc_port port) +void test_tcpci_init(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); uint16_t exp_mask; - tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0 & - TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V; - tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); + tcpc_config[port].flags |= TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V; /* Test fail on power status read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_POWER_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_POWER_STATUS); zassert_equal(EC_ERROR_INVAL, drv->init(port), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test fail on uninitialised bit set */ @@ -84,7 +83,7 @@ void test_tcpci_init(const struct emul *emul, enum usbc_port port) /* Set TCPCI emulator VBUS to present (connected, above 4V) */ tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, TCPC_REG_POWER_STATUS_VBUS_PRES | - TCPC_REG_POWER_STATUS_VBUS_DET); + TCPC_REG_POWER_STATUS_VBUS_DET); /* Test init with VBUS present without vSafe0V tcpc config flag */ zassert_equal(EC_SUCCESS, drv->init(port), NULL); @@ -136,7 +135,9 @@ void test_tcpci_init(const struct emul *emul, enum usbc_port port) } /** Test TCPCI release */ -void test_tcpci_release(const struct emul *emul, enum usbc_port port) +void test_tcpci_release(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; @@ -149,7 +150,9 @@ void test_tcpci_release(const struct emul *emul, enum usbc_port port) } /** Test TCPCI get cc */ -void test_tcpci_get_cc(const struct emul *emul, enum usbc_port port) +void test_tcpci_get_cc(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; enum tcpc_cc_voltage_status cc1, cc2; @@ -165,61 +168,61 @@ void test_tcpci_get_cc(const struct emul *emul, enum usbc_port port) } test_param[] = { /* Test DRP with open state */ { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_OPEN}, + .cc = { TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_OPEN }, .connect_result = false, .drp = TYPEC_DRP, }, /* Test DRP with cc1 open state, cc2 src RA */ { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA}, + .cc = { TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA }, .connect_result = false, .drp = TYPEC_DRP, }, /* Test DRP with cc1 src RA, cc2 src RD */ { - .cc = {TYPEC_CC_VOLT_RA, TYPEC_CC_VOLT_RD}, + .cc = { TYPEC_CC_VOLT_RA, TYPEC_CC_VOLT_RD }, .connect_result = false, .drp = TYPEC_DRP, }, /* Test DRP with cc1 snk open, cc2 snk default */ { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RP_DEF}, + .cc = { TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RP_DEF }, .connect_result = true, .drp = TYPEC_DRP, }, /* Test DRP with cc1 snk 1.5, cc2 snk 3.0 */ { - .cc = {TYPEC_CC_VOLT_RP_1_5, TYPEC_CC_VOLT_RP_3_0}, + .cc = { TYPEC_CC_VOLT_RP_1_5, TYPEC_CC_VOLT_RP_3_0 }, .connect_result = true, .drp = TYPEC_DRP, }, /* Test no DRP with cc1 src open, cc2 src RA */ { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA}, + .cc = { TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA }, .connect_result = false, .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RP, TYPEC_CC_RP}, + .role_cc = { TYPEC_CC_RP, TYPEC_CC_RP }, }, /* Test no DRP with cc1 src RD, cc2 snk default */ { - .cc = {TYPEC_CC_VOLT_RD, TYPEC_CC_VOLT_RP_DEF}, + .cc = { TYPEC_CC_VOLT_RD, TYPEC_CC_VOLT_RP_DEF }, .connect_result = false, .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RP, TYPEC_CC_RD}, + .role_cc = { TYPEC_CC_RP, TYPEC_CC_RD }, }, /* Test no DRP with cc1 snk default, cc2 snk open */ { - .cc = {TYPEC_CC_VOLT_RP_DEF, TYPEC_CC_VOLT_OPEN}, + .cc = { TYPEC_CC_VOLT_RP_DEF, TYPEC_CC_VOLT_OPEN }, .connect_result = false, .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RD, TYPEC_CC_RD}, + .role_cc = { TYPEC_CC_RD, TYPEC_CC_RD }, }, /* Test no DRP with cc1 snk 3.0, cc2 snk 1.5 */ { - .cc = {TYPEC_CC_VOLT_RP_3_0, TYPEC_CC_VOLT_RP_1_5}, + .cc = { TYPEC_CC_VOLT_RP_3_0, TYPEC_CC_VOLT_RP_1_5 }, .connect_result = false, .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RD, TYPEC_CC_RD}, + .role_cc = { TYPEC_CC_RD, TYPEC_CC_RD }, }, }; @@ -233,25 +236,27 @@ void test_tcpci_get_cc(const struct emul *emul, enum usbc_port port) test_param[i].cc[1]); tcpci_emul_set_reg(emul, TCPC_REG_ROLE_CTRL, role_ctrl); tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, cc_status); - zassert_equal(EC_SUCCESS, drv->get_cc(port, &cc1, &cc2), - "Failed to get CC in test case %d (CC 0x%x, role 0x%x)", - i, cc_status, role_ctrl); - zassert_equal(test_param[i].cc[0], cc1, - "0x%x != (cc1 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", - test_param[i].cc[0], cc1, i, cc_status, - role_ctrl); - zassert_equal(test_param[i].cc[1], cc2, - "0x%x != (cc2 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", - test_param[i].cc[0], cc1, i, cc_status, - role_ctrl); + zassert_equal( + EC_SUCCESS, drv->get_cc(port, &cc1, &cc2), + "Failed to get CC in test case %d (CC 0x%x, role 0x%x)", + i, cc_status, role_ctrl); + zassert_equal( + test_param[i].cc[0], cc1, + "0x%x != (cc1 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", + test_param[i].cc[0], cc1, i, cc_status, role_ctrl); + zassert_equal( + test_param[i].cc[1], cc2, + "0x%x != (cc2 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", + test_param[i].cc[0], cc1, i, cc_status, role_ctrl); } } /** Test TCPCI set cc */ -void test_tcpci_set_cc(const struct emul *emul, enum usbc_port port) +void test_tcpci_set_cc(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); enum tcpc_rp_value rp; enum tcpc_cc_pull cc; @@ -264,9 +269,9 @@ void test_tcpci_set_cc(const struct emul *emul, enum usbc_port port) TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); /* Test error on failed role ctrl set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ROLE_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_ROLE_CTRL); zassert_equal(EC_ERROR_INVAL, drv->set_cc(port, TYPEC_CC_OPEN), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting 1.5 RP and cc RD */ @@ -296,10 +301,11 @@ void test_tcpci_set_cc(const struct emul *emul, enum usbc_port port) } /** Test TCPCI set polarity */ -void test_tcpci_set_polarity(const struct emul *emul, enum usbc_port port) +void test_tcpci_set_polarity(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); uint8_t initial_ctrl; uint8_t exp_ctrl; @@ -310,10 +316,10 @@ void test_tcpci_set_polarity(const struct emul *emul, enum usbc_port port) /* Test error on failed polarity set */ exp_ctrl = initial_ctrl; - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_TCPC_CTRL); zassert_equal(EC_ERROR_INVAL, drv->set_polarity(port, POLARITY_CC2), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); @@ -341,10 +347,11 @@ void test_tcpci_set_polarity(const struct emul *emul, enum usbc_port port) } /** Test TCPCI set vconn */ -void test_tcpci_set_vconn(const struct emul *emul, enum usbc_port port) +void test_tcpci_set_vconn(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); uint8_t initial_ctrl; uint8_t exp_ctrl; @@ -355,9 +362,9 @@ void test_tcpci_set_vconn(const struct emul *emul, enum usbc_port port) /* Test error on failed vconn set */ exp_ctrl = initial_ctrl; - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_POWER_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_POWER_CTRL); zassert_equal(EC_ERROR_INVAL, drv->set_vconn(port, 1), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); @@ -373,53 +380,60 @@ void test_tcpci_set_vconn(const struct emul *emul, enum usbc_port port) } /** Test TCPCI set msg header */ -void test_tcpci_set_msg_header(const struct emul *emul, enum usbc_port port) +void test_tcpci_set_msg_header(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); /* Test error on failed header set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_MSG_HDR_INFO); - zassert_equal(EC_ERROR_INVAL, drv->set_msg_header(port, PD_ROLE_SINK, - PD_ROLE_UFP), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_MSG_HDR_INFO); + zassert_equal(EC_ERROR_INVAL, + drv->set_msg_header(port, PD_ROLE_SINK, PD_ROLE_UFP), + NULL); + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting sink UFP */ - zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SINK, - PD_ROLE_UFP), NULL); + zassert_equal(EC_SUCCESS, + drv->set_msg_header(port, PD_ROLE_SINK, PD_ROLE_UFP), + NULL); check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_UFP, PD_ROLE_SINK)); /* Test setting sink DFP */ - zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SINK, - PD_ROLE_DFP), NULL); + zassert_equal(EC_SUCCESS, + drv->set_msg_header(port, PD_ROLE_SINK, PD_ROLE_DFP), + NULL); check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_DFP, PD_ROLE_SINK)); /* Test setting source UFP */ - zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SOURCE, - PD_ROLE_UFP), NULL); + zassert_equal(EC_SUCCESS, + drv->set_msg_header(port, PD_ROLE_SOURCE, PD_ROLE_UFP), + NULL); check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_UFP, PD_ROLE_SOURCE)); /* Test setting source DFP */ - zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SOURCE, - PD_ROLE_DFP), NULL); + zassert_equal(EC_SUCCESS, + drv->set_msg_header(port, PD_ROLE_SOURCE, PD_ROLE_DFP), + NULL); check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_DFP, PD_ROLE_SOURCE)); } /** Test TCPCI rx and sop prime enable */ -void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port) +void test_tcpci_set_rx_detect(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); /* Test error from rx_enable on rx detect set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_RX_DETECT); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_RX_DETECT); zassert_equal(EC_ERROR_INVAL, drv->set_rx_enable(port, 1), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test rx disable */ @@ -436,9 +450,9 @@ void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port) TCPC_REG_RX_DETECT_SOP_SOPP_SOPPP_HRST_MASK); /* Test error from sop_prime on rx detect set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_RX_DETECT); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_RX_DETECT); zassert_equal(EC_ERROR_INVAL, drv->sop_prime_enable(port, 0), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test disabling sop prime with rx enabled does change RX_DETECT */ @@ -456,10 +470,10 @@ void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port) /** Test TCPCI get raw message from TCPC */ void test_tcpci_get_rx_message_raw(const struct emul *emul, + struct i2c_common_emul_data *common_data, enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); struct tcpci_emul_msg msg; uint32_t payload[7]; uint16_t rx_mask; @@ -479,16 +493,16 @@ void test_tcpci_get_rx_message_raw(const struct emul *emul, } msg.buf = buf; msg.cnt = 31; - msg.type = TCPCI_MSG_SOP; + msg.sop_type = TCPCI_MSG_SOP; zassert_equal(TCPCI_EMUL_TX_SUCCESS, tcpci_emul_add_rx_msg(emul, &msg, true), "Failed to setup emulator message"); /* Test fail on reading byte count */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_RX_BUFFER); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_RX_BUFFER); zassert_equal(EC_ERROR_UNKNOWN, drv->get_message_raw(port, payload, &head), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Get raw message should always clean RX alerts */ rx_mask = TCPC_REG_ALERT_RX_BUF_OVF | TCPC_REG_ALERT_RX_STATUS; @@ -515,7 +529,7 @@ void test_tcpci_get_rx_message_raw(const struct emul *emul, /* Test alert register and message payload on success */ size = 28; msg.cnt = size + 2; - msg.type = TCPCI_MSG_SOP_PRIME; + msg.sop_type = TCPCI_MSG_SOP_PRIME; zassert_equal(TCPCI_EMUL_TX_SUCCESS, tcpci_emul_add_rx_msg(emul, &msg, true), "Failed to setup emulator message"); @@ -528,16 +542,17 @@ void test_tcpci_get_rx_message_raw(const struct emul *emul, */ exp_head = (TCPCI_MSG_SOP_PRIME << 28) | (buf[1] << 8) | buf[0]; zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf + 2, size, NULL); } /** Test TCPCI transmitting message from TCPC */ -void test_tcpci_transmit(const struct emul *emul, enum usbc_port port) +void test_tcpci_transmit(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); struct tcpci_emul_msg *msg; uint32_t data[6]; uint16_t header; @@ -551,31 +566,30 @@ void test_tcpci_transmit(const struct emul *emul, enum usbc_port port) } /* Test transmit hard reset fail */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TRANSMIT); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_TRANSMIT); zassert_equal(EC_ERROR_INVAL, drv->transmit(port, TCPCI_MSG_TX_HARD_RESET, 0, NULL), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test transmit cabel reset */ zassert_equal(EC_SUCCESS, drv->transmit(port, TCPCI_MSG_CABLE_RESET, 0, NULL), NULL); - zassert_equal(TCPCI_MSG_CABLE_RESET, msg->type, NULL); + zassert_equal(TCPCI_MSG_CABLE_RESET, msg->sop_type, NULL); /* Test transmit hard reset */ zassert_equal(EC_SUCCESS, drv->transmit(port, TCPCI_MSG_TX_HARD_RESET, 0, NULL), NULL); - zassert_equal(TCPCI_MSG_TX_HARD_RESET, msg->type, NULL); + zassert_equal(TCPCI_MSG_TX_HARD_RESET, msg->sop_type, NULL); /* Test transmit fail on rx buffer */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TX_BUFFER); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_TX_BUFFER); zassert_equal(EC_ERROR_INVAL, - drv->transmit(port, TCPCI_MSG_SOP_PRIME, 0, data), - NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + drv->transmit(port, TCPCI_MSG_SOP_PRIME, 0, data), NULL); + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test transmit only header */ @@ -585,7 +599,7 @@ void test_tcpci_transmit(const struct emul *emul, enum usbc_port port) zassert_equal(EC_SUCCESS, drv->transmit(port, TCPCI_MSG_SOP_PRIME, header, data), NULL); - zassert_equal(TCPCI_MSG_SOP_PRIME, msg->type, NULL); + zassert_equal(TCPCI_MSG_SOP_PRIME, msg->sop_type, NULL); zassert_mem_equal(msg->buf, &header, 2, NULL); zassert_equal(2, msg->cnt, NULL); @@ -596,25 +610,23 @@ void test_tcpci_transmit(const struct emul *emul, enum usbc_port port) zassert_equal(EC_SUCCESS, drv->transmit(port, TCPCI_MSG_SOP_PRIME, header, data), NULL); - zassert_equal(TCPCI_MSG_SOP_PRIME, msg->type, NULL); + zassert_equal(TCPCI_MSG_SOP_PRIME, msg->sop_type, NULL); zassert_mem_equal(msg->buf, &header, 2, NULL); zassert_mem_equal(msg->buf + 2, data, 6 * sizeof(uint32_t), NULL); zassert_equal(2 + 6 * sizeof(uint32_t), msg->cnt, NULL); } /** Test TCPCI alert */ -void test_tcpci_alert(const struct emul *emul, enum usbc_port port) +void test_tcpci_alert(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - - tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); /* Test alert read fail */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_ALERT); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_ALERT); drv->tcpc_alert(port); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Handle overcurrent */ @@ -650,7 +662,9 @@ void test_tcpci_alert(const struct emul *emul, enum usbc_port port) } /** Test TCPCI alert RX message */ -void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) +void test_tcpci_alert_rx_message(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; struct tcpci_emul_msg msg1, msg2; @@ -660,8 +674,6 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) int i, head; int size; - tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); tcpci_emul_set_reg(emul, TCPC_REG_DEV_CAP_2, TCPC_REG_DEV_CAP_2_LONG_MSG); tcpci_emul_set_reg(emul, TCPC_REG_RX_DETECT, @@ -674,11 +686,11 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) size = 23; msg1.buf = buf1; msg1.cnt = size + 3; - msg1.type = TCPCI_MSG_SOP; + msg1.sop_type = TCPCI_MSG_SOP; msg2.buf = buf2; msg2.cnt = size + 3; - msg2.type = TCPCI_MSG_SOP_PRIME; + msg2.sop_type = TCPCI_MSG_SOP_PRIME; /* Test receiving one message */ zassert_equal(TCPCI_EMUL_TX_SUCCESS, @@ -693,8 +705,8 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) NULL); exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf1 + 2, size, NULL); zassert_false(tcpm_has_pending_message(port), NULL); @@ -714,8 +726,8 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) NULL); exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf1 + 2, size, NULL); /* Check if msg2 is in queue */ zassert_true(tcpm_has_pending_message(port), NULL); @@ -723,8 +735,8 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) NULL); exp_head = (TCPCI_MSG_SOP_PRIME << 28) | (buf2[1] << 8) | buf2[0]; zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf2 + 2, size, NULL); zassert_false(tcpm_has_pending_message(port), NULL); @@ -747,8 +759,8 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) NULL); exp_head = (TCPCI_MSG_SOP_PRIME << 28) | (buf2[1] << 8) | buf2[0]; zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf2 + 2, size, NULL); zassert_false(tcpm_has_pending_message(port), NULL); @@ -774,8 +786,8 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) zassert_equal(EC_SUCCESS, tcpm_dequeue_message(port, payload, &head), NULL); zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf1 + 2, size, NULL); } tcpm_clear_pending_messages(port); @@ -791,14 +803,16 @@ void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) NULL); exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; zassert_equal(exp_head, head, - "Received header 0x%08lx, expected 0x%08lx", - head, exp_head); + "Received header 0x%08lx, expected 0x%08lx", head, + exp_head); zassert_mem_equal(payload, buf1 + 2, size, NULL); zassert_false(tcpm_has_pending_message(port), NULL); } /** Test TCPCI auto discharge on disconnect */ -void test_tcpci_auto_discharge(const struct emul *emul, enum usbc_port port) +void test_tcpci_auto_discharge(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; uint8_t initial_ctrl; @@ -822,28 +836,25 @@ void test_tcpci_auto_discharge(const struct emul *emul, enum usbc_port port) } /** Test TCPCI drp toggle */ -void test_tcpci_drp_toggle(const struct emul *emul, enum usbc_port port) +void test_tcpci_drp_toggle(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); uint8_t exp_tcpc_ctrl, exp_role_ctrl, initial_tcpc_ctrl; - /* Set TCPCI to revision 2 */ - tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); - /* Test error on failed role CTRL set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ROLE_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_ROLE_CTRL); zassert_equal(EC_ERROR_INVAL, drv->drp_toggle(port), NULL); /* Test error on failed TCPC CTRL set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_TCPC_CTRL); zassert_equal(EC_ERROR_INVAL, drv->drp_toggle(port), NULL); /* Test error on failed command set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_COMMAND); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_COMMAND); zassert_equal(EC_ERROR_INVAL, drv->drp_toggle(port), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set initial value for TCPC ctrl register. Chosen arbitrary. */ @@ -891,25 +902,26 @@ void test_tcpci_drp_toggle(const struct emul *emul, enum usbc_port port) } /** Test TCPCI get chip info */ -void test_tcpci_get_chip_info(const struct emul *emul, enum usbc_port port) +void test_tcpci_get_chip_info(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); struct ec_response_pd_chip_info_v1 info; uint16_t vendor, product, bcd; /* Test error on failed vendor id get */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_VENDOR_ID); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_VENDOR_ID); zassert_equal(EC_ERROR_INVAL, drv->get_chip_info(port, 1, &info), NULL); /* Test error on failed product id get */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_PRODUCT_ID); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_PRODUCT_ID); zassert_equal(EC_ERROR_INVAL, drv->get_chip_info(port, 1, &info), NULL); /* Test error on failed BCD get */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_VENDOR_ID); + i2c_common_emul_set_read_fail_reg(common_data, TCPC_REG_VENDOR_ID); zassert_equal(EC_ERROR_INVAL, drv->get_chip_info(port, 1, &info), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test reading chip info. Values chosen arbitrary. */ @@ -929,10 +941,10 @@ void test_tcpci_get_chip_info(const struct emul *emul, enum usbc_port port) info.product_id = 0; info.device_id = 0; /* Make sure, that TCPC is not accessed */ - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_FAIL_ALL_REG); zassert_equal(EC_SUCCESS, drv->get_chip_info(port, 0, &info), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); zassert_equal(vendor, info.vendor_id, NULL); zassert_equal(product, info.product_id, NULL); @@ -940,15 +952,16 @@ void test_tcpci_get_chip_info(const struct emul *emul, enum usbc_port port) } /** Test TCPCI enter low power mode */ -void test_tcpci_low_power_mode(const struct emul *emul, enum usbc_port port) +void test_tcpci_low_power_mode(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); /* Test error on failed command set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_COMMAND); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_COMMAND); zassert_equal(EC_ERROR_INVAL, drv->enter_low_power_mode(port), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Test correct command is issued */ @@ -957,21 +970,22 @@ void test_tcpci_low_power_mode(const struct emul *emul, enum usbc_port port) } /** Test TCPCI set bist test mode */ -void test_tcpci_set_bist_mode(const struct emul *emul, enum usbc_port port) +void test_tcpci_set_bist_mode(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) { const struct tcpm_drv *drv = tcpc_config[port].drv; - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); uint16_t exp_mask, initial_mask; uint8_t exp_ctrl, initial_ctrl; /* Test error on TCPC CTRL set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_TCPC_CTRL); zassert_equal(EC_ERROR_INVAL, drv->set_bist_test_mode(port, 1), NULL); /* Test error on alert mask set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ALERT_MASK); + i2c_common_emul_set_write_fail_reg(common_data, TCPC_REG_ALERT_MASK); zassert_equal(EC_ERROR_INVAL, drv->set_bist_test_mode(port, 1), NULL); - i2c_common_emul_set_write_fail_reg(i2c_emul, + i2c_common_emul_set_write_fail_reg(common_data, I2C_COMMON_EMUL_NO_FAIL_REG); /* Set initial value for alert mask register. Chosen arbitrary. */ @@ -997,3 +1011,20 @@ void test_tcpci_set_bist_mode(const struct emul *emul, enum usbc_port port) check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); } + +void test_tcpci_hard_reset_reinit(const struct emul *emul, + struct i2c_common_emul_data *common_data, + enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + uint16_t power_status_mask; + uint16_t alert_mask; + + zassume_equal(EC_SUCCESS, drv->init(port), NULL); + tcpci_emul_get_reg(emul, TCPC_REG_POWER_STATUS_MASK, + &power_status_mask); + tcpci_emul_get_reg(emul, TCPC_REG_ALERT_MASK, &alert_mask); + zassert_ok(tcpci_hard_reset_reinit(USBC_PORT_C0), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, power_status_mask); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, alert_mask); +} diff --git a/zephyr/test/drivers/src/tcs3400.c b/zephyr/test/drivers/default/src/tcs3400.c index 66955481f7..860b069532 100644 --- a/zephyr/test/drivers/src/tcs3400.c +++ b/zephyr/test/drivers/default/src/tcs3400.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "i2c.h" @@ -16,22 +16,23 @@ #include "driver/als_tcs3400.h" #include "test/drivers/test_state.h" -#define TCS_ORD DT_DEP_ORD(DT_NODELABEL(tcs_emul)) -#define TCS_CLR_SENSOR_ID SENSOR_ID(DT_NODELABEL(tcs3400_clear)) -#define TCS_RGB_SENSOR_ID SENSOR_ID(DT_NODELABEL(tcs3400_rgb)) -#define TCS_INT_EVENT \ +#define TCS_NODE DT_NODELABEL(tcs_emul) +#define TCS_CLR_SENSOR_ID SENSOR_ID(DT_NODELABEL(tcs3400_clear)) +#define TCS_RGB_SENSOR_ID SENSOR_ID(DT_NODELABEL(tcs3400_rgb)) +#define TCS_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(tcs3400_int))) /** How accurate comparision of rgb sensors should be */ -#define V_EPS 8 +#define V_EPS 8 /** Test initialization of light sensor driver and device */ ZTEST_USER(tcs3400, test_tcs_init) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); + struct i2c_common_emul_data *common_data = + emul_tcs3400_get_i2c_common_data(emul); - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; @@ -39,9 +40,11 @@ ZTEST_USER(tcs3400, test_tcs_init) zassert_equal(EC_SUCCESS, ms_rgb->drv->init(ms_rgb), NULL); /* Fail init on communication errors */ - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_FAIL_ALL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_FAIL_ALL_REG); zassert_equal(EC_ERROR_INVAL, ms->drv->init(ms), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Fail on bad ID */ tcs_emul_set_reg(emul, TCS_I2C_ID, 0); @@ -52,8 +55,8 @@ ZTEST_USER(tcs3400, test_tcs_init) /* Test successful init. ATIME and AGAIN should be changed on init */ zassert_equal(EC_SUCCESS, ms->drv->init(ms), NULL); - zassert_equal(TCS_DEFAULT_ATIME, - tcs_emul_get_reg(emul, TCS_I2C_ATIME), NULL); + zassert_equal(TCS_DEFAULT_ATIME, tcs_emul_get_reg(emul, TCS_I2C_ATIME), + NULL); zassert_equal(TCS_DEFAULT_AGAIN, tcs_emul_get_reg(emul, TCS_I2C_CONTROL), NULL); } @@ -62,21 +65,23 @@ ZTEST_USER(tcs3400, test_tcs_init) ZTEST_USER(tcs3400, test_tcs_read) { struct motion_sensor_t *ms; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); + struct i2c_common_emul_data *common_data = + emul_tcs3400_get_i2c_common_data(emul); uint8_t enable; intv3_t v; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; /* Test error on writing registers */ - i2c_common_emul_set_write_fail_reg(emul, TCS_I2C_ATIME); + i2c_common_emul_set_write_fail_reg(common_data, TCS_I2C_ATIME); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, v), NULL); - i2c_common_emul_set_write_fail_reg(emul, TCS_I2C_CONTROL); + i2c_common_emul_set_write_fail_reg(common_data, TCS_I2C_CONTROL); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, v), NULL); - i2c_common_emul_set_write_fail_reg(emul, TCS_I2C_ENABLE); + i2c_common_emul_set_write_fail_reg(common_data, TCS_I2C_ENABLE); zassert_equal(EC_ERROR_INVAL, ms->drv->read(ms, v), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test starting read with calibration */ tcs_emul_set_reg(emul, TCS_I2C_ATIME, 0); @@ -132,8 +137,7 @@ static void check_fifo_empty_f(struct motion_sensor_t *ms, } } } -#define check_fifo_empty(ms, ms_rgb) \ - check_fifo_empty_f(ms, ms_rgb, __LINE__) +#define check_fifo_empty(ms, ms_rgb) check_fifo_empty_f(ms, ms_rgb, __LINE__) /** * Test different conditions where irq handler fail or commit no data @@ -142,10 +146,11 @@ static void check_fifo_empty_f(struct motion_sensor_t *ms, ZTEST_USER(tcs3400, test_tcs_irq_handler_fail) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); + struct i2c_common_emul_data *common_data = + emul_tcs3400_get_i2c_common_data(emul); uint32_t event; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; @@ -157,15 +162,17 @@ ZTEST_USER(tcs3400, test_tcs_irq_handler_fail) event = TCS_INT_EVENT; /* Test error on reading status */ - i2c_common_emul_set_read_fail_reg(emul, TCS_I2C_STATUS); + i2c_common_emul_set_read_fail_reg(common_data, TCS_I2C_STATUS); zassert_equal(EC_ERROR_INVAL, ms->drv->irq_handler(ms, &event), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); check_fifo_empty(ms, ms_rgb); /* Test fail on changing device power state */ - i2c_common_emul_set_write_fail_reg(emul, TCS_I2C_ENABLE); + i2c_common_emul_set_write_fail_reg(common_data, TCS_I2C_ENABLE); zassert_equal(EC_ERROR_INVAL, ms->drv->irq_handler(ms, &event), NULL); - i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); check_fifo_empty(ms, ms_rgb); /* Test that no data is committed when status is 0 */ @@ -179,12 +186,12 @@ ZTEST_USER(tcs3400, test_tcs_irq_handler_fail) * expected value. */ static void check_fifo_f(struct motion_sensor_t *ms, - struct motion_sensor_t *ms_rgb, - int *exp_v, int eps, int line) + struct motion_sensor_t *ms_rgb, int *exp_v, int eps, + int line) { struct ec_response_motion_sensor_data vector; uint16_t size; - int ret_v[4] = {-1, -1, -1, -1}; + int ret_v[4] = { -1, -1, -1, -1 }; int i; /* Read all data committed to FIFO */ @@ -217,26 +224,26 @@ static void check_fifo_f(struct motion_sensor_t *ms, /* Compare with last committed data */ for (i = 0; i < 4; i++) { - zassert_within(exp_v[i], ret_v[i], eps, + zassert_within( + exp_v[i], ret_v[i], eps, "Expected [%d; %d; %d; %d], got [%d; %d; %d; %d]; line: %d", - exp_v[0], exp_v[1], exp_v[2], exp_v[3], - ret_v[0], ret_v[1], ret_v[2], ret_v[3], line); + exp_v[0], exp_v[1], exp_v[2], exp_v[3], ret_v[0], + ret_v[1], ret_v[2], ret_v[3], line); } } -#define check_fifo(ms, ms_rgb, exp_v, eps) \ +#define check_fifo(ms, ms_rgb, exp_v, eps) \ check_fifo_f(ms, ms_rgb, exp_v, eps, __LINE__) /** Test calibration mode reading of light sensor values */ ZTEST_USER(tcs3400, test_tcs_read_calibration) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); uint32_t event = TCS_INT_EVENT; int emul_v[4]; int exp_v[4]; intv3_t v; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; @@ -304,7 +311,7 @@ ZTEST_USER(tcs3400, test_tcs_read_calibration) * First element of expected vector is updated by this function. */ static void set_emul_val_from_exp(int *exp_v, uint16_t *scale, - struct i2c_emul *emul) + const struct emul *emul) { int emul_v[4]; int ir; @@ -342,31 +349,24 @@ static void set_emul_val_from_exp(int *exp_v, uint16_t *scale, ZTEST_USER(tcs3400, test_tcs_read_xyz) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); uint32_t event = TCS_INT_EVENT; /* Expected data to test: IR, R, G, B */ int exp_v[][4] = { - {200, 1110, 870, 850}, - {300, 1110, 10000, 8500}, - {600, 50000, 40000, 30000}, - {1000, 3000, 40000, 2000}, - {1000, 65000, 65000, 65000}, - {100, 214, 541, 516}, - {143, 2141, 5414, 5163}, - {100, 50000, 40000, 30000}, - {1430, 2141, 5414, 5163}, - {10000, 50000, 40000, 30000}, - {10000, 214, 541, 516}, - {15000, 50000, 40000, 30000}, - }; - uint16_t scale[4] = { - MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE + { 200, 1110, 870, 850 }, { 300, 1110, 10000, 8500 }, + { 600, 50000, 40000, 30000 }, { 1000, 3000, 40000, 2000 }, + { 1000, 65000, 65000, 65000 }, { 100, 214, 541, 516 }, + { 143, 2141, 5414, 5163 }, { 100, 50000, 40000, 30000 }, + { 1430, 2141, 5414, 5163 }, { 10000, 50000, 40000, 30000 }, + { 10000, 214, 541, 516 }, { 15000, 50000, 40000, 30000 }, }; + uint16_t scale[4] = { MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE }; int i, test; intv3_t v; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; @@ -420,45 +420,42 @@ ZTEST_USER(tcs3400, test_tcs_read_xyz) ZTEST_USER(tcs3400, test_tcs_scale) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); uint32_t event = TCS_INT_EVENT; /* Expected data to test: IR, R, G, B */ int exp_v[][4] = { - {200, 1110, 870, 850}, - {300, 1110, 10000, 8500}, - {600, 5000, 4000, 3000}, - {100, 3000, 4000, 2000}, - {100, 1000, 1000, 1000}, + { 200, 1110, 870, 850 }, { 300, 1110, 10000, 8500 }, + { 600, 5000, 4000, 3000 }, { 100, 3000, 4000, 2000 }, + { 100, 1000, 1000, 1000 }, }; /* Scale for each test */ uint16_t exp_scale[][4] = { - {MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE}, - {MOTION_SENSE_DEFAULT_SCALE + 300, - MOTION_SENSE_DEFAULT_SCALE + 300, - MOTION_SENSE_DEFAULT_SCALE + 300, - MOTION_SENSE_DEFAULT_SCALE + 300}, - {MOTION_SENSE_DEFAULT_SCALE - 300, - MOTION_SENSE_DEFAULT_SCALE - 300, - MOTION_SENSE_DEFAULT_SCALE - 300, - MOTION_SENSE_DEFAULT_SCALE - 300}, - {MOTION_SENSE_DEFAULT_SCALE + 345, - MOTION_SENSE_DEFAULT_SCALE - 5423, - MOTION_SENSE_DEFAULT_SCALE - 30, - MOTION_SENSE_DEFAULT_SCALE + 400}, - {MOTION_SENSE_DEFAULT_SCALE - 345, - MOTION_SENSE_DEFAULT_SCALE + 5423, - MOTION_SENSE_DEFAULT_SCALE + 30, - MOTION_SENSE_DEFAULT_SCALE - 400}, - {MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE, - MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE} + { MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE }, + { MOTION_SENSE_DEFAULT_SCALE + 300, + MOTION_SENSE_DEFAULT_SCALE + 300, + MOTION_SENSE_DEFAULT_SCALE + 300, + MOTION_SENSE_DEFAULT_SCALE + 300 }, + { MOTION_SENSE_DEFAULT_SCALE - 300, + MOTION_SENSE_DEFAULT_SCALE - 300, + MOTION_SENSE_DEFAULT_SCALE - 300, + MOTION_SENSE_DEFAULT_SCALE - 300 }, + { MOTION_SENSE_DEFAULT_SCALE + 345, + MOTION_SENSE_DEFAULT_SCALE - 5423, + MOTION_SENSE_DEFAULT_SCALE - 30, + MOTION_SENSE_DEFAULT_SCALE + 400 }, + { MOTION_SENSE_DEFAULT_SCALE - 345, + MOTION_SENSE_DEFAULT_SCALE + 5423, + MOTION_SENSE_DEFAULT_SCALE + 30, + MOTION_SENSE_DEFAULT_SCALE - 400 }, + { MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE, + MOTION_SENSE_DEFAULT_SCALE, MOTION_SENSE_DEFAULT_SCALE } }; uint16_t scale[3]; int16_t temp; int i, test; intv3_t v; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; @@ -476,16 +473,16 @@ ZTEST_USER(tcs3400, test_tcs_scale) zassert_equal(EC_SUCCESS, ms->drv->set_scale(ms, exp_scale[test], 0), "test %d", test); - zassert_equal(EC_SUCCESS, - ms->drv->get_scale(ms, scale, &temp), + zassert_equal(EC_SUCCESS, ms->drv->get_scale(ms, scale, &temp), "test %d", test); zassert_equal((int16_t)EC_MOTION_SENSE_INVALID_CALIB_TEMP, temp, "test %d, %d", test, temp); zassert_equal(exp_scale[test][0], scale[0], "test %d", test); /* Set and test RGB sensor scale */ - zassert_equal(EC_SUCCESS, ms_rgb->drv->set_scale(ms_rgb, - &(exp_scale[test][1]), 0), + zassert_equal(EC_SUCCESS, + ms_rgb->drv->set_scale(ms_rgb, + &(exp_scale[test][1]), 0), "test %d", test); zassert_equal(EC_SUCCESS, ms_rgb->drv->get_scale(ms_rgb, scale, &temp), @@ -532,21 +529,23 @@ ZTEST_USER(tcs3400, test_tcs_scale) ZTEST_USER(tcs3400, test_tcs_data_rate) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; + const struct emul *emul = EMUL_DT_GET(TCS_NODE); + struct i2c_common_emul_data *common_data = + emul_tcs3400_get_i2c_common_data(emul); uint8_t enable; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; /* RGB sensor doesn't set rate, but return rate of clear sesnor */ ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; /* Test fail on reading device power state */ - i2c_common_emul_set_read_fail_reg(emul, TCS_I2C_ENABLE); + i2c_common_emul_set_read_fail_reg(common_data, TCS_I2C_ENABLE); zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 0, 0), NULL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 0, 1), NULL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 100, 0), NULL); zassert_equal(EC_ERROR_INVAL, ms->drv->set_data_rate(ms, 100, 1), NULL); - i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_read_fail_reg(common_data, + I2C_COMMON_EMUL_NO_FAIL_REG); /* Test setting 0 rate disables device */ zassert_equal(EC_SUCCESS, ms->drv->set_data_rate(ms, 0, 0), NULL); @@ -560,7 +559,6 @@ ZTEST_USER(tcs3400, test_tcs_data_rate) zassert_equal(0, ms->drv->get_data_rate(ms), NULL); zassert_equal(0, ms_rgb->drv->get_data_rate(ms_rgb), NULL); - /* Test setting non-zero rate enables device */ zassert_equal(EC_SUCCESS, ms->drv->set_data_rate(ms, 100, 0), NULL); enable = tcs_emul_get_reg(emul, TCS_I2C_ENABLE); @@ -594,9 +592,7 @@ ZTEST_USER(tcs3400, test_tcs_data_rate) ZTEST_USER(tcs3400, test_tcs_set_range) { struct motion_sensor_t *ms, *ms_rgb; - struct i2c_emul *emul; - emul = tcs_emul_get(TCS_ORD); ms = &motion_sensors[TCS_CLR_SENSOR_ID]; ms_rgb = &motion_sensors[TCS_RGB_SENSOR_ID]; @@ -611,4 +607,35 @@ ZTEST_USER(tcs3400, test_tcs_set_range) zassert_equal(0x10000, ms->current_range, NULL); } -ZTEST_SUITE(tcs3400, drivers_predicate_post_main, NULL, NULL, NULL, NULL); +struct tcs3400_test_fixture { + struct als_drv_data_t drv_data; + struct tcs3400_rgb_drv_data_t rgb_drv_data; +}; + +static void tcs3400_before(void *state) +{ + struct tcs3400_test_fixture *f = state; + + f->drv_data = *TCS3400_DRV_DATA(&motion_sensors[TCS_CLR_SENSOR_ID]); + f->rgb_drv_data = + *TCS3400_RGB_DRV_DATA(&motion_sensors[TCS_RGB_SENSOR_ID]); +} + +static void tcs3400_after(void *state) +{ + struct tcs3400_test_fixture *f = state; + + *TCS3400_DRV_DATA(&motion_sensors[TCS_CLR_SENSOR_ID]) = f->drv_data; + *TCS3400_RGB_DRV_DATA(&motion_sensors[TCS_RGB_SENSOR_ID]) = + f->rgb_drv_data; +} + +static void *tcs3400_setup(void) +{ + static struct tcs3400_test_fixture tcs3400_fixture = { 0 }; + + return &tcs3400_fixture; +} + +ZTEST_SUITE(tcs3400, drivers_predicate_post_main, tcs3400_setup, tcs3400_before, + tcs3400_after, NULL); diff --git a/zephyr/test/drivers/src/temp_sensor.c b/zephyr/test/drivers/default/src/temp_sensor.c index 1a49dba8ca..5caecc556c 100644 --- a/zephyr/test/drivers/src/temp_sensor.c +++ b/zephyr/test/drivers/default/src/temp_sensor.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/adc.h> #include <zephyr/drivers/adc/adc_emul.h> #include <zephyr/drivers/gpio.h> @@ -20,17 +20,19 @@ #define GPIO_PG_EC_DSW_PWROK_PATH DT_PATH(named_gpios, pg_ec_dsw_pwrok) #define GPIO_PG_EC_DSW_PWROK_PORT DT_GPIO_PIN(GPIO_PG_EC_DSW_PWROK_PATH, gpios) -#define ADC_DEVICE_NODE DT_NODELABEL(adc0) -#define ADC_CHANNELS_NUM DT_PROP(DT_NODELABEL(adc0), nchannels) +#define GPIO_EC_PG_PIN_TEMP_PATH DT_PATH(named_gpios, ec_pg_pin_temp) +#define GPIO_EC_PG_PIN_TEMP_PORT DT_GPIO_PIN(GPIO_EC_PG_PIN_TEMP_PATH, gpios) + +#define ADC_DEVICE_NODE DT_NODELABEL(adc0) +#define ADC_CHANNELS_NUM DT_PROP(DT_NODELABEL(adc0), nchannels) /** Test error code when invalid sensor is passed to temp_sensor_read() */ ZTEST_USER(temp_sensor, test_temp_sensor_wrong_id) { int temp; - zassert_equal(EC_ERROR_INVAL, temp_sensor_read(TEMP_SENSOR_COUNT, - &temp), - NULL); + zassert_equal(EC_ERROR_INVAL, + temp_sensor_read(TEMP_SENSOR_COUNT, &temp), NULL); } /** Test error code when temp_sensor_read() is called with powered off ADC */ @@ -50,13 +52,24 @@ ZTEST_USER(temp_sensor, test_temp_sensor_adc_error) NULL); zassert_equal(EC_ERROR_NOT_POWERED, - temp_sensor_read(TEMP_SENSOR_CHARGER, &temp), NULL); - zassert_equal(EC_ERROR_NOT_POWERED, - temp_sensor_read(TEMP_SENSOR_DDR_SOC, &temp), NULL); + temp_sensor_read( + TEMP_SENSOR_ID(DT_NODELABEL(named_temp_charger)), + &temp), + NULL); zassert_equal(EC_ERROR_NOT_POWERED, - temp_sensor_read(TEMP_SENSOR_FAN, &temp), NULL); + temp_sensor_read( + TEMP_SENSOR_ID(DT_NODELABEL(named_temp_ddr_soc)), + &temp), + NULL); + zassert_equal( + EC_ERROR_NOT_POWERED, + temp_sensor_read(TEMP_SENSOR_ID(DT_NODELABEL(named_temp_fan)), + &temp), + NULL); zassert_equal(EC_ERROR_NOT_POWERED, - temp_sensor_read(TEMP_SENSOR_PP3300_REGULATOR, &temp), + temp_sensor_read(TEMP_SENSOR_ID(DT_NODELABEL( + named_temp_pp3300_regulator)), + &temp), NULL); /* power ADC */ @@ -64,6 +77,45 @@ ZTEST_USER(temp_sensor, test_temp_sensor_adc_error) NULL); } +/** Test error code when temp_sensor_read() is called power-good-pin low */ +ZTEST_USER(temp_sensor, test_temp_sensor_pg_pin) +{ + const struct device *gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_EC_PG_PIN_TEMP_PATH, gpios)); + int temp; + + zassert_not_null(gpio_dev, "Cannot get GPIO device"); + + /* ec_pg_pin_temp = 0 means temperature sensors are not powered. */ + zassert_ok(gpio_emul_input_set(gpio_dev, GPIO_EC_PG_PIN_TEMP_PORT, 0), + NULL); + + zassert_equal(EC_ERROR_NOT_POWERED, + temp_sensor_read( + TEMP_SENSOR_ID(DT_NODELABEL(named_temp_charger)), + &temp), + NULL); + zassert_equal(EC_ERROR_NOT_POWERED, + temp_sensor_read( + TEMP_SENSOR_ID(DT_NODELABEL(named_temp_ddr_soc)), + &temp), + NULL); + zassert_equal( + EC_ERROR_NOT_POWERED, + temp_sensor_read(TEMP_SENSOR_ID(DT_NODELABEL(named_temp_fan)), + &temp), + NULL); + zassert_equal(EC_ERROR_NOT_POWERED, + temp_sensor_read(TEMP_SENSOR_ID(DT_NODELABEL( + named_temp_pp3300_regulator)), + &temp), + NULL); + + /* power ADC */ + zassert_ok(gpio_emul_input_set(gpio_dev, GPIO_EC_PG_PIN_TEMP_PORT, 1), + NULL); +} + /** Simple ADC emulator custom function which always return error */ static int adc_error_func(const struct device *dev, unsigned int channel, void *param, uint32_t *result) @@ -85,9 +137,10 @@ static void check_valid_temperature(const struct device *adc_dev, int sensor) 1000), "adc_emul_const_value_set() failed (sensor %d)", sensor); zassert_equal(EC_SUCCESS, temp_sensor_read(sensor, &temp), NULL); - zassert_within(temp, 273 + 50, 51, - "Expected temperature in 0*C-100*C, got %d*C (sensor %d)", - temp - 273, sensor); + zassert_within( + temp, 273 + 50, 51, + "Expected temperature in 0*C-100*C, got %d*C (sensor %d)", + temp - 273, sensor); /* Return error on ADC channel of tested sensor */ zassert_ok(adc_emul_value_func_set(adc_dev, temp_sensors[sensor].idx, adc_error_func, NULL), @@ -105,14 +158,18 @@ ZTEST_USER(temp_sensor, test_temp_sensor_read) /* Return error on all ADC channels */ for (chan = 0; chan < ADC_CHANNELS_NUM; chan++) { zassert_ok(adc_emul_value_func_set(adc_dev, chan, - adc_error_func, NULL), + adc_error_func, NULL), "channel %d adc_emul_value_func_set() failed", chan); } - check_valid_temperature(adc_dev, TEMP_SENSOR_CHARGER); - check_valid_temperature(adc_dev, TEMP_SENSOR_DDR_SOC); - check_valid_temperature(adc_dev, TEMP_SENSOR_FAN); - check_valid_temperature(adc_dev, TEMP_SENSOR_PP3300_REGULATOR); + check_valid_temperature( + adc_dev, TEMP_SENSOR_ID(DT_NODELABEL(named_temp_charger))); + check_valid_temperature( + adc_dev, TEMP_SENSOR_ID(DT_NODELABEL(named_temp_ddr_soc))); + check_valid_temperature(adc_dev, + TEMP_SENSOR_ID(DT_NODELABEL(named_temp_fan))); + check_valid_temperature(adc_dev, TEMP_SENSOR_ID(DT_NODELABEL( + named_temp_pp3300_regulator))); /* Return correct value on all ADC channels */ for (chan = 0; chan < ADC_CHANNELS_NUM; chan++) { @@ -126,11 +183,15 @@ static void *temp_sensor_setup(void) { const struct device *dev = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_PG_EC_DSW_PWROK_PATH, gpios)); + const struct device *dev_pin = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_EC_PG_PIN_TEMP_PATH, gpios)); zassert_not_null(dev, NULL); - /* Before tests make sure that power pin is set. */ + /* Before tests make sure that power pins are set. */ zassert_ok(gpio_emul_input_set(dev, GPIO_PG_EC_DSW_PWROK_PORT, 1), NULL); + zassert_ok(gpio_emul_input_set(dev_pin, GPIO_EC_PG_PIN_TEMP_PORT, 1), + NULL); return NULL; } diff --git a/zephyr/test/drivers/src/thermistor.c b/zephyr/test/drivers/default/src/thermistor.c index e760e0cf33..417b482d99 100644 --- a/zephyr/test/drivers/src/thermistor.c +++ b/zephyr/test/drivers/default/src/thermistor.c @@ -1,10 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/adc.h> #include <zephyr/drivers/adc/adc_emul.h> #include <zephyr/drivers/gpio.h> @@ -16,24 +16,25 @@ #include "temp_sensor/temp_sensor.h" #include "test/drivers/test_state.h" - #define GPIO_PG_EC_DSW_PWROK_PATH DT_PATH(named_gpios, pg_ec_dsw_pwrok) #define GPIO_PG_EC_DSW_PWROK_PORT DT_GPIO_PIN(GPIO_PG_EC_DSW_PWROK_PATH, gpios) -#define ADC_DEVICE_NODE DT_NODELABEL(adc0) +#define GPIO_EC_PG_PIN_TEMP_PATH DT_PATH(named_gpios, ec_pg_pin_temp) +#define GPIO_EC_PG_PIN_TEMP_PORT DT_GPIO_PIN(GPIO_EC_PG_PIN_TEMP_PATH, gpios) + +#define ADC_DEVICE_NODE DT_NODELABEL(adc0) /* TODO replace counting macros with DT macro when * https://github.com/zephyrproject-rtos/zephyr/issues/38715 lands */ -#define _ACCUMULATOR(x) -#define NAMED_TEMP_SENSORS_SIZE \ - DT_FOREACH_CHILD(DT_PATH(named_temp_sensors), _ACCUMULATOR) \ - 0 -#define TEMP_SENSORS_ENABLED_SIZE \ - DT_FOREACH_STATUS_OKAY(cros_ec_temp_sensor, _ACCUMULATOR) 0 +#define _ACCUMULATOR(x) 1 + +#define NAMED_TEMP_SENSORS_SIZE \ + DT_FOREACH_CHILD(TEMP_SENSORS_NODEID, _ACCUMULATOR) 0 + +#define TEMP_SENSORS_ENABLED_SIZE FOREACH_TEMP_SENSOR(_ACCUMULATOR) 0 /* Conversion of temperature doesn't need to be 100% accurate */ -#define TEMP_EPS 2 +#define TEMP_EPS 2 #define A_VALID_VOLTAGE 1000 /** @@ -57,9 +58,8 @@ ZTEST_USER(thermistor, test_thermistor_power_pin) sensor_idx++) { const struct temp_sensor_t *sensor = &temp_sensors[sensor_idx]; - zassert_ok(adc_emul_const_value_set(adc_dev, - sensor->idx, - A_VALID_VOLTAGE), + zassert_ok(adc_emul_const_value_set(adc_dev, sensor->idx, + A_VALID_VOLTAGE), "adc_emul_value_func_set() failed on %s", sensor->name); } @@ -135,26 +135,26 @@ static int resistance_47kohm_B4050(int t) /* Thermistor manufacturer resistance lookup table*/ int r_table[] = { 155700, 147900, 140600, 133700, 127200, /* 0*C - 4*C */ - 121000, 115100, 109600, 104300, 99310, /* 5*C - 9*C */ - 94600, 90130, 85890, 81870, 78070, /* 10*C - 14*C */ - 74450, 71020, 67770, 64680, 61750, /* 15*C - 19*C */ - 58970, 56320, 53810, 51430, 49160, /* 20*C - 24*C */ - 47000, 44950, 42990, 41130, 39360, /* 25*C - 29*C */ - 37680, 36070, 34540, 33080, 31690, /* 30*C - 34*C */ - 30360, 29100, 27900, 26750, 25650, /* 35*C - 39*C */ - 24610, 23610, 22660, 21750, 20880, /* 40*C - 44*C */ - 20050, 19260, 18500, 17780, 17090, /* 45*C - 49*C */ - 16430, 15800, 15200, 14620, 14070, /* 50*C - 54*C */ - 13540, 13030, 12550, 12090, 11640, /* 55*C - 59*C */ - 11210, 10800, 10410, 10040, 9676, /* 60*C - 64*C */ - 9331, 8999, 8680, 8374, 8081, /* 65*C - 69*C */ - 7799, 7528, 7268, 7018, 6777, /* 70*C - 74*C */ - 6546, 6324, 6111, 5906, 5708, /* 75*C - 79*C */ - 5518, 5335, 5160, 4990, 4827, /* 80*C - 84*C */ - 4671, 4519, 4374, 4233, 4098, /* 85*C - 89*C */ - 3968, 3842, 3721, 3605, 3492, /* 90*C - 94*C */ - 3384, 3279, 3179, 3082, 2988, /* 95*C - 99*C */ - 2898 /* 100*C */ + 121000, 115100, 109600, 104300, 99310, /* 5*C - 9*C */ + 94600, 90130, 85890, 81870, 78070, /* 10*C - 14*C */ + 74450, 71020, 67770, 64680, 61750, /* 15*C - 19*C */ + 58970, 56320, 53810, 51430, 49160, /* 20*C - 24*C */ + 47000, 44950, 42990, 41130, 39360, /* 25*C - 29*C */ + 37680, 36070, 34540, 33080, 31690, /* 30*C - 34*C */ + 30360, 29100, 27900, 26750, 25650, /* 35*C - 39*C */ + 24610, 23610, 22660, 21750, 20880, /* 40*C - 44*C */ + 20050, 19260, 18500, 17780, 17090, /* 45*C - 49*C */ + 16430, 15800, 15200, 14620, 14070, /* 50*C - 54*C */ + 13540, 13030, 12550, 12090, 11640, /* 55*C - 59*C */ + 11210, 10800, 10410, 10040, 9676, /* 60*C - 64*C */ + 9331, 8999, 8680, 8374, 8081, /* 65*C - 69*C */ + 7799, 7528, 7268, 7018, 6777, /* 70*C - 74*C */ + 6546, 6324, 6111, 5906, 5708, /* 75*C - 79*C */ + 5518, 5335, 5160, 4990, 4827, /* 80*C - 84*C */ + 4671, 4519, 4374, 4233, 4098, /* 85*C - 89*C */ + 3968, 3842, 3721, 3605, 3492, /* 90*C - 94*C */ + 3384, 3279, 3179, 3082, 2988, /* 95*C - 99*C */ + 2898 /* 100*C */ }; t -= 273; @@ -188,8 +188,7 @@ static int adc_temperature_func(const struct device *dev, unsigned int channel, { struct thermistor_state *s = (struct thermistor_state *)param; - *result = volt_divider(s->v, - s->r, + *result = volt_divider(s->v, s->r, resistance_47kohm_B4050(s->temp_expected)); return 0; @@ -211,8 +210,7 @@ static void do_thermistor_test(const struct temp_sensor_t *temp_sensor, zassert_not_null(adc_dev, "Cannot get ADC device"); /* Setup ADC channel */ - zassert_ok(adc_emul_value_func_set(adc_dev, - temp_sensor->idx, + zassert_ok(adc_emul_value_func_set(adc_dev, temp_sensor->idx, adc_temperature_func, &state), "adc_emul_value_func_set() failed on %s", temp_sensor->name); @@ -225,8 +223,9 @@ static void do_thermistor_test(const struct temp_sensor_t *temp_sensor, for (temp_expected = 273; temp_expected <= 373; temp_expected++) { state.temp_expected = temp_expected; zassert_equal(EC_SUCCESS, - temp_sensor->zephyr_info->read(temp_sensor, &temp), - "failed on %s", temp_sensor->name); + temp_sensor->zephyr_info->read(temp_sensor, + &temp), + "failed on %s", temp_sensor->name); zassert_within(temp_expected, temp, TEMP_EPS, "Expected %d*K, got %d*K on %s", temp_expected, temp, temp_sensor->name); @@ -249,12 +248,12 @@ static void do_thermistor_test(const struct temp_sensor_t *temp_sensor, temp_sensor->name); } -#define GET_THERMISTOR_REF_MV(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = DT_PROP( \ +#define GET_THERMISTOR_REF_MV(node_id) \ + [TEMP_SENSOR_ID_BY_DEV(node_id)] = DT_PROP( \ DT_PHANDLE(node_id, thermistor), steinhart_reference_mv), -#define GET_THERMISTOR_REF_RES(node_id) \ - [ZSHIM_TEMP_SENSOR_ID(node_id)] = DT_PROP( \ +#define GET_THERMISTOR_REF_RES(node_id) \ + [TEMP_SENSOR_ID_BY_DEV(node_id)] = DT_PROP( \ DT_PHANDLE(node_id, thermistor), steinhart_reference_res), ZTEST_USER(thermistor, test_thermistors_adc_temperature_conversion) @@ -262,9 +261,9 @@ ZTEST_USER(thermistor, test_thermistors_adc_temperature_conversion) int sensor_idx; const static int reference_mv_arr[] = { DT_FOREACH_STATUS_OKAY( - cros_temp_sensor, GET_THERMISTOR_REF_MV) }; + THERMISTOR_COMPAT, GET_THERMISTOR_REF_MV) }; const static int reference_res_arr[] = { DT_FOREACH_STATUS_OKAY( - cros_temp_sensor, GET_THERMISTOR_REF_RES) }; + THERMISTOR_COMPAT, GET_THERMISTOR_REF_RES) }; for (sensor_idx = 0; sensor_idx < NAMED_TEMP_SENSORS_SIZE; sensor_idx++) do_thermistor_test(&temp_sensors[sensor_idx], @@ -285,14 +284,44 @@ static void *thermistor_setup(void) { const struct device *dev = DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_PG_EC_DSW_PWROK_PATH, gpios)); + const struct device *dev_pin = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_EC_PG_PIN_TEMP_PATH, gpios)); zassert_not_null(dev, NULL); - /* Before tests make sure that power pin is set. */ + /* Before tests make sure that power pins are set. */ zassert_ok(gpio_emul_input_set(dev, GPIO_PG_EC_DSW_PWROK_PORT, 1), NULL); + zassert_ok(gpio_emul_input_set(dev_pin, GPIO_EC_PG_PIN_TEMP_PORT, 1), + NULL); return NULL; } +static void thermistor_cleanup(void *state) +{ + int sensor_idx; + const struct device *adc_dev = DEVICE_DT_GET(ADC_DEVICE_NODE); + + const static int reference_mv_arr[] = { DT_FOREACH_STATUS_OKAY( + THERMISTOR_COMPAT, GET_THERMISTOR_REF_MV) }; + const static int reference_res_arr[] = { DT_FOREACH_STATUS_OKAY( + THERMISTOR_COMPAT, GET_THERMISTOR_REF_RES) }; + + if (adc_dev == NULL) + TC_ERROR("Cannot get ADC device"); + + for (sensor_idx = 0; sensor_idx < NAMED_TEMP_SENSORS_SIZE; + sensor_idx++) { + /* Setup ADC to return 27*C (300K) which is reasonable value */ + adc_emul_const_value_set( + adc_dev, temp_sensors[sensor_idx].idx, + volt_divider(reference_mv_arr[sensor_idx], + reference_res_arr[sensor_idx], + resistance_47kohm_B4050(300))); + adc_emul_ref_voltage_set(adc_dev, ADC_REF_INTERNAL, + reference_mv_arr[sensor_idx]); + } +} + ZTEST_SUITE(thermistor, drivers_predicate_post_main, thermistor_setup, NULL, - NULL, NULL); + NULL, thermistor_cleanup); diff --git a/zephyr/test/drivers/src/uart_hostcmd.c b/zephyr/test/drivers/default/src/uart_hostcmd.c index 0e68c440ce..879e734837 100644 --- a/zephyr/test/drivers/src/uart_hostcmd.c +++ b/zephyr/test/drivers/default/src/uart_hostcmd.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "console.h" #include "host_command.h" @@ -86,8 +86,8 @@ static void test_uart_hc_read_next(int ver) */ msg1_start = response + read_args.response_size - 1 - MSG_LEN(msg1); zassert_mem_equal(msg1, msg1_start, MSG_LEN(msg1), - "expected \"%s\", got \"%.*s\"", - msg1, MSG_LEN(msg1), msg1_start); + "expected \"%s\", got \"%.*s\"", msg1, MSG_LEN(msg1), + msg1_start); /* Set new snapshot which should include message 2 */ zassert_equal(EC_RES_SUCCESS, host_command_process(&snap_args), NULL); @@ -106,11 +106,11 @@ static void test_uart_hc_read_next(int ver) msg2_start = response + read_args.response_size - 1 - MSG_LEN(msg2); msg1_start = msg2_start - MSG_LEN(msg1); zassert_mem_equal(msg2, msg2_start, MSG_LEN(msg2), - "expected \"%s\", got \"%.*s\"", - msg2, MSG_LEN(msg2), msg2_start); + "expected \"%s\", got \"%.*s\"", msg2, MSG_LEN(msg2), + msg2_start); zassert_mem_equal(msg1, msg1_start, MSG_LEN(msg1), - "expected \"%s\", got \"%.*s\"", - msg1, MSG_LEN(msg1), msg1_start); + "expected \"%s\", got \"%.*s\"", msg1, MSG_LEN(msg1), + msg1_start); /* Append third message */ cputs(CC_COMMAND, msg3); @@ -135,14 +135,14 @@ static void test_uart_hc_read_next(int ver) msg2_start = msg3_start - MSG_LEN(msg2); msg1_start = msg2_start - MSG_LEN(msg1); zassert_mem_equal(msg3, msg3_start, MSG_LEN(msg3), - "expected \"%s\", got \"%.*s\"", - msg3, MSG_LEN(msg3), msg3_start); + "expected \"%s\", got \"%.*s\"", msg3, MSG_LEN(msg3), + msg3_start); zassert_mem_equal(msg2, msg2_start, MSG_LEN(msg2), - "expected \"%s\", got \"%.*s\"", - msg2, MSG_LEN(msg2), msg2_start); + "expected \"%s\", got \"%.*s\"", msg2, MSG_LEN(msg2), + msg2_start); zassert_mem_equal(msg1, msg1_start, MSG_LEN(msg1), - "expected \"%s\", got \"%.*s\"", - msg1, MSG_LEN(msg1), msg1_start); + "expected \"%s\", got \"%.*s\"", msg1, MSG_LEN(msg1), + msg1_start); } ZTEST_USER(uart_hostcmd, test_uart_hc_read_next_v0) @@ -176,11 +176,11 @@ ZTEST_USER(uart_hostcmd, test_uart_hc_read_recent_v1) response[read_args.response_size]); /* Account additional NULL char at the end */ zassert_equal(MSG_LEN(msg1) + 1, read_args.response_size, - "expected message length %d, got %d", - MSG_LEN(msg1) + 1, read_args.response_size); + "expected message length %d, got %d", MSG_LEN(msg1) + 1, + read_args.response_size); zassert_mem_equal(msg1, response, MSG_LEN(msg1), - "expected \"%s\", got \"%.*s\"", - msg1, MSG_LEN(msg1), response); + "expected \"%s\", got \"%.*s\"", msg1, MSG_LEN(msg1), + response); /* Set new snapshot after second message */ zassert_equal(EC_RES_SUCCESS, host_command_process(&snap_args), NULL); @@ -193,11 +193,11 @@ ZTEST_USER(uart_hostcmd, test_uart_hc_read_recent_v1) response[read_args.response_size]); /* Account additional NULL char at the end */ zassert_equal(MSG_LEN(msg2) + 1, read_args.response_size, - "expected message length %d, got %d", - MSG_LEN(msg2) + 1, read_args.response_size); + "expected message length %d, got %d", MSG_LEN(msg2) + 1, + read_args.response_size); zassert_mem_equal(msg2, response, MSG_LEN(msg2), - "expected \"%s\", got \"%.*s\"", - msg2, MSG_LEN(msg2), response); + "expected \"%s\", got \"%.*s\"", msg2, MSG_LEN(msg2), + response); /* Append third message */ cputs(CC_COMMAND, msg3); @@ -220,11 +220,11 @@ ZTEST_USER(uart_hostcmd, test_uart_hc_read_recent_v1) response[read_args.response_size]); /* Account additional NULL char at the end */ zassert_equal(MSG_LEN(msg3) + 1, read_args.response_size, - "expected message length %d, got %d", - MSG_LEN(msg3) + 1, read_args.response_size); + "expected message length %d, got %d", MSG_LEN(msg3) + 1, + read_args.response_size); zassert_mem_equal(msg3, response, MSG_LEN(msg3), - "expected \"%s\", got \"%.*s\"", - msg3, MSG_LEN(msg3), response); + "expected \"%s\", got \"%.*s\"", msg3, MSG_LEN(msg3), + response); } ZTEST_SUITE(uart_hostcmd, drivers_predicate_post_main, NULL, diff --git a/zephyr/test/drivers/src/usb_mux.c b/zephyr/test/drivers/default/src/usb_mux.c index 09aa3c47d6..45b81d6ea5 100644 --- a/zephyr/test/drivers/src/usb_mux.c +++ b/zephyr/test/drivers/default/src/usb_mux.c @@ -1,11 +1,10 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/kernel.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include <zephyr/drivers/gpio.h> #include <zephyr/drivers/gpio/gpio_emul.h> #include <zephyr/shell/shell.h> @@ -14,7 +13,7 @@ #include "common.h" #include "ec_commands.h" #include "ec_tasks.h" -#include "fff.h" +#include <zephyr/fff.h> #include "hooks.h" #include "host_command.h" #include "i2c.h" @@ -30,16 +29,16 @@ #include "test/drivers/utils.h" /** Copy of original usb_muxes[USB_PORT_C1] */ -struct usb_mux usb_mux_c1; +struct usb_mux_chain usb_mux_c1; /** Number of usb mux proxies in chain */ -#define NUM_OF_PROXY 3 +#define NUM_OF_PROXY 3 /** Pointers to original usb muxes chain of port c1 */ const struct usb_mux *org_mux[NUM_OF_PROXY]; /** Proxy function which check calls from usb_mux framework to driver */ -FAKE_VALUE_FUNC1(int, proxy_init, const struct usb_mux *); +FAKE_VALUE_FUNC(int, proxy_init, const struct usb_mux *); static int proxy_init_custom(const struct usb_mux *me) { int i = me->i2c_addr_flags; @@ -47,8 +46,7 @@ static int proxy_init_custom(const struct usb_mux *me) zassert_true(i < NUM_OF_PROXY, "Proxy called for non proxy usb_mux"); - if (org_mux[i] != NULL && - org_mux[i]->driver->init != NULL) { + if (org_mux[i] != NULL && org_mux[i]->driver->init != NULL) { ec = org_mux[i]->driver->init(org_mux[i]); } @@ -63,7 +61,7 @@ static int proxy_init_custom(const struct usb_mux *me) } /** Proxy function which check calls from usb_mux framework to driver */ -FAKE_VALUE_FUNC3(int, proxy_set, const struct usb_mux *, mux_state_t, bool *); +FAKE_VALUE_FUNC(int, proxy_set, const struct usb_mux *, mux_state_t, bool *); static int proxy_set_custom(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { @@ -72,10 +70,11 @@ static int proxy_set_custom(const struct usb_mux *me, mux_state_t mux_state, zassert_true(i < NUM_OF_PROXY, "Proxy called for non proxy usb_mux"); - if (org_mux[i] != NULL && - org_mux[i]->driver->set != NULL) { + if (org_mux[i] != NULL && org_mux[i]->driver->set != NULL) { ec = org_mux[i]->driver->set(org_mux[i], mux_state, ack_required); + /* Disable waiting for ACK in tests */ + *ack_required = false; } if (task_get_current() == TASK_ID_TEST_RUNNER) { @@ -89,7 +88,7 @@ static int proxy_set_custom(const struct usb_mux *me, mux_state_t mux_state, } /** Proxy function which check calls from usb_mux framework to driver */ -FAKE_VALUE_FUNC2(int, proxy_get, const struct usb_mux *, mux_state_t *); +FAKE_VALUE_FUNC(int, proxy_get, const struct usb_mux *, mux_state_t *); /** Sequence of mux_state values returned by proxy_get function */ static mux_state_t proxy_get_mux_state_seq[NUM_OF_PROXY]; /** Index of next mux_state to return from proxy_get_function */ @@ -110,15 +109,15 @@ static int proxy_get_custom(const struct usb_mux *me, mux_state_t *mux_state) zassert_true(i < NUM_OF_PROXY, "Proxy called for non proxy usb_mux"); - if (org_mux[i] != NULL && - org_mux[i]->driver->get != NULL) { + if (org_mux[i] != NULL && org_mux[i]->driver->get != NULL) { ec = org_mux[i]->driver->get(org_mux[i], mux_state); } if (task_get_current() == TASK_ID_TEST_RUNNER) { zassert_true(proxy_get_mux_state_seq_idx < NUM_OF_PROXY, "%s called too many times without resetting " - "mux_state_seq", __func__); + "mux_state_seq", + __func__); *mux_state = proxy_get_mux_state_seq[proxy_get_mux_state_seq_idx]; proxy_get_mux_state_seq_idx++; @@ -132,7 +131,7 @@ static int proxy_get_custom(const struct usb_mux *me, mux_state_t *mux_state) } /** Proxy function which check calls from usb_mux framework to driver */ -FAKE_VALUE_FUNC1(int, proxy_enter_low_power_mode, const struct usb_mux *); +FAKE_VALUE_FUNC(int, proxy_enter_low_power_mode, const struct usb_mux *); static int proxy_enter_low_power_mode_custom(const struct usb_mux *me) { int i = me->i2c_addr_flags; @@ -156,7 +155,7 @@ static int proxy_enter_low_power_mode_custom(const struct usb_mux *me) } /** Proxy function which check calls from usb_mux framework to driver */ -FAKE_VALUE_FUNC1(int, proxy_chipset_reset, const struct usb_mux *); +FAKE_VALUE_FUNC(int, proxy_chipset_reset, const struct usb_mux *); static int proxy_chipset_reset_custom(const struct usb_mux *me) { int i = me->i2c_addr_flags; @@ -164,8 +163,7 @@ static int proxy_chipset_reset_custom(const struct usb_mux *me) zassert_true(i < NUM_OF_PROXY, "Proxy called for non proxy usb_mux"); - if (org_mux[i] != NULL && - org_mux[i]->driver->chipset_reset != NULL) { + if (org_mux[i] != NULL && org_mux[i]->driver->chipset_reset != NULL) { ec = org_mux[i]->driver->chipset_reset(org_mux[i]); } @@ -186,7 +184,7 @@ static bool proxy_fw_update_cap(void) } /** Proxy function which check calls from usb_mux framework to driver */ -FAKE_VOID_FUNC3(proxy_hpd_update, const struct usb_mux *, mux_state_t, bool *); +FAKE_VOID_FUNC(proxy_hpd_update, const struct usb_mux *, mux_state_t, bool *); static void proxy_hpd_update_custom(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { @@ -194,9 +192,10 @@ static void proxy_hpd_update_custom(const struct usb_mux *me, zassert_true(i < NUM_OF_PROXY, "Proxy called for non proxy usb_mux"); - if (org_mux[i] != NULL && - org_mux[i]->hpd_update != NULL) { + if (org_mux[i] != NULL && org_mux[i]->hpd_update != NULL) { org_mux[i]->hpd_update(org_mux[i], mux_state, ack_required); + /* Disable waiting for ACK in tests */ + *ack_required = false; } if (task_get_current() != TASK_ID_TEST_RUNNER) { @@ -216,7 +215,7 @@ const struct usb_mux_driver proxy_usb_mux = { }; /** Mock function used in init test */ -FAKE_VALUE_FUNC1(int, mock_board_init, const struct usb_mux *); +FAKE_VALUE_FUNC(int, mock_board_init, const struct usb_mux *); static int mock_board_init_custom(const struct usb_mux *me) { if (task_get_current() == TASK_ID_TEST_RUNNER) { @@ -230,7 +229,7 @@ static int mock_board_init_custom(const struct usb_mux *me) } /** Mock function used in set test */ -FAKE_VALUE_FUNC2(int, mock_board_set, const struct usb_mux *, mux_state_t); +FAKE_VALUE_FUNC(int, mock_board_set, const struct usb_mux *, mux_state_t); static int mock_board_set_custom(const struct usb_mux *me, mux_state_t mux_state) { @@ -264,7 +263,7 @@ static void reset_proxy_fakes(void) proxy_set_fake.custom_fake = proxy_set_custom; proxy_get_fake.custom_fake = proxy_get_custom; proxy_enter_low_power_mode_fake.custom_fake = - proxy_enter_low_power_mode_custom; + proxy_enter_low_power_mode_custom; proxy_chipset_reset_fake.custom_fake = proxy_chipset_reset_custom; proxy_hpd_update_fake.custom_fake = proxy_hpd_update_custom; mock_board_init_fake.custom_fake = mock_board_init_custom; @@ -281,40 +280,51 @@ static void reset_proxy_fakes(void) } /** Chain of 3 proxy usb muxes */ -struct usb_mux proxy_chain_2 = { +struct usb_mux proxy_mux_2 = { .usb_port = USBC_PORT_C1, .driver = &proxy_usb_mux, - .next_mux = NULL, .i2c_addr_flags = 2, .hpd_update = &proxy_hpd_update, }; -struct usb_mux proxy_chain_1 = { +struct usb_mux_chain proxy_chain_2 = { + .mux = &proxy_mux_2, +}; + +struct usb_mux proxy_mux_1 = { .usb_port = USBC_PORT_C1, .driver = &proxy_usb_mux, - .next_mux = &proxy_chain_2, .i2c_addr_flags = 1, .hpd_update = &proxy_hpd_update, }; -struct usb_mux proxy_chain_0 = { +struct usb_mux_chain proxy_chain_1 = { + .mux = &proxy_mux_1, + .next = &proxy_chain_2, +}; + +struct usb_mux proxy_mux_0 = { .usb_port = USBC_PORT_C1, .driver = &proxy_usb_mux, - .next_mux = &proxy_chain_1, .i2c_addr_flags = 0, .hpd_update = &proxy_hpd_update, }; +struct usb_mux_chain proxy_chain_0 = { + .mux = &proxy_mux_0, + .next = &proxy_chain_1, +}; /** Setup first 3 usb muxes of port 1 with proxy */ static void setup_usb_mux_proxy_chain(void) { - const struct usb_mux *t; + const struct usb_mux_chain *t; int i; - memcpy(&usb_mux_c1, &usb_muxes[USBC_PORT_C1], sizeof(struct usb_mux)); + memcpy(&usb_mux_c1, &usb_muxes[USBC_PORT_C1], + sizeof(struct usb_mux_chain)); memcpy(&usb_muxes[USBC_PORT_C1], &proxy_chain_0, - sizeof(struct usb_mux)); + sizeof(struct usb_mux_chain)); /* * Setup org_mux array to point real driver which should be called by @@ -322,23 +332,31 @@ static void setup_usb_mux_proxy_chain(void) */ t = &usb_mux_c1; for (i = 0; i < NUM_OF_PROXY; i++) { - org_mux[i] = t; if (t != NULL) { - t = t->next_mux; + org_mux[i] = t->mux; + t = t->next; + } else { + org_mux[i] = NULL; } } - if (org_mux[2] != NULL) { - proxy_chain_2.next_mux = org_mux[2]->next_mux; + if (t != NULL) { + proxy_chain_2.next = t; } else { - proxy_chain_2.next_mux = NULL; + proxy_chain_2.next = NULL; } } /** Restore original usb_mux chain without proxy */ static void restore_usb_mux_chain(void) { - memcpy(&usb_muxes[USBC_PORT_C1], &usb_mux_c1, sizeof(struct usb_mux)); + memcpy(&usb_muxes[USBC_PORT_C1], &usb_mux_c1, + sizeof(struct usb_mux_chain)); + + /* Reset flags to default */ + proxy_mux_0.flags = 0; + proxy_mux_1.flags = 0; + proxy_mux_2.flags = 0; } /** @@ -346,25 +364,22 @@ static void restore_usb_mux_chain(void) * pointer to the right proxy chain element. First argument is * const struct usb_mux * for all struct usb_mux_driver callbacks. */ -#define CHECK_PROXY_FAKE_CALL_CNT(proxy, num) \ - do { \ - zassert_equal(num, proxy##_fake.call_count, "%d != %d", \ - num, proxy##_fake.call_count); \ - if (num >= 1) { \ - zassert_equal(&usb_muxes[USBC_PORT_C1], \ - proxy##_fake.arg0_history[0], \ - NULL); \ - } \ - if (num >= 2) { \ - zassert_equal(&proxy_chain_1, \ - proxy##_fake.arg0_history[1], \ - NULL); \ - } \ - if (num >= 3) { \ - zassert_equal(&proxy_chain_2, \ - proxy##_fake.arg0_history[2], \ - NULL); \ - } \ +#define CHECK_PROXY_FAKE_CALL_CNT(proxy, num) \ + do { \ + zassert_equal(num, proxy##_fake.call_count, "%d != %d", num, \ + proxy##_fake.call_count); \ + if (num >= 1) { \ + zassert_equal(usb_muxes[USBC_PORT_C1].mux, \ + proxy##_fake.arg0_history[0], NULL); \ + } \ + if (num >= 2) { \ + zassert_equal(proxy_chain_1.mux, \ + proxy##_fake.arg0_history[1], NULL); \ + } \ + if (num >= 3) { \ + zassert_equal(proxy_chain_2.mux, \ + proxy##_fake.arg0_history[2], NULL); \ + } \ } while (0) /** @@ -372,33 +387,30 @@ static void restore_usb_mux_chain(void) * was the same as given state. hpd_update and set callback have mux_state_t * as second argument. */ -#define CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy, num, state) \ - do { \ - CHECK_PROXY_FAKE_CALL_CNT(proxy, num); \ - if (num >= 1) { \ - zassert_equal(state, \ - proxy##_fake.arg1_history[0], \ - "0x%x != 0x%x", state, \ - proxy##_fake.arg1_history[0]); \ - } \ - if (num >= 2) { \ - zassert_equal(state, \ - proxy##_fake.arg1_history[1], \ - "0x%x != 0x%x", state, \ - proxy##_fake.arg1_history[1]); \ - } \ - if (num >= 3) { \ - zassert_equal(state, \ - proxy##_fake.arg1_history[2], \ - "0x%x != 0x%x", state, \ - proxy##_fake.arg1_history[2]); \ - } \ +#define CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy, num, state) \ + do { \ + CHECK_PROXY_FAKE_CALL_CNT(proxy, num); \ + if (num >= 1) { \ + zassert_equal(state, proxy##_fake.arg1_history[0], \ + "0x%x != 0x%x", state, \ + proxy##_fake.arg1_history[0]); \ + } \ + if (num >= 2) { \ + zassert_equal(state, proxy##_fake.arg1_history[1], \ + "0x%x != 0x%x", state, \ + proxy##_fake.arg1_history[1]); \ + } \ + if (num >= 3) { \ + zassert_equal(state, proxy##_fake.arg1_history[2], \ + "0x%x != 0x%x", state, \ + proxy##_fake.arg1_history[2]); \ + } \ } while (0) /** Test usb_mux init */ ZTEST(usb_uninit_mux, test_usb_mux_init) { - int fail_on_2nd_ret[] = {EC_SUCCESS, EC_ERROR_NOT_POWERED}; + int fail_on_2nd_ret[] = { EC_SUCCESS, EC_ERROR_NOT_POWERED }; /* Set AP to normal state to init BB retimer */ test_set_chipset_to_s0(); @@ -417,26 +429,26 @@ ZTEST(usb_uninit_mux, test_usb_mux_init) CHECK_PROXY_FAKE_CALL_CNT(proxy_init, 2); /* Test board init callback */ - proxy_chain_1.board_init = &mock_board_init; + proxy_mux_1.board_init = &mock_board_init; reset_proxy_fakes(); usb_mux_init(USBC_PORT_C1); CHECK_PROXY_FAKE_CALL_CNT(proxy_init, NUM_OF_PROXY); /* Check if board_init was called for proxy 1 */ zassert_equal(1, mock_board_init_fake.call_count, NULL); - zassert_equal(&proxy_chain_1, mock_board_init_fake.arg0_history[0], + zassert_equal(proxy_chain_1.mux, mock_board_init_fake.arg0_history[0], NULL); - proxy_chain_1.board_init = NULL; + proxy_mux_1.board_init = NULL; } /** Test usb_mux setting mux mode */ ZTEST(usb_uninit_mux, test_usb_mux_set) { - int fail_on_2nd_ret[] = {EC_SUCCESS, EC_ERROR_UNKNOWN}; + int fail_on_2nd_ret[] = { EC_SUCCESS, EC_ERROR_UNKNOWN }; mux_state_t exp_mode; /* Set flag for usb mux 1 to disable polarity setting */ - proxy_chain_1.flags = USB_MUX_FLAG_SET_WITHOUT_FLIP; + proxy_mux_1.flags = USB_MUX_FLAG_SET_WITHOUT_FLIP; /* Test setting mux mode without polarity inversion */ reset_proxy_fakes(); @@ -463,14 +475,14 @@ ZTEST(usb_uninit_mux, test_usb_mux_set) /* Test board set callback */ reset_proxy_fakes(); - proxy_chain_1.board_set = &mock_board_set; + proxy_mux_1.board_set = &mock_board_set; usb_mux_set(USBC_PORT_C1, exp_mode, USB_SWITCH_CONNECT, 0 /* = polarity */); CHECK_PROXY_FAKE_CALL_CNT(proxy_init, 0); CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy_set, NUM_OF_PROXY, exp_mode); /* Check if board_set was called for proxy 1 */ zassert_equal(1, mock_board_set_fake.call_count, NULL); - zassert_equal(&proxy_chain_1, mock_board_set_fake.arg0_history[0], + zassert_equal(proxy_chain_1.mux, mock_board_set_fake.arg0_history[0], NULL); zassert_equal(exp_mode, mock_board_set_fake.arg1_history[0], NULL); @@ -484,7 +496,7 @@ ZTEST(usb_uninit_mux, test_usb_mux_set) /* board_set shouldn't be called after fail */ zassert_equal(0, mock_board_set_fake.call_count, NULL); - proxy_chain_1.board_set = NULL; + proxy_mux_1.board_set = NULL; } /** Test usb_mux reset in g3 when required flag is set */ @@ -500,7 +512,7 @@ ZTEST(usb_uninit_mux, test_usb_mux_reset_in_g3) CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy_set, NUM_OF_PROXY, exp_mode); /* Usb muxes of port 1 should stay initialised */ - usb_muxes[USBC_PORT_C1].flags = 0; + proxy_mux_0.flags = 0; hook_notify(HOOK_CHIPSET_HARD_OFF); /* Test that init is not called */ @@ -514,7 +526,7 @@ ZTEST(usb_uninit_mux, test_usb_mux_reset_in_g3) /** Test usb_mux getting mux mode */ ZTEST(usb_uninit_mux, test_usb_mux_get) { - int fail_on_2nd_ret[] = {EC_SUCCESS, EC_ERROR_UNKNOWN}; + int fail_on_2nd_ret[] = { EC_SUCCESS, EC_ERROR_UNKNOWN }; mux_state_t exp_mode, mode; /* Test getting mux mode */ @@ -551,7 +563,7 @@ ZTEST(usb_uninit_mux, test_usb_mux_get) /** Test usb_mux entering and exiting low power mode */ ZTEST(usb_init_mux, test_usb_mux_low_power_mode) { - int fail_on_2nd_ret[] = {EC_SUCCESS, EC_ERROR_NOT_POWERED}; + int fail_on_2nd_ret[] = { EC_SUCCESS, EC_ERROR_NOT_POWERED }; mux_state_t exp_mode, mode; /* Test enter to low power mode */ @@ -620,7 +632,7 @@ ZTEST(usb_uninit_mux, test_usb_mux_flip) mux_state_t exp_mode; /* Set flag for usb mux 1 to disable polarity setting */ - proxy_chain_1.flags = USB_MUX_FLAG_SET_WITHOUT_FLIP; + proxy_mux_1.flags = USB_MUX_FLAG_SET_WITHOUT_FLIP; /* Test flip port without polarity inverted */ exp_mode = USB_PD_MUX_USB_ENABLED; @@ -704,17 +716,22 @@ ZTEST(usb_uninit_mux, test_usb_mux_hpd_update) exp_mode); /* Test ps8xxx hpd update */ - usb_muxes[USBC_PORT_C1].usb_port = 1; - usb_muxes[USBC_PORT_C1].driver = &tcpci_tcpm_usb_mux_driver; - usb_muxes[USBC_PORT_C1].hpd_update = &ps8xxx_tcpc_update_hpd_status; + proxy_mux_0.usb_port = 1; + proxy_mux_0.driver = &tcpci_tcpm_usb_mux_driver; + proxy_mux_0.hpd_update = &ps8xxx_tcpc_update_hpd_status; reset_proxy_fakes(); exp_mode = virt_mode | USB_PD_MUX_HPD_LVL | USB_PD_MUX_HPD_IRQ; usb_mux_hpd_update(USBC_PORT_C1, exp_mode); /* Check if PS8xxx mux mode is updated correctly */ - tcpci_tcpm_usb_mux_driver.get(&usb_muxes[USBC_PORT_C1], &mode); - zassert_equal(0, mode, "mux mode is 0x%x (!= 0x%x)", - mode, 0); + tcpci_tcpm_usb_mux_driver.get(usb_muxes[USBC_PORT_C1].mux, &mode); + + /* Restore proxy chain 0 */ + proxy_mux_0.usb_port = USBC_PORT_C1; + proxy_mux_0.driver = &proxy_usb_mux; + proxy_mux_0.hpd_update = &proxy_hpd_update; + + zassert_equal(0, mode, "mux mode is 0x%x (!= 0x%x)", mode, 0); } ZTEST(usb_init_mux, test_usb_mux_fw_update_port_info) @@ -786,8 +803,7 @@ ZTEST(usb_init_mux, test_usb_mux_typec_command) /* Test error on command with no argument */ zassert_equal(EC_ERROR_PARAM_COUNT, - shell_execute_cmd(get_ec_shell(), - "typec"), NULL); + shell_execute_cmd(get_ec_shell(), "typec"), NULL); /* * Test success on passing "debug" as first argument. This will enable @@ -795,49 +811,44 @@ ZTEST(usb_init_mux, test_usb_mux_typec_command) * without accessing cprints output. */ zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "typec debug"), NULL); + shell_execute_cmd(get_ec_shell(), "typec debug"), NULL); /* Test error on port argument that is not a number */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "typec test1"), NULL); + shell_execute_cmd(get_ec_shell(), "typec test1"), NULL); /* Test error on invalid port number */ zassert_equal(EC_ERROR_PARAM1, - shell_execute_cmd(get_ec_shell(), - "typec 5"), NULL); + shell_execute_cmd(get_ec_shell(), "typec 5"), NULL); /* * Test success on correct port number. Command should print mux state * on console, but it is not possible to check that in unit test. */ set_proxy_get_mux_state_seq(USB_PD_MUX_TBT_COMPAT_ENABLED); - zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "typec 1"), NULL); + zassert_equal(EC_SUCCESS, shell_execute_cmd(get_ec_shell(), "typec 1"), + NULL); CHECK_PROXY_FAKE_CALL_CNT(proxy_get, NUM_OF_PROXY); /* Test setting none mode */ reset_proxy_fakes(); exp_mode = USB_PD_MUX_NONE; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "typec 1 none"), NULL); + shell_execute_cmd(get_ec_shell(), "typec 1 none"), NULL); CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy_set, NUM_OF_PROXY, exp_mode); /* Mux will enter low power mode */ CHECK_PROXY_FAKE_CALL_CNT(proxy_enter_low_power_mode, NUM_OF_PROXY); /* Polarity is set based on PD */ polarity = polarity_rm_dts(pd_get_polarity(USBC_PORT_C1)) ? - USB_PD_MUX_POLARITY_INVERTED : 0; + USB_PD_MUX_POLARITY_INVERTED : + 0; /* Test setting USB mode */ reset_proxy_fakes(); exp_mode = USB_PD_MUX_USB_ENABLED | polarity; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "typec 1 usb"), NULL); + shell_execute_cmd(get_ec_shell(), "typec 1 usb"), NULL); CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy_set, NUM_OF_PROXY, exp_mode); /* Mux will exit low power mode */ CHECK_PROXY_FAKE_CALL_CNT(proxy_init, NUM_OF_PROXY); @@ -846,16 +857,14 @@ ZTEST(usb_init_mux, test_usb_mux_typec_command) reset_proxy_fakes(); exp_mode = USB_PD_MUX_DP_ENABLED | polarity; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "typec 1 dp"), NULL); + shell_execute_cmd(get_ec_shell(), "typec 1 dp"), NULL); CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy_set, NUM_OF_PROXY, exp_mode); /* Test setting dock mode */ reset_proxy_fakes(); exp_mode = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | polarity; zassert_equal(EC_SUCCESS, - shell_execute_cmd(get_ec_shell(), - "typec 1 dock"), NULL); + shell_execute_cmd(get_ec_shell(), "typec 1 dock"), NULL); CHECK_PROXY_FAKE_CALL_CNT_MUX_STATE(proxy_set, NUM_OF_PROXY, exp_mode); } @@ -867,7 +876,7 @@ void usb_uninit_mux_before(void *state) set_test_runner_tid(); /* Makes sure that usb muxes of port 1 are not init */ - usb_muxes[USBC_PORT_C1].flags = USB_MUX_FLAG_RESETS_IN_G3; + proxy_mux_0.flags = USB_MUX_FLAG_RESETS_IN_G3; hook_notify(HOOK_CHIPSET_HARD_OFF); reset_proxy_fakes(); } diff --git a/zephyr/test/drivers/src/usb_pd_host_cmd.c b/zephyr/test/drivers/default/src/usb_pd_host_cmd.c index 5eb589043c..c8851fbeb1 100644 --- a/zephyr/test/drivers/src/usb_pd_host_cmd.c +++ b/zephyr/test/drivers/default/src/usb_pd_host_cmd.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "ec_commands.h" #include "host_command.h" @@ -14,8 +14,7 @@ ZTEST_USER(usb_pd_host_cmd, test_host_command_hc_pd_ports) { struct ec_response_usb_pd_ports response; struct host_cmd_handler_args args = - BUILD_HOST_COMMAND_RESPONSE(EC_CMD_USB_PD_PORTS, 0, - response); + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_USB_PD_PORTS, 0, response); zassert_ok(host_command_process(&args), NULL); zassert_ok(args.result, NULL); diff --git a/zephyr/test/drivers/default/src/vboot_hash.c b/zephyr/test/drivers/default/src/vboot_hash.c new file mode 100644 index 0000000000..546fc8135f --- /dev/null +++ b/zephyr/test/drivers/default/src/vboot_hash.c @@ -0,0 +1,103 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include <sha256.h> + +#include "ec_commands.h" +#include "host_command.h" +#include "test/drivers/test_state.h" + +ZTEST_USER(vboot_hash, test_hostcmd_abort) +{ + struct ec_response_vboot_hash response; + struct ec_params_vboot_hash start_params = { + .cmd = EC_VBOOT_HASH_START, + .hash_type = EC_VBOOT_HASH_TYPE_SHA256, + .offset = EC_VBOOT_HASH_OFFSET_RO, + .size = 0, + }; + struct host_cmd_handler_args start_args = BUILD_HOST_COMMAND( + EC_CMD_VBOOT_HASH, 0, response, start_params); + struct ec_params_vboot_hash abort_params = { + .cmd = EC_VBOOT_HASH_ABORT, + }; + struct host_cmd_handler_args abort_args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_VBOOT_HASH, 0, abort_params); + struct ec_params_vboot_hash get_params = { + .cmd = EC_VBOOT_HASH_GET, + }; + struct host_cmd_handler_args get_args = + BUILD_HOST_COMMAND(EC_CMD_VBOOT_HASH, 0, response, get_params); + + /* Start hashing. The command doesn't wait to finish. */ + zassert_ok(host_command_process(&start_args), NULL); + zassert_ok(start_args.result, NULL); + zassert_equal(start_args.response_size, sizeof(response), NULL); + zassert_equal(response.status, EC_VBOOT_HASH_STATUS_BUSY, + "response.status = %d", response.status); + + /* Abort it immediately */ + zassert_ok(host_command_process(&abort_args), NULL); + zassert_ok(abort_args.result, NULL); + + /* Give it a bit time. The abort is being processed in the background */ + k_msleep(20); + + /* Get the hash result. Should be NONE. */ + zassert_ok(host_command_process(&get_args), NULL); + zassert_ok(get_args.result, NULL); + zassert_equal(get_args.response_size, sizeof(response), NULL); + zassert_equal(response.status, EC_VBOOT_HASH_STATUS_NONE, + "response.status = %d", response.status); +} + +ZTEST_USER(vboot_hash, test_hostcmd_recalc) +{ + struct ec_response_vboot_hash response; + struct ec_params_vboot_hash recalc_params = { + .cmd = EC_VBOOT_HASH_RECALC, + .hash_type = EC_VBOOT_HASH_TYPE_SHA256, + .offset = EC_VBOOT_HASH_OFFSET_RO, + .size = 0, + }; + struct host_cmd_handler_args recalc_args = BUILD_HOST_COMMAND( + EC_CMD_VBOOT_HASH, 0, response, recalc_params); + + /* Recalculate the hash. The command waits to finish. */ + zassert_ok(host_command_process(&recalc_args), NULL); + zassert_ok(recalc_args.result, NULL); + zassert_equal(recalc_args.response_size, sizeof(response), NULL); + zassert_equal(response.status, EC_VBOOT_HASH_STATUS_DONE, + "response.status = %d", response.status); + zassert_equal(response.digest_size, SHA256_DIGEST_SIZE, + "response.digest_size = %d", response.digest_size); +} + +ZTEST_USER(vboot_hash, test_hostcmd_hash_arbitrary_size) +{ + struct ec_response_vboot_hash response; + struct ec_params_vboot_hash recalc_params = { + .cmd = EC_VBOOT_HASH_RECALC, + .hash_type = EC_VBOOT_HASH_TYPE_SHA256, + .offset = 0, + /* arbitrary size */ + .size = 0x12345, + }; + struct host_cmd_handler_args recalc_args = BUILD_HOST_COMMAND( + EC_CMD_VBOOT_HASH, 0, response, recalc_params); + + /* Recalculate the hash. The command waits to finish. */ + zassert_ok(host_command_process(&recalc_args), NULL); + zassert_ok(recalc_args.result, NULL); + zassert_equal(recalc_args.response_size, sizeof(response), NULL); + zassert_equal(response.status, EC_VBOOT_HASH_STATUS_DONE, + "response.status = %d", response.status); + zassert_equal(response.digest_size, SHA256_DIGEST_SIZE, + "response.digest_size = %d", response.digest_size); +} + +ZTEST_SUITE(vboot_hash, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/default/src/virtual_battery.c b/zephyr/test/drivers/default/src/virtual_battery.c new file mode 100644 index 0000000000..0e69c641a5 --- /dev/null +++ b/zephyr/test/drivers/default/src/virtual_battery.c @@ -0,0 +1,259 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "battery.h" +#include "battery_smart.h" +#include "ec_commands.h" +#include "emul/emul_smart_battery.h" +#include "host_command.h" +#include "test/drivers/test_state.h" + +/* The param buffer has at most 2 msg's (write + read) and 1 byte write len. */ +static uint8_t param_buf[sizeof(struct ec_params_i2c_passthru) + + sizeof(struct ec_params_i2c_passthru_msg) * 2 + 1]; + +/* The response buffer has at most 32 bytes returned result. */ +static uint8_t response_buf[sizeof(struct ec_response_i2c_passthru) + 32]; + +static void i2c_passthru_xfer(uint8_t port, uint8_t addr, uint8_t *write_buf, + int write_len, uint8_t **read_buf, int read_len) +{ + struct ec_params_i2c_passthru *params = + (struct ec_params_i2c_passthru *)¶m_buf; + struct ec_response_i2c_passthru *response = + (struct ec_response_i2c_passthru *)&response_buf; + struct ec_params_i2c_passthru_msg *msg = params->msg; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_I2C_PASSTHRU, 0); + uint8_t *pdata; + int size; + + params->port = port; + params->num_msgs = (read_len != 0) + (write_len != 0); + + size = sizeof(*params) + params->num_msgs * sizeof(*msg); + pdata = (uint8_t *)params + size; + + if (write_len) { + msg->addr_flags = addr; + msg->len = write_len; + memcpy(pdata, write_buf, write_len); + msg++; + } + + if (read_len) { + msg->addr_flags = addr | EC_I2C_FLAG_READ; + msg->len = read_len; + } + + args.params = params; + args.params_size = size + write_len; + args.response = response; + args.response_max = sizeof(*response) + read_len; + + /* Execute the I2C passthru host command */ + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_ok(response->i2c_status, NULL); + zassert_equal(args.response_size, sizeof(*response) + read_len, NULL); + + /* Return the data portion */ + if (read_len) + *read_buf = response->data; +} + +static inline void virtual_battery_xfer(uint8_t *write_buf, int write_len, + uint8_t **read_buf, int read_len) +{ + i2c_passthru_xfer(I2C_PORT_VIRTUAL_BATTERY, VIRTUAL_BATTERY_ADDR_FLAGS, + write_buf, write_len, read_buf, read_len); +} + +static uint16_t virtual_battery_read16(uint8_t command) +{ + uint8_t write_buf[1] = { command }; + uint8_t *read_buf; + + virtual_battery_xfer(write_buf, 1, &read_buf, 2); + + /* Little endian */ + return ((int)read_buf[1] << 8) | read_buf[0]; +} + +static void virtual_battery_write16(uint8_t command, uint16_t data) +{ + uint8_t write_buf[3] = { command }; + + *((uint16_t *)&write_buf[1]) = data; + + virtual_battery_xfer(write_buf, 3, NULL, 0); +} + +static int virtual_battery_read_str(uint8_t command, char **read_buf, + int read_len) +{ + uint8_t write_buf[1] = { command }; + int len; + + virtual_battery_xfer(write_buf, 1, (uint8_t **)read_buf, read_len); + + /* Battery v2 embeds the strlen in the first byte so shift 1 byte. */ + len = **read_buf; + (*read_buf)++; + + return len; +} + +static void virtual_battery_read_data(uint8_t command, char **read_buf, + int read_len) +{ + uint8_t write_buf[1] = { command }; + + virtual_battery_xfer(write_buf, 1, (uint8_t **)read_buf, read_len); +} + +#define BATTERY_NODE DT_NODELABEL(battery) + +ZTEST_USER(virtual_battery, test_read_regs) +{ + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + struct sbat_emul_bat_data *bat = sbat_emul_get_bat_data(emul); + int16_t int16; + uint16_t word; + int expected; + char *str; + int len; + + /* + * Iterate all the registers, which issues the I2C passthru host + * command to query the emulated smart battery. Most of the values + * are the same as the emulated battery, but with some exceptions. + */ + word = virtual_battery_read16(SB_BATTERY_MODE); + zassert_equal(bat->mode, word, "%d != %d", bat->mode, word); + + word = virtual_battery_read16(SB_SERIAL_NUMBER); + zassert_equal(bat->sn, word, "%d != %d", bat->sn, word); + + word = virtual_battery_read16(SB_VOLTAGE); + zassert_equal(bat->volt, word, "%d != %d", bat->volt, word); + + /* The expected value is calculated */ + expected = 100 * bat->cap / bat->full_cap; + word = virtual_battery_read16(SB_RELATIVE_STATE_OF_CHARGE); + + zassert_equal(expected, word, "%d != %d", expected, word); + + word = virtual_battery_read16(SB_TEMPERATURE); + zassert_equal(bat->temp, word, "%d != %d", bat->temp, word); + + int16 = virtual_battery_read16(SB_CURRENT); + zassert_equal(bat->cur, int16, "%d != %d", bat->cur, int16); + + int16 = virtual_battery_read16(SB_AVERAGE_CURRENT); + zassert_equal(bat->avg_cur, int16, "%d != %d", bat->avg_cur, int16); + + /* The virtual battery modifies the return value to make kernel happy */ + expected = BATTERY_LEVEL_SHUTDOWN; + word = virtual_battery_read16(SB_MAX_ERROR); + zassert_equal(expected, word, "%d != %d", expected, word); + + word = virtual_battery_read16(SB_FULL_CHARGE_CAPACITY); + zassert_equal(bat->full_cap, word, "%d != %d", bat->full_cap, word); + + word = virtual_battery_read16(SB_CYCLE_COUNT); + zassert_equal(bat->cycle_count, word, "%d != %d", bat->cycle_count, + word); + + word = virtual_battery_read16(SB_DESIGN_CAPACITY); + zassert_equal(bat->design_cap, word, "%d != %d", bat->design_cap, word); + + word = virtual_battery_read16(SB_REMAINING_CAPACITY); + zassert_equal(bat->cap, word, "%d != %d", bat->cap, word); + + len = virtual_battery_read_str(SB_MANUFACTURER_NAME, &str, + SB_MAX_STR_SIZE); + zassert_equal(bat->mf_name_len, len, "%d != %d", bat->mf_name_len, len); + zassert_mem_equal(str, bat->mf_name, bat->mf_name_len, "%s != %s", str, + bat->mf_name); + + len = virtual_battery_read_str(SB_DEVICE_NAME, &str, SB_MAX_STR_SIZE); + zassert_equal(bat->dev_name_len, len, "%d != %d", bat->dev_name_len, + len); + zassert_mem_equal(str, bat->dev_name, bat->dev_name_len, "%s != %s", + str, bat->dev_name); + + len = virtual_battery_read_str(SB_DEVICE_CHEMISTRY, &str, + SB_MAX_STR_SIZE); + zassert_equal(bat->dev_chem_len, len, "%d != %d", bat->dev_chem_len, + len); + zassert_mem_equal(str, bat->dev_chem, bat->dev_chem_len, "%s != %s", + str, bat->dev_chem); + + /* Use the API to query the expected value */ + battery_time_to_full(&expected); + word = virtual_battery_read16(SB_AVERAGE_TIME_TO_FULL); + zassert_equal(expected, word, "%d != %d", expected, word); + + battery_time_to_empty(&expected); + word = virtual_battery_read16(SB_AVERAGE_TIME_TO_EMPTY); + zassert_equal(expected, word, "%d != %d", expected, word); + + battery_run_time_to_empty(&expected); + word = virtual_battery_read16(SB_RUN_TIME_TO_EMPTY); + zassert_equal(expected, word, "%d != %d", expected, word); + + word = virtual_battery_read16(SB_CHARGING_CURRENT); + zassert_equal(bat->desired_charg_cur, word, "%d != %d", + bat->desired_charg_cur, word); + + word = virtual_battery_read16(SB_CHARGING_VOLTAGE); + zassert_equal(bat->desired_charg_volt, word, "%d != %d", + bat->desired_charg_volt, word); + + word = virtual_battery_read16(SB_MANUFACTURE_DATE); + zassert_equal(bat->mf_date, word, "%d != %d", bat->mf_date, word); + + /* Hard-coded return value: v1.1 without PEC */ + expected = 0x0011; + word = virtual_battery_read16(SB_SPECIFICATION_INFO); + zassert_equal(expected, word, "%d != %d", expected, word); + + zassume_ok(battery_status(&expected)); + word = virtual_battery_read16(SB_BATTERY_STATUS); + zassert_equal(expected, word, "%d != %d", expected, word); + + zassume_ok(battery_design_voltage(&expected)); + word = virtual_battery_read16(SB_DESIGN_VOLTAGE); + zassert_equal(expected, word, "%d != %d", expected, word); + + virtual_battery_read_data(SB_MANUFACTURER_DATA, &str, bat->mf_data_len); + zassert_mem_equal(str, bat->mf_data, bat->mf_data_len, "%s != %s", str, + bat->mf_data); + + /* At present, this command is used nowhere in our codebase. */ + virtual_battery_read_data(SB_MANUFACTURE_INFO, &str, bat->mf_info_len); + zassert_mem_equal(str, bat->mf_info, bat->mf_info_len, "%s != %s", str, + bat->mf_info); +} + +ZTEST_USER(virtual_battery, test_write_mfgacc) +{ + struct sbat_emul_bat_data *bat; + const struct emul *emul = EMUL_DT_GET(BATTERY_NODE); + uint16_t cmd = PARAM_OPERATION_STATUS; + + bat = sbat_emul_get_bat_data(emul); + + /* Write the command to the SB_MANUFACTURER_ACCESS and check */ + virtual_battery_write16(SB_MANUFACTURER_ACCESS, cmd); + zassert_equal(bat->mf_access, cmd, "%d != %d", bat->mf_access, cmd); +} + +ZTEST_SUITE(virtual_battery, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); diff --git a/zephyr/test/drivers/default/src/vstore.c b/zephyr/test/drivers/default/src/vstore.c new file mode 100644 index 0000000000..b4264aaeb3 --- /dev/null +++ b/zephyr/test/drivers/default/src/vstore.c @@ -0,0 +1,230 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <setjmp.h> + +#include <console.h> +#include <zephyr/fff.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "host_command.h" +#include "system.h" +#include "system_fake.h" +#include "vstore.h" +#include "test/drivers/test_state.h" + +ZTEST_SUITE(vstore, drivers_predicate_post_main, NULL, NULL, NULL, NULL); + +ZTEST_USER(vstore, test_vstore_info) +{ + struct ec_response_vstore_info response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_VSTORE_INFO, 0, response); + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(response.slot_count, CONFIG_VSTORE_SLOT_COUNT, + "response.slot_count = %d", response.slot_count); + zassert_equal(response.slot_locked, 0, "response.slot_locked = %#x", + response.slot_locked); +} + +ZTEST_USER(vstore, test_vstore_read) +{ + struct ec_params_vstore_read params = { + .slot = 0, + }; + struct ec_response_vstore_read response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_VSTORE_READ, 0, response, params); + uint8_t expect[EC_VSTORE_SLOT_SIZE] = {}; /* data should start as 0 */ + + zassert_ok(host_command_process(&args), NULL); + zassert_ok(args.result, NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_mem_equal(expect, response.data, EC_VSTORE_SLOT_SIZE, + "response.data did not match"); +} + +ZTEST_USER(vstore, test_vstore_read_bad_slot) +{ + struct ec_params_vstore_read params = { + .slot = CONFIG_VSTORE_SLOT_COUNT, + }; + struct ec_response_vstore_read response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_VSTORE_READ, 0, response, params); + + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, + "Failed to fail on invalid slot %d", params.slot); +} + +ZTEST_USER(vstore, test_vstore_write_bad_slot) +{ + struct ec_params_vstore_write params = { + .slot = CONFIG_VSTORE_SLOT_COUNT, + .data = {}, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_VSTORE_WRITE, 0, params); + + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, + "Failed to fail on invalid slot %d", params.slot); +} + +static void do_vstore_write_read(unsigned int slot) +{ + struct ec_params_vstore_write write_params = { + .slot = slot, + /* .data is set up below */ + }; + struct host_cmd_handler_args write_args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_VSTORE_WRITE, 0, write_params); + struct ec_params_vstore_read read_params = { + .slot = slot, + }; + struct ec_response_vstore_read read_response; + struct host_cmd_handler_args read_args = BUILD_HOST_COMMAND( + EC_CMD_VSTORE_READ, 0, read_response, read_params); + struct ec_response_vstore_info info_response; + struct host_cmd_handler_args info_args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_VSTORE_INFO, 0, info_response); + int i; + + for (i = 0; i < EC_VSTORE_SLOT_SIZE; i++) + write_params.data[i] = i + 1; + + /* Write to a slot */ + zassert_ok(host_command_process(&write_args), NULL); + zassert_ok(write_args.result, NULL); + + /* Check that it is now locked */ + zassert_ok(host_command_process(&info_args), NULL); + zassert_ok(info_args.result, NULL); + zassert_equal(info_args.response_size, sizeof(info_response), NULL); + zassert_equal(info_response.slot_count, CONFIG_VSTORE_SLOT_COUNT, + "response.slot_count = %d", info_response.slot_count); + zassert_equal(info_response.slot_locked, 1 << slot, + "response.slot_locked = %#x", info_response.slot_locked); + + /* Read to check data */ + zassert_ok(host_command_process(&read_args), NULL); + zassert_ok(read_args.result, NULL); + zassert_equal(read_args.response_size, sizeof(read_response), NULL); + zassert_mem_equal(write_params.data, read_response.data, + EC_VSTORE_SLOT_SIZE, "response.data did not match"); + + /* Try to write to it again */ + zassert_equal(host_command_process(&write_args), EC_RES_ACCESS_DENIED, + "Failed to fail on writing locked slot %d", + write_params.slot); + + /* Check that it is still locked after that attempt */ + zassert_ok(host_command_process(&info_args), NULL); + zassert_ok(info_args.result, NULL); + zassert_equal(info_args.response_size, sizeof(info_response), NULL); + zassert_equal(info_response.slot_count, CONFIG_VSTORE_SLOT_COUNT, + "response.slot_count = %d", info_response.slot_count); + zassert_equal(info_response.slot_locked, 1 << slot, + "response.slot_locked = %#x", info_response.slot_locked); + + /* Read to check the data didn't change */ + zassert_ok(host_command_process(&read_args), NULL); + zassert_ok(read_args.result, NULL); + zassert_equal(read_args.response_size, sizeof(read_response), NULL); + zassert_mem_equal(write_params.data, read_response.data, + EC_VSTORE_SLOT_SIZE, "response.data did not match"); + + /* Clear locks and try the write again, this time with zero bytes */ + vstore_clear_lock(); + memset(write_params.data, '\0', EC_VSTORE_SLOT_SIZE); + zassert_ok(host_command_process(&write_args), NULL); + zassert_ok(write_args.result, NULL); + + /* Check that it is now locked */ + zassert_ok(host_command_process(&info_args), NULL); + zassert_ok(info_args.result, NULL); + zassert_equal(info_args.response_size, sizeof(info_response), NULL); + zassert_equal(info_response.slot_count, CONFIG_VSTORE_SLOT_COUNT, + "response.slot_count = %d", info_response.slot_count); + zassert_equal(info_response.slot_locked, 1 << slot, + "response.slot_locked = %#x", info_response.slot_locked); + + /* Read to check the data changed */ + zassert_ok(host_command_process(&read_args), NULL); + zassert_ok(read_args.result, NULL); + zassert_equal(read_args.response_size, sizeof(read_response), NULL); + zassert_mem_equal(write_params.data, read_response.data, + EC_VSTORE_SLOT_SIZE, "response.data did not match"); + + /* Clear locks to put things into a normal state */ + vstore_clear_lock(); +} + +ZTEST_USER(vstore, test_vstore_write_read) +{ + /* Try on two different slots */ + zassert_true(CONFIG_VSTORE_SLOT_COUNT >= 2, + "Please set CONFIG_VSTORE_SLOT_COUNT to >= 2"); + do_vstore_write_read(0); + do_vstore_write_read(1); +} + +ZTEST_USER(vstore, test_vstore_state) +{ + struct ec_params_vstore_write write_params = { + .slot = 0, + /* .data is set up below */ + }; + struct host_cmd_handler_args write_args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_VSTORE_WRITE, 0, write_params); + + struct ec_params_reboot_ec reboot_params = { + .cmd = EC_REBOOT_JUMP_RW, + }; + struct host_cmd_handler_args reboot_args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_REBOOT_EC, 0, reboot_params); + struct ec_response_vstore_info info_response; + struct host_cmd_handler_args info_args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_VSTORE_INFO, 0, info_response); + jmp_buf env; + int i; + + shell_backend_dummy_clear_output(get_ec_shell()); + system_common_pre_init(); + + for (i = 0; i < EC_VSTORE_SLOT_SIZE; i++) + write_params.data[i] = i + 1; + + /* Write to a slot */ + zassert_ok(host_command_process(&write_args), NULL); + zassert_ok(write_args.result, NULL); + + /* Set up so we get back to this test on a reboot */ + if (!setjmp(env)) { + system_fake_setenv(&env); + + /* Reboot to RW */ + zassert_ok(host_command_process(&reboot_args), NULL); + + /* Does not return unless something went wrong */ + zassert_unreachable("Failed to reboot"); + } + + /* the reboot should end up here: check the slot is still locked */ + zassert_ok(host_command_process(&info_args), NULL); + zassert_ok(info_args.result, NULL); + zassert_equal(info_args.response_size, sizeof(info_response), NULL); + zassert_equal(info_response.slot_count, CONFIG_VSTORE_SLOT_COUNT, + "response.slot_count = %d", info_response.slot_count); + zassert_equal(info_response.slot_locked, 1 << 0, + "response.slot_locked = %#x", info_response.slot_locked); + + /* Clear locks to put things into a normal state */ + vstore_clear_lock(); +} diff --git a/zephyr/test/drivers/src/watchdog.c b/zephyr/test/drivers/default/src/watchdog.c index 8b91247f12..958aa3eaaa 100644 --- a/zephyr/test/drivers/src/watchdog.c +++ b/zephyr/test/drivers/default/src/watchdog.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -12,12 +12,12 @@ #include <zephyr/drivers/watchdog.h> #include <zephyr/logging/log.h> -#include <zephyr/zephyr.h> -#include <ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> #include "common.h" #include "ec_tasks.h" -#include "fff.h" +#include <zephyr/fff.h> #include "hooks.h" #include "test/drivers/stubs.h" #include "watchdog.h" @@ -53,8 +53,8 @@ static void watchdog_before(void *state) /* When shuffling need watchdog initialized and running * for other tests. */ - (void) watchdog_init(); - (void) wdt_setup(wdt, 0); + (void)watchdog_init(); + (void)wdt_setup(wdt, 0); } /** diff --git a/zephyr/projects/brya/prj_ghost.conf b/zephyr/test/drivers/dps/CMakeLists.txt index 666aeb1dd0..0e175e182f 100644 --- a/zephyr/projects/brya/prj_ghost.conf +++ b/zephyr/test/drivers/dps/CMakeLists.txt @@ -1,5 +1,5 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -CONFIG_PLATFORM_EC_CHARGESPLASH=y +target_sources(app PRIVATE src/dps.c) diff --git a/zephyr/test/drivers/dps/prj.conf b/zephyr/test/drivers/dps/prj.conf new file mode 100644 index 0000000000..1f1e1c5d0e --- /dev/null +++ b/zephyr/test/drivers/dps/prj.conf @@ -0,0 +1,5 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC_USB_PD_DPS=y diff --git a/zephyr/test/drivers/dps/src/dps.c b/zephyr/test/drivers/dps/src/dps.c new file mode 100644 index 0000000000..d445767df4 --- /dev/null +++ b/zephyr/test/drivers/dps/src/dps.c @@ -0,0 +1,262 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "builtin/stdio.h" +#include "console.h" +#include "dps.h" +#include "test/drivers/test_state.h" +#include "timer.h" + +struct dps_fixture { + struct dps_config_t saved_config; + int saved_debug_level; +}; + +static void *dps_config_setup(void) +{ + static struct dps_fixture fixture; + + fixture.saved_config = *dps_get_config(); + fixture.saved_debug_level = *dps_get_debug_level(); + + return &fixture; +} + +static void dps_config_before(void *data) +{ + dps_enable(true); +} + +static void dps_config_after(void *data) +{ + struct dps_fixture *f = (struct dps_fixture *)data; + + *dps_get_config() = f->saved_config; + *dps_get_debug_level() = f->saved_debug_level; + dps_enable(true); +} + +ZTEST_F(dps, test_enable) +{ + zassert_true(dps_is_enabled(), NULL); + dps_enable(false); + zassert_false(dps_is_enabled(), NULL); + dps_enable(true); + zassert_true(dps_is_enabled(), NULL); +} + +ZTEST_F(dps, test_config) +{ + struct dps_config_t *config = dps_get_config(); + + zassert_true(config->k_less_pwr <= config->k_more_pwr, NULL); + zassert_true(config->k_less_pwr > 0 && config->k_less_pwr < 100, NULL); + zassert_true(config->k_more_pwr > 0 && config->k_more_pwr < 100, NULL); + + zassert_ok(dps_init(), NULL); + *config = fixture->saved_config; + + config->k_less_pwr = config->k_more_pwr + 1; + zassert_equal(dps_init(), EC_ERROR_INVALID_CONFIG, NULL); + *config = fixture->saved_config; + + config->k_more_pwr = 101; + zassert_equal(dps_init(), EC_ERROR_INVALID_CONFIG, NULL); + *config = fixture->saved_config; +} + +ZTEST(dps, console_cmd__print_info) +{ + /* Print current status to console */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps"), NULL); +} + +ZTEST(dps, console_cmd__enable) +{ + /* Disable DPS first, then try enabling */ + dps_enable(false); + zassert_false(dps_is_enabled(), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps en"), NULL); + + zassert_true(dps_is_enabled(), NULL); +} + +ZTEST(dps, console_cmd__disable) +{ + /* Should already by enabled due to before() function */ + zassume_true(dps_is_enabled(), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps dis"), NULL); + + zassert_false(dps_is_enabled(), NULL); +} + +ZTEST(dps, console_cmd__fakepwr_print) +{ + /* Print current fake power status to console */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps fakepwr"), NULL); +} + +ZTEST(dps, console_cmd__fakepwr_enable_disable) +{ + zassume_false(dps_is_fake_enabled(), + "fakepwr shouldn't be enabled by default"); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps fakepwr 100 200"), + NULL); + zassert_true(dps_is_fake_enabled(), NULL); + zassert_equal(100, dps_get_fake_mv(), "Got fake_mv=%d", + dps_get_fake_mv()); + zassert_equal(200, dps_get_fake_ma(), "Got fake_ma=%d", + dps_get_fake_ma()); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps fakepwr dis"), NULL); + zassert_false(dps_is_fake_enabled(), NULL); +} + +ZTEST(dps, console_cmd__fakepwr_invalid) +{ + /* Various invalid parameters */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps fakepwr 100"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps fakepwr -100 -200"), + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps fakepwr 100 -200"), + NULL); +} + +ZTEST(dps, console_cmd__debuglevel) +{ + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps debug 999"), NULL); + + zassert_equal(999, *dps_get_debug_level(), "Debug level is %d", + *dps_get_debug_level()); +} + +ZTEST(dps, console_cmd__setkmore) +{ + struct dps_config_t *config = dps_get_config(); + char cmd[32]; + + /* Try some invalid requests first */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkmore"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkmore 101"), + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkmore 0"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkmore -1"), NULL); + + zassert_true(crec_snprintf(cmd, sizeof(cmd), "dps setkmore %d", + config->k_less_pwr - 1) > 0, + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), cmd), NULL); + + /* Adjust k_more_pwr to be one over k_less_pwr */ + zassert_true(crec_snprintf(cmd, sizeof(cmd), "dps setkmore %d", + config->k_less_pwr + 1) > 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + + zassert_equal(config->k_less_pwr + 1, config->k_more_pwr, + "k_more_pwr is %d but should be %d", config->k_more_pwr, + config->k_less_pwr + 1); +} + +ZTEST(dps, console_cmd__setkless) +{ + struct dps_config_t *config = dps_get_config(); + char cmd[32]; + + /* Try some invalid requests first */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkless"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkless 101"), + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkless 0"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkless -1"), NULL); + + zassert_true(crec_snprintf(cmd, sizeof(cmd), "dps setkless %d", + config->k_more_pwr + 1) > 0, + NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), cmd), NULL); + + /* Adjust k_less_pwr to be one under k_more_pwr */ + zassert_true(crec_snprintf(cmd, sizeof(cmd), "dps setkless %d", + config->k_more_pwr - 1) > 0, + NULL); + zassert_ok(shell_execute_cmd(get_ec_shell(), cmd), NULL); + + zassert_equal(config->k_more_pwr - 1, config->k_less_pwr, + "k_less_pwr is %d but should be %d", config->k_less_pwr, + config->k_more_pwr - 1); +} + +ZTEST(dps, console_cmd__setksample) +{ + struct dps_config_t *config = dps_get_config(); + + /* Try some invalid requests first */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setksample"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setksample -1"), + NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps setksample 999"), + NULL); + + zassert_equal(999, config->k_sample, "k_sample is %d", + config->k_sample); +} + +ZTEST(dps, console_cmd__setkwindow) +{ + struct dps_config_t *config = dps_get_config(); + + /* Try some invalid requests first */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkwin"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps setkwin -1"), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps setkwin 4"), NULL); + + zassert_equal(4, config->k_window, "k_window is %d", config->k_window); +} + +ZTEST(dps, console_cmd__settcheck) +{ + struct dps_config_t *config = dps_get_config(); + + /* Try some invalid requests first */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps settcheck"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps settcheck -1"), + NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps settcheck 5"), NULL); + + zassert_equal(5 * SECOND, config->t_check, "t_check is %d", + config->t_check); +} + +ZTEST(dps, console_cmd__settstable) +{ + struct dps_config_t *config = dps_get_config(); + + /* Try some invalid requests first */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps settstable"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps settstable -1"), + NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "dps settstable 6"), NULL); + + zassert_equal(6 * SECOND, config->t_stable, "t_stable is %d", + config->t_stable); +} + +ZTEST(dps, console_cmd__invalid) +{ + /* Non-existent subcommand should fail */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "dps foobar xyz"), NULL); +} + +ZTEST_SUITE(dps, drivers_predicate_pre_main, dps_config_setup, + dps_config_before, dps_config_after, NULL); diff --git a/zephyr/test/drivers/host_cmd/CMakeLists.txt b/zephyr/test/drivers/host_cmd/CMakeLists.txt new file mode 100644 index 0000000000..ddd8e4d54c --- /dev/null +++ b/zephyr/test/drivers/host_cmd/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_sources(app PRIVATE + src/battery_cut_off.c + src/get_panic_info.c + src/get_pd_port_caps.c + src/host_event_commands.c + src/host_event_commands_deprecated.c + src/keyboard_mkbp.c + src/motion_sense.c + src/pd_control.c + src/pd_chip_info.c + src/pd_log.c + src/usb_pd_control.c +) diff --git a/zephyr/test/drivers/host_cmd/src/battery_cut_off.c b/zephyr/test/drivers/host_cmd/src/battery_cut_off.c new file mode 100644 index 0000000000..ed9d96481d --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/battery_cut_off.c @@ -0,0 +1,107 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/emul.h> +#include <zephyr/ztest.h> + +#include "battery.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_smart_battery.h" +#include "hooks.h" +#include "host_command.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +struct host_cmd_battery_cut_off_fixture { + const struct emul *emul; + struct i2c_common_emul_data *i2c_emul; +}; + +static void *host_cmd_battery_cut_off_setup(void) +{ + static struct host_cmd_battery_cut_off_fixture fixture = { + .emul = EMUL_DT_GET(DT_NODELABEL(battery)), + }; + + fixture.i2c_emul = emul_smart_battery_get_i2c_common_data(fixture.emul); + + return &fixture; +} + +static void host_cmd_battery_cut_off_before(void *f) +{ + ARG_UNUSED(f); + test_set_battery_level(75); +} + +static void host_cmd_battery_cut_off_after(void *f) +{ + struct host_cmd_battery_cut_off_fixture *fixture = f; + + i2c_common_emul_set_write_fail_reg(fixture->i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + set_ac_enabled(true); + hook_notify(HOOK_AC_CHANGE); + k_msleep(500); +} + +ZTEST_SUITE(host_cmd_battery_cut_off, drivers_predicate_post_main, + host_cmd_battery_cut_off_setup, host_cmd_battery_cut_off_before, + host_cmd_battery_cut_off_after, NULL); + +ZTEST_USER_F(host_cmd_battery_cut_off, test_fail_sb_write) +{ + int rv; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_BATTERY_CUT_OFF, UINT8_C(0)); + + /* Force a failure on the battery i2c write to 0x00 */ + i2c_common_emul_set_write_fail_reg(fixture->i2c_emul, 0); + + rv = host_command_process(&args); + zassert_equal(EC_RES_ERROR, rv, "Expected 0, but got %d", rv); +} + +ZTEST_USER(host_cmd_battery_cut_off, test_cutoff_battery) +{ + int rv; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_BATTERY_CUT_OFF, UINT8_C(0)); + + rv = host_command_process(&args); + zassert_equal(EC_RES_SUCCESS, rv, "Expected 0, but got %d", rv); + zassert_true(battery_is_cut_off(), NULL); +} + +ZTEST_USER(host_cmd_battery_cut_off, test_cutoff_v1) +{ + int rv; + struct ec_params_battery_cutoff params = { + .flags = 0, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_BATTERY_CUT_OFF, UINT8_C(1), params); + + rv = host_command_process(&args); + zassert_equal(EC_RES_SUCCESS, rv, "Expected 0, but got %d", rv); + zassert_true(battery_is_cut_off(), NULL); +} + +ZTEST_USER(host_cmd_battery_cut_off, test_cutoff_at_shutdown) +{ + int rv; + struct ec_params_battery_cutoff params = { + .flags = EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_BATTERY_CUT_OFF, UINT8_C(1), params); + + rv = host_command_process(&args); + zassert_equal(EC_RES_SUCCESS, rv, "Expected 0, but got %d", rv); + zassert_false(battery_is_cut_off(), NULL); + hook_notify(HOOK_CHIPSET_SHUTDOWN); + zassert_true(WAIT_FOR(battery_is_cut_off(), 1500000, k_msleep(250)), + NULL); +} diff --git a/zephyr/test/drivers/host_cmd/src/get_panic_info.c b/zephyr/test/drivers/host_cmd/src/get_panic_info.c new file mode 100644 index 0000000000..04b83d07f9 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/get_panic_info.c @@ -0,0 +1,98 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "host_command.h" +#include "panic.h" +#include "test/drivers/test_state.h" + +struct host_cmd_get_panic_info_fixture { + struct panic_data saved_pdata; +}; + +static void *host_cmd_get_panic_info_setup(void) +{ + static struct host_cmd_get_panic_info_fixture fixture = { 0 }; + + return &fixture; +} + +static void host_cmd_get_panic_info_before(void *f) +{ + struct host_cmd_get_panic_info_fixture *fixture = f; + struct panic_data *pdata = get_panic_data_write(); + + fixture->saved_pdata = *pdata; +} + +static void host_cmd_get_panic_info_after(void *f) +{ + struct host_cmd_get_panic_info_fixture *fixture = f; + struct panic_data *pdata = get_panic_data_write(); + + *pdata = fixture->saved_pdata; +} + +ZTEST_SUITE(host_cmd_get_panic_info, drivers_predicate_post_main, + host_cmd_get_panic_info_setup, host_cmd_get_panic_info_before, + host_cmd_get_panic_info_after, NULL); + +ZTEST_USER(host_cmd_get_panic_info, test_get_panic_info) +{ + struct panic_data *pdata = get_panic_data_write(); + struct panic_data response = { 0 }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_GET_PANIC_INFO, UINT8_C(0), response); + + pdata->arch = 0; + pdata->struct_version = 1; + pdata->flags = 2; + pdata->reserved = 3; + pdata->struct_size = sizeof(struct panic_data); + pdata->magic = PANIC_DATA_MAGIC; + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(sizeof(struct panic_data), args.response_size, NULL); + zassert_equal(0, response.arch, NULL); + zassert_equal(1, response.struct_version, NULL); + zassert_equal(2, response.flags, NULL); + zassert_equal(3, response.reserved, NULL); + zassert_equal(sizeof(struct panic_data), response.struct_size, NULL); + zassert_equal(PANIC_DATA_MAGIC, response.magic, NULL); + zassert_equal(pdata->flags & PANIC_DATA_FLAG_OLD_HOSTCMD, + PANIC_DATA_FLAG_OLD_HOSTCMD, NULL); +} + +ZTEST_USER(host_cmd_get_panic_info, test_get_panic_info_bad_magic) +{ + struct panic_data *pdata = get_panic_data_write(); + struct panic_data expected = { 0 }; + struct panic_data response = { 0 }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_GET_PANIC_INFO, UINT8_C(0), response); + + pdata->magic = PANIC_DATA_MAGIC + 1; + zassert_ok(host_command_process(&args), NULL); + /* Check that nothing was written to response */ + zassert_mem_equal(&response, &expected, sizeof(struct panic_data), + NULL); +} + +ZTEST_USER(host_cmd_get_panic_info, test_get_panic_info_size_is_zero) +{ + struct panic_data *pdata = get_panic_data_write(); + struct panic_data expected = { 0 }; + struct panic_data response = { 0 }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_GET_PANIC_INFO, UINT8_C(0), response); + + pdata->magic = PANIC_DATA_MAGIC; + pdata->struct_size = 0; + zassert_ok(host_command_process(&args), NULL); + /* Check that nothing was written to response */ + zassert_mem_equal(&response, &expected, sizeof(struct panic_data), + NULL); +} diff --git a/zephyr/test/drivers/host_cmd/src/get_pd_port_caps.c b/zephyr/test/drivers/host_cmd/src/get_pd_port_caps.c new file mode 100644 index 0000000000..907329f8a1 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/get_pd_port_caps.c @@ -0,0 +1,58 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +ZTEST_USER(host_cmd_get_pd_port_caps, test_good_index) +{ + struct ec_params_get_pd_port_caps params = { .port = 0 }; + struct ec_response_get_pd_port_caps response; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_GET_PD_PORT_CAPS, 0, response, params); + + zassert_ok(host_command_process(&args), + "Failed to process get_pd_port_caps for port %d", + params.port); + + /* Verify standard Chromebook responses for these fields */ + zassert_equal(response.pd_power_role_cap, EC_PD_POWER_ROLE_DUAL, + "Bad dual role"); + zassert_equal(response.pd_try_power_role_cap, + EC_PD_TRY_POWER_ROLE_SOURCE, "Bad try role"); + zassert_equal(response.pd_data_role_cap, EC_PD_DATA_ROLE_DUAL, + "Bad data role"); + zassert_equal(response.pd_port_location, EC_PD_PORT_LOCATION_UNKNOWN, + "Unexpected port location"); +} + +ZTEST_USER(host_cmd_get_pd_port_caps, test_bad_index) +{ + struct ec_params_get_pd_port_caps params = { .port = 32 }; + struct ec_response_get_pd_port_caps response; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_GET_PD_PORT_CAPS, 0, response, params); + + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, + "Failed to fail get_pd_port_caps for port %d", + params.port); +} + +static void host_cmd_get_pd_port_caps_begin(void *data) +{ + ARG_UNUSED(data); + + /* Assume we have at least one USB-C port */ + zassume_true(board_get_usb_pd_port_count() > 0, + "Insufficient TCPCs found"); +} + +ZTEST_SUITE(host_cmd_get_pd_port_caps, drivers_predicate_post_main, NULL, + host_cmd_get_pd_port_caps_begin, NULL, NULL); diff --git a/zephyr/test/drivers/host_cmd/src/host_event_commands.c b/zephyr/test/drivers/host_cmd/src/host_event_commands.c new file mode 100644 index 0000000000..c2f7e72045 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/host_event_commands.c @@ -0,0 +1,238 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> +#include "include/lpc.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +struct host_cmd_host_event_commands_fixture { + struct host_events_ctx ctx; +}; + +static void *host_cmd_host_event_commands_setup(void) +{ + static struct host_cmd_host_event_commands_fixture fixture = { 0 }; + + return &fixture; +} + +static void host_cmd_host_event_commands_before(void *fixture) +{ + struct host_cmd_host_event_commands_fixture *f = fixture; + + host_events_save(&f->ctx); +} + +static void host_cmd_host_event_commands_after(void *fixture) +{ + struct host_cmd_host_event_commands_fixture *f = fixture; + + host_events_restore(&f->ctx); +} + +ZTEST_SUITE(host_cmd_host_event_commands, drivers_predicate_post_main, + host_cmd_host_event_commands_setup, + host_cmd_host_event_commands_before, + host_cmd_host_event_commands_after, NULL); + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT invalid host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_invalid_cmd) +{ + enum ec_status ret_val; + struct ec_response_host_event result = { 0 }; + + ret_val = host_cmd_host_event(0xFF, 0, &result); + + zassert_equal(ret_val, EC_RES_INVALID_PARAM, "Expected=%d, returned=%d", + EC_RES_INVALID_PARAM, ret_val); +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT get host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_get_cmd) +{ + enum ec_status ret_val; + struct ec_response_host_event result = { 0 }; + struct { + uint8_t mask; + enum ec_status result; + } event_get[] = { + { EC_HOST_EVENT_MAIN, EC_RES_ACCESS_DENIED }, + { EC_HOST_EVENT_B, EC_RES_SUCCESS }, +#ifdef CONFIG_HOSTCMD_X86 + { EC_HOST_EVENT_SCI_MASK, EC_RES_SUCCESS }, + { EC_HOST_EVENT_SMI_MASK, EC_RES_SUCCESS }, + { EC_HOST_EVENT_ALWAYS_REPORT_MASK, EC_RES_SUCCESS }, + { EC_HOST_EVENT_ACTIVE_WAKE_MASK, EC_RES_SUCCESS }, +#ifdef CONFIG_POWER_S0IX + { EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, EC_RES_SUCCESS }, +#endif /* CONFIG_POWER_S0IX */ + { EC_HOST_EVENT_LAZY_WAKE_MASK_S3, EC_RES_SUCCESS }, + { EC_HOST_EVENT_LAZY_WAKE_MASK_S5, EC_RES_SUCCESS }, +#endif /* CONFIG_HOSTCMD_X86 */ + { 0xFF, EC_RES_INVALID_PARAM }, + }; + + for (int i = 0; i < ARRAY_SIZE(event_get); i++) { + ret_val = host_cmd_host_event(EC_HOST_EVENT_GET, + event_get[i].mask, &result); + zassert_equal(ret_val, event_get[i].result, + "[%d] Expected=%d, returned=%d", i, + event_get[i].result, ret_val); + } +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT set host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_set_cmd) +{ + enum ec_status ret_val; + struct ec_response_host_event result = { 0 }; + struct { + uint8_t mask; + enum ec_status result; + } event_set[] = { + { EC_HOST_EVENT_MAIN, EC_RES_ACCESS_DENIED }, + { EC_HOST_EVENT_B, EC_RES_ACCESS_DENIED }, +#ifdef CONFIG_HOSTCMD_X86 + { EC_HOST_EVENT_SCI_MASK, EC_RES_SUCCESS }, + { EC_HOST_EVENT_SMI_MASK, EC_RES_SUCCESS }, + { EC_HOST_EVENT_ALWAYS_REPORT_MASK, EC_RES_SUCCESS }, + { EC_HOST_EVENT_ACTIVE_WAKE_MASK, EC_RES_SUCCESS }, +#ifdef CONFIG_POWER_S0IX + { EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, EC_RES_SUCCESS }, +#endif /* CONFIG_POWER_S0IX */ + { EC_HOST_EVENT_LAZY_WAKE_MASK_S3, EC_RES_SUCCESS }, + { EC_HOST_EVENT_LAZY_WAKE_MASK_S5, EC_RES_SUCCESS }, +#endif /* CONFIG_HOSTCMD_X86 */ + { 0xFF, EC_RES_INVALID_PARAM }, + }; + + for (int i = 0; i < ARRAY_SIZE(event_set); i++) { + ret_val = host_cmd_host_event(EC_HOST_EVENT_SET, + event_set[i].mask, &result); + zassert_equal(ret_val, event_set[i].result, + "[%d] Expected=%d, returned=%d", i, + event_set[i].result, ret_val); + } +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT clear host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_clear_cmd) +{ + enum ec_status ret_val; + struct ec_response_host_event result = { 0 }; + struct { + uint8_t mask; + enum ec_status result; + } event_set[] = { + { EC_HOST_EVENT_MAIN, EC_RES_SUCCESS }, + { EC_HOST_EVENT_B, EC_RES_SUCCESS }, +#ifdef CONFIG_HOSTCMD_X86 + { EC_HOST_EVENT_SCI_MASK, EC_RES_ACCESS_DENIED }, + { EC_HOST_EVENT_SMI_MASK, EC_RES_ACCESS_DENIED }, + { EC_HOST_EVENT_ALWAYS_REPORT_MASK, EC_RES_ACCESS_DENIED }, + { EC_HOST_EVENT_ACTIVE_WAKE_MASK, EC_RES_ACCESS_DENIED }, +#ifdef CONFIG_POWER_S0IX + { EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, EC_RES_ACCESS_DENIED }, +#endif /* CONFIG_POWER_S0IX */ + { EC_HOST_EVENT_LAZY_WAKE_MASK_S3, EC_RES_ACCESS_DENIED }, + { EC_HOST_EVENT_LAZY_WAKE_MASK_S5, EC_RES_ACCESS_DENIED }, +#endif /* CONFIG_HOSTCMD_X86 */ + { 0xFF, EC_RES_INVALID_PARAM }, + }; + + for (int i = 0; i < ARRAY_SIZE(event_set); i++) { + ret_val = host_cmd_host_event(EC_HOST_EVENT_CLEAR, + event_set[i].mask, &result); + zassert_equal(ret_val, event_set[i].result, + "Expected [%d] result=%d, returned=%d", i, + event_set[i].result, ret_val); + } +} + +enum ec_status host_event_mask_cmd_helper(uint32_t command, uint32_t mask, + struct ec_response_host_event_mask *r) +{ + enum ec_status ret_val; + + struct ec_params_host_event_mask params = { + .mask = mask, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(command, 0, *r, params); + + ret_val = host_command_process(&args); + + return ret_val; +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_CLEAR clear host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_clear__cmd) +{ + enum ec_status ret_val; + host_event_t events; + host_event_t mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY); + host_event_t lpc_event_mask; + struct ec_response_host_event_mask response = { 0 }; + + lpc_event_mask = lpc_get_host_event_mask(LPC_HOST_EVENT_SMI); + lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, lpc_event_mask | mask); + + host_set_single_event(EC_HOST_EVENT_KEYBOARD_RECOVERY); + events = host_get_events(); + + zassert_true(events & mask, "events=0x%X", events); + + ret_val = host_event_mask_cmd_helper(EC_CMD_HOST_EVENT_CLEAR, mask, + &response); + + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); + + events = host_get_events(); + zassert_false(events & mask, "events=0x%X", events); +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_CLEAR_B clear host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_clear_b_cmd) +{ + enum ec_status ret_val; + host_event_t events_b; + host_event_t mask = EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY); + host_event_t lpc_event_mask; + struct ec_response_host_event_mask response = { 0 }; + struct ec_response_host_event result = { 0 }; + + lpc_event_mask = lpc_get_host_event_mask(LPC_HOST_EVENT_SMI); + lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, lpc_event_mask | mask); + + host_set_single_event(EC_HOST_EVENT_KEYBOARD_RECOVERY); + + host_cmd_host_event(EC_HOST_EVENT_GET, EC_HOST_EVENT_B, &result); + events_b = result.value; + zassert_true(events_b & mask, "events_b=0x%X", events_b); + + ret_val = host_event_mask_cmd_helper(EC_CMD_HOST_EVENT_CLEAR_B, mask, + &response); + + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); + + host_cmd_host_event(EC_HOST_EVENT_GET, EC_HOST_EVENT_B, &result); + events_b = result.value; + zassert_false(events_b & mask, "events_b=0x%X", events_b); +} diff --git a/zephyr/test/drivers/host_cmd/src/host_event_commands_deprecated.c b/zephyr/test/drivers/host_cmd/src/host_event_commands_deprecated.c new file mode 100644 index 0000000000..6d0a386d6e --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/host_event_commands_deprecated.c @@ -0,0 +1,256 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Tests for deprecated EC_CMD_HOST_EVENT_* commands */ + +#include <zephyr/ztest.h> +#include "include/lpc.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#define HOST_EVENT_TEST_MASK_VAL EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) + +static void +host_event_get_wake_mask_helper(struct ec_response_host_event_mask *r) +{ + enum ec_status ret_val; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_HOST_EVENT_GET_WAKE_MASK, 0, *r); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_GET_WAKE_MASK always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +static void host_event_set_wake_mask_helper(uint32_t mask) +{ + enum ec_status ret_val; + struct ec_params_host_event_mask params = { .mask = mask }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_HOST_EVENT_SET_WAKE_MASK, 0, params); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_SET_WAKE_MASK always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_GET_WAKE_MASK host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_get_wake_mask) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + host_event_get_wake_mask_helper(&result); +#else + ztest_test_skip(); +#endif +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_SET_WAKE_MASK host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_set_wake_mask) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + /* Read the current mask */ + host_event_get_wake_mask_helper(&result); + + /* Default mask is expected to be clear */ + zassert_false(result.mask, "Default host event wake mask is not clear"); + + host_event_set_wake_mask_helper(HOST_EVENT_TEST_MASK_VAL); + + /* Verify the mask changed */ + host_event_get_wake_mask_helper(&result); + + zassert_equal(result.mask, HOST_EVENT_TEST_MASK_VAL, + "Expected wake mask 0x%08x, returned mask 0x%08x", + HOST_EVENT_TEST_MASK_VAL, result.mask); + + /* Clean up the mask */ + host_event_set_wake_mask_helper(0); +#else + ztest_test_skip(); +#endif +} + +static void +host_event_get_smi_mask_helper(struct ec_response_host_event_mask *r) +{ + enum ec_status ret_val; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_HOST_EVENT_GET_SMI_MASK, 0, *r); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_GET_SMI_MASK always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +static void host_event_set_smi_mask_helper(uint32_t mask) +{ + enum ec_status ret_val; + struct ec_params_host_event_mask params = { .mask = mask }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_HOST_EVENT_SET_SMI_MASK, 0, params); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_SET_SMI_MASK always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_GET_SMI_MASK host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_get_smi_mask) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + host_event_get_smi_mask_helper(&result); +#else + ztest_test_skip(); +#endif +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_SET_SMI_MASK host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_set_smi_mask) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + /* Read the current mask */ + host_event_get_smi_mask_helper(&result); + + /* Default mask is expected to be clear */ + zassert_false(result.mask, "Default host event SMI mask is not clear"); + + host_event_set_smi_mask_helper(HOST_EVENT_TEST_MASK_VAL); + + /* Verify the mask changed */ + host_event_get_smi_mask_helper(&result); + + zassert_equal(result.mask, HOST_EVENT_TEST_MASK_VAL, + "Expected SMI mask 0x%08x, returned mask 0x%08x", + HOST_EVENT_TEST_MASK_VAL, result.mask); + + /* Clean up the mask */ + host_event_set_smi_mask_helper(0); +#else + ztest_test_skip(); +#endif +} + +static void host_event_get_b_helper(struct ec_response_host_event_mask *r) +{ + enum ec_status ret_val; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_HOST_EVENT_GET_B, 0, *r); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_GET_B always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_GET_B host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_get_b) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + host_event_get_b_helper(&result); +#else + ztest_test_skip(); +#endif +} + +static void +host_event_get_sci_mask_helper(struct ec_response_host_event_mask *r) +{ + enum ec_status ret_val; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_HOST_EVENT_GET_SCI_MASK, 0, *r); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_GET_SCI_MASK always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +static void host_event_set_sci_mask_helper(uint32_t mask) +{ + enum ec_status ret_val; + struct ec_params_host_event_mask params = { .mask = mask }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_HOST_EVENT_SET_SCI_MASK, 0, params); + + ret_val = host_command_process(&args); + + /* EC_CMD_HOST_EVENT_SET_SCI_MASK always returns success */ + zassert_equal(ret_val, EC_RES_SUCCESS, "Expected %d, returned %d", + EC_RES_SUCCESS, ret_val); +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_GET_SCI_MASK host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_get_sci_mask) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + host_event_get_sci_mask_helper(&result); +#else + ztest_test_skip(); +#endif +} + +/** + * @brief TestPurpose: Verify EC_CMD_HOST_EVENT_SET_SCI_MASK host command. + */ +ZTEST_USER(host_cmd_host_event_commands, test_host_event_set_sci_mask) +{ +#ifdef CONFIG_HOSTCMD_X86 + struct ec_response_host_event_mask result = { 0 }; + + /* Read the current mask */ + host_event_get_sci_mask_helper(&result); + + /* Default mask is expected to be clear */ + zassert_false(result.mask, "Default host event SCI mask is not clear"); + + host_event_set_sci_mask_helper(HOST_EVENT_TEST_MASK_VAL); + + /* Verify the mask changed */ + host_event_get_sci_mask_helper(&result); + + zassert_equal(result.mask, HOST_EVENT_TEST_MASK_VAL, + "Expected SCI mask 0x%08x, returned mask 0x%08x", + HOST_EVENT_TEST_MASK_VAL, result.mask); + + /* Clean up the mask */ + host_event_set_sci_mask_helper(0); +#else + ztest_test_skip(); +#endif +} diff --git a/zephyr/test/drivers/host_cmd/src/keyboard_mkbp.c b/zephyr/test/drivers/host_cmd/src/keyboard_mkbp.c new file mode 100644 index 0000000000..4c74a48ab4 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/keyboard_mkbp.c @@ -0,0 +1,81 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> +#include "include/keyboard_mkbp.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +struct keyboard_mkbp_commands_fixture { + struct ec_mkbp_config config; +}; + +static void *keyboard_mkbp_setup(void) +{ + static struct keyboard_mkbp_commands_fixture fixture = { 0 }; + + return &fixture; +} + +static void keyboard_mkbp_before(void *fixture) +{ + struct keyboard_mkbp_commands_fixture *f = fixture; + + get_keyscan_config(&f->config); +} + +static void keyboard_mkbp_after(void *fixture) +{ + struct keyboard_mkbp_commands_fixture *f = fixture; + struct ec_params_mkbp_set_config req = { 0 }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_MKBP_SET_CONFIG, 0, req); + + req.config = f->config; + host_command_process(&args); +} + +ZTEST_SUITE(keyboard_mkbp_commands, drivers_predicate_post_main, + keyboard_mkbp_setup, keyboard_mkbp_before, keyboard_mkbp_after, + NULL); + +/** + * @brief TestPurpose: Verify EC_CMD_MKBP_GET_CONFIG host command. + */ +ZTEST_USER(keyboard_mkbp_commands, test_mkbp_get_config_cmd) +{ + enum ec_status ret_val; + struct ec_response_mkbp_get_config resp; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_MKBP_GET_CONFIG, 0, resp); + + ret_val = host_command_process(&args); + + zassert_ok(ret_val, "Expected=%d, returned=%d", EC_SUCCESS, ret_val); +} + +/** + * @brief TestPurpose: Verify EC_CMD_MKBP_SET_CONFIG host command. + */ +ZTEST_USER(keyboard_mkbp_commands, test_mkbp_set_config_cmd) +{ + enum ec_status ret_val; + struct ec_params_mkbp_set_config req = { 0 }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_MKBP_SET_CONFIG, 0, req); + + get_keyscan_config(&req.config); + + req.config.valid_mask = + EC_MKBP_VALID_SCAN_PERIOD | EC_MKBP_VALID_POLL_TIMEOUT | + EC_MKBP_VALID_MIN_POST_SCAN_DELAY | + EC_MKBP_VALID_OUTPUT_SETTLE | EC_MKBP_VALID_DEBOUNCE_DOWN | + EC_MKBP_VALID_DEBOUNCE_UP | EC_MKBP_VALID_FIFO_MAX_DEPTH; + + ret_val = host_command_process(&args); + + zassert_ok(ret_val, "Expected=%d, returned=%d", EC_SUCCESS, ret_val); +} diff --git a/zephyr/test/drivers/src/host_cmd/motion_sense.c b/zephyr/test/drivers/host_cmd/src/motion_sense.c index 07952ed285..c75f327fed 100644 --- a/zephyr/test/drivers/src/host_cmd/motion_sense.c +++ b/zephyr/test/drivers/host_cmd/src/motion_sense.c @@ -1,12 +1,14 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <fff.h> -#include <ztest.h> +#include <zephyr/fff.h> +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> #include "atomic.h" +#include "console.h" #include "driver/accel_bma2x2.h" #include "motion_sense.h" #include "motion_sense_fifo.h" @@ -68,6 +70,8 @@ static void host_cmd_motion_sense_before(void *fixture) RESET_FAKE(mock_perform_calib); FFF_RESET_HISTORY(); + zassume_ok(shell_execute_cmd(get_ec_shell(), "accelinit 0"), NULL); + atomic_clear(&motion_sensors[0].flush_pending); motion_sensors[0].config[SENSOR_CONFIG_AP].odr = 0; motion_sensors[0].config[SENSOR_CONFIG_AP].ec_rate = 1000 * MSEC; @@ -81,6 +85,8 @@ static void host_cmd_motion_sense_after(void *fixture) motion_sensors[0].drv = this->sensor_0_drv; host_cmd_motion_sense_int_enable(0, &response); motion_sensors[0].flags &= ~MOTIONSENSE_FLAG_IN_SPOOF_MODE; + motion_sensors[0].config[SENSOR_CONFIG_AP].odr = 0; + motion_sensors[0].config[SENSOR_CONFIG_AP].ec_rate = 1000 * MSEC; } ZTEST_SUITE(host_cmd_motion_sense, drivers_predicate_post_main, @@ -100,10 +106,15 @@ ZTEST_USER(host_cmd_motion_sense, test_dump) motion_sensors[i].xyz[1] = i + 1; motion_sensors[i].xyz[2] = i + 2; } + + /* Make sure that the accelerometer status presence bit is off */ + *host_get_memmap(EC_MEMMAP_ACC_STATUS) &= + ~(EC_MEMMAP_ACC_STATUS_PRESENCE_BIT); + + /* Dump all the sensors info */ host_cmd_motion_sense_dump(ALL_MOTION_SENSORS, result); - zassert_equal(result->dump.module_flags, MOTIONSENSE_MODULE_FLAG_ACTIVE, - NULL); + zassert_equal(result->dump.module_flags, 0, NULL); zassert_equal(result->dump.sensor_count, ALL_MOTION_SENSORS, NULL); /* @@ -119,6 +130,16 @@ ZTEST_USER(host_cmd_motion_sense, test_dump) zassert_equal(result->dump.sensor[i].data[1], i + 1, NULL); zassert_equal(result->dump.sensor[i].data[2], i + 2, NULL); } + + /* Make sure that the accelerometer status presence bit is on */ + *host_get_memmap(EC_MEMMAP_ACC_STATUS) |= + EC_MEMMAP_ACC_STATUS_PRESENCE_BIT; + + /* Dump all the sensors info */ + host_cmd_motion_sense_dump(ALL_MOTION_SENSORS, result); + + zassert_equal(result->dump.module_flags, MOTIONSENSE_MODULE_FLAG_ACTIVE, + NULL); } ZTEST_USER(host_cmd_motion_sense, test_dump__large_max_sensor_count) @@ -232,6 +253,10 @@ ZTEST_USER(host_cmd_motion_sense, test_get_ec_rate) { struct ec_response_motion_sense response; + /* Set the power level to S3, the default config from device-tree is for + * 100ms + */ + test_set_chipset_to_power_level(POWER_S3); zassert_ok(host_cmd_motion_sense_ec_rate( /*sensor_num=*/0, /*data_rate_ms=*/EC_MOTION_SENSE_NO_VALUE, @@ -244,6 +269,10 @@ ZTEST_USER(host_cmd_motion_sense, test_set_ec_rate) { struct ec_response_motion_sense response; + /* Set the power level to S3, the default config from device-tree is for + * 100ms + */ + test_set_chipset_to_power_level(POWER_S3); zassert_ok(host_cmd_motion_sense_ec_rate( /*sensor_num=*/0, /*data_rate_ms=*/2000, &response), NULL); @@ -351,7 +380,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_set_range_error) struct ec_response_motion_sense response; mock_set_range_fake.return_val = 1; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; zassert_equal(EC_RES_INVALID_PARAM, host_cmd_motion_sense_range(/*sensor_num=*/0, /*range=*/4, @@ -366,7 +395,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_set_range) struct ec_response_motion_sense response; mock_set_range_fake.return_val = 0; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; zassert_ok(host_cmd_motion_sense_range(/*sensor_num=*/0, /*range=*/4, /*round_up=*/false, &response), @@ -423,7 +452,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_offset_fail_to_set) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_set_offset_fake.return_val = EC_RES_ERROR; zassert_equal(EC_RES_ERROR, @@ -440,7 +469,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_offset_fail_to_get) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_set_offset_fake.return_val = EC_RES_SUCCESS; mock_get_offset_fake.return_val = EC_RES_ERROR; @@ -461,7 +490,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_get_offset) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_get_offset_fake.return_val = EC_RES_SUCCESS; mock_set_offset_fake.return_val = EC_RES_SUCCESS; @@ -529,7 +558,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_get_scale_fail) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_get_scale_fake.return_val = 1; zassert_equal(1, @@ -546,7 +575,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_set_scale_fail) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_set_scale_fake.return_val = 1; zassert_equal(1, @@ -563,7 +592,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_set_get_scale) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_set_scale_fake.return_val = 0; mock_get_scale_fake.return_val = 0; @@ -604,7 +633,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_calib_fail) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_perform_calib_fake.return_val = 1; zassert_equal(1, @@ -619,7 +648,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_calib_success__fail_get_offset) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_perform_calib_fake.return_val = 0; mock_get_offset_fake.return_val = 1; @@ -636,7 +665,7 @@ ZTEST_USER_F(host_cmd_motion_sense, test_calib) { struct ec_response_motion_sense response; - motion_sensors[0].drv = &this->mock_drv; + motion_sensors[0].drv = &fixture->mock_drv; mock_perform_calib_fake.return_val = 0; mock_get_offset_fake.return_val = 0; @@ -663,12 +692,9 @@ ZTEST(host_cmd_motion_sense, test_fifo_flush) struct ec_response_motion_sense *response = (struct ec_response_motion_sense *)response_buffer; - motion_sensors[0].lost = 5; zassert_ok(host_cmd_motion_sense_fifo_flush(/*sensor_num=*/0, response), NULL); zassert_equal(1, motion_sensors[0].flush_pending, NULL); - zassert_equal(5, response->fifo_info.lost[0], NULL); - zassert_equal(0, motion_sensors[0].lost, NULL); } ZTEST(host_cmd_motion_sense, test_fifo_info) @@ -677,10 +703,7 @@ ZTEST(host_cmd_motion_sense, test_fifo_info) struct ec_response_motion_sense *response = (struct ec_response_motion_sense *)response_buffer; - motion_sensors[0].lost = 4; zassert_ok(host_cmd_motion_sense_fifo_info(response), NULL); - zassert_equal(4, response->fifo_info.lost[0], NULL); - zassert_equal(0, motion_sensors[0].lost, NULL); } ZTEST(host_cmd_motion_sense, test_fifo_read) diff --git a/zephyr/test/drivers/host_cmd/src/pd_chip_info.c b/zephyr/test/drivers/host_cmd/src/pd_chip_info.c new file mode 100644 index 0000000000..95e2339899 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/pd_chip_info.c @@ -0,0 +1,65 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#define TEST_PORT USBC_PORT_C0 +#define BAD_PORT 65 + +static enum ec_status run_pd_chip_info(int port, + struct ec_response_pd_chip_info_v1 *resp) +{ + struct ec_params_pd_chip_info params = { .port = port, .live = true }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_PD_CHIP_INFO, 1, resp, params); + + return host_command_process(&args); +} + +ZTEST_USER(host_cmd_pd_chip_info, test_good_index) +{ + struct ec_response_pd_chip_info_v1 response; + + zassert_ok(run_pd_chip_info(TEST_PORT, &response), + "Failed to process pd_get_chip_info for port %d", TEST_PORT); + /* + * Note: verification of the specific fields depends on the chips used + * and therefore would belong in a driver-level test + */ +} + +ZTEST_USER(host_cmd_pd_chip_info, test_bad_index) +{ + struct ec_response_pd_chip_info_v1 response; + + zassume_true(board_get_usb_pd_port_count() < BAD_PORT, + "Intended bad port exists"); + zassert_equal(run_pd_chip_info(BAD_PORT, &response), + EC_RES_INVALID_PARAM, + "Failed to fail pd_chip_info for port %d", BAD_PORT); +} + +static void host_cmd_pd_chip_info_begin(void *data) +{ + ARG_UNUSED(data); + + /* Assume we have at least one USB-C port */ + zassume_true(board_get_usb_pd_port_count() > 0, + "Insufficient TCPCs found"); + + /* Set the system into S0, since the AP would drive these commands */ + test_set_chipset_to_s0(); + k_sleep(K_SECONDS(1)); +} + +ZTEST_SUITE(host_cmd_pd_chip_info, drivers_predicate_post_main, NULL, + host_cmd_pd_chip_info_begin, NULL, NULL); diff --git a/zephyr/test/drivers/host_cmd/src/pd_control.c b/zephyr/test/drivers/host_cmd/src/pd_control.c new file mode 100644 index 0000000000..e8de27f6ce --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/pd_control.c @@ -0,0 +1,129 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/fff.h> +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#define TEST_PORT USBC_PORT_C0 +#define BAD_PORT 82 + +ZTEST_USER(host_cmd_pd_control, test_bad_index) +{ + struct ec_params_pd_control params = { .chip = BAD_PORT, + .subcmd = PD_RESET }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_PD_CONTROL, 0, params); + + zassume_true(board_get_usb_pd_port_count() < BAD_PORT, + "Intended bad port exists"); + zassert_equal(host_command_process(&args), EC_RES_INVALID_PARAM, + "Failed to fail pd_control for port %d", params.chip); +} + +ZTEST_USER(host_cmd_pd_control, test_unimplemented_command) +{ + struct ec_params_pd_control params = { .chip = TEST_PORT, + .subcmd = PD_CHIP_ON }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_PD_CONTROL, 0, params); + + zassert_equal(host_command_process(&args), EC_RES_INVALID_COMMAND, + "Failed to fail pd_control for port %d", params.chip); +} + +ZTEST_USER(host_cmd_pd_control, test_pd_reset_resume) +{ + /* + * Note: this would ideally be a host command interface check, but + * the only HC return which would cover this is a state string, which + * could be brittle. + */ + zassume_true(pd_is_port_enabled(TEST_PORT), "Port not up at beginning"); + + host_cmd_pd_control(TEST_PORT, PD_RESET); + + zassert_equal(1, board_reset_pd_mcu_fake.call_count, + "Failed to see board reset"); + + /* Give some PD task processing time */ + k_sleep(K_SECONDS(1)); + + zassert_false(pd_is_port_enabled(TEST_PORT), "Port failed to suspend"); + + host_cmd_pd_control(TEST_PORT, PD_RESUME); + + /* Give some PD task processing time */ + k_sleep(K_SECONDS(1)); + + zassert_true(pd_is_port_enabled(TEST_PORT), "Port failed to resume"); + + RESET_FAKE(board_reset_pd_mcu); +} + +ZTEST_USER(host_cmd_pd_control, test_suspend_resume) +{ + /* + * Note: this would ideally be a host command interface check, but + * the only HC return which would cover this is a state string, which + * could be brittle. + */ + zassume_true(pd_is_port_enabled(TEST_PORT), "Port not up at beginning"); + + host_cmd_pd_control(TEST_PORT, PD_SUSPEND); + + /* Give some PD task processing time */ + k_sleep(K_SECONDS(1)); + + zassert_false(pd_is_port_enabled(TEST_PORT), "Port failed to suspend"); + + host_cmd_pd_control(TEST_PORT, PD_RESUME); + + /* Give some PD task processing time */ + k_sleep(K_SECONDS(1)); + + zassert_true(pd_is_port_enabled(TEST_PORT), "Port failed to resume"); +} + +ZTEST_USER(host_cmd_pd_control, test_control_disable) +{ + struct ec_params_pd_control params = { .chip = TEST_PORT, + .subcmd = PD_RESET }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_PD_CONTROL, 0, params); + + host_cmd_pd_control(TEST_PORT, PD_CONTROL_DISABLE); + + zassert_equal(host_command_process(&args), EC_RES_ACCESS_DENIED, + "Access was not denied for port %d", params.chip); + + /* + * Disable lasts as long as the EC is booted. Use a test hook to + * restore our state to a normal one + */ + pd_control_port_enable(TEST_PORT); +} + +static void host_cmd_pd_control_begin(void *data) +{ + ARG_UNUSED(data); + + /* Assume we have at least one USB-C port */ + zassume_true(board_get_usb_pd_port_count() > 0, + "Insufficient TCPCs found"); + + /* Set the system into S0, since the AP would drive these commands */ + test_set_chipset_to_s0(); + k_sleep(K_SECONDS(1)); +} + +ZTEST_SUITE(host_cmd_pd_control, drivers_predicate_post_main, NULL, + host_cmd_pd_control_begin, NULL, NULL); diff --git a/zephyr/test/drivers/host_cmd/src/pd_log.c b/zephyr/test/drivers/host_cmd/src/pd_log.c new file mode 100644 index 0000000000..a6022d8bb1 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/pd_log.c @@ -0,0 +1,135 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "event_log.h" +#include "host_command.h" +#include "test/drivers/test_state.h" +#include "usb_pd.h" + +/** + * @brief This is the maximum size of a single log entry. + * + * Each entry must contain some common data + up to 16 bytes of additional type + * specific data. + */ +#define MAX_EVENT_LOG_ENTRY_SIZE (sizeof(struct event_log_entry) + 16) + +/** + * @brief The size of the PD log entry data + * + * Logs from the PD include an additional 8 bytes of data to be sent to the AP. + */ +#define PD_LOG_ENTRY_DATA_SIZE (8) + +struct pd_log_fixture { + union { + uint8_t event_log_buffer[MAX_EVENT_LOG_ENTRY_SIZE]; + struct event_log_entry log_entry; + }; +}; + +static void *pd_log_setup(void) +{ + static struct pd_log_fixture fixture; + + return &fixture; +} + +static void pd_log_before(void *f) +{ + struct pd_log_fixture *fixture = f; + + while (log_dequeue_event(&fixture->log_entry) != 0) { + if (fixture->log_entry.type == EVENT_LOG_NO_ENTRY) { + break; + } + } +} + +ZTEST_SUITE(pd_log, drivers_predicate_post_main, pd_log_setup, pd_log_before, + NULL, NULL); + +ZTEST_USER(pd_log, test_bad_type) +{ + struct ec_params_pd_write_log_entry params = { + .type = PD_EVENT_ACC_BASE, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_PD_WRITE_LOG_ENTRY, UINT8_C(0), params); + + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&args), NULL); +} + +ZTEST_USER(pd_log, test_bad_port) +{ + struct ec_params_pd_write_log_entry params = { + .type = PD_EVENT_MCU_BASE, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_PD_WRITE_LOG_ENTRY, UINT8_C(0), params); + + params.port = board_get_usb_pd_port_count() + 1; + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&args), NULL); +} + +ZTEST_USER_F(pd_log, test_mcu_charge) +{ + struct ec_params_pd_write_log_entry params = { + .type = PD_EVENT_MCU_CHARGE, + .port = 0, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_PD_WRITE_LOG_ENTRY, UINT8_C(0), params); + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(sizeof(struct event_log_entry) + PD_LOG_ENTRY_DATA_SIZE, + log_dequeue_event(&fixture->log_entry), NULL); + zassert_equal(params.type, fixture->log_entry.type, NULL); + zassert_equal(PD_LOG_ENTRY_DATA_SIZE, fixture->log_entry.size, NULL); + zassert_equal(0, fixture->log_entry.data, NULL); + zassert_within(0, (int64_t)fixture->log_entry.timestamp, 10, + "Expected timestamp %" PRIi64 + " to be within 10 ms of now", + (int64_t)fixture->log_entry.timestamp); +} +ZTEST_USER_F(pd_log, test_mcu_connect) +{ + struct ec_params_pd_write_log_entry params = { + .type = PD_EVENT_MCU_CONNECT, + .port = 0, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_PD_WRITE_LOG_ENTRY, UINT8_C(0), params); + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(sizeof(struct event_log_entry), + log_dequeue_event(&fixture->log_entry), NULL); + zassert_equal(params.type, fixture->log_entry.type, NULL); + zassert_equal(0, fixture->log_entry.size, NULL); + zassert_equal(0, fixture->log_entry.data, NULL); + zassert_within(0, (int64_t)fixture->log_entry.timestamp, 10, + "Expected timestamp %" PRIi64 + " to be within 10 ms of now", + (int64_t)fixture->log_entry.timestamp); +} + +ZTEST_USER_F(pd_log, test_read_log_entry) +{ + uint8_t response_buffer[sizeof(struct ec_response_pd_log) + 16]; + struct ec_response_pd_log *response = + (struct ec_response_pd_log *)response_buffer; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_SIMPLE(EC_CMD_PD_GET_LOG_ENTRY, UINT8_C(0)); + + args.response = response; + args.response_max = sizeof(response_buffer); + + zassert_ok(host_command_process(&args), NULL); + zassert_equal(sizeof(struct event_log_entry), args.response_size, NULL); + zassert_equal(PD_EVENT_NO_ENTRY, response->type, NULL); +} diff --git a/zephyr/test/drivers/host_cmd/src/usb_pd_control.c b/zephyr/test/drivers/host_cmd/src/usb_pd_control.c new file mode 100644 index 0000000000..c439141da9 --- /dev/null +++ b/zephyr/test/drivers/host_cmd/src/usb_pd_control.c @@ -0,0 +1,151 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/shell/shell.h> +#include <zephyr/ztest.h> + +#include "console.h" +#include "ec_commands.h" +#include "emul/emul_isl923x.h" +#include "emul/tcpc/emul_ps8xxx.h" +#include "emul/tcpc/emul_tcpci.h" +#include "emul/tcpc/emul_tcpci_partner_snk.h" +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" + +#define TEST_PORT USBC_PORT_C0 +#define BAD_PORT 42 + +struct host_cmd_usb_pd_control_fixture { + const struct emul *tcpci_emul; + const struct emul *charger_emul; + struct tcpci_partner_data partner; + struct tcpci_snk_emul_data snk_ext; +}; + +static enum ec_status +run_usb_pd_control(int port, struct ec_response_usb_pd_control_v2 *resp) +{ + /* + * Note: while arguments exist to change the PD state, their use is + * discouraged as that causes the response to have non-deterministic + * results. The kernel only uses the "no change" parameters, so that is + * what we shall test here. + */ + struct ec_params_usb_pd_control params = { + .port = port, + .role = USB_PD_CTRL_ROLE_NO_CHANGE, + .mux = USB_PD_CTRL_MUX_NO_CHANGE, + .swap = USB_PD_CTRL_SWAP_NONE + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_USB_PD_CONTROL, 2, *resp, params); + + return host_command_process(&args); +} + +ZTEST_USER(host_cmd_usb_pd_control, test_good_index_no_partner) +{ + struct ec_response_usb_pd_control_v2 response; + + zassert_ok(run_usb_pd_control(TEST_PORT, &response), + "Failed to process usb_pd_control for port %d", TEST_PORT); + + /* Verify basic not-connected expectations */ + zassert_equal(response.enabled, 0, + "Failed to find nothing enabled: 0x%02x", + response.enabled); + /* Don't verify role, cc, or polarity as it isn't meaningful */ + zassert_equal(response.control_flags, 0, "Failed to see flags cleared"); +} + +ZTEST_USER_F(host_cmd_usb_pd_control, test_good_index_sink_partner) +{ + struct ec_response_usb_pd_control_v2 response; + + /* Attach simple sink that shouldn't do any swaps */ + connect_sink_to_port(&fixture->partner, fixture->tcpci_emul, + fixture->charger_emul); + + /* Wait for connection to settle */ + k_sleep(K_SECONDS(1)); + + zassert_ok(run_usb_pd_control(TEST_PORT, &response), + "Failed to process usb_pd_control for port %d", TEST_PORT); + + /* Verify basic sink expectations */ + zassert_equal( + response.enabled, + (PD_CTRL_RESP_ENABLED_COMMS | PD_CTRL_RESP_ENABLED_CONNECTED | + PD_CTRL_RESP_ENABLED_PD_CAPABLE), + "Failed to see full connection: 0x%02x", response.enabled); + /* + * We should be source, DFP, Vconn source, and we set our sink caps + * to USB comms + */ + zassert_equal(response.role, + (PD_CTRL_RESP_ROLE_USB_COMM | PD_CTRL_RESP_ROLE_POWER | + PD_CTRL_RESP_ROLE_DATA | PD_CTRL_RESP_ROLE_VCONN), + "Failed to see expected role: 0x%02x", response.role); + zassert_equal(response.cc_state, PD_CC_UFP_ATTACHED, + "Failed to see UFP attached"); + zassert_equal(response.control_flags, 0, "Failed to see flags cleared"); +} + +ZTEST_USER(host_cmd_usb_pd_control, test_bad_index) +{ + struct ec_response_usb_pd_control_v2 response; + + zassume_true(board_get_usb_pd_port_count() < BAD_PORT, + "Intended bad port exists"); + zassert_equal(run_usb_pd_control(BAD_PORT, &response), + EC_RES_INVALID_PARAM, + "Failed to fail usb_pd_control for port %d", BAD_PORT); +} + +static void *host_cmd_usb_pd_control_setup(void) +{ + static struct host_cmd_usb_pd_control_fixture fixture; + struct tcpci_partner_data *partner = &fixture.partner; + struct tcpci_snk_emul_data *snk_ext = &fixture.snk_ext; + + tcpci_partner_init(partner, PD_REV30); + partner->extensions = tcpci_snk_emul_init(snk_ext, partner, NULL); + + /* Get references for the emulators */ + fixture.tcpci_emul = EMUL_DT_GET(DT_NODELABEL(tcpci_emul)); + fixture.charger_emul = EMUL_DT_GET(DT_NODELABEL(isl923x_emul)); + + /* Sink 5V 3A. */ + snk_ext->pdo[0] = PDO_FIXED(5000, 3000, PDO_FIXED_COMM_CAP); + + return &fixture; +} + +static void host_cmd_usb_pd_control_before(void *data) +{ + ARG_UNUSED(data); + + /* Assume we have at least one USB-C port */ + zassume_true(board_get_usb_pd_port_count() > 0, + "Insufficient TCPCs found"); + + /* Set the system into S0, since the AP would drive these commands */ + test_set_chipset_to_s0(); + k_sleep(K_SECONDS(1)); +} + +static void host_cmd_usb_pd_control_after(void *data) +{ + struct host_cmd_usb_pd_control_fixture *fixture = data; + + disconnect_sink_from_port(fixture->tcpci_emul); + k_sleep(K_SECONDS(1)); +} + +ZTEST_SUITE(host_cmd_usb_pd_control, drivers_predicate_post_main, + host_cmd_usb_pd_control_setup, host_cmd_usb_pd_control_before, + host_cmd_usb_pd_control_after, NULL); diff --git a/zephyr/test/drivers/isl923x/CMakeLists.txt b/zephyr/test/drivers/isl923x/CMakeLists.txt index 36a97589c1..734742c6b6 100644 --- a/zephyr/test/drivers/isl923x/CMakeLists.txt +++ b/zephyr/test/drivers/isl923x/CMakeLists.txt @@ -1,22 +1,9 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# Create library name based on current directory -zephyr_library_get_current_dir_lib_name(${ZEPHYR_BASE} lib_name) - -# Create interface library -zephyr_interface_library_named(${lib_name}) - -# Add include paths -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") - # Add source files -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON - "${CMAKE_CURRENT_SOURCE_DIR}/src/console_cmd_amon_bmon.c") -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_RAMP_HW - "${CMAKE_CURRENT_SOURCE_DIR}/src/charge_ramp_hw.c") - -# Link in the library -zephyr_library_link_libraries(${lib_name}) +target_sources_ifdef(CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON + app PRIVATE src/console_cmd_amon_bmon.c) +target_sources_ifdef(CONFIG_PLATFORM_EC_CHARGE_RAMP_HW + app PRIVATE src/charge_ramp_hw.c) diff --git a/zephyr/test/drivers/isl923x/src/charge_ramp_hw.c b/zephyr/test/drivers/isl923x/src/charge_ramp_hw.c index c1ae9ce240..c814b75de9 100644 --- a/zephyr/test/drivers/isl923x/src/charge_ramp_hw.c +++ b/zephyr/test/drivers/isl923x/src/charge_ramp_hw.c @@ -1,10 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ - -#include <ztest.h> +#include <zephyr/ztest.h> #include "driver/charger/isl923x.h" #include "driver/charger/isl923x_public.h" @@ -14,10 +13,10 @@ #include "test/drivers/test_state.h" #define CHARGER_NUM get_charger_num(&isl923x_drv) -#define ISL923X_EMUL emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))) +#define ISL923X_EMUL EMUL_DT_GET(DT_NODELABEL(isl923x_emul)) -ZTEST_SUITE(charge_ramp_hw, drivers_predicate_post_main, NULL, NULL, - NULL, NULL); +ZTEST_SUITE(charge_ramp_hw, drivers_predicate_post_main, NULL, NULL, NULL, + NULL); ZTEST(charge_ramp_hw, test_charge_ramp_hw_ramp) { @@ -33,20 +32,20 @@ ZTEST(charge_ramp_hw, test_charge_ramp_hw_ramp) ZTEST(charge_ramp_hw, test_charge_ramp_hw_ramp_read_fail_reg0) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + struct i2c_common_emul_data *common_data = + emul_isl923x_get_i2c_common_data(ISL923X_EMUL); - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL0); + i2c_common_emul_set_read_fail_reg(common_data, ISL923X_REG_CONTROL0); zassert_equal(EC_ERROR_INVAL, isl923x_drv.set_hw_ramp(CHARGER_NUM, 1), NULL); } ZTEST(charge_ramp_hw, test_charge_ramp_hw_ramp_read_fail_acl1) { - const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + struct i2c_common_emul_data *common_data = + emul_isl923x_get_i2c_common_data(ISL923X_EMUL); - i2c_common_emul_set_read_fail_reg(i2c_emul, + i2c_common_emul_set_read_fail_reg(common_data, ISL923X_REG_ADAPTER_CURRENT_LIMIT1); zassert_equal(0, isl923x_drv.ramp_get_current_limit(CHARGER_NUM), NULL); } diff --git a/zephyr/test/drivers/isl923x/src/console_cmd_amon_bmon.c b/zephyr/test/drivers/isl923x/src/console_cmd_amon_bmon.c index bdbdd083ba..9246bf5b6b 100644 --- a/zephyr/test/drivers/isl923x/src/console_cmd_amon_bmon.c +++ b/zephyr/test/drivers/isl923x/src/console_cmd_amon_bmon.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,7 @@ #include <zephyr/drivers/adc.h> #include <zephyr/drivers/adc/adc_emul.h> #include <zephyr/shell/shell.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "adc.h" #include "console.h" @@ -21,7 +21,7 @@ #define ADC_DEVICE_NODE DT_NODELABEL(adc0) #define CHARGER_NUM get_charger_num(&isl923x_drv) -#define ISL923X_EMUL emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))) +#define ISL923X_EMUL EMUL_DT_GET(DT_NODELABEL(isl923x_emul)) ZTEST_SUITE(console_cmd_amon_bmon, drivers_predicate_post_main, NULL, NULL, NULL, NULL); @@ -60,13 +60,14 @@ ZTEST(console_cmd_amon_bmon, test_isl923x_amonbmon_get_input_current) } ZTEST(console_cmd_amon_bmon, - test_isl923x_amonbmon_get_input_current_read_fail_req1) + test_isl923x_amonbmon_get_input_current_read_fail_req1) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + struct i2c_common_emul_data *common_data = + emul_isl923x_get_i2c_common_data(isl923x_emul); int current_milli_amps; - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_read_fail_reg(common_data, ISL923X_REG_CONTROL1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_input_current(CHARGER_NUM, ¤t_milli_amps), @@ -76,13 +77,14 @@ ZTEST(console_cmd_amon_bmon, } ZTEST(console_cmd_amon_bmon, - test_isl923x_amonbmon_get_input_current_read_fail_req3) + test_isl923x_amonbmon_get_input_current_read_fail_req3) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + struct i2c_common_emul_data *common_data = + emul_isl923x_get_i2c_common_data(isl923x_emul); int current_milli_amps; - i2c_common_emul_set_read_fail_reg(i2c_emul, ISL9238_REG_CONTROL3); + i2c_common_emul_set_read_fail_reg(common_data, ISL9238_REG_CONTROL3); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_input_current(CHARGER_NUM, ¤t_milli_amps), @@ -90,13 +92,14 @@ ZTEST(console_cmd_amon_bmon, } ZTEST(console_cmd_amon_bmon, - test_isl923x_amonbmon_get_input_current_write_fail_req1) + test_isl923x_amonbmon_get_input_current_write_fail_req1) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + struct i2c_common_emul_data *common_data = + emul_isl923x_get_i2c_common_data(isl923x_emul); int current_milli_amps; - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL923X_REG_CONTROL1); + i2c_common_emul_set_write_fail_reg(common_data, ISL923X_REG_CONTROL1); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_input_current(CHARGER_NUM, ¤t_milli_amps), @@ -104,13 +107,14 @@ ZTEST(console_cmd_amon_bmon, } ZTEST(console_cmd_amon_bmon, - test_isl923x_amonbmon_get_input_current_write_fail_req3) + test_isl923x_amonbmon_get_input_current_write_fail_req3) { const struct emul *isl923x_emul = ISL923X_EMUL; - struct i2c_emul *i2c_emul = isl923x_emul_get_i2c_emul(isl923x_emul); + struct i2c_common_emul_data *common_data = + emul_isl923x_get_i2c_common_data(isl923x_emul); int current_milli_amps; - i2c_common_emul_set_write_fail_reg(i2c_emul, ISL9238_REG_CONTROL3); + i2c_common_emul_set_write_fail_reg(common_data, ISL9238_REG_CONTROL3); zassert_equal(EC_ERROR_INVAL, isl923x_drv.get_input_current(CHARGER_NUM, ¤t_milli_amps), diff --git a/zephyr/test/drivers/keyboard_scan/CMakeLists.txt b/zephyr/test/drivers/keyboard_scan/CMakeLists.txt new file mode 100644 index 0000000000..07040187f2 --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/CMakeLists.txt @@ -0,0 +1,15 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_sources(app PRIVATE + src/keyboard_backlight.c + src/keyboard_scan.c + src/keyboard_test_utils.c + src/mkbp_event.c + src/mkbp_info.c +) + +target_include_directories(app PRIVATE + ${CMAKE_CURRENT_SOURCE_DIR}/include +) diff --git a/zephyr/test/drivers/keyboard_scan/include/keyboard_test_utils.h b/zephyr/test/drivers/keyboard_scan/include/keyboard_test_utils.h new file mode 100644 index 0000000000..0117fea09c --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/include/keyboard_test_utils.h @@ -0,0 +1,19 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @brief Press or release a key through the keyboard emulator + * + * @param row Key row + * @param col Key column + * @param pressed 1 if pressed, 0 otherwise + * @return int 0 if successful + */ +int emulate_keystate(int row, int col, int pressed); + +/** + * @brief Clears any pressed keys in the keyboard emulator + */ +void clear_emulated_keys(void); diff --git a/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c b/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c new file mode 100644 index 0000000000..149f25dfdd --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/src/keyboard_backlight.c @@ -0,0 +1,134 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <string.h> +#include <zephyr/ztest.h> +#include <zephyr/kernel.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest_assert.h> + +#include "console.h" +#include "host_command.h" +#include "keyboard_backlight.h" +#include "test/drivers/test_state.h" + +/** + * @brief Send host command to set the backlight percentage + * + * @param percent Backlight intensity, from 0 to 100 (inclusive). + * @return uint16_t Host command return code + */ +static uint16_t set_backlight_percent_helper(uint8_t percent) +{ + struct ec_params_pwm_set_keyboard_backlight params = { + .percent = percent + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT, 0, params); + + return host_command_process(&args); +} + +ZTEST(keyboard_backlight, host_command_set_backlight__normal) +{ + /* Set the backlight intensity level to this and verify */ + uint8_t expected_percentage = 50; + + zassert_ok(set_backlight_percent_helper(expected_percentage), NULL); + zassert_equal(expected_percentage, kblight_get(), NULL); +} + +ZTEST(keyboard_backlight, host_command_set_backlight__out_of_range) +{ + /* Too high */ + uint8_t expected_percentage = 101; + + zassert_equal(EC_RES_ERROR, + set_backlight_percent_helper(expected_percentage), NULL); +} + +ZTEST(keyboard_backlight, host_command_get_backlight__normal) +{ + /* Set this backlight intensity and verify via host command */ + uint8_t expected_percentage = 50; + int ret; + + zassume_ok(set_backlight_percent_helper(expected_percentage), NULL); + + /* Brief delay to allow a deferred function to enable the backlight */ + k_sleep(K_MSEC(50)); + + struct ec_response_pwm_get_keyboard_backlight response; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND_RESPONSE( + EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT, 0, response); + + ret = host_command_process(&args); + zassert_ok(ret, "Host command failed: %d", ret); + zassert_equal(expected_percentage, response.percent, NULL); + zassert_equal(1, response.enabled, "Got 0x%02x", response.enabled); +} + +ZTEST(keyboard_backlight, console_command__noargs) +{ + /* Command should print current status. Set backlight on and to 70% */ + + const char *outbuffer; + size_t buffer_size; + + zassume_ok(set_backlight_percent_helper(70), NULL); + k_sleep(K_MSEC(50)); + + /* With no args, print current state */ + shell_backend_dummy_clear_output(get_ec_shell()); + zassert_ok(shell_execute_cmd(get_ec_shell(), "kblight"), NULL); + outbuffer = + shell_backend_dummy_get_output(get_ec_shell(), &buffer_size); + + zassert_ok(!strstr(outbuffer, "Keyboard backlight: 70% enabled: 1"), + "Actual string: `%s`", outbuffer); +} + +ZTEST(keyboard_backlight, console_command__set_on) +{ + /* Command should enable backlight to given intensity */ + + zassert_ok(shell_execute_cmd(get_ec_shell(), "kblight 65"), NULL); + zassert_equal(65, kblight_get(), NULL); + zassert_equal(1, kblight_get_current_enable(), NULL); +} + +ZTEST(keyboard_backlight, console_command__set_off) +{ + zassume_ok(set_backlight_percent_helper(40), NULL); + k_sleep(K_MSEC(50)); + + /* Turn back off */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "kblight 0"), NULL); + zassert_equal(0, kblight_get(), NULL); + zassert_equal(0, kblight_get_current_enable(), NULL); +} + +ZTEST(keyboard_backlight, console_command__bad_params) +{ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "kblight NaN"), NULL); + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "kblight -1"), NULL); + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(get_ec_shell(), "kblight 101"), NULL); +} + +static void reset(void *data) +{ + ARG_UNUSED(data); + + /* Reset the backlight to off and 0% brightness */ + kblight_set(0); + kblight_enable(0); +} + +ZTEST_SUITE(keyboard_backlight, drivers_predicate_post_main, NULL, reset, reset, + NULL); diff --git a/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c b/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c new file mode 100644 index 0000000000..c7955ec655 --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/src/keyboard_scan.c @@ -0,0 +1,420 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <string.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/fff.h> +#include <emul/emul_kb_raw.h> + +#include "console.h" +#include "host_command.h" +#include "keyboard_scan.h" +#include "keyboard_test_utils.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" + +ZTEST(keyboard_scan, test_boot_key) +{ + const struct device *dev = DEVICE_DT_GET(DT_NODELABEL(cros_kb_raw)); + const int kb_cols = DT_PROP(DT_NODELABEL(cros_kb_raw), cols); + + emul_kb_raw_reset(dev); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_NONE, NULL); + + /* Case 1: refresh + esc -> BOOT_KEY_ESC */ + emul_kb_raw_reset(dev); + zassert_ok(emulate_keystate(KEYBOARD_ROW_REFRESH, KEYBOARD_COL_REFRESH, + true), + NULL); + zassert_ok(emulate_keystate(KEYBOARD_ROW_ESC, KEYBOARD_COL_ESC, true), + NULL); + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_ESC, NULL); + + /* + * Case 1.5: + * GSC may hold ksi2 when power button is pressed, simulate this + * behavior and verify boot key detection again. + */ + zassert_true(IS_ENABLED(CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2), NULL); + for (int i = 0; i < kb_cols; i++) { + zassert_ok(emulate_keystate(KEYBOARD_ROW_REFRESH, i, true), + NULL); + } + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_ESC, NULL); + + /* Case 2: esc only -> BOOT_KEY_NONE */ + emul_kb_raw_reset(dev); + zassert_ok(emulate_keystate(KEYBOARD_ROW_ESC, KEYBOARD_COL_ESC, true), + NULL); + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_NONE, NULL); + + /* Case 3: refresh + arrow down -> BOOT_KEY_DOWN_ARROW */ + emul_kb_raw_reset(dev); + zassert_ok(emulate_keystate(KEYBOARD_ROW_REFRESH, KEYBOARD_COL_REFRESH, + true), + NULL); + zassert_ok(emulate_keystate(KEYBOARD_ROW_DOWN, KEYBOARD_COL_DOWN, true), + NULL); + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_DOWN_ARROW, NULL); + + /* Case 4: refresh + L shift -> BOOT_KEY_LEFT_SHIFT */ + emul_kb_raw_reset(dev); + zassert_ok(emulate_keystate(KEYBOARD_ROW_REFRESH, KEYBOARD_COL_REFRESH, + true), + NULL); + zassert_ok(emulate_keystate(KEYBOARD_ROW_LEFT_SHIFT, + KEYBOARD_COL_LEFT_SHIFT, true), + NULL); + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_LEFT_SHIFT, NULL); + + /* Case 5: refresh + esc + other random key -> BOOT_KEY_NONE */ + emul_kb_raw_reset(dev); + zassert_ok(emulate_keystate(KEYBOARD_ROW_REFRESH, KEYBOARD_COL_REFRESH, + true), + NULL); + zassert_ok(emulate_keystate(KEYBOARD_ROW_ESC, KEYBOARD_COL_ESC, true), + NULL); + zassert_ok(emulate_keystate(KEYBOARD_ROW_KEY_0, KEYBOARD_COL_KEY_0, + true), + NULL); + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_NONE, NULL); + + /* Case 6: BOOT_KEY_NONE after late sysjump */ + system_jumped_late_fake.return_val = 1; + emul_kb_raw_reset(dev); + zassert_ok(emulate_keystate(KEYBOARD_ROW_REFRESH, KEYBOARD_COL_REFRESH, + true), + NULL); + zassert_ok(emulate_keystate(KEYBOARD_ROW_LEFT_SHIFT, + KEYBOARD_COL_LEFT_SHIFT, true), + NULL); + keyboard_scan_init(); + zassert_equal(keyboard_scan_get_boot_keys(), BOOT_KEY_NONE, NULL); +} + +ZTEST(keyboard_scan, test_press_enter) +{ + zassert_ok(emulate_keystate(4, 11, true), NULL); + k_sleep(K_MSEC(100)); + /* TODO(jbettis): Check espi_emul to verify the AP was notified. */ + zassert_ok(emulate_keystate(4, 11, false), NULL); + k_sleep(K_MSEC(100)); +} + +ZTEST(keyboard_scan, console_command_ksstate__noargs) +{ + const char *outbuffer; + size_t buffer_size; + + /* With no args, print current state */ + shell_backend_dummy_clear_output(get_ec_shell()); + zassert_ok(shell_execute_cmd(get_ec_shell(), "ksstate"), NULL); + outbuffer = + shell_backend_dummy_get_output(get_ec_shell(), &buffer_size); + + /* Check for some expected lines */ + zassert_true(buffer_size > 0, NULL); + zassert_ok(!strstr(outbuffer, "Keyboard scan disable mask: 0x00000000"), + "Output was: `%s`", outbuffer); + zassert_ok(!strstr(outbuffer, "Keyboard scan state printing off"), + "Output was: `%s`", outbuffer); + + /* Ensure we are still scanning */ + zassert_true(keyboard_scan_is_enabled(), NULL); +} + +ZTEST(keyboard_scan, console_command_ksstate__force) +{ + /* This command forces the keyboard to start scanning (if not already) + * and enable state change printing. To test: turn scanning off, run + * command, and verify we are scanning and printing state + */ + + keyboard_scan_enable(false, -1); + zassume_false(keyboard_scan_is_enabled(), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "ksstate force"), NULL); + + zassert_true(keyboard_scan_is_enabled(), NULL); + zassert_true(keyboard_scan_get_print_state_changes(), NULL); +} + +ZTEST(keyboard_scan, console_command_ksstate__on_off) +{ + /* This command turns state change printing on/off */ + + zassume_false(keyboard_scan_get_print_state_changes(), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "ksstate on"), NULL); + zassert_true(keyboard_scan_get_print_state_changes(), NULL); + + zassert_ok(shell_execute_cmd(get_ec_shell(), "ksstate off"), NULL); + zassert_false(keyboard_scan_get_print_state_changes(), NULL); +} + +ZTEST(keyboard_scan, console_command_ksstate__invalid) +{ + /* Pass a string that cannot be parsed as a bool */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "ksstate xyz"), NULL); +} + +ZTEST(keyboard_scan, console_command_kbpress__noargs) +{ + const char *outbuffer; + size_t buffer_size; + + /* With no args, print list of simulated keys */ + shell_backend_dummy_clear_output(get_ec_shell()); + zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress"), NULL); + outbuffer = + shell_backend_dummy_get_output(get_ec_shell(), &buffer_size); + + /* Check for an expected line */ + zassert_true(buffer_size > 0, NULL); + zassert_ok(!strstr(outbuffer, "Simulated keys:"), "Output was: `%s`", + outbuffer); +} + +ZTEST(keyboard_scan, console_command_kbpress__invalid) +{ + /* Row or column number out of range, or wrong type */ + zassert_ok(!shell_execute_cmd(get_ec_shell(), "kbpress -1 0"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "kbpress foo 0"), NULL); + zassert_ok(!shell_execute_cmd( + get_ec_shell(), + "kbpress " STRINGIFY(KEYBOARD_COLS_MAX) " 0"), + NULL); + + zassert_ok(!shell_execute_cmd(get_ec_shell(), "kbpress 0 -1"), NULL); + zassert_ok(!shell_execute_cmd(get_ec_shell(), "kbpress 0 foo"), NULL); + zassert_ok( + !shell_execute_cmd(get_ec_shell(), + "kbpress 0 " STRINGIFY(KEYBOARD_COLS_MAX)), + NULL); +} + +/* Mock the key_state_changed callback that the key scan task invokes whenever + * a key event occurs. This will capture a history of key presses. + */ +FAKE_VOID_FUNC(key_state_changed, int, int, uint8_t); + +ZTEST(keyboard_scan, console_command_kbpress__press_and_release) +{ + /* Pres and release a key */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 1 2"), NULL); + + /* Hold a key down */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 3 4 1"), NULL); + + /* Release the key */ + zassert_ok(shell_execute_cmd(get_ec_shell(), "kbpress 3 4 0"), NULL); + + /* Pause a bit to allow the key scan task to process. */ + k_sleep(K_MSEC(200)); + + /* Expect four key events */ + zassert_equal(4, key_state_changed_fake.call_count, NULL); + + /* Press col=1,row=2 (state==1) */ + zassert_equal(1, key_state_changed_fake.arg1_history[0], NULL); + zassert_equal(2, key_state_changed_fake.arg0_history[0], NULL); + zassert_true(key_state_changed_fake.arg2_history[0], NULL); + + /* Release col=1,row=2 (state==0) */ + zassert_equal(1, key_state_changed_fake.arg1_history[1], NULL); + zassert_equal(2, key_state_changed_fake.arg0_history[1], NULL); + zassert_false(key_state_changed_fake.arg2_history[1], NULL); + + /* Press col=3,row=4 (state==1) */ + zassert_equal(3, key_state_changed_fake.arg1_history[2], NULL); + zassert_equal(4, key_state_changed_fake.arg0_history[2], NULL); + zassert_true(key_state_changed_fake.arg2_history[2], NULL); + + /* Release col=3,row=4 (state==0) */ + zassert_equal(3, key_state_changed_fake.arg1_history[3], NULL); + zassert_equal(4, key_state_changed_fake.arg0_history[3], NULL); + zassert_false(key_state_changed_fake.arg2_history[3], NULL); +} + +ZTEST(keyboard_scan, host_command_simulate_key__locked) +{ + uint16_t ret; + + zassume_true(system_is_locked(), "Expecting locked system."); + + struct ec_response_keyboard_factory_test response; + struct ec_params_mkbp_simulate_key params; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_MKBP_SIMULATE_KEY, 0, response, params); + + ret = host_command_process(&args); + zassert_equal(EC_RES_ACCESS_DENIED, ret, "Command returned %u", ret); +} + +ZTEST(keyboard_scan, host_command_simulate_key__bad_params) +{ + uint16_t ret; + + system_is_locked_fake.return_val = 0; + zassume_false(system_is_locked(), "Expecting unlocked system."); + + struct ec_response_keyboard_factory_test response; + struct ec_params_mkbp_simulate_key params = { + .col = KEYBOARD_COLS_MAX, + .row = KEYBOARD_ROWS, + }; + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_MKBP_SIMULATE_KEY, 0, response, params); + + ret = host_command_process(&args); + zassert_equal(EC_RES_INVALID_PARAM, ret, "Command returned %u", ret); +} + +/** + * @brief Helper function that sends a host command to press or release the + * specified key. + * + * @param col Key column + * @param row Key row + * @param pressed 1=press, 0=release + * @return uint16_t Host command return code. + */ +static uint16_t send_keypress_host_command(uint8_t col, uint8_t row, + uint8_t pressed) +{ + struct ec_params_mkbp_simulate_key params = { + .col = col, + .row = row, + .pressed = pressed, + }; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_MKBP_SIMULATE_KEY, 0, params); + + return host_command_process(&args); +} + +ZTEST(keyboard_scan, host_command_simulate__key_press) +{ + uint16_t ret; + + system_is_locked_fake.return_val = 0; + zassume_false(system_is_locked(), "Expecting unlocked system."); + + ret = send_keypress_host_command(1, 2, 1); + zassert_equal(EC_RES_SUCCESS, ret, "Command returned %u", ret); + + /* Release the key */ + ret = send_keypress_host_command(1, 2, 0); + zassert_equal(EC_RES_SUCCESS, ret, "Command returned %u", ret); + + /* Verify key events happened */ + + zassert_equal(2, key_state_changed_fake.call_count, NULL); + + /* Press col=1,row=2 (state==1) */ + zassert_equal(1, key_state_changed_fake.arg1_history[0], NULL); + zassert_equal(2, key_state_changed_fake.arg0_history[0], NULL); + zassert_true(key_state_changed_fake.arg2_history[0], NULL); + + /* Release col=1,row=2 (state==0) */ + zassert_equal(1, key_state_changed_fake.arg1_history[1], NULL); + zassert_equal(2, key_state_changed_fake.arg0_history[1], NULL); + zassert_false(key_state_changed_fake.arg2_history[1], NULL); +} + +FAKE_VOID_FUNC(system_enter_hibernate, uint32_t, uint32_t); +FAKE_VOID_FUNC(chipset_reset, int); + +ZTEST(keyboard_scan, special_key_combos) +{ + system_is_locked_fake.return_val = 0; + zassume_false(system_is_locked(), "Expecting unlocked system."); + + /* Set the volume up key coordinates to something arbitrary */ + int vol_up_col = 1; + int vol_up_row = 2; + + set_vol_up_key(vol_up_row, vol_up_col); + + /* Vol up and the alt keys must be in different columns */ + zassume_false(vol_up_col == KEYBOARD_COL_LEFT_ALT, NULL); + + /* Hold down volume up, left alt (either alt key works), and R */ + zassert_ok(send_keypress_host_command(vol_up_col, vol_up_row, 1), NULL); + zassert_ok(send_keypress_host_command(KEYBOARD_COL_LEFT_ALT, + KEYBOARD_ROW_LEFT_ALT, 1), + NULL); + zassert_ok(send_keypress_host_command(KEYBOARD_COL_KEY_R, + KEYBOARD_ROW_KEY_R, 1), + NULL); + + k_sleep(K_MSEC(100)); + + /* Release R and the press H */ + zassert_ok(send_keypress_host_command(KEYBOARD_COL_KEY_R, + KEYBOARD_ROW_KEY_R, 0), + NULL); + zassert_ok(send_keypress_host_command(KEYBOARD_COL_KEY_H, + KEYBOARD_ROW_KEY_H, 1), + NULL); + + k_sleep(K_MSEC(100)); + + /* Release all */ + zassert_ok(send_keypress_host_command(vol_up_col, vol_up_row, 0), NULL); + zassert_ok(send_keypress_host_command(KEYBOARD_COL_LEFT_ALT, + KEYBOARD_ROW_LEFT_ALT, 0), + NULL); + zassert_ok(send_keypress_host_command(KEYBOARD_COL_KEY_H, + KEYBOARD_ROW_KEY_H, 0), + NULL); + + /* Check that a reboot was requested (VOLUP + ALT + R) */ + zassert_equal(1, chipset_reset_fake.call_count, + "Did not try to reboot"); + zassert_equal(CHIPSET_RESET_KB_WARM_REBOOT, + chipset_reset_fake.arg0_history[0], NULL); + + /* Check that we called system_enter_hibernate (VOLUP + ALT + H) */ + zassert_equal(1, system_enter_hibernate_fake.call_count, + "Did not enter hibernate"); +} + +static void reset_keyboard(void *data) +{ + ARG_UNUSED(data); + + /* Enable scanning and clear all reason bits (reason bits explain why + * scanning was disabled -- see `enum kb_scan_disable_masks`) + */ + keyboard_scan_enable(true, -1); + + /* Turn off key state change printing */ + keyboard_scan_set_print_state_changes(0); + + /* Reset KB emulator */ + clear_emulated_keys(); + + /* Reset all mocks. */ + RESET_FAKE(key_state_changed); + RESET_FAKE(system_is_locked); + RESET_FAKE(system_enter_hibernate); + RESET_FAKE(chipset_reset); + + /* Be locked by default */ + system_is_locked_fake.return_val = 1; +} + +ZTEST_SUITE(keyboard_scan, drivers_predicate_post_main, NULL, reset_keyboard, + reset_keyboard, NULL); diff --git a/zephyr/test/drivers/keyboard_scan/src/keyboard_test_utils.c b/zephyr/test/drivers/keyboard_scan/src/keyboard_test_utils.c new file mode 100644 index 0000000000..7b49bd1df4 --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/src/keyboard_test_utils.c @@ -0,0 +1,19 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <emul/emul_kb_raw.h> +#include <zephyr/drivers/emul.h> + +const static struct device *dev = DEVICE_DT_GET(DT_NODELABEL(cros_kb_raw)); + +int emulate_keystate(int row, int col, int pressed) +{ + return emul_kb_raw_set_kbstate(dev, row, col, pressed); +} + +void clear_emulated_keys(void) +{ + emul_kb_raw_reset(dev); +} diff --git a/zephyr/test/drivers/keyboard_scan/src/mkbp_event.c b/zephyr/test/drivers/keyboard_scan/src/mkbp_event.c new file mode 100644 index 0000000000..dee2ba2d1b --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/src/mkbp_event.c @@ -0,0 +1,189 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/ztest.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/fff.h> +#include <emul/emul_kb_raw.h> + +#include "console.h" +#include "host_command.h" +#include "mkbp_event.h" +#include "mkbp_fifo.h" +#include "test/drivers/test_mocks.h" +#include "test/drivers/test_state.h" + +/** + * @brief FFF fake that will be registered as a callback to monitor the EC->AP + * interrupt pin. Implements `gpio_callback_handler_t`. + */ +FAKE_VOID_FUNC(interrupt_gpio_monitor, const struct device *, + struct gpio_callback *, gpio_port_pins_t); + +/** + * @brief Fixture to hold state while the suite is running. + */ +struct event_fixture { + /** Configuration for the interrupt pin change callback */ + struct gpio_callback callback_config; +}; + +static struct event_fixture fixture; + +ZTEST(mkbp_event, host_command_get_events__empty) +{ + /* Issue a host command to get the next event (from any source) */ + uint16_t ret; + struct ec_response_get_next_event response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_NEXT_EVENT, 0, response); + + ret = host_command_process(&args); + zassert_equal(EC_RES_UNAVAILABLE, ret, + "Expected EC_RES_UNAVAILABLE but got %d", ret); +} + +ZTEST(mkbp_event, host_command_get_events__get_event) +{ + /* Dispatch a fake keyboard event and ensure it gets returned by the + * host command. + */ + int ret; + + struct ec_response_get_next_event expected_event = { + .event_type = EC_MKBP_EVENT_KEY_MATRIX, + .data.key_matrix = { + /* Arbitrary key matrix data (uint8_t[13]) */ + 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa, 0xb, + 0xc, 0xd + }, + }; + + /* Add the above event to the MKBP keyboard FIFO and raise the event */ + + ret = mkbp_fifo_add(expected_event.event_type, + (const uint8_t *)&expected_event.data.key_matrix); + activate_mkbp_with_events(BIT(expected_event.event_type)); + + zassert_equal(EC_SUCCESS, ret, "Got %d when adding to FIFO", ret); + + /* Retrieve this event via host command */ + + struct ec_response_get_next_event response; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_NEXT_EVENT, 0, response); + + ret = host_command_process(&args); + zassert_equal(EC_RES_SUCCESS, ret, "Expected EC_RES_SUCCESS but got %d", + ret); + + /* Compare event data in response */ + zassert_equal(expected_event.event_type, response.event_type, + "Got event type 0x%02x", response.event_type); + zassert_mem_equal(&expected_event.data.key_matrix, + &response.data.key_matrix, + sizeof(expected_event.data.key_matrix), + "Event data payload does not match."); + + /* Check for two pin change events (initial assertion when the event + * was sent, and a de-assertion once we retrieved it through the host + * command) + */ + + zassert_equal(2, interrupt_gpio_monitor_fake.call_count, + "Only %d pin events", + interrupt_gpio_monitor_fake.call_count); +} + +ZTEST(mkbp_event, no_ap_response) +{ + /* Cause an event but do not send any host commands. This should cause + * the EC to send the interrupt to the AP 3 times before giving up. + * Use the GPIO emulator to monitor for interrupts. + */ + + int ret; + + struct ec_response_get_next_event expected_event = { + .event_type = EC_MKBP_EVENT_KEY_MATRIX, + }; + + ret = mkbp_fifo_add(expected_event.event_type, + (uint8_t *)&expected_event.data.key_matrix); + activate_mkbp_with_events(BIT(expected_event.event_type)); + zassert_equal(EC_SUCCESS, ret, "Got %d when adding to FIFO", ret); + + /* EC will attempt to signal the interrupt 3 times. Each attempt lasts + * 1 second, so sleep for 5 and then count the number of times the + * interrupt pin was asserted. (It does not get de-asserted) + */ + + k_sleep(K_SECONDS(5)); + + zassert_equal(3, interrupt_gpio_monitor_fake.call_count, + "Interrupt pin asserted only %d times.", + interrupt_gpio_monitor_fake.call_count); +} + +/* Set up a mock for mkbp_send_event(). This function is called by the MKBP + * event sources to signal that a new event is available for servicing. Since we + * are unit testing just event handling code, we do not want the various event + * source tasks to raise unexpected events during testing and throw us off. + * This mock will essentially cause mkbp_send_event() to become a no-op and + * block the reset of the EC code from raising events and interfering. The test + * code will bypass this by calling mkbp_event.c's internal + * `activate_mkbp_with_events()` directly. + */ +FAKE_VALUE_FUNC(int, mkbp_send_event, uint8_t); + +static void *setup(void) +{ + /* Add a callback to the EC->AP interrupt pin so we can log interrupt + * attempts with an FFF fake. + */ + + const struct gpio_dt_spec *interrupt_pin = + GPIO_DT_FROM_NODELABEL(gpio_ap_ec_int_l); + + fixture.callback_config = (struct gpio_callback){ + .pin_mask = BIT(interrupt_pin->pin), + .handler = interrupt_gpio_monitor, + }; + + zassume_ok(gpio_add_callback(interrupt_pin->port, + &fixture.callback_config), + "Could not configure GPIO callback."); + + return &fixture; +} + +static void teardown(void *data) +{ + /* Remove the GPIO callback on the interrupt pin */ + + struct event_fixture *f = (struct event_fixture *)data; + const struct gpio_dt_spec *interrupt_pin = + GPIO_DT_FROM_NODELABEL(gpio_ap_ec_int_l); + + gpio_remove_callback(interrupt_pin->port, &f->callback_config); +} + +static void reset_events(void *data) +{ + /* Clear any keyboard scan events (type EC_MKBP_EVENT_KEY_MATRIX) */ + mkbp_clear_fifo(); + + /* Clear pending events */ + mkbp_event_clear_all(); + + /* Mock reset */ + RESET_FAKE(interrupt_gpio_monitor); + RESET_FAKE(mkbp_send_event); + mkbp_send_event_fake.return_val = 1; +} + +ZTEST_SUITE(mkbp_event, drivers_predicate_post_main, setup, reset_events, + reset_events, teardown); diff --git a/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c b/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c new file mode 100644 index 0000000000..b0d64eb1da --- /dev/null +++ b/zephyr/test/drivers/keyboard_scan/src/mkbp_info.c @@ -0,0 +1,232 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/ztest.h> +#include <zephyr/fff.h> +#include <emul/emul_kb_raw.h> + +#include "console.h" +#include "host_command.h" +#include "keyboard_scan.h" +#include "keyboard_test_utils.h" +#include "mkbp_info.h" +#include "mkbp_input_devices.h" +#include "test/drivers/test_state.h" + +ZTEST(mkbp_info, host_command_mkbp_info__keyboard_info) +{ + /* Get the number of keyboard rows and columns */ + + int ret; + struct ec_response_mkbp_info response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_KBD, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal(KEYBOARD_ROWS, response.rows, NULL); + zassert_equal(KEYBOARD_COLS_MAX, response.cols, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__supported_buttons) +{ + /* Get the set of supported buttons */ + + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_SUPPORTED, + .event_type = EC_MKBP_EVENT_BUTTON, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal(get_supported_buttons(), response.buttons, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__supported_switches) +{ + /* Get the set of supported switches */ + + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_SUPPORTED, + .event_type = EC_MKBP_EVENT_SWITCH, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal(get_supported_switches(), response.switches, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__supported_invalid) +{ + /* Request support info on a non-existent type of input device. */ + + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_SUPPORTED, + .event_type = EC_MKBP_EVENT_COUNT, /* Unsupported */ + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_RES_INVALID_PARAM, ret, + "Host command didn't fail properly: %d", ret); +} + +ZTEST(mkbp_info, host_command_mkbp_info__current_keyboard_matrix) +{ + /* Hold down a key so we can validate the returned keyboard matrix state + */ + const struct device *dev = DEVICE_DT_GET(DT_NODELABEL(cros_kb_raw)); + + emul_kb_raw_set_kbstate(dev, KEYBOARD_ROW_KEY_R, KEYBOARD_COL_KEY_R, 1); + keyboard_scan_init(); + + k_sleep(K_MSEC(100)); + + /* Get the current keyboard matrix state */ + + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_CURRENT, + .event_type = EC_MKBP_EVENT_KEY_MATRIX, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + + zassert_true(response.key_matrix[KEYBOARD_COL_KEY_R] & + KEYBOARD_MASK_KEY_R, + "Expected key is not pressed"); +} + +ZTEST(mkbp_info, host_command_mkbp_info__current_host_events) +{ + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_CURRENT, + .event_type = EC_MKBP_EVENT_HOST_EVENT, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal((uint32_t)host_get_events(), response.host_event, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__current_host_events64) +{ + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_CURRENT, + .event_type = EC_MKBP_EVENT_HOST_EVENT64, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal(host_get_events(), response.host_event64, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__current_buttons) +{ + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_CURRENT, + .event_type = EC_MKBP_EVENT_BUTTON, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal(mkbp_get_button_state(), response.buttons, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__current_switches) +{ + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_CURRENT, + .event_type = EC_MKBP_EVENT_SWITCH, + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_SUCCESS, ret, "Host command failed: %d", ret); + zassert_equal(mkbp_get_switch_state(), response.switches, NULL); +} + +ZTEST(mkbp_info, host_command_mkbp_info__current_invalid) +{ + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = EC_MKBP_INFO_CURRENT, + .event_type = EC_MKBP_EVENT_COUNT, /* Unsupported */ + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_RES_INVALID_PARAM, ret, "Host command failed: %d", + ret); +} + +ZTEST(mkbp_info, host_command_mkbp_info__invalid) +{ + int ret; + union ec_response_get_next_data response; + struct ec_params_mkbp_info request = { + .info_type = -1, /* Unsupported */ + }; + + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_MKBP_INFO, 0, response, request); + + ret = host_command_process(&args); + zassert_equal(EC_RES_ERROR, ret, "Host command failed: %d", ret); +} + +static void reset(void *data) +{ + ARG_UNUSED(data); + + /* Release any pressed keys in the emulator */ + clear_emulated_keys(); +} + +ZTEST_SUITE(mkbp_info, drivers_predicate_post_main, NULL, reset, reset, NULL); diff --git a/zephyr/test/drivers/led_driver/CMakeLists.txt b/zephyr/test/drivers/led_driver/CMakeLists.txt index 2f96eba2d3..333785e4df 100644 --- a/zephyr/test/drivers/led_driver/CMakeLists.txt +++ b/zephyr/test/drivers/led_driver/CMakeLists.txt @@ -1,20 +1,10 @@ -# Copyright 2022 The ChromiumOS Authors. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -# Create library name based on current directory -zephyr_library_get_current_dir_lib_name(${ZEPHYR_BASE} lib_name) - -# Create interface library -zephyr_interface_library_named(${lib_name}) - # Add include paths -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") -zephyr_include_directories("${PLATFORM_EC}/zephyr/shim/src/led_driver") +target_include_directories(app PRIVATE + "${PLATFORM_EC}/zephyr/shim/src/led_driver") # Add source files -zephyr_library_sources("${CMAKE_CURRENT_SOURCE_DIR}/src/led.c") - -# Link in the library -zephyr_library_link_libraries(${lib_name}) +target_sources(app PRIVATE src/led.c) diff --git a/zephyr/test/drivers/led_driver/led_pins.dts b/zephyr/test/drivers/led_driver/led_pins.dts index 0127d762b2..f1488a59d8 100644 --- a/zephyr/test/drivers/led_driver/led_pins.dts +++ b/zephyr/test/drivers/led_driver/led_pins.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,6 +7,10 @@ * Modified led-colors to obtain better test coverage. */ / { + pwm-led-pins { + status = "disabled"; + }; + gpio-led-pins { compatible = "cros-ec,gpio-led-pins"; diff --git a/zephyr/test/drivers/led_driver/led_policy.dts b/zephyr/test/drivers/led_driver/led_policy.dts index dbbc23062f..fb6d37cb05 100644 --- a/zephyr/test/drivers/led_driver/led_policy.dts +++ b/zephyr/test/drivers/led_driver/led_policy.dts @@ -1,4 +1,4 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -11,7 +11,7 @@ / { led-colors { - compatible = "cros-ec,led-colors"; + compatible = "cros-ec,led-policy"; power-state-charge-left { charge-state = "PWR_STATE_CHARGE"; @@ -142,10 +142,9 @@ }; }; - power-state-idle-forced-left { - charge-state = "PWR_STATE_IDLE"; + power-state-forced-idle-left { + charge-state = "PWR_STATE_FORCED_IDLE"; charge-port = <1>; /* Left port */ - extra-flag = "LED_CHFLAG_FORCE_IDLE"; /* Turn off the right LED */ color-0 { @@ -162,10 +161,9 @@ }; }; - power-state-idle-forced-right { - charge-state = "PWR_STATE_IDLE"; + power-state-forced-idle-right { + charge-state = "PWR_STATE_FORCED_IDLE"; charge-port = <0>; /* Right port */ - extra-flag = "LED_CHFLAG_FORCE_IDLE"; /* Turn off the left LED */ color-0 { @@ -182,10 +180,9 @@ }; }; - power-state-idle-default-left { + power-state-idle-left { charge-state = "PWR_STATE_IDLE"; charge-port = <1>; /* Left port */ - extra-flag = "LED_CHFLAG_DEFAULT"; /* Turn off the right LED */ color-0 { @@ -197,10 +194,9 @@ }; }; - power-state-idle-default-right { + power-state-idle-right { charge-state = "PWR_STATE_IDLE"; charge-port = <0>; /* Right port */ - extra-flag = "LED_CHFLAG_DEFAULT"; /* Turn off the left LED */ color-0 { diff --git a/zephyr/test/drivers/led_driver/prj.conf b/zephyr/test/drivers/led_driver/prj.conf index abdb8cc6a1..6ab9702320 100644 --- a/zephyr/test/drivers/led_driver/prj.conf +++ b/zephyr/test/drivers/led_driver/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The ChromiumOS Authors. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/drivers/led_driver/src/led.c b/zephyr/test/drivers/led_driver/src/led.c index 5c0c9d0c01..7dfaa32bbb 100644 --- a/zephyr/test/drivers/led_driver/src/led.c +++ b/zephyr/test/drivers/led_driver/src/led.c @@ -1,14 +1,16 @@ -/* Copyright 2022 The ChromiumOS Authors. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "ec_commands.h" #include "gpio.h" +#include "include/power.h" #include "led.h" #include "led_common.h" #include "test/drivers/test_state.h" +#include "test/drivers/utils.h" #define VERIFY_LED_COLOR(color, led_id) \ { \ @@ -27,6 +29,8 @@ ZTEST_SUITE(led_driver, drivers_predicate_post_main, NULL, NULL, NULL, NULL); ZTEST(led_driver, test_led_control) { + test_set_chipset_to_power_level(POWER_S5); + /* Exercise valid led_id, set to RESET state */ led_control(EC_LED_ID_SYSRQ_DEBUG_LED, LED_STATE_RESET); VERIFY_LED_COLOR(LED_OFF, EC_LED_ID_SYSRQ_DEBUG_LED); @@ -67,3 +71,23 @@ ZTEST(led_driver, test_led_brightness) led_set_brightness(EC_LED_ID_SYSRQ_DEBUG_LED, brightness); VERIFY_LED_COLOR(LED_WHITE, EC_LED_ID_SYSRQ_DEBUG_LED); } + +ZTEST(led_driver, test_get_chipset_state) +{ + enum power_state pwr_state; + + test_set_chipset_to_g3(); + pwr_state = get_chipset_state(); + zassert_equal(pwr_state, POWER_S5, "expected=%d, returned=%d", POWER_S5, + pwr_state); + + test_set_chipset_to_s0(); + pwr_state = get_chipset_state(); + zassert_equal(pwr_state, POWER_S0, "expected=%d, returned=%d", POWER_S0, + pwr_state); + + test_set_chipset_to_power_level(POWER_S3); + pwr_state = get_chipset_state(); + zassert_equal(pwr_state, POWER_S3, "expected=%d, returned=%d", POWER_S3, + pwr_state); +} diff --git a/zephyr/test/drivers/mkbp/CMakeLists.txt b/zephyr/test/drivers/mkbp/CMakeLists.txt new file mode 100644 index 0000000000..decd3ec0a7 --- /dev/null +++ b/zephyr/test/drivers/mkbp/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/mkbp_fifo.c) diff --git a/zephyr/test/drivers/mkbp/src/mkbp_fifo.c b/zephyr/test/drivers/mkbp/src/mkbp_fifo.c new file mode 100644 index 0000000000..e6a6ba5f04 --- /dev/null +++ b/zephyr/test/drivers/mkbp/src/mkbp_fifo.c @@ -0,0 +1,102 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/drivers/i2c_emul.h> + +#include "keyboard_config.h" +#include "mkbp_fifo.h" +#include "test/drivers/test_state.h" + +/* Tests for Matrix Keyboard Protocol (MKBP) */ + +/* Largest event size that we support */ +#define KEY_MATRIX_EVENT_DATA_SIZE KEYBOARD_COLS_MAX + +#define MAX_EVENT_DATA_SIZE KEY_MATRIX_EVENT_DATA_SIZE + +struct mkbp_fifo_fixture { + uint8_t input_event_data[MAX_EVENT_DATA_SIZE]; +}; + +static void *mkbp_fifo_setup(void) +{ + static struct mkbp_fifo_fixture fixture; + + return &fixture; +} + +static void mkbp_fifo_before(void *data) +{ + struct mkbp_fifo_fixture *fixture = data; + + mkbp_clear_fifo(); + memset(fixture->input_event_data, 0, MAX_EVENT_DATA_SIZE); + mkbp_fifo_depth_update(FIFO_DEPTH); +} + +static void mkbp_fifo_after(void *data) +{ + mkbp_clear_fifo(); + mkbp_fifo_depth_update(FIFO_DEPTH); +} + +static void fill_array_with_incrementing_numbers(int8_t *dst, int size) +{ + for (int i = 0; i < size; i++) { + dst[i] = i; + } +} + +ZTEST_F(mkbp_fifo, test_fifo_add_keyboard_key_matrix_event) +{ + uint8_t out[KEY_MATRIX_EVENT_DATA_SIZE + 1]; + + memset(out, 0, sizeof(out)); + + fill_array_with_incrementing_numbers(fixture->input_event_data, + KEY_MATRIX_EVENT_DATA_SIZE); + + /* Keyboard Key Matrix Event */ + zassert_ok(mkbp_fifo_add(EC_MKBP_EVENT_KEY_MATRIX, + fixture->input_event_data), + NULL); + + int dequeued_data_size = + mkbp_fifo_get_next_event(out, EC_MKBP_EVENT_KEY_MATRIX); + + zassert_equal(dequeued_data_size, KEY_MATRIX_EVENT_DATA_SIZE, NULL); + zassert_mem_equal(fixture->input_event_data, out, + KEY_MATRIX_EVENT_DATA_SIZE, NULL); + zassert_equal(out[KEY_MATRIX_EVENT_DATA_SIZE], 0, NULL); +} + +ZTEST_F(mkbp_fifo, test_fifo_depth_update) +{ + uint8_t out[KEY_MATRIX_EVENT_DATA_SIZE + 1]; + uint8_t new_depth = 0; + + mkbp_fifo_depth_update(new_depth); + fill_array_with_incrementing_numbers(fixture->input_event_data, + MAX_EVENT_DATA_SIZE); + zassert_equal(EC_ERROR_OVERFLOW, + mkbp_fifo_add(EC_MKBP_EVENT_KEY_MATRIX, + fixture->input_event_data), + NULL); + zassert_equal(-1, /* get_next_event explicitly returns -1 */ + mkbp_fifo_get_next_event(out, EC_MKBP_EVENT_KEY_MATRIX), + NULL); + + mkbp_fifo_depth_update(FIFO_DEPTH); + zassert_ok(mkbp_fifo_add(EC_MKBP_EVENT_KEY_MATRIX, + fixture->input_event_data), + NULL); +} + +ZTEST_SUITE(mkbp_fifo, drivers_predicate_post_main, mkbp_fifo_setup, + mkbp_fifo_before, mkbp_fifo_after, NULL); diff --git a/zephyr/test/drivers/prj.conf b/zephyr/test/drivers/prj.conf index aadf8e44eb..a91d28906e 100644 --- a/zephyr/test/drivers/prj.conf +++ b/zephyr/test/drivers/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -13,6 +13,8 @@ CONFIG_ZTEST_NEW_API=y CONFIG_ZTEST_PARAMETER_COUNT=24 CONFIG_TEST=y CONFIG_ASSERT=y +CONFIG_ASSERT_TEST=y +CONFIG_SHELL_VT100_COMMANDS=n # Print logs from Zephyr LOG_MODULE to stdout CONFIG_NATIVE_UART_0_ON_STDINOUT=y @@ -44,6 +46,7 @@ CONFIG_LOG=y CONFIG_I2C=y CONFIG_I2C_EMUL=y CONFIG_GPIO=y +CONFIG_GPIO_GET_CONFIG=y CONFIG_GPIO_EMUL=y CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY=49 CONFIG_EEPROM=y @@ -59,9 +62,11 @@ CONFIG_EMUL_BMA255=y CONFIG_EMUL_BMI=y CONFIG_EMUL_TCS3400=y CONFIG_EMUL_BB_RETIMER=y +CONFIG_EMUL_TCPCI=y CONFIG_EMUL_PS8XXX=y +CONFIG_EMUL_RTC=y CONFIG_EMUL_TCPCI_PARTNER_DRP=y -CONFIG_EMUL_TCPCI_PARTNER_FAULTY_SNK=y +CONFIG_EMUL_TCPCI_PARTNER_FAULTY_EXT=y CONFIG_PLATFORM_EC_CHARGE_MANAGER=y CONFIG_PLATFORM_EC_CHARGE_RAMP_SW=y CONFIG_PLATFORM_EC_CHARGESPLASH=y @@ -96,7 +101,6 @@ CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422=y CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL=y CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y CONFIG_PLATFORM_EC_CBI_EEPROM=y -CONFIG_PLATFORM_EC_ADC=y CONFIG_PLATFORM_EC_TEMP_SENSOR=y CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y CONFIG_PLATFORM_EC_THERMISTOR=y @@ -118,6 +122,10 @@ CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815_FORCE_DID=y CONFIG_PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX=y CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=y +CONFIG_PLATFORM_EC_CONSOLE_CMD_WAITMS=y +CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y +CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK=y CONFIG_ESPI=y CONFIG_ESPI_EMUL=y @@ -144,12 +152,19 @@ CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y CONFIG_PLATFORM_EC_LID_SWITCH=y CONFIG_PLATFORM_EC_POWER_BUTTON=y CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=y +CONFIG_PLATFORM_EC_PORT80=y +CONFIG_PLATFORM_EC_VSTORE_SLOT_COUNT=2 CONFIG_WATCHDOG=y CONFIG_WDT_DISABLE_AT_BOOT=y CONFIG_PLATFORM_EC_USB_PD_HOST_CMD=y CONFIG_PLATFORM_EC_KEYBOARD=y +CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y +CONFIG_PLATFORM_EC_MKBP_EVENT=y +CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y +CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y CONFIG_EMUL_KB_RAW=y +CONFIG_PLATFORM_EC_KEYBOARD_PWRBTN_ASSERTS_KSI2=y CONFIG_EMUL_CROS_FLASH=y CONFIG_FLASH_SIMULATOR=y CONFIG_FLASH=y @@ -164,3 +179,13 @@ CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_INFO=y CONFIG_PLATFORM_EC_ACCEL_SPOOF_MODE=y CONFIG_PLATFORM_EC_CONSOLE_CMD_ACCEL_SPOOF=y + +CONFIG_PLATFORM_EC_CONSOLE_CMD_MD=y + +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_TABLET_MODE=y + +# Power Management (Herobrine arch enables this) +CONFIG_PM=y + +CONFIG_PWM_MOCK=y diff --git a/zephyr/test/drivers/src/espi.c b/zephyr/test/drivers/src/espi.c deleted file mode 100644 index 67fc3c6f90..0000000000 --- a/zephyr/test/drivers/src/espi.c +++ /dev/null @@ -1,82 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/zephyr.h> -#include <ztest.h> - -#include "ec_commands.h" -#include "host_command.h" -#include "test/drivers/test_state.h" - - -#define PORT 0 - -ZTEST_USER(espi, test_host_command_get_protocol_info) -{ - struct ec_response_get_protocol_info response; - struct host_cmd_handler_args args = - BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_PROTOCOL_INFO, 0, - response); - - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); - zassert_equal(args.response_size, sizeof(response), NULL); - zassert_equal(response.protocol_versions, BIT(3), NULL); - zassert_equal(response.max_request_packet_size, EC_LPC_HOST_PACKET_SIZE, - NULL); - zassert_equal(response.max_response_packet_size, - EC_LPC_HOST_PACKET_SIZE, NULL); - zassert_equal(response.flags, 0, NULL); -} - -ZTEST_USER(espi, test_host_command_usb_pd_power_info) -{ - /* Only test we've enabled the command */ - struct ec_response_usb_pd_power_info response; - struct ec_params_usb_pd_power_info params = { .port = PORT }; - struct host_cmd_handler_args args = BUILD_HOST_COMMAND( - EC_CMD_USB_PD_POWER_INFO, 0, response, params); - - args.params = ¶ms; - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); - zassert_equal(args.response_size, sizeof(response), NULL); -} - -ZTEST_USER(espi, test_host_command_typec_status) -{ - /* Only test we've enabled the command */ - struct ec_params_typec_status params = { .port = PORT }; - struct ec_response_typec_status response; - struct host_cmd_handler_args args = - BUILD_HOST_COMMAND(EC_CMD_TYPEC_STATUS, 0, response, params); - - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); - zassert_equal(args.response_size, sizeof(response), NULL); -} - -ZTEST_USER(espi, test_host_command_usb_pd_get_amode) -{ - /* Only test we've enabled the command */ - struct ec_params_usb_pd_get_mode_request params = { - .port = PORT, - .svid_idx = 0, - }; - struct ec_params_usb_pd_get_mode_response response; - struct host_cmd_handler_args args = BUILD_HOST_COMMAND( - EC_CMD_USB_PD_GET_AMODE, 0, response, params); - - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); - /* Note: with no SVIDs the response size is the size of the svid field. - * See the usb alt mode test for verifying larger struct sizes - * - * TODO(b/219562077): Add the above described test. - */ - zassert_equal(args.response_size, sizeof(response.svid), NULL); -} - -ZTEST_SUITE(espi, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/i2c_passthru.c b/zephyr/test/drivers/src/i2c_passthru.c deleted file mode 100644 index bab6a15b28..0000000000 --- a/zephyr/test/drivers/src/i2c_passthru.c +++ /dev/null @@ -1,42 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/zephyr.h> -#include <ztest.h> - -#include "ec_commands.h" -#include "host_command.h" -#include "test/drivers/test_state.h" - -ZTEST_USER(i2c_passthru, test_read_without_write) -{ - uint8_t param_buf[sizeof(struct ec_params_i2c_passthru) + - sizeof(struct ec_params_i2c_passthru_msg)]; - uint8_t response_buf[sizeof(struct ec_response_i2c_passthru) + 2]; - struct ec_params_i2c_passthru *params = - (struct ec_params_i2c_passthru *)¶m_buf; - struct ec_response_i2c_passthru *response = - (struct ec_response_i2c_passthru *)&response_buf; - struct host_cmd_handler_args args = - BUILD_HOST_COMMAND_SIMPLE(EC_CMD_I2C_PASSTHRU, 0); - - params->port = I2C_PORT_VIRTUAL_BATTERY; - params->num_msgs = 1; - params->msg[0].addr_flags = VIRTUAL_BATTERY_ADDR_FLAGS | - EC_I2C_FLAG_READ; - params->msg[0].len = 1; - args.params = ¶m_buf; - args.params_size = sizeof(param_buf); - args.response = &response_buf; - args.response_max = sizeof(response_buf); - - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); - zassert_equal(response->i2c_status, EC_I2C_STATUS_NAK, NULL); - zassert_equal(args.response_size, - sizeof(struct ec_response_i2c_passthru), NULL); -} - -ZTEST_SUITE(i2c_passthru, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/integration/usbc/usb_alt_mode.c b/zephyr/test/drivers/src/integration/usbc/usb_alt_mode.c deleted file mode 100644 index fadb595e4b..0000000000 --- a/zephyr/test/drivers/src/integration/usbc/usb_alt_mode.c +++ /dev/null @@ -1,160 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <stdint.h> -#include <zephyr/zephyr.h> -#include <ztest.h> -#include <zephyr/drivers/gpio/gpio_emul.h> - -#include "ec_commands.h" -#include "ec_tasks.h" -#include "emul/emul_isl923x.h" -#include "emul/tcpc/emul_ps8xxx.h" -#include "emul/tcpc/emul_tcpci.h" -#include "emul/tcpc/emul_tcpci_partner_snk.h" -#include "host_command.h" -#include "test/drivers/stubs.h" -#include "tcpm/tcpci.h" -#include "test/drivers/utils.h" -#include "test/drivers/test_state.h" - -#define TEST_PORT USBC_PORT_C0 - -struct usbc_alt_mode_fixture { - const struct emul *tcpci_emul; - const struct emul *charger_emul; - struct tcpci_partner_data partner; - struct tcpci_snk_emul_data snk_ext; -}; - -static void connect_partner_to_port(struct usbc_alt_mode_fixture *fixture) -{ - const struct emul *tcpc_emul = fixture->tcpci_emul; - struct tcpci_partner_data *partner_emul = &fixture->partner; - - /* Set VBUS to vSafe0V initially. */ - isl923x_emul_set_adc_vbus(fixture->charger_emul, 0); - tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_VBUS_DET); - tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_EXT_STATUS, - TCPC_REG_EXT_STATUS_SAFE0V); - tcpci_tcpc_alert(0); - zassume_ok(tcpci_partner_connect_to_tcpci(partner_emul, tcpc_emul), - NULL); - - /* Wait for PD negotiation and current ramp. */ - k_sleep(K_SECONDS(10)); -} - -static void disconnect_partner_from_port(struct usbc_alt_mode_fixture *fixture) -{ - zassume_ok(tcpci_emul_disconnect_partner(fixture->tcpci_emul), NULL); - isl923x_emul_set_adc_vbus(fixture->charger_emul, 0); - k_sleep(K_SECONDS(1)); -} - -static void *usbc_alt_mode_setup(void) -{ - static struct usbc_alt_mode_fixture fixture; - struct tcpci_partner_data *partner = &fixture.partner; - struct tcpci_snk_emul_data *snk_ext = &fixture.snk_ext; - - tcpci_partner_init(partner, PD_REV20); - partner->extensions = tcpci_snk_emul_init(snk_ext, partner, NULL); - - /* Get references for the emulators */ - fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - /* The configured TCPCI rev must match the emulator's supported rev. */ - tcpc_config[TEST_PORT].flags |= TCPC_FLAGS_TCPCI_REV2_0; - tcpci_emul_set_rev(fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); - fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); - - /* Set up SOP discovery responses for DP adapter. */ - partner->identity_vdm[VDO_INDEX_HDR] = - VDO(USB_SID_PD, /* structured VDM */ true, - VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_IDENT); - partner->identity_vdm[VDO_INDEX_IDH] = VDO_IDH( - /* USB host */ false, /* USB device */ false, IDH_PTYPE_AMA, - /* modal operation */ true, USB_VID_GOOGLE); - partner->identity_vdm[VDO_INDEX_CSTAT] = 0xabcdabcd; - partner->identity_vdm[VDO_INDEX_PRODUCT] = VDO_PRODUCT(0x1234, 0x5678); - /* Hardware version 1, firmware version 2 */ - partner->identity_vdm[VDO_INDEX_AMA] = 0x12000000; - partner->identity_vdos = VDO_INDEX_AMA + 1; - - /* Support DisplayPort VID. */ - partner->svids_vdm[VDO_INDEX_HDR] = - VDO(USB_SID_PD, /* structured VDM */ true, - VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_SVID); - partner->svids_vdm[VDO_INDEX_HDR + 1] = - VDO_SVID(USB_SID_DISPLAYPORT, 0); - partner->svids_vdos = VDO_INDEX_HDR + 2; - - /* Support one mode for DisplayPort VID. Copied from Hoho. */ - partner->modes_vdm[VDO_INDEX_HDR] = - VDO(USB_SID_DISPLAYPORT, /* structured VDM */ true, - VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_MODES); - partner->modes_vdm[VDO_INDEX_HDR + 1] = VDO_MODE_DP( - 0, MODE_DP_PIN_C, 1, CABLE_PLUG, MODE_DP_V13, MODE_DP_SNK); - partner->modes_vdos = VDO_INDEX_HDR + 2; - - /* Sink 5V 3A. */ - snk_ext->pdo[1] = PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); - - return &fixture; -} - -static void usbc_alt_mode_before(void *data) -{ - /* Set chipset to ON, this will set TCPM to DRP */ - test_set_chipset_to_s0(); - - /* TODO(b/214401892): Check why need to give time TCPM to spin */ - k_sleep(K_SECONDS(1)); - - connect_partner_to_port((struct usbc_alt_mode_fixture *)data); -} - -static void usbc_alt_mode_after(void *data) -{ - disconnect_partner_from_port((struct usbc_alt_mode_fixture *)data); -} - -ZTEST_F(usbc_alt_mode, verify_discovery) -{ - uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; - struct ec_response_typec_discovery *discovery = - (struct ec_response_typec_discovery *)response_buffer; - host_cmd_typec_discovery(TEST_PORT, TYPEC_PARTNER_SOP, - response_buffer, sizeof(response_buffer)); - - /* The host command does not count the VDM header in identity_count. */ - zassert_equal(discovery->identity_count, - this->partner.identity_vdos - 1, - "Expected %d identity VDOs, got %d", - this->partner.identity_vdos - 1, - discovery->identity_count); - zassert_mem_equal(discovery->discovery_vdo, - this->partner.identity_vdm + 1, - discovery->identity_count * - sizeof(*discovery->discovery_vdo), - "Discovered SOP identity ACK did not match"); - zassert_equal(discovery->svid_count, 1, "Expected 1 SVID, got %d", - discovery->svid_count); - zassert_equal(discovery->svids[0].svid, USB_SID_DISPLAYPORT, - "Expected SVID 0x%0000x, got 0x%0000x", - USB_SID_DISPLAYPORT, discovery->svids[0].svid); - zassert_equal(discovery->svids[0].mode_count, 1, - "Expected 1 DP mode, got %d", - discovery->svids[0].mode_count); - zassert_equal(discovery->svids[0].mode_vdo[0], - this->partner.modes_vdm[1], - "DP mode VDOs did not match"); -} - -ZTEST_SUITE(usbc_alt_mode, drivers_predicate_post_main, usbc_alt_mode_setup, - usbc_alt_mode_before, usbc_alt_mode_after, NULL); diff --git a/zephyr/test/drivers/src/integration/usbc/usb_malfunction_sink.c b/zephyr/test/drivers/src/integration/usbc/usb_malfunction_sink.c deleted file mode 100644 index c3788791e2..0000000000 --- a/zephyr/test/drivers/src/integration/usbc/usb_malfunction_sink.c +++ /dev/null @@ -1,259 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <stdint.h> -#include <zephyr/sys/byteorder.h> -#include <ztest.h> - -#include "battery_smart.h" -#include "emul/emul_isl923x.h" -#include "emul/emul_smart_battery.h" -#include "emul/tcpc/emul_tcpci_partner_faulty_snk.h" -#include "emul/tcpc/emul_tcpci_partner_snk.h" -#include "tcpm/tcpci.h" -#include "test/drivers/test_state.h" -#include "test/drivers/utils.h" -#include "usb_pd.h" - -struct usb_malfunction_sink_fixture { - struct tcpci_partner_data sink; - struct tcpci_faulty_snk_emul_data faulty_snk_ext; - struct tcpci_snk_emul_data snk_ext; - const struct emul *tcpci_emul; - const struct emul *charger_emul; - struct tcpci_faulty_snk_action actions[2]; -}; - -static void -connect_sink_to_port(struct usb_malfunction_sink_fixture *fixture) -{ - /* - * TODO(b/221439302) Updating the TCPCI emulator registers, updating the - * vbus, as well as alerting should all be a part of the connect - * function. - */ - isl923x_emul_set_adc_vbus(fixture->charger_emul, 0); - tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_VBUS_DET); - tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_EXT_STATUS, - TCPC_REG_EXT_STATUS_SAFE0V); - tcpci_tcpc_alert(0); - /* - * TODO(b/226567798) Wait for TCPC init and DRPToggle. It is required, - * because tcpci_emul_reset_rule_before reset registers including - * Looking4Connection bit in CC_STATUS register. - */ - k_sleep(K_SECONDS(1)); - zassume_ok(tcpci_partner_connect_to_tcpci(&fixture->sink, - fixture->tcpci_emul), - NULL); - - /* Wait for PD negotiation and current ramp. - * TODO(b/213906889): Check message timing and contents. - */ - k_sleep(K_SECONDS(10)); -} - -static inline void disconnect_sink_from_port( - struct usb_malfunction_sink_fixture *fixture) -{ - zassume_ok(tcpci_emul_disconnect_partner(fixture->tcpci_emul), NULL); - k_sleep(K_SECONDS(1)); -} - -static void *usb_malfunction_sink_setup(void) -{ - static struct usb_malfunction_sink_fixture test_fixture; - - /* Get references for the emulators */ - test_fixture.tcpci_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(tcpci_emul))); - test_fixture.charger_emul = - emul_get_binding(DT_LABEL(DT_NODELABEL(isl923x_emul))); - tcpci_emul_set_rev(test_fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); - tcpc_config[0].flags = tcpc_config[0].flags | - TCPC_FLAGS_TCPCI_REV2_0; - - /* Initialized the sink to request 5V and 3A */ - tcpci_partner_init(&test_fixture.sink, PD_REV20); - test_fixture.sink.extensions = - tcpci_faulty_snk_emul_init( - &test_fixture.faulty_snk_ext, &test_fixture.sink, - tcpci_snk_emul_init(&test_fixture.snk_ext, - &test_fixture.sink, NULL)); - test_fixture.snk_ext.pdo[1] = - PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); - - return &test_fixture; -} - -static void usb_malfunction_sink_before(void *data) -{ - /* Set chipset to ON, this will set TCPM to DRP */ - test_set_chipset_to_s0(); - - /* TODO(b/214401892): Check why need to give time TCPM to spin */ - k_sleep(K_SECONDS(1)); - -} - -static void usb_malfunction_sink_after(void *data) -{ - struct usb_malfunction_sink_fixture *fixture = data; - - tcpci_faulty_snk_emul_clear_actions_list(&fixture->faulty_snk_ext); - disconnect_sink_from_port(fixture); - tcpci_partner_common_clear_logged_msgs(&fixture->sink); -} - -ZTEST_SUITE(usb_malfunction_sink, drivers_predicate_post_main, - usb_malfunction_sink_setup, - usb_malfunction_sink_before, - usb_malfunction_sink_after, NULL); - -ZTEST_F(usb_malfunction_sink, test_fail_source_cap_and_pd_disable) -{ - struct ec_response_typec_status typec_status; - - /* - * Fail on SourceCapabilities message to make TCPM change PD port state - * to disabled - */ - this->actions[0].action_mask = TCPCI_FAULTY_SNK_FAIL_SRC_CAP; - this->actions[0].count = TCPCI_FAULTY_SNK_INFINITE_ACTION; - tcpci_faulty_snk_emul_append_action(&this->faulty_snk_ext, - &this->actions[0]); - - connect_sink_to_port(this); - - typec_status = host_cmd_typec_status(0); - - /* Device is connected, but PD wasn't able to establish contract */ - zassert_true(typec_status.pd_enabled, NULL); - zassert_true(typec_status.dev_connected, NULL); - zassert_false(typec_status.sop_connected, NULL); -} - -ZTEST_F(usb_malfunction_sink, test_fail_source_cap_and_pd_connect) -{ - struct ec_response_usb_pd_power_info info; - struct ec_response_typec_status typec_status; - - /* - * Fail only few times on SourceCapabilities message to prevent entering - * PE_SRC_Disabled state by TCPM - */ - this->actions[0].action_mask = TCPCI_FAULTY_SNK_FAIL_SRC_CAP; - this->actions[0].count = 3; - tcpci_faulty_snk_emul_append_action(&this->faulty_snk_ext, - &this->actions[0]); - - connect_sink_to_port(this); - - typec_status = host_cmd_typec_status(0); - - zassert_true(typec_status.pd_enabled, NULL); - zassert_true(typec_status.dev_connected, NULL); - zassert_true(typec_status.sop_connected, NULL); - - info = host_cmd_power_info(0); - - zassert_equal(info.role, USB_PD_PORT_POWER_SOURCE, - "Expected role to be %d, but got %d", - USB_PD_PORT_POWER_SOURCE, info.role); - zassert_equal(info.type, USB_CHG_TYPE_NONE, - "Expected type to be %d, but got %d", USB_CHG_TYPE_NONE, - info.type); - zassert_equal(info.meas.voltage_max, 0, - "Expected charge voltage max of 0mV, but got %dmV", - info.meas.voltage_max); - zassert_within( - info.meas.voltage_now, 5000, 500, - "Charging voltage expected to be near 5000mV, but was %dmV", - info.meas.voltage_now); - zassert_equal(info.meas.current_max, 1500, - "Current max expected to be 1500mV, but was %dmV", - info.meas.current_max); - zassert_equal(info.meas.current_lim, 0, - "VBUS max is set to 0mA, but PD is reporting %dmA", - info.meas.current_lim); - zassert_equal(info.max_power, 0, - "Charging expected to be at %duW, but PD max is %duW", - 0, info.max_power); -} - -ZTEST_F(usb_malfunction_sink, test_ignore_source_cap) -{ - struct tcpci_partner_log_msg *msg; - uint16_t header; - bool expect_hard_reset = false; - int msg_cnt = 0; - - this->actions[0].action_mask = TCPCI_FAULTY_SNK_IGNORE_SRC_CAP; - this->actions[0].count = TCPCI_FAULTY_SNK_INFINITE_ACTION; - tcpci_faulty_snk_emul_append_action(&this->faulty_snk_ext, - &this->actions[0]); - - tcpci_partner_common_enable_pd_logging(&this->sink, true); - connect_sink_to_port(this); - tcpci_partner_common_enable_pd_logging(&this->sink, false); - - /* - * If test is failing, printing logged message may be useful to diagnose - * problem: - * tcpci_partner_common_print_logged_msgs(&this->sink); - */ - - /* Check if SourceCapability message alternate with HardReset */ - SYS_SLIST_FOR_EACH_CONTAINER(&this->sink.msg_log, msg, node) { - if (expect_hard_reset) { - zassert_equal(msg->sop, TCPCI_MSG_TX_HARD_RESET, - "Expected message %d to be hard reset", - msg_cnt); - } else { - header = sys_get_le16(msg->buf); - zassert_equal(msg->sop, TCPCI_MSG_SOP, - "Expected message %d to be SOP message, not 0x%x", - msg_cnt, msg->sop); - zassert_not_equal(PD_HEADER_CNT(header), 0, - "Expected message %d to has at least one data object", - msg_cnt); - zassert_equal(PD_HEADER_TYPE(header), - PD_DATA_SOURCE_CAP, - "Expected message %d to be SourceCapabilities, not 0x%x", - msg_cnt, PD_HEADER_TYPE(header)); - } - - msg_cnt++; - expect_hard_reset = !expect_hard_reset; - } -} - -ZTEST_F(usb_malfunction_sink, test_ignore_source_cap_and_pd_disable) -{ - struct ec_response_typec_status typec_status; - - /* - * Ignore first SourceCapabilities message and discard others by sending - * different messages. This will lead to PD disable. - */ - this->actions[0].action_mask = TCPCI_FAULTY_SNK_IGNORE_SRC_CAP; - this->actions[0].count = 1; - tcpci_faulty_snk_emul_append_action(&this->faulty_snk_ext, - &this->actions[0]); - this->actions[1].action_mask = TCPCI_FAULTY_SNK_DISCARD_SRC_CAP; - this->actions[1].count = TCPCI_FAULTY_SNK_INFINITE_ACTION; - tcpci_faulty_snk_emul_append_action(&this->faulty_snk_ext, - &this->actions[1]); - - connect_sink_to_port(this); - - typec_status = host_cmd_typec_status(0); - - /* Device is connected, but PD wasn't able to establish contract */ - zassert_true(typec_status.pd_enabled, NULL); - zassert_true(typec_status.dev_connected, NULL); - zassert_false(typec_status.sop_connected, NULL); -} diff --git a/zephyr/test/drivers/src/keyboard_scan.c b/zephyr/test/drivers/src/keyboard_scan.c deleted file mode 100644 index 209c5320e0..0000000000 --- a/zephyr/test/drivers/src/keyboard_scan.c +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#include <ztest.h> -#include <zephyr/drivers/emul.h> -#include <zephyr/drivers/gpio.h> -#include <zephyr/drivers/gpio/gpio_emul.h> -#include <emul/emul_kb_raw.h> - -#include "test/drivers/test_state.h" - -int emulate_keystate(int row, int col, int pressed) -{ - const struct device *dev = - DEVICE_DT_GET(DT_NODELABEL(cros_kb_raw)); - - return emul_kb_raw_set_kbstate(dev, row, col, pressed); -} - -ZTEST(keyboard_scan, test_press_enter) -{ - zassert_ok(emulate_keystate(4, 11, true), NULL); - k_sleep(K_MSEC(100)); - /* TODO(jbettis): Check espi_emul to verify the AP was notified. */ - zassert_ok(emulate_keystate(4, 11, false), NULL); - k_sleep(K_MSEC(100)); -} -ZTEST_SUITE(keyboard_scan, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/src/main.c b/zephyr/test/drivers/src/main.c deleted file mode 100644 index 319d42e3ad..0000000000 --- a/zephyr/test/drivers/src/main.c +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/zephyr.h> -#include <ztest.h> -#include "ec_app_main.h" -#include "test/drivers/test_state.h" - -bool drivers_predicate_pre_main(const void *state) -{ - return ((struct test_state *)state)->ec_app_main_run == false; -} - -bool drivers_predicate_post_main(const void *state) -{ - return !drivers_predicate_pre_main(state); -} - -void test_main(void) -{ - struct test_state state = { - .ec_app_main_run = false, - }; - - /* Run all the suites that depend on main not being called yet */ - ztest_run_test_suites(&state); - - ec_app_main(); - state.ec_app_main_run = true; - - /* Run all the suites that depend on main being called */ - ztest_run_test_suites(&state); - - /* Check that every suite ran */ - ztest_verify_all_test_suites_ran(); -} diff --git a/zephyr/test/drivers/src/test_rules.c b/zephyr/test/drivers/src/test_rules.c deleted file mode 100644 index 0266fa3cdf..0000000000 --- a/zephyr/test/drivers/src/test_rules.c +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <ztest.h> - -#include "motion_sense_fifo.h" - -static void motion_sense_fifo_reset_before(const struct ztest_unit_test *test, - void *data) -{ - ARG_UNUSED(test); - ARG_UNUSED(data); - motion_sense_fifo_reset(); -} -ZTEST_RULE(motion_sense_fifo_reset, motion_sense_fifo_reset_before, NULL); diff --git a/zephyr/test/drivers/src/vboot_hash.c b/zephyr/test/drivers/src/vboot_hash.c deleted file mode 100644 index ac23b95b02..0000000000 --- a/zephyr/test/drivers/src/vboot_hash.c +++ /dev/null @@ -1,32 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <zephyr/zephyr.h> -#include <ztest.h> -#include <sha256.h> - -#include "ec_commands.h" -#include "host_command.h" -#include "test/drivers/test_state.h" - -ZTEST_USER(vboot_hash, test_hostcmd) -{ - struct ec_params_vboot_hash params = { - .cmd = EC_VBOOT_HASH_START, - .offset = 0, - .size = 0, - }; - struct ec_response_vboot_hash response; - struct host_cmd_handler_args args = - BUILD_HOST_COMMAND(EC_CMD_VBOOT_HASH, 0, response, params); - - zassert_ok(host_command_process(&args), NULL); - zassert_ok(args.result, NULL); - zassert_equal(args.response_size, sizeof(response), NULL); - zassert_equal(response.status, EC_VBOOT_HASH_STATUS_BUSY, - "response.status = %d", response.status); -} - -ZTEST_SUITE(vboot_hash, drivers_predicate_post_main, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/drivers/testcase.yaml b/zephyr/test/drivers/testcase.yaml new file mode 100644 index 0000000000..3708529ed3 --- /dev/null +++ b/zephyr/test/drivers/testcase.yaml @@ -0,0 +1,80 @@ +common: + platform_allow: native_posix +tests: + drivers.default: + timeout: 240 + extra_args: CONF_FILE="prj.conf;default/prj.conf" + extra_configs: + - CONFIG_LINK_TEST_SUITE_DEFAULT=y + - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y + drivers.default.mock_power: + timeout: 240 + extra_args: CONF_FILE="prj.conf;default/prj.conf" + extra_configs: + - CONFIG_LINK_TEST_SUITE_DEFAULT=y + - CONFIG_LINK_TEST_SUITE_USB_MALFUNCTION_SINK=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y + - CONFIG_POWER_SEQUENCE_MOCK=y + drivers.host_cmd: + extra_configs: + - CONFIG_LINK_TEST_SUITE_HOST_COMMANDS=y + - CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y + - CONFIG_PLATFORM_EC_USB_PD_LOGGING=y + drivers.ap_mux_control: + extra_args: CONF_FILE="prj.conf;ap_mux_control/prj.conf" + extra_configs: + - CONFIG_LINK_TEST_SUITE_AP_MUX_CONTROL=y + drivers.chargesplash: + timeout: 240 + extra_configs: + - CONFIG_LINK_TEST_SUITE_CHARGESPLASH=y + drivers.chargesplash.mock_power: + timeout: 240 + extra_configs: + - CONFIG_LINK_TEST_SUITE_CHARGESPLASH=y + - CONFIG_POWER_SEQUENCE_MOCK=y + drivers.dps: + extra_args: CONF_FILE="prj.conf;dps/prj.conf" + extra_configs: + - CONFIG_LINK_TEST_SUITE_USB_PD_DPS=y + drivers.isl923x: + extra_configs: + - CONFIG_LINK_TEST_SUITE_ISL923X=y + drivers.isl923x.mock_power: + extra_configs: + - CONFIG_LINK_TEST_SUITE_ISL923X=y + - CONFIG_POWER_SEQUENCE_MOCK=y + drivers.keyboard_scan: + extra_configs: + - CONFIG_LINK_TEST_SUITE_KEYBOARD_SCAN=y + drivers.led_driver: + extra_args: CONF_FILE="prj.conf;led_driver/prj.conf" DTC_OVERLAY_FILE="./boards/native_posix.overlay;./led_driver/led_pins.dts;./led_driver/led_policy.dts" + extra_configs: + - CONFIG_LINK_TEST_SUITE_LED_DRIVER=y + drivers.mkbp: + extra_configs: + - CONFIG_LINK_TEST_SUITE_MKBP=y + - CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y + - CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y + - CONFIG_PLATFORM_EC_MKBP_EVENT=y + - CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y + drivers.usb_retimer_fw_update: + extra_args: CONF_FILE="prj.conf;usb_retimer_fw_update/prj.conf" + extra_configs: + - CONFIG_LINK_TEST_SUITE_USB_RETIMER_FW_UPDATE=y + drivers.usbc_alt_mode: + extra_configs: + - CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=y + drivers.usbc_alt_mode_ec_entry: + extra_configs: + - CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY=n + - CONFIG_LINK_TEST_SUITE_USBC_ALT_MODE=y + drivers.usbc_tbt_mode: + extra_configs: + - CONFIG_LINK_TEST_SUITE_USBC_TBT_MODE=y + drivers.usbc_ocp: + extra_configs: + - CONFIG_LINK_TEST_SUITE_USBC_OCP=y diff --git a/zephyr/test/drivers/usb_malfunction_sink/CMakeLists.txt b/zephyr/test/drivers/usb_malfunction_sink/CMakeLists.txt new file mode 100644 index 0000000000..2e247726f0 --- /dev/null +++ b/zephyr/test/drivers/usb_malfunction_sink/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/usb_malfunction_sink.c) diff --git a/zephyr/test/drivers/usb_malfunction_sink/src/usb_malfunction_sink.c b/zephyr/test/drivers/usb_malfunction_sink/src/usb_malfunction_sink.c new file mode 100644 index 0000000000..38ce979594 --- /dev/null +++ b/zephyr/test/drivers/usb_malfunction_sink/src/usb_malfunction_sink.c @@ -0,0 +1,269 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <zephyr/sys/byteorder.h> +#include <zephyr/ztest.h> + +#include "battery_smart.h" +#include "emul/emul_isl923x.h" +#include "emul/emul_smart_battery.h" +#include "emul/tcpc/emul_tcpci_partner_faulty_ext.h" +#include "emul/tcpc/emul_tcpci_partner_snk.h" +#include "tcpm/tcpci.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "test/drivers/stubs.h" +#include "usb_pd.h" +#include "usb_tc_sm.h" +#include "timer.h" + +/* USB-C port used to connect port partner in this testsuite */ +#define TEST_PORT 0 +BUILD_ASSERT(TEST_PORT == USBC_PORT_C0); + +struct usb_malfunction_sink_fixture { + struct tcpci_partner_data sink; + struct tcpci_faulty_ext_data faulty_snk_ext; + struct tcpci_snk_emul_data snk_ext; + const struct emul *tcpci_emul; + const struct emul *charger_emul; + struct tcpci_faulty_ext_action actions[2]; + enum usbc_port port; +}; + +static void *usb_malfunction_sink_setup(void) +{ + static struct usb_malfunction_sink_fixture test_fixture; + + test_fixture.port = TEST_PORT; + + /* Get references for the emulators */ + test_fixture.tcpci_emul = EMUL_GET_USBC_BINDING(TEST_PORT, tcpc); + test_fixture.charger_emul = EMUL_GET_USBC_BINDING(TEST_PORT, chg); + + /* Initialized the sink to request 5V and 3A */ + tcpci_partner_init(&test_fixture.sink, PD_REV20); + test_fixture.sink.extensions = tcpci_faulty_ext_init( + &test_fixture.faulty_snk_ext, &test_fixture.sink, + tcpci_snk_emul_init(&test_fixture.snk_ext, &test_fixture.sink, + NULL)); + test_fixture.snk_ext.pdo[1] = + PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); + + return &test_fixture; +} + +static void usb_malfunction_sink_before(void *data) +{ + /* Set chipset to ON, this will set TCPM to DRP */ + test_set_chipset_to_s0(); + + /* TODO(b/214401892): Check why need to give time TCPM to spin */ + k_sleep(K_SECONDS(1)); +} + +static void usb_malfunction_sink_after(void *data) +{ + struct usb_malfunction_sink_fixture *fixture = data; + + tcpci_faulty_ext_clear_actions_list(&fixture->faulty_snk_ext); + disconnect_sink_from_port(fixture->tcpci_emul); + tcpci_partner_common_clear_logged_msgs(&fixture->sink); +} + +ZTEST_SUITE(usb_malfunction_sink, drivers_predicate_post_main, + usb_malfunction_sink_setup, usb_malfunction_sink_before, + usb_malfunction_sink_after, NULL); + +ZTEST_F(usb_malfunction_sink, test_fail_source_cap_and_pd_disable) +{ + struct ec_response_typec_status typec_status; + + /* + * Fail on SourceCapabilities message to make TCPM change PD port state + * to disabled + */ + fixture->actions[0].action_mask = TCPCI_FAULTY_EXT_FAIL_SRC_CAP; + fixture->actions[0].count = TCPCI_FAULTY_EXT_INFINITE_ACTION; + tcpci_faulty_ext_append_action(&fixture->faulty_snk_ext, + &fixture->actions[0]); + + connect_sink_to_port(&fixture->sink, fixture->tcpci_emul, + fixture->charger_emul); + + typec_status = host_cmd_typec_status(0); + + /* Device is connected, but PD wasn't able to establish contract */ + zassert_true(typec_status.pd_enabled, NULL); + zassert_true(typec_status.dev_connected, NULL); + zassert_false(typec_status.sop_connected, NULL); +} + +ZTEST_F(usb_malfunction_sink, test_fail_source_cap_and_pd_connect) +{ + struct ec_response_usb_pd_power_info info; + struct ec_response_typec_status typec_status; + + /* + * Fail only few times on SourceCapabilities message to prevent entering + * PE_SRC_Disabled state by TCPM + */ + fixture->actions[0].action_mask = TCPCI_FAULTY_EXT_FAIL_SRC_CAP; + fixture->actions[0].count = 3; + tcpci_faulty_ext_append_action(&fixture->faulty_snk_ext, + &fixture->actions[0]); + + connect_sink_to_port(&fixture->sink, fixture->tcpci_emul, + fixture->charger_emul); + + typec_status = host_cmd_typec_status(0); + + zassert_true(typec_status.pd_enabled, NULL); + zassert_true(typec_status.dev_connected, NULL); + zassert_true(typec_status.sop_connected, NULL); + + info = host_cmd_power_info(0); + + zassert_equal(info.role, USB_PD_PORT_POWER_SOURCE, + "Expected role to be %d, but got %d", + USB_PD_PORT_POWER_SOURCE, info.role); + zassert_equal(info.type, USB_CHG_TYPE_NONE, + "Expected type to be %d, but got %d", USB_CHG_TYPE_NONE, + info.type); + zassert_equal(info.meas.voltage_max, 0, + "Expected charge voltage max of 0mV, but got %dmV", + info.meas.voltage_max); + zassert_within( + info.meas.voltage_now, 5000, 500, + "Charging voltage expected to be near 5000mV, but was %dmV", + info.meas.voltage_now); + zassert_equal(info.meas.current_max, 1500, + "Current max expected to be 1500mV, but was %dmV", + info.meas.current_max); + zassert_equal(info.meas.current_lim, 0, + "VBUS max is set to 0mA, but PD is reporting %dmA", + info.meas.current_lim); + zassert_equal(info.max_power, 0, + "Charging expected to be at %duW, but PD max is %duW", 0, + info.max_power); +} + +ZTEST_F(usb_malfunction_sink, test_ignore_source_cap) +{ + struct tcpci_partner_log_msg *msg; + uint16_t header; + bool expect_hard_reset = false; + int msg_cnt = 0; + + fixture->actions[0].action_mask = TCPCI_FAULTY_EXT_IGNORE_SRC_CAP; + fixture->actions[0].count = TCPCI_FAULTY_EXT_INFINITE_ACTION; + tcpci_faulty_ext_append_action(&fixture->faulty_snk_ext, + &fixture->actions[0]); + + tcpci_partner_common_enable_pd_logging(&fixture->sink, true); + connect_sink_to_port(&fixture->sink, fixture->tcpci_emul, + fixture->charger_emul); + tcpci_partner_common_enable_pd_logging(&fixture->sink, false); + + /* + * If test is failing, printing logged message may be useful to diagnose + * problem: + * tcpci_partner_common_print_logged_msgs(&fixture->sink); + */ + + /* Check if SourceCapability message alternate with HardReset */ + SYS_SLIST_FOR_EACH_CONTAINER(&fixture->sink.msg_log, msg, node) + { + if (expect_hard_reset) { + zassert_equal(msg->sop, TCPCI_MSG_TX_HARD_RESET, + "Expected message %d to be hard reset", + msg_cnt); + } else { + header = sys_get_le16(msg->buf); + zassert_equal( + msg->sop, TCPCI_MSG_SOP, + "Expected message %d to be SOP message, not 0x%x", + msg_cnt, msg->sop); + zassert_not_equal( + PD_HEADER_CNT(header), 0, + "Expected message %d to has at least one data object", + msg_cnt); + zassert_equal( + PD_HEADER_TYPE(header), PD_DATA_SOURCE_CAP, + "Expected message %d to be SourceCapabilities, not 0x%x", + msg_cnt, PD_HEADER_TYPE(header)); + } + + msg_cnt++; + expect_hard_reset = !expect_hard_reset; + } +} + +ZTEST_F(usb_malfunction_sink, test_hard_reset_disconnect) +{ + struct ec_response_typec_status typec_status; + int try_count; + + /* + * Test if disconnection during the power sequence doesn't have impact + * on next tries + */ + for (try_count = 1; try_count < 5; try_count++) { + /* Connect port partner and check Vconn state */ + connect_sink_to_port(&fixture->sink, fixture->tcpci_emul, + fixture->charger_emul); + typec_status = host_cmd_typec_status(fixture->port); + zassert_equal(typec_status.vconn_role, PD_ROLE_VCONN_SRC, + "Vconn should be present after connection (%d)", + try_count); + + /* Send hard reset to trigger power sequence on source side */ + tcpci_partner_common_send_hard_reset(&fixture->sink); + + /* + * Wait for start of power sequence after hard reset and half + * the time of source recovery (first step of power sequence + * when vconn should be disabled) + */ + k_sleep(K_USEC(PD_T_PS_HARD_RESET + PD_T_SRC_RECOVER / 2)); + + typec_status = host_cmd_typec_status(fixture->port); + zassert_equal(typec_status.vconn_role, PD_ROLE_VCONN_OFF, + "Vconn should be disabled at power sequence (%d)", + try_count); + + /* Disconnect partner at the middle of power sequence */ + disconnect_sink_from_port(fixture->tcpci_emul); + } +} + +ZTEST_F(usb_malfunction_sink, test_ignore_source_cap_and_pd_disable) +{ + struct ec_response_typec_status typec_status; + + /* + * Ignore first SourceCapabilities message and discard others by sending + * different messages. This will lead to PD disable. + */ + fixture->actions[0].action_mask = TCPCI_FAULTY_EXT_IGNORE_SRC_CAP; + fixture->actions[0].count = 1; + tcpci_faulty_ext_append_action(&fixture->faulty_snk_ext, + &fixture->actions[0]); + fixture->actions[1].action_mask = TCPCI_FAULTY_EXT_DISCARD_SRC_CAP; + fixture->actions[1].count = TCPCI_FAULTY_EXT_INFINITE_ACTION; + tcpci_faulty_ext_append_action(&fixture->faulty_snk_ext, + &fixture->actions[1]); + + connect_sink_to_port(&fixture->sink, fixture->tcpci_emul, + fixture->charger_emul); + + typec_status = host_cmd_typec_status(0); + + /* Device is connected, but PD wasn't able to establish contract */ + zassert_true(typec_status.pd_enabled, NULL); + zassert_true(typec_status.dev_connected, NULL); + zassert_false(typec_status.sop_connected, NULL); +} diff --git a/zephyr/test/drivers/usb_retimer_fw_update/CMakeLists.txt b/zephyr/test/drivers/usb_retimer_fw_update/CMakeLists.txt new file mode 100644 index 0000000000..786726414b --- /dev/null +++ b/zephyr/test/drivers/usb_retimer_fw_update/CMakeLists.txt @@ -0,0 +1,19 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Create library name based on current directory +zephyr_library_get_current_dir_lib_name(${ZEPHYR_BASE} lib_name) + +# Create interface library +zephyr_interface_library_named(${lib_name}) + +# Add include paths +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") +zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") + +# Add source files +zephyr_library_sources("${CMAKE_CURRENT_SOURCE_DIR}/src/usb_retimer_fw_update.c") + +# Link in the library +zephyr_library_link_libraries(${lib_name}) diff --git a/zephyr/test/drivers/usb_retimer_fw_update/prj.conf b/zephyr/test/drivers/usb_retimer_fw_update/prj.conf new file mode 100644 index 0000000000..de54617e71 --- /dev/null +++ b/zephyr/test/drivers/usb_retimer_fw_update/prj.conf @@ -0,0 +1,6 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_PLATFORM_EC_ACPI=y +CONFIG_PLATFORM_EC_USB_MUX_TASK=y diff --git a/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c b/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c new file mode 100644 index 0000000000..9a360761ab --- /dev/null +++ b/zephyr/test/drivers/usb_retimer_fw_update/src/usb_retimer_fw_update.c @@ -0,0 +1,269 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/ztest.h> + +#include "test/drivers/stubs.h" +#include "test/drivers/test_state.h" +#include "test/drivers/utils.h" +#include "usb_common.h" +#include "usb_pd.h" + +#define BB_RETIMER_NODE DT_NODELABEL(usb_c1_bb_retimer_emul) +#define TEST_PORT USBC_PORT_C1 + +/* Note: for API details, see common/usbc/usb_retimer_fw_update.c */ + +/* Helpers */ +static uint8_t acpi_read_and_verify(void) +{ + uint8_t read_result = acpi_read(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE); + + zassert_not_equal(read_result, USB_RETIMER_FW_UPDATE_ERR, + "Command returned unexpected err"); + zassert_not_equal(read_result, USB_RETIMER_FW_UPDATE_INVALID_MUX, + "Command returned invalid mux"); + + return read_result; +} + +static void usb_retimer_fw_update_suspend_port(void) +{ + /* Write our command to suspend the port first */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_SUSPEND_PD + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to suspend port */ + k_sleep(K_SECONDS(1)); + + zassume_true(acpi_read_and_verify() == 0, + "Failed to see successful suspend"); +} + +/* Test configuration */ +static void usb_retimer_fw_update_before(void *data) +{ + ARG_UNUSED(data); + + /* Assume our common setup of a BB retimer on C1 */ + zassume_true(EMUL_DT_GET(BB_RETIMER_NODE) != NULL, + "No BB retimer found on C1"); + + /* Set chipset to ON, since AP would drive this process */ + test_set_chipset_to_s0(); + + /* TODO(b/214401892): Check why need to give time TCPM to spin */ + k_sleep(K_SECONDS(1)); +} + +static void usb_retimer_fw_update_after(void *data) +{ + ARG_UNUSED(data); + + /* Unsuspend the port */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_DISCONNECT + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Port should resume after at least 7 seconds */ + k_sleep(K_SECONDS(8)); +} + +ZTEST_SUITE(usb_retimer_fw_update, drivers_predicate_post_main, NULL, + usb_retimer_fw_update_before, usb_retimer_fw_update_after, NULL); + +ZTEST(usb_retimer_fw_update, verify_query_port) +{ + /* Write our command to query ports */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_QUERY_PORT + << USB_RETIMER_FW_UPDATE_OP_SHIFT); + + zassert_true(acpi_read_and_verify() & BIT(TEST_PORT), + "Failed to see port in query"); +} + +ZTEST(usb_retimer_fw_update, verify_suspend_port) +{ + /* Write our command to suspend the port */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_SUSPEND_PD + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to suspend port */ + k_sleep(K_SECONDS(1)); + + /* Return of 0 indicates the command succeeded */ + zassert_true(acpi_read_and_verify() == 0, + "Failed to see successful suspend"); +} + +ZTEST(usb_retimer_fw_update, verify_resume_port) +{ + usb_retimer_fw_update_suspend_port(); + + /* And now resume it */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_RESUME_PD + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to resume port */ + k_sleep(K_SECONDS(1)); + + /* Note: return indicates whether the port is enabled */ + zassert_true(acpi_read_and_verify() == 1, + "Failed to see successful resume"); +} + +ZTEST(usb_retimer_fw_update, verify_get_mux) +{ + struct ec_response_typec_status typec_status; + + /* Write our command to get the mux state for a port */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_GET_MUX + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to process */ + k_sleep(K_SECONDS(1)); + + typec_status = host_cmd_typec_status(TEST_PORT); + zassert_true(acpi_read_and_verify() == typec_status.mux_state, + "Failed to match mux state"); +} + +/* Commands which first require suspend to be run */ +ZTEST(usb_retimer_fw_update, verify_set_mux_usb) +{ + struct ec_response_typec_status typec_status; + + usb_retimer_fw_update_suspend_port(); + + /* And now set the mux to USB */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_SET_USB + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to set the mux */ + k_sleep(K_SECONDS(1)); + + /* Note: return indicates filtered mux state */ + zassert_true(acpi_read_and_verify() == USB_PD_MUX_USB_ENABLED, + "Failed to set mux usb"); + + typec_status = host_cmd_typec_status(TEST_PORT); + zassert_equal(typec_status.mux_state & USB_RETIMER_FW_UPDATE_MUX_MASK, + USB_PD_MUX_USB_ENABLED, "Status mux disagreement"); +} + +ZTEST(usb_retimer_fw_update, verify_set_mux_safe) +{ + struct ec_response_typec_status typec_status; + + usb_retimer_fw_update_suspend_port(); + + /* And now set the mux to safe */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_SET_SAFE + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to set the mux */ + k_sleep(K_SECONDS(1)); + + /* Note: return indicates filtered mux state */ + zassert_true(acpi_read_and_verify() == USB_PD_MUX_SAFE_MODE, + "Failed to set mux safe"); + + typec_status = host_cmd_typec_status(TEST_PORT); + zassert_equal(typec_status.mux_state & USB_RETIMER_FW_UPDATE_MUX_MASK, + USB_PD_MUX_SAFE_MODE, "Status mux disagreement"); +} + +ZTEST(usb_retimer_fw_update, verify_set_mux_tbt) +{ + struct ec_response_typec_status typec_status; + + usb_retimer_fw_update_suspend_port(); + + /* And now set the mux to TBT */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_SET_TBT + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to set the mux */ + k_sleep(K_SECONDS(1)); + + /* Note: return indicates filtered mux state */ + zassert_true(acpi_read_and_verify() == USB_PD_MUX_TBT_COMPAT_ENABLED, + "Failed to set mux tbt"); + + typec_status = host_cmd_typec_status(TEST_PORT); + zassert_equal(typec_status.mux_state & USB_RETIMER_FW_UPDATE_MUX_MASK, + USB_PD_MUX_TBT_COMPAT_ENABLED, "Status mux disagreement"); +} + +ZTEST(usb_retimer_fw_update, verify_update_disconnect) +{ + uint64_t command_start; + + usb_retimer_fw_update_suspend_port(); + + /* And now set the process to disconnect */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_DISCONNECT + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + command_start = k_uptime_get(); + + /* Give PD task time to set the mux */ + k_sleep(K_SECONDS(1)); + + /* Note: return indicates filtered mux state */ + zassert_true(acpi_read_and_verify() == USB_PD_MUX_NONE, + "Failed to set mux disconnect"); + + /* + * Note: this would ideally be a host command interface check, but + * the only HC return which would cover this is a state string, which + * could be brittle. + */ + /* Port shouldn't be up or at least 5 seconds */ + for (int i = 0; i < 10; i++) { + if (pd_is_port_enabled(TEST_PORT)) { + zassert_true((k_uptime_get() - command_start) > 5000, + "Port resumed too soon"); + break; + } + k_sleep(K_SECONDS(1)); + } + + zassert_true(pd_is_port_enabled(TEST_PORT), "Port not resuemd"); +} + +/* Verify we get an error if port isn't suspended */ +ZTEST(usb_retimer_fw_update, verify_mux_usb_error) +{ + /* Set the mux to USB on unsuspended port */ + acpi_write(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE, + USB_RETIMER_FW_UPDATE_SET_USB + << USB_RETIMER_FW_UPDATE_OP_SHIFT | + TEST_PORT); + + /* Give PD task time to set the mux */ + k_sleep(K_SECONDS(1)); + + zassert_true(acpi_read(EC_ACPI_MEM_USB_RETIMER_FW_UPDATE) == + USB_RETIMER_FW_UPDATE_ERR, + "Failed to fail mux set"); +} diff --git a/zephyr/test/drivers/usbc_alt_mode/CMakeLists.txt b/zephyr/test/drivers/usbc_alt_mode/CMakeLists.txt new file mode 100644 index 0000000000..6bb0c90ed8 --- /dev/null +++ b/zephyr/test/drivers/usbc_alt_mode/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_sources(app PRIVATE src/usbc_alt_mode.c) diff --git a/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c new file mode 100644 index 0000000000..a005e1de11 --- /dev/null +++ b/zephyr/test/drivers/usbc_alt_mode/src/usbc_alt_mode.c @@ -0,0 +1,445 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include <zephyr/drivers/gpio/gpio_emul.h> + +#include "ec_commands.h" +#include "ec_tasks.h" +#include "emul/emul_isl923x.h" +#include "emul/tcpc/emul_ps8xxx.h" +#include "emul/tcpc/emul_tcpci.h" +#include "emul/tcpc/emul_tcpci_partner_snk.h" +#include "host_command.h" +#include "test/drivers/stubs.h" +#include "tcpm/tcpci.h" +#include "test/drivers/utils.h" +#include "test/drivers/test_state.h" + +#define TEST_PORT 0 + +/* Arbitrary */ +#define PARTNER_PRODUCT_ID 0x1234 +#define PARTNER_DEV_BINARY_CODED_DECIMAL 0x5678 + +BUILD_ASSERT(TEST_PORT == USBC_PORT_C0); + +struct usbc_alt_mode_fixture { + const struct emul *tcpci_emul; + const struct emul *charger_emul; + struct tcpci_partner_data partner; + struct tcpci_snk_emul_data snk_ext; +}; + +struct usbc_alt_mode_dp_unsupported_fixture { + const struct emul *tcpci_emul; + const struct emul *charger_emul; + struct tcpci_partner_data partner; + struct tcpci_snk_emul_data snk_ext; +}; + +static void connect_partner_to_port(struct usbc_alt_mode_fixture *fixture) +{ + const struct emul *tcpc_emul = fixture->tcpci_emul; + struct tcpci_partner_data *partner_emul = &fixture->partner; + + /* + * TODO(b/221439302) Updating the TCPCI emulator registers, updating the + * vbus, as well as alerting should all be a part of the connect + * function. + */ + /* Set VBUS to vSafe0V initially. */ + isl923x_emul_set_adc_vbus(fixture->charger_emul, 0); + tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_VBUS_DET); + tcpci_emul_set_reg(fixture->tcpci_emul, TCPC_REG_EXT_STATUS, + TCPC_REG_EXT_STATUS_SAFE0V); + tcpci_tcpc_alert(0); + k_sleep(K_SECONDS(1)); + zassume_ok(tcpci_partner_connect_to_tcpci(partner_emul, tcpc_emul), + NULL); + + /* Wait for PD negotiation and current ramp. */ + k_sleep(K_SECONDS(10)); +} + +static void disconnect_partner_from_port(struct usbc_alt_mode_fixture *fixture) +{ + zassume_ok(tcpci_emul_disconnect_partner(fixture->tcpci_emul), NULL); + isl923x_emul_set_adc_vbus(fixture->charger_emul, 0); + k_sleep(K_SECONDS(1)); +} + +static void add_discovery_responses(struct tcpci_partner_data *partner) +{ + /* Add Discover Identity response */ + partner->identity_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_PD, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_IDENT); + partner->identity_vdm[VDO_INDEX_IDH] = VDO_IDH( + /* USB host */ false, /* USB device */ false, IDH_PTYPE_AMA, + /* modal operation */ true, USB_VID_GOOGLE); + partner->identity_vdm[VDO_INDEX_CSTAT] = 0xabcdabcd; + partner->identity_vdm[VDO_INDEX_PRODUCT] = VDO_PRODUCT( + PARTNER_PRODUCT_ID, PARTNER_DEV_BINARY_CODED_DECIMAL); + /* Hardware version 1, firmware version 2 */ + partner->identity_vdm[VDO_INDEX_AMA] = 0x12000000; + partner->identity_vdos = VDO_INDEX_AMA + 1; + + /* Add Discover Modes response */ + /* Support one mode for DisplayPort VID. Copied from Hoho. */ + partner->modes_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_DISPLAYPORT, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_MODES); + partner->modes_vdm[VDO_INDEX_HDR + 1] = VDO_MODE_DP( + 0, MODE_DP_PIN_C, 1, CABLE_PLUG, MODE_DP_V13, MODE_DP_SNK); + partner->modes_vdos = VDO_INDEX_HDR + 2; + + /* Add Discover SVIDs response */ + /* Support DisplayPort VID. */ + partner->svids_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_PD, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_SVID); + partner->svids_vdm[VDO_INDEX_HDR + 1] = + VDO_SVID(USB_SID_DISPLAYPORT, 0); + partner->svids_vdos = VDO_INDEX_HDR + 2; +} + +static void add_displayport_mode_responses(struct tcpci_partner_data *partner) +{ + /* DisplayPort alt mode setup remains in the same suite as discovery + * setup because DisplayPort is picked from the Discovery VDOs offered. + */ + + /* Add DisplayPort EnterMode response */ + partner->enter_mode_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_DISPLAYPORT, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_ENTER_MODE); + partner->enter_mode_vdos = VDO_INDEX_HDR + 1; + + /* Add DisplayPort StatusUpdate response */ + partner->dp_status_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_DISPLAYPORT, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DP_STATUS); + partner->dp_status_vdm[VDO_INDEX_HDR + 1] = + /* Mainly copied from hoho */ + VDO_DP_STATUS(0, /* IRQ_HPD */ + false, /* HPD_HI|LOW - Changed*/ + 0, /* request exit DP */ + 0, /* request exit USB */ + 0, /* MF pref */ + true, /* DP Enabled */ + 0, /* power low e.g. normal */ + 0x2 /* Connected as Sink */); + partner->dp_status_vdos = VDO_INDEX_HDR + 2; + + /* Add DisplayPort Configure Response */ + partner->dp_config_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_DISPLAYPORT, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DP_CONFIG); + partner->dp_config_vdos = VDO_INDEX_HDR + 1; +} + +static void *usbc_alt_mode_setup(void) +{ + static struct usbc_alt_mode_fixture fixture; + struct tcpci_partner_data *partner = &fixture.partner; + struct tcpci_snk_emul_data *snk_ext = &fixture.snk_ext; + + tcpci_partner_init(partner, PD_REV20); + partner->extensions = tcpci_snk_emul_init(snk_ext, partner, NULL); + + /* Get references for the emulators */ + fixture.tcpci_emul = EMUL_GET_USBC_BINDING(TEST_PORT, tcpc); + fixture.charger_emul = EMUL_GET_USBC_BINDING(TEST_PORT, chg); + + add_discovery_responses(partner); + add_displayport_mode_responses(partner); + + /* Sink 5V 3A. */ + snk_ext->pdo[1] = PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); + + return &fixture; +} + +static void *usbc_alt_mode_dp_unsupported_setup(void) +{ + static struct usbc_alt_mode_fixture fixture; + struct tcpci_partner_data *partner = &fixture.partner; + struct tcpci_snk_emul_data *snk_ext = &fixture.snk_ext; + + tcpci_partner_init(partner, PD_REV20); + partner->extensions = tcpci_snk_emul_init(snk_ext, partner, NULL); + + /* Get references for the emulators */ + fixture.tcpci_emul = EMUL_GET_USBC_BINDING(TEST_PORT, tcpc); + /* The configured TCPCI rev must match the emulator's supported rev. */ + tcpc_config[TEST_PORT].flags |= TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(fixture.tcpci_emul, TCPCI_EMUL_REV2_0_VER1_1); + fixture.charger_emul = EMUL_GET_USBC_BINDING(TEST_PORT, chg); + + /* + * Respond to discovery REQs to indicate DisplayPort support, but do not + * respond to DisplayPort alt mode VDMs, including Enter Mode. + */ + add_discovery_responses(partner); + + /* Sink 5V 3A. */ + snk_ext->pdo[1] = PDO_FIXED(5000, 3000, PDO_FIXED_UNCONSTRAINED); + + return &fixture; +} + +static void usbc_alt_mode_before(void *data) +{ + /* Set chipset to ON, this will set TCPM to DRP */ + test_set_chipset_to_s0(); + + /* TODO(b/214401892): Check why need to give time TCPM to spin */ + k_sleep(K_SECONDS(1)); + + connect_partner_to_port((struct usbc_alt_mode_fixture *)data); +} + +static void usbc_alt_mode_after(void *data) +{ + disconnect_partner_from_port((struct usbc_alt_mode_fixture *)data); +} + +ZTEST_F(usbc_alt_mode, verify_discovery) +{ + uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; + struct ec_response_typec_discovery *discovery = + (struct ec_response_typec_discovery *)response_buffer; + host_cmd_typec_discovery(TEST_PORT, TYPEC_PARTNER_SOP, response_buffer, + sizeof(response_buffer)); + + /* The host command does not count the VDM header in identity_count. */ + zassert_equal(discovery->identity_count, + fixture->partner.identity_vdos - 1, + "Expected %d identity VDOs, got %d", + fixture->partner.identity_vdos - 1, + discovery->identity_count); + zassert_mem_equal( + discovery->discovery_vdo, fixture->partner.identity_vdm + 1, + discovery->identity_count * sizeof(*discovery->discovery_vdo), + "Discovered SOP identity ACK did not match"); + zassert_equal(discovery->svid_count, 1, "Expected 1 SVID, got %d", + discovery->svid_count); + zassert_equal(discovery->svids[0].svid, USB_SID_DISPLAYPORT, + "Expected SVID 0x%0000x, got 0x%0000x", + USB_SID_DISPLAYPORT, discovery->svids[0].svid); + zassert_equal(discovery->svids[0].mode_count, 1, + "Expected 1 DP mode, got %d", + discovery->svids[0].mode_count); + zassert_equal(discovery->svids[0].mode_vdo[0], + fixture->partner.modes_vdm[1], + "DP mode VDOs did not match"); +} + +ZTEST_F(usbc_alt_mode, verify_displayport_mode_entry) +{ + if (IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); + k_sleep(K_SECONDS(1)); + } + + /* Verify host command when VDOs are present. */ + struct ec_response_typec_status status; + struct ec_params_usb_pd_get_mode_response response; + int response_size; + + host_cmd_usb_pd_get_amode(TEST_PORT, 0, &response, &response_size); + + /* Response should be populated with a DisplayPort VDO */ + zassert_equal(response_size, sizeof(response), NULL); + zassert_equal(response.svid, USB_SID_DISPLAYPORT, NULL); + zassert_equal(response.vdo[0], + fixture->partner.modes_vdm[response.opos], NULL); + + /* DPM configures the partner on DP mode entry */ + /* Verify port partner thinks its configured for DisplayPort */ + zassert_true(fixture->partner.displayport_configured, NULL); + /* Verify we also set up DP on our mux */ + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_DP_ENABLED), + USB_PD_MUX_DP_ENABLED, "Failed to see DP set in mux"); + + /* + * DP alt mode partner sends HPD through VDM:Attention, which uses the + * same format as the DP Status data + */ + uint32_t vdm_attention_data[2]; + + vdm_attention_data[0] = + VDO(USB_SID_DISPLAYPORT, 1, + VDO_OPOS(1) | VDO_CMDT(CMDT_INIT) | CMD_ATTENTION); + vdm_attention_data[1] = VDO_DP_STATUS(1, /* IRQ_HPD */ + true, /* HPD_HI|LOW - Changed*/ + 0, /* request exit DP */ + 0, /* request exit USB */ + 0, /* MF pref */ + true, /* DP Enabled */ + 0, /* power low e.g. normal */ + 0x2 /* Connected as Sink */); + tcpci_partner_send_data_msg(&fixture->partner, PD_DATA_VENDOR_DEF, + vdm_attention_data, 2, 0); + + k_sleep(K_SECONDS(1)); + /* Verify the board's HPD notification triggered */ + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_PD_MUX_HPD_LVL), + USB_PD_MUX_HPD_LVL, "Failed to set HPD level in mux"); + zassert_equal((status.mux_state & USB_PD_MUX_HPD_IRQ), + USB_PD_MUX_HPD_IRQ, "Failed to set HPD IRQin mux"); +} + +ZTEST_F(usbc_alt_mode, verify_displayport_mode_reentry) +{ + if (!IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { + ztest_test_skip(); + } + + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); + k_sleep(K_SECONDS(1)); + + /* DPM configures the partner on DP mode entry */ + /* Verify port partner thinks its configured for DisplayPort */ + zassert_true(fixture->partner.displayport_configured, NULL); + + host_cmd_typec_control_exit_modes(TEST_PORT); + k_sleep(K_SECONDS(1)); + zassert_false(fixture->partner.displayport_configured, NULL); + + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); + k_sleep(K_SECONDS(1)); + zassert_true(fixture->partner.displayport_configured, NULL); + + /* Verify that DisplayPort is the active alternate mode. */ + struct ec_params_usb_pd_get_mode_response response; + int response_size; + + host_cmd_usb_pd_get_amode(TEST_PORT, 0, &response, &response_size); + + /* Response should be populated with a DisplayPort VDO */ + zassert_equal(response_size, sizeof(response), NULL); + zassert_equal(response.svid, USB_SID_DISPLAYPORT, NULL); + zassert_equal(response.vdo[0], + fixture->partner.modes_vdm[response.opos], NULL); +} + +ZTEST_F(usbc_alt_mode, verify_discovery_via_pd_host_cmd) +{ + struct ec_params_usb_pd_info_request params = { .port = TEST_PORT }; + struct ec_params_usb_pd_discovery_entry response; + + struct host_cmd_handler_args args = BUILD_HOST_COMMAND( + EC_CMD_USB_PD_DISCOVERY, 0, response, params); + + zassert_ok(host_command_process(&args)); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(response.ptype, IDH_PTYPE_AMA); + zassert_equal(response.vid, USB_VID_GOOGLE); + zassert_equal(response.pid, PARTNER_PRODUCT_ID); +} + +ZTEST_F(usbc_alt_mode, verify_mode_entry_via_pd_host_cmd) +{ + if (!IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { + ztest_test_skip(); + } + + /* Verify entering mode */ + struct ec_params_usb_pd_set_mode_request set_mode_params = { + .cmd = PD_ENTER_MODE, + .port = TEST_PORT, + .opos = 1, /* Second VDO (after Discovery Responses) */ + .svid = USB_SID_DISPLAYPORT, + }; + + struct host_cmd_handler_args set_mode_args = BUILD_HOST_COMMAND_PARAMS( + EC_CMD_USB_PD_SET_AMODE, 0, set_mode_params); + + zassert_ok(host_command_process(&set_mode_args)); + + /* Verify that DisplayPort is the active alternate mode. */ + struct ec_params_usb_pd_get_mode_response get_mode_response; + int response_size; + + host_cmd_usb_pd_get_amode(TEST_PORT, 0, &get_mode_response, + &response_size); + + /* Response should be populated with a DisplayPort VDO */ + zassert_equal(response_size, sizeof(get_mode_response), NULL); + zassert_equal(get_mode_response.svid, USB_SID_DISPLAYPORT, NULL); + zassert_equal(get_mode_response.vdo[0], + fixture->partner.modes_vdm[get_mode_response.opos], NULL); +} + +ZTEST_SUITE(usbc_alt_mode, drivers_predicate_post_main, usbc_alt_mode_setup, + usbc_alt_mode_before, usbc_alt_mode_after, NULL); + +/* + * When the partner advertises DP mode support but refuses to enter, discovery + * should still work as if the partner were compliant. + */ +ZTEST_F(usbc_alt_mode_dp_unsupported, verify_discovery) +{ + if (IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); + k_sleep(K_SECONDS(1)); + } + + uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; + struct ec_response_typec_discovery *discovery = + (struct ec_response_typec_discovery *)response_buffer; + host_cmd_typec_discovery(TEST_PORT, TYPEC_PARTNER_SOP, response_buffer, + sizeof(response_buffer)); + + /* The host command does not count the VDM header in identity_count. */ + zassert_equal(discovery->identity_count, + fixture->partner.identity_vdos - 1, + "Expected %d identity VDOs, got %d", + fixture->partner.identity_vdos - 1, + discovery->identity_count); + zassert_mem_equal( + discovery->discovery_vdo, fixture->partner.identity_vdm + 1, + discovery->identity_count * sizeof(*discovery->discovery_vdo), + "Discovered SOP identity ACK did not match"); + zassert_equal(discovery->svid_count, 1, "Expected 1 SVID, got %d", + discovery->svid_count); + zassert_equal(discovery->svids[0].svid, USB_SID_DISPLAYPORT, + "Expected SVID 0x%0000x, got 0x%0000x", + USB_SID_DISPLAYPORT, discovery->svids[0].svid); + zassert_equal(discovery->svids[0].mode_count, 1, + "Expected 1 DP mode, got %d", + discovery->svids[0].mode_count); + zassert_equal(discovery->svids[0].mode_vdo[0], + fixture->partner.modes_vdm[1], + "DP mode VDOs did not match"); +} + +/* + * When the partner advertises DP support but refuses to enter DP mode, the TCPM + * should try once and then give up. + */ +ZTEST_F(usbc_alt_mode_dp_unsupported, verify_displayport_mode_nonentry) +{ + if (IS_ENABLED(CONFIG_PLATFORM_EC_USB_PD_REQUIRE_AP_MODE_ENTRY)) { + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_DP); + k_sleep(K_SECONDS(1)); + } + + zassert_false(fixture->partner.displayport_configured, NULL); + int dp_attempts = atomic_get(&fixture->partner.mode_enter_attempts); + zassert_equal(dp_attempts, 1, "Expected 1 DP attempt, got %d", + dp_attempts); +} + +ZTEST_SUITE(usbc_alt_mode_dp_unsupported, drivers_predicate_post_main, + usbc_alt_mode_dp_unsupported_setup, usbc_alt_mode_before, + usbc_alt_mode_after, NULL); diff --git a/zephyr/test/drivers/usbc_ocp/CMakeLists.txt b/zephyr/test/drivers/usbc_ocp/CMakeLists.txt new file mode 100644 index 0000000000..8453bed73c --- /dev/null +++ b/zephyr/test/drivers/usbc_ocp/CMakeLists.txt @@ -0,0 +1,6 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Add source files +target_sources(app PRIVATE src/usbc_ocp.c) diff --git a/zephyr/test/drivers/usbc_ocp/src/usbc_ocp.c b/zephyr/test/drivers/usbc_ocp/src/usbc_ocp.c new file mode 100644 index 0000000000..f269c1e81f --- /dev/null +++ b/zephyr/test/drivers/usbc_ocp/src/usbc_ocp.c @@ -0,0 +1,64 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> +#include <zephyr/ztest_assert.h> + +#include "usbc_ocp.h" +#include "test/drivers/test_state.h" +#include "timer.h" + +/* Tests for USBC OCP (Overcurrent Protection) Common Code */ + +#define TEST_PORT 0 + +/* Returns non-zero if state never reached */ +static int wait_for_port_latched_off_state(bool state) +{ + WAIT_FOR(state == usbc_ocp_is_port_latched_off(TEST_PORT), + 5000000, /* 5 Second */ + k_sleep(K_MSEC(1))); + + return !(state == usbc_ocp_is_port_latched_off(TEST_PORT)); +} + +static void usbc_ocpc_suite_before_after(void *data) +{ + ARG_UNUSED(data); + + usbc_ocp_clear_event_counter(TEST_PORT); + zassert_ok(wait_for_port_latched_off_state(false)); +} + +ZTEST(usbc_ocp, test_events_add_then_clear) +{ + for (int i = 0; i < OCP_MAX_CNT - 1; i++) { + zassert_ok(usbc_ocp_add_event(TEST_PORT), + "Could not add ocp event %d", i); + + zassert_ok(wait_for_port_latched_off_state(false), + "Max OC events too soon"); + } + + zassert_ok(usbc_ocp_add_event(TEST_PORT)); + zassert_ok(wait_for_port_latched_off_state(true), + "Max OC events too soon"); + + zassert_ok(usbc_ocp_clear_event_counter(TEST_PORT)); + zassert_ok(wait_for_port_latched_off_state(false), + "Max OC events too soon"); +} + +ZTEST(usbc_ocp, test_bad_port_arguments) +{ + zassert_ok(usbc_ocp_is_port_latched_off(-1)); + + zassert_equal(EC_ERROR_INVAL, usbc_ocp_clear_event_counter(-1)); + zassert_equal(EC_ERROR_INVAL, usbc_ocp_add_event(-1)); +} + +ZTEST_SUITE(usbc_ocp, drivers_predicate_post_main, NULL, + usbc_ocpc_suite_before_after, usbc_ocpc_suite_before_after, NULL); diff --git a/zephyr/test/drivers/usbc_tbt_mode/CMakeLists.txt b/zephyr/test/drivers/usbc_tbt_mode/CMakeLists.txt new file mode 100644 index 0000000000..05eddf9c69 --- /dev/null +++ b/zephyr/test/drivers/usbc_tbt_mode/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +target_sources(app PRIVATE src/usbc_tbt_mode.c) diff --git a/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c b/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c new file mode 100644 index 0000000000..66a145c475 --- /dev/null +++ b/zephyr/test/drivers/usbc_tbt_mode/src/usbc_tbt_mode.c @@ -0,0 +1,336 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <zephyr/kernel.h> +#include <zephyr/sys/byteorder.h> +#include <zephyr/ztest.h> + +#include "ec_commands.h" +#include "ec_tasks.h" +#include "emul/emul_isl923x.h" +#include "emul/tcpc/emul_ps8xxx.h" +#include "emul/tcpc/emul_tcpci.h" +#include "emul/tcpc/emul_tcpci_partner_snk.h" +#include "host_command.h" +#include "test/drivers/stubs.h" +#include "tcpm/tcpci.h" +#include "test/drivers/utils.h" +#include "test/drivers/test_state.h" +#include "usb_pd_vdo.h" + +#define TEST_PORT USBC_PORT_C0 +/* Remove polarity for any mux checks */ +#define USB_MUX_CHECK_MASK ~USB_PD_MUX_POLARITY_INVERTED + +struct usbc_tbt_mode_fixture { + const struct emul *tcpci_emul; + const struct emul *charger_emul; + struct tcpci_partner_data partner; + struct tcpci_snk_emul_data snk_ext; +}; + +/* Passive USB3 cable */ +struct tcpci_cable_data passive_usb3 = { + .identity_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_PD, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_IDENT), + .identity_vdm[VDO_INDEX_IDH] = VDO_IDH( + /* USB host */ false, /* USB device */ false, IDH_PTYPE_PCABLE, + /* modal operation */ false, USB_VID_GOOGLE), + .identity_vdm[VDO_INDEX_CSTAT] = 0, + .identity_vdm[VDO_INDEX_PRODUCT] = VDO_PRODUCT(0x1234, 0xABCD), + .identity_vdm[VDO_INDEX_PTYPE_CABLE1] = + VDO_REV30_PASSIVE(USB_R30_SS_U32_U40_GEN2, USB_VBUS_CUR_3A, + USB_REV30_LATENCY_1m, USB_REV30_TYPE_C), + .identity_vdos = VDO_INDEX_PTYPE_CABLE1 + 1, + +}; + +static void add_sop_vdm_responses(struct tcpci_partner_data *partner) +{ + /* Add Discover Identity response */ + partner->identity_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_PD, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_IDENT); + partner->identity_vdm[VDO_INDEX_IDH] = VDO_IDH( + /* USB host */ false, /* USB device */ true, IDH_PTYPE_DFP_HUB, + /* modal operation */ true, USB_VID_GOOGLE); + partner->identity_vdm[VDO_INDEX_CSTAT] = 0; + partner->identity_vdm[VDO_INDEX_PRODUCT] = VDO_PRODUCT(0x1234, 0x5678); + partner->identity_vdm[VDO_INDEX_PTYPE_UFP1_VDO] = VDO_UFP1( + (VDO_UFP1_CAPABILITY_USB20 | VDO_UFP1_CAPABILITY_USB32), + USB_TYPEC_RECEPTACLE, VDO_UFP1_ALT_MODE_TBT3, + USB_R30_SS_U40_GEN3); + partner->identity_vdm[VDO_INDEX_PTYPE_UFP2_VDO] = 0; + partner->identity_vdos = VDO_INDEX_PTYPE_UFP2_VDO + 1; + + /* Add Discover SVIDs response */ + /* Support TBT (Intel) VID. */ + partner->svids_vdm[VDO_INDEX_HDR] = + VDO(USB_SID_PD, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_SVID); + partner->svids_vdm[VDO_INDEX_HDR + 1] = VDO_SVID(USB_VID_INTEL, 0); + partner->svids_vdos = VDO_INDEX_HDR + 2; + + /* Add Discover Modes response */ + /* Support one mode for TBT (Intel) VID */ + partner->modes_vdm[VDO_INDEX_HDR] = + VDO(USB_VID_INTEL, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_DISCOVER_MODES); + partner->modes_vdm[VDO_INDEX_HDR + 1] = TBT_ALTERNATE_MODE; + partner->modes_vdos = VDO_INDEX_HDR + 2; + + /* Add affirmative mode entry */ + partner->enter_mode_vdm[VDO_INDEX_HDR] = + VDO(USB_VID_INTEL, /* structured VDM */ true, + VDO_CMDT(CMDT_RSP_ACK) | CMD_ENTER_MODE); + partner->enter_mode_vdos = VDO_INDEX_HDR + 1; +} + +/* How many EnterModes were we expecting? */ +enum msg_check { + NO_MSG, + SOP_EXPECTED, +}; + +static void verify_vdm_messages(struct usbc_tbt_mode_fixture *fixture, + enum msg_check check, int cmd_type) +{ + struct tcpci_partner_log_msg *msg; + enum tcpci_msg_type types_seen[3]; + int messages_seen = 0; + + SYS_SLIST_FOR_EACH_CONTAINER(&fixture->partner.msg_log, msg, node) + { + uint16_t header = sys_get_le16(msg->buf); + + /* Ignore messages from ourselves */ + if (msg->sender == TCPCI_PARTNER_SENDER_PARTNER) { + continue; + } + + /* + * Control messages, non-VDMs, and extended messages are not of + * interest + */ + if ((PD_HEADER_CNT(header) == 0) || + (PD_HEADER_TYPE(header) != PD_DATA_VENDOR_DEF) || + (PD_HEADER_EXT(header) != 0)) { + continue; + } + + /* We have a VDM, check entry we're interested in */ + uint32_t vdm_header = sys_get_le32(msg->buf + sizeof(header)); + + if (PD_VDO_CMD(vdm_header) != cmd_type) { + continue; + } + + types_seen[messages_seen] = PD_HEADER_GET_SOP(header); + messages_seen++; + } + + /* + * Processing done, now verify message ordering. See Type-C + * specification 6.7 Active Cables That Support Alternate Modes + */ + if (check == NO_MSG) { + zassert_equal(messages_seen, 0, + "Unexpected messages (cmd %d, num %d)", cmd_type, + messages_seen); + } else if (check == SOP_EXPECTED) { + zassert_equal(messages_seen, 1, + "Unexpected messages (cmd %d, num %d)", cmd_type, + messages_seen); + zassert_equal(types_seen[0], TCPCI_MSG_SOP, + "Unexpected SOP type: %d", types_seen[0]); + } +} + +static void verify_cable_found(struct tcpci_cable_data *cable) +{ + uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; + struct ec_response_typec_discovery *discovery = + (struct ec_response_typec_discovery *)response_buffer; + + host_cmd_typec_discovery(TEST_PORT, TYPEC_PARTNER_SOP_PRIME, + response_buffer, sizeof(response_buffer)); + + /* The host command does not count the VDM header in identity_count. */ + zassert_equal(discovery->identity_count, cable->identity_vdos - 1, + "Expected %d identity VDOs, got %d", + cable->identity_vdos - 1, discovery->identity_count); + zassert_mem_equal(discovery->discovery_vdo, cable->identity_vdm + 1, + discovery->identity_count * + sizeof(*discovery->discovery_vdo), + "Discovered SOP' identity ACK did not match"); +} + +static void *usbc_tbt_mode_setup(void) +{ + static struct usbc_tbt_mode_fixture fixture; + struct tcpci_partner_data *partner = &fixture.partner; + struct tcpci_snk_emul_data *snk_ext = &fixture.snk_ext; + + tcpci_partner_init(partner, PD_REV30); + partner->extensions = tcpci_snk_emul_init(snk_ext, partner, NULL); + + /* Get references for the emulators */ + fixture.tcpci_emul = EMUL_DT_GET(DT_NODELABEL(tcpci_emul)); + fixture.charger_emul = EMUL_DT_GET(DT_NODELABEL(isl923x_emul)); + + add_sop_vdm_responses(partner); + /* Note: cable behavior will vary by test case */ + + /* Sink 5V 3A. */ + snk_ext->pdo[0] = PDO_FIXED(5000, 3000, PDO_FIXED_COMM_CAP); + + return &fixture; +} + +static void usbc_tbt_mode_before(void *data) +{ + ARG_UNUSED(data); + + /* Set chipset to ON, this will set TCPM to DRP */ + test_set_chipset_to_s0(); + + /* TODO(b/214401892): Check why need to give time TCPM to spin */ + k_sleep(K_SECONDS(1)); +} + +static void usbc_tbt_mode_after(void *data) +{ + struct usbc_tbt_mode_fixture *fix = data; + + disconnect_sink_from_port(fix->tcpci_emul); + tcpci_partner_common_clear_logged_msgs(&fix->partner); +} + +ZTEST_F(usbc_tbt_mode, verify_discovery) +{ + uint8_t response_buffer[EC_LPC_HOST_PACKET_SIZE]; + struct ec_response_typec_discovery *discovery = + (struct ec_response_typec_discovery *)response_buffer; + + connect_sink_to_port(&fixture->partner, fixture->tcpci_emul, + fixture->charger_emul); + + host_cmd_typec_discovery(TEST_PORT, TYPEC_PARTNER_SOP, response_buffer, + sizeof(response_buffer)); + + /* The host command does not count the VDM header in identity_count. */ + zassert_equal(discovery->identity_count, + fixture->partner.identity_vdos - 1, + "Expected %d identity VDOs, got %d", + fixture->partner.identity_vdos - 1, + discovery->identity_count); + zassert_mem_equal( + discovery->discovery_vdo, fixture->partner.identity_vdm + 1, + discovery->identity_count * sizeof(*discovery->discovery_vdo), + "Discovered SOP identity ACK did not match"); + zassert_equal(discovery->svid_count, 1, "Expected 1 SVID, got %d", + discovery->svid_count); + zassert_equal(discovery->svids[0].svid, USB_VID_INTEL, + "Expected SVID 0x%04x, got 0x%04x", USB_VID_INTEL, + discovery->svids[0].svid); + zassert_equal(discovery->svids[0].mode_count, 1, + "Expected 1 TBT mode, got %d", + discovery->svids[0].mode_count); + zassert_equal(discovery->svids[0].mode_vdo[0], + fixture->partner.modes_vdm[1], + "TBT mode VDOs did not match"); +} + +/* Without an e-marked cable, TBT mode cannot be entered */ +ZTEST_F(usbc_tbt_mode, verify_tbt_entry_fail) +{ + struct ec_response_typec_status status; + + fixture->partner.cable = NULL; + connect_sink_to_port(&fixture->partner, fixture->tcpci_emul, + fixture->charger_emul); + + status = host_cmd_typec_status(TEST_PORT); + zassume_equal((status.mux_state & USB_MUX_CHECK_MASK), + USB_PD_MUX_USB_ENABLED, "Unexpected starting mux: 0x%02x", + status.mux_state); + + /* TODO(b/237553647): Test EC-driven mode entry (requires a separate + * config). + */ + tcpci_partner_common_enable_pd_logging(&fixture->partner, true); + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_TBT); + k_sleep(K_SECONDS(1)); + + /* + * TODO(b/168030639): Notify the AP that the enter mode request + * failed. + */ + + /* Verify we refrained from sending TBT EnterMode. */ + tcpci_partner_common_enable_pd_logging(&fixture->partner, false); + verify_vdm_messages(fixture, NO_MSG, CMD_ENTER_MODE); + + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_MUX_CHECK_MASK), + USB_PD_MUX_USB_ENABLED, "Failed to see USB still set"); + zassert_not_equal((status.mux_state & USB_MUX_CHECK_MASK), + USB_PD_MUX_TBT_COMPAT_ENABLED, + "Unexpected TBT mode set"); +} + +/* With passive e-marked cable, TBT mode can be entered on SOP only */ +ZTEST_F(usbc_tbt_mode, verify_tbt_passive_entry_exit) +{ + struct ec_response_typec_status status; + + fixture->partner.cable = &passive_usb3; + connect_sink_to_port(&fixture->partner, fixture->tcpci_emul, + fixture->charger_emul); + + verify_cable_found(fixture->partner.cable); + + status = host_cmd_typec_status(TEST_PORT); + zassume_equal((status.mux_state & USB_MUX_CHECK_MASK), + USB_PD_MUX_USB_ENABLED, "Unexpected starting mux: 0x%02x", + status.mux_state); + + /* TODO(b/237553647): Test EC-driven mode entry (requires a separate + * config). + */ + tcpci_partner_common_enable_pd_logging(&fixture->partner, true); + host_cmd_typec_control_enter_mode(TEST_PORT, TYPEC_MODE_TBT); + k_sleep(K_SECONDS(1)); + + /* + * TODO(b/168030639): Notify the AP that the enter mode request + * succeeded. + */ + + /* Verify we sent a single TBT SOP EnterMode. */ + tcpci_partner_common_enable_pd_logging(&fixture->partner, false); + verify_vdm_messages(fixture, SOP_EXPECTED, CMD_ENTER_MODE); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_MUX_CHECK_MASK), + USB_PD_MUX_TBT_COMPAT_ENABLED, "Failed to see TBT set"); + + /* Exit modes now */ + tcpci_partner_common_clear_logged_msgs(&fixture->partner); + tcpci_partner_common_enable_pd_logging(&fixture->partner, true); + host_cmd_typec_control_exit_modes(TEST_PORT); + k_sleep(K_SECONDS(1)); + + /* Verify we sent a single TBT SOP ExitMode. */ + tcpci_partner_common_enable_pd_logging(&fixture->partner, false); + verify_vdm_messages(fixture, SOP_EXPECTED, CMD_EXIT_MODE); + status = host_cmd_typec_status(TEST_PORT); + zassert_equal((status.mux_state & USB_MUX_CHECK_MASK), + USB_PD_MUX_USB_ENABLED, "Failed to see USB set"); +} + +ZTEST_SUITE(usbc_tbt_mode, drivers_predicate_post_main, usbc_tbt_mode_setup, + usbc_tbt_mode_before, usbc_tbt_mode_after, NULL); diff --git a/zephyr/test/ec_app/BUILD.py b/zephyr/test/ec_app/BUILD.py deleted file mode 100644 index eeb85c0e46..0000000000 --- a/zephyr/test/ec_app/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for ec_app test.""" - -register_host_test("ec_app") diff --git a/zephyr/test/ec_app/CMakeLists.txt b/zephyr/test/ec_app/CMakeLists.txt index 8ee9a554a7..83daf93e67 100644 --- a/zephyr/test/ec_app/CMakeLists.txt +++ b/zephyr/test/ec_app/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(ec_app) FILE(GLOB app_sources src/*.c) diff --git a/zephyr/test/ec_app/boards/native_posix.overlay b/zephyr/test/ec_app/boards/native_posix.overlay new file mode 100644 index 0000000000..69bf044ec6 --- /dev/null +++ b/zephyr/test/ec_app/boards/native_posix.overlay @@ -0,0 +1,37 @@ +/* Copyright 2020 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> +#include <cros/binman.dtsi> + +/ { + chosen { + cros-ec,flash = &flash1; + cros-ec,flash-controller = &cros_flash; + }; + aliases { + gpio-wp = &gpio_wp_l; + }; + named-gpios { + compatible = "named-gpios"; + ec_gsc_packet_mode { + gpios = <&gpio0 2 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_wp_l: wp_l { + gpios = <&gpio0 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + }; + cros_flash: cros-flash { + compatible = "cros-ec,flash-emul"; + }; + flash1: flash@64000000 { + reg = <0x64000000 DT_SIZE_K(512)>; + }; +}; + +&gpio0 { + ngpios = <4>; +}; diff --git a/zephyr/test/ec_app/prj.conf b/zephyr/test/ec_app/prj.conf index b398d0dd8c..3b44c56b6b 100644 --- a/zephyr/test/ec_app/prj.conf +++ b/zephyr/test/ec_app/prj.conf @@ -1,7 +1,21 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y CONFIG_PLATFORM_EC=y CONFIG_CROS_EC=y +CONFIG_SHIMMED_TASKS=y +CONFIG_FLASH=y +CONFIG_SHELL_BACKEND_DUMMY=y +CONFIG_SHELL_BACKEND_SERIAL=n +CONFIG_SERIAL=y +CONFIG_RING_BUFFER=y + +CONFIG_EMUL_CROS_FLASH=y +CONFIG_PLATFORM_EC_VBOOT_EFS2=y +CONFIG_PLATFORM_EC_VBOOT_HASH=y +CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_SWITCH=n diff --git a/zephyr/test/ec_app/src/main.c b/zephyr/test/ec_app/src/main.c index 47aecc7eca..b106754d47 100644 --- a/zephyr/test/ec_app/src/main.c +++ b/zephyr/test/ec_app/src/main.c @@ -1,74 +1,71 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> +#include <zephyr/shell/shell_dummy.h> + #include "ec_app_main.h" #include "hooks.h" +#include "task.h" -static void test_init_reset_log(void) -{ #ifdef CONFIG_CMD_AP_RESET_LOG +ZTEST(ec_app_tests, test_init_reset_log) +{ zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif } +#endif -static void test_lpc_init_mask(void) -{ #ifdef CONFIG_HOSTCMD_X86 +ZTEST(ec_app_tests, test_lpc_init_mask) +{ zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif } +#endif -static void test_keyboard_scan_init(void) -{ #ifdef HAS_TASK_KEYSCAN +ZTEST(ec_app_tests, test_keyboard_scan_init) +{ zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif } +#endif -static void test_button_init(void) -{ #if defined(CONFIG_DEDICATED_RECOVERY_BUTTON) || defined(CONFIG_VOLUME_BUTTONS) +ZTEST(ec_app_tests, test_button_init) +{ zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif } +#endif -static void test_setup_espi(void) -{ #ifdef CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI +ZTEST(ec_app_tests, test_setup_espi) +{ zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif } +#endif -static void test_watchdog_init(void) -{ #ifdef CONFIG_PLATFORM_EC_WATCHDOG +ZTEST(ec_app_tests, test_watchdog_init) +{ zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif } +#endif -static void test_vboot_main(void) -{ #ifdef CONFIG_PLATFORM_EC_VBOOT_EFS2 - zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); -#endif +ZTEST(ec_app_tests, test_vboot_main) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + /* vboot_main logs the message "VB Verifying hash" */ + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_true(strstr(outbuffer, "VB Verifying hash") != NULL, + "'VB Verifying hash' not found in %s", outbuffer); } +#endif #ifdef CONFIG_PLATFORM_EC_HOOKS static int sample_init_hook_count; @@ -88,40 +85,28 @@ DECLARE_HOOK(HOOK_INIT, sample_init_hook, HOOK_PRIO_DEFAULT); * This test installs a hook, runs main and verifies that the hook ran. * */ -static void test_hook_notify_init(void) +ZTEST(ec_app_tests, test_hook_notify_init) { - sample_init_hook_count = 0; - ec_app_main(); zassert_equal(1, sample_init_hook_count, "Expected sample_init_hook to run once."); } -#else -static void test_hook_notify_init(void) +#endif + +#ifdef CONFIG_SHIMMED_TASKS +ZTEST(ec_app_tests, test_start_ec_tasks) { - ztest_test_skip(); + zassert_equal(task_start_called(), 1, "Tasks did not start."); } #endif -static void test_start_ec_tasks(void) +/* Does setup for all of the test cases. */ +void *ec_app_setup(void) { #ifdef CONFIG_SHIMMED_TASKS - zassert_unreachable("TODO: Implement this test."); -#else - ztest_test_skip(); + zassert_equal(task_start_called(), 0, "Tasks have already started."); #endif + ec_app_main(); + return NULL; } -void test_main(void) -{ - ztest_test_suite(ec_app_tests, ztest_unit_test(test_init_reset_log), - ztest_unit_test(test_lpc_init_mask), - ztest_unit_test(test_keyboard_scan_init), - ztest_unit_test(test_button_init), - ztest_unit_test(test_setup_espi), - ztest_unit_test(test_watchdog_init), - ztest_unit_test(test_vboot_main), - ztest_unit_test(test_hook_notify_init), - ztest_unit_test(test_start_ec_tasks)); - - ztest_run_test_suite(ec_app_tests); -} +ZTEST_SUITE(ec_app_tests, NULL, ec_app_setup, NULL, NULL, NULL); diff --git a/zephyr/test/ec_app/testcase.yaml b/zephyr/test/ec_app/testcase.yaml new file mode 100644 index 0000000000..4f21d64207 --- /dev/null +++ b/zephyr/test/ec_app/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + ec_app.default: {} diff --git a/zephyr/test/herobrine/CMakeLists.txt b/zephyr/test/herobrine/CMakeLists.txt new file mode 100644 index 0000000000..8209eb77fb --- /dev/null +++ b/zephyr/test/herobrine/CMakeLists.txt @@ -0,0 +1,14 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(herobrine) + +zephyr_include_directories("${PLATFORM_EC}/zephyr/projects/herobrine/include") + +target_sources_ifdef(CONFIG_TEST_BOARD_CHIPSET + app PRIVATE src/board_chipset.c) +target_sources_ifdef(CONFIG_TEST_BOARD_CHIPSET + app PRIVATE ${PLATFORM_EC}/zephyr/projects/herobrine/src/board_chipset.c) diff --git a/zephyr/test/herobrine/Kconfig b/zephyr/test/herobrine/Kconfig new file mode 100644 index 0000000000..415e6e58af --- /dev/null +++ b/zephyr/test/herobrine/Kconfig @@ -0,0 +1,12 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config TEST_BOARD_CHIPSET + bool "Run the tests intended for board_chipset" + help + Include board_chipset.c into the binary. Test their functions in + different combinations: good battery vs low battery, normal boot + vs delayed boot, etc. + +source "Kconfig.zephyr" diff --git a/zephyr/test/herobrine/README.md b/zephyr/test/herobrine/README.md new file mode 100644 index 0000000000..398b27e304 --- /dev/null +++ b/zephyr/test/herobrine/README.md @@ -0,0 +1,3 @@ +Tests for board specific code under `zephyr/projects/herobrine/src`. + +Run with ./twister -T zephyr/test/herobrine diff --git a/zephyr/test/herobrine/boards/native_posix.overlay b/zephyr/test/herobrine/boards/native_posix.overlay new file mode 100644 index 0000000000..bfecc9a7d5 --- /dev/null +++ b/zephyr/test/herobrine/boards/native_posix.overlay @@ -0,0 +1,26 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> + +/ { + /* + * Keep these GPIOs in pin order. + * If you need to add one, make sure you increase + * ngpios in the gpio0 node further down. + */ + named-gpios { + compatible = "named-gpios"; + + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpio0 2 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_EN_PP5000"; + }; + }; +}; + +&gpio0 { + ngpios = <3>; +}; diff --git a/zephyr/test/herobrine/prj.conf b/zephyr/test/herobrine/prj.conf new file mode 100644 index 0000000000..3334f11939 --- /dev/null +++ b/zephyr/test/herobrine/prj.conf @@ -0,0 +1,11 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_ZTEST=y +CONFIG_ZTEST_ASSERT_VERBOSE=1 +CONFIG_ZTEST_NEW_API=y +CONFIG_ASSERT=y + +CONFIG_CROS_EC=y +CONFIG_PLATFORM_EC=y diff --git a/zephyr/test/herobrine/src/board_chipset.c b/zephyr/test/herobrine/src/board_chipset.c new file mode 100644 index 0000000000..77bdb14e16 --- /dev/null +++ b/zephyr/test/herobrine/src/board_chipset.c @@ -0,0 +1,76 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/kernel.h> +#include <zephyr/ztest.h> + +#include "hooks.h" +#include "board_chipset.h" + +static int battery_soc_abs_value = 50; + +int battery_state_of_charge_abs(int *percent) +{ + *percent = battery_soc_abs_value; + return EC_SUCCESS; +} + +int charger_get_min_bat_pct_for_power_on(void) +{ + return 2; +} + +ZTEST_USER(board_chipset, test_good_battery_normal_boot) +{ + timestamp_t start_time; + uint64_t time_diff_us; + + battery_soc_abs_value = 50; + + start_time = get_time(); + hook_notify(HOOK_CHIPSET_PRE_INIT); + time_diff_us = get_time().val - start_time.val; + + zassert_true(time_diff_us < 10, "CHIPSET_PRE_INIT hook delayed", NULL); +} + +ZTEST_USER(board_chipset, test_low_battery_normal_boot) +{ + timestamp_t start_time; + uint64_t time_diff_us; + + battery_soc_abs_value = 1; + + start_time = get_time(); + hook_notify(HOOK_CHIPSET_PRE_INIT); + time_diff_us = get_time().val - start_time.val; + + zassert_true(time_diff_us < 10, "CHIPSET_PRE_INIT hook delayed", NULL); +} + +ZTEST_USER(board_chipset, test_low_battery_delayed_boot) +{ + timestamp_t start_time; + uint64_t time_diff_us; + + battery_soc_abs_value = 1; + /* The PD connect event delays the power on sequence */ + hook_notify(HOOK_USB_PD_CONNECT); + + start_time = get_time(); + hook_notify(HOOK_CHIPSET_PRE_INIT); + time_diff_us = get_time().val - start_time.val; + + zassert_true(time_diff_us > 500000, "CHIPSET_PRE_INIT hook not delayed", + NULL); +} + +static void test_before(void *data) +{ + ARG_UNUSED(data); + reset_pp5000_inited(); +} + +ZTEST_SUITE(board_chipset, NULL, NULL, test_before, NULL, NULL); diff --git a/zephyr/test/herobrine/testcase.yaml b/zephyr/test/herobrine/testcase.yaml new file mode 100644 index 0000000000..e5f17a3848 --- /dev/null +++ b/zephyr/test/herobrine/testcase.yaml @@ -0,0 +1,10 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +common: + platform_allow: native_posix +tests: + herobrine.board_chipset: + extra_configs: + - CONFIG_TEST_BOARD_CHIPSET=y diff --git a/zephyr/test/hooks/BUILD.py b/zephyr/test/hooks/BUILD.py deleted file mode 100644 index ee25ae52bc..0000000000 --- a/zephyr/test/hooks/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for hooks test.""" - -register_host_test("hooks") diff --git a/zephyr/test/hooks/CMakeLists.txt b/zephyr/test/hooks/CMakeLists.txt index 81ff57d69d..99b0b3f430 100644 --- a/zephyr/test/hooks/CMakeLists.txt +++ b/zephyr/test/hooks/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(hooks) target_sources(app PRIVATE hooks.c) diff --git a/zephyr/test/hooks/boards/native_posix.overlay b/zephyr/test/hooks/boards/native_posix.overlay new file mode 100644 index 0000000000..90c864d2fd --- /dev/null +++ b/zephyr/test/hooks/boards/native_posix.overlay @@ -0,0 +1,6 @@ +/* Copyright 2020 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> diff --git a/zephyr/test/hooks/hooks.c b/zephyr/test/hooks/hooks.c index 0070f2e6b4..7d784aa65f 100644 --- a/zephyr/test/hooks/hooks.c +++ b/zephyr/test/hooks/hooks.c @@ -1,10 +1,10 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <stdbool.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "ap_power/ap_power.h" #include "hooks.h" @@ -40,7 +40,7 @@ static void h3(void) } DECLARE_HOOK(HOOK_TEST_1, h3, HOOK_PRIO_LAST); -static void test_hook_list_multiple(void) +ZTEST(hooks_tests, test_hook_list_multiple) { hook_notify(HOOK_TEST_1); zassert_true(h1_called, "h1 was not called, but should have been"); @@ -57,13 +57,13 @@ static void h4(void) } DECLARE_HOOK(HOOK_TEST_2, h4, HOOK_PRIO_DEFAULT); -static void test_hook_list_single(void) +ZTEST(hooks_tests, test_hook_list_single) { hook_notify(HOOK_TEST_2); zassert_true(h4_called, "h4 was not called, but should have been"); } -static void test_hook_list_empty(void) +ZTEST(hooks_tests, test_hook_list_empty) { hook_notify(HOOK_TEST_3); } @@ -77,7 +77,7 @@ static void deferred_func(void) } DECLARE_DEFERRED(deferred_func); -static void test_deferred_func(void) +ZTEST(hooks_tests, test_deferred_func) { zassert_false( deferred_func_called, @@ -104,7 +104,7 @@ DECLARE_DEFERRED(deferred_func_2); * Test that repeated calls to hook_call_deferred result in the * function being pushed out. */ -static void test_deferred_func_push_out(void) +ZTEST(hooks_tests, test_deferred_func_push_out) { zassert_false( deferred_func_2_called, @@ -129,7 +129,7 @@ static void deferred_func_3(void) } DECLARE_DEFERRED(deferred_func_3); -static void test_deferred_func_cancel(void) +ZTEST(hooks_tests, test_deferred_func_cancel) { zassert_false( deferred_func_3_called, @@ -164,7 +164,7 @@ static void ev_handler(struct ap_power_ev_callback *callback, ev->event = data.event; } -static void test_hook_ap_power_events(void) +ZTEST(hooks_tests, test_hook_ap_power_events) { static struct events cb; @@ -179,7 +179,7 @@ static void test_hook_ap_power_events(void) cb.count = 0; ap_power_ev_init_callback(&cb.cb, ev_handler, - AP_POWER_SUSPEND|AP_POWER_RESUME); + AP_POWER_SUSPEND | AP_POWER_RESUME); ap_power_ev_add_callback(&cb.cb); hook_notify(HOOK_CHIPSET_SUSPEND); zassert_equal(1, cb.count, "Callbacks not called"); @@ -199,17 +199,4 @@ static void test_hook_ap_power_events(void) zassert_equal(3, cb.count, "Startup callback not called"); } -void test_main(void) -{ - ztest_test_suite( - hooks_tests, - ztest_unit_test(test_hook_list_multiple), - ztest_unit_test(test_hook_list_single), - ztest_unit_test(test_hook_list_empty), - ztest_unit_test(test_deferred_func), - ztest_unit_test(test_deferred_func_push_out), - ztest_unit_test(test_deferred_func_cancel), - ztest_unit_test(test_hook_ap_power_events)); - - ztest_run_test_suite(hooks_tests); -} +ZTEST_SUITE(hooks_tests, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/hooks/prj.conf b/zephyr/test/hooks/prj.conf index c0c02e22ca..cab9107094 100644 --- a/zephyr/test/hooks/prj.conf +++ b/zephyr/test/hooks/prj.conf @@ -1,8 +1,9 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y CONFIG_PLATFORM_EC=y CONFIG_PLATFORM_EC_HOOKS=y CONFIG_CROS_EC=y diff --git a/zephyr/test/hooks/testcase.yaml b/zephyr/test/hooks/testcase.yaml new file mode 100644 index 0000000000..f35baae16b --- /dev/null +++ b/zephyr/test/hooks/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + hooks.default: {} diff --git a/zephyr/test/i2c/BUILD.py b/zephyr/test/i2c/BUILD.py deleted file mode 100644 index 86d9da537a..0000000000 --- a/zephyr/test/i2c/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for i2c test.""" - -register_host_test("i2c", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/i2c/CMakeLists.txt b/zephyr/test/i2c/CMakeLists.txt index 214177013f..4b355c4932 100644 --- a/zephyr/test/i2c/CMakeLists.txt +++ b/zephyr/test/i2c/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(i2c) target_sources(app PRIVATE src/main.c) diff --git a/zephyr/test/i2c/boards/native_posix.overlay b/zephyr/test/i2c/boards/native_posix.overlay new file mode 100644 index 0000000000..e78c5d0faa --- /dev/null +++ b/zephyr/test/i2c/boards/native_posix.overlay @@ -0,0 +1,37 @@ +/* Copyright 2020 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> + +/ { + i2c1: i2c@400 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x400 4>; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + accel-0 { + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_ACCEL", + "I2C_PORT_EEPROM"; + }; + usb-c1 { + i2c-port = <&i2c1>; + enum-names = "I2C_PORT_USB_C1"; + }; + }; +}; + +&i2c0 { + bmi_i2c: bmi@68 { + compatible = "bosch,bmi160"; + reg = <0x68>; + }; +}; diff --git a/zephyr/test/i2c/prj.conf b/zephyr/test/i2c/prj.conf index 69c276712e..ee6c43f51a 100644 --- a/zephyr/test/i2c/prj.conf +++ b/zephyr/test/i2c/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/i2c/src/main.c b/zephyr/test/i2c/src/main.c index dbe9878da5..364353f06d 100644 --- a/zephyr/test/i2c/src/main.c +++ b/zephyr/test/i2c/src/main.c @@ -1,13 +1,14 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/devicetree.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "common.h" #include "i2c/i2c.h" +#include "i2c.h" /* Unused: required for shimming i2c. */ void watchdog_reload(void) @@ -16,18 +17,47 @@ void watchdog_reload(void) static void test_i2c_port_count(void) { - zassert_equal(NAMED_I2C(accel_0), 0, - "accel_0 expected to be 0 but was %d", - NAMED_I2C(accel_0)); - zassert_equal(I2C_PORT_COUNT, 1, - "I2C_PORT_COUNT expected to be 1 but was %d", + zassert_equal(I2C_PORT_COUNT, 2, + "I2C_PORT_COUNT expected to be 2 but was %d", I2C_PORT_COUNT); } +static void test_i2c_lock(void) +{ + i2c_lock(I2C_PORT_ACCEL, 1); + zassert_equal(i2c_port_is_locked(I2C_PORT_EEPROM), 1, + "I2C_PORT_EEPROM not locked"); + zassert_equal(i2c_port_is_locked(I2C_PORT_ACCEL), 1, + "I2C_PORT_ACCEL not locked"); + + /* Unlock different enum pointing the same i2c device */ + i2c_lock(I2C_PORT_EEPROM, 0); + zassert_equal(i2c_port_is_locked(I2C_PORT_EEPROM), 0, + "I2C_PORT_EEPROM not locked"); + zassert_equal(i2c_port_is_locked(I2C_PORT_ACCEL), 0, + "I2C_PORT_ACCEL not locked"); + + i2c_lock(I2C_PORT_EEPROM, 1); + /* Verify different i2c device */ + zassert_equal(i2c_port_is_locked(I2C_PORT_USB_C1), 0, + "I2C_PORT_USB_C1 locked"); + + i2c_lock(I2C_PORT_USB_C1, 1); + /* Make sure i2c device is locked*/ + zassert_equal(i2c_port_is_locked(I2C_PORT_USB_C1), 1, + "I2C_PORT_USB_C1 locked"); + + /* Another i2c device is still locked */ + i2c_lock(I2C_PORT_USB_C1, 0); + zassert_equal(i2c_port_is_locked(I2C_PORT_EEPROM), 1, + "I2C_PORT_EEPROM not locked"); + i2c_lock(I2C_PORT_EEPROM, 0); +} + /* Test case main entry. */ void test_main(void) { - ztest_test_suite(test_i2c, - ztest_user_unit_test(test_i2c_port_count)); + ztest_test_suite(test_i2c, ztest_user_unit_test(test_i2c_port_count), + ztest_user_unit_test(test_i2c_lock)); ztest_run_test_suite(test_i2c); } diff --git a/zephyr/test/i2c/testcase.yaml b/zephyr/test/i2c/testcase.yaml new file mode 100644 index 0000000000..4e111ea13f --- /dev/null +++ b/zephyr/test/i2c/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + i2c.default: {} diff --git a/zephyr/test/i2c_dts/BUILD.py b/zephyr/test/i2c_dts/BUILD.py deleted file mode 100644 index e0e97be121..0000000000 --- a/zephyr/test/i2c_dts/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for i2c_dts test.""" - -register_host_test("i2c_dts", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/i2c_dts/CMakeLists.txt b/zephyr/test/i2c_dts/CMakeLists.txt index eea2834af1..3e36468a33 100644 --- a/zephyr/test/i2c_dts/CMakeLists.txt +++ b/zephyr/test/i2c_dts/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(i2c_test) FILE(GLOB app_sources src/*.c) diff --git a/zephyr/test/i2c/overlay.dts b/zephyr/test/i2c_dts/boards/native_posix.overlay index 1519bb1cb7..0abd2f1f31 100644 --- a/zephyr/test/i2c/overlay.dts +++ b/zephyr/test/i2c_dts/boards/native_posix.overlay @@ -1,14 +1,16 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <board-overlays/native_posix.dts> + / { named-i2c-ports { compatible = "named-i2c-ports"; accel-0 { - i2c-port = <&bmi_i2c>; - enum-name = "I2C_PORT_ACCEL"; + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_ACCEL"; }; }; }; @@ -17,6 +19,5 @@ bmi_i2c: bmi@68 { compatible = "bosch,bmi160"; reg = <0x68>; - label = "accel-i2c"; }; }; diff --git a/zephyr/test/i2c_dts/overlay.dts b/zephyr/test/i2c_dts/overlay.dts deleted file mode 100644 index 1519bb1cb7..0000000000 --- a/zephyr/test/i2c_dts/overlay.dts +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - named-i2c-ports { - compatible = "named-i2c-ports"; - accel-0 { - i2c-port = <&bmi_i2c>; - enum-name = "I2C_PORT_ACCEL"; - }; - }; -}; - -&i2c0 { - bmi_i2c: bmi@68 { - compatible = "bosch,bmi160"; - reg = <0x68>; - label = "accel-i2c"; - }; -}; diff --git a/zephyr/test/i2c_dts/prj.conf b/zephyr/test/i2c_dts/prj.conf index a08cdbb7fb..6c008faf64 100644 --- a/zephyr/test/i2c_dts/prj.conf +++ b/zephyr/test/i2c_dts/prj.conf @@ -1,4 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y CONFIG_LOG=y CONFIG_EMUL=y diff --git a/zephyr/test/i2c_dts/src/main.c b/zephyr/test/i2c_dts/src/main.c index 7cb1052798..1557eaf9e9 100644 --- a/zephyr/test/i2c_dts/src/main.c +++ b/zephyr/test/i2c_dts/src/main.c @@ -1,30 +1,23 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/device.h> #include <zephyr/devicetree.h> -#include <ztest.h> +#include <zephyr/ztest.h> -static void test_i2c_get_device(void) +ZTEST(i2c_bindings, test_i2c_get_device) { const struct device *accel0 = DEVICE_DT_GET( - DT_PHANDLE(DT_PATH(named_i2c_ports, accel_0), - i2c_port)); - const struct device *bmi_i2c = DEVICE_DT_GET( - DT_NODELABEL(bmi_i2c)); + DT_PHANDLE(DT_PATH(named_i2c_ports, accel_0), i2c_port)); + const struct device *bmi_i2c = DEVICE_DT_GET(DT_NODELABEL(i2c0)); zassert_not_null(accel0, "accel0 was NULL"); zassert_not_null(bmi_i2c, "bmi_i2c was NULL"); - zassert_equal(accel0, bmi_i2c, + zassert_equal( + accel0, bmi_i2c, "named_i2c_ports/accel0 and bmi_i2c should resolve to the same device"); } -/* test case main entry */ -void test_main(void) -{ - ztest_test_suite(test_i2c_bindings, - ztest_user_unit_test(test_i2c_get_device)); - ztest_run_test_suite(test_i2c_bindings); -} +ZTEST_SUITE(i2c_bindings, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/i2c_dts/testcase.yaml b/zephyr/test/i2c_dts/testcase.yaml new file mode 100644 index 0000000000..7b3d133a27 --- /dev/null +++ b/zephyr/test/i2c_dts/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + i2c_dts.default: {} diff --git a/zephyr/test/kingler/CMakeLists.txt b/zephyr/test/kingler/CMakeLists.txt new file mode 100644 index 0000000000..b572e67fb5 --- /dev/null +++ b/zephyr/test/kingler/CMakeLists.txt @@ -0,0 +1,26 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(kingler) + +zephyr_include_directories("${PLATFORM_EC}/zephyr/projects/corsola/include") + +target_sources(app PRIVATE src/fakes.c) + +target_sources_ifdef(CONFIG_TEST_STEELIX_RUSTY +app PRIVATE ${PLATFORM_EC}/zephyr/projects/corsola/src/kingler/board_steelix.c) +target_sources_ifdef(CONFIG_TEST_FORM_FACTOR_CONVERTIBLE + app PRIVATE src/tablet.c) +target_sources_ifdef(CONFIG_TEST_FORM_FACTOR_CLAMSHELL + app PRIVATE src/clamshell.c) +target_sources_ifdef(CONFIG_VARIANT_CORSOLA_DB_DETECTION +app PRIVATE ${PLATFORM_EC}/zephyr/projects/corsola/src/variant_db_detection.c) +target_sources_ifdef(CONFIG_TEST_DB_DETECT_TYPEC + app PRIVATE src/db_detect_typec.c) +target_sources_ifdef(CONFIG_TEST_DB_DETECT_HDMI + app PRIVATE src/db_detect_hdmi.c) +target_sources_ifdef(CONFIG_TEST_DB_DETECT_NONE + app PRIVATE src/db_detect_none.c) diff --git a/zephyr/test/kingler/Kconfig b/zephyr/test/kingler/Kconfig new file mode 100644 index 0000000000..af52042cb6 --- /dev/null +++ b/zephyr/test/kingler/Kconfig @@ -0,0 +1,45 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config TEST_STEELIX_RUSTY + bool "Run the tests intended for steelix and rusty" + help + Include board_steelix.c into the binary to test the clamshell and + convertible. + +config TEST_FORM_FACTOR_CLAMSHELL + bool "Run the tests intended for clamshells" + help + Include clamshell tests into the binary. + +config TEST_FORM_FACTOR_CONVERTIBLE + bool "Run the tests intended for convertibles" + help + Include convertible tests into the binary. + +config VARIANT_CORSOLA_DB_DETECTION + bool "Run the tests intended for corsola DB detection" + help + Include variant_db_detection.c into the binary to test the type-c DB + tests, HDMI DB tests and none DB tests. + +config TEST_DB_DETECT_TYPEC + bool "Run the tests intended for type-c DB" + help + Include type-c DB tests into the binary. + test for DB GPIOs and interrupt. + +config TEST_DB_DETECT_HDMI + bool "Run the tests intended for HDMI DB" + help + Include HDMI DB tests into the binary. + test for DB GPIOs and interrupt. + +config TEST_DB_DETECT_NONE + bool "Run the tests intended for none DB" + help + Include none DB tests into the binary. + test for DB GPIOs and interrupt. + +source "Kconfig.zephyr" diff --git a/zephyr/test/kingler/README.md b/zephyr/test/kingler/README.md new file mode 100644 index 0000000000..bac3afced2 --- /dev/null +++ b/zephyr/test/kingler/README.md @@ -0,0 +1,3 @@ +Tests for board specific code under `zephyr/projects/corsola/src/kingler`. + +Run with ./twister -T zephyr/test/kingler diff --git a/zephyr/test/kingler/common.dts b/zephyr/test/kingler/common.dts new file mode 100644 index 0000000000..e065da896a --- /dev/null +++ b/zephyr/test/kingler/common.dts @@ -0,0 +1,155 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> +#include <npcx_emul.dts> + +/ { + /* These are temporary just to get the test to build. + * Should be replaced with the correct accel drivers, + * but we're not testing that code right now anyway. + */ + motionsense-sensor-data { + bmi160_data: bmi160-drv-data { + compatible = "cros-ec,drvdata-bmi160"; + status = "okay"; + }; + }; + motionsense-sensor { + base_accel: ms-bmi160-accel { + compatible = "cros-ec,bmi160-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3_S5"; + location = "MOTIONSENSE_LOC_BASE"; + drv-data = <&bmi160_data>; + default-range = <4>; + i2c-spi-addr-flags = "BMI160_ADDR0_FLAGS"; + }; + lid_accel: ms-bmi160-accel2 { + compatible = "cros-ec,bmi160-accel"; + status = "okay"; + + active-mask = "SENSOR_ACTIVE_S0_S3_S5"; + location = "MOTIONSENSE_LOC_BASE"; + drv-data = <&bmi160_data>; + default-range = <4>; + i2c-spi-addr-flags = "BMI160_ADDR0_FLAGS"; + }; + }; + motionsense-sensor-info { + compatible = "cros-ec,motionsense-sensor-info"; + + /* + * list of GPIO interrupts that have to + * be enabled at initial stage + */ + sensor-irqs = <&int_base_imu>; + /* list of sensors in force mode */ + accel-force-mode-sensors = <&lid_accel>; + }; + named-i2c-ports { + compatible = "named-i2c-ports"; + i2c_sensor: sensor { + i2c-port = <&i2c0_0>; + enum-names = "I2C_PORT_SENSOR"; + }; + i2c_eeprom: sensor { + i2c-port = <&i2c3_0>; + enum-names = "I2C_PORT_EEPROM"; + }; + }; + /* TODO(jbettis): Move the i2c ports and pinctrls to npcx_emul.dts, + * and add all of them instead of just these. + */ + soc-if { + i2c0_0: io_i2c_ctrl0_port0 { + compatible = "nuvoton,npcx-i2c-port"; + #address-cells = <1>; + #size-cells = <0>; + port = <0x00>; + controller = <&i2c_ctrl0>; + status = "disabled"; + }; + i2c3_0: io_i2c_ctrl3_port0 { + compatible = "nuvoton,npcx-i2c-port"; + #address-cells = <1>; + #size-cells = <0>; + port = <0x30>; + controller = <&i2c_ctrl3>; + status = "disabled"; + }; + }; + pinctrl: pinctrl { + compatible = "nuvoton,npcx-pinctrl"; + status = "okay"; + /* I2C peripheral interfaces */ + /omit-if-no-ref/ i2c0_0_sda_scl_gpb4_b5: periph-i2c0-0 { + pinmux = <&alt2_i2c0_0_sl>; + periph-pupd = <0x00 0>; + }; + /omit-if-no-ref/ i2c3_0_sda_scl_gpd0_d1: periph-i2c3-0 { + pinmux = <&alt2_i2c3_0_sl>; + periph-pupd = <0x00 6>; + }; + }; + npcx-alts-map { + compatible = "nuvoton,npcx-pinctrl-conf"; + /* SCFG DEVALT 2 */ + alt2_i2c0_0_sl: alt20 { + alts = <&scfg 0x02 0x0 0>; + }; + alt2_i2c3_0_sl: alt26 { + alts = <&scfg 0x02 0x6 0>; + }; + }; +}; + +&i2c0_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; + pinctrl-names = "default"; +}; + +&i2c_ctrl0 { + status = "okay"; +}; + +&i2c_ctrl2 { + status = "okay"; +}; + +i2c_pwr_cbi: &i2c3_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; + pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; + pinctrl-names = "default"; + + charger: isl923x@9 { + compatible = "intersil,isl923x"; + status = "okay"; + reg = <0x9>; + }; +}; + +&i2c_ctrl3 { + status = "okay"; +}; + +&i2c_ctrl5 { + status = "okay"; +}; + +&i2c_ctrl3 { + cbi_eeprom: eeprom@50 { + compatible = "atmel,at24"; + reg = <0x50>; + size = <2048>; + pagesize = <16>; + address-width = <8>; + timeout = <5>; + }; +}; diff --git a/zephyr/test/kingler/prj.conf b/zephyr/test/kingler/prj.conf new file mode 100644 index 0000000000..dfa1c68d4d --- /dev/null +++ b/zephyr/test/kingler/prj.conf @@ -0,0 +1,31 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_ZTEST=y +CONFIG_ZTEST_ASSERT_VERBOSE=1 +CONFIG_ZTEST_NEW_API=y +CONFIG_ASSERT=y +CONFIG_EMUL=y +CONFIG_PLATFORM_EC_HOOKS=y + +CONFIG_CROS_EC=y +CONFIG_PLATFORM_EC=y +CONFIG_SHIMMED_TASKS=y + +CONFIG_PLATFORM_EC_MOTIONSENSE=y +CONFIG_PLATFORM_EC_DYNAMIC_MOTION_SENSOR_COUNT=y +CONFIG_PLATFORM_EC_GMR_TABLET_MODE=y +CONFIG_PLATFORM_EC_TABLET_MODE=y +CONFIG_PLATFORM_EC_LID_ANGLE=y + +CONFIG_I2C=y +CONFIG_I2C_NPCX=n + +CONFIG_PLATFORM_EC_CBI_EEPROM=y +CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y +CONFIG_EEPROM=y +CONFIG_EEPROM_AT24=y +CONFIG_EEPROM_SIMULATOR=n +CONFIG_EMUL_EEPROM_AT2X=y +CONFIG_EEPROM_SHELL=n diff --git a/zephyr/test/kingler/src/clamshell.c b/zephyr/test/kingler/src/clamshell.c new file mode 100644 index 0000000000..88595cc114 --- /dev/null +++ b/zephyr/test/kingler/src/clamshell.c @@ -0,0 +1,89 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "zephyr/kernel.h" +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/ztest.h> + +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "tablet_mode.h" + +static void *clamshell_setup(void) +{ + uint32_t val; + const struct device *wp_gpio = + DEVICE_DT_GET(DT_GPIO_CTLR(DT_ALIAS(gpio_wp), gpios)); + const gpio_port_pins_t wp_pin = DT_GPIO_PIN(DT_ALIAS(gpio_wp), gpios); + + /* Make sure that write protect is disabled */ + zassert_ok(gpio_emul_input_set(wp_gpio, wp_pin, 1), NULL); + /* Set CBI form factor to CONVERTIBLE. */ + zassert_ok(cbi_set_fw_config(CLAMSHELL << 13), NULL); + /* Run init hooks to initialize cbi. */ + hook_notify(HOOK_INIT); + + /* Check if CBI write worked. */ + zassert_ok(cros_cbi_get_fw_config(FORM_FACTOR, &val), NULL); + zassert_equal(CLAMSHELL, val, "val=%d", val); + + return NULL; +} + +ZTEST_SUITE(steelix_clamshell, NULL, clamshell_setup, NULL, NULL, NULL); + +ZTEST(steelix_clamshell, test_gmr_tablet_switch_disabled) +{ + const struct device *tablet_mode_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_tablet_mode_l), gpios)); + const gpio_port_pins_t tablet_mode_pin = + DT_GPIO_PIN(DT_NODELABEL(gpio_tablet_mode_l), gpios); + + /* Verify gmr_tablet_switch is disabled, by checking the side effects + * of calling tablet_set_mode, and setting gpio_tablet_mode_l. + */ + zassert_ok(gpio_emul_input_set(tablet_mode_gpio, tablet_mode_pin, 0), + NULL); + k_sleep(K_MSEC(100)); + tablet_set_mode(1, TABLET_TRIGGER_LID); + zassert_equal(0, tablet_get_mode(), NULL); + zassert_ok(gpio_emul_input_set(tablet_mode_gpio, tablet_mode_pin, 1), + NULL); + k_sleep(K_MSEC(100)); + tablet_set_mode(0, TABLET_TRIGGER_LID); + zassert_equal(0, tablet_get_mode(), NULL); + zassert_ok(gpio_emul_input_set(tablet_mode_gpio, tablet_mode_pin, 0), + NULL); + k_sleep(K_MSEC(100)); + tablet_set_mode(1, TABLET_TRIGGER_LID); + zassert_equal(0, tablet_get_mode(), NULL); +} + +static int interrupt_count; + +void bmi3xx_interrupt(enum gpio_signal signal) +{ + interrupt_count++; +} + +ZTEST(steelix_clamshell, test_base_imu_irq_disabled) +{ + const struct device *base_imu_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(base_imu_int_l), gpios)); + const gpio_port_pins_t base_imu_pin = + DT_GPIO_PIN(DT_NODELABEL(base_imu_int_l), gpios); + + /* Verify base_imu_irq is disabled. */ + interrupt_count = 0; + zassert_ok(gpio_emul_input_set(base_imu_gpio, base_imu_pin, 1), NULL); + k_sleep(K_MSEC(100)); + zassert_ok(gpio_emul_input_set(base_imu_gpio, base_imu_pin, 0), NULL); + k_sleep(K_MSEC(100)); + + zassert_equal(interrupt_count, 0, "interrupt_count=%d", + interrupt_count); +} diff --git a/zephyr/test/kingler/src/db_detect_hdmi.c b/zephyr/test/kingler/src/db_detect_hdmi.c new file mode 100644 index 0000000000..35cf92ae5e --- /dev/null +++ b/zephyr/test/kingler/src/db_detect_hdmi.c @@ -0,0 +1,83 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "zephyr/kernel.h" +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/ztest.h> + +#include "gpio_signal.h" +#include "hooks.h" +#include "variant_db_detection.h" + +static void *db_detection_setup(void) +{ + const struct device *hdmi_prsnt_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_hdmi_prsnt_odl), gpios)); + const gpio_port_pins_t hdmi_prsnt_pin = + DT_GPIO_PIN(DT_NODELABEL(gpio_hdmi_prsnt_odl), gpios); + /* Set the GPIO to low to indicate the DB is HDMI */ + zassert_ok(gpio_emul_input_set(hdmi_prsnt_gpio, hdmi_prsnt_pin, 0), + NULL); + + hook_notify(HOOK_INIT); + + return NULL; +} + +ZTEST_SUITE(db_detection, NULL, db_detection_setup, NULL, NULL, NULL); + +static int interrupt_count; +void x_ec_interrupt(enum gpio_signal signal) +{ + interrupt_count++; +} + +/* test hdmi db case */ +ZTEST(db_detection, test_db_detect_hdmi) +{ + const struct device *en_hdmi_gpio = + DEVICE_DT_GET(DT_GPIO_CTLR(DT_ALIAS(gpio_en_hdmi_pwr), gpios)); + const gpio_port_pins_t en_hdmi_pin = + DT_GPIO_PIN(DT_ALIAS(gpio_en_hdmi_pwr), gpios); + const struct device *ps185_pwrdn_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_ALIAS(gpio_ps185_pwrdn_odl), gpios)); + const gpio_port_pins_t ps185_pwrdn_pin = + DT_GPIO_PIN(DT_ALIAS(gpio_ps185_pwrdn_odl), gpios); + const struct device *int_x_ec_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_x_ec_gpio2), gpios)); + const gpio_port_pins_t int_x_ec_pin = + DT_GPIO_PIN(DT_NODELABEL(gpio_x_ec_gpio2), gpios); + + /* Check the DB type is HDMI */ + zassert_equal(CORSOLA_DB_HDMI, corsola_get_db_type(), NULL); + + /* Verify we can enable or disable hdmi power */ + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_en_hdmi_pwr), 1), + NULL); + zassert_equal(1, gpio_emul_output_get(en_hdmi_gpio, en_hdmi_pin), NULL); + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_en_hdmi_pwr), 0), + NULL); + zassert_equal(0, gpio_emul_output_get(en_hdmi_gpio, en_hdmi_pin), NULL); + + /* Verify we can change the gpio_ps185_pwrdn_odl state */ + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_ps185_pwrdn_odl), 1), + NULL); + zassert_equal(1, + gpio_emul_output_get(ps185_pwrdn_gpio, ps185_pwrdn_pin), + NULL); + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_ps185_pwrdn_odl), 0), + NULL); + zassert_equal(0, + gpio_emul_output_get(ps185_pwrdn_gpio, ps185_pwrdn_pin), + NULL); + + /* Verify x_ec_interrupt is enabled */ + interrupt_count = 0; + zassert_ok(gpio_emul_input_set(int_x_ec_gpio, int_x_ec_pin, 1), NULL); + k_sleep(K_MSEC(100)); + + zassert_equal(interrupt_count, 1, "interrupt_count=%d", + interrupt_count); +} diff --git a/zephyr/test/kingler/src/db_detect_none.c b/zephyr/test/kingler/src/db_detect_none.c new file mode 100644 index 0000000000..9f37db04af --- /dev/null +++ b/zephyr/test/kingler/src/db_detect_none.c @@ -0,0 +1,79 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdlib.h> +#include <zephyr/kernel.h> +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/ztest.h> + +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "variant_db_detection.h" + +static void *db_detection_setup(void) +{ + const struct device *wp_gpio = + DEVICE_DT_GET(DT_GPIO_CTLR(DT_ALIAS(gpio_wp), gpios)); + const gpio_port_pins_t wp_pin = DT_GPIO_PIN(DT_ALIAS(gpio_wp), gpios); + + /* Make sure that write protect is disabled */ + zassert_ok(gpio_emul_input_set(wp_gpio, wp_pin, 1), NULL); + /* Set CBI db_config to DB_NONE. */ + zassert_ok(cbi_set_fw_config(DB_NONE << 0), NULL); + /* Run init hooks to initialize cbi. */ + hook_notify(HOOK_INIT); + return NULL; +} + +ZTEST_SUITE(db_detection, NULL, db_detection_setup, NULL, NULL, NULL); + +static int interrupt_count; +void x_ec_interrupt(enum gpio_signal signal) +{ + interrupt_count++; +} + +/* test none db case */ +ZTEST(db_detection, test_db_detect_none) +{ + gpio_flags_t *flags = (gpio_flags_t *)malloc(sizeof(gpio_flags_t)); + + const struct device *ec_x_gpio1 = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_ec_x_gpio1), gpios)); + gpio_pin_t ec_x_pin1 = + DT_GPIO_PIN(DT_NODELABEL(gpio_ec_x_gpio1), gpios); + const struct device *x_ec_gpio2 = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_x_ec_gpio2), gpios)); + gpio_pin_t x_ec_pin2 = + DT_GPIO_PIN(DT_NODELABEL(gpio_x_ec_gpio2), gpios); + const struct device *ec_x_gpio3 = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_ec_x_gpio3), gpios)); + gpio_pin_t ec_x_pin3 = + DT_GPIO_PIN(DT_NODELABEL(gpio_ec_x_gpio3), gpios); + + /* Check the DB type is NONE */ + zassert_equal(CORSOLA_DB_NONE, corsola_get_db_type(), NULL); + + /* Verify the floating pins are input with PU to prevent leakage */ + zassert_ok(gpio_emul_flags_get(ec_x_gpio1, ec_x_pin1, flags), NULL); + zassert_equal(*flags, (GPIO_INPUT | GPIO_PULL_UP), "flags=%d", *flags); + zassert_ok(gpio_emul_flags_get(x_ec_gpio2, x_ec_pin2, flags), NULL); + zassert_equal(*flags, (GPIO_INPUT | GPIO_PULL_UP), "flags=%d", *flags); + zassert_ok(gpio_emul_flags_get(ec_x_gpio3, ec_x_pin3, flags), NULL); + zassert_equal(*flags, (GPIO_INPUT | GPIO_PULL_UP), "flags=%d", *flags); + free(flags); + + /* Verify x_ec_interrupt is disabled */ + interrupt_count = 0; + zassert_ok(gpio_emul_input_set(x_ec_gpio2, x_ec_pin2, 0), NULL); + k_sleep(K_MSEC(100)); + zassert_ok(gpio_emul_input_set(x_ec_gpio2, x_ec_pin2, 1), NULL); + k_sleep(K_MSEC(100)); + + zassert_equal(interrupt_count, 0, "interrupt_count=%d", + interrupt_count); +} diff --git a/zephyr/test/kingler/src/db_detect_typec.c b/zephyr/test/kingler/src/db_detect_typec.c new file mode 100644 index 0000000000..53716fe552 --- /dev/null +++ b/zephyr/test/kingler/src/db_detect_typec.c @@ -0,0 +1,85 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "zephyr/kernel.h" +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/ztest.h> + +#include "gpio_signal.h" +#include "hooks.h" +#include "variant_db_detection.h" + +static void *db_detection_setup(void) +{ + const struct device *hdmi_prsnt_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_hdmi_prsnt_odl), gpios)); + const gpio_port_pins_t hdmi_prsnt_pin = + DT_GPIO_PIN(DT_NODELABEL(gpio_hdmi_prsnt_odl), gpios); + /* Set the GPIO to high to indicate the DB is type-c */ + zassert_ok(gpio_emul_input_set(hdmi_prsnt_gpio, hdmi_prsnt_pin, 1), + NULL); + + hook_notify(HOOK_INIT); + + return NULL; +} + +ZTEST_SUITE(db_detection, NULL, db_detection_setup, NULL, NULL, NULL); + +static int interrupt_count; +void x_ec_interrupt(enum gpio_signal signal) +{ + interrupt_count++; +} + +/* test typec db case */ +ZTEST(db_detection, test_db_detect_typec) +{ + const struct device *en_frs_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_ALIAS(gpio_usb_c1_frs_en), gpios)); + const gpio_port_pins_t en_frs_pin = + DT_GPIO_PIN(DT_ALIAS(gpio_usb_c1_frs_en), gpios); + const struct device *c1_dp_in_hpd_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_ALIAS(gpio_usb_c1_dp_in_hpd), gpios)); + const gpio_port_pins_t c1_dp_in_hpd_pin = + DT_GPIO_PIN(DT_ALIAS(gpio_usb_c1_dp_in_hpd), gpios); + const struct device *int_x_ec_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_x_ec_gpio2), gpios)); + const gpio_port_pins_t int_x_ec_pin = + DT_GPIO_PIN(DT_NODELABEL(gpio_x_ec_gpio2), gpios); + + /* Check the DB type is type-c */ + zassert_equal(CORSOLA_DB_TYPEC, corsola_get_db_type(), NULL); + + /* Verify we can enable or disable FRS by setting gpio_usb_c1_frs_en */ + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_frs_en), 1), + NULL); + zassert_equal(1, gpio_emul_output_get(en_frs_gpio, en_frs_pin), NULL); + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_frs_en), 0), + NULL); + zassert_equal(0, gpio_emul_output_get(en_frs_gpio, en_frs_pin), NULL); + + /* Verify we can change the gpio_usb_c1_dp_in_hpd state */ + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_dp_in_hpd), + 1), + NULL); + zassert_equal(1, + gpio_emul_output_get(c1_dp_in_hpd_gpio, c1_dp_in_hpd_pin), + NULL); + zassert_ok(gpio_pin_set_dt(GPIO_DT_FROM_ALIAS(gpio_usb_c1_dp_in_hpd), + 0), + NULL); + zassert_equal(0, + gpio_emul_output_get(c1_dp_in_hpd_gpio, c1_dp_in_hpd_pin), + NULL); + + /* Verify x_ec_interrupt is enabled */ + interrupt_count = 0; + zassert_ok(gpio_emul_input_set(int_x_ec_gpio, int_x_ec_pin, 0), NULL); + k_sleep(K_MSEC(100)); + + zassert_equal(interrupt_count, 1, "interrupt_count=%d", + interrupt_count); +} diff --git a/zephyr/test/kingler/src/fakes.c b/zephyr/test/kingler/src/fakes.c new file mode 100644 index 0000000000..cbf6c8d98c --- /dev/null +++ b/zephyr/test/kingler/src/fakes.c @@ -0,0 +1,29 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/fff.h> +#include "gpio_signal.h" + +DEFINE_FFF_GLOBALS; +FAKE_VOID_FUNC(power_button_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(button_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(lid_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(chipset_reset_request_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(power_signal_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(chipset_watchdog_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(extpower_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(usb_a0_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(switch_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(tcpc_alert_event, enum gpio_signal); +FAKE_VOID_FUNC(ppc_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(bc12_interrupt, enum gpio_signal); + +#ifdef CONFIG_TEST_STEELIX_RUSTY +FAKE_VOID_FUNC(x_ec_interrupt, enum gpio_signal); +#endif + +#ifdef CONFIG_VARIANT_CORSOLA_DB_DETECTION +FAKE_VOID_FUNC(bmi3xx_interrupt, enum gpio_signal); +#endif diff --git a/zephyr/test/kingler/src/tablet.c b/zephyr/test/kingler/src/tablet.c new file mode 100644 index 0000000000..68be2b2b68 --- /dev/null +++ b/zephyr/test/kingler/src/tablet.c @@ -0,0 +1,91 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "zephyr/kernel.h" +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/ztest.h> + +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "tablet_mode.h" + +static void *tablet_setup(void) +{ + uint32_t val; + const struct device *wp_gpio = + DEVICE_DT_GET(DT_GPIO_CTLR(DT_ALIAS(gpio_wp), gpios)); + const gpio_port_pins_t wp_pin = DT_GPIO_PIN(DT_ALIAS(gpio_wp), gpios); + + /* Make sure that write protect is disabled */ + zassert_ok(gpio_emul_input_set(wp_gpio, wp_pin, 1), NULL); + /* Set CBI form factor to CONVERTIBLE. */ + zassert_ok(cbi_set_fw_config(CONVERTIBLE << 13), NULL); + /* Run init hooks to initialize cbi. */ + hook_notify(HOOK_INIT); + + /* Check if CBI write worked. */ + zassert_ok(cros_cbi_get_fw_config(FORM_FACTOR, &val), NULL); + zassert_equal(CONVERTIBLE, val, "val=%d", val); + + return NULL; +} + +ZTEST_SUITE(steelix_tablet, NULL, tablet_setup, NULL, NULL, NULL); + +ZTEST(steelix_tablet, test_gmr_tablet_switch_enabled) +{ + const struct device *tablet_mode_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(gpio_tablet_mode_l), gpios)); + const gpio_port_pins_t tablet_mode_pin = + DT_GPIO_PIN(DT_NODELABEL(gpio_tablet_mode_l), gpios); + + /* Verify gmr_tablet_switch is enabled, by checking the side effects + * of calling tablet_set_mode, and setting gpio_tablet_mode_l. + */ + zassert_ok(gpio_emul_input_set(tablet_mode_gpio, tablet_mode_pin, 0), + NULL); + k_sleep(K_MSEC(100)); + tablet_set_mode(1, TABLET_TRIGGER_LID); + zassert_equal(1, tablet_get_mode(), NULL); + zassert_ok(gpio_emul_input_set(tablet_mode_gpio, tablet_mode_pin, 1), + NULL); + k_sleep(K_MSEC(100)); + tablet_set_mode(0, TABLET_TRIGGER_LID); + zassert_equal(0, tablet_get_mode(), NULL); + zassert_ok(gpio_emul_input_set(tablet_mode_gpio, tablet_mode_pin, 0), + NULL); + k_sleep(K_MSEC(100)); + tablet_set_mode(1, TABLET_TRIGGER_LID); + zassert_equal(1, tablet_get_mode(), NULL); +} + +static int interrupt_count; + +void bmi3xx_interrupt(enum gpio_signal signal) +{ + interrupt_count++; +} + +ZTEST(steelix_tablet, test_base_imu_irq_enabled) +{ + const struct device *base_imu_gpio = DEVICE_DT_GET( + DT_GPIO_CTLR(DT_NODELABEL(base_imu_int_l), gpios)); + const gpio_port_pins_t base_imu_pin = + DT_GPIO_PIN(DT_NODELABEL(base_imu_int_l), gpios); + + /* Verify base_imu_irq is enabled. Interrupt is configured + * GPIO_INT_EDGE_FALLING, so set high, then set low. + */ + interrupt_count = 0; + zassert_ok(gpio_emul_input_set(base_imu_gpio, base_imu_pin, 1), NULL); + k_sleep(K_MSEC(100)); + zassert_ok(gpio_emul_input_set(base_imu_gpio, base_imu_pin, 0), NULL); + k_sleep(K_MSEC(100)); + + zassert_equal(interrupt_count, 1, "interrupt_count=%d", + interrupt_count); +} diff --git a/zephyr/test/kingler/testcase.yaml b/zephyr/test/kingler/testcase.yaml new file mode 100644 index 0000000000..1d6c1bd0a8 --- /dev/null +++ b/zephyr/test/kingler/testcase.yaml @@ -0,0 +1,32 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +common: + platform_allow: native_posix +tests: + kingler.steelix: + extra_args: DTC_OVERLAY_FILE="./common.dts;../projects/corsola/interrupts_kingler.dts;../projects/corsola/cbi_steelix.dts;../projects/corsola/gpio_steelix.dts" + extra_configs: + - CONFIG_TEST_STEELIX_RUSTY=y + - CONFIG_TEST_FORM_FACTOR_CONVERTIBLE=y + kingler.rusty: + extra_args: DTC_OVERLAY_FILE="./common.dts;../projects/corsola/interrupts_kingler.dts;../projects/corsola/cbi_steelix.dts;../projects/corsola/gpio_steelix.dts" + extra_configs: + - CONFIG_TEST_STEELIX_RUSTY=y + - CONFIG_TEST_FORM_FACTOR_CLAMSHELL=y + kingler.db_detect_typec: + extra_args: DTC_OVERLAY_FILE="./common.dts;../projects/corsola/interrupts_kingler.dts;../projects/corsola/gpio_steelix.dts;" + extra_configs: + - CONFIG_TEST_DB_DETECT_TYPEC=y + - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + kingler.db_detect_hdmi: + extra_args: DTC_OVERLAY_FILE="./common.dts;../projects/corsola/interrupts_kingler.dts;../projects/corsola/gpio_steelix.dts" + extra_configs: + - CONFIG_TEST_DB_DETECT_HDMI=y + - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y + kingler.db_detect_none: + extra_args: DTC_OVERLAY_FILE="./common.dts;../projects/corsola/interrupts_kingler.dts;../projects/corsola/cbi_steelix.dts;../projects/corsola/gpio_steelix.dts" + extra_configs: + - CONFIG_TEST_DB_DETECT_NONE=y + - CONFIG_VARIANT_CORSOLA_DB_DETECTION=y diff --git a/zephyr/test/krabby/CMakeLists.txt b/zephyr/test/krabby/CMakeLists.txt new file mode 100644 index 0000000000..eba91a7be4 --- /dev/null +++ b/zephyr/test/krabby/CMakeLists.txt @@ -0,0 +1,14 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(krabby) + +zephyr_include_directories("${PLATFORM_EC}/zephyr/projects/corsola/include") + +target_sources(app PRIVATE + src/charger_workaround.c + src/stubs.c + ${PLATFORM_EC}/zephyr/projects/corsola/src/krabby/charger_workaround.c) diff --git a/zephyr/test/krabby/README.md b/zephyr/test/krabby/README.md new file mode 100644 index 0000000000..8262d85fcc --- /dev/null +++ b/zephyr/test/krabby/README.md @@ -0,0 +1,3 @@ +Tests for board specific code under `zephyr/projects/corsola/src/krabby`. + +Run with ./twister -T zephyr/test/krabby diff --git a/zephyr/test/krabby/common.dts b/zephyr/test/krabby/common.dts new file mode 100644 index 0000000000..d9f1a4f463 --- /dev/null +++ b/zephyr/test/krabby/common.dts @@ -0,0 +1,70 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <it8xxx2_emul.dts> + +/ { + pinctrl: pinctrl { + compatible = "ite,it8xxx2-pinctrl"; + status = "disabled"; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + i2c_charger: charger { + i2c-port = <&i2c_ctrl0>; + enum-names = "I2C_PORT_CHARGER", + "I2C_PORT_BATTERY"; + }; + }; + + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + status = "okay"; + reg = <0>; + chg = <&charger>; + tcpc = <&tcpci_emul>; + }; + }; + + batteries { + default_battery: lgc_ac17a8m { + compatible = "lgc,ac17a8m", "battery-smart"; + }; + }; +}; + +&i2c_ctrl0 { + status="okay"; + + charger: rt9490@53 { + compatible = "zephyr,rt9490-emul"; + status = "okay"; + reg = <0x53>; + }; + + battery: sb@b { + compatible = "zephyr,smart-battery"; + reg = <0xb>; + cycle-count = <99>; + version = "BATTERY_SPEC_VER_1_1_WITH_PEC"; + /* Real battery voltages are multiples of 4.4V. */ + desired-charg-volt = <5000>; + desired-charg-cur = <1000>; + mf-name = "LGC"; + dev-name = "AC17A8M"; + }; + + tcpci_emul: tcpci_emul@82 { + compatible = "cros,tcpci-generic-emul"; + status = "okay"; + reg = <0x82>; + }; +}; diff --git a/zephyr/test/krabby/pinctrl.dts b/zephyr/test/krabby/pinctrl.dts new file mode 100644 index 0000000000..9d01591238 --- /dev/null +++ b/zephyr/test/krabby/pinctrl.dts @@ -0,0 +1,7 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* remove pinctrl to avoid pull in too many unwanted dependency */ +/delete-node/ &pinctrl; diff --git a/zephyr/test/krabby/prj.conf b/zephyr/test/krabby/prj.conf new file mode 100644 index 0000000000..25bc89c33a --- /dev/null +++ b/zephyr/test/krabby/prj.conf @@ -0,0 +1,36 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_ZTEST=y +CONFIG_ZTEST_ASSERT_VERBOSE=1 +CONFIG_ZTEST_NEW_API=y + +CONFIG_ASSERT=y +CONFIG_CROS_EC=y +CONFIG_EMUL=y +CONFIG_EMUL_RT9490=y +CONFIG_EMUL_SMART_BATTERY=y +CONFIG_EMUL_TCPCI=y +CONFIG_I2C=y +CONFIG_I2C_EMUL=y +CONFIG_SHIMMED_TASKS=y + +CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_BATTERY=y +CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y +CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y +CONFIG_PLATFORM_EC_CHARGER=y +CONFIG_PLATFORM_EC_CHARGER_RT9490=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 +CONFIG_PLATFORM_EC_CHARGE_MANAGER=n +CONFIG_PLATFORM_EC_HOOKS=y +CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_PLATFORM_EC_LID_SWITCH=n +CONFIG_PLATFORM_EC_SWITCH=n +CONFIG_PLATFORM_EC_USBC=n +CONFIG_PLATFORM_EC_USB_CHARGER=n +CONFIG_PLATFORM_EC_USB_POWER_DELIVERY=n +CONFIG_PLATFORM_EC_VBOOT_HASH=n diff --git a/zephyr/test/krabby/src/charger_workaround.c b/zephyr/test/krabby/src/charger_workaround.c new file mode 100644 index 0000000000..97aa4328c8 --- /dev/null +++ b/zephyr/test/krabby/src/charger_workaround.c @@ -0,0 +1,98 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/drivers/emul.h> +#include <zephyr/fff.h> +#include <zephyr/ztest.h> + +#include "charger.h" +#include "driver/charger/rt9490.h" +#include "emul/emul_rt9490.h" +#include "hooks.h" +#include "i2c.h" +#include "system.h" + +DEFINE_FFF_GLOBALS; + +FAKE_VALUE_FUNC(int, board_get_version); + +const struct emul *emul = EMUL_DT_GET(DT_NODELABEL(charger)); + +static bool ibus_adc_workaround_called(void) +{ + return rt9490_emul_peek_reg(emul, 0x52) == 0xC4; +} + +static bool i2c_speed_workaround_called(void) +{ + return rt9490_emul_peek_reg(emul, 0x71) == 0x22; +} + +static bool eoc_deglitch_workaround_called(void) +{ + return !(rt9490_emul_peek_reg(emul, RT9490_REG_ADD_CTRL0) & + RT9490_TD_EOC); +} + +static bool disable_safety_timer_called(void) +{ + return rt9490_emul_peek_reg(emul, RT9490_REG_SAFETY_TMR_CTRL) == + (RT9490_EN_TRICHG_TMR | RT9490_EN_PRECHG_TMR | + RT9490_EN_FASTCHG_TMR); +} + +ZTEST(charger_workaround, test_board_version_0) +{ + board_get_version_fake.return_val = 0; + + hook_notify(HOOK_INIT); + zassert_true(ibus_adc_workaround_called(), NULL); + zassert_true(i2c_speed_workaround_called(), NULL); + zassert_false(eoc_deglitch_workaround_called(), NULL); + zassert_true(disable_safety_timer_called(), NULL); +} + +ZTEST(charger_workaround, test_board_version_1) +{ + board_get_version_fake.return_val = 1; + + hook_notify(HOOK_INIT); + zassert_false(ibus_adc_workaround_called(), NULL); + zassert_true(i2c_speed_workaround_called(), NULL); + zassert_true(eoc_deglitch_workaround_called(), NULL); + zassert_true(disable_safety_timer_called(), NULL); +} + +ZTEST(charger_workaround, test_board_version_2) +{ + board_get_version_fake.return_val = 2; + + hook_notify(HOOK_INIT); + zassert_false(ibus_adc_workaround_called(), NULL); + zassert_true(i2c_speed_workaround_called(), NULL); + zassert_false(eoc_deglitch_workaround_called(), NULL); + zassert_false(disable_safety_timer_called(), NULL); +} + +ZTEST(charger_workaround, test_board_version_3) +{ + board_get_version_fake.return_val = 3; + + hook_notify(HOOK_INIT); + zassert_false(ibus_adc_workaround_called(), NULL); + zassert_false(i2c_speed_workaround_called(), NULL); + zassert_false(eoc_deglitch_workaround_called(), NULL); + zassert_false(disable_safety_timer_called(), NULL); +} + +static void charge_workaround_before(void *fixture) +{ + RESET_FAKE(board_get_version); + rt9490_emul_reset_regs(emul); +} + +ZTEST_SUITE(charger_workaround, NULL, NULL, charge_workaround_before, NULL, + NULL); diff --git a/zephyr/test/krabby/src/stubs.c b/zephyr/test/krabby/src/stubs.c new file mode 100644 index 0000000000..b6cc0c5368 --- /dev/null +++ b/zephyr/test/krabby/src/stubs.c @@ -0,0 +1,29 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charge_ramp.h" +#include "charge_state.h" + +int board_set_active_charge_port(int port) +{ + return 0; +} + +int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) +{ + return 0; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) +{ +} + +const struct batt_params *charger_current_battery_params(void) +{ + static const struct batt_params params = {}; + + return ¶ms; +} diff --git a/zephyr/test/krabby/testcase.yaml b/zephyr/test/krabby/testcase.yaml new file mode 100644 index 0000000000..c8cf0e070b --- /dev/null +++ b/zephyr/test/krabby/testcase.yaml @@ -0,0 +1,9 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +common: + platform_allow: native_posix +tests: + krabby.default: + extra_args: DTC_OVERLAY_FILE="common.dts;../projects/corsola/interrupts_krabby.dts;../projects/corsola/gpio_krabby.dts;pinctrl.dts" diff --git a/zephyr/test/math/BUILD.py b/zephyr/test/math/BUILD.py deleted file mode 100644 index 8f6b28ce1a..0000000000 --- a/zephyr/test/math/BUILD.py +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for math tests.""" - -register_host_test( - "math_fixed", kconfig_files=[here / "prj.conf", here / "fixed_point.conf"] -) -register_host_test( - "math_float", kconfig_files=[here / "prj.conf", here / "floating_point.conf"] -) diff --git a/zephyr/test/math/CMakeLists.txt b/zephyr/test/math/CMakeLists.txt index e90ce4cf8c..57fe7e389f 100644 --- a/zephyr/test/math/CMakeLists.txt +++ b/zephyr/test/math/CMakeLists.txt @@ -1,14 +1,11 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(math) -zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}/include") -zephyr_include_directories("${PLATFORM_EC}/include") - target_sources(app PRIVATE ${PLATFORM_EC}/common/math_util.c) target_sources( diff --git a/zephyr/test/math/boards/native_posix.overlay b/zephyr/test/math/boards/native_posix.overlay new file mode 120000 index 0000000000..7b75ea9967 --- /dev/null +++ b/zephyr/test/math/boards/native_posix.overlay @@ -0,0 +1 @@ +../../../dts/board-overlays/native_posix.dts
\ No newline at end of file diff --git a/zephyr/test/math/fixed_point.conf b/zephyr/test/math/fixed_point.conf index 5274cb2287..c1ddcc0911 100644 --- a/zephyr/test/math/fixed_point.conf +++ b/zephyr/test/math/fixed_point.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/math/floating_point.conf b/zephyr/test/math/floating_point.conf index ce8f17011d..c6b8f58176 100644 --- a/zephyr/test/math/floating_point.conf +++ b/zephyr/test/math/floating_point.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/math/prj.conf b/zephyr/test/math/prj.conf index d1592a2932..7c5ef483a2 100644 --- a/zephyr/test/math/prj.conf +++ b/zephyr/test/math/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/math/src/fixed_point_int_sqrtf.c b/zephyr/test/math/src/fixed_point_int_sqrtf.c index d8360ec189..163c36c26b 100644 --- a/zephyr/test/math/src/fixed_point_int_sqrtf.c +++ b/zephyr/test/math/src/fixed_point_int_sqrtf.c @@ -1,9 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "math.h" #include "math_util.h" diff --git a/zephyr/test/math/src/mask.c b/zephyr/test/math/src/mask.c index 9ced211a88..5e690c9653 100644 --- a/zephyr/test/math/src/mask.c +++ b/zephyr/test/math/src/mask.c @@ -1,10 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <inttypes.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "math.h" #include "math_util.h" diff --git a/zephyr/test/math/src/math_util.c b/zephyr/test/math/src/math_util.c index 901c3a6cc6..d3bd2c6fb6 100644 --- a/zephyr/test/math/src/math_util.c +++ b/zephyr/test/math/src/math_util.c @@ -1,12 +1,14 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> +#include "common.h" #include "math.h" #include "math_util.h" +#include "builtin/stdio.h" ZTEST_USER(math, arc_cos__x_below_range) { @@ -39,3 +41,30 @@ ZTEST_USER(math, fp_sqrtf) zassert_within(fp_sqrtf(FLOAT_TO_FP(15)), FLOAT_TO_FP(3.872983), FLOAT_TO_FP(0.001), NULL); } + +ZTEST_USER(math, print_ints) +{ + char buffer[10]; + + /* Fixed point. */ + zassert_true(crec_snprintf(buffer, sizeof(buffer), "%.5d", 123) > 0, + NULL); + zassert_equal(0, strcmp(buffer, "0.00123"), "got '%s'", buffer); + zassert_true(crec_snprintf(buffer, sizeof(buffer), "%2.1d", 123) > 0, + NULL); + zassert_equal(0, strcmp(buffer, "12.3"), "got '%s'", buffer); + + /* Precision or width larger than buffer should fail. */ + zassert_equal(-EC_ERROR_OVERFLOW, crec_snprintf(buffer, 4, "%5d", 123), + NULL); + zassert_equal(0, strcmp(buffer, " 1"), "got '%s'", buffer); + zassert_equal(-EC_ERROR_OVERFLOW, crec_snprintf(buffer, 4, "%10d", 123), + NULL); + zassert_equal(0, strcmp(buffer, " "), "got '%s'", buffer); + zassert_equal(-EC_ERROR_OVERFLOW, + crec_snprintf(buffer, 4, "%-10d", 123), NULL); + zassert_equal(0, strcmp(buffer, "123"), "got '%s'", buffer); + zassert_equal(-EC_ERROR_OVERFLOW, + crec_snprintf(buffer, 4, "%.10d", 123), NULL); + zassert_equal(0, strcmp(buffer, "0.0"), "got '%s'", buffer); +} diff --git a/zephyr/test/math/src/suite.c b/zephyr/test/math/src/suite.c index 75b8e84bde..95da93b113 100644 --- a/zephyr/test/math/src/suite.c +++ b/zephyr/test/math/src/suite.c @@ -1,8 +1,8 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> ZTEST_SUITE(math, NULL, NULL, NULL, NULL, NULL); diff --git a/zephyr/test/math/src/vector.c b/zephyr/test/math/src/vector.c index 2e8ca52c5d..e79a350a92 100644 --- a/zephyr/test/math/src/vector.c +++ b/zephyr/test/math/src/vector.c @@ -1,9 +1,9 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#include <ztest.h> +#include <zephyr/ztest.h> #include "math.h" #include "math_util.h" diff --git a/zephyr/test/math/testcase.yaml b/zephyr/test/math/testcase.yaml new file mode 100644 index 0000000000..cd33e70553 --- /dev/null +++ b/zephyr/test/math/testcase.yaml @@ -0,0 +1,7 @@ +common: + platform_allow: native_posix +tests: + util.math.fixed_point: + extra_args: OVERLAY_CONFIG=./fixed_point.conf + util.math.floating_point: + extra_args: OVERLAY_CONFIG=./floating_point.conf diff --git a/zephyr/test/system/BUILD.py b/zephyr/test/system/BUILD.py deleted file mode 100644 index b9f14c2fcf..0000000000 --- a/zephyr/test/system/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for system test.""" - -register_host_test("system", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/system_common/CMakeLists.txt b/zephyr/test/system_common/CMakeLists.txt new file mode 100644 index 0000000000..05938b2ec6 --- /dev/null +++ b/zephyr/test/system_common/CMakeLists.txt @@ -0,0 +1,10 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.20.0) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(system_common_test) + +FILE(GLOB test_sources src/*.c) +target_sources(app PRIVATE ${test_sources}) diff --git a/zephyr/test/system_common/boards/native_posix.overlay b/zephyr/test/system_common/boards/native_posix.overlay new file mode 100644 index 0000000000..c6325f6ecc --- /dev/null +++ b/zephyr/test/system_common/boards/native_posix.overlay @@ -0,0 +1,9 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> + +/ { +}; diff --git a/zephyr/test/system_common/prj.conf b/zephyr/test/system_common/prj.conf new file mode 100644 index 0000000000..ebc7c64321 --- /dev/null +++ b/zephyr/test/system_common/prj.conf @@ -0,0 +1,18 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y +CONFIG_CROS_EC=y +CONFIG_LOG=y + +CONFIG_PLATFORM_EC_CROS_FWID_VERSION=y +CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_PLATFORM_EC_LID_SWITCH=n +CONFIG_PLATFORM_EC_PANIC=n +CONFIG_PLATFORM_EC_SWITCH=n +CONFIG_PLATFORM_EC_VBOOT_HASH=n +CONFIG_SHIMMED_TASKS=y diff --git a/zephyr/test/system_common/src/build_info.c b/zephyr/test/system_common/src/build_info.c new file mode 100644 index 0000000000..7983c1f0a4 --- /dev/null +++ b/zephyr/test/system_common/src/build_info.c @@ -0,0 +1,56 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/device.h> +#include <zephyr/fff.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> + +#include "host_command.h" +#include "system.h" + +ZTEST_SUITE(host_cmd_get_build_info, NULL, NULL, NULL, NULL, NULL); + +FAKE_VALUE_FUNC(const char *, system_get_build_info); + +ZTEST(host_cmd_get_build_info, test_get_build_info) +{ + int ret; + char resp[1024]; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_BUILD_INFO, 0, resp); + + RESET_FAKE(system_get_build_info); + system_get_build_info_fake.return_val = "i-am-a-version"; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(strcmp(resp, "i-am-a-version"), 0, + "Unexpected response: %s", resp); + zassert_equal(system_get_build_info_fake.call_count, 1, + "Unexpected call count: %d", + system_get_build_info_fake.call_count); +} + +ZTEST(host_cmd_get_build_info, test_get_build_info_truncated) +{ + int ret; + char resp[8]; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_BUILD_INFO, 0, resp); + + RESET_FAKE(system_get_build_info); + system_get_build_info_fake.return_val = "i-am-a-long-version"; + + ret = host_command_process(&args); + + zassert_equal(ret, EC_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(strcmp(resp, "i-am-a-"), 0, "Unexpected response: %s", + resp); + zassert_equal(system_get_build_info_fake.call_count, 1, + "Unexpected call count: %d", + system_get_build_info_fake.call_count); +} diff --git a/zephyr/test/system_common/src/fff.c b/zephyr/test/system_common/src/fff.c new file mode 100644 index 0000000000..3b10dc3706 --- /dev/null +++ b/zephyr/test/system_common/src/fff.c @@ -0,0 +1,8 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/fff.h> + +DEFINE_FFF_GLOBALS; diff --git a/zephyr/test/system_common/src/get_version.c b/zephyr/test/system_common/src/get_version.c new file mode 100644 index 0000000000..87a41bad58 --- /dev/null +++ b/zephyr/test/system_common/src/get_version.c @@ -0,0 +1,72 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/device.h> +#include <zephyr/fff.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> + +#include "host_command.h" +#include "system.h" + +ZTEST_SUITE(host_cmd_get_version, NULL, NULL, NULL, NULL, NULL); + +__override const char *system_get_version(enum ec_image copy) +{ + switch (copy) { + case EC_IMAGE_RO: + return "version-ro"; + case EC_IMAGE_RW: + return "version-rw"; + default: + return "unknown"; + } +} + +ZTEST(host_cmd_get_version, test_get_version_v1) +{ + int ret; + struct ec_response_get_version_v1 r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_VERSION, 1, r); + + ret = host_command_process(&args); + + zassert_equal(ret, EC_SUCCESS, "Unexpected return value: %d", ret); + + zassert_equal(strcmp(r.version_string_ro, "version-ro"), 0, + "version_string_ro: %s", r.version_string_ro); + zassert_equal(args.response_size, sizeof(r), "response_size: %d", + args.response_size); + zassert_equal(strcmp(r.version_string_rw, "version-rw"), 0, + "version_string_rw: %s", r.version_string_rw); + zassert_equal(strcmp(r.cros_fwid_ro, "CROS_FWID_MISSING"), 0, + "cros_fwid_ro: %s", r.cros_fwid_ro); + zassert_equal(strcmp(r.cros_fwid_rw, "CROS_FWID_MISSING"), 0, + "cros_fwid_ro: %s", r.cros_fwid_rw); + zassert_equal(r.current_image, EC_IMAGE_UNKNOWN, "current_image: %s", + r.current_image); +} + +ZTEST(host_cmd_get_version, test_get_version_v0) +{ + int ret; + struct ec_response_get_version r; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_RESPONSE(EC_CMD_GET_VERSION, 0, r); + + ret = host_command_process(&args); + + zassert_equal(ret, EC_SUCCESS, "Unexpected return value: %d", ret); + + zassert_equal(strcmp(r.version_string_ro, "version-ro"), 0, + "version_string_ro: %s", r.version_string_ro); + zassert_equal(args.response_size, sizeof(r), "response_size: %d", + args.response_size); + zassert_equal(strcmp(r.version_string_rw, "version-rw"), 0, + "version_string_rw: %s", r.version_string_rw); + zassert_equal(r.current_image, EC_IMAGE_UNKNOWN, "current_image: %s", + r.current_image); +} diff --git a/zephyr/test/system_common/src/reboot.c b/zephyr/test/system_common/src/reboot.c new file mode 100644 index 0000000000..759b93d89f --- /dev/null +++ b/zephyr/test/system_common/src/reboot.c @@ -0,0 +1,289 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/device.h> +#include <zephyr/fff.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> + +#include "host_command.h" +#include "system.h" + +FAKE_VOID_FUNC(system_reset, int); +FAKE_VOID_FUNC(system_hibernate, uint32_t, uint32_t); + +ZTEST_SUITE(console_cmd_reboot, NULL, NULL, NULL, NULL, NULL); + +ZTEST(console_cmd_reboot, test_reboot_valid) +{ + int ret; + int i; + + struct { + char *cmd; + int expect_called; + int expect_flags; + } tests[] = { + { + .cmd = "reboot hard", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_HARD, + }, + { + .cmd = "reboot cold", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_HARD, + }, + { + .cmd = "reboot soft", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED, + }, + { + .cmd = "reboot ap-off", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_LEAVE_AP_OFF, + }, + { + .cmd = "reboot ap-off-in-ro", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_LEAVE_AP_OFF | + SYSTEM_RESET_STAY_IN_RO, + }, + { + .cmd = "reboot ro", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_STAY_IN_RO, + }, + { + .cmd = "reboot cancel", + .expect_called = 0, + .expect_flags = 0, + }, + { + .cmd = "reboot preserve", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_PRESERVE_FLAGS, + }, + { + .cmd = "reboot wait-ext", + .expect_called = 1, + .expect_flags = SYSTEM_RESET_MANUALLY_TRIGGERED | + SYSTEM_RESET_WAIT_EXT, + }, + }; + + for (i = 0; i < ARRAY_SIZE(tests); i++) { + char *cmd = tests[i].cmd; + + RESET_FAKE(system_reset); + RESET_FAKE(system_hibernate); + + ret = shell_execute_cmd(get_ec_shell(), cmd); + + zassert_equal(ret, EC_SUCCESS, + "Unexpected return value for '%s': %d", cmd, ret); + zassert_equal(system_reset_fake.call_count, + tests[i].expect_called, + "Unexpected call count for '%s': %d", cmd, + system_reset_fake.call_count); + zassert_equal(system_reset_fake.arg0_history[0], + tests[i].expect_flags, + "Unexpected flags for '%s': %x", cmd, + system_reset_fake.arg0_history[0]); + } +} + +ZTEST(console_cmd_reboot, test_reboot_invalid) +{ + int ret; + + ret = shell_execute_cmd(get_ec_shell(), "reboot i-am-not-an-argument"); + + zassert_equal(ret, EC_ERROR_PARAM1, "invalid return value: %d", ret); + zassert_equal(system_reset_fake.call_count, 0, + "Unexpected call count: %d", + system_reset_fake.call_count); +} + +ZTEST_SUITE(host_cmd_reboot, NULL, NULL, NULL, NULL, NULL); + +ZTEST(host_cmd_reboot, test_reboot) +{ + int ret; + int i; + struct ec_params_reboot_ec p; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND_PARAMS(EC_CMD_REBOOT_EC, 0, p); + int reboot_at_shutdown; + + struct { + uint8_t cmd; + uint8_t flags; + int expect_return; + int expect_reboot_at_shutdown; + int expect_reset_called; + int expect_reset_flags; + int expect_hibernate_called; + } tests[] = { + { + .cmd = EC_REBOOT_CANCEL, + .flags = 0, + .expect_return = EC_RES_SUCCESS, + .expect_reboot_at_shutdown = EC_REBOOT_CANCEL, + .expect_reset_called = 0, + .expect_reset_flags = 0, + .expect_hibernate_called = 0, + }, + { + .cmd = EC_REBOOT_COLD, + .flags = EC_REBOOT_FLAG_SWITCH_RW_SLOT, + .expect_return = EC_RES_INVALID_PARAM, + .expect_reboot_at_shutdown = 0, + .expect_reset_called = 0, + .expect_reset_flags = 0, + .expect_hibernate_called = 0, + }, + { + .cmd = 0xaa, /* cmd passed unmodified */ + .flags = EC_REBOOT_FLAG_ON_AP_SHUTDOWN, + .expect_return = EC_RES_SUCCESS, + .expect_reboot_at_shutdown = 0xaa, + .expect_reset_called = 0, + .expect_reset_flags = 0, + .expect_hibernate_called = 0, + }, + { + .cmd = 0x55, /* cmd passed unmodified */ + .flags = EC_REBOOT_FLAG_ON_AP_SHUTDOWN, + .expect_return = EC_RES_SUCCESS, + .expect_reboot_at_shutdown = 0x55, + .expect_reset_called = 0, + .expect_reset_flags = 0, + .expect_hibernate_called = 0, + }, + { + .cmd = EC_REBOOT_COLD, + .flags = 0, + .expect_return = EC_RES_ERROR, + .expect_reboot_at_shutdown = EC_REBOOT_CANCEL, + .expect_reset_called = 1, + .expect_reset_flags = SYSTEM_RESET_HARD, + .expect_hibernate_called = 0, + }, + { + .cmd = EC_REBOOT_HIBERNATE, + .flags = 0, + .expect_return = EC_RES_ERROR, + .expect_reboot_at_shutdown = EC_REBOOT_CANCEL, + .expect_reset_called = 0, + .expect_reset_flags = 0, + .expect_hibernate_called = 1, + }, + { + .cmd = EC_REBOOT_COLD_AP_OFF, + .flags = 0, + .expect_return = EC_RES_ERROR, + .expect_reboot_at_shutdown = EC_REBOOT_CANCEL, + .expect_reset_called = 1, + .expect_reset_flags = SYSTEM_RESET_HARD | + SYSTEM_RESET_LEAVE_AP_OFF, + .expect_hibernate_called = 0, + }, + { + .cmd = 0xff, + .flags = 0, + .expect_return = EC_RES_INVALID_PARAM, + .expect_reboot_at_shutdown = EC_REBOOT_CANCEL, + .expect_reset_called = 0, + .expect_reset_flags = 0, + .expect_hibernate_called = 0, + }, + }; + + for (i = 0; i < ARRAY_SIZE(tests); i++) { + p.cmd = tests[i].cmd; + p.flags = tests[i].flags; + + RESET_FAKE(system_reset); + RESET_FAKE(system_hibernate); + + ret = host_command_process(&args); + + zassert_equal(ret, tests[i].expect_return, + "Unexpected return value (%d): %d", i, ret); + reboot_at_shutdown = + system_common_get_reset_reboot_at_shutdown(); + zassert_equal( + reboot_at_shutdown, tests[i].expect_reboot_at_shutdown, + "Unexpected value for reboot_at_shutdown (%d): %d", i, + reboot_at_shutdown); + zassert_equal(system_reset_fake.call_count, + tests[i].expect_reset_called, + "Unexpected reset call count (%d): %d", i, + system_reset_fake.call_count); + zassert_equal(system_reset_fake.arg0_history[0], + tests[i].expect_reset_flags, + "Unexpected flags (%d): %x", i, + system_reset_fake.arg0_history[0]); + zassert_equal(system_hibernate_fake.call_count, + tests[i].expect_hibernate_called, + "Unexpected hibernate call count (%d): %d", i, + system_hibernate_fake.call_count); + } +} + +ZTEST_SUITE(console_cmd_hibernate, NULL, NULL, NULL, NULL, NULL); + +int chipset_in_state(int state_mask) +{ + return 0; +} + +ZTEST(console_cmd_hibernate, test_hibernate_default) +{ + int ret; + + RESET_FAKE(system_hibernate); + + ret = shell_execute_cmd(get_ec_shell(), "hibernate"); + + zassert_equal(ret, EC_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(system_hibernate_fake.call_count, 1, + "Unexpected hibernate call count: %d", + system_hibernate_fake.call_count); + zassert_equal(system_hibernate_fake.arg0_history[0], 0, + "Unexpected hibernate_secondst: %d", + system_hibernate_fake.arg0_history[0]); + zassert_equal(system_hibernate_fake.arg1_history[0], 0, + "Unexpected hibernate_secondst: %d", + system_hibernate_fake.arg1_history[0]); +} + +ZTEST(console_cmd_hibernate, test_hibernate_args) +{ + int ret; + + RESET_FAKE(system_hibernate); + + ret = shell_execute_cmd(get_ec_shell(), "hibernate 123 456"); + + zassert_equal(ret, EC_SUCCESS, "Unexpected return value: %d", ret); + zassert_equal(system_hibernate_fake.call_count, 1, + "Unexpected hibernate call count: %d", + system_hibernate_fake.call_count); + zassert_equal(system_hibernate_fake.arg0_history[0], 123, + "Unexpected hibernate_secondst: %d", + system_hibernate_fake.arg0_history[0]); + zassert_equal(system_hibernate_fake.arg1_history[0], 456, + "Unexpected hibernate_secondst: %d", + system_hibernate_fake.arg1_history[0]); +} diff --git a/zephyr/test/system_common/testcase.yaml b/zephyr/test/system_common/testcase.yaml new file mode 100644 index 0000000000..d6977dbb6a --- /dev/null +++ b/zephyr/test/system_common/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + system.default: {} diff --git a/zephyr/test/system/CMakeLists.txt b/zephyr/test/system_shim/CMakeLists.txt index f91786841e..2f8b61cda8 100644 --- a/zephyr/test/system/CMakeLists.txt +++ b/zephyr/test/system_shim/CMakeLists.txt @@ -1,10 +1,10 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(system_test) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(system_shim_test) target_sources(app PRIVATE test_system.c ${PLATFORM_EC}/zephyr/shim/src/system.c) diff --git a/zephyr/test/system/overlay.dts b/zephyr/test/system_shim/boards/native_posix.overlay index bba99a0b81..0bcda0f513 100644 --- a/zephyr/test/system/overlay.dts +++ b/zephyr/test/system_shim/boards/native_posix.overlay @@ -1,8 +1,10 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <board-overlays/native_posix.dts> + / { chosen { cros-ec,bbram = &bbram; @@ -10,7 +12,6 @@ bbram: test-bbram-dev { compatible = "zephyr,bbram-emul"; - label = "TEST_BBRAM_DEV"; size = <64>; }; diff --git a/zephyr/test/system/prj.conf b/zephyr/test/system_shim/prj.conf index 4b3055b39b..fa7bd9fc04 100644 --- a/zephyr/test/system/prj.conf +++ b/zephyr/test/system_shim/prj.conf @@ -1,8 +1,9 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y CONFIG_PLATFORM_EC=y CONFIG_CROS_EC=y CONFIG_LOG=y diff --git a/zephyr/test/system/test_system.c b/zephyr/test/system_shim/test_system.c index ce83a684d1..d8b92e9504 100644 --- a/zephyr/test/system/test_system.c +++ b/zephyr/test/system_shim/test_system.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,7 +6,8 @@ #include <zephyr/device.h> #include <zephyr/drivers/bbram.h> #include <zephyr/logging/log.h> -#include <ztest.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> #include "system.h" @@ -20,7 +21,9 @@ LOG_MODULE_REGISTER(test); static char mock_data[64] = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!@"; -static void test_bbram_get(void) +ZTEST_SUITE(system, NULL, NULL, NULL, NULL, NULL); + +ZTEST(system, test_bbram_get) { const struct device *const bbram_dev = DEVICE_DT_GET(DT_CHOSEN(cros_ec_bbram)); @@ -51,9 +54,3 @@ static void test_bbram_get(void) zassert_mem_equal(output, mock_data + BBRAM_REGION_OFF(try_slot), BBRAM_REGION_SIZE(try_slot), NULL); } - -void test_main(void) -{ - ztest_test_suite(system, ztest_unit_test(test_bbram_get)); - ztest_run_test_suite(system); -} diff --git a/zephyr/test/system_shim/testcase.yaml b/zephyr/test/system_shim/testcase.yaml new file mode 100644 index 0000000000..85df1de33a --- /dev/null +++ b/zephyr/test/system_shim/testcase.yaml @@ -0,0 +1,4 @@ +common: + platform_allow: native_posix +tests: + system_shim.default: {} diff --git a/zephyr/test/tasks/BUILD.py b/zephyr/test/tasks/BUILD.py deleted file mode 100644 index 9280101836..0000000000 --- a/zephyr/test/tasks/BUILD.py +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -"""Register zmake project for tasks test.""" - -register_host_test("tasks") diff --git a/zephyr/test/tasks/CMakeLists.txt b/zephyr/test/tasks/CMakeLists.txt index f5ea76e67e..b0b59e7c99 100644 --- a/zephyr/test/tasks/CMakeLists.txt +++ b/zephyr/test/tasks/CMakeLists.txt @@ -1,9 +1,9 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. cmake_minimum_required(VERSION 3.13.1) -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") project(tasks) # Include the local test directory for shimmed_test_tasks.h @@ -11,4 +11,4 @@ zephyr_include_directories("${CMAKE_CURRENT_SOURCE_DIR}") target_sources(app PRIVATE main.c - "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/tasks.c")
\ No newline at end of file + "${CMAKE_CURRENT_SOURCE_DIR}/../../shim/src/tasks.c") diff --git a/zephyr/test/tasks/boards/native_posix.overlay b/zephyr/test/tasks/boards/native_posix.overlay new file mode 100644 index 0000000000..2e36118442 --- /dev/null +++ b/zephyr/test/tasks/boards/native_posix.overlay @@ -0,0 +1,8 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> + +/* No additional nodes to the native_posix overlay */ diff --git a/zephyr/test/tasks/main.c b/zephyr/test/tasks/main.c index ebf271d9b7..8bfe9eb602 100644 --- a/zephyr/test/tasks/main.c +++ b/zephyr/test/tasks/main.c @@ -1,11 +1,11 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include <zephyr/kernel.h> #include <stdbool.h> -#include <ztest.h> +#include <zephyr/ztest.h> #include "ec_tasks.h" #include "task.h" @@ -107,7 +107,6 @@ static void test_task_get_current(void) run_test(&task_get_current1, &task_get_current2); } - static void timeout1(void) { const uint32_t start_ms = k_uptime_get(); @@ -201,7 +200,6 @@ static void test_event_delivered(void) run_test(&event_delivered1, &event_delivered2); } - static void event_mask_not_delivered1(void) { task_set_event(TASK_ID_TASK_2, 0x007F); @@ -226,7 +224,6 @@ static void test_event_mask_not_delivered(void) run_test(&event_mask_not_delivered1, &event_mask_not_delivered2); } - static void event_mask_extra1(void) { k_sleep(K_SECONDS(1)); @@ -253,7 +250,6 @@ static void test_event_mask_extra(void) run_test(&event_mask_extra1, &event_mask_extra2); } - static void empty_set_mask1(void) { k_sleep(K_SECONDS(1)); @@ -281,7 +277,6 @@ static void test_empty_set_mask(void) run_test(&empty_set_mask1, &empty_set_mask2); } - void test_main(void) { /* Note that test_set_event_before_task_start calls start_ec_tasks */ diff --git a/zephyr/test/tasks/prj.conf b/zephyr/test/tasks/prj.conf index 15af430451..6c8e2fbc90 100644 --- a/zephyr/test/tasks/prj.conf +++ b/zephyr/test/tasks/prj.conf @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/test/tasks/shimmed_test_tasks.h b/zephyr/test/tasks/shimmed_test_tasks.h index c040ed1bad..ebd1215446 100644 --- a/zephyr/test/tasks/shimmed_test_tasks.h +++ b/zephyr/test/tasks/shimmed_test_tasks.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,7 +14,7 @@ #define HAS_TASK_TASK_3 1 /* Highest priority on bottom same as in platform/ec */ -#define CROS_EC_TASK_LIST \ +#define CROS_EC_TASK_LIST \ CROS_EC_TASK(TASK_1, task1_entry, 0, 512, 2) \ CROS_EC_TASK(TASK_2, task2_entry, 0, 512, 1) \ CROS_EC_TASK(TASK_3, task3_entry, 0, 512, 0) diff --git a/zephyr/test/tasks/testcase.yaml b/zephyr/test/tasks/testcase.yaml new file mode 100644 index 0000000000..a72199a14a --- /dev/null +++ b/zephyr/test/tasks/testcase.yaml @@ -0,0 +1,8 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +common: + platform_allow: native_posix +tests: + tasks.default: {} diff --git a/zephyr/test/unblocked_terms.txt b/zephyr/test/unblocked_terms.txt new file mode 100644 index 0000000000..cf2ed1052f --- /dev/null +++ b/zephyr/test/unblocked_terms.txt @@ -0,0 +1,2 @@ +SHELL_BACKEND_DUMMY +shell_dummy diff --git a/zephyr/test/vboot_efs2/CMakeLists.txt b/zephyr/test/vboot_efs2/CMakeLists.txt new file mode 100644 index 0000000000..c3343bcdd2 --- /dev/null +++ b/zephyr/test/vboot_efs2/CMakeLists.txt @@ -0,0 +1,10 @@ +# Copyright 2021 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) +find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}") +project(vboot_efs2) + +FILE(GLOB app_sources src/*.c) +target_sources(app PRIVATE ${app_sources}) diff --git a/zephyr/test/vboot_efs2/boards/native_posix.overlay b/zephyr/test/vboot_efs2/boards/native_posix.overlay new file mode 100644 index 0000000000..ced94c28b1 --- /dev/null +++ b/zephyr/test/vboot_efs2/boards/native_posix.overlay @@ -0,0 +1,132 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <board-overlays/native_posix.dts> +#include <cros/binman.dtsi> + +/ { + chosen { + cros-ec,flash = &flash1; + cros-ec,flash-controller = &cros_flash; + zephyr,shell-uart = &test_uart; + }; + aliases { + gpio-wp = &gpio_wp_l; + }; + named-gpios { + compatible = "named-gpios"; + ec_gsc_packet_mode { + gpios = <&gpio0 2 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + gpio_wp_l: wp_l { + gpios = <&gpio0 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { + gpios = <&gpio0 4 GPIO_INPUT>; + }; + ec_batt_pres_odl { + gpios = <&gpio0 5 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + }; + cros_flash: cros-flash { + compatible = "cros-ec,flash-emul"; + }; + flash1: flash@64000000 { + reg = <0x64000000 DT_SIZE_K(512)>; + }; + named-i2c-ports { + compatible = "named-i2c-ports"; + + named_i2c0: i2c0 { + i2c-port = <&i2c0>; + enum-names = "I2C_PORT_BATTERY", + "I2C_PORT_CHARGER"; + }; + named_i2c2: i2c2 { + i2c-port = <&i2c2>; + dynamic-speed; + enum-names = "I2C_PORT_USB_C0"; + }; + }; + usbc { + #address-cells = <1>; + #size-cells = <0>; + + port0@0 { + compatible = "named-usbc-port"; + reg = <0>; + chg = <&isl923x_emul>; + tcpc = <&tcpci_emul>; + }; + }; + i2c2: i2c@500 { + status = "okay"; + compatible = "zephyr,i2c-emul-controller"; + clock-frequency = <I2C_BITRATE_STANDARD>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x500 4>; + + tcpci_emul: tcpci_emul@82 { + compatible = "cros,tcpci-generic-emul"; + status = "okay"; + reg = <0x82>; + alert_gpio = <&usb_c0_tcpc_int_odl>; + }; + }; + adc0: adc { + compatible = "zephyr,adc-emul"; + nchannels = <6>; + ref-internal-mv = <3300>; + #io-channel-cells = <1>; + status = "okay"; + }; + named-adc-channels { + compatible = "named-adc-channels"; + + adc_charger: charger { + enum-name = "ADC_TEMP_SENSOR_CHARGER"; + io-channels = <&adc0 0>; + }; + }; + batteries { + default_battery: lgc_ac17a8m { + compatible = "lgc,ac17a8m", "battery-smart"; + }; + }; + test_uart: uart@55556666 { + compatible = "vnd,serial"; + reg = <0x55556666 0x1000>; + status = "okay"; + buffer-size = <200>; + }; +}; + +&gpio0 { + ngpios = <6>; +}; + +&i2c0 { + battery: sb@b { + compatible = "zephyr,smart-battery"; + reg = <0xb>; + cycle-count = <99>; + version = "BATTERY_SPEC_VER_1_1_WITH_PEC"; + /* Real battery voltages are multiples of 4.4V. */ + desired-charg-volt = <5000>; + desired-charg-cur = <1000>; + mf-name = "LGC"; + dev-name = "AC17A8M"; + }; + + isl923x_emul: isl923x@9 { + compatible = "cros,isl923x-emul"; + status = "okay"; + reg = <0x9>; + battery = <&battery>; + }; +}; diff --git a/zephyr/test/vboot_efs2/prj.conf b/zephyr/test/vboot_efs2/prj.conf new file mode 100644 index 0000000000..602bd22c65 --- /dev/null +++ b/zephyr/test/vboot_efs2/prj.conf @@ -0,0 +1,43 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_ADC=y +CONFIG_ADC_EMUL=y +CONFIG_CROS_EC=y +CONFIG_EMUL_CROS_FLASH=y +CONFIG_EMUL_SMART_BATTERY=y +CONFIG_EMUL_TCPCI=y +CONFIG_FLASH=y +CONFIG_I2C=y +CONFIG_I2C_EMUL=y +CONFIG_PLATFORM_EC=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +CONFIG_PLATFORM_EC_BATTERY=y +CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y +CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y +CONFIG_PLATFORM_EC_BATTERY_SMART=y +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y +CONFIG_PLATFORM_EC_CHARGER_ISL9238=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 +CONFIG_PLATFORM_EC_CHARGE_RAMP_SW=y +CONFIG_PLATFORM_EC_HOSTCMD=y +CONFIG_PLATFORM_EC_SWITCH=n +CONFIG_PLATFORM_EC_USBC=y +CONFIG_PLATFORM_EC_USBC_PPC_SN5S330=y +CONFIG_PLATFORM_EC_USB_CHARGER=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE=n +CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y +CONFIG_PLATFORM_EC_VBOOT_EFS2=y +CONFIG_PLATFORM_EC_VBOOT_HASH=y +CONFIG_RING_BUFFER=y +CONFIG_SERIAL=y +CONFIG_SHELL_BACKEND_DUMMY=y +CONFIG_SHELL_BACKEND_DUMMY_BUF_SIZE=1000 +CONFIG_SHELL_BACKEND_SERIAL=n +CONFIG_SHIMMED_TASKS=y +CONFIG_ZTEST=y +CONFIG_ZTEST_NEW_API=y diff --git a/zephyr/test/vboot_efs2/src/main.c b/zephyr/test/vboot_efs2/src/main.c new file mode 100644 index 0000000000..1558fb75f0 --- /dev/null +++ b/zephyr/test/vboot_efs2/src/main.c @@ -0,0 +1,423 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "driver/bc12/pi3usb9201_public.h" +#include "driver/tcpm/tcpci.h" +#include "ec_app_main.h" +#include "emul/emul_flash.h" +#include "hooks.h" +#include "ppc/sn5s330_public.h" +#include "system_fake.h" +#include "task.h" +#include "usb_mux.h" +#include "usbc_ppc.h" +#include "vboot.h" + +#include "zephyr/devicetree.h" +#include <stdint.h> + +#include <zephyr/drivers/gpio/gpio_emul.h> +#include <zephyr/drivers/uart/serial_test.h> +#include <zephyr/kernel.h> +#include <zephyr/shell/shell_dummy.h> +#include <zephyr/ztest_assert.h> +#include <zephyr/ztest_test_new.h> + +#define SERIAL_BUFFER_SIZE DT_PROP(DT_NODELABEL(test_uart), buffer_size) + +static int show_power_shortage_called; +void show_power_shortage(void) +{ + show_power_shortage_called++; +} + +static int show_critical_error_called; +void show_critical_error(void) +{ + show_critical_error_called++; +} + +ZTEST(vboot_efs2, test_vboot_main_system_is_in_rw) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + /* Set system_is_in_rw */ + system_set_shrspi_image_copy(EC_IMAGE_RW); + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_equal(show_power_shortage_called, 1, NULL); + + zassert_true(strstr(outbuffer, "VB Already in RW") != NULL, + "Expected msg not in %s", outbuffer); + + /* Verify some things we don't expect also. */ + zassert_true(strstr(outbuffer, "VB Ping Cr50") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Exit") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_critical_error_called, 0, NULL); +} + +ZTEST(vboot_efs2, test_vboot_main_system_is_manual_recovery) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + system_enter_manual_recovery(); + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_equal(show_power_shortage_called, 0, NULL); + zassert_true(strstr(outbuffer, "VB In recovery mode") != NULL, + "Expected msg not in %s", outbuffer); + + /* Verify some things we don't expect also. */ + zassert_true(strstr(outbuffer, "VB Ping Cr50") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Exit") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_critical_error_called, 0, NULL); +} + +ZTEST(vboot_efs2, test_vboot_main_stay_in_ro) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + system_set_reset_flags(EC_RESET_FLAG_STAY_IN_RO); + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_equal(show_power_shortage_called, 0, NULL); + + /* Verify some things we don't expect also. */ + zassert_true(strstr(outbuffer, "VB In recovery mode") == NULL, + "Expected msg not in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Ping Cr50") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Exit") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_critical_error_called, 0, NULL); +} + +ZTEST(vboot_efs2, test_vboot_main_jump_timeout) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + zassert_equal(show_critical_error_called, 1, NULL); + + zassert_true(strstr(outbuffer, "VB Ping Cr50") != NULL, + "Expected msg not in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_power_shortage_called, 0, NULL); +} + +#define PACKET_MODE_GPIO DT_PATH(named_gpios, ec_gsc_packet_mode) + +static const struct device *uart_shell_dev = + DEVICE_DT_GET(DT_CHOSEN(zephyr_shell_uart)); +static const struct device *gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(PACKET_MODE_GPIO, gpios)); + +static void reply_cr50_payload(const struct device *dev, void *user_data) +{ + if (gpio_emul_output_get(gpio_dev, + DT_GPIO_PIN(PACKET_MODE_GPIO, gpios))) { + struct cr50_comm_request req; + uint32_t bytes_read; + + bytes_read = serial_vnd_peek_out_data( + uart_shell_dev, (void *)&req, sizeof(req)); + /* If ! valid cr50_comm_request header, read 1 byte. */ + while (bytes_read == sizeof(req) && + req.magic != CR50_PACKET_MAGIC) { + /* Consume one byte and then peek again. */ + serial_vnd_read_out_data(uart_shell_dev, NULL, 1); + bytes_read = serial_vnd_peek_out_data( + uart_shell_dev, (void *)&req, sizeof(req)); + } + if (bytes_read == sizeof(req)) { + /* If we have a full packet, consume it, and reply + * with whatever is in user_data which holds a cr50 + * reply. + */ + if (req.size + sizeof(req) <= + serial_vnd_out_data_size_get(uart_shell_dev)) { + serial_vnd_read_out_data(uart_shell_dev, NULL, + req.size + + sizeof(req)); + serial_vnd_queue_in_data( + uart_shell_dev, user_data, + sizeof(struct cr50_comm_response)); + } + } + } else { + /* Packet mode is off, so just consume enough bytes from the out + * buffer to clear it. + */ + serial_vnd_read_out_data(uart_shell_dev, NULL, + SERIAL_BUFFER_SIZE); + } +} + +ZTEST(vboot_efs2, test_vboot_main_jump_bad_payload) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + struct cr50_comm_response resp = { + .error = CR50_COMM_ERR_BAD_PAYLOAD, + }; + + serial_vnd_set_callback(uart_shell_dev, reply_cr50_payload, &resp); + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(strstr(outbuffer, "VB Ping Cr50") != NULL, + "Expected msg not in %s", outbuffer); + zassert_true(vboot_allow_usb_pd(), NULL); + zassert_equal(show_power_shortage_called, 0, NULL); + zassert_equal(show_critical_error_called, 0, NULL); +} + +/* This hits the default case in verify_and_jump. */ +ZTEST(vboot_efs2, test_vboot_main_jump_bad_crc) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + struct cr50_comm_response resp = { + .error = CR50_COMM_ERR_CRC, + }; + + serial_vnd_set_callback(uart_shell_dev, reply_cr50_payload, &resp); + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(strstr(outbuffer, "VB Ping Cr50") != NULL, + "Expected msg not in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Failed to verify RW (0xec03)") != + NULL, + "Expected msg not in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_power_shortage_called, 0, NULL); + zassert_equal(show_critical_error_called, 1, NULL); +} + +ZTEST(vboot_efs2, test_vboot_main_vboot_get_rw_hash_fail) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + struct ec_response_vboot_hash response; + struct ec_params_vboot_hash hash_start_params = { + .cmd = EC_VBOOT_HASH_START, + .hash_type = EC_VBOOT_HASH_TYPE_SHA256, + .offset = 0, + .size = 0x12345, + }; + struct host_cmd_handler_args hash_start_args = BUILD_HOST_COMMAND( + EC_CMD_VBOOT_HASH, 0, response, hash_start_params); + + shell_backend_dummy_clear_output(shell_zephyr); + + zassert_ok(host_command_process(&hash_start_args), NULL); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(strstr(outbuffer, "VB Ping Cr50") != NULL, + "Expected msg not in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Failed to verify RW (0x6)") != NULL, + "Expected msg not in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_power_shortage_called, 0, NULL); + zassert_equal(show_critical_error_called, 1, NULL); +} + +ZTEST(vboot_efs2, test_vboot_main_jump_success) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + struct cr50_comm_response resp = { + .error = CR50_COMM_SUCCESS, + }; + + serial_vnd_set_callback(uart_shell_dev, reply_cr50_payload, &resp); + + shell_backend_dummy_clear_output(shell_zephyr); + vboot_main(); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(strstr(outbuffer, "VB Ping Cr50") != NULL, + "Expected msg not in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_power_shortage_called, 0, NULL); + zassert_equal(show_critical_error_called, 1, NULL); + zassert_equal(system_get_reset_flags(), 0, NULL); +} + +ZTEST(vboot_efs2, test_shutdown_hook_in_rw) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + /* Set system_is_in_rw */ + system_set_shrspi_image_copy(EC_IMAGE_RW); + + shell_backend_dummy_clear_output(shell_zephyr); + hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(strstr(outbuffer, "VB hook_shutdown") != NULL, + "Expected msg not in %s", outbuffer); + zassert_equal(system_get_reset_flags(), 0, NULL); + + /* Verify some things we don't expect also. */ + zassert_true(strstr(outbuffer, "VB Ping Cr50") == NULL, + "Unexpected msg in %s", outbuffer); + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_critical_error_called, 0, NULL); + zassert_equal(show_power_shortage_called, 0, NULL); +} + +ZTEST(vboot_efs2, test_shutdown_hook_in_ro) +{ + const struct shell *shell_zephyr = get_ec_shell(); + const char *outbuffer; + size_t buffer_size; + + /* Set system_is_in_rw */ + system_set_shrspi_image_copy(EC_IMAGE_RO); + + shell_backend_dummy_clear_output(shell_zephyr); + hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); + + outbuffer = shell_backend_dummy_get_output(shell_zephyr, &buffer_size); + + zassert_true(strstr(outbuffer, "VB hook_shutdown") != NULL, + "Expected msg not in %s", outbuffer); + zassert_true(strstr(outbuffer, "VB Ping Cr50") != NULL, + "Expected msg not in %s", outbuffer); + zassert_equal(system_get_reset_flags(), EC_RESET_FLAG_AP_IDLE, NULL); + zassert_equal(show_critical_error_called, 1, NULL); + + /* Verify some things we don't expect also. */ + zassert_false(vboot_allow_usb_pd(), NULL); + zassert_equal(show_power_shortage_called, 0, NULL); +} + +void *vboot_efs2_setup(void) +{ + /* Wait for the shell to start. */ + k_sleep(K_MSEC(1)); + zassert_equal(get_ec_shell()->ctx->state, SHELL_STATE_ACTIVE, NULL); + + system_common_pre_init(); + + return NULL; +} + +void vboot_efs2_cleanup(void *fixture) +{ + ARG_UNUSED(fixture); + + system_set_shrspi_image_copy(EC_IMAGE_RO); + show_power_shortage_called = 0; + show_critical_error_called = 0; + system_exit_manual_recovery(); + system_clear_reset_flags(EC_RESET_FLAG_STAY_IN_RO | EC_RESET_FLAG_EFS | + EC_RESET_FLAG_AP_IDLE); + vboot_disable_pd(); + serial_vnd_set_callback(uart_shell_dev, NULL, NULL); + serial_vnd_read_out_data(uart_shell_dev, NULL, SERIAL_BUFFER_SIZE); +} + +ZTEST_SUITE(vboot_efs2, NULL, vboot_efs2_setup, NULL, vboot_efs2_cleanup, NULL); + +int board_set_active_charge_port(int port) +{ + return EC_ERROR_INVAL; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) +{ +} + +void pd_power_supply_reset(int port) +{ +} + +int pd_check_vconn_swap(int port) +{ + return 0; +} + +int pd_set_power_supply_ready(int port) +{ + return EC_SUCCESS; +} + +enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_COUNT }; + +/* BC1.2 charger detect configuration */ +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, +}; + +struct usb_mux_chain usb_muxes[] = { + [USBC_PORT_C0] = { + .mux = &(struct usb_mux) { + .usb_port = USBC_PORT_C0, + .driver = &tcpci_tcpm_usb_mux_driver, + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = DT_REG_ADDR(DT_NODELABEL(tcpci_emul)), + }, + }, +}; + +/* USBC PPC configuration */ +struct ppc_config_t ppc_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = SN5S330_ADDR0_FLAGS, + .drv = &sn5s330_drv, + }, +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); diff --git a/zephyr/test/vboot_efs2/testcase.yaml b/zephyr/test/vboot_efs2/testcase.yaml new file mode 100644 index 0000000000..59716f3fb2 --- /dev/null +++ b/zephyr/test/vboot_efs2/testcase.yaml @@ -0,0 +1,8 @@ +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +common: + platform_allow: native_posix +tests: + vboot_efs2.default: + timeout: 120 diff --git a/zephyr/zmake/.flake8 b/zephyr/zmake/.flake8 deleted file mode 100644 index 0a0a9c29ab..0000000000 --- a/zephyr/zmake/.flake8 +++ /dev/null @@ -1,9 +0,0 @@ -[flake8] -max-line-length = 88 -extend-ignore = E203 -exclude = - .hypothesis, - .pytest_cache, - __pycache__, - build, - dist diff --git a/zephyr/zmake/.isort.cfg b/zephyr/zmake/.isort.cfg deleted file mode 100644 index b9fb3f3e8c..0000000000 --- a/zephyr/zmake/.isort.cfg +++ /dev/null @@ -1,2 +0,0 @@ -[settings] -profile=black diff --git a/zephyr/zmake/.pylintrc b/zephyr/zmake/.pylintrc index a33a1fde1c..a0f9ac790b 100644 --- a/zephyr/zmake/.pylintrc +++ b/zephyr/zmake/.pylintrc @@ -1,15 +1,24 @@ [MASTER] init-hook='import sys; sys.path.extend(["zephyr/zmake"])' +[BASIC] +good-names= + e, + +# cros lint doesn't inherit the pylintrc from the parent dir. +# These settings are copied from platform/ec/pylintrc [MESSAGES CONTROL] -disable=bad-continuation,bad-whitespace,format,fixme,wrong-import-order +disable= + bad-continuation, + bad-whitespace, + # These have nothing to do with black, they are just annoying + fixme, + too-many-arguments, + too-many-statements, + too-many-branches, + too-many-locals [format] -max-line-length=88 string-quote=double - -[BASIC] -good-names= - e, diff --git a/zephyr/zmake/README.md b/zephyr/zmake/README.md index 6e2690959b..e424b66ca0 100644 --- a/zephyr/zmake/README.md +++ b/zephyr/zmake/README.md @@ -35,7 +35,7 @@ Chromium OS's meta-build tool for Zephyr ### zmake configure -**Usage:** `zmake configure [-h] [-t TOOLCHAIN] [--bringup] [--clobber] [--allow-warnings] [-B BUILD_DIR] [-c] [--extra-cflags EXTRA_CFLAGS] (-a | --host-tests-only | project_name [project_name ...])` +**Usage:** `zmake configure [-h] [-t TOOLCHAIN] [--bringup] [--clobber] [--static] [--save-temps] [--allow-warnings] [-B BUILD_DIR] [-c] [--extra-cflags EXTRA_CFLAGS] [--delete-intermediates] (-a | project_name [project_name ...])` #### Positional Arguments @@ -51,16 +51,18 @@ Chromium OS's meta-build tool for Zephyr | `-t TOOLCHAIN`, `--toolchain TOOLCHAIN` | Name of toolchain to use | | `--bringup` | Enable bringup debugging features | | `--clobber` | Delete existing build directories, even if configuration is unchanged | +| `--static` | Generate static version information for reproducible builds | +| `--save-temps` | Save the temporary files containing preprocessor output | | `--allow-warnings` | Do not treat warnings as errors | | `-B BUILD_DIR`, `--build-dir BUILD_DIR` | Root build directory, project files will be in ${build_dir}/${project_name} | | `-c`, `--coverage` | Enable CONFIG_COVERAGE Kconfig. | | `--extra-cflags EXTRA_CFLAGS` | Additional CFLAGS to use for target builds | +| `--delete-intermediates` | Delete intermediate files to save disk space | | `-a`, `--all` | Select all projects | -| `--host-tests-only` | Select all test projects | ### zmake build -**Usage:** `zmake build [-h] [-t TOOLCHAIN] [--bringup] [--clobber] [--allow-warnings] [-B BUILD_DIR] [-c] [--extra-cflags EXTRA_CFLAGS] (-a | --host-tests-only | project_name [project_name ...])` +**Usage:** `zmake build [-h] [-t TOOLCHAIN] [--bringup] [--clobber] [--static] [--save-temps] [--allow-warnings] [-B BUILD_DIR] [-c] [--extra-cflags EXTRA_CFLAGS] [--delete-intermediates] (-a | project_name [project_name ...])` #### Positional Arguments @@ -76,12 +78,14 @@ Chromium OS's meta-build tool for Zephyr | `-t TOOLCHAIN`, `--toolchain TOOLCHAIN` | Name of toolchain to use | | `--bringup` | Enable bringup debugging features | | `--clobber` | Delete existing build directories, even if configuration is unchanged | +| `--static` | Generate static version information for reproducible builds | +| `--save-temps` | Save the temporary files containing preprocessor output | | `--allow-warnings` | Do not treat warnings as errors | | `-B BUILD_DIR`, `--build-dir BUILD_DIR` | Root build directory, project files will be in ${build_dir}/${project_name} | | `-c`, `--coverage` | Enable CONFIG_COVERAGE Kconfig. | | `--extra-cflags EXTRA_CFLAGS` | Additional CFLAGS to use for target builds | +| `--delete-intermediates` | Delete intermediate files to save disk space | | `-a`, `--all` | Select all projects | -| `--host-tests-only` | Select all test projects | ### zmake list-projects @@ -102,7 +106,7 @@ Chromium OS's meta-build tool for Zephyr ### zmake test -**Usage:** `zmake test [-h] [--no-rebuild] [-t TOOLCHAIN] [--bringup] [--clobber] [--allow-warnings] [-B BUILD_DIR] [-c] [--extra-cflags EXTRA_CFLAGS] (-a | --host-tests-only | project_name [project_name ...])` +**Usage:** `zmake test [-h] [--no-rebuild] [-t TOOLCHAIN] [--bringup] [--clobber] [--static] [--save-temps] [--allow-warnings] [-B BUILD_DIR] [-c] [--extra-cflags EXTRA_CFLAGS] [--delete-intermediates] (-a | project_name [project_name ...])` #### Positional Arguments @@ -119,16 +123,18 @@ Chromium OS's meta-build tool for Zephyr | `-t TOOLCHAIN`, `--toolchain TOOLCHAIN` | Name of toolchain to use | | `--bringup` | Enable bringup debugging features | | `--clobber` | Delete existing build directories, even if configuration is unchanged | +| `--static` | Generate static version information for reproducible builds | +| `--save-temps` | Save the temporary files containing preprocessor output | | `--allow-warnings` | Do not treat warnings as errors | | `-B BUILD_DIR`, `--build-dir BUILD_DIR` | Root build directory, project files will be in ${build_dir}/${project_name} | | `-c`, `--coverage` | Enable CONFIG_COVERAGE Kconfig. | | `--extra-cflags EXTRA_CFLAGS` | Additional CFLAGS to use for target builds | +| `--delete-intermediates` | Delete intermediate files to save disk space | | `-a`, `--all` | Select all projects | -| `--host-tests-only` | Select all test projects | ### zmake testall -**Usage:** `zmake testall [-h] [--clobber] [-B BUILD_DIR]` +**Usage:** `zmake testall [-h] [--clobber] [-B BUILD_DIR] [--static]` #### Optional Arguments @@ -137,6 +143,7 @@ Chromium OS's meta-build tool for Zephyr | `-h`, `--help` | show this help message and exit | | `--clobber` | Delete existing build directories, even if configuration is unchanged | | `-B BUILD_DIR`, `--build-dir BUILD_DIR` | Build directory | +| `--static` | Generate static version information for reproducible builds | ### zmake generate-readme diff --git a/zephyr/zmake/pre-upload.sh b/zephyr/zmake/pre-upload.sh deleted file mode 100755 index 15b6637f44..0000000000 --- a/zephyr/zmake/pre-upload.sh +++ /dev/null @@ -1,68 +0,0 @@ -#!/bin/bash -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -set -e - -ZMAKE_FILES=() -BUILD_PY_FILES=() - -for path in "$@"; do - case "${path}" in - *zephyr/zmake/*.py ) - ZMAKE_FILES+=("${path}") - ;; - */BUILD.py ) - BUILD_PY_FILES+=("${path}") - ;; - esac -done - -AFFECTED_FILES=("${ZMAKE_FILES[@]}" "${BUILD_PY_FILES[@]}") - -if [ "${#AFFECTED_FILES}" -eq 0 ]; then - # No zmake changes made, do nothing. - exit 0 -fi - -EXIT_STATUS=0 - -# Wraps a black/isort command and reports how to fix it. -wrap_fix_msg() { - local cmd="$1" - shift - - if ! "${cmd}" "$@"; then - cat <<EOF >&2 -Looks like zmake's ${cmd} formatter detected that formatting changes -need applied. Fix by running this command from the zephyr/zmake -directory and amending your changes: - - ${cmd} . - -EOF - EXIT_STATUS=1 - fi -} - -# We only want to run black, flake8, and isort inside of the chroot, -# as these are formatting tools which we want the specific versions -# provided by the chroot. -if [ -f /etc/cros_chroot_version ]; then - cd "$(dirname "$(realpath -e "${BASH_SOURCE[0]}")")" - wrap_fix_msg black --check --diff "${AFFECTED_FILES[@]}" - wrap_fix_msg isort --check "${AFFECTED_FILES[@]}" - if [ "${#ZMAKE_FILES[@]}" -gt 0 ]; then - flake8 "${ZMAKE_FILES[@]}" || EXIT_STATUS=1 - fi - exit "${EXIT_STATUS}" -else - cat <<EOF >&2 -WARNING: It looks like you made zmake changes, but I'm running outside -of the chroot, and can't run zmake's auto-formatters. - -It is recommended that you run repo upload from inside the chroot, or -you may see formatting errors during your CQ run. -EOF - exit 1 -fi diff --git a/zephyr/zmake/run_tests.sh b/zephyr/zmake/run_tests.sh index 4796704440..3468a22deb 100755 --- a/zephyr/zmake/run_tests.sh +++ b/zephyr/zmake/run_tests.sh @@ -1,5 +1,5 @@ #!/bin/bash -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -19,20 +19,7 @@ cd "$(dirname "$(realpath -e "${BASH_SOURCE[0]}")")" export PYTHONPATH="${PWD}" # Run pytest. -# TODO(jrosenth): --hypothesis-profile=cq is very likely to be -# unnecessary, as this was only needed when we were heavily taxing the -# CPU by running pytest alongside all the ninjas, which no longer -# happens. Remove this flag. -pytest --hypothesis-profile=cq . - -# Check import sorting. -isort --check . - -# Check black formatting. -black --check --diff . - -# Check flake8 reports no issues. -flake8 . +pytest . -v # Check auto-generated README.md is as expected. python -m zmake generate-readme --diff diff --git a/zephyr/zmake/setup.py b/zephyr/zmake/setup.py index 3786335f19..b7e58ef803 100644 --- a/zephyr/zmake/setup.py +++ b/zephyr/zmake/setup.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -11,14 +11,14 @@ setuptools.setup( description="CrOS Zephyr Utilities", long_description="Utilities used for working on a Zephyr-based EC", url="https://chromium.googlesource.com/chromiumos/platform/ec", - author="Chromium OS Authors", + author="ChromiumOS Authors", author_email="chromiumos-dev@chromium.org", license="BSD", # What does your project relate to? keywords="chromeos", # You can just specify the packages manually here if your project is # simple. Or you can use find_packages(). - packages=["zmake"], + packages=["zmake", "zephyr_build_tools"], python_requires=">=3.6, <4", # List run-time dependencies here. These will be installed by pip when # your project is installed. For an analysis of "install_requires" vs pip's diff --git a/zephyr/zmake/tests/conftest.py b/zephyr/zmake/tests/conftest.py index 38e34bef56..dfea10457c 100644 --- a/zephyr/zmake/tests/conftest.py +++ b/zephyr/zmake/tests/conftest.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,14 +7,14 @@ import os import pathlib -import hypothesis -import pytest - +import hypothesis # pylint:disable=import-error +import pytest # pylint:disable=import-error import zmake.zmake as zm hypothesis.settings.register_profile( "cq", suppress_health_check=hypothesis.HealthCheck.all() ) +hypothesis.settings.load_profile("cq") # pylint: disable=redefined-outer-name,unused-argument diff --git a/zephyr/zmake/tests/test_build_config.py b/zephyr/zmake/tests/test_build_config.py index 76cc0a2028..d8355da768 100644 --- a/zephyr/zmake/tests/test_build_config.py +++ b/zephyr/zmake/tests/test_build_config.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -10,10 +10,9 @@ import pathlib import string import tempfile -import hypothesis -import hypothesis.strategies as st -import pytest - +import hypothesis # pylint:disable=import-error +import hypothesis.strategies as st # pylint:disable=import-error +import pytest # pylint:disable=import-error import zmake.jobserver import zmake.util as util from zmake.build_config import BuildConfig @@ -36,17 +35,13 @@ config_dicts_at_least_one_entry = st.dictionaries( build_configs = st.builds( BuildConfig, - environ_defs=config_dicts, cmake_defs=config_dicts, kconfig_defs=config_dicts, kconfig_files=st.lists(paths), ) -build_configs_no_kconfig = st.builds( - BuildConfig, environ_defs=config_dicts, cmake_defs=config_dicts -) +build_configs_no_kconfig = st.builds(BuildConfig, cmake_defs=config_dicts) build_configs_with_at_least_one_kconfig = st.builds( BuildConfig, - environ_defs=config_dicts, cmake_defs=config_dicts, kconfig_defs=config_dicts_at_least_one_entry, ) @@ -70,19 +65,16 @@ def test_merge(coins, combined): return left, right # Split the original config into two - env1, env2 = split(combined.environ_defs.items()) cmake1, cmake2 = split(combined.cmake_defs.items()) kconf1, kconf2 = split(combined.kconfig_defs.items()) files1, files2 = split(combined.kconfig_files) config1 = BuildConfig( - environ_defs=dict(env1), cmake_defs=dict(cmake1), kconfig_defs=dict(kconf1), kconfig_files=files1, ) config2 = BuildConfig( - environ_defs=dict(env2), cmake_defs=dict(cmake2), kconfig_defs=dict(kconf2), kconfig_files=files2, @@ -92,7 +84,6 @@ def test_merge(coins, combined): merged = config1 | config2 # Assert that the merged split configs is the original config - assert merged.environ_defs == combined.environ_defs assert merged.cmake_defs == combined.cmake_defs assert merged.kconfig_defs == combined.kconfig_defs assert set(merged.kconfig_files) == set(combined.kconfig_files) @@ -158,12 +149,13 @@ def test_popen_cmake_no_kconfig(conf: BuildConfig, project_dir, build_dir): _, cmake_defs = parse_cmake_args(job_client.captured_argv) assert cmake_defs == conf.cmake_defs - assert job_client.captured_env == conf.environ_defs @hypothesis.given(build_configs_with_at_least_one_kconfig, paths, paths) @hypothesis.settings(deadline=60000) -def test_popen_cmake_kconfig_but_no_file(conf: BuildConfig, project_dir, build_dir): +def test_popen_cmake_kconfig_but_no_file( + conf: BuildConfig, project_dir, build_dir +): """Test that running popen_cmake with Kconfig definitions to write out, but no path to do so, should raise an error. """ @@ -184,7 +176,10 @@ def test_popen_cmake_kconfig(conf: BuildConfig, project_dir, build_dir): try: conf.popen_cmake( - job_client, project_dir, build_dir, kconfig_path=pathlib.Path(temp_path) + job_client, + project_dir, + build_dir, + kconfig_path=pathlib.Path(temp_path), ) _, cmake_defs = parse_cmake_args(job_client.captured_argv) @@ -199,7 +194,6 @@ def test_popen_cmake_kconfig(conf: BuildConfig, project_dir, build_dir): kconfig_files = set() assert cmake_defs == conf.cmake_defs - assert job_client.captured_env == conf.environ_defs assert kconfig_files == expected_kconfig_files kconfig_defs = util.read_kconfig_file(temp_path) @@ -215,7 +209,9 @@ def fake_kconfig_files(tmp_path): paths = [tmp_path / f"{letter}.conf" for letter in "ABCD"] for path, cfg_name in zip(paths, ("ONE", "TWO", "THREE", "FOUR")): - path.write_text(f"# Fake kconfig file for testing.\nCONFIG_{cfg_name}=y\n") + path.write_text( + f"# Fake kconfig file for testing.\nCONFIG_{cfg_name}=y\n" + ) return paths @@ -225,10 +221,6 @@ def test_build_config_json_stability(fake_kconfig_files): build configs. """ config_a = BuildConfig( - environ_defs={ - "A": "B", - "B": "C", - }, cmake_defs={ "Z": "Y", "X": "W", @@ -242,10 +234,6 @@ def test_build_config_json_stability(fake_kconfig_files): # Dict ordering is intentionally reversed in b. config_b = BuildConfig( - environ_defs={ - "B": "C", - "A": "B", - }, cmake_defs={ "X": "W", "Z": "Y", @@ -265,7 +253,7 @@ def test_build_config_json_inequality(): representation. """ config_a = BuildConfig(cmake_defs={"A": "B"}) - config_b = BuildConfig(environ_defs={"A": "B"}) + config_b = BuildConfig(kconfig_defs={"CONFIG_A": "y"}) assert config_a.as_json() != config_b.as_json() diff --git a/zephyr/zmake/tests/test_generate_readme.py b/zephyr/zmake/tests/test_generate_readme.py index cb4bcf6cc1..e7873f1980 100644 --- a/zephyr/zmake/tests/test_generate_readme.py +++ b/zephyr/zmake/tests/test_generate_readme.py @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -6,8 +6,7 @@ Tests for the generate_readme.py file. """ -import pytest - +import pytest # pylint:disable=import-error import zmake.generate_readme as gen_readme @@ -34,7 +33,7 @@ def test_generate_readme_diff( expected_contents, actual_contents, return_code, -): # pylint: disable=too-many-arguments +): """Verify that the diff function can detect different text.""" def generate_readme(): diff --git a/zephyr/zmake/tests/test_modules.py b/zephyr/zmake/tests/test_modules.py index 600544d2e7..dc4c170535 100644 --- a/zephyr/zmake/tests/test_modules.py +++ b/zephyr/zmake/tests/test_modules.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,9 +7,8 @@ import pathlib import tempfile -import hypothesis -import hypothesis.strategies as st - +import hypothesis # pylint:disable=import-error +import hypothesis.strategies as st # pylint:disable=import-error import zmake.modules module_lists = st.lists( @@ -37,4 +36,6 @@ def test_locate_in_directory(modules): expected_modules[module] = module_dir - assert zmake.modules.locate_from_directory(modules_dir) == expected_modules + assert ( + zmake.modules.locate_from_directory(modules_dir) == expected_modules + ) diff --git a/zephyr/zmake/tests/test_multiproc_executor.py b/zephyr/zmake/tests/test_multiproc_executor.py index c905ef03ec..ff443e2f4b 100644 --- a/zephyr/zmake/tests/test_multiproc_executor.py +++ b/zephyr/zmake/tests/test_multiproc_executor.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. diff --git a/zephyr/zmake/tests/test_multiproc_logging.py b/zephyr/zmake/tests/test_multiproc_logging.py index 2694b6451e..88d029675b 100644 --- a/zephyr/zmake/tests/test_multiproc_logging.py +++ b/zephyr/zmake/tests/test_multiproc_logging.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -20,7 +20,9 @@ def test_read_output_from_pipe(): file_desc = io.TextIOWrapper(os.fdopen(pipe[0], "rb"), encoding="utf-8") logger = mock.Mock(spec=logging.Logger) logger.log.side_effect = lambda log_lvl, line: semaphore.release() - zmake.multiproc.LogWriter.log_output(logger, logging.DEBUG, file_desc, job_id="") + zmake.multiproc.LogWriter.log_output( + logger, logging.DEBUG, file_desc, job_id="" + ) os.write(pipe[1], "Hello\n".encode("utf-8")) semaphore.acquire() logger.log.assert_called_with(logging.DEBUG, "Hello") @@ -77,8 +79,12 @@ def test_read_output_from_second_pipe(): logger = mock.Mock(spec=logging.Logger) logger.log.side_effect = lambda log_lvl, fmt, id, line: semaphore.release() - zmake.multiproc.LogWriter.log_output(logger, logging.DEBUG, fds[0], job_id="0") - zmake.multiproc.LogWriter.log_output(logger, logging.ERROR, fds[1], job_id="1") + zmake.multiproc.LogWriter.log_output( + logger, logging.DEBUG, fds[0], job_id="0" + ) + zmake.multiproc.LogWriter.log_output( + logger, logging.ERROR, fds[1], job_id="1" + ) os.write(pipes[1][1], "Hello\n".encode("utf-8")) semaphore.acquire() @@ -102,8 +108,12 @@ def test_read_output_after_another_pipe_closed(): logger = mock.Mock(spec=logging.Logger) logger.log.side_effect = lambda log_lvl, fmt, id, line: semaphore.release() - zmake.multiproc.LogWriter.log_output(logger, logging.DEBUG, fds[0], job_id="0") - zmake.multiproc.LogWriter.log_output(logger, logging.ERROR, fds[1], job_id="1") + zmake.multiproc.LogWriter.log_output( + logger, logging.DEBUG, fds[0], job_id="0" + ) + zmake.multiproc.LogWriter.log_output( + logger, logging.ERROR, fds[1], job_id="1" + ) fds[0].close() os.write(pipes[1][1], "Hello\n".encode("utf-8")) diff --git a/zephyr/zmake/tests/test_packers.py b/zephyr/zmake/tests/test_packers.py index 43b63a908f..23bdb2bf6b 100644 --- a/zephyr/zmake/tests/test_packers.py +++ b/zephyr/zmake/tests/test_packers.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,10 +7,9 @@ import pathlib import tempfile -import hypothesis -import hypothesis.strategies as st -import pytest - +import hypothesis # pylint:disable=import-error +import hypothesis.strategies as st # pylint:disable=import-error +import pytest # pylint:disable=import-error import zmake.output_packers as packers # Strategies for use with hypothesis @@ -54,7 +53,7 @@ def test_file_size_in_bounds(data): """Test with file size limited.""" packer = FakePacker(100) with tempfile.TemporaryDirectory() as temp_dir_name: - file = pathlib.Path(temp_dir_name) / "zephyr.bin" + file = pathlib.Path(temp_dir_name) / "ec.bin" with open(file, "wb") as outfile: outfile.write(data) assert packer.check_packed_file_size(file=file, dir_map={}) == file @@ -66,7 +65,7 @@ def test_file_size_out_of_bounds(data): """Test with file size limited, and file exceeds limit.""" packer = FakePacker(100) with tempfile.TemporaryDirectory() as temp_dir_name: - file = pathlib.Path(temp_dir_name) / "zephyr.bin" + file = pathlib.Path(temp_dir_name) / "ec.bin" with open(file, "wb") as outfile: outfile.write(data) with pytest.raises(RuntimeError): diff --git a/zephyr/zmake/tests/test_project.py b/zephyr/zmake/tests/test_project.py index b5facbc331..3225de1d75 100644 --- a/zephyr/zmake/tests/test_project.py +++ b/zephyr/zmake/tests/test_project.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -8,10 +8,9 @@ import pathlib import string import tempfile -import hypothesis -import hypothesis.strategies as st -import pytest - +import hypothesis # pylint:disable=import-error +import hypothesis.strategies as st # pylint:disable=import-error +import pytest # pylint:disable=import-error import zmake.modules import zmake.output_packers import zmake.project @@ -34,7 +33,9 @@ def test_find_dts_overlays(modules): with tempfile.TemporaryDirectory() as modpath: modpath = pathlib.Path(modpath) for board in boards: - dts_path = zmake.project.module_dts_overlay_name(modpath, board) + dts_path = zmake.project.module_dts_overlay_name( + modpath, board + ) dts_path.parent.mkdir(parents=True, exist_ok=True) dts_path.touch() setup_modules_and_dispatch( @@ -49,7 +50,9 @@ def test_find_dts_overlays(modules): board_file_mapping = {} for modpath, board_list in zip(module_paths, modules): for board in board_list: - file_name = zmake.project.module_dts_overlay_name(modpath, board) + file_name = zmake.project.module_dts_overlay_name( + modpath, board + ) files = board_file_mapping.get(board, set()) board_file_mapping[board] = files | {file_name} @@ -258,4 +261,6 @@ def test_kconfig_files(tmp_path, actual_files, config_files, expected_files): assert len(builds) == 1 _, config = builds[0] - assert sorted(f.name for f in config.kconfig_files) == sorted(expected_files) + assert sorted(f.name for f in config.kconfig_files) == sorted( + expected_files + ) diff --git a/zephyr/zmake/tests/test_reexec.py b/zephyr/zmake/tests/test_reexec.py index 5d7905cd8f..63aa76cb70 100644 --- a/zephyr/zmake/tests/test_reexec.py +++ b/zephyr/zmake/tests/test_reexec.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Test the zmake re-exec functionality.""" @@ -7,8 +7,7 @@ import os import sys import unittest.mock as mock -import pytest - +import pytest # pylint:disable=import-error import zmake.__main__ as main diff --git a/zephyr/zmake/tests/test_toolchains.py b/zephyr/zmake/tests/test_toolchains.py index 910a5faa78..ca40f482af 100644 --- a/zephyr/zmake/tests/test_toolchains.py +++ b/zephyr/zmake/tests/test_toolchains.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,8 +7,7 @@ import os import pathlib -import pytest - +import pytest # pylint:disable=import-error import zmake.output_packers import zmake.project as project import zmake.toolchains as toolchains @@ -138,9 +137,6 @@ def test_zephyr(fake_project: project.Project, zephyr_exists, no_environ): "ZEPHYR_TOOLCHAIN_VARIANT": "zephyr", "ZEPHYR_SDK_INSTALL_DIR": str(pathlib.Path("/opt/zephyr-sdk")), } - assert config.environ_defs == { - "ZEPHYR_SDK_INSTALL_DIR": str(pathlib.Path("/opt/zephyr-sdk")), - } def test_zephyr_from_env(mockfs, monkeypatch, fake_project): @@ -159,9 +155,6 @@ def test_zephyr_from_env(mockfs, monkeypatch, fake_project): "ZEPHYR_TOOLCHAIN_VARIANT": "zephyr", "ZEPHYR_SDK_INSTALL_DIR": str(zephyr_sdk_path), } - assert config.environ_defs == { - "ZEPHYR_SDK_INSTALL_DIR": str(zephyr_sdk_path), - } def test_host_toolchain(fake_project, host_toolchain_exists): @@ -197,9 +190,13 @@ def test_no_toolchains(fake_project: project.Project, mockfs, no_environ): fake_project.get_toolchain(module_paths) -def test_override_without_sdk(fake_project: project.Project, mockfs, no_environ): +def test_override_without_sdk( + fake_project: project.Project, mockfs, no_environ +): """Check for error override is set to zephyr, but it can't be found.""" chain = fake_project.get_toolchain(module_paths, override="zephyr") - with pytest.raises(RuntimeError, match=r"No installed Zephyr SDK was found"): + with pytest.raises( + RuntimeError, match=r"No installed Zephyr SDK was found" + ): chain.get_build_config() diff --git a/zephyr/zmake/tests/test_util.py b/zephyr/zmake/tests/test_util.py index 1ec0076162..c5efa2d18e 100644 --- a/zephyr/zmake/tests/test_util.py +++ b/zephyr/zmake/tests/test_util.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -7,10 +7,9 @@ import pathlib import tempfile -import hypothesis -import hypothesis.strategies as st -import pytest - +import hypothesis # pylint:disable=import-error +import hypothesis.strategies as st # pylint:disable=import-error +import pytest # pylint:disable=import-error import zmake.util as util # Strategies for use with hypothesis diff --git a/zephyr/zmake/tests/test_version.py b/zephyr/zmake/tests/test_version.py index 9e00473752..d6202c0d85 100644 --- a/zephyr/zmake/tests/test_version.py +++ b/zephyr/zmake/tests/test_version.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -8,8 +8,7 @@ import datetime import subprocess import unittest.mock as mock -import pytest - +import pytest # pylint: disable=import-error import zmake.output_packers import zmake.project import zmake.version as version @@ -40,7 +39,9 @@ def _git_commit(repo, message="message!"): "GIT_COMMITTER_EMAIL": "bitdiddle@example.org", "GIT_COMMITTER_DATE": "Tue, 30 Aug 2005 10:50:30 -0700", } - subprocess.run(["git", "-C", repo, "commit", "-m", message], check=True, env=env) + subprocess.run( + ["git", "-C", repo, "commit", "-m", message], check=True, env=env + ) def _setup_example_repos(tmp_path): @@ -95,7 +96,9 @@ def test_version_string(tmp_path): """Test a that version string is as expected.""" project, zephyr_base, modules = _setup_example_repos(tmp_path) assert ( - version.get_version_string(project, zephyr_base, modules) + version.get_version_string( + project.config.project_name, zephyr_base, modules + ) == "prj_v2.6.4-ec:b5991f,os:377d26,mod1:02fd7a" ) @@ -104,7 +107,9 @@ def test_version_string_static(tmp_path): """Test a that version string with no git hashes.""" project, zephyr_base, modules = _setup_example_repos(tmp_path) assert ( - version.get_version_string(project, zephyr_base, modules, static=True) + version.get_version_string( + project.config.project_name, zephyr_base, modules, static=True + ) == "prj_v2.6.0-STATIC" ) @@ -128,7 +133,7 @@ def fake_date(): HEADER_VERSION_STR = "trogdor_v2.6.1004-cmsis:0dead0,hal_stm32:0beef0,os:ad00da" EXPECTED_HEADER = ( - "/* This file is automatically generated by zmake */\n" + "/* This file is automatically generated by zmake_tests */\n" '#define VERSION "trogdor_v2.6.1004-cmsis:0dead0,hal_stm32:0beef0,os:ad00da"\n' '#define CROS_EC_VERSION32 "trogdor_v2.6.1004-cmsis:0dead0,"\n' '#define BUILDER "toukmond@pokey"\n' @@ -137,7 +142,7 @@ EXPECTED_HEADER = ( ) HEADER_VERSION_STR_STATIC = "trogdor_v2.6.0-STATIC" EXPECTED_HEADER_STATIC = ( - "/* This file is automatically generated by zmake */\n" + "/* This file is automatically generated by zmake_tests */\n" '#define VERSION "trogdor_v2.6.0-STATIC"\n' '#define CROS_EC_VERSION32 "trogdor_v2.6.0-STATIC"\n' '#define BUILDER "reproducible@build"\n' @@ -150,7 +155,7 @@ def test_header_gen(fake_user_hostname, fake_date, tmp_path): """Test generating the version header.""" # Test the simple case (static=False, no existing header). output_file = tmp_path / "ec_version.h" - version.write_version_header(HEADER_VERSION_STR, output_file) + version.write_version_header(HEADER_VERSION_STR, output_file, "zmake_tests") assert output_file.read_text() == EXPECTED_HEADER @@ -158,7 +163,9 @@ def test_header_gen_reproducible_build(tmp_path): """Test that reproducible builds produce the right header.""" # With static=True this time. output_file = tmp_path / "ec_version.h" - version.write_version_header(HEADER_VERSION_STR_STATIC, output_file, static=True) + version.write_version_header( + HEADER_VERSION_STR_STATIC, output_file, "zmake_tests", static=True + ) assert output_file.read_text() == EXPECTED_HEADER_STATIC @@ -168,27 +175,31 @@ def test_header_gen_exists_not_changed(fake_user_hostname, fake_date, tmp_path): output_file = tmp_path / "ec_version.h" # First time, write and record mtime. - version.write_version_header(HEADER_VERSION_STR, output_file) + version.write_version_header(HEADER_VERSION_STR, output_file, "zmake_tests") expected_mtime = output_file.stat().st_mtime # Do another write (contents should be unchanged). - version.write_version_header(HEADER_VERSION_STR, output_file) + version.write_version_header(HEADER_VERSION_STR, output_file, "zmake_tests") # Assert we didn't write again. assert output_file.stat().st_mtime == expected_mtime -def test_header_gen_exists_needs_changes(fake_user_hostname, fake_date, tmp_path): +def test_header_gen_exists_needs_changes( + fake_user_hostname, fake_date, tmp_path +): """Test that the version file is changed, when needed.""" # Test we overwrite when it exists already and changes are needed. output_file = tmp_path / "ec_version.h" # First time, write and save contents. - version.write_version_header(HEADER_VERSION_STR, output_file) + version.write_version_header(HEADER_VERSION_STR, output_file, "zmake_tests") original_contents = output_file.read_text() # Do another write (contents should be changed). - version.write_version_header(HEADER_VERSION_STR_STATIC, output_file, static=True) + version.write_version_header( + HEADER_VERSION_STR_STATIC, output_file, "zmake_tests", static=True + ) # Assert we overwrote. assert output_file.read_text() != original_contents diff --git a/zephyr/zmake/tests/test_zmake.py b/zephyr/zmake/tests/test_zmake.py index 4ca1d7f077..370e8d1bfa 100644 --- a/zephyr/zmake/tests/test_zmake.py +++ b/zephyr/zmake/tests/test_zmake.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -10,15 +10,14 @@ import pathlib import re import unittest.mock -import pytest -from testfixtures import LogCapture - +import pytest # pylint:disable=import-error import zmake.build_config import zmake.jobserver import zmake.multiproc as multiproc import zmake.output_packers import zmake.project import zmake.toolchains +from testfixtures import LogCapture # pylint:disable=import-error OUR_PATH = os.path.dirname(os.path.realpath(__file__)) @@ -75,8 +74,7 @@ class FakeJobserver(zmake.jobserver.GNUMakeJobServer): fnames: Dict of regexp to filename. If the regexp matches the command, then the filename will be returned as the output. """ - super().__init__() - self.jobserver = zmake.jobserver.GNUMakeJobServer(jobs=2) + super().__init__(jobs=2) self.fnames = fnames def get_job(self): @@ -88,14 +86,21 @@ class FakeJobserver(zmake.jobserver.GNUMakeJobServer): """Ignores the provided command and just runs 'cat' instead""" for pattern, filename in self.fnames.items(): # Convert to a list of strings - cmd = [isinstance(c, pathlib.PosixPath) and c.as_posix() or c for c in cmd] + cmd = [ + isinstance(c, pathlib.PosixPath) and c.as_posix() or c + for c in cmd + ] if pattern.match(" ".join(cmd)): new_cmd = ["cat", filename] break else: raise Exception('No pattern matched "%s"' % " ".join(cmd)) - kwargs.pop("env", None) - return self.jobserver.popen(new_cmd, *args, **kwargs) + kwargs["env"] = {} + return super().popen(new_cmd, *args, **kwargs) + + def env(self): + """Runs test commands with an empty environment for simpler logs.""" + return {} def get_test_filepath(suffix): @@ -168,7 +173,9 @@ class TestFilters: expected = { "Configuring fakeproject:rw.", "Configuring fakeproject:ro.", - "Building fakeproject in {}/ec/build/zephyr/fakeproject.".format(tmp_path), + "Building fakeproject in {}/ec/build/zephyr/fakeproject.".format( + tmp_path + ), "Building fakeproject:ro: /usr/bin/ninja -C {}-ro".format( tmp_path / "ec/build/zephyr/fakeproject/build" ), @@ -179,7 +186,9 @@ class TestFilters: for suffix in ["ro", "rw"]: with open(get_test_filepath("%s_INFO" % suffix)) as file: for line in file: - expected.add("[fakeproject:{}]{}".format(suffix, line.strip())) + expected.add( + "[fakeproject:{}]{}".format(suffix, line.strip()) + ) # This produces an easy-to-read diff if there is a difference assert expected == set(recs) @@ -192,20 +201,24 @@ class TestFilters: expected = { "Configuring fakeproject:rw.", "Configuring fakeproject:ro.", - "Building fakeproject in {}/ec/build/zephyr/fakeproject.".format(tmp_path), + "Building fakeproject in {}/ec/build/zephyr/fakeproject.".format( + tmp_path + ), "Building fakeproject:ro: /usr/bin/ninja -C {}-ro".format( tmp_path / "ec/build/zephyr/fakeproject/build" ), "Building fakeproject:rw: /usr/bin/ninja -C {}-rw".format( tmp_path / "ec/build/zephyr/fakeproject/build" ), - "Running cat {}/files/sample_ro.txt".format(OUR_PATH), - "Running cat {}/files/sample_rw.txt".format(OUR_PATH), + "Running `env -i cat {}/files/sample_ro.txt`".format(OUR_PATH), + "Running `env -i cat {}/files/sample_rw.txt`".format(OUR_PATH), } for suffix in ["ro", "rw"]: with open(get_test_filepath(suffix)) as file: for line in file: - expected.add("[fakeproject:{}]{}".format(suffix, line.strip())) + expected.add( + "[fakeproject:{}]{}".format(suffix, line.strip()) + ) # This produces an easy-to-read diff if there is a difference assert expected == set(recs) @@ -219,7 +232,9 @@ class TestFilters: ) dt_errs = [rec for rec in recs if "adc" in rec] - assert "devicetree error: 'adc' is marked as required" in list(dt_errs)[0] + assert ( + "devicetree error: 'adc' is marked as required" in list(dt_errs)[0] + ) @pytest.mark.parametrize( @@ -265,7 +280,7 @@ class TestFilters: ) def test_list_projects( project_names, fmt, search_dir, expected_output, capsys, zmake_from_dir -): # pylint: disable=too-many-arguments +): """Test listing projects with default directory.""" fake_projects = { name: zmake.project.Project( diff --git a/zephyr/zmake/zephyr_build_tools/__init__.py b/zephyr/zmake/zephyr_build_tools/__init__.py new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/zephyr/zmake/zephyr_build_tools/__init__.py diff --git a/zephyr/zmake/zephyr_build_tools/generate_ec_version.py b/zephyr/zmake/zephyr_build_tools/generate_ec_version.py new file mode 100755 index 0000000000..7d3a9450ee --- /dev/null +++ b/zephyr/zmake/zephyr_build_tools/generate_ec_version.py @@ -0,0 +1,169 @@ +#!/usr/bin/env python3 + +# Copyright 2022 The ChromiumOS Authors +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""Code to generate the ec_version.h file.""" + +import argparse +import logging +import os.path +import pathlib +import sys + +import zmake.version + + +def convert_module_list_to_dict(modules: list) -> dict: + """Convert a list of string paths to modules in to a dict of module + names to paths.""" + + if not modules: + return {} + + dict_out = {} + for mod in modules: + if not mod.is_dir(): + raise FileNotFoundError(f"Module '{mod}' not found") + + dict_out[mod.name] = mod + + return dict_out + + +def main(): + """CLI entry point for generating the ec_version.h header""" + logging.basicConfig(level=logging.INFO, stream=sys.stderr) + + parser = argparse.ArgumentParser() + + parser.add_argument("header_path", help="Path to write ec_version.h to") + parser.add_argument( + "-s", + "--static", + action="store_true", + help="If set, generate a header which does not include information " + "like the username, hostname, or date, allowing the build to be" + "reproducible.", + ) + parser.add_argument( + "--base", + default=os.environ.get("ZEPHYR_BASE"), + help="Path to Zephyr base directory. Uses ZEPHYR_BASE env var if unset.", + ) + parser.add_argument( + "-m", + "--module", + action="append", + help="Specify modules paths to include in version hash. Uses " + "ZEPHYR_MODULES env var if unset", + ) + parser.add_argument( + "-n", "--name", required=True, type=str, help="Project name" + ) + + args = parser.parse_args() + + if args.base is None: + logging.error( + "No Zephyr base is defined. Pass --base or set env var ZEPHYR_BASE" + ) + return 1 + + logging.info("Zephyr Base: %s", args.base) + + if args.static: + logging.info("Using a static version string") + + # Make a dict of modules from the list. Modules can be added one at a time + # by repeating the -m flag, or once as a semicolon-separated list. In the + # later case, we need to expand the modules list. + + if args.module is None: + # No modules specified on command line. Default to environment variable. + env_modules = os.environ.get("ZEPHYR_MODULES") + args.module = env_modules.split(";") if env_modules else [] + logging.info( + "No modules passed via CLI. Getting list from ZEPHYR_MODULES" + ) + + elif len(args.module) == 1: + # In case of a single -m flag, treat value as a semicolon-delimited + # list. + args.module = args.module[0].split(";") + + try: + module_dict = convert_module_list_to_dict( + map(pathlib.Path, args.module) + ) + except FileNotFoundError as err: + logging.error("Cannot find module: %s", str(err)) + return 1 + + logging.info("Including modules: [%s]", ", ".join(args.module)) + + # Generate the version string that gets inserted in to the header. Will get + # commit IDs from Git + ver = zmake.version.get_version_string( + args.name, args.base, module_dict, args.static + ) + logging.info("Version string: %s", ver) + + # Now write the actual header file or put version string in stdout + if args.header_path == "-": + print(ver) + else: + output_path = pathlib.Path(args.header_path) + output_path.parent.mkdir(parents=True, exist_ok=True) + + logging.info("Writing header to %s", args.header_path) + zmake.version.write_version_header( + ver, output_path, sys.argv[0], args.static + ) + + return 0 + + +def maybe_reexec(): + """Re-exec using the zmake package from the EC source tree, as + opposed to the system's copy of zmake. This is useful for + development when engineers need to make changes to zmake. This + script relies on the zmake package for version string generation + logic. + + Returns: + None, if the re-exec did not happen, or never returns if the + re-exec did happen. + """ + # We only re-exec if we are inside of a chroot (since if installed + # standalone using pip, there's already an "editable install" + # feature for that in pip.) + env = dict(os.environ) + srcroot = env.get("CROS_WORKON_SRCROOT") + if not srcroot: + return + + # If for some reason we decide to move zmake in the future, then + # we don't want to use the re-exec logic. + zmake_path = ( + pathlib.Path(srcroot) / "src" / "platform" / "ec" / "zephyr" / "zmake" + ).resolve() + if not zmake_path.is_dir(): + return + + # If PYTHONPATH is set, it is either because we just did a + # re-exec, or because the user wants to run a specific copy of + # zmake. In either case, we don't want to re-exec. + if "PYTHONPATH" in env: + return + + # Set PYTHONPATH so that we run zmake from source. + env["PYTHONPATH"] = str(zmake_path) + + os.execve(sys.argv[0], sys.argv, env) + + +if __name__ == "__main__": + maybe_reexec() + sys.exit(main()) diff --git a/zephyr/zmake/zmake/__main__.py b/zephyr/zmake/zmake/__main__.py index 23be20d54f..cc3b1708be 100644 --- a/zephyr/zmake/zmake/__main__.py +++ b/zephyr/zmake/zmake/__main__.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -204,9 +204,11 @@ def get_argparser(): help="Optional directory to search for BUILD.py files in.", ) + # TODO(b/b/242563072): Remove stub support for test and testall entirely after users have gotten + # used to twister. test = sub.add_parser( "test", - help="Configure, build and run tests on specified projects", + help="Configure, build and run tests on specified projects; DEPRECATED", ) test.add_argument( "--no-rebuild", @@ -217,7 +219,7 @@ def get_argparser(): testall = sub.add_parser( "testall", - help="Alias for test --all", + help="Alias for test --all; DEPRECATED", ) testall.add_argument( "--clobber", @@ -225,7 +227,15 @@ def get_argparser(): dest="clobber", help="Delete existing build directories, even if configuration is unchanged", ) - testall.add_argument("-B", "--build-dir", type=pathlib.Path, help="Build directory") + testall.add_argument( + "-B", "--build-dir", type=pathlib.Path, help="Build directory" + ) + testall.add_argument( + "--static", + action="store_true", + dest="static_version", + help="Generate static version information for reproducible builds", + ) generate_readme = sub.add_parser( "generate-readme", @@ -251,7 +261,9 @@ def get_argparser(): def add_common_configure_args(sub_parser: argparse.ArgumentParser): """Adds common arguments used by configure-like subcommands.""" - sub_parser.add_argument("-t", "--toolchain", help="Name of toolchain to use") + sub_parser.add_argument( + "-t", "--toolchain", help="Name of toolchain to use" + ) sub_parser.add_argument( "--bringup", action="store_true", @@ -265,6 +277,18 @@ def add_common_configure_args(sub_parser: argparse.ArgumentParser): help="Delete existing build directories, even if configuration is unchanged", ) sub_parser.add_argument( + "--static", + action="store_true", + dest="static_version", + help="Generate static version information for reproducible builds", + ) + sub_parser.add_argument( + "--save-temps", + action="store_true", + dest="save_temps", + help="Save the temporary files containing preprocessor output", + ) + sub_parser.add_argument( "--allow-warnings", action="store_true", default=False, @@ -288,6 +312,12 @@ def add_common_configure_args(sub_parser: argparse.ArgumentParser): "--extra-cflags", help="Additional CFLAGS to use for target builds", ) + sub_parser.add_argument( + "--delete-intermediates", + action="store_true", + dest="delete_intermediates", + help="Delete intermediate files to save disk space", + ) group = sub_parser.add_mutually_exclusive_group(required=True) group.add_argument( "-a", @@ -297,12 +327,6 @@ def add_common_configure_args(sub_parser: argparse.ArgumentParser): help="Select all projects", ) group.add_argument( - "--host-tests-only", - action="store_true", - dest="host_tests_only", - help="Select all test projects", - ) - group.add_argument( "project_names", nargs="*", metavar="project_name", diff --git a/zephyr/zmake/zmake/build_config.py b/zephyr/zmake/zmake/build_config.py index 0d03e22a45..24e877dd89 100644 --- a/zephyr/zmake/zmake/build_config.py +++ b/zephyr/zmake/zmake/build_config.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Encapsulation of a build configuration.""" @@ -14,14 +14,16 @@ import zmake.util as util class BuildConfig: """A container for build configurations. - A build config is a tuple of environment variables, cmake - variables, kconfig definitons, and kconfig files. + A build config is a tuple of cmake variables, kconfig definitions, + and kconfig files. """ def __init__( - self, environ_defs=None, cmake_defs=None, kconfig_defs=None, kconfig_files=None + self, + cmake_defs=None, + kconfig_defs=None, + kconfig_files=None, ): - self.environ_defs = dict(environ_defs or {}) self.cmake_defs = dict(cmake_defs or {}) self.kconfig_defs = dict(kconfig_defs or {}) @@ -63,19 +65,18 @@ class BuildConfig: ) if kconfig_files: - base_config = BuildConfig( - environ_defs=self.environ_defs, cmake_defs=self.cmake_defs - ) + base_config = BuildConfig(cmake_defs=self.cmake_defs) conf_file_config = BuildConfig( cmake_defs={ - "CONF_FILE": ";".join(str(p.resolve()) for p in kconfig_files) + "CONF_FILE": ";".join( + str(p.resolve()) for p in kconfig_files + ) } ) return (base_config | conf_file_config).popen_cmake( jobclient, project_dir, build_dir, **kwargs ) - kwargs["env"] = dict(**kwargs.get("env", {}), **self.environ_defs) return jobclient.popen( [ "/usr/bin/cmake", @@ -93,11 +94,12 @@ class BuildConfig: """Combine two BuildConfig instances.""" if not isinstance(other, BuildConfig): raise TypeError( - "Unsupported operation | for {} and {}".format(type(self), type(other)) + "Unsupported operation | for {} and {}".format( + type(self), type(other) + ) ) return BuildConfig( - environ_defs=dict(**self.environ_defs, **other.environ_defs), cmake_defs=dict(**self.cmake_defs, **other.cmake_defs), kconfig_defs=dict(**self.kconfig_defs, **other.kconfig_defs), kconfig_files=[*self.kconfig_files, *other.kconfig_files], @@ -108,7 +110,6 @@ class BuildConfig: ", ".join( "{}={!r}".format(name, getattr(self, name)) for name in [ - "environ_defs", "cmake_defs", "kconfig_defs", "kconfig_files", @@ -150,7 +151,6 @@ class BuildConfig: """Provide a stable JSON representation of the build config.""" return json.dumps( { - "environ_defs": self.environ_defs, "cmake_defs": self.cmake_defs, "kconfig_defs": self.kconfig_defs, "kconfig_files": [str(p.resolve()) for p in self.kconfig_files], diff --git a/zephyr/zmake/zmake/configlib.py b/zephyr/zmake/zmake/configlib.py index 2baa20523b..139394745f 100644 --- a/zephyr/zmake/zmake/configlib.py +++ b/zephyr/zmake/zmake/configlib.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -11,7 +11,9 @@ def _register_project(**kwargs): kwargs.setdefault( "project_dir", here # noqa: F821 pylint: disable=undefined-variable ) - return register_project(**kwargs) # noqa: F821 pylint: disable=undefined-variable + return register_project( + **kwargs + ) # noqa: F821 pylint: disable=undefined-variable def register_host_project(**kwargs): @@ -25,7 +27,9 @@ def register_host_project(**kwargs): def register_host_test(test_name, **kwargs): """Register a test project that runs on the host.""" kwargs.setdefault("is_test", True) - return register_host_project(project_name="test-{}".format(test_name), **kwargs) + return register_host_project( + project_name="test-{}".format(test_name), **kwargs + ) def register_raw_project(**kwargs): diff --git a/zephyr/zmake/zmake/generate_readme.py b/zephyr/zmake/zmake/generate_readme.py index 9008f0f45d..f309a104ba 100644 --- a/zephyr/zmake/zmake/generate_readme.py +++ b/zephyr/zmake/zmake/generate_readme.py @@ -1,4 +1,4 @@ -# Copyright 2022 The Chromium OS Authors. All rights reserved. +# Copyright 2022 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -53,7 +53,9 @@ class MarkdownHelpFormatter(argparse.HelpFormatter): if action.nargs == 0: parts.append(option_string) else: - parts.append(f"{option_string} {_get_metavar(action).upper()}") + parts.append( + f"{option_string} {_get_metavar(action).upper()}" + ) return ", ".join(f"`{part}`" for part in parts) return f"`{_get_metavar(action)}`" @@ -103,7 +105,9 @@ def generate_readme(): _append("# Zmake") _append() - _append('<!-- Auto-generated contents! Run "zmake generate-readme" to update. -->') + _append( + '<!-- Auto-generated contents! Run "zmake generate-readme" to update. -->' + ) _append() _append("[TOC]") _append() diff --git a/zephyr/zmake/zmake/jobserver.py b/zephyr/zmake/zmake/jobserver.py index 16f856e607..a3d6287da2 100644 --- a/zephyr/zmake/zmake/jobserver.py +++ b/zephyr/zmake/zmake/jobserver.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Module for job counters, limiting the amount of concurrent executions.""" @@ -8,6 +8,7 @@ import multiprocessing import os import re import select +import shlex import subprocess import zmake @@ -48,11 +49,19 @@ class JobClient: Returns: A Popen object. """ - kwargs.setdefault("env", os.environ) + # By default, we scrub the environment for all commands we run, setting + # the bare minimum (PATH only). This prevents us from building obscure + # dependencies on the environment variables. + kwargs.setdefault("env", {"PATH": "/bin:/usr/bin"}) kwargs["env"].update(self.env()) logger = logging.getLogger(self.__class__.__name__) - logger.debug("Running %s", zmake.util.repr_command(argv)) + logger.debug( + "Running `env -i %s%s%s`", + " ".join(f"{k}={shlex.quote(v)}" for k, v in kwargs["env"].items()), + " " if kwargs["env"] else "", + zmake.util.repr_command(argv), + ) return subprocess.Popen(argv, **kwargs) diff --git a/zephyr/zmake/zmake/modules.py b/zephyr/zmake/zmake/modules.py index 91f0dd50b9..a2b77342c7 100644 --- a/zephyr/zmake/zmake/modules.py +++ b/zephyr/zmake/zmake/modules.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Registry of known Zephyr modules.""" diff --git a/zephyr/zmake/zmake/multiproc.py b/zephyr/zmake/zmake/multiproc.py index 7d9a88de5a..0838f5f1f8 100644 --- a/zephyr/zmake/zmake/multiproc.py +++ b/zephyr/zmake/zmake/multiproc.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -56,7 +56,7 @@ class LogWriter: """Reset this module to its starting state (useful for tests)""" LogWriter._logging_map.clear() - def __init__( # pylint: disable=too-many-arguments + def __init__( self, logger, log_level, @@ -202,7 +202,7 @@ class LogWriter: LogWriter._log_fd(file) @classmethod - def log_output( # pylint: disable=too-many-arguments + def log_output( cls, logger, log_level, @@ -297,7 +297,9 @@ class Executor: exception. """ with self.lock: - thread = threading.Thread(target=lambda: self._run_fn(func), daemon=True) + thread = threading.Thread( + target=lambda: self._run_fn(func), daemon=True + ) thread.start() self.threads.append(thread) diff --git a/zephyr/zmake/zmake/output_packers.py b/zephyr/zmake/zmake/output_packers.py index 78ee7649e6..d2203fa7b4 100644 --- a/zephyr/zmake/zmake/output_packers.py +++ b/zephyr/zmake/zmake/output_packers.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Types which provide many builds and composite them into a single binary.""" @@ -85,8 +85,10 @@ class BasePacker: Returns: The file if it passes the test. """ - max_size = self._get_max_image_bytes( # pylint: disable=assignment-from-none - dir_map + max_size = ( + self._get_max_image_bytes( # pylint: disable=assignment-from-none + dir_map + ) ) if max_size is None or file.stat().st_size <= max_size: return file @@ -106,7 +108,7 @@ class RawBinPacker(BasePacker): def pack_firmware(self, work_dir, jobclient, dir_map, version_string=""): del version_string - yield dir_map["singleimage"] / "zephyr" / "zephyr.bin", "zephyr.bin" + yield dir_map["singleimage"] / "zephyr" / "zephyr.bin", "ec.bin" class BinmanPacker(BasePacker): @@ -120,11 +122,19 @@ class BinmanPacker(BasePacker): super().__init__(project) def configs(self): - yield "ro", build_config.BuildConfig(kconfig_defs={"CONFIG_CROS_EC_RO": "y"}) - yield "rw", build_config.BuildConfig(kconfig_defs={"CONFIG_CROS_EC_RW": "y"}) + yield "ro", build_config.BuildConfig( + kconfig_defs={"CONFIG_CROS_EC_RO": "y"} + ) + yield "rw", build_config.BuildConfig( + kconfig_defs={"CONFIG_CROS_EC_RW": "y"} + ) def pack_firmware( - self, work_dir, jobclient: zmake.jobserver.JobClient, dir_map, version_string="" + self, + work_dir, + jobclient: zmake.jobserver.JobClient, + dir_map, + version_string="", ): """Pack RO and RW sections using Binman. @@ -148,8 +158,12 @@ class BinmanPacker(BasePacker): # Copy the inputs into the work directory so that Binman can # find them under a hard-coded name. - shutil.copy2(ro_dir / "zephyr" / self.ro_file, work_dir / "zephyr_ro.bin") - shutil.copy2(rw_dir / "zephyr" / self.rw_file, work_dir / "zephyr_rw.bin") + shutil.copy2( + ro_dir / "zephyr" / self.ro_file, work_dir / "zephyr_ro.bin" + ) + shutil.copy2( + rw_dir / "zephyr" / self.rw_file, work_dir / "zephyr_rw.bin" + ) # Version in FRID/FWID can be at most 31 bytes long (32, minus # one for null character). @@ -176,12 +190,16 @@ class BinmanPacker(BasePacker): encoding="utf-8", ) - zmake.multiproc.LogWriter.log_output(self.logger, logging.DEBUG, proc.stdout) - zmake.multiproc.LogWriter.log_output(self.logger, logging.ERROR, proc.stderr) + zmake.multiproc.LogWriter.log_output( + self.logger, logging.DEBUG, proc.stdout + ) + zmake.multiproc.LogWriter.log_output( + self.logger, logging.ERROR, proc.stderr + ) if proc.wait(timeout=60): raise OSError("Failed to run binman") - yield work_dir / "zephyr.bin", "zephyr.bin" + yield work_dir / "ec.bin", "ec.bin" yield ro_dir / "zephyr" / "zephyr.elf", "zephyr.ro.elf" yield rw_dir / "zephyr" / "zephyr.elf", "zephyr.rw.elf" @@ -220,10 +238,10 @@ class NpcxPacker(BinmanPacker): dir_map, version_string=version_string, ): - if output_file == "zephyr.bin": + if output_file == "ec.bin": yield ( self._check_packed_file_size(path, dir_map), - "zephyr.bin", + "ec.bin", ) else: yield path, output_file diff --git a/zephyr/zmake/zmake/project.py b/zephyr/zmake/zmake/project.py index 42d1258cb5..a707da2462 100644 --- a/zephyr/zmake/zmake/project.py +++ b/zephyr/zmake/zmake/project.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Module for project config wrapper object.""" @@ -25,7 +25,13 @@ def module_dts_overlay_name(modpath, board_name): Returns: A pathlib.Path object to the expected overlay path. """ - return modpath / "zephyr" / "dts" / "board-overlays" / "{}.dts".format(board_name) + return ( + modpath + / "zephyr" + / "dts" + / "board-overlays" + / "{}.dts".format(board_name) + ) @dataclasses.dataclass @@ -43,7 +49,9 @@ class ProjectConfig: is_test: bool = dataclasses.field(default=False) test_args: typing.List[str] = dataclasses.field(default_factory=list) dts_overlays: "list[str]" = dataclasses.field(default_factory=list) - kconfig_files: "list[pathlib.Path]" = dataclasses.field(default_factory=list) + kconfig_files: "list[pathlib.Path]" = dataclasses.field( + default_factory=list + ) project_dir: pathlib.Path = dataclasses.field(default_factory=pathlib.Path) test_timeout_secs: float = dataclasses.field(default=2 * 60) @@ -53,7 +61,9 @@ class Project: def __init__(self, config: ProjectConfig): self.config = config - self.packer: zmake.output_packers.BasePacker = self.config.output_packer(self) + self.packer: zmake.output_packers.BasePacker = ( + self.config.output_packer(self) + ) def iter_builds(self): """Iterate thru the build combinations provided by the project's packer. @@ -61,7 +71,9 @@ class Project: Yields: 2-tuples of a build configuration name and a BuildConfig. """ - conf = build_config.BuildConfig(cmake_defs={"BOARD": self.config.zephyr_board}) + conf = build_config.BuildConfig( + cmake_defs={"BOARD": self.config.zephyr_board} + ) kconfig_files = [] prj_conf = self.config.project_dir / "prj.conf" @@ -85,7 +97,9 @@ class Project: """ overlays = [] for module_path in modules.values(): - dts_path = module_dts_overlay_name(module_path, self.config.zephyr_board) + dts_path = module_dts_overlay_name( + module_path, self.config.zephyr_board + ) if dts_path.is_file(): overlays.append(dts_path.resolve()) @@ -148,7 +162,9 @@ class Project: support_class = toolchains.support_classes[name] toolchain = support_class(name=name, modules=module_paths) if toolchain.probe(): - logging.info("Toolchain %r selected by probe function.", toolchain) + logging.info( + "Toolchain %r selected by probe function.", toolchain + ) return toolchain raise OSError( "No supported toolchains could be found on your system. If you see " diff --git a/zephyr/zmake/zmake/toolchains.py b/zephyr/zmake/zmake/toolchains.py index 8ed1112e25..39a4bf707b 100644 --- a/zephyr/zmake/zmake/toolchains.py +++ b/zephyr/zmake/zmake/toolchains.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Definitions of toolchain variables.""" @@ -122,10 +122,7 @@ class ZephyrToolchain(GenericToolchain): "ZEPHYR_SDK_INSTALL_DIR": str(self.zephyr_sdk_install_dir), } return ( - build_config.BuildConfig( - environ_defs=tc_vars, - cmake_defs=tc_vars, - ) + build_config.BuildConfig(cmake_defs=tc_vars) | super().get_build_config() ) diff --git a/zephyr/zmake/zmake/util.py b/zephyr/zmake/zmake/util.py index 22d45d7deb..e0e0ff98b1 100644 --- a/zephyr/zmake/zmake/util.py +++ b/zephyr/zmake/zmake/util.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. """Common miscellaneous utility functions for zmake.""" diff --git a/zephyr/zmake/zmake/version.py b/zephyr/zmake/zmake/version.py index 5ac060f23b..ee857db209 100644 --- a/zephyr/zmake/zmake/version.py +++ b/zephyr/zmake/zmake/version.py @@ -1,4 +1,4 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Copyright 2021 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -80,7 +80,7 @@ def get_version_string(project, zephyr_base, modules, static=False): """Get the version string associated with a build. Args: - project: a zmake.project.Project object + project: a string project name zephyr_base: the path to the zephyr directory modules: a dictionary mapping module names to module paths static: if set, create a version string not dependent on git @@ -117,7 +117,7 @@ def get_version_string(project, zephyr_base, modules, static=False): ) return "{}_v{}.{}.{}-{}".format( - project.config.project_name, + project, major_version, minor_version, num_commits, @@ -125,7 +125,7 @@ def get_version_string(project, zephyr_base, modules, static=False): ) -def write_version_header(version_str, output_path, static=False): +def write_version_header(version_str, output_path, tool, static=False): """Generate a version header and write it to the specified path. Generate a version header in the format expected by the EC build @@ -139,12 +139,15 @@ def write_version_header(version_str, output_path, static=False): as one generated by get_version_string. output_path: The file path to write at (a pathlib.Path object). + tool: Name of the tool that is invoking this function ("zmake", + "generate_ec_version.py", etc). Included in a comment in the + header. static: If true, generate a header which does not include information like the username, hostname, or date, allowing the build to be reproducible. """ output = io.StringIO() - output.write("/* This file is automatically generated by zmake */\n") + output.write(f"/* This file is automatically generated by {tool} */\n") def add_def(name, value): output.write("#define {} {}\n".format(name, util.c_str(value))) diff --git a/zephyr/zmake/zmake/zmake.py b/zephyr/zmake/zmake/zmake.py index d4af57a738..b7a81a3b9b 100644 --- a/zephyr/zmake/zmake/zmake.py +++ b/zephyr/zmake/zmake/zmake.py @@ -1,4 +1,4 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Copyright 2020 The ChromiumOS Authors # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. @@ -11,7 +11,6 @@ import pathlib import re import shutil import subprocess -import uuid from typing import Dict, Optional, Set, Union import zmake.build_config @@ -153,7 +152,7 @@ class Zmake: # pylint: disable=too-many-instance-attributes - def __init__( # pylint: disable=too-many-arguments + def __init__( self, checkout=None, jobserver: Optional[zmake.jobserver.JobClient] = None, @@ -171,12 +170,16 @@ class Zmake: if zephyr_base: self.zephyr_base = zephyr_base else: - self.zephyr_base = self.checkout / "src" / "third_party" / "zephyr" / "main" + self.zephyr_base = ( + self.checkout / "src" / "third_party" / "zephyr" / "main" + ) if modules_dir: self.module_paths = zmake.modules.locate_from_directory(modules_dir) else: - self.module_paths = zmake.modules.locate_from_checkout(self.checkout) + self.module_paths = zmake.modules.locate_from_checkout( + self.checkout + ) if jobserver: self.jobserver = jobserver @@ -198,40 +201,45 @@ class Zmake: return self._checkout.resolve() def _resolve_projects( - self, project_names, all_projects=False, host_tests_only=False + self, + project_names, + all_projects=False, ) -> Set[zmake.project.Project]: """Finds all projects for the specified command line flags. Returns a list of projects. """ - found_projects = zmake.project.find_projects(self.module_paths["ec"] / "zephyr") + found_projects = zmake.project.find_projects( + self.module_paths["ec"] / "zephyr" + ) if all_projects: projects = set(found_projects.values()) - elif host_tests_only: - projects = {p for p in found_projects.values() if p.config.is_test} else: projects = set() for project_name in project_names: try: projects.add(found_projects[project_name]) except KeyError as e: - raise KeyError("No project named {}".format(project_name)) from e + raise KeyError( + "No project named {}".format(project_name) + ) from e return projects - def configure( # pylint: disable=too-many-arguments,too-many-locals + def configure( self, project_names, build_dir=None, toolchain=None, build_after_configure=False, - test_after_configure=False, clobber=False, bringup=False, coverage=False, allow_warnings=False, all_projects=False, - host_tests_only=False, extra_cflags=None, + delete_intermediates=False, + static_version=False, + save_temps=False, ): """Locate and configure the specified projects.""" # Resolve build_dir if needed. @@ -241,10 +249,11 @@ class Zmake: projects = self._resolve_projects( project_names, all_projects=all_projects, - host_tests_only=host_tests_only, ) for project in projects: - project_build_dir = pathlib.Path(build_dir) / project.config.project_name + project_build_dir = ( + pathlib.Path(build_dir) / project.config.project_name + ) self.executor.append( func=functools.partial( self._configure, @@ -252,13 +261,15 @@ class Zmake: build_dir=project_build_dir, toolchain=toolchain, build_after_configure=build_after_configure, - test_after_configure=test_after_configure, clobber=clobber, bringup=bringup, coverage=coverage, allow_warnings=allow_warnings, extra_cflags=extra_cflags, multiproject=len(projects) > 1, + delete_intermediates=delete_intermediates, + static_version=static_version, + save_temps=save_temps, ) ) if self._sequential: @@ -268,16 +279,6 @@ class Zmake: result = self.executor.wait() if result: return result - test_projects = [p for p in projects if p.config.is_test] - if len(test_projects) > 1 and coverage and test_after_configure: - result = self._merge_lcov_files( - projects=test_projects, - build_dir=build_dir, - output_file=build_dir / "all_tests.info", - ) - if result: - self.failed_projects.append(str(build_dir / "all_tests.info")) - return result non_test_projects = [p for p in projects if not p.config.is_test] if len(non_test_projects) > 1 and coverage and build_after_configure: result = self._merge_lcov_files( @@ -290,7 +291,7 @@ class Zmake: return result return 0 - def build( # pylint: disable=too-many-arguments + def build( self, project_names, build_dir=None, @@ -300,8 +301,10 @@ class Zmake: coverage=False, allow_warnings=False, all_projects=False, - host_tests_only=False, extra_cflags=None, + delete_intermediates=False, + static_version=False, + save_temps=False, ): """Locate and build the specified projects.""" return self.configure( @@ -313,133 +316,57 @@ class Zmake: coverage=coverage, allow_warnings=allow_warnings, all_projects=all_projects, - host_tests_only=host_tests_only, extra_cflags=extra_cflags, build_after_configure=True, + delete_intermediates=delete_intermediates, + static_version=static_version, + save_temps=save_temps, ) - def test( # pylint: disable=too-many-arguments,too-many-locals + def test( # pylint: disable=unused-argument self, project_names, - build_dir=None, - toolchain=None, - clobber=False, - bringup=False, - coverage=False, - allow_warnings=False, - all_projects=False, - host_tests_only=False, - extra_cflags=None, - no_rebuild=False, ): - """Locate and build the specified projects.""" - if not no_rebuild: - return self.configure( - project_names, - build_dir=build_dir, - toolchain=toolchain, - clobber=clobber, - bringup=bringup, - coverage=coverage, - allow_warnings=allow_warnings, - all_projects=all_projects, - host_tests_only=host_tests_only, - extra_cflags=extra_cflags, - test_after_configure=True, - ) - # Resolve build_dir if needed. - if not build_dir: - build_dir = self.module_paths["ec"] / "build" / "zephyr" + """Build and run tests for the specified projects. - projects = self._resolve_projects( - project_names, - all_projects=all_projects, - host_tests_only=host_tests_only, + Using zmake to run tests is no longer supported. Use twister. + """ + self.logger.error( + "zmake test is deprecated. Use twister -T zephyr/test/<test_dir>." ) - test_projects = [p for p in projects if p.config.is_test] - for project in test_projects: - project_build_dir = pathlib.Path(build_dir) / project.config.project_name - gcov = "gcov.sh-not-found" - for build_name, _ in project.iter_builds(): - target_build_dir = project_build_dir / "build-{}".format(build_name) - gcov = target_build_dir / "gcov.sh" - self.executor.append( - func=functools.partial( - self._run_test, - project=project, - coverage=coverage, - gcov=gcov, - build_dir=project_build_dir, - lcov_file=project_build_dir / "output" / "zephyr.info", - timeout=project.config.test_timeout_secs, - ) - ) - if self._sequential: - result = self.executor.wait() - if result: - return result - result = self.executor.wait() - if result: - return result - if len(test_projects) > 1 and coverage: - result = self._merge_lcov_files( - projects=test_projects, - build_dir=build_dir, - output_file=build_dir / "all_tests.info", - ) - if result: - self.failed_projects.append(str(build_dir / "all_tests.info")) - return result + return 0 - def testall( # pylint: disable=too-many-arguments + def testall( self, - build_dir=None, - toolchain=None, - clobber=False, - bringup=False, - coverage=False, - allow_warnings=False, ): - """Locate and build all the projects.""" - return self.test( - [], - build_dir=build_dir, - toolchain=toolchain, - clobber=clobber, - bringup=bringup, - coverage=coverage, - allow_warnings=allow_warnings, - all_projects=True, + """Build and run tests for all projects. + + Using zmake to run tests is no longer supported. Use twister. + """ + self.logger.error( + "zmake testall is deprecated. To build all packages, use zmake build -a." ) + return self.test([]) def _configure( self, project, - build_dir=None, + build_dir: pathlib.Path, toolchain=None, build_after_configure=False, - test_after_configure=False, clobber=False, bringup=False, coverage=False, allow_warnings=False, extra_cflags=None, multiproject=False, + delete_intermediates=False, + static_version=False, + save_temps=False, ): - # pylint: disable=too-many-arguments,too-many-locals,too-many-branches - # pylint: disable=too-many-statements """Set up a build directory to later be built by "zmake build".""" try: - # Resolve build_dir if needed. - if not build_dir: - build_dir = ( - self.module_paths["ec"] - / "build" - / "zephyr" - / project.config.project_name - ) - # Clobber build directory if requested. if clobber and build_dir.exists(): self.logger.info( @@ -449,14 +376,34 @@ class Zmake: generated_include_dir = (build_dir / "include").resolve() base_config = zmake.build_config.BuildConfig( - environ_defs={"ZEPHYR_BASE": str(self.zephyr_base), "PATH": "/usr/bin"}, cmake_defs={ "CMAKE_EXPORT_COMPILE_COMMANDS": "ON", "DTS_ROOT": str(self.module_paths["ec"] / "zephyr"), "SYSCALL_INCLUDE_DIRS": str( - self.module_paths["ec"] / "zephyr" / "include" / "drivers" + self.module_paths["ec"] + / "zephyr" + / "include" + / "drivers" ), + "USER_CACHE_DIR": str( + self.module_paths["ec"] + / "build" + / "zephyr" + / "user-cache" + ), + "ZEPHYR_BASE": str(self.zephyr_base), "ZMAKE_INCLUDE_DIR": str(generated_include_dir), + "ZMAKE_PROJECT_NAME": project.config.project_name, + **( + {"EXTRA_EC_VERSION_FLAGS": "--static"} + if static_version + else {} + ), + **( + {"EXTRA_CFLAGS": "-save-temps=obj"} + if save_temps + else {} + ), }, ) @@ -473,7 +420,9 @@ class Zmake: dts_overlay_config = project.find_dts_overlays(module_paths) - toolchain_support = project.get_toolchain(module_paths, override=toolchain) + toolchain_support = project.get_toolchain( + module_paths, override=toolchain + ) toolchain_config = toolchain_support.get_build_config() if bringup: @@ -501,7 +450,7 @@ class Zmake: ) if not build_dir.exists(): - build_dir = build_dir.mkdir() + build_dir.mkdir() if not generated_include_dir.exists(): generated_include_dir.mkdir() processes = [] @@ -542,7 +491,9 @@ class Zmake: shutil.rmtree(output_dir) self.logger.info( - "Configuring %s:%s.", project.config.project_name, build_name + "Configuring %s:%s.", + project.config.project_name, + build_name, ) kconfig_file = build_dir / "kconfig-{}.conf".format(build_name) @@ -586,51 +537,50 @@ class Zmake: # To reconstruct a Project object later, we need to know the # name and project directory. - (build_dir / "project_name.txt").write_text(project.config.project_name) - util.update_symlink(project.config.project_dir, build_dir / "project") + (build_dir / "project_name.txt").write_text( + project.config.project_name + ) + util.update_symlink( + project.config.project_dir, build_dir / "project" + ) output_files = [] - if build_after_configure or test_after_configure: + if build_after_configure: result = self._build( build_dir=build_dir, project=project, coverage=coverage, output_files_out=output_files, multiproject=multiproject, + static_version=static_version, ) if result: self.failed_projects.append(project.config.project_name) return result - if test_after_configure and project.config.is_test: - gcov = "gcov.sh-not-found" - for build_name, _ in project.iter_builds(): - target_build_dir = build_dir / "build-{}".format(build_name) - gcov = target_build_dir / "gcov.sh" - self.executor.append( - func=functools.partial( - self._run_test, - project=project, - coverage=coverage, - gcov=gcov, - build_dir=build_dir, - lcov_file=build_dir / "output" / "zephyr.info", - timeout=project.config.test_timeout_secs, - ) - ) + + if delete_intermediates: + outdir = build_dir / "output" + for child in build_dir.iterdir(): + if child != outdir: + logging.debug("Deleting %s", child) + if not child.is_symlink() and child.is_dir(): + shutil.rmtree(child) + else: + child.unlink() return 0 except Exception: self.failed_projects.append(project.config.project_name) raise - def _build( # pylint: disable=too-many-arguments + def _build( self, build_dir, project: zmake.project.Project, output_files_out=None, coverage=False, multiproject=False, + static_version=False, ): - # pylint: disable=too-many-locals,too-many-branches """Build a pre-configured build directory.""" def wait_and_check_success(procs, writers): @@ -669,9 +619,10 @@ class Zmake: # Compute the version string. version_string = zmake.version.get_version_string( - project, + project.config.project_name, build_dir / "zephyr_base", zmake.modules.locate_from_directory(build_dir / "modules"), + static=static_version, ) # The version header needs to generated during the build phase @@ -680,6 +631,8 @@ class Zmake: zmake.version.write_version_header( version_string, build_dir / "include" / "ec_version.h", + "zmake", + static=static_version, ) gcov = "gcov.sh-not-found" @@ -708,10 +661,15 @@ class Zmake: stderr=subprocess.PIPE, encoding="utf-8", errors="replace", + # TODO(b/239619222): Filter os.environ for ninja. + env=os.environ, ) job_id = "{}:{}".format(project.config.project_name, build_name) dirs[build_name].mkdir(parents=True, exist_ok=True) - build_log = open(dirs[build_name] / "build.log", "w") + build_log = open( # pylint:disable=consider-using-with + dirs[build_name] / "build.log", + "w", + ) out = zmake.multiproc.LogWriter.log_output( logger=self.logger, log_level=logging.INFO, @@ -751,11 +709,17 @@ class Zmake: if coverage and not project.config.is_test: with self.jobserver.get_job(): self._run_lcov( - build_dir, output_dir / "zephyr.info", initial=True, gcov=gcov + build_dir, + output_dir / "zephyr.info", + initial=True, + gcov=gcov, ) else: for output_file, output_name in project.packer.pack_firmware( - packer_work_dir, self.jobserver, dirs, version_string=version_string + packer_work_dir, + self.jobserver, + dirs, + version_string=version_string, ): shutil.copy2(output_file, output_dir / output_name) self.logger.debug("Output file '%s' created.", output_file) @@ -763,86 +727,12 @@ class Zmake: return 0 - def _run_test( # pylint: disable=too-many-arguments + def _run_lcov( self, - project: zmake.project.Project, - coverage, - gcov, build_dir, lcov_file, - timeout=None, - ): - """Run a single test, with goma if enabled. - - Args: - project: The project to run the test from. - coverage: True if coverage is enabled. - gcov: Path to the gcov binary. - build_dir: Path to the build directory - lcov_file: Output path for the generated lcov file. - """ - - try: - cmd = [] - if self.goma: - cmd.append(self.gomacc) - - elf_file = build_dir / "output" / "zephyr.elf" - cmd.append(elf_file) - - execution_tmp_dir = build_dir / "tmp" / str(uuid.uuid4()) - execution_tmp_dir.mkdir(parents=True, exist_ok=True) - for arg in project.config.test_args: - cmd.append(arg.format(test_temp_dir=execution_tmp_dir)) - - def _run(): - self.logger.info("Running tests in %s.", elf_file) - proc = self.jobserver.popen( - cmd, - cwd=elf_file.parent, - stdin=subprocess.DEVNULL, - stdout=subprocess.PIPE, - stderr=subprocess.PIPE, - encoding="utf-8", - errors="replace", - ) - job_id = "test {}".format(elf_file) - zmake.multiproc.LogWriter.log_output( - self.logger, - logging.DEBUG, - proc.stdout, - job_id=job_id, - ) - zmake.multiproc.LogWriter.log_output( - self.logger, - logging.ERROR, - proc.stderr, - job_id=job_id, - ) - try: - if proc.wait(timeout=timeout): - raise OSError(get_process_failure_msg(proc)) - if coverage: - self._run_lcov(build_dir, lcov_file, initial=False, gcov=gcov) - except subprocess.TimeoutExpired as e: - proc.terminate() - try: - proc.wait(timeout=1) - except subprocess.TimeoutExpired: - proc.kill() - raise e - - if self.goma: - _run() - else: - with self.jobserver.get_job(): - _run() - except Exception: - self.failed_projects.append(project.config.project_name) - raise - - def _run_lcov( - self, build_dir, lcov_file, initial=False, gcov: Union[os.PathLike, str] = "" + initial=False, + gcov: Union[os.PathLike, str] = "", ): gcov = os.path.abspath(gcov) if initial: @@ -895,7 +785,9 @@ class Zmake: def _merge_lcov_files(self, projects, build_dir, output_file): all_lcov_files = [] for project in projects: - project_build_dir = pathlib.Path(build_dir) / project.config.project_name + project_build_dir = ( + pathlib.Path(build_dir) / project.config.project_name + ) all_lcov_files.append(project_build_dir / "output" / "zephyr.info") with self.jobserver.get_job(): # Merge info files into a single lcov.info |