diff options
Diffstat (limited to 'zephyr/include/dt-bindings')
| -rw-r--r-- | zephyr/include/dt-bindings/battery.h | 14 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/charger/intersil_isl9241.h | 12 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h | 2 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h | 2 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/gpio_defines.h | 74 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/motionsense/utils.h | 6 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/usb_pd_tcpm.h | 20 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/usbc_mux.h | 3 | ||||
| -rw-r--r-- | zephyr/include/dt-bindings/wake_mask_event_defines.h | 94 |
9 files changed, 108 insertions, 119 deletions
diff --git a/zephyr/include/dt-bindings/battery.h b/zephyr/include/dt-bindings/battery.h index c87de79b45..e6465e2a9b 100644 --- a/zephyr/include/dt-bindings/battery.h +++ b/zephyr/include/dt-bindings/battery.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The ChromiumOS Authors. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,11 +10,11 @@ * Macros used by LED devicetree files (led.dts) to define battery-level * range. */ -#define BATTERY_LEVEL_EMPTY 0 -#define BATTERY_LEVEL_SHUTDOWN 3 -#define BATTERY_LEVEL_CRITICAL 5 -#define BATTERY_LEVEL_LOW 10 -#define BATTERY_LEVEL_NEAR_FULL 97 -#define BATTERY_LEVEL_FULL 100 +#define BATTERY_LEVEL_EMPTY 0 +#define BATTERY_LEVEL_SHUTDOWN 3 +#define BATTERY_LEVEL_CRITICAL 5 +#define BATTERY_LEVEL_LOW 10 +#define BATTERY_LEVEL_NEAR_FULL 97 +#define BATTERY_LEVEL_FULL 100 #endif /* DT_BINDINGS_BATTERY_H_ */ diff --git a/zephyr/include/dt-bindings/charger/intersil_isl9241.h b/zephyr/include/dt-bindings/charger/intersil_isl9241.h index 5a2742570e..cbb550a5dd 100644 --- a/zephyr/include/dt-bindings/charger/intersil_isl9241.h +++ b/zephyr/include/dt-bindings/charger/intersil_isl9241.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,10 +9,10 @@ #define SWITCHING_FREQ_1420KHZ 0 #define SWITCHING_FREQ_1180KHZ 1 #define SWITCHING_FREQ_1020KHZ 2 -#define SWITCHING_FREQ_890KHZ 3 -#define SWITCHING_FREQ_808KHZ 4 -#define SWITCHING_FREQ_724KHZ 5 -#define SWITCHING_FREQ_656KHZ 6 -#define SWITCHING_FREQ_600KHZ 7 +#define SWITCHING_FREQ_890KHZ 3 +#define SWITCHING_FREQ_808KHZ 4 +#define SWITCHING_FREQ_724KHZ 5 +#define SWITCHING_FREQ_656KHZ 6 +#define SWITCHING_FREQ_600KHZ 7 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CHARGER_INTERSIL_ISL9241_H_ */ diff --git a/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h index f88efed949..53769f5dbf 100644 --- a/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h +++ b/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h index 41b6c6b3b6..b520e154da 100644 --- a/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h +++ b/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/gpio_defines.h b/zephyr/include/dt-bindings/gpio_defines.h index fd63b5ac4a..16da598363 100644 --- a/zephyr/include/dt-bindings/gpio_defines.h +++ b/zephyr/include/dt-bindings/gpio_defines.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,31 +21,31 @@ */ /** Enables pin as input. */ -#define GPIO_INPUT (1U << 16) +#define GPIO_INPUT (1U << 16) /** Enables pin as output, no change to the output state. */ -#define GPIO_OUTPUT (1U << 17) +#define GPIO_OUTPUT (1U << 17) /* Initializes output to a low state. */ -#define GPIO_OUTPUT_INIT_LOW (1U << 18) +#define GPIO_OUTPUT_INIT_LOW (1U << 18) /* Initializes output to a high state. */ -#define GPIO_OUTPUT_INIT_HIGH (1U << 19) +#define GPIO_OUTPUT_INIT_HIGH (1U << 19) /* Initializes output based on logic level */ #define GPIO_OUTPUT_INIT_LOGICAL (1U << 20) /* Configures GPIO pin as output and initializes it to a low state. */ -#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW) +#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW) /* Configures GPIO pin as output and initializes it to a high state. */ -#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH) +#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH) /* Configures GPIO pin as input with pull-up. */ -#define GPIO_INPUT_PULL_UP (GPIO_INPUT | GPIO_PULL_UP) +#define GPIO_INPUT_PULL_UP (GPIO_INPUT | GPIO_PULL_UP) /* Configures GPIO pin as input with pull-down. */ -#define GPIO_INPUT_PULL_DOWN (GPIO_INPUT | GPIO_PULL_DOWN) +#define GPIO_INPUT_PULL_DOWN (GPIO_INPUT | GPIO_PULL_DOWN) /** Configures GPIO pin as ODR output and initializes it to a low state. */ #define GPIO_ODR_LOW (GPIO_OUTPUT_LOW | GPIO_OPEN_DRAIN) @@ -61,17 +61,17 @@ */ /** Disables GPIO pin interrupt. */ -#define GPIO_INT_DISABLE (1U << 21) +#define GPIO_INT_DISABLE (1U << 21) /* Enables GPIO pin interrupt. */ -#define GPIO_INT_ENABLE (1U << 22) +#define GPIO_INT_ENABLE (1U << 22) /* GPIO interrupt is sensitive to logical levels. * * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_LEVELS_LOGICAL (1U << 23) +#define GPIO_INT_LEVELS_LOGICAL (1U << 23) /* GPIO interrupt is edge sensitive. * @@ -80,7 +80,7 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_EDGE (1U << 24) +#define GPIO_INT_EDGE (1U << 24) /* Trigger detection when input state is (or transitions to) physical low or * logical 0 level. @@ -88,7 +88,7 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_LOW_0 (1U << 25) +#define GPIO_INT_LOW_0 (1U << 25) /* Trigger detection on input state is (or transitions to) physical high or * logical 1 level. @@ -96,69 +96,57 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_HIGH_1 (1U << 26) +#define GPIO_INT_HIGH_1 (1U << 26) /** Configures GPIO interrupt to be triggered on pin rising edge and enables it. */ -#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin falling edge and enables * it. */ -#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin rising or falling edge and * enables it. */ -#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0 | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_BOTH \ + (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_LOW_0 | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin physical level low and * enables it. */ -#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin physical level high and * enables it. */ -#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin state change to logical * level 0 and enables it. */ -#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_EDGE_TO_INACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_EDGE | \ + GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin state change to logical * level 1 and enables it. */ -#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_TO_ACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_EDGE | \ + GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin logical level 0 and enables * it. */ -#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_LOW_0) +#define GPIO_INT_LEVEL_INACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin logical level 1 and enables * it. */ -#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_LEVEL_ACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_HIGH_1) #endif /* DT_BINDINGS_GPIO_DEFINES_H_ */ diff --git a/zephyr/include/dt-bindings/motionsense/utils.h b/zephyr/include/dt-bindings/motionsense/utils.h index 7f0e5f5fc8..f7a3a31927 100644 --- a/zephyr/include/dt-bindings/motionsense/utils.h +++ b/zephyr/include/dt-bindings/motionsense/utils.h @@ -7,8 +7,8 @@ #ifndef DT_BINDINGS_UTILS_H #define DT_BINDINGS_UTILS_H -#define BIT(x) (1U << (x)) -#define ROUND_UP_FLAG BIT(31) -#define USEC_PER_MSEC 1000 +#define BIT(x) (1U << (x)) +#define ROUND_UP_FLAG BIT(31) +#define USEC_PER_MSEC 1000 #endif /* DT_BINDINGS_UTILS_H */ diff --git a/zephyr/include/dt-bindings/usb_pd_tcpm.h b/zephyr/include/dt-bindings/usb_pd_tcpm.h index 2b0902d097..93e5165140 100644 --- a/zephyr/include/dt-bindings/usb_pd_tcpm.h +++ b/zephyr/include/dt-bindings/usb_pd_tcpm.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -24,14 +24,14 @@ * Bit 7 --> TCPC controls FRS (even when CONFIG_USB_PD_FRS_TCPC is off) * Bit 8 --> TCPC enable VBUS monitoring */ -#define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) -#define TCPC_FLAGS_ALERT_OD BIT(1) -#define TCPC_FLAGS_RESET_ACTIVE_HIGH BIT(2) -#define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) -#define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) -#define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) -#define TCPC_FLAGS_CONTROL_VCONN BIT(6) -#define TCPC_FLAGS_CONTROL_FRS BIT(7) -#define TCPC_FLAGS_VBUS_MONITOR BIT(8) +#define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) +#define TCPC_FLAGS_ALERT_OD BIT(1) +#define TCPC_FLAGS_RESET_ACTIVE_HIGH BIT(2) +#define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) +#define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) +#define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) +#define TCPC_FLAGS_CONTROL_VCONN BIT(6) +#define TCPC_FLAGS_CONTROL_FRS BIT(7) +#define TCPC_FLAGS_VBUS_MONITOR BIT(8) #endif diff --git a/zephyr/include/dt-bindings/usbc_mux.h b/zephyr/include/dt-bindings/usbc_mux.h index 8cfe38340f..1d91542814 100644 --- a/zephyr/include/dt-bindings/usbc_mux.h +++ b/zephyr/include/dt-bindings/usbc_mux.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,5 +14,6 @@ #define USB_MUX_FLAG_NOT_TCPC BIT(0) /* TCPC/MUX device used only as MUX */ #define USB_MUX_FLAG_SET_WITHOUT_FLIP BIT(1) /* SET should not flip */ #define USB_MUX_FLAG_RESETS_IN_G3 BIT(2) /* Mux chip will reset in G3 */ +#define USB_MUX_FLAG_POLARITY_INVERTED BIT(3) /* Mux polarity is inverted */ #endif /* DT_BINDINGS_USBC_MUX_H_ */ diff --git a/zephyr/include/dt-bindings/wake_mask_event_defines.h b/zephyr/include/dt-bindings/wake_mask_event_defines.h index 168c8425e5..f9df35701e 100644 --- a/zephyr/include/dt-bindings/wake_mask_event_defines.h +++ b/zephyr/include/dt-bindings/wake_mask_event_defines.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,52 +19,52 @@ * defined in this file. */ -#define MKBP_EVENT_KEY_MATRIX BIT(0) -#define MKBP_EVENT_HOST_EVENT BIT(1) -#define MKBP_EVENT_SENSOR_FIFO BIT(2) -#define MKBP_EVENT_BUTTON BIT(3) -#define MKBP_EVENT_SWITCH BIT(4) -#define MKBP_EVENT_FINGERPRINT BIT(5) -#define MKBP_EVENT_SYSRQ BIT(6) -#define MKBP_EVENT_HOST_EVENT64 BIT(7) -#define MKBP_EVENT_CEC_EVENT BIT(8) -#define MKBP_EVENT_CEC_MESSAGE BIT(9) -#define MKBP_EVENT_DP_ALT_MODE_ENTERED BIT(10) -#define MKBP_EVENT_ONLINE_CALIBRATION BIT(11) -#define MKBP_EVENT_PCHG BIT(12) +#define MKBP_EVENT_KEY_MATRIX BIT(0) +#define MKBP_EVENT_HOST_EVENT BIT(1) +#define MKBP_EVENT_SENSOR_FIFO BIT(2) +#define MKBP_EVENT_BUTTON BIT(3) +#define MKBP_EVENT_SWITCH BIT(4) +#define MKBP_EVENT_FINGERPRINT BIT(5) +#define MKBP_EVENT_SYSRQ BIT(6) +#define MKBP_EVENT_HOST_EVENT64 BIT(7) +#define MKBP_EVENT_CEC_EVENT BIT(8) +#define MKBP_EVENT_CEC_MESSAGE BIT(9) +#define MKBP_EVENT_DP_ALT_MODE_ENTERED BIT(10) +#define MKBP_EVENT_ONLINE_CALIBRATION BIT(11) +#define MKBP_EVENT_PCHG BIT(12) -#define HOST_EVENT_NONE 0 -#define HOST_EVENT_LID_CLOSED BIT(0) -#define HOST_EVENT_LID_OPEN BIT(1) -#define HOST_EVENT_POWER_BUTTON BIT(2) -#define HOST_EVENT_AC_CONNECTED BIT(3) -#define HOST_EVENT_AC_DISCONNECTED BIT(4) -#define HOST_EVENT_BATTERY_LOW BIT(5) -#define HOST_EVENT_BATTERY_CRITICAL BIT(6) -#define HOST_EVENT_BATTERY BIT(7) -#define HOST_EVENT_THERMAL_THRESHOLD BIT(8) -#define HOST_EVENT_DEVICE BIT(9) -#define HOST_EVENT_THERMAL BIT(10) -#define HOST_EVENT_USB_CHARGER BIT(11) -#define HOST_EVENT_KEY_PRESSED BIT(12) -#define HOST_EVENT_INTERFACE_READY BIT(13) -#define HOST_EVENT_KEYBOARD_RECOVERY BIT(14) -#define HOST_EVENT_THERMAL_SHUTDOWN BIT(15) -#define HOST_EVENT_BATTERY_SHUTDOWN BIT(16) -#define HOST_EVENT_THROTTLE_START BIT(17) -#define HOST_EVENT_THROTTLE_STOP BIT(18) -#define HOST_EVENT_HANG_DETECT BIT(19) -#define HOST_EVENT_HANG_REBOOT BIT(20) -#define HOST_EVENT_PD_MCU BIT(21) -#define HOST_EVENT_BATTERY_STATUS BIT(22) -#define HOST_EVENT_PANIC BIT(23) -#define HOST_EVENT_KEYBOARD_FASTBOOT BIT(24) -#define HOST_EVENT_RTC BIT(25) -#define HOST_EVENT_MKBP BIT(26) -#define HOST_EVENT_USB_MUX BIT(27) -#define HOST_EVENT_MODE_CHANGE BIT(28) -#define HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT BIT(29) -#define HOST_EVENT_WOV BIT(30) -#define HOST_EVENT_INVALID BIT(31) +#define HOST_EVENT_NONE 0 +#define HOST_EVENT_LID_CLOSED BIT(0) +#define HOST_EVENT_LID_OPEN BIT(1) +#define HOST_EVENT_POWER_BUTTON BIT(2) +#define HOST_EVENT_AC_CONNECTED BIT(3) +#define HOST_EVENT_AC_DISCONNECTED BIT(4) +#define HOST_EVENT_BATTERY_LOW BIT(5) +#define HOST_EVENT_BATTERY_CRITICAL BIT(6) +#define HOST_EVENT_BATTERY BIT(7) +#define HOST_EVENT_THERMAL_THRESHOLD BIT(8) +#define HOST_EVENT_DEVICE BIT(9) +#define HOST_EVENT_THERMAL BIT(10) +#define HOST_EVENT_USB_CHARGER BIT(11) +#define HOST_EVENT_KEY_PRESSED BIT(12) +#define HOST_EVENT_INTERFACE_READY BIT(13) +#define HOST_EVENT_KEYBOARD_RECOVERY BIT(14) +#define HOST_EVENT_THERMAL_SHUTDOWN BIT(15) +#define HOST_EVENT_BATTERY_SHUTDOWN BIT(16) +#define HOST_EVENT_THROTTLE_START BIT(17) +#define HOST_EVENT_THROTTLE_STOP BIT(18) +#define HOST_EVENT_HANG_DETECT BIT(19) +#define HOST_EVENT_HANG_REBOOT BIT(20) +#define HOST_EVENT_PD_MCU BIT(21) +#define HOST_EVENT_BATTERY_STATUS BIT(22) +#define HOST_EVENT_PANIC BIT(23) +#define HOST_EVENT_KEYBOARD_FASTBOOT BIT(24) +#define HOST_EVENT_RTC BIT(25) +#define HOST_EVENT_MKBP BIT(26) +#define HOST_EVENT_USB_MUX BIT(27) +#define HOST_EVENT_MODE_CHANGE BIT(28) +#define HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT BIT(29) +#define HOST_EVENT_WOV BIT(30) +#define HOST_EVENT_INVALID BIT(31) #endif /* DT_BINDINGS_WAKE_MASK_EVENT_DEFINES_H_ */ |