diff options
Diffstat (limited to 'zephyr/include')
57 files changed, 1283 insertions, 858 deletions
diff --git a/zephyr/include/ap_power/ap_power.h b/zephyr/include/ap_power/ap_power.h index 182e81ca4d..05387d8431 100644 --- a/zephyr/include/ap_power/ap_power.h +++ b/zephyr/include/ap_power/ap_power.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,7 +9,16 @@ * * Defines the API for AP event notification, * the API to register and receive notification callbacks when - * application processor (AP) events happen + * application processor (AP) events happen. + * + * When the Zephyr based AP power sequence config is enabled, + * the callbacks are almost all invoked within the context + * of the power sequence task, so the state is stable + * during the callback. The only exception to this is AP_POWER_RESET, which is + * invoked as a result of receiving a PLTRST# virtual wire signal (if enabled). + * + * When the legacy power sequence config is enabled, the callbacks are invoked + * from the HOOK_CHIPSET notifications. */ #ifndef __AP_POWER_AP_POWER_H__ @@ -87,6 +96,36 @@ enum ap_power_events { AP_POWER_HARD_OFF = BIT(8), /** Software reset occurred */ AP_POWER_RESET = BIT(9), + /** + * AP power state is now known. + * + * Prior to this event, the state of the AP is unknown + * and invalid. When this event is sent, the state is known + * and can be queried. Used by clients when their + * initialization depends upon the initial state of the AP. + */ + AP_POWER_INITIALIZED = BIT(10), + + /** + * S0ix suspend starts. + */ + AP_POWER_S0IX_SUSPEND_START = BIT(11), + /** + * Transitioning from s0 to s0ix. + */ + AP_POWER_S0IX_SUSPEND = BIT(12), + /** + * Transitioning from s0ix to s0. + */ + AP_POWER_S0IX_RESUME = BIT(13), + /** + * si0x resume complete. + */ + AP_POWER_S0IX_RESUME_COMPLETE = BIT(14), + /** + * Reset s0ix tracking. + */ + AP_POWER_S0IX_RESET_TRACKING = BIT(15), }; /** @@ -113,12 +152,12 @@ typedef void (*ap_power_ev_callback_handler_t)(struct ap_power_ev_callback *cb, * are unique pointers of struct ap_power_ev_callback. * The storage must be static. * - * ap_power_ev_init_callback can be used to initialise this structure. + * ap_power_ev_init_callback can be used to initialize this structure. */ struct ap_power_ev_callback { - sys_snode_t node; /* Only usable by AP power event code */ + sys_snode_t node; /* Only usable by AP power event code */ ap_power_ev_callback_handler_t handler; - enum ap_power_events events; /* Events to listen for */ + enum ap_power_events events; /* Events to listen for */ }; /** @endcond */ @@ -129,9 +168,10 @@ struct ap_power_ev_callback { * @param handler The function pointer to call. * @param events The bitmask of events to be called for. */ -static inline void ap_power_ev_init_callback(struct ap_power_ev_callback *cb, - ap_power_ev_callback_handler_t handler, - enum ap_power_events events) +static inline void +ap_power_ev_init_callback(struct ap_power_ev_callback *cb, + ap_power_ev_callback_handler_t handler, + enum ap_power_events events) { __ASSERT(cb, "Callback pointer should not be NULL"); __ASSERT(handler, "Callback handler pointer should not be NULL"); diff --git a/zephyr/include/ap_power/ap_power_espi.h b/zephyr/include/ap_power/ap_power_espi.h new file mode 100644 index 0000000000..2c295054f3 --- /dev/null +++ b/zephyr/include/ap_power/ap_power_espi.h @@ -0,0 +1,35 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * @brief API for power signal ESPI callback. + */ + +#ifndef __AP_POWER_AP_POWER_ESPI_H__ +#define __AP_POWER_AP_POWER_ESPI_H__ + +#include <zephyr/drivers/espi.h> + +/** + * @brief ESPI callback for power signal handling. + * + * This callback must be registered for the bus events indicated below + * as part of the common ESPI initialisation and configuration. + * + * @param dev ESPI device + * @param cb Callback structure + * @param event ESPI event data + */ +void power_signal_espi_cb(const struct device *dev, struct espi_callback *cb, + struct espi_event event); + +/* + * The ESPI bus events required for the power signal ESPI callback. + */ +#define POWER_SIGNAL_ESPI_BUS_EVENTS \ + (ESPI_BUS_EVENT_CHANNEL_READY | ESPI_BUS_EVENT_VWIRE_RECEIVED) + +#endif /* __AP_POWER_AP_POWER_ESPI_H__ */ diff --git a/zephyr/include/ap_power/ap_power_events.h b/zephyr/include/ap_power/ap_power_events.h index 6181deb2bd..8a6a9764de 100644 --- a/zephyr/include/ap_power/ap_power_events.h +++ b/zephyr/include/ap_power/ap_power_events.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/ap_power/ap_power_interface.h b/zephyr/include/ap_power/ap_power_interface.h index b82ef053f7..d2808f6075 100644 --- a/zephyr/include/ap_power/ap_power_interface.h +++ b/zephyr/include/ap_power/ap_power_interface.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -34,6 +34,8 @@ * is hibernated or all the VRs are turned off. */ enum power_states_ndsx { + /* Power state machine is not ready; AP state is unknown. */ + SYS_POWER_STATE_UNINIT, /* * Actual power states */ @@ -87,17 +89,17 @@ enum power_states_ndsx { * @brief Represents the state of the AP as a mask. */ enum ap_power_state_mask { - AP_POWER_STATE_HARD_OFF = BIT(0), /* Hard off (G3) */ - AP_POWER_STATE_SOFT_OFF = BIT(1), /* Soft off (S5, S4) */ - AP_POWER_STATE_SUSPEND = BIT(2), /* Suspend (S3) */ - AP_POWER_STATE_ON = BIT(3), /* On (S0) */ - AP_POWER_STATE_STANDBY = BIT(4), /* Standby (S0ix) */ + AP_POWER_STATE_HARD_OFF = BIT(0), /* Hard off (G3) */ + AP_POWER_STATE_SOFT_OFF = BIT(1), /* Soft off (S5, S4) */ + AP_POWER_STATE_SUSPEND = BIT(2), /* Suspend (S3) */ + AP_POWER_STATE_ON = BIT(3), /* On (S0) */ + AP_POWER_STATE_STANDBY = BIT(4), /* Standby (S0ix) */ /* Common combinations, any off state */ - AP_POWER_STATE_ANY_OFF = (AP_POWER_STATE_HARD_OFF | - AP_POWER_STATE_SOFT_OFF), + AP_POWER_STATE_ANY_OFF = + (AP_POWER_STATE_HARD_OFF | AP_POWER_STATE_SOFT_OFF), /* This combination covers any kind of suspend i.e. S3 or S0ix. */ - AP_POWER_STATE_ANY_SUSPEND = (AP_POWER_STATE_SUSPEND | - AP_POWER_STATE_STANDBY), + AP_POWER_STATE_ANY_SUSPEND = + (AP_POWER_STATE_SUSPEND | AP_POWER_STATE_STANDBY), }; /** diff --git a/zephyr/include/ap_power/ap_pwrseq.h b/zephyr/include/ap_power/ap_pwrseq.h index c83a8b5695..9e1ffd27e8 100644 --- a/zephyr/include/ap_power/ap_pwrseq.h +++ b/zephyr/include/ap_power/ap_pwrseq.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,4 +9,5 @@ /** Starts the AP power sequence thread */ void ap_pwrseq_task_start(void); +void ap_pwrseq_wake(void); #endif /* __AP_POWER_AP_PWRSEQ_H__ */ diff --git a/zephyr/include/cros/binman.dtsi b/zephyr/include/cros/binman.dtsi index d33092ee44..167fd69d1c 100644 --- a/zephyr/include/cros/binman.dtsi +++ b/zephyr/include/cros/binman.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,7 +7,7 @@ #address-cells = <1>; #size-cells = <1>; binman { - filename = "zephyr.bin"; + filename = "ec.bin"; pad-byte = <0x1d>; wp-ro { compatible = "cros-ec,flash-layout"; diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi index 4631e64f6f..e9ecf9e716 100644 --- a/zephyr/include/cros/ite/it8xxx2.dtsi +++ b/zephyr/include/cros/ite/it8xxx2.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -77,13 +77,11 @@ fiu0: cros-flash@80000000 { compatible = "ite,it8xxx2-cros-flash"; reg = <0x80000000 0x100000>; - label = "FLASH"; }; cros_kb_raw: cros-kb-raw@f01d00 { compatible = "ite,it8xxx2-cros-kb-raw"; reg = <0x00f01d00 0x29>; - label = "CROS_KB_RAW_0"; interrupt-parent = <&intc>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; wucctrl = <&wuc_wu30 /* KSI[0] */ @@ -108,5 +106,7 @@ offset = <0x60000>; size = <0x60000>; }; + pad-byte = <0xff>; + pad-after = <0x40000>; }; }; diff --git a/zephyr/include/cros/microchip/mec1727.dtsi b/zephyr/include/cros/microchip/mec1727.dtsi index 340cff1956..5f84a1a99e 100644 --- a/zephyr/include/cros/microchip/mec1727.dtsi +++ b/zephyr/include/cros/microchip/mec1727.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -75,6 +75,5 @@ fiu0: cros-flash { compatible = "microchip,xec-cros-flash"; - label = "INTERNAL_FLASH"; }; }; diff --git a/zephyr/include/cros/microchip/mec172x.dtsi b/zephyr/include/cros/microchip/mec172x.dtsi index 6833fa57d0..e2cb0ff1c2 100644 --- a/zephyr/include/cros/microchip/mec172x.dtsi +++ b/zephyr/include/cros/microchip/mec172x.dtsi @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -69,9 +69,8 @@ }; }; - fiu0: cros-flash{ + fiu0: cros-flash { compatible = "microchip,xec-cros-flash"; - label = "INTERNAL_FLASH"; }; /* diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 094f5ff901..69f29367f5 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 The Chromium OS Authors + * Copyright 2021 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ @@ -68,9 +68,8 @@ }; }; - fiu0: cros-flash{ + fiu0: cros-flash { compatible = "nuvoton,npcx-cros-flash"; - label = "INTERNAL_FLASH"; }; soc { @@ -78,7 +77,6 @@ cros_kb_raw: cros-kb-raw@400a3000 { compatible = "nuvoton,npcx-cros-kb-raw"; reg = <0x400a3000 0x2000>; - label = "CROS_KB_RAW_0"; interrupts = <49 4>; clocks = <&pcc NPCX_CLOCK_BUS_APB1 NPCX_PWDWN_CTL1 0>; wui_maps = <&wui_io31 &wui_io30 &wui_io27 &wui_io26 @@ -89,7 +87,6 @@ compatible = "nuvoton,npcx-cros-mtc"; reg = <0x400b7000 0x2000>; mtc-alarm = <&wui_mtc>; - label = "MTC"; }; shi: shi@4000f000 { diff --git a/zephyr/include/cros/nuvoton/npcx7.dtsi b/zephyr/include/cros/nuvoton/npcx7.dtsi index 00683fe8ff..ca69343054 100644 --- a/zephyr/include/cros/nuvoton/npcx7.dtsi +++ b/zephyr/include/cros/nuvoton/npcx7.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 The Chromium OS Authors + * Copyright 2021 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/zephyr/include/cros/nuvoton/npcx9.dtsi b/zephyr/include/cros/nuvoton/npcx9.dtsi index de492d3306..864ce20269 100644 --- a/zephyr/include/cros/nuvoton/npcx9.dtsi +++ b/zephyr/include/cros/nuvoton/npcx9.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 The Chromium OS Authors + * Copyright 2021 The ChromiumOS Authors * * SPDX-License-Identifier: Apache-2.0 */ diff --git a/zephyr/include/cros/thermistor/thermistor.dtsi b/zephyr/include/cros/thermistor/thermistor.dtsi index 033d5639e2..fb86c4f79a 100644 --- a/zephyr/include/cros/thermistor/thermistor.dtsi +++ b/zephyr/include/cros/thermistor/thermistor.dtsi @@ -1,5 +1,5 @@ / { - thermistor_3V3_30K9_47K_4050B: thermistor-3V3-30K9-47K-4050B { + /omit-if-no-ref/ thermistor_3V3_30K9_47K_4050B: thermistor-3V3-30K9-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <11>; @@ -64,8 +64,7 @@ }; }; - - thermistor_3V0_22K6_47K_4050B: thermistor-3V0-22K6-47K-4050B { + /omit-if-no-ref/ thermistor_3V0_22K6_47K_4050B: thermistor-3V0-22K6-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <11>; @@ -145,7 +144,7 @@ }; }; - thermistor_3V3_13K7_47K_4050B: thermistor-3V3-13K7-47K-4050B { + /omit-if-no-ref/ thermistor_3V3_13K7_47K_4050B: thermistor-3V3-13K7-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <13>; @@ -226,7 +225,7 @@ }; - thermistor_3V3_51K1_47K_4050B: thermistor-3V3-51K1-47K-4050B { + /omit-if-no-ref/ thermistor_3V3_51K1_47K_4050B: thermistor-3V3-51K1-47K-4050B { status = "disabled"; compatible = "cros-ec,thermistor"; scaling-factor = <11>; @@ -305,4 +304,86 @@ sample-index = <12>; }; }; + + /omit-if-no-ref/ thermistor_3V3_30K9_47K_NCP15WB: + thermistor-3V3-30K9-47K-NCP15WB { + status = "disabled"; + compatible = "cros-ec,thermistor"; + scaling-factor = <11>; + num-pairs = <13>; + steinhart-reference-mv = <3300>; + steinhart-reference-res = <30900>; + + /* + * Data derived from Steinhart-Hart equation in a resistor + * divider circuit with Vdd=3300mV, R = 30.9Kohm, + * and Murata NCP15WB-series thermistor + * (B = 4050, T0 = 298.15 K, nominal resistance (R0) = 47Kohm). + */ + sample-datum-0 { + milivolt = <(2761 / 11)>; + temp = <0>; + sample-index = <0>; + }; + sample-datum-1 { + milivolt = <(2492 / 11)>; + temp = <10>; + sample-index = <1>; + }; + sample-datum-2 { + milivolt = <(2167 / 11)>; + temp = <20>; + sample-index = <2>; + }; + sample-datum-3 { + milivolt = <(1812 / 11)>; + temp = <30>; + sample-index = <3>; + }; + sample-datum-4 { + milivolt = <(1462 / 11)>; + temp = <40>; + sample-index = <4>; + }; + sample-datum-5 { + milivolt = <(1146 / 11)>; + temp = <50>; + sample-index = <5>; + }; + sample-datum-6 { + milivolt = <(878 / 11)>; + temp = <60>; + sample-index = <6>; + }; + sample-datum-7 { + milivolt = <(665 / 11)>; + temp = <70>; + sample-index = <7>; + }; + sample-datum-8 { + milivolt = <(500 / 11)>; + temp = <80>; + sample-index = <8>; + }; + sample-datum-9 { + milivolt = <(434 / 11)>; + temp = <85>; + sample-index = <9>; + }; + sample-datum-10 { + milivolt = <( 376 / 11)>; + temp = <90>; + sample-index = <10>; + }; + sample-datum-11 { + milivolt = <( 326 / 11)>; + temp = <95>; + sample-index = <11>; + }; + sample-datum-12 { + milivolt = <( 283 / 11)>; + temp = <100>; + sample-index = <12>; + }; + }; }; diff --git a/zephyr/include/drivers/cros_displight.h b/zephyr/include/drivers/cros_displight.h index 83c8577c7e..340d51f60d 100644 --- a/zephyr/include/drivers/cros_displight.h +++ b/zephyr/include/drivers/cros_displight.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_flash.h b/zephyr/include/drivers/cros_flash.h index 1bad6bb682..267649476b 100644 --- a/zephyr/include/drivers/cros_flash.h +++ b/zephyr/include/drivers/cros_flash.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -45,8 +45,8 @@ typedef int (*cros_flash_api_physical_erase)(const struct device *dev, typedef int (*cros_flash_api_physical_get_protect)(const struct device *dev, int bank); -typedef uint32_t -(*cros_flash_api_physical_get_protect_flags)(const struct device *dev); +typedef uint32_t (*cros_flash_api_physical_get_protect_flags)( + const struct device *dev); typedef int (*cros_flash_api_physical_protect_at_boot)(const struct device *dev, uint32_t new_flags); @@ -55,12 +55,11 @@ typedef int (*cros_flash_api_physical_protect_now)(const struct device *dev, int all); typedef int (*cros_flash_api_physical_get_jedec_id)(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device); + uint8_t *manufacturer, + uint16_t *device); typedef int (*cros_flash_api_physical_get_status)(const struct device *dev, - uint8_t *sr1, - uint8_t *sr2); + uint8_t *sr1, uint8_t *sr2); __subsystem struct cros_flash_driver_api { cros_flash_api_init init; @@ -183,6 +182,7 @@ z_impl_cros_flash_physical_get_protect(const struct device *dev, int bank) return api->physical_get_protect(dev, bank); } +/* clang-format off */ /** * @brief Return flash protect state flags from the physical layer. * @@ -192,6 +192,7 @@ z_impl_cros_flash_physical_get_protect(const struct device *dev, int bank) */ __syscall uint32_t cros_flash_physical_get_protect_flags(const struct device *dev); +/* clang-format on */ static inline uint32_t z_impl_cros_flash_physical_get_protect_flags(const struct device *dev) @@ -269,13 +270,12 @@ z_impl_cros_flash_physical_protect_now(const struct device *dev, int all) * @retval -ENOTSUP Not supported api function. */ __syscall int cros_flash_physical_get_jedec_id(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device); + uint8_t *manufacturer, + uint16_t *device); static inline int z_impl_cros_flash_physical_get_jedec_id(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device) + uint8_t *manufacturer, uint16_t *device) { const struct cros_flash_driver_api *api = (const struct cros_flash_driver_api *)dev->api; @@ -297,11 +297,11 @@ z_impl_cros_flash_physical_get_jedec_id(const struct device *dev, * @retval -ENOTSUP Not supported api function. */ __syscall int cros_flash_physical_get_status(const struct device *dev, - uint8_t *sr1, uint8_t *sr2); + uint8_t *sr1, uint8_t *sr2); static inline int -z_impl_cros_flash_physical_get_status(const struct device *dev, - uint8_t *sr1, uint8_t *sr2) +z_impl_cros_flash_physical_get_status(const struct device *dev, uint8_t *sr1, + uint8_t *sr2) { const struct cros_flash_driver_api *api = (const struct cros_flash_driver_api *)dev->api; diff --git a/zephyr/include/drivers/cros_kb_raw.h b/zephyr/include/drivers/cros_kb_raw.h index db2d00bf76..d370a3bbde 100644 --- a/zephyr/include/drivers/cros_kb_raw.h +++ b/zephyr/include/drivers/cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_rtc.h b/zephyr/include/drivers/cros_rtc.h index 343cf0405e..3a0f332b98 100644 --- a/zephyr/include/drivers/cros_rtc.h +++ b/zephyr/include/drivers/cros_rtc.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_shi.h b/zephyr/include/drivers/cros_shi.h index 3d14e2c34f..3eb3038a45 100644 --- a/zephyr/include/drivers/cros_shi.h +++ b/zephyr/include/drivers/cros_shi.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/drivers/cros_system.h b/zephyr/include/drivers/cros_system.h index 5b3d12ea58..5105d97cc9 100644 --- a/zephyr/include/drivers/cros_system.h +++ b/zephyr/include/drivers/cros_system.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/battery.h b/zephyr/include/dt-bindings/battery.h index c87de79b45..e6465e2a9b 100644 --- a/zephyr/include/dt-bindings/battery.h +++ b/zephyr/include/dt-bindings/battery.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The ChromiumOS Authors. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,11 +10,11 @@ * Macros used by LED devicetree files (led.dts) to define battery-level * range. */ -#define BATTERY_LEVEL_EMPTY 0 -#define BATTERY_LEVEL_SHUTDOWN 3 -#define BATTERY_LEVEL_CRITICAL 5 -#define BATTERY_LEVEL_LOW 10 -#define BATTERY_LEVEL_NEAR_FULL 97 -#define BATTERY_LEVEL_FULL 100 +#define BATTERY_LEVEL_EMPTY 0 +#define BATTERY_LEVEL_SHUTDOWN 3 +#define BATTERY_LEVEL_CRITICAL 5 +#define BATTERY_LEVEL_LOW 10 +#define BATTERY_LEVEL_NEAR_FULL 97 +#define BATTERY_LEVEL_FULL 100 #endif /* DT_BINDINGS_BATTERY_H_ */ diff --git a/zephyr/include/dt-bindings/charger/intersil_isl9241.h b/zephyr/include/dt-bindings/charger/intersil_isl9241.h index 5a2742570e..cbb550a5dd 100644 --- a/zephyr/include/dt-bindings/charger/intersil_isl9241.h +++ b/zephyr/include/dt-bindings/charger/intersil_isl9241.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,10 +9,10 @@ #define SWITCHING_FREQ_1420KHZ 0 #define SWITCHING_FREQ_1180KHZ 1 #define SWITCHING_FREQ_1020KHZ 2 -#define SWITCHING_FREQ_890KHZ 3 -#define SWITCHING_FREQ_808KHZ 4 -#define SWITCHING_FREQ_724KHZ 5 -#define SWITCHING_FREQ_656KHZ 6 -#define SWITCHING_FREQ_600KHZ 7 +#define SWITCHING_FREQ_890KHZ 3 +#define SWITCHING_FREQ_808KHZ 4 +#define SWITCHING_FREQ_724KHZ 5 +#define SWITCHING_FREQ_656KHZ 6 +#define SWITCHING_FREQ_600KHZ 7 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CHARGER_INTERSIL_ISL9241_H_ */ diff --git a/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h index f88efed949..53769f5dbf 100644 --- a/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h +++ b/zephyr/include/dt-bindings/cros-kb-raw/ite_cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h b/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h index 41b6c6b3b6..b520e154da 100644 --- a/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h +++ b/zephyr/include/dt-bindings/cros-kb-raw/mchp_cros_kb_raw.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/dt-bindings/gpio_defines.h b/zephyr/include/dt-bindings/gpio_defines.h index fd63b5ac4a..16da598363 100644 --- a/zephyr/include/dt-bindings/gpio_defines.h +++ b/zephyr/include/dt-bindings/gpio_defines.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -21,31 +21,31 @@ */ /** Enables pin as input. */ -#define GPIO_INPUT (1U << 16) +#define GPIO_INPUT (1U << 16) /** Enables pin as output, no change to the output state. */ -#define GPIO_OUTPUT (1U << 17) +#define GPIO_OUTPUT (1U << 17) /* Initializes output to a low state. */ -#define GPIO_OUTPUT_INIT_LOW (1U << 18) +#define GPIO_OUTPUT_INIT_LOW (1U << 18) /* Initializes output to a high state. */ -#define GPIO_OUTPUT_INIT_HIGH (1U << 19) +#define GPIO_OUTPUT_INIT_HIGH (1U << 19) /* Initializes output based on logic level */ #define GPIO_OUTPUT_INIT_LOGICAL (1U << 20) /* Configures GPIO pin as output and initializes it to a low state. */ -#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW) +#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW) /* Configures GPIO pin as output and initializes it to a high state. */ -#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH) +#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH) /* Configures GPIO pin as input with pull-up. */ -#define GPIO_INPUT_PULL_UP (GPIO_INPUT | GPIO_PULL_UP) +#define GPIO_INPUT_PULL_UP (GPIO_INPUT | GPIO_PULL_UP) /* Configures GPIO pin as input with pull-down. */ -#define GPIO_INPUT_PULL_DOWN (GPIO_INPUT | GPIO_PULL_DOWN) +#define GPIO_INPUT_PULL_DOWN (GPIO_INPUT | GPIO_PULL_DOWN) /** Configures GPIO pin as ODR output and initializes it to a low state. */ #define GPIO_ODR_LOW (GPIO_OUTPUT_LOW | GPIO_OPEN_DRAIN) @@ -61,17 +61,17 @@ */ /** Disables GPIO pin interrupt. */ -#define GPIO_INT_DISABLE (1U << 21) +#define GPIO_INT_DISABLE (1U << 21) /* Enables GPIO pin interrupt. */ -#define GPIO_INT_ENABLE (1U << 22) +#define GPIO_INT_ENABLE (1U << 22) /* GPIO interrupt is sensitive to logical levels. * * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_LEVELS_LOGICAL (1U << 23) +#define GPIO_INT_LEVELS_LOGICAL (1U << 23) /* GPIO interrupt is edge sensitive. * @@ -80,7 +80,7 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_EDGE (1U << 24) +#define GPIO_INT_EDGE (1U << 24) /* Trigger detection when input state is (or transitions to) physical low or * logical 0 level. @@ -88,7 +88,7 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_LOW_0 (1U << 25) +#define GPIO_INT_LOW_0 (1U << 25) /* Trigger detection on input state is (or transitions to) physical high or * logical 1 level. @@ -96,69 +96,57 @@ * This is a component flag that should be combined with other * `GPIO_INT_*` flags to produce a meaningful configuration. */ -#define GPIO_INT_HIGH_1 (1U << 26) +#define GPIO_INT_HIGH_1 (1U << 26) /** Configures GPIO interrupt to be triggered on pin rising edge and enables it. */ -#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin falling edge and enables * it. */ -#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin rising or falling edge and * enables it. */ -#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0 | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_BOTH \ + (GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_LOW_0 | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin physical level low and * enables it. */ -#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin physical level high and * enables it. */ -#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin state change to logical * level 0 and enables it. */ -#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_EDGE | \ - GPIO_INT_LOW_0) +#define GPIO_INT_EDGE_TO_INACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_EDGE | \ + GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin state change to logical * level 1 and enables it. */ -#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_EDGE | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_EDGE_TO_ACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_EDGE | \ + GPIO_INT_HIGH_1) /** Configures GPIO interrupt to be triggered on pin logical level 0 and enables * it. */ -#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_LOW_0) +#define GPIO_INT_LEVEL_INACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_LOW_0) /** Configures GPIO interrupt to be triggered on pin logical level 1 and enables * it. */ -#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \ - GPIO_INT_LEVELS_LOGICAL | \ - GPIO_INT_HIGH_1) +#define GPIO_INT_LEVEL_ACTIVE \ + (GPIO_INT_ENABLE | GPIO_INT_LEVELS_LOGICAL | GPIO_INT_HIGH_1) #endif /* DT_BINDINGS_GPIO_DEFINES_H_ */ diff --git a/zephyr/include/dt-bindings/motionsense/utils.h b/zephyr/include/dt-bindings/motionsense/utils.h index 7f0e5f5fc8..f7a3a31927 100644 --- a/zephyr/include/dt-bindings/motionsense/utils.h +++ b/zephyr/include/dt-bindings/motionsense/utils.h @@ -7,8 +7,8 @@ #ifndef DT_BINDINGS_UTILS_H #define DT_BINDINGS_UTILS_H -#define BIT(x) (1U << (x)) -#define ROUND_UP_FLAG BIT(31) -#define USEC_PER_MSEC 1000 +#define BIT(x) (1U << (x)) +#define ROUND_UP_FLAG BIT(31) +#define USEC_PER_MSEC 1000 #endif /* DT_BINDINGS_UTILS_H */ diff --git a/zephyr/include/dt-bindings/usb_pd_tcpm.h b/zephyr/include/dt-bindings/usb_pd_tcpm.h index 2b0902d097..93e5165140 100644 --- a/zephyr/include/dt-bindings/usb_pd_tcpm.h +++ b/zephyr/include/dt-bindings/usb_pd_tcpm.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -24,14 +24,14 @@ * Bit 7 --> TCPC controls FRS (even when CONFIG_USB_PD_FRS_TCPC is off) * Bit 8 --> TCPC enable VBUS monitoring */ -#define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) -#define TCPC_FLAGS_ALERT_OD BIT(1) -#define TCPC_FLAGS_RESET_ACTIVE_HIGH BIT(2) -#define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) -#define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) -#define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) -#define TCPC_FLAGS_CONTROL_VCONN BIT(6) -#define TCPC_FLAGS_CONTROL_FRS BIT(7) -#define TCPC_FLAGS_VBUS_MONITOR BIT(8) +#define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) +#define TCPC_FLAGS_ALERT_OD BIT(1) +#define TCPC_FLAGS_RESET_ACTIVE_HIGH BIT(2) +#define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) +#define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) +#define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) +#define TCPC_FLAGS_CONTROL_VCONN BIT(6) +#define TCPC_FLAGS_CONTROL_FRS BIT(7) +#define TCPC_FLAGS_VBUS_MONITOR BIT(8) #endif diff --git a/zephyr/include/dt-bindings/usbc_mux.h b/zephyr/include/dt-bindings/usbc_mux.h index 8cfe38340f..1d91542814 100644 --- a/zephyr/include/dt-bindings/usbc_mux.h +++ b/zephyr/include/dt-bindings/usbc_mux.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,5 +14,6 @@ #define USB_MUX_FLAG_NOT_TCPC BIT(0) /* TCPC/MUX device used only as MUX */ #define USB_MUX_FLAG_SET_WITHOUT_FLIP BIT(1) /* SET should not flip */ #define USB_MUX_FLAG_RESETS_IN_G3 BIT(2) /* Mux chip will reset in G3 */ +#define USB_MUX_FLAG_POLARITY_INVERTED BIT(3) /* Mux polarity is inverted */ #endif /* DT_BINDINGS_USBC_MUX_H_ */ diff --git a/zephyr/include/dt-bindings/wake_mask_event_defines.h b/zephyr/include/dt-bindings/wake_mask_event_defines.h index 168c8425e5..f9df35701e 100644 --- a/zephyr/include/dt-bindings/wake_mask_event_defines.h +++ b/zephyr/include/dt-bindings/wake_mask_event_defines.h @@ -1,5 +1,5 @@ /* - * Copyright 2022 The Chromium OS Authors. All rights reserved. + * Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,52 +19,52 @@ * defined in this file. */ -#define MKBP_EVENT_KEY_MATRIX BIT(0) -#define MKBP_EVENT_HOST_EVENT BIT(1) -#define MKBP_EVENT_SENSOR_FIFO BIT(2) -#define MKBP_EVENT_BUTTON BIT(3) -#define MKBP_EVENT_SWITCH BIT(4) -#define MKBP_EVENT_FINGERPRINT BIT(5) -#define MKBP_EVENT_SYSRQ BIT(6) -#define MKBP_EVENT_HOST_EVENT64 BIT(7) -#define MKBP_EVENT_CEC_EVENT BIT(8) -#define MKBP_EVENT_CEC_MESSAGE BIT(9) -#define MKBP_EVENT_DP_ALT_MODE_ENTERED BIT(10) -#define MKBP_EVENT_ONLINE_CALIBRATION BIT(11) -#define MKBP_EVENT_PCHG BIT(12) +#define MKBP_EVENT_KEY_MATRIX BIT(0) +#define MKBP_EVENT_HOST_EVENT BIT(1) +#define MKBP_EVENT_SENSOR_FIFO BIT(2) +#define MKBP_EVENT_BUTTON BIT(3) +#define MKBP_EVENT_SWITCH BIT(4) +#define MKBP_EVENT_FINGERPRINT BIT(5) +#define MKBP_EVENT_SYSRQ BIT(6) +#define MKBP_EVENT_HOST_EVENT64 BIT(7) +#define MKBP_EVENT_CEC_EVENT BIT(8) +#define MKBP_EVENT_CEC_MESSAGE BIT(9) +#define MKBP_EVENT_DP_ALT_MODE_ENTERED BIT(10) +#define MKBP_EVENT_ONLINE_CALIBRATION BIT(11) +#define MKBP_EVENT_PCHG BIT(12) -#define HOST_EVENT_NONE 0 -#define HOST_EVENT_LID_CLOSED BIT(0) -#define HOST_EVENT_LID_OPEN BIT(1) -#define HOST_EVENT_POWER_BUTTON BIT(2) -#define HOST_EVENT_AC_CONNECTED BIT(3) -#define HOST_EVENT_AC_DISCONNECTED BIT(4) -#define HOST_EVENT_BATTERY_LOW BIT(5) -#define HOST_EVENT_BATTERY_CRITICAL BIT(6) -#define HOST_EVENT_BATTERY BIT(7) -#define HOST_EVENT_THERMAL_THRESHOLD BIT(8) -#define HOST_EVENT_DEVICE BIT(9) -#define HOST_EVENT_THERMAL BIT(10) -#define HOST_EVENT_USB_CHARGER BIT(11) -#define HOST_EVENT_KEY_PRESSED BIT(12) -#define HOST_EVENT_INTERFACE_READY BIT(13) -#define HOST_EVENT_KEYBOARD_RECOVERY BIT(14) -#define HOST_EVENT_THERMAL_SHUTDOWN BIT(15) -#define HOST_EVENT_BATTERY_SHUTDOWN BIT(16) -#define HOST_EVENT_THROTTLE_START BIT(17) -#define HOST_EVENT_THROTTLE_STOP BIT(18) -#define HOST_EVENT_HANG_DETECT BIT(19) -#define HOST_EVENT_HANG_REBOOT BIT(20) -#define HOST_EVENT_PD_MCU BIT(21) -#define HOST_EVENT_BATTERY_STATUS BIT(22) -#define HOST_EVENT_PANIC BIT(23) -#define HOST_EVENT_KEYBOARD_FASTBOOT BIT(24) -#define HOST_EVENT_RTC BIT(25) -#define HOST_EVENT_MKBP BIT(26) -#define HOST_EVENT_USB_MUX BIT(27) -#define HOST_EVENT_MODE_CHANGE BIT(28) -#define HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT BIT(29) -#define HOST_EVENT_WOV BIT(30) -#define HOST_EVENT_INVALID BIT(31) +#define HOST_EVENT_NONE 0 +#define HOST_EVENT_LID_CLOSED BIT(0) +#define HOST_EVENT_LID_OPEN BIT(1) +#define HOST_EVENT_POWER_BUTTON BIT(2) +#define HOST_EVENT_AC_CONNECTED BIT(3) +#define HOST_EVENT_AC_DISCONNECTED BIT(4) +#define HOST_EVENT_BATTERY_LOW BIT(5) +#define HOST_EVENT_BATTERY_CRITICAL BIT(6) +#define HOST_EVENT_BATTERY BIT(7) +#define HOST_EVENT_THERMAL_THRESHOLD BIT(8) +#define HOST_EVENT_DEVICE BIT(9) +#define HOST_EVENT_THERMAL BIT(10) +#define HOST_EVENT_USB_CHARGER BIT(11) +#define HOST_EVENT_KEY_PRESSED BIT(12) +#define HOST_EVENT_INTERFACE_READY BIT(13) +#define HOST_EVENT_KEYBOARD_RECOVERY BIT(14) +#define HOST_EVENT_THERMAL_SHUTDOWN BIT(15) +#define HOST_EVENT_BATTERY_SHUTDOWN BIT(16) +#define HOST_EVENT_THROTTLE_START BIT(17) +#define HOST_EVENT_THROTTLE_STOP BIT(18) +#define HOST_EVENT_HANG_DETECT BIT(19) +#define HOST_EVENT_HANG_REBOOT BIT(20) +#define HOST_EVENT_PD_MCU BIT(21) +#define HOST_EVENT_BATTERY_STATUS BIT(22) +#define HOST_EVENT_PANIC BIT(23) +#define HOST_EVENT_KEYBOARD_FASTBOOT BIT(24) +#define HOST_EVENT_RTC BIT(25) +#define HOST_EVENT_MKBP BIT(26) +#define HOST_EVENT_USB_MUX BIT(27) +#define HOST_EVENT_MODE_CHANGE BIT(28) +#define HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT BIT(29) +#define HOST_EVENT_WOV BIT(30) +#define HOST_EVENT_INVALID BIT(31) #endif /* DT_BINDINGS_WAKE_MASK_EVENT_DEFINES_H_ */ diff --git a/zephyr/include/emul/emul_bb_retimer.h b/zephyr/include/emul/emul_bb_retimer.h index 9c6a73c3f4..9db2dd565e 100644 --- a/zephyr/include/emul/emul_bb_retimer.h +++ b/zephyr/include/emul/emul_bb_retimer.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -37,22 +37,13 @@ */ /** - * @brief Get pointer to BB retimer emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to BB retimer emulator - */ -struct i2c_emul *bb_emul_get(int ord); - -/** * @brief Set value of given register of BB retimer * * @param emul Pointer to BB retimer emulator * @param reg Register address which value will be changed * @param val New value of the register */ -void bb_emul_set_reg(struct i2c_emul *emul, int reg, uint32_t val); +void bb_emul_set_reg(const struct emul *emul, int reg, uint32_t val); /** * @brief Get value of given register of BB retimer @@ -62,7 +53,7 @@ void bb_emul_set_reg(struct i2c_emul *emul, int reg, uint32_t val); * * @return Value of the register */ -uint32_t bb_emul_get_reg(struct i2c_emul *emul, int reg); +uint32_t bb_emul_get_reg(const struct emul *emul, int reg); /** * @brief Set if error should be generated when read only register is being @@ -71,7 +62,7 @@ uint32_t bb_emul_get_reg(struct i2c_emul *emul, int reg); * @param emul Pointer to BB retimer emulator * @param set Check for this error */ -void bb_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void bb_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -80,7 +71,16 @@ void bb_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BB retimer emulator * @param set Check for this error */ -void bb_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void bb_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); + +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to bb retimer emulator + * @return Pointer to i2c_common_emul_data for emul argument + */ +struct i2c_common_emul_data * +emul_bb_retimer_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/emul_bma255.h b/zephyr/include/emul/emul_bma255.h index 158d29cf97..44a56a86f7 100644 --- a/zephyr/include/emul/emul_bma255.h +++ b/zephyr/include/emul/emul_bma255.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,25 +47,16 @@ * Axis argument used in @ref bma_emul_set_acc @ref bma_emul_get_acc * @ref bma_emul_set_off and @ref bma_emul_get_off */ -#define BMA_EMUL_AXIS_X 0 -#define BMA_EMUL_AXIS_Y 1 -#define BMA_EMUL_AXIS_Z 2 +#define BMA_EMUL_AXIS_X 0 +#define BMA_EMUL_AXIS_Y 1 +#define BMA_EMUL_AXIS_Z 2 /** * Acceleration 1g in internal emulator units. It is helpful for using * functions @ref bma_emul_set_acc @ref bma_emul_get_acc * @ref bma_emul_set_off and @ref bma_emul_get_off */ -#define BMA_EMUL_1G BIT(10) - -/** - * @brief Get pointer to BMA255 emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to BMA255 emulator - */ -struct i2c_emul *bma_emul_get(int ord); +#define BMA_EMUL_1G BIT(10) /** * @brief Set value of given register of BMA255 @@ -74,7 +65,7 @@ struct i2c_emul *bma_emul_get(int ord); * @param reg Register address which value will be changed * @param val New value of the register */ -void bma_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +void bma_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of BMA255 @@ -84,7 +75,7 @@ void bma_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return Value of the register */ -uint8_t bma_emul_get_reg(struct i2c_emul *emul, int reg); +uint8_t bma_emul_get_reg(const struct emul *emul, int reg); /** * @brief Get internal value of offset for given axis @@ -94,7 +85,7 @@ uint8_t bma_emul_get_reg(struct i2c_emul *emul, int reg); * * @return Offset of given axis. LSB is 0.97mg */ -int16_t bma_emul_get_off(struct i2c_emul *emul, int axis); +int16_t bma_emul_get_off(const struct emul *emul, int axis); /** * @brief Set internal value of offset for given axis @@ -103,7 +94,7 @@ int16_t bma_emul_get_off(struct i2c_emul *emul, int axis); * @param axis Axis to access: 0 - X, 1 - Y, 2 - Z * @param val New value of offset. LSB is 0.97mg */ -void bma_emul_set_off(struct i2c_emul *emul, int axis, int16_t val); +void bma_emul_set_off(const struct emul *emul, int axis, int16_t val); /** * @brief Get internal value of accelerometer for given axis @@ -113,7 +104,7 @@ void bma_emul_set_off(struct i2c_emul *emul, int axis, int16_t val); * * @return Acceleration of given axis. LSB is 0.97mg */ -int16_t bma_emul_get_acc(struct i2c_emul *emul, int axis); +int16_t bma_emul_get_acc(const struct emul *emul, int axis); /** * @brief Set internal value of accelerometr for given axis @@ -122,7 +113,7 @@ int16_t bma_emul_get_acc(struct i2c_emul *emul, int axis); * @param axis Axis to access: 0 - X, 1 - Y, 2 - Z * @param val New value of accelerometer axis. LSB is 0.97mg */ -void bma_emul_set_acc(struct i2c_emul *emul, int axis, int16_t val); +void bma_emul_set_acc(const struct emul *emul, int axis, int16_t val); /** * @brief Set if error should be generated when fast compensation is triggered @@ -131,7 +122,7 @@ void bma_emul_set_acc(struct i2c_emul *emul, int axis, int16_t val); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_cal_nrdy(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_cal_nrdy(const struct emul *emul, bool set); /** * @brief Set if error should be generated when fast compensation is triggered @@ -140,7 +131,7 @@ void bma_emul_set_err_on_cal_nrdy(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_cal_bad_range(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_cal_bad_range(const struct emul *emul, bool set); /** * @brief Set if error should be generated when read only register is being @@ -149,7 +140,7 @@ void bma_emul_set_err_on_cal_bad_range(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -158,7 +149,7 @@ void bma_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when MSB register is accessed before @@ -167,7 +158,7 @@ void bma_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMA255 emulator * @param set Check for this error */ -void bma_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set); +void bma_emul_set_err_on_msb_first(const struct emul *emul, bool set); /** * @brief Function calculate register that should be accessed when I2C message @@ -182,7 +173,16 @@ void bma_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set); * * @retval Register address that should be accessed */ -int bma_emul_access_reg(struct i2c_emul *emul, int reg, int bytes, bool read); +int bma_emul_access_reg(const struct emul *emul, int reg, int bytes, bool read); + +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to BMA emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_bma_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/emul_bmi.h b/zephyr/include/emul/emul_bmi.h index b04278bd5e..c7a07ba4bf 100644 --- a/zephyr/include/emul/emul_bmi.h +++ b/zephyr/include/emul/emul_bmi.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -60,49 +60,49 @@ enum bmi_emul_axis { }; /** BMI emulator models */ -#define BMI_EMUL_160 1 -#define BMI_EMUL_260 2 +#define BMI_EMUL_160 1 +#define BMI_EMUL_260 2 /** Last register supported by emulator */ -#define BMI_EMUL_MAX_REG 0x80 +#define BMI_EMUL_MAX_REG 0x80 /** Maximum number of registers that can be backed in NVM */ -#define BMI_EMUL_MAX_NVM_REGS 10 +#define BMI_EMUL_MAX_NVM_REGS 10 /** Headers used in FIFO frames */ -#define BMI_EMUL_FIFO_HEAD_SKIP 0x40 -#define BMI_EMUL_FIFO_HEAD_TIME 0x44 -#define BMI_EMUL_FIFO_HEAD_CONFIG 0x48 -#define BMI_EMUL_FIFO_HEAD_EMPTY 0x80 -#define BMI_EMUL_FIFO_HEAD_DATA 0x80 -#define BMI_EMUL_FIFO_HEAD_DATA_MAG BIT(4) -#define BMI_EMUL_FIFO_HEAD_DATA_GYR BIT(3) -#define BMI_EMUL_FIFO_HEAD_DATA_ACC BIT(2) -#define BMI_EMUL_FIFO_HEAD_DATA_TAG_MASK 0x03 +#define BMI_EMUL_FIFO_HEAD_SKIP 0x40 +#define BMI_EMUL_FIFO_HEAD_TIME 0x44 +#define BMI_EMUL_FIFO_HEAD_CONFIG 0x48 +#define BMI_EMUL_FIFO_HEAD_EMPTY 0x80 +#define BMI_EMUL_FIFO_HEAD_DATA 0x80 +#define BMI_EMUL_FIFO_HEAD_DATA_MAG BIT(4) +#define BMI_EMUL_FIFO_HEAD_DATA_GYR BIT(3) +#define BMI_EMUL_FIFO_HEAD_DATA_ACC BIT(2) +#define BMI_EMUL_FIFO_HEAD_DATA_TAG_MASK 0x03 /** * Acceleration 1g in internal emulator units. It is helpful for using * functions @ref bmi_emul_set_value @ref bmi_emul_get_value * @ref bmi_emul_set_off and @ref bmi_emul_get_off */ -#define BMI_EMUL_1G BIT(14) +#define BMI_EMUL_1G BIT(14) /** * Gyroscope 125°/s in internal emulator units. It is helpful for using * functions @ref bmi_emul_set_value @ref bmi_emul_get_value * @ref bmi_emul_set_off and @ref bmi_emul_get_off */ -#define BMI_EMUL_125_DEG_S BIT(15) +#define BMI_EMUL_125_DEG_S BIT(15) /** Type of frames that can be added to the emulator frames list */ -#define BMI_EMUL_FRAME_CONFIG BIT(0) -#define BMI_EMUL_FRAME_ACC BIT(1) -#define BMI_EMUL_FRAME_MAG BIT(2) -#define BMI_EMUL_FRAME_GYR BIT(3) +#define BMI_EMUL_FRAME_CONFIG BIT(0) +#define BMI_EMUL_FRAME_ACC BIT(1) +#define BMI_EMUL_FRAME_MAG BIT(2) +#define BMI_EMUL_FRAME_GYR BIT(3) /** * Code returned by model specific handle_read and handle_write functions, when * RO register is accessed on write or WO register is accessed on read */ -#define BMI_EMUL_ACCESS_E 1 +#define BMI_EMUL_ACCESS_E 1 /** Structure used to describe single FIFO frame */ struct bmi_emul_frame { @@ -147,7 +147,8 @@ struct bmi_emul_type_data { * * @return Register address that will be accessed */ - int (*access_reg)(struct i2c_emul *emul, int reg, int byte, bool read); + int (*access_reg)(const struct emul *emul, int reg, int byte, + bool read); /** * @brief Model specific write function. It should modify state of @@ -163,7 +164,7 @@ struct bmi_emul_type_data { * @return BMI_EMUL_ACCESS_E on RO register access * @return other on error */ - int (*handle_write)(uint8_t *regs, struct i2c_emul *emul, int reg, + int (*handle_write)(uint8_t *regs, const struct emul *emul, int reg, int byte, uint8_t val); /** * @brief Model specific read function. It should modify state of @@ -179,16 +180,29 @@ struct bmi_emul_type_data { * @return BMI_EMUL_ACCESS_E on WO register access * @return other on error */ - int (*handle_read)(uint8_t *regs, struct i2c_emul *emul, int reg, + int (*handle_read)(uint8_t *regs, const struct emul *emul, int reg, int byte, char *buf); /** + * @brief Model specific finish read function. It should modify state of + * emulator if required. + * + * @param regs Pointer to array of emulator's registers + * @param emul Pointer to BMI emulator + * @param reg Selected register + * @param bytes Number of bytes read + * + * @return 0 on success + */ + int (*finish_read)(uint8_t *regs, const struct emul *emul, int reg, + int bytes); + /** * @brief Model specific reset function. It should modify state of * emulator to imitate after reset conditions. * * @param regs Pointer to array of emulator's registers * @param emul Pointer to BMI emulator */ - void (*reset)(uint8_t *regs, struct i2c_emul *emul); + void (*reset)(uint8_t *regs, const struct emul *emul); /** Array of reserved bits mask for each register */ const uint8_t *rsvd_mask; @@ -220,22 +234,13 @@ const struct bmi_emul_type_data *get_bmi160_emul_type_data(void); const struct bmi_emul_type_data *get_bmi260_emul_type_data(void); /** - * @brief Get pointer to BMI emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to BMI emulator - */ -struct i2c_emul *bmi_emul_get(int ord); - -/** * @brief Set value of given register of BMI * * @param emul Pointer to BMI emulator * @param reg Register address which value will be changed * @param val New value of the register */ -void bmi_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +void bmi_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of BMI @@ -245,7 +250,7 @@ void bmi_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return Value of the register */ -uint8_t bmi_emul_get_reg(struct i2c_emul *emul, int reg); +uint8_t bmi_emul_get_reg(const struct emul *emul, int reg); /** * @brief Get internal value of offset for given axis and sensor @@ -256,7 +261,7 @@ uint8_t bmi_emul_get_reg(struct i2c_emul *emul, int reg); * @return Offset of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -int16_t bmi_emul_get_off(struct i2c_emul *emul, enum bmi_emul_axis axis); +int16_t bmi_emul_get_off(const struct emul *emul, enum bmi_emul_axis axis); /** * @brief Set internal value of offset for given axis and sensor @@ -266,7 +271,7 @@ int16_t bmi_emul_get_off(struct i2c_emul *emul, enum bmi_emul_axis axis); * @param val New value of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, +void bmi_emul_set_off(const struct emul *emul, enum bmi_emul_axis axis, int16_t val); /** @@ -278,7 +283,7 @@ void bmi_emul_set_off(struct i2c_emul *emul, enum bmi_emul_axis axis, * @return Sensor value of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -int32_t bmi_emul_get_value(struct i2c_emul *emul, enum bmi_emul_axis axis); +int32_t bmi_emul_get_value(const struct emul *emul, enum bmi_emul_axis axis); /** * @brief Set internal value of sensor for given axis @@ -288,7 +293,7 @@ int32_t bmi_emul_get_value(struct i2c_emul *emul, enum bmi_emul_axis axis); * @param val New value of given axis. LSB for accelerometer is 0.061mg and for * gyroscope is 0.0037°/s. */ -void bmi_emul_set_value(struct i2c_emul *emul, enum bmi_emul_axis axis, +void bmi_emul_set_value(const struct emul *emul, enum bmi_emul_axis axis, int32_t val); /** @@ -298,7 +303,7 @@ void bmi_emul_set_value(struct i2c_emul *emul, enum bmi_emul_axis axis, * @param emul Pointer to BMI emulator * @param set Check for this error */ -void bmi_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void bmi_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -307,7 +312,7 @@ void bmi_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param set Check for this error */ -void bmi_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void bmi_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when write only register is read @@ -315,7 +320,7 @@ void bmi_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param set Check for this error */ -void bmi_emul_set_err_on_wo_read(struct i2c_emul *emul, bool set); +void bmi_emul_set_err_on_wo_read(const struct emul *emul, bool set); /** * @brief Set if effect of simulated command should take place after simulated @@ -324,7 +329,7 @@ void bmi_emul_set_err_on_wo_read(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param set Simulate command execution time */ -void bmi_emul_simulate_cmd_exec_time(struct i2c_emul *emul, bool set); +void bmi_emul_simulate_cmd_exec_time(const struct emul *emul, bool set); /** * @brief Set number of skipped frames. It will generate skip frame on next @@ -333,7 +338,7 @@ void bmi_emul_simulate_cmd_exec_time(struct i2c_emul *emul, bool set); * @param emul Pointer to BMI emulator * @param skip Number of skipped frames */ -void bmi_emul_set_skipped_frames(struct i2c_emul *emul, uint8_t skip); +void bmi_emul_set_skipped_frames(const struct emul *emul, uint8_t skip); /** * @brief Clear all FIFO frames, set current frame to empty and reset fifo_skip @@ -343,14 +348,14 @@ void bmi_emul_set_skipped_frames(struct i2c_emul *emul, uint8_t skip); * @param tag_time Indicate if sensor time should be included in empty frame * @param header Indicate if header should be included in frame */ -void bmi_emul_flush_fifo(struct i2c_emul *emul, bool tag_time, bool header); +void bmi_emul_flush_fifo(const struct emul *emul, bool tag_time, bool header); /** * @brief Restore registers backed by NVM, reset sensor time and flush FIFO * * @param emul Pointer to BMI emulator */ -void bmi_emul_reset_common(struct i2c_emul *emul, bool tag_time, bool header); +void bmi_emul_reset_common(const struct emul *emul, bool tag_time, bool header); /** * @brief Set command end time to @p time ms from now @@ -358,14 +363,14 @@ void bmi_emul_reset_common(struct i2c_emul *emul, bool tag_time, bool header); * @param emul Pointer to BMI emulator * @param time After this amount of ms command should end */ -void bmi_emul_set_cmd_end_time(struct i2c_emul *emul, int time); +void bmi_emul_set_cmd_end_time(const struct emul *emul, int time); /** * @brief Check if command should end * * @param emul Pointer to BMI emulator */ -bool bmi_emul_is_cmd_end(struct i2c_emul *emul); +bool bmi_emul_is_cmd_end(const struct emul *emul); /** * @brief Append FIFO @p frame to the emulator list of frames. It can be read @@ -376,7 +381,8 @@ bool bmi_emul_is_cmd_end(struct i2c_emul *emul); * emulator may use this frame (until flush of FIFO or reading * it out through I2C) */ -void bmi_emul_append_frame(struct i2c_emul *emul, struct bmi_emul_frame *frame); +void bmi_emul_append_frame(const struct emul *emul, + struct bmi_emul_frame *frame); /** * @brief Get length of all frames that are on the emulator list of frames. @@ -385,7 +391,7 @@ void bmi_emul_append_frame(struct i2c_emul *emul, struct bmi_emul_frame *frame); * @param tag_time Indicate if sensor time should be included in empty frame * @param header Indicate if header should be included in frame */ -uint16_t bmi_emul_fifo_len(struct i2c_emul *emul, bool tag_time, bool header); +uint16_t bmi_emul_fifo_len(const struct emul *emul, bool tag_time, bool header); /** * @brief Get next byte that should be returned on FIFO data access. @@ -400,9 +406,8 @@ uint16_t bmi_emul_fifo_len(struct i2c_emul *emul, bool tag_time, bool header); * * @return FIFO data byte */ -uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, - bool tag_time, bool header, int acc_shift, - int gyr_shift); +uint8_t bmi_emul_get_fifo_data(const struct emul *emul, int byte, bool tag_time, + bool header, int acc_shift, int gyr_shift); /** * @brief Saves current internal state of sensors to emulator's registers. @@ -419,10 +424,18 @@ uint8_t bmi_emul_get_fifo_data(struct i2c_emul *emul, int byte, * @param gyr_off_en Indicate if gyroscope offset should be included to * sensor data value */ -void bmi_emul_state_to_reg(struct i2c_emul *emul, int acc_shift, +void bmi_emul_state_to_reg(const struct emul *emul, int acc_shift, int gyr_shift, int acc_reg, int gyr_reg, int sensortime_reg, bool acc_off_en, bool gyr_off_en); +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to BMI emulator + * @return Pointer to i2c_common_emul_data for emul argument + */ +struct i2c_common_emul_data * +emul_bmi_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/emul_clock_control.h b/zephyr/include/emul/emul_clock_control.h index 1b3846b0f1..716bec5655 100644 --- a/zephyr/include/emul/emul_clock_control.h +++ b/zephyr/include/emul/emul_clock_control.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/emul/emul_common_i2c.h b/zephyr/include/emul/emul_common_i2c.h index 676308b027..1388e9bbcb 100644 --- a/zephyr/include/emul/emul_common_i2c.h +++ b/zephyr/include/emul/emul_common_i2c.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -49,8 +49,8 @@ * Special register values used in @ref i2c_common_emul_set_read_fail_reg and * @ref i2c_common_emul_set_write_fail_reg */ -#define I2C_COMMON_EMUL_FAIL_ALL_REG (-1) -#define I2C_COMMON_EMUL_NO_FAIL_REG (-2) +#define I2C_COMMON_EMUL_FAIL_ALL_REG (-1) +#define I2C_COMMON_EMUL_NO_FAIL_REG (-2) /** * Describe if there is no ongoing I2C message or if there is message handled @@ -67,20 +67,21 @@ enum i2c_common_emul_msg_state { * @brief Function type that is used by I2C device emulator for first byte of * I2C write message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_start_write_func)(struct i2c_emul *emul, int reg); +typedef int (*i2c_common_emul_start_write_func)(const struct emul *target, + int reg); /** * @brief Function type that is used by I2C device emulator at the end of * I2C write message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * @param bytes Number of bytes received from the I2C write message @@ -88,14 +89,14 @@ typedef int (*i2c_common_emul_start_write_func)(struct i2c_emul *emul, int reg); * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_finish_write_func)(struct i2c_emul *emul, int reg, - int bytes); +typedef int (*i2c_common_emul_finish_write_func)(const struct emul *target, + int reg, int bytes); /** * @brief Function type that is used by I2C device emulator on each byte of * I2C write message (except first byte). * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * @param val Value of current byte @@ -105,27 +106,28 @@ typedef int (*i2c_common_emul_finish_write_func)(struct i2c_emul *emul, int reg, * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_write_byte_func)(struct i2c_emul *emul, int reg, - uint8_t val, int bytes); +typedef int (*i2c_common_emul_write_byte_func)(const struct emul *target, + int reg, uint8_t val, int bytes); /** * @brief Function type that is used by I2C device emulator before first byte of * I2C read message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_start_read_func)(struct i2c_emul *emul, int reg); +typedef int (*i2c_common_emul_start_read_func)(const struct emul *target, + int reg); /** * @brief Function type that is used by I2C device emulator at the end of * I2C read message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * @param bytes Number of bytes responeded to the I2C read message @@ -133,14 +135,14 @@ typedef int (*i2c_common_emul_start_read_func)(struct i2c_emul *emul, int reg); * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_finish_read_func)(struct i2c_emul *emul, int reg, - int bytes); +typedef int (*i2c_common_emul_finish_read_func)(const struct emul *target, + int reg, int bytes); /** * @brief Function type that is used by I2C device emulator on each byte of * I2C read message. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * @param val Pointer to buffer where current response byte should be stored @@ -150,8 +152,8 @@ typedef int (*i2c_common_emul_finish_read_func)(struct i2c_emul *emul, int reg, * @return 0 on success * @return -EIO on error */ -typedef int (*i2c_common_emul_read_byte_func)(struct i2c_emul *emul, int reg, - uint8_t *val, int bytes); +typedef int (*i2c_common_emul_read_byte_func)(const struct emul *target, + int reg, uint8_t *val, int bytes); /** * @brief Function type that is used by I2C device emulator to select register @@ -159,7 +161,7 @@ typedef int (*i2c_common_emul_read_byte_func)(struct i2c_emul *emul, int reg, * @ref i2c_common_emul_set_read_fail_reg and * @ref i2c_common_emul_set_write_fail_reg * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read/write command (first byte * of last I2C write message) * @param bytes Number of bytes already processed in the I2C message handler @@ -169,14 +171,14 @@ typedef int (*i2c_common_emul_read_byte_func)(struct i2c_emul *emul, int reg, * @return Register address that should be compared with user-defined fail * register */ -typedef int (*i2c_common_emul_access_reg_func)(struct i2c_emul *emul, int reg, - int bytes, bool read); +typedef int (*i2c_common_emul_access_reg_func)(const struct emul *target, + int reg, int bytes, bool read); /** * @brief Custom function type that is used as user-defined callback in read * I2C messages handling. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by read command (first byte of last * I2C write message) * @param val Pointer to buffer where current response byte should be stored @@ -188,14 +190,14 @@ typedef int (*i2c_common_emul_access_reg_func)(struct i2c_emul *emul, int reg, * @return 1 continue with normal emulator handler * @return negative on error */ -typedef int (*i2c_common_emul_read_func)(struct i2c_emul *emul, int reg, +typedef int (*i2c_common_emul_read_func)(const struct emul *target, int reg, uint8_t *val, int bytes, void *data); /** * @brief Custom function type that is used as user-defined callback in write * I2C messages handling. * - * @param emul Pointer to emulator + * @param target Pointer to emulator * @param reg Address which is now accessed by write command (first byte of I2C * write message) * @param val Value of current byte @@ -207,13 +209,11 @@ typedef int (*i2c_common_emul_read_func)(struct i2c_emul *emul, int reg, * @return 1 continue with normal emulator handler * @return negative on error */ -typedef int (*i2c_common_emul_write_func)(struct i2c_emul *emul, int reg, +typedef int (*i2c_common_emul_write_func)(const struct emul *target, int reg, uint8_t val, int bytes, void *data); /** Static configuration, common for all i2c emulators */ struct i2c_common_emul_cfg { - /** Label of the I2C bus this emulator connects to */ - const char *i2c_label; /** Label of the I2C device being emulated */ const char *dev_label; /** Pointer to run-time data */ @@ -283,31 +283,32 @@ extern struct i2c_emul_api i2c_common_emul_api; * @brief Lock access to emulator properties. After acquiring lock, user * may change emulator behaviour in multi-thread setup. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param timeout Timeout in getting lock * * @return k_mutex_lock return code */ -int i2c_common_emul_lock_data(struct i2c_emul *emul, k_timeout_t timeout); +int i2c_common_emul_lock_data(struct i2c_common_emul_data *common_data, + k_timeout_t timeout); /** * @brief Unlock access to emulator properties. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * * @return k_mutex_unlock return code */ -int i2c_common_emul_unlock_data(struct i2c_emul *emul); +int i2c_common_emul_unlock_data(struct i2c_common_emul_data *common_data); /** * @brief Set write handler for I2C messages. This function is called before * generic handler. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param func Pointer to custom function * @param data User data passed on call of custom function */ -void i2c_common_emul_set_write_func(struct i2c_emul *emul, +void i2c_common_emul_set_write_func(struct i2c_common_emul_data *common_data, i2c_common_emul_write_func func, void *data); @@ -315,30 +316,32 @@ void i2c_common_emul_set_write_func(struct i2c_emul *emul, * @brief Set read handler for I2C messages. This function is called before * generic handler. * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param func Pointer to custom function * @param data User data passed on call of custom function */ -void i2c_common_emul_set_read_func(struct i2c_emul *emul, +void i2c_common_emul_set_read_func(struct i2c_common_emul_data *common_data, i2c_common_emul_read_func func, void *data); /** * @brief Setup fail on read of given register of emulator * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param reg Register address or one of special values * (I2C_COMMON_EMUL_FAIL_ALL_REG, I2C_COMMON_EMUL_NO_FAIL_REG) */ -void i2c_common_emul_set_read_fail_reg(struct i2c_emul *emul, int reg); +void i2c_common_emul_set_read_fail_reg(struct i2c_common_emul_data *common_data, + int reg); /** * @brief Setup fail on write of given register of emulator * - * @param emul Pointer to emulator + * @param common_data Pointer to emulator common data * @param reg Register address or one of special values * (I2C_COMMON_EMUL_FAIL_ALL_REG, I2C_COMMON_EMUL_NO_FAIL_REG) */ -void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg); +void i2c_common_emul_set_write_fail_reg( + struct i2c_common_emul_data *common_data, int reg); /** * @biref Emulate an I2C transfer to an emulator @@ -347,7 +350,7 @@ void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg); * I2C message, calling user custom functions, failing on reading/writing * registers selected by user and calling device specific functions. * - * @param emul I2C emulation information + * @param target The target peripheral emulated * @param msgs List of messages to process * @param num_msgs Number of messages to process * @param addr Address of the I2C target device @@ -355,9 +358,15 @@ void i2c_common_emul_set_write_fail_reg(struct i2c_emul *emul, int reg); * @retval 0 If successful * @retval -EIO General input / output error */ -int i2c_common_emul_transfer(struct i2c_emul *emul, struct i2c_msg *msgs, +int i2c_common_emul_transfer(const struct emul *target, struct i2c_msg *msgs, int num_msgs, int addr); +int i2c_common_emul_transfer_workhorse(const struct emul *target, + struct i2c_common_emul_data *data, + const struct i2c_common_emul_cfg *cfg, + struct i2c_msg *msgs, int num_msgs, + int addr); + /** * @brief Initialize common emulator data structure * diff --git a/zephyr/include/emul/emul_flash.h b/zephyr/include/emul/emul_flash.h new file mode 100644 index 0000000000..8148d4df96 --- /dev/null +++ b/zephyr/include/emul/emul_flash.h @@ -0,0 +1,22 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for Cros flash emulator + */ + +#ifndef ZEPHYR_INCLUDE_EMUL_EMUL_FLASH_H_ +#define ZEPHYR_INCLUDE_EMUL_EMUL_FLASH_H_ + +#include <ec_commands.h> + +/** + * @brief Reset the protection. + */ +void cros_flash_emul_protect_reset(void); + +#endif /* ZEPHYR_INCLUDE_EMUL_EMUL_FLASH_H_ */ diff --git a/zephyr/include/emul/emul_isl923x.h b/zephyr/include/emul/emul_isl923x.h index 5842cdcf02..e41cf26f87 100644 --- a/zephyr/include/emul/emul_isl923x.h +++ b/zephyr/include/emul/emul_isl923x.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,14 +19,13 @@ const struct device *isl923x_emul_get_parent(const struct emul *emulator); /** - * @brief Get the I2C emulator struct - * - * This is generally coupled with calls to i2c_common_emul_* functions. + * @brief Get pointer to emulator i2c_common_emul_cfg * * @param emulator The emulator to look-up - * @return Pointer to the I2C emulator struct + * @return Pointer to the i2c_common_emul_cfg struct */ -struct i2c_emul *isl923x_emul_get_i2c_emul(const struct emul *emulator); +const struct i2c_common_emul_cfg * +isl923x_emul_get_cfg(const struct emul *emulator); /** * @brief Reset all registers @@ -94,6 +93,15 @@ void raa489000_emul_set_acok_pin(const struct emul *emulator, uint16_t value); * @param reg The address of the register to query * @return The 16-bit value of the register */ -uint16_t isl923x_emul_peek_reg(struct i2c_emul *i2c_emul, int reg); +uint16_t isl923x_emul_peek_reg(const struct emul *emul, int reg); + +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to ISL923X emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_isl923x_get_i2c_common_data(const struct emul *emul); #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_ISL923X_H_ */ diff --git a/zephyr/include/emul/emul_kb_raw.h b/zephyr/include/emul/emul_kb_raw.h index ba4ea8e58f..1660ccefd4 100644 --- a/zephyr/include/emul/emul_kb_raw.h +++ b/zephyr/include/emul/emul_kb_raw.h @@ -1,8 +1,10 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include <stdint.h> + /** * @file * @@ -36,6 +38,13 @@ int emul_kb_raw_set_kbstate(const struct device *dev, uint8_t row, uint8_t col, int pressed); /** + * @brief Resets the keyboard to its initial state. + * + * @param dev Pointer to kb_raw emulator device. + */ +void emul_kb_raw_reset(const struct device *dev); + +/** * @} */ diff --git a/zephyr/include/emul/emul_lis2dw12.h b/zephyr/include/emul/emul_lis2dw12.h index c61751183e..5410a54cdd 100644 --- a/zephyr/include/emul/emul_lis2dw12.h +++ b/zephyr/include/emul/emul_lis2dw12.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,14 +10,6 @@ #include <zephyr/drivers/i2c_emul.h> /** - * @brief The the i2c emulator pointer from the top level emul. - * - * @param emul The emulator to query - * @return Pointer to the i2c emulator struct - */ -struct i2c_emul *lis2dw12_emul_to_i2c_emul(const struct emul *emul); - -/** * @brief Reset the state of the lis2dw12 emulator. * * @param emul The emulator to reset. @@ -54,7 +46,7 @@ uint32_t lis2dw12_emul_get_soft_reset_count(const struct emul *emul); * @param reg The register to access * @return The value of the register */ -uint8_t lis2dw12_emul_peek_reg(struct i2c_emul *emul, int reg); +uint8_t lis2dw12_emul_peek_reg(const struct emul *emul, int reg); /** * @brief Retrieves the ODR[3:0] bits from CRTL1 register @@ -62,7 +54,7 @@ uint8_t lis2dw12_emul_peek_reg(struct i2c_emul *emul, int reg); * @param emul The emulator to query * @return The ODR bits, right-aligned */ -uint8_t lis2dw12_emul_peek_odr(struct i2c_emul *emul); +uint8_t lis2dw12_emul_peek_odr(const struct emul *emul); /** * @brief Retrieves the MODE[1:0] bits from CRTL1 register @@ -70,7 +62,7 @@ uint8_t lis2dw12_emul_peek_odr(struct i2c_emul *emul); * @param emul The emulator to query * @return The MODE bits, right-aligned */ -uint8_t lis2dw12_emul_peek_mode(struct i2c_emul *emul); +uint8_t lis2dw12_emul_peek_mode(const struct emul *emul); /** * @brief Retrieves the LPMODE[1:0] bits from CRTL1 register @@ -78,7 +70,7 @@ uint8_t lis2dw12_emul_peek_mode(struct i2c_emul *emul); * @param emul The emulator to query * @return The LPMODE bits, right-aligned */ -uint8_t lis2dw12_emul_peek_lpmode(struct i2c_emul *emul); +uint8_t lis2dw12_emul_peek_lpmode(const struct emul *emul); /** * @brief Updates the current 3-axis acceleromter reading and @@ -87,8 +79,7 @@ uint8_t lis2dw12_emul_peek_lpmode(struct i2c_emul *emul); * @param reading array of int X, Y, and Z readings. * @return 0 on success, or -EINVAL if readings are out of bounds. */ -int lis2dw12_emul_set_accel_reading(const struct emul *emul, - intv3_t reading); +int lis2dw12_emul_set_accel_reading(const struct emul *emul, intv3_t reading); /** * @brief Clears the current accelerometer reading and resets the @@ -97,4 +88,13 @@ int lis2dw12_emul_set_accel_reading(const struct emul *emul, */ void lis2dw12_emul_clear_accel_reading(const struct emul *emul); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to LIS2DW12 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_lis2dw12_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_LIS2DW12_H_ */ diff --git a/zephyr/include/emul/emul_ln9310.h b/zephyr/include/emul/emul_ln9310.h index 6f34a15f93..0c0e61003e 100644 --- a/zephyr/include/emul/emul_ln9310.h +++ b/zephyr/include/emul/emul_ln9310.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -80,4 +80,13 @@ bool ln9310_emul_is_init(const struct emul *emulator); */ struct i2c_emul *ln9310_emul_get_i2c_emul(const struct emul *emulator); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to LN9310 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_ln9310_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_LN9310_H_ */ diff --git a/zephyr/include/emul/emul_pi3usb9201.h b/zephyr/include/emul/emul_pi3usb9201.h index 93e87c20e0..05feff567f 100644 --- a/zephyr/include/emul/emul_pi3usb9201.h +++ b/zephyr/include/emul/emul_pi3usb9201.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -22,15 +22,6 @@ #define PI3USB9201_REG_HOST_STS 0x3 /** - * @brief Get pointer to pi3usb9201 emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to pi3usb9201 emulator - */ -struct i2c_emul *pi3usb9201_emul_get(int ord); - -/** * @brief Set value of given register of pi3usb9201 * * @param emul Pointer to pi3usb9201 emulator @@ -39,7 +30,7 @@ struct i2c_emul *pi3usb9201_emul_get(int ord); * * @return 0 on success or error */ -int pi3usb9201_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +int pi3usb9201_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of pi3usb9201 @@ -50,6 +41,6 @@ int pi3usb9201_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return 0 on success or error */ -int pi3usb9201_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val); +int pi3usb9201_emul_get_reg(const struct emul *emul, int reg, uint8_t *val); #endif /* __EMUL_PI3USB9201_H */ diff --git a/zephyr/include/emul/emul_rt9490.h b/zephyr/include/emul/emul_rt9490.h new file mode 100644 index 0000000000..0cb4f7b076 --- /dev/null +++ b/zephyr/include/emul/emul_rt9490.h @@ -0,0 +1,15 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef EMUL_RT9490_H +#define EMUL_RT9490_H + +#include <zephyr/drivers/emul.h> + +void rt9490_emul_reset_regs(const struct emul *emul); + +int rt9490_emul_peek_reg(const struct emul *emul, int reg); + +#endif diff --git a/zephyr/include/emul/emul_smart_battery.h b/zephyr/include/emul/emul_smart_battery.h index 034cb6915b..826e817992 100644 --- a/zephyr/include/emul/emul_smart_battery.h +++ b/zephyr/include/emul/emul_smart_battery.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,6 +17,8 @@ #include <zephyr/drivers/i2c_emul.h> #include <stdint.h> +#include "emul/emul_common_i2c.h" + /** * @brief Smart Battery emulator backend API * @defgroup sbat_emul Smart Battery emulator @@ -38,11 +40,11 @@ */ /* Value used to indicate that no command is selected */ -#define SBAT_EMUL_NO_CMD -1 +#define SBAT_EMUL_NO_CMD -1 /* Maximum size of data that can be returned in SMBus block transaction */ -#define MAX_BLOCK_SIZE 32 +#define MAX_BLOCK_SIZE 32 /* Maximum length of command to send is maximum size of data + len byte + PEC */ -#define MSG_BUF_LEN (MAX_BLOCK_SIZE + 2) +#define MSG_BUF_LEN (MAX_BLOCK_SIZE + 2) /** @brief Emulated smart battery properties */ struct sbat_emul_bat_data { @@ -65,6 +67,8 @@ struct sbat_emul_bat_data { uint16_t error_code; /** Design battery voltage in mV */ uint16_t design_mv; + /** Default Design battery voltage in mV */ + const uint16_t default_design_mv; /** Battery temperature at the moment in Kelvins */ uint16_t temp; /** Battery voltage at the moment in mV */ @@ -77,8 +81,12 @@ struct sbat_emul_bat_data { uint16_t max_error; /** Capacity of the battery at the moment in mAh */ uint16_t cap; + /** Default capacity of the battery at the moment in mAh */ + const uint16_t default_cap; /** Full capacity of the battery in mAh */ uint16_t full_cap; + /** Default full capacity of the battery at the moment in mAh */ + const uint16_t default_full_cap; /** Design battery capacity in mAh */ uint16_t design_cap; /** Charging current requested by battery */ @@ -111,25 +119,20 @@ struct sbat_emul_bat_data { uint8_t mf_data[MAX_BLOCK_SIZE]; /** Manufacturer data length */ int mf_data_len; + /** Manufacture info */ + uint8_t mf_info[MAX_BLOCK_SIZE]; + /** Manufacture info length */ + int mf_info_len; }; /** - * @brief Get pointer to smart battery emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to smart battery emulator - */ -struct i2c_emul *sbat_emul_get_ptr(int ord); - -/** * @brief Function which allows to get properties of emulated smart battery * * @param emul Pointer to smart battery emulator * * @return Pointer to smart battery properties */ -struct sbat_emul_bat_data *sbat_emul_get_bat_data(struct i2c_emul *emul); +struct sbat_emul_bat_data *sbat_emul_get_bat_data(const struct emul *emul); /** * @brief Convert date to format used by smart battery @@ -156,7 +159,7 @@ uint16_t sbat_emul_date_to_word(unsigned int day, unsigned int month, * @return 1 if command is unknown or return type different then word * @return negative on error while reading value */ -int sbat_emul_get_word_val(struct i2c_emul *emul, int cmd, uint16_t *val); +int sbat_emul_get_word_val(const struct emul *emul, int cmd, uint16_t *val); /** * @brief Function which gets return value for read commands that returns block @@ -171,7 +174,7 @@ int sbat_emul_get_word_val(struct i2c_emul *emul, int cmd, uint16_t *val); * @return 1 if command is unknown or return type different then word * @return negative on error while reading value */ -int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, +int sbat_emul_get_block_data(const struct emul *emul, int cmd, uint8_t **blk, int *len); /** @@ -184,10 +187,19 @@ int sbat_emul_get_block_data(struct i2c_emul *emul, int cmd, uint8_t **blk, * @param len Length of the response * @param fail If emulator should fail to send response */ -void sbat_emul_set_response(struct i2c_emul *emul, int cmd, uint8_t *buf, +void sbat_emul_set_response(const struct emul *emul, int cmd, uint8_t *buf, int len, bool fail); /** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to smart_battery emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_smart_battery_get_i2c_common_data(const struct emul *emul); + +/** * @} */ diff --git a/zephyr/include/emul/emul_sn5s330.h b/zephyr/include/emul/emul_sn5s330.h index cc5576819e..77141e679b 100644 --- a/zephyr/include/emul/emul_sn5s330.h +++ b/zephyr/include/emul/emul_sn5s330.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,4 +47,13 @@ void sn5s330_emul_make_vbus_overcurrent(const struct emul *emul); */ void sn5s330_emul_lower_vbus_below_minv(const struct emul *emul); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to SN5S330 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_sn5s330_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_SN5S330_H_ */ diff --git a/zephyr/include/emul/emul_stub_device.h b/zephyr/include/emul/emul_stub_device.h new file mode 100644 index 0000000000..8eb8a60a28 --- /dev/null +++ b/zephyr/include/emul/emul_stub_device.h @@ -0,0 +1,42 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_INCLUDE_EMUL_STUB_DEVICE_H_ +#define ZEPHYR_INCLUDE_EMUL_STUB_DEVICE_H_ + +#include <zephyr/device.h> +#include <zephyr/devicetree.h> + +/* + * Needed for emulators without corresponding DEVICE_DT_DEFINE drivers + */ + +struct emul_stub_dev_data { + /* Stub */ +}; +struct emul_stub_dev_config { + /* Stub */ +}; +struct emul_stub_dev_api { + /* Stub */ +}; + +/* For every instance of a DT_DRV_COMPAT stub out a device for that instance */ +#define EMUL_STUB_DEVICE(n) \ + __maybe_unused static int emul_init_stub_##n(const struct device *dev) \ + { \ + ARG_UNUSED(dev); \ + return 0; \ + } \ + \ + /* Since this is only stub, allocate the structs once. */ \ + static struct emul_stub_dev_data stub_data_##n; \ + static struct emul_stub_dev_config stub_config_##n; \ + static struct emul_stub_dev_api stub_api_##n; \ + DEVICE_DT_INST_DEFINE(n, &emul_init_stub_##n, NULL, &stub_data_##n, \ + &stub_config_##n, POST_KERNEL, 1, \ + &stub_api_##n); + +#endif /* ZEPHYR_INCLUDE_EMUL_STUB_DEVICE_H_ */ diff --git a/zephyr/include/emul/emul_syv682x.h b/zephyr/include/emul/emul_syv682x.h index f08960ccac..78ee2406eb 100644 --- a/zephyr/include/emul/emul_syv682x.h +++ b/zephyr/include/emul/emul_syv682x.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,100 +17,91 @@ /* Register info copied from syv682.h */ /* SYV682x register addresses */ -#define SYV682X_STATUS_REG 0x00 -#define SYV682X_CONTROL_1_REG 0x01 -#define SYV682X_CONTROL_2_REG 0x02 -#define SYV682X_CONTROL_3_REG 0x03 -#define SYV682X_CONTROL_4_REG 0x04 +#define SYV682X_STATUS_REG 0x00 +#define SYV682X_CONTROL_1_REG 0x01 +#define SYV682X_CONTROL_2_REG 0x02 +#define SYV682X_CONTROL_3_REG 0x03 +#define SYV682X_CONTROL_4_REG 0x04 /* Status Register */ -#define SYV682X_STATUS_OC_HV BIT(7) -#define SYV682X_STATUS_RVS BIT(6) -#define SYV682X_STATUS_OC_5V BIT(5) -#define SYV682X_STATUS_OVP BIT(4) -#define SYV682X_STATUS_FRS BIT(3) -#define SYV682X_STATUS_TSD BIT(2) +#define SYV682X_STATUS_OC_HV BIT(7) +#define SYV682X_STATUS_RVS BIT(6) +#define SYV682X_STATUS_OC_5V BIT(5) +#define SYV682X_STATUS_OVP BIT(4) +#define SYV682X_STATUS_FRS BIT(3) +#define SYV682X_STATUS_TSD BIT(2) #define SYV682X_STATUS_VSAFE_5V BIT(1) #define SYV682X_STATUS_VSAFE_0V BIT(0) #define SYV682X_STATUS_INT_MASK 0xfc -#define SYV682X_STATUS_NONE 0 +#define SYV682X_STATUS_NONE 0 /* Control Register 1 */ -#define SYV682X_CONTROL_1_CH_SEL BIT(1) -#define SYV682X_CONTROL_1_HV_DR BIT(2) -#define SYV682X_CONTROL_1_PWR_ENB BIT(7) - -#define SYV682X_5V_ILIM_MASK 0x18 -#define SYV682X_5V_ILIM_BIT_SHIFT 3 -#define SYV682X_5V_ILIM_1_25 0 -#define SYV682X_5V_ILIM_1_75 1 -#define SYV682X_5V_ILIM_2_25 2 -#define SYV682X_5V_ILIM_3_30 3 - -#define SYV682X_HV_ILIM_MASK 0x60 -#define SYV682X_HV_ILIM_BIT_SHIFT 5 -#define SYV682X_HV_ILIM_1_25 0 -#define SYV682X_HV_ILIM_1_75 1 -#define SYV682X_HV_ILIM_3_30 2 -#define SYV682X_HV_ILIM_5_50 3 +#define SYV682X_CONTROL_1_CH_SEL BIT(1) +#define SYV682X_CONTROL_1_HV_DR BIT(2) +#define SYV682X_CONTROL_1_PWR_ENB BIT(7) + +#define SYV682X_5V_ILIM_MASK 0x18 +#define SYV682X_5V_ILIM_BIT_SHIFT 3 +#define SYV682X_5V_ILIM_1_25 0 +#define SYV682X_5V_ILIM_1_75 1 +#define SYV682X_5V_ILIM_2_25 2 +#define SYV682X_5V_ILIM_3_30 3 + +#define SYV682X_HV_ILIM_MASK 0x60 +#define SYV682X_HV_ILIM_BIT_SHIFT 5 +#define SYV682X_HV_ILIM_1_25 0 +#define SYV682X_HV_ILIM_1_75 1 +#define SYV682X_HV_ILIM_3_30 2 +#define SYV682X_HV_ILIM_5_50 3 /* Control Register 2 */ -#define SYV682X_OC_DELAY_MASK GENMASK(7, 6) -#define SYV682X_OC_DELAY_SHIFT 6 -#define SYV682X_OC_DELAY_1MS 0 -#define SYV682X_OC_DELAY_10MS 1 -#define SYV682X_OC_DELAY_50MS 2 -#define SYV682X_OC_DELAY_100MS 3 -#define SYV682X_DSG_TIME_MASK GENMASK(5, 4) -#define SYV682X_DSG_TIME_SHIFT 4 -#define SYV682X_DSG_TIME_50MS 0 -#define SYV682X_DSG_TIME_100MS 1 -#define SYV682X_DSG_TIME_200MS 2 -#define SYV682X_DSG_TIME_400MS 3 -#define SYV682X_DSG_RON_MASK GENMASK(3, 2) -#define SYV682X_DSG_RON_SHIFT 2 -#define SYV682X_DSG_RON_200_OHM 0 -#define SYV682X_DSG_RON_400_OHM 1 -#define SYV682X_DSG_RON_800_OHM 2 -#define SYV682X_DSG_RON_1600_OHM 3 -#define SYV682X_CONTROL_2_SDSG BIT(1) -#define SYV682X_CONTROL_2_FDSG BIT(0) +#define SYV682X_OC_DELAY_MASK GENMASK(7, 6) +#define SYV682X_OC_DELAY_SHIFT 6 +#define SYV682X_OC_DELAY_1MS 0 +#define SYV682X_OC_DELAY_10MS 1 +#define SYV682X_OC_DELAY_50MS 2 +#define SYV682X_OC_DELAY_100MS 3 +#define SYV682X_DSG_TIME_MASK GENMASK(5, 4) +#define SYV682X_DSG_TIME_SHIFT 4 +#define SYV682X_DSG_TIME_50MS 0 +#define SYV682X_DSG_TIME_100MS 1 +#define SYV682X_DSG_TIME_200MS 2 +#define SYV682X_DSG_TIME_400MS 3 +#define SYV682X_DSG_RON_MASK GENMASK(3, 2) +#define SYV682X_DSG_RON_SHIFT 2 +#define SYV682X_DSG_RON_200_OHM 0 +#define SYV682X_DSG_RON_400_OHM 1 +#define SYV682X_DSG_RON_800_OHM 2 +#define SYV682X_DSG_RON_1600_OHM 3 +#define SYV682X_CONTROL_2_SDSG BIT(1) +#define SYV682X_CONTROL_2_FDSG BIT(0) /* Control Register 3 */ -#define SYV682X_BUSY BIT(7) -#define SYV682X_RVS_MASK BIT(3) -#define SYV682X_RST_REG BIT(0) -#define SYV682X_OVP_MASK 0x70 -#define SYV682X_OVP_BIT_SHIFT 4 -#define SYV682X_OVP_06_0 0 -#define SYV682X_OVP_08_0 1 -#define SYV682X_OVP_11_1 2 -#define SYV682X_OVP_12_1 3 -#define SYV682X_OVP_14_2 4 -#define SYV682X_OVP_17_9 5 -#define SYV682X_OVP_21_6 6 -#define SYV682X_OVP_23_7 7 -#define SYV682X_CONTROL_3_NONE 0 +#define SYV682X_BUSY BIT(7) +#define SYV682X_RVS_MASK BIT(3) +#define SYV682X_RST_REG BIT(0) +#define SYV682X_OVP_MASK 0x70 +#define SYV682X_OVP_BIT_SHIFT 4 +#define SYV682X_OVP_06_0 0 +#define SYV682X_OVP_08_0 1 +#define SYV682X_OVP_11_1 2 +#define SYV682X_OVP_12_1 3 +#define SYV682X_OVP_14_2 4 +#define SYV682X_OVP_17_9 5 +#define SYV682X_OVP_21_6 6 +#define SYV682X_OVP_23_7 7 +#define SYV682X_CONTROL_3_NONE 0 /* Control Register 4 */ -#define SYV682X_CONTROL_4_CC1_BPS BIT(7) -#define SYV682X_CONTROL_4_CC2_BPS BIT(6) -#define SYV682X_CONTROL_4_VCONN1 BIT(5) -#define SYV682X_CONTROL_4_VCONN2 BIT(4) -#define SYV682X_CONTROL_4_VBAT_OVP BIT(3) -#define SYV682X_CONTROL_4_VCONN_OCP BIT(2) -#define SYV682X_CONTROL_4_CC_FRS BIT(1) -#define SYV682X_CONTROL_4_INT_MASK 0x0c -#define SYV682X_CONTROL_4_NONE 0 - -/** - * @brief Get pointer to SYV682x emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to smart battery emulator - */ -struct i2c_emul *syv682x_emul_get(int ord); +#define SYV682X_CONTROL_4_CC1_BPS BIT(7) +#define SYV682X_CONTROL_4_CC2_BPS BIT(6) +#define SYV682X_CONTROL_4_VCONN1 BIT(5) +#define SYV682X_CONTROL_4_VCONN2 BIT(4) +#define SYV682X_CONTROL_4_VBAT_OVP BIT(3) +#define SYV682X_CONTROL_4_VCONN_OCP BIT(2) +#define SYV682X_CONTROL_4_CC_FRS BIT(1) +#define SYV682X_CONTROL_4_INT_MASK 0x0c +#define SYV682X_CONTROL_4_NONE 0 /** * @brief Set the underlying interrupt conditions affecting the SYV682x @@ -122,8 +113,8 @@ struct i2c_emul *syv682x_emul_get(int ord); * conditions; only the bits in SYV682X_CONTROL_4_INT_MASK have * an effect. */ -void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, - uint8_t control_4); +void syv682x_emul_set_condition(const struct emul *emul, uint8_t status, + uint8_t control_4); /** * @brief Cause CONTROL_3[BUSY] to be set for a number of reads. This bit @@ -133,7 +124,7 @@ void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, * @param emul SYV682x emulator * @param reads The number of reads of CONTROL_3 to keep BUSY set for */ -void syv682x_emul_set_busy_reads(struct i2c_emul *emul, int reads); +void syv682x_emul_set_busy_reads(const struct emul *emul, int reads); /** * @brief Set value of a register of SYV682x @@ -144,7 +135,7 @@ void syv682x_emul_set_busy_reads(struct i2c_emul *emul, int reads); * * @return 0 on success, error code on error */ -int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +int syv682x_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of a register of SYV682x @@ -155,6 +146,15 @@ int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return 0 on success, error code on error */ -int syv682x_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val); +int syv682x_emul_get_reg(const struct emul *emul, int reg, uint8_t *val); + +/** + * @brief Returns pointer to i2c_common_emul_data for given emul + * + * @param emul Pointer to SYV682X emulator + * @return common_data Pointer to i2c_common_emul_data + */ +struct i2c_common_emul_data * +emul_syv682x_get_i2c_common_data(const struct emul *emul); #endif /* __EMUL_SYV682X_H */ diff --git a/zephyr/include/emul/emul_tcs3400.h b/zephyr/include/emul/emul_tcs3400.h index a026f2624a..9daf8bce16 100644 --- a/zephyr/include/emul/emul_tcs3400.h +++ b/zephyr/include/emul/emul_tcs3400.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -43,19 +43,19 @@ * light, value obtainded with 128 cycles will be two times smaller than value * obtained with 256 cycles. */ -#define TCS_EMUL_MAX_CYCLES 256 +#define TCS_EMUL_MAX_CYCLES 256 /** * Maximum gain supported by TCS3400. Value read from sensor is multiplied by * gain selected in CONTROL register. */ -#define TCS_EMUL_MAX_GAIN 64 +#define TCS_EMUL_MAX_GAIN 64 /** * Emulator units are value returned with gain x64 and 256 integration cycles. * Max value is 1024 returned when gain is x1 and 1 integration cycle. Max value * represented in emulator units is 1024 * 64 * 256 */ -#define TCS_EMUL_MAX_VALUE (1024 * TCS_EMUL_MAX_GAIN * TCS_EMUL_MAX_CYCLES) +#define TCS_EMUL_MAX_VALUE (1024 * TCS_EMUL_MAX_GAIN * TCS_EMUL_MAX_CYCLES) /** Axis argument used in @ref tcs_emul_set_val @ref tcs_emul_get_val */ enum tcs_emul_axis { @@ -70,18 +70,9 @@ enum tcs_emul_axis { * Emulator saves only those registers in memory. IR select is stored sparately * and other registers are write only. */ -#define TCS_EMUL_FIRST_REG TCS_I2C_ENABLE -#define TCS_EMUL_LAST_REG TCS_I2C_BDATAH -#define TCS_EMUL_REG_COUNT (TCS_EMUL_LAST_REG - TCS_EMUL_FIRST_REG + 1) - -/** - * @brief Get pointer to TCS3400 emulator using device tree order number. - * - * @param ord Device tree order number obtained from DT_DEP_ORD macro - * - * @return Pointer to TCS3400 emulator - */ -struct i2c_emul *tcs_emul_get(int ord); +#define TCS_EMUL_FIRST_REG TCS_I2C_ENABLE +#define TCS_EMUL_LAST_REG TCS_I2C_BDATAH +#define TCS_EMUL_REG_COUNT (TCS_EMUL_LAST_REG - TCS_EMUL_FIRST_REG + 1) /** * @brief Set value of given register of TCS3400 @@ -90,7 +81,7 @@ struct i2c_emul *tcs_emul_get(int ord); * @param reg Register address which value will be changed * @param val New value of the register */ -void tcs_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); +void tcs_emul_set_reg(const struct emul *emul, int reg, uint8_t val); /** * @brief Get value of given register of TCS3400 @@ -100,7 +91,7 @@ void tcs_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val); * * @return Value of the register */ -uint8_t tcs_emul_get_reg(struct i2c_emul *emul, int reg); +uint8_t tcs_emul_get_reg(const struct emul *emul, int reg); /** * @brief Get internal value of light sensor for given axis @@ -110,7 +101,7 @@ uint8_t tcs_emul_get_reg(struct i2c_emul *emul, int reg); * * @return Value of given axis with gain x64 and 256 integration cycles */ -int tcs_emul_get_val(struct i2c_emul *emul, enum tcs_emul_axis axis); +int tcs_emul_get_val(const struct emul *emul, enum tcs_emul_axis axis); /** * @brief Set internal value of light sensor for given axis @@ -120,7 +111,8 @@ int tcs_emul_get_val(struct i2c_emul *emul, enum tcs_emul_axis axis); * @param val New value of light sensor for given axis with gain x64 and * 256 integration cycles */ -void tcs_emul_set_val(struct i2c_emul *emul, enum tcs_emul_axis axis, int val); +void tcs_emul_set_val(const struct emul *emul, enum tcs_emul_axis axis, + int val); /** * @brief Set if error should be generated when read only register is being @@ -129,7 +121,7 @@ void tcs_emul_set_val(struct i2c_emul *emul, enum tcs_emul_axis axis, int val); * @param emul Pointer to TCS3400 emulator * @param set Check for this error */ -void tcs_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); +void tcs_emul_set_err_on_ro_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when reserved bits of register are @@ -138,7 +130,7 @@ void tcs_emul_set_err_on_ro_write(struct i2c_emul *emul, bool set); * @param emul Pointer to TCS3400 emulator * @param set Check for this error */ -void tcs_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); +void tcs_emul_set_err_on_rsvd_write(const struct emul *emul, bool set); /** * @brief Set if error should be generated when MSB register is accessed before @@ -147,7 +139,16 @@ void tcs_emul_set_err_on_rsvd_write(struct i2c_emul *emul, bool set); * @param emul Pointer to TCS3400 emulator * @param set Check for this error */ -void tcs_emul_set_err_on_msb_first(struct i2c_emul *emul, bool set); +void tcs_emul_set_err_on_msb_first(const struct emul *emul, bool set); + +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to tcs3400 emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_tcs3400_get_i2c_common_data(const struct emul *emul); /** * @} diff --git a/zephyr/include/emul/i2c_mock.h b/zephyr/include/emul/i2c_mock.h index e52c4e7440..e5c359a3fd 100644 --- a/zephyr/include/emul/i2c_mock.h +++ b/zephyr/include/emul/i2c_mock.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -32,4 +32,13 @@ struct i2c_emul *i2c_mock_to_i2c_emul(const struct emul *emul); */ uint16_t i2c_mock_get_addr(const struct emul *emul); +/** + * @brief Returns pointer to i2c_common_emul_data for argument emul + * + * @param emul Pointer to i2c_mock emulator + * @return Pointer to i2c_common_emul_data from argument emul + */ +struct i2c_common_emul_data * +emul_i2c_mock_get_i2c_common_data(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_I2C_MOCK_H_ */ diff --git a/zephyr/include/emul/tcpc/emul_ps8xxx.h b/zephyr/include/emul/tcpc/emul_ps8xxx.h index aff21e94c7..6e96af571b 100644 --- a/zephyr/include/emul/tcpc/emul_ps8xxx.h +++ b/zephyr/include/emul/tcpc/emul_ps8xxx.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -47,19 +47,20 @@ enum ps8xxx_emul_port { }; /* For now all devices supported by this emulator has the same FW rev reg */ -#define PS8XXX_REG_FW_REV 0x82 +#define PS8XXX_REG_FW_REV 0x82 /** - * @brief Get pointer to specific "hidden" I2C device + * @brief Get pointer to i2c_common_data for specific "hidden" I2C device * * @param emul Pointer to PS8xxx emulator * @param port Select which "hidden" I2C device should be obtained * * @return NULL if given "hidden" I2C device cannot be found - * @return pointer to "hidden" I2C device + * @return pointer to "hidden" device i2c_common_emul_data */ -struct i2c_emul *ps8xxx_emul_get_i2c_emul(const struct emul *emul, - enum ps8xxx_emul_port port); +struct i2c_common_emul_data * +ps8xxx_emul_get_i2c_common_data(const struct emul *emul, + enum ps8xxx_emul_port port); /** * @brief Get pointer to TCPCI emulator that is base for PS8xxx emulator diff --git a/zephyr/include/emul/tcpc/emul_tcpci.h b/zephyr/include/emul/tcpc/emul_tcpci.h index dd225c5f6e..8175b9ce96 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci.h +++ b/zephyr/include/emul/tcpc/emul_tcpci.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,27 +17,13 @@ #include <zephyr/drivers/i2c_emul.h> #include <usb_pd_tcpm.h> +#include "emul/emul_common_i2c.h" + /** - * @brief TCPCI emulator backend API - * @defgroup tcpci_emul TCPCI emulator - * @{ - * - * TCPCI emulator supports access to its registers using I2C messages. - * It follows Type-C Port Controller Interface Specification. It is possible - * to use this emulator as base for implementation of specific TCPC emulator - * which follows TCPCI specification. Emulator allows to set callbacks - * on change of CC status or transmitting message to implement partner emulator. - * There is also callback used to inform about alert line state change. - * Application may alter emulator state: - * - * - call @ref tcpci_emul_set_reg and @ref tcpci_emul_get_reg to set and get - * value of TCPCI registers - * - call functions from emul_common_i2c.h to setup custom handlers for I2C - * messages - * - call @ref tcpci_emul_add_rx_msg to setup received SOP messages - * - call @ref tcpci_emul_get_tx_msg to examine sended message - * - call @ref tcpci_emul_set_rev to set revision of emulated TCPCI + * Number of emulated register. This include vendor registers defined in TCPCI + * specification */ +#define TCPCI_EMUL_REG_COUNT 0x100 /** SOP message structure */ struct tcpci_emul_msg { @@ -46,7 +32,7 @@ struct tcpci_emul_msg { /** Number of bytes in buf */ int cnt; /** Type of message (SOP, SOP', etc) */ - uint8_t type; + uint8_t sop_type; /** Index used to mark accessed byte */ int idx; /** Pointer to optional second message */ @@ -64,6 +50,80 @@ struct tcpci_emul_msg { typedef void (*tcpci_emul_alert_state_func)(const struct emul *emul, bool alert, void *data); +/** Run-time data used by the emulator */ +struct tcpci_ctx { + /** Common I2C data for TCPC */ + struct i2c_common_emul_data common; + + /** Current state of all emulated TCPCI registers */ + uint8_t reg[TCPCI_EMUL_REG_COUNT]; + + /** Structures representing TX and RX buffers */ + struct tcpci_emul_msg *rx_msg; + struct tcpci_emul_msg *tx_msg; + + /** Data that should be written to register (except TX_BUFFER) */ + uint16_t write_data; + + /** Return error when trying to write to RO register */ + bool error_on_ro_write; + /** Return error when trying to write 1 to reserved bit */ + bool error_on_rsvd_write; + + /** User function called when alert line could change */ + tcpci_emul_alert_state_func alert_callback; + /** Data passed to alert_callback */ + void *alert_callback_data; + + /** Callbacks for TCPCI partner */ + const struct tcpci_emul_partner_ops *partner; + + /** Reference to Alert# GPIO emulator. */ + const struct device *alert_gpio_port; + gpio_pin_t alert_gpio_pin; +}; + +/** Run-time data used by the emulator */ +struct tcpc_emul_data { + /** Pointer to the common TCPCI emulator context */ + struct tcpci_ctx *tcpci_ctx; + + /** Pointer to chip specific data */ + void *chip_data; + + const struct i2c_common_emul_cfg i2c_cfg; +}; + +#define TCPCI_EMUL_DEFINE(n, init, cfg_ptr, chip_data_ptr, bus_api) \ + static uint8_t tcpci_emul_tx_buf_##n[128]; \ + static struct tcpci_emul_msg tcpci_emul_tx_msg_##n = { \ + .buf = tcpci_emul_tx_buf_##n, \ + }; \ + static struct tcpci_ctx tcpci_ctx##n = { \ + .tx_msg = &tcpci_emul_tx_msg_##n, \ + .error_on_ro_write = true, \ + .error_on_rsvd_write = true, \ + .alert_gpio_port = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, alert_gpio), \ + (DEVICE_DT_GET(DT_GPIO_CTLR( \ + DT_INST_PROP(n, alert_gpio), gpios))), \ + (NULL)), \ + .alert_gpio_pin = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, alert_gpio), \ + (DT_GPIO_PIN(DT_INST_PROP(n, alert_gpio), gpios)), \ + (0)), \ + }; \ + static struct tcpc_emul_data tcpc_emul_data_##n = { \ + .tcpci_ctx = &tcpci_ctx##n, \ + .chip_data = chip_data_ptr, \ + .i2c_cfg = { \ + .dev_label = DT_NODE_FULL_NAME(DT_DRV_INST(n)), \ + .data = &tcpci_ctx##n.common, \ + .addr = DT_INST_REG_ADDR(n), \ + }, \ + }; \ + EMUL_DT_INST_DEFINE(n, init, &tcpc_emul_data_##n, cfg_ptr, bus_api) + /** Response from TCPCI specific device operations */ enum tcpci_emul_ops_resp { TCPCI_EMUL_CONTINUE = 0, @@ -72,10 +132,7 @@ enum tcpci_emul_ops_resp { }; /** Revisions supported by TCPCI emaluator */ -enum tcpci_emul_rev { - TCPCI_EMUL_REV1_0_VER1_0 = 0, - TCPCI_EMUL_REV2_0_VER1_1 -}; +enum tcpci_emul_rev { TCPCI_EMUL_REV1_0_VER1_0 = 0, TCPCI_EMUL_REV2_0_VER1_1 }; /** Status of TX message send to TCPCI emulator partner */ enum tcpci_emul_tx_status { @@ -90,67 +147,6 @@ enum tcpci_emul_tx_status { TCPCI_EMUL_TX_UNKNOWN }; -/** TCPCI specific device operations. Not all of them need to be implemented. */ -struct tcpci_emul_dev_ops { - /** - * @brief Function called for each byte of read message - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - * @param reg First byte of last write message - * @param val Pointer where byte to read should be stored - * @param bytes Number of bytes already readded - * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error - */ - enum tcpci_emul_ops_resp (*read_byte)(const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, uint8_t *val, int bytes); - - /** - * @brief Function called for each byte of write message - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - * @param reg First byte of write message - * @param val Received byte of write message - * @param bytes Number of bytes already received - * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error - */ - enum tcpci_emul_ops_resp (*write_byte)(const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, uint8_t val, int bytes); - - /** - * @brief Function called on the end of write message - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - * @param reg Register which is written - * @param msg_len Length of handled I2C message - * - * @return TCPCI_EMUL_CONTINUE to continue with default handler - * @return TCPCI_EMUL_DONE to immedietly return success - * @return TCPCI_EMUL_ERROR to immedietly return error - */ - enum tcpci_emul_ops_resp (*handle_write)(const struct emul *emul, - const struct tcpci_emul_dev_ops *ops, - int reg, int msg_len); - - /** - * @brief Function called on reset - * - * @param emul Pointer to TCPCI emulator - * @param ops Pointer to device operations structure - */ - void (*reset)(const struct emul *emul, struct tcpci_emul_dev_ops *ops); -}; - /** TCPCI partner operations. Not all of them need to be implemented. */ struct tcpci_emul_partner_ops { /** @@ -166,8 +162,7 @@ struct tcpci_emul_partner_ops { void (*transmit)(const struct emul *emul, const struct tcpci_emul_partner_ops *ops, const struct tcpci_emul_msg *tx_msg, - enum tcpci_msg_type type, - int retry); + enum tcpci_msg_type type, int retry); /** * @brief Function called when control settings change to allow partner @@ -201,18 +196,9 @@ struct tcpci_emul_partner_ops { }; /** - * @brief Get i2c_emul for TCPCI emulator - * - * @param emul Pointer to TCPCI emulator - * - * @return Pointer to I2C TCPCI emulator - */ -struct i2c_emul *tcpci_emul_get_i2c_emul(const struct emul *emul); - -/** * @brief Set value of given register of TCPCI * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param reg Register address which value will be changed * @param val New value of the register * @@ -222,6 +208,68 @@ struct i2c_emul *tcpci_emul_get_i2c_emul(const struct emul *emul); int tcpci_emul_set_reg(const struct emul *emul, int reg, uint16_t val); /** + * @brief Function called for each byte of read message from TCPCI + * + * @param emul Pointer to TCPC emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already readded + * + * @return 0 on success + */ +int tcpci_emul_read_byte(const struct emul *emul, int reg, uint8_t *val, + int bytes); + +/** + * @brief Function called for each byte of write message from TCPCI. + * Data are stored in write_data field of tcpci_emul_data or in tx_msg + * in case of writing to TX buffer. + * + * @param emul Pointer to TCPC emulator + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return 0 on success + * @return -EIO on invalid write to TX buffer + */ +int tcpci_emul_write_byte(const struct emul *emul, int reg, uint8_t val, + int bytes); + +/** + * @brief Handle I2C write message. It is checked if accessed register isn't RO + * and reserved bits are set to 0. + * + * @param emul Pointer to TCPC emulator + * @param reg Register which is written + * @param msg_len Length of handled I2C message + * + * @return 0 on success + * @return -EIO on error + */ +int tcpci_emul_handle_write(const struct emul *emul, int reg, int msg_len); + +/** + * @brief Set up a new TCPCI emulator + * + * This should be called for each TCPC device that needs to be + * registered on the I2C bus. + * + * @param emul Pointer to TCPC emulator + * @param parent Pointer to emulated I2C bus + */ +void tcpci_emul_i2c_init(const struct emul *emul, const struct device *i2c_dev); + +/** + * @brief Reset registers to default values. Vendor and reserved registers + * are not changed. + * + * @param emul Pointer to TCPC emulator + * @return 0 if successful + */ +int tcpci_emul_reset(const struct emul *emul); + +/** * @brief Get value of given register of TCPCI * * @param emul Pointer to TCPCI emulator @@ -237,7 +285,7 @@ int tcpci_emul_get_reg(const struct emul *emul, int reg, uint16_t *val); /** * @brief Add up to two SOP RX messages * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param rx_msg Pointer to message that is added * @param alert Select if alert register should be updated * @@ -255,7 +303,7 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, /** * @brief Get SOP TX message to examine what was sended by TCPM * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return Pointer to TX message */ @@ -264,24 +312,15 @@ struct tcpci_emul_msg *tcpci_emul_get_tx_msg(const struct emul *emul); /** * @brief Set TCPCI revision in PD_INT_REV register * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param rev Requested revision */ void tcpci_emul_set_rev(const struct emul *emul, enum tcpci_emul_rev rev); /** - * @brief Set callbacks for specific TCPC device emulator - * - * @param emul Pointer to TCPCI emulator - * @param dev_ops Pointer to callbacks - */ -void tcpci_emul_set_dev_ops(const struct emul *emul, - struct tcpci_emul_dev_ops *dev_ops); - -/** * @brief Set callback which is called when alert register is changed * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param alert_callback Pointer to callback * @param alert_callback_data Pointer to data passed to callback as an argument */ @@ -292,7 +331,7 @@ void tcpci_emul_set_alert_callback(const struct emul *emul, /** * @brief Set callbacks for port partner device emulator * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param partner Pointer to callbacks */ void tcpci_emul_set_partner_ops(const struct emul *emul, @@ -301,7 +340,7 @@ void tcpci_emul_set_partner_ops(const struct emul *emul, /** * @brief Emulate connection of specific device to emulated TCPCI * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param partner_power_role Power role of connected partner (sink or source) * @param partner_cc1 Voltage on partner CC1 line (usually Rd or Rp) * @param partner_cc2 Voltage on partner CC2 line (usually open or Ra if active @@ -321,7 +360,7 @@ int tcpci_emul_connect_partner(const struct emul *emul, /** @brief Emulate the disconnection of the partner device to emulated TCPCI * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * * @return 0 on success */ @@ -330,13 +369,22 @@ int tcpci_emul_disconnect_partner(const struct emul *emul); /** * @brief Allows port partner to select if message was received correctly * - * @param emul Pointer to TCPCI emulator + * @param emul Pointer to TCPC emulator * @param status Status of sended message */ void tcpci_emul_partner_msg_status(const struct emul *emul, enum tcpci_emul_tx_status status); /** + * @brief Gets the common data associated with the tcpci chip overall + * + * @param emul Pointer to TCPC emulator + * @return Pointer to struct i2c_common_emul_data + */ +struct i2c_common_emul_data * +emul_tcpci_generic_get_i2c_common_data(const struct emul *emul); + +/** * @} */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h index 4988c48576..fb715a47dc 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_common.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,6 +14,7 @@ #include <zephyr/drivers/emul.h> #include <zephyr/kernel.h> +#include <zephyr/sys/atomic.h> #include <stdbool.h> #include <stdint.h> @@ -31,21 +32,20 @@ */ /** Timeout for other side to respond to PD message */ -#define TCPCI_PARTNER_RESPONSE_TIMEOUT_MS 30 -#define TCPCI_PARTNER_RESPONSE_TIMEOUT \ - K_MSEC(TCPCI_PARTNER_RESPONSE_TIMEOUT_MS) +#define TCPCI_PARTNER_RESPONSE_TIMEOUT_MS 30 +#define TCPCI_PARTNER_RESPONSE_TIMEOUT K_MSEC(TCPCI_PARTNER_RESPONSE_TIMEOUT_MS) /** Timeout for source to transition to requested state after accept */ -#define TCPCI_PARTNER_TRANSITION_TIMEOUT_MS 550 -#define TCPCI_PARTNER_TRANSITION_TIMEOUT \ - K_MSEC(TCPCI_PARTNER_TRANSITION_TIMEOUT_MS) +#define TCPCI_PARTNER_TRANSITION_TIMEOUT_MS 550 +#define TCPCI_PARTNER_TRANSITION_TIMEOUT \ + K_MSEC(TCPCI_PARTNER_TRANSITION_TIMEOUT_MS) /** Timeout for source to send capability again after failure */ -#define TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS 150 -#define TCPCI_SOURCE_CAPABILITY_TIMEOUT \ - K_MSEC(TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS) +#define TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS 150 +#define TCPCI_SOURCE_CAPABILITY_TIMEOUT \ + K_MSEC(TCPCI_SOURCE_CAPABILITY_TIMEOUT_MS) /** Timeout for source to send capability message after power swap */ -#define TCPCI_SWAP_SOURCE_START_TIMEOUT_MS 20 -#define TCPCI_SWAP_SOURCE_START_TIMEOUT \ - K_MSEC(TCPCI_SWAP_SOURCE_START_TIMEOUT_MS) +#define TCPCI_SWAP_SOURCE_START_TIMEOUT_MS 20 +#define TCPCI_SWAP_SOURCE_START_TIMEOUT \ + K_MSEC(TCPCI_SWAP_SOURCE_START_TIMEOUT_MS) /** Common data for TCPCI partner device emulators */ struct tcpci_partner_data { @@ -64,9 +64,13 @@ struct tcpci_partner_data { /** Mutex for to_send queue */ struct k_mutex to_send_mutex; /** Next SOP message id */ - int msg_id; + int sop_msg_id; + /** Next SOP' message id */ + int sop_prime_msg_id; /** Last received message id */ - int recv_msg_id; + int sop_recv_msg_id; + /** Last received SOP' message id */ + int sop_prime_recv_msg_id; /** Power role (used in message header) */ enum pd_power_role power_role; /** Data role (used in message header) */ @@ -100,7 +104,7 @@ struct tcpci_partner_data { */ bool in_soft_reset; /** Current AMS Control request being handled */ - enum pd_ctrl_msg_type cur_ams_ctrl_req; + enum pd_ctrl_msg_type cur_ams_ctrl_req; /** * If common code should send GoodCRC for each message. If false, * then one of extensions should call tcpci_emul_partner_msg_status(). @@ -129,6 +133,15 @@ struct tcpci_partner_data { * any status to received message. */ enum tcpci_emul_tx_status *received_msg_status; + /** Whether port partner is configured in DisplayPort mode */ + bool displayport_configured; + /** The number of Enter Mode REQs received since connection + * or the last Hard Reset, whichever was more recent. + */ + atomic_t mode_enter_attempts; + /* SVID of entered mode (0 if no mode is entered) */ + uint16_t entered_svid; + /* VDMs with which the partner responds to discovery REQs. The VDM * buffers include the VDM header, and the VDO counts include 1 for the * VDM header. This structure has space for the mode response for a @@ -140,6 +153,49 @@ struct tcpci_partner_data { int svids_vdos; uint32_t modes_vdm[VDO_MAX_SIZE]; int modes_vdos; + /* VDMs sent when responding to a mode entry command */ + uint32_t enter_mode_vdm[VDO_MAX_SIZE]; + int enter_mode_vdos; + /* VDMs sent when responding to DisplayPort status update command */ + uint32_t dp_status_vdm[VDO_MAX_SIZE]; + int dp_status_vdos; + /* VDMs sent when responding to DisplayPort config command */ + uint32_t dp_config_vdm[VDO_MAX_SIZE]; + int dp_config_vdos; + struct { + /* Index of the last battery we requested capabilities for. The + * BCDB response does not include the index so we need to track + * it manually. -1 indicates no outstanding request. + */ + int index; + /* Stores Battery Capability Data Blocks (BCDBs) requested and + * received from the TCPM for later analysis. See USB-PD spec + * Rev 3.1, Ver 1.3 section 6.5.5 + */ + struct pd_bcdb bcdb[PD_BATT_MAX]; + /* Stores a boolean status for each battery index indicating + * whether we have received a BCDB response for that battery. + */ + bool have_response[PD_BATT_MAX]; + } battery_capabilities; + + /* + * Cable which is "plugged in" to this port partner + * Note: Much as in real life, cable should be attached before the port + * partner can be plugged in to properly discover its information. + * For tests, this means this poitner should be set before connecting + * the source or sink partner. + */ + struct tcpci_cable_data *cable; +}; + +struct tcpci_cable_data { + /* + * Identity VDM ACKs which the cable is expected to send + * These include the VDM header + */ + uint32_t identity_vdm[VDO_MAX_SIZE]; + int identity_vdos; }; /** Structure of message used by TCPCI partner emulator */ @@ -150,10 +206,17 @@ struct tcpci_partner_msg { struct tcpci_emul_msg msg; /** Time when message should be sent if message is delayed */ uint64_t time; - /** Type of the message */ + /** Message type that is placed in the Message Header. Its meaning + * depends on the class of message: + * - for Control Messages, see `enum pd_ctrl_msg_type` + * - for Data Messages, see `enum pd_data_msg_type` + * - for Extended Messages, see `enum pd_ext_msg_type` + */ int type; /** Number of data objects */ int data_objects; + /** True if this is an extended message */ + bool extended; }; /** Identify sender of logged PD message */ @@ -184,7 +247,8 @@ struct tcpci_partner_log_msg { enum tcpci_partner_handler_res { TCPCI_PARTNER_COMMON_MSG_HANDLED, TCPCI_PARTNER_COMMON_MSG_NOT_HANDLED, - TCPCI_PARTNER_COMMON_MSG_HARD_RESET + TCPCI_PARTNER_COMMON_MSG_HARD_RESET, + TCPCI_PARTNER_COMMON_MSG_NO_GOODCRC, }; /** Structure of TCPCI partner extension */ @@ -230,9 +294,8 @@ struct tcpci_partner_extension_ops { * @param ext Pointer to partner extension * @param common_data Pointer to TCPCI partner emulator */ - void (*hard_reset)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + void (*hard_reset)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); /** * @brief Function called when SoftReset message is received @@ -240,9 +303,8 @@ struct tcpci_partner_extension_ops { * @param ext Pointer to partner extension * @param common_data Pointer to TCPCI partner emulator */ - void (*soft_reset)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + void (*soft_reset)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); /** * @brief Function called when partner emulator is disconnected from @@ -251,9 +313,8 @@ struct tcpci_partner_extension_ops { * @param ext Pointer to partner extension * @param common_data Pointer to TCPCI partner emulator */ - void (*disconnect)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + void (*disconnect)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); /** * @brief Function called when partner emulator is connected to TCPM. @@ -265,9 +326,8 @@ struct tcpci_partner_extension_ops { * @return Negative value on error * @return 0 on success */ - int (*connect)( - struct tcpci_partner_extension *ext, - struct tcpci_partner_data *common_data); + int (*connect)(struct tcpci_partner_extension *ext, + struct tcpci_partner_data *common_data); }; /** @@ -280,17 +340,6 @@ struct tcpci_partner_extension_ops { void tcpci_partner_init(struct tcpci_partner_data *data, enum pd_rev_type rev); /** - * @brief Allocate message with space for header and given number of data - * objects. Type of message is set to TCPCI_MSG_SOP by default. - * - * @param data_objects Number of data objects in message - * - * @return Pointer to new message on success - * @return NULL on error - */ -struct tcpci_partner_msg *tcpci_partner_alloc_msg(int data_objects); - -/** * @brief Free message's memory * * @param msg Pointer to message @@ -336,8 +385,7 @@ int tcpci_partner_send_msg(struct tcpci_partner_data *data, * @return negative on failure */ int tcpci_partner_send_control_msg(struct tcpci_partner_data *data, - enum pd_ctrl_msg_type type, - uint64_t delay); + enum pd_ctrl_msg_type type, uint64_t delay); /** * @brief Send data message with optional delay. Data objects are copied to @@ -356,9 +404,22 @@ int tcpci_partner_send_control_msg(struct tcpci_partner_data *data, * @return negative on failure */ int tcpci_partner_send_data_msg(struct tcpci_partner_data *data, - enum pd_data_msg_type type, - uint32_t *data_obj, int data_obj_num, - uint64_t delay); + enum pd_data_msg_type type, uint32_t *data_obj, + int data_obj_num, uint64_t delay); + +/** + * @brief Send an extended PD message to the port partner + * + * @param data Pointer to TCPCI partner emulator + * @param type Extended message type + * @param delay Message send delay in milliseconds, or zero for no delay. + * @param payload Pointer to data payload. Does not include any headers. + * @param payload_size Number of bytes in above payload + * @return negative on failure, 0 on success + */ +int tcpci_partner_send_extended_msg(struct tcpci_partner_data *data, + enum pd_ext_msg_type type, uint64_t delay, + uint8_t *payload, size_t payload_size); /** * @brief Remove all messages that are in delayed message queue @@ -387,6 +448,25 @@ void tcpci_partner_common_send_hard_reset(struct tcpci_partner_data *data); void tcpci_partner_common_send_soft_reset(struct tcpci_partner_data *data); /** + * @brief Send a Get Battery Capabilities request to the TCPM + * + * @param data Pointer to TCPCI partner emulator + * @param battery_index Request capability info on this battery. Must + * be (0 <= battery_index < PD_BATT_MAX) + */ +void tcpci_partner_common_send_get_battery_capabilities( + struct tcpci_partner_data *data, int battery_index); + +/** + * @brief Resets the data structure used for tracking battery capability + * requests and responses. + * + * @param data Emulator state + */ +void tcpci_partner_reset_battery_capability_state( + struct tcpci_partner_data *data); + +/** * @brief Start sender response timer for TCPCI_PARTNER_RESPONSE_TIMEOUT_MS. * If @ref tcpci_partner_stop_sender_response_timer wasn't called before * timeout, @ref tcpci_partner_sender_response_timeout is called. diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h index fcc8d6a85a..e4f58fcd37 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_drp.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -55,12 +55,12 @@ struct tcpci_drp_emul_data { * * @return Pointer to USB-C DRP extension */ -struct tcpci_partner_extension *tcpci_drp_emul_init( - struct tcpci_drp_emul_data *data, - struct tcpci_partner_data *common_data, - enum pd_power_role power_role, - struct tcpci_partner_extension *src_ext, - struct tcpci_partner_extension *snk_ext); +struct tcpci_partner_extension * +tcpci_drp_emul_init(struct tcpci_drp_emul_data *data, + struct tcpci_partner_data *common_data, + enum pd_power_role power_role, + struct tcpci_partner_extension *src_ext, + struct tcpci_partner_extension *snk_ext); /** * @brief Set correct flags for first capabilities PDO to indicate that this diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h new file mode 100644 index 0000000000..f0627c95bd --- /dev/null +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_ext.h @@ -0,0 +1,101 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for USB-C malfunctioning device emulator + */ + +#ifndef __EMUL_TCPCI_PARTNER_FAULTY_EXT_H +#define __EMUL_TCPCI_PARTNER_FAULTY_EXT_H + +#include <zephyr/drivers/emul.h> +#include "emul/tcpc/emul_tcpci.h" +#include "emul/tcpc/emul_tcpci_partner_common.h" +#include "usb_pd.h" + +/** + * @brief USB-C malfunctioning device extension backend API + * @defgroup tcpci_faulty_ext USB-C malfunctioning device extension + * @{ + * + * USB-C malfunctioning device extension can be used with TCPCI partner + * emulator. It can be configured to not respond to source capability message + * (by not sending GoodCRC or Request after GoodCRC). + */ + +/** Structure describing malfunctioning emulator data */ +struct tcpci_faulty_ext_data { + struct tcpci_partner_extension ext; + /* List of action to perform */ + struct k_fifo action_list; +}; + +/** Actions that can be performed by malfunctioning emulator */ +enum tcpci_faulty_ext_action_type { + /** + * Fail to receive SourceCapabilities message. From TCPM point of view, + * GoodCRC message is not received. + */ + TCPCI_FAULTY_EXT_FAIL_SRC_CAP = BIT(0), + /** + * Ignore to respond to SourceCapabilities message with Request message. + * From TCPM point of view, GoodCRC message is received, but Request is + * missing. + */ + TCPCI_FAULTY_EXT_IGNORE_SRC_CAP = BIT(1), + /** Discard SourceCapabilities message and send Accept message */ + TCPCI_FAULTY_EXT_DISCARD_SRC_CAP = BIT(2), +}; + +/** Structure to put in malfunctioning emulator action list */ +struct tcpci_faulty_ext_action { + /* Reserved for FIFO */ + void *fifo_reserved; + /* Actions that emulator should perform */ + uint32_t action_mask; + /* Number of times to repeat action */ + int count; +}; + +/* Count of actions which is treated by emulator as infinite */ +#define TCPCI_FAULTY_EXT_INFINITE_ACTION 0 + +/** + * @brief Initialise USB-C malfunctioning device data structure + * + * @param data Pointer to USB-C malfunctioning device emulator data + * @param common_data Pointer to USB-C device emulator common data + * @param ext Pointer to next USB-C emulator extension + * + * @return Pointer to USB-C malfunctioning extension + */ +struct tcpci_partner_extension * +tcpci_faulty_ext_init(struct tcpci_faulty_ext_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext); + +/** + * @brief Add action to perform by USB-C malfunctioning extension + * + * @param data Pointer to USB-C malfunctioning device extension data + * @param action Non standard behavior to perform by emulator + */ +void tcpci_faulty_ext_append_action(struct tcpci_faulty_ext_data *data, + struct tcpci_faulty_ext_action *action); + +/** + * @brief Clear all actions of USB-C malfunctioning extension + * + * @param data Pointer to USB-C malfunctioning device extension data + */ +void tcpci_faulty_ext_clear_actions_list(struct tcpci_faulty_ext_data *data); + +/** + * @} + */ + +#endif /* __EMUL_TCPCI_PARTNER_FAULTY_EXT_H */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h deleted file mode 100644 index 8334f5f01d..0000000000 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_faulty_snk.h +++ /dev/null @@ -1,104 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * - * @brief Backend API for USB-C malfunctioning sink device emulator - */ - -#ifndef __EMUL_TCPCI_PARTNER_FAULTY_SNK_H -#define __EMUL_TCPCI_PARTNER_FAULTY_SNK_H - -#include <zephyr/drivers/emul.h> -#include "emul/tcpc/emul_tcpci.h" -#include "emul/tcpc/emul_tcpci_partner_common.h" -#include "emul/tcpc/emul_tcpci_partner_snk.h" -#include "usb_pd.h" - -/** - * @brief USB-C malfunctioning sink device extension backend API - * @defgroup tcpci_faulty_snk_emul USB-C malfunctioning sink device extension - * @{ - * - * USB-C malfunctioning sink device extension can be used with TCPCI partner - * emulator. It can be configured to not respond to source capability message - * (by not sending GoodCRC or Request after GoodCRC). - */ - -/** Structure describing malfunctioning sink emulator data */ -struct tcpci_faulty_snk_emul_data { - struct tcpci_partner_extension ext; - /* List of action to perform */ - struct k_fifo action_list; -}; - -/** Actions that can be performed by malfunctioning sink emulator */ -enum tcpci_faulty_snk_action_type { - /** - * Fail to receive SourceCapabilities message. From TCPM point of view, - * GoodCRC message is not received. - */ - TCPCI_FAULTY_SNK_FAIL_SRC_CAP = BIT(0), - /** - * Ignore to respond to SourceCapabilities message with Request message. - * From TCPM point of view, GoodCRC message is received, but Request is - * missing. - */ - TCPCI_FAULTY_SNK_IGNORE_SRC_CAP = BIT(1), - /** Discard SourceCapabilities message and send Accept message */ - TCPCI_FAULTY_SNK_DISCARD_SRC_CAP = BIT(2), -}; - -/** Structure to put in malfunctioning sink emulator action list */ -struct tcpci_faulty_snk_action { - /* Reserved for FIFO */ - void *fifo_reserved; - /* Actions that emulator should perform */ - uint32_t action_mask; - /* Number of times to repeat action */ - int count; -}; - -/* Count of actions which is treated by emulator as infinite */ -#define TCPCI_FAULTY_SNK_INFINITE_ACTION 0 - -/** - * @brief Initialise USB-C malfunctioning sink device data structure - * - * @param data Pointer to USB-C malfunctioning sink device emulator data - * @param common_data Pointer to USB-C device emulator common data - * @param ext Pointer to next USB-C emulator extension - * - * @return Pointer to USB-C malfunctioning sink extension - */ -struct tcpci_partner_extension *tcpci_faulty_snk_emul_init( - struct tcpci_faulty_snk_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext); - -/** - * @brief Add action to perform by USB-C malfunctioning sink extension - * - * @param data Pointer to USB-C malfunctioning sink device extension data - * @param action Non standard behavior to perform by emulator - */ -void tcpci_faulty_snk_emul_append_action( - struct tcpci_faulty_snk_emul_data *data, - struct tcpci_faulty_snk_action *action); - -/** - * @brief Clear all actions of USB-C malfunctioning sink extension - * - * @param data Pointer to USB-C malfunctioning sink device extension data - */ -void tcpci_faulty_snk_emul_clear_actions_list( - struct tcpci_faulty_snk_emul_data *data); - -/** - * @} - */ - -#endif /* __EMUL_TCPCI_PARTNER_FAULTY_SNK_H */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h index 5e23a770da..584458942b 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_snk.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -41,6 +41,8 @@ struct tcpci_snk_emul_data { bool ping_received; /** PD_DATA_ALERT message received */ bool alert_received; + /** Last received 5V fixed source cap */ + uint32_t last_5v_source_cap; }; /** @@ -53,10 +55,10 @@ struct tcpci_snk_emul_data { * * @return Pointer to USB-C sink extension */ -struct tcpci_partner_extension *tcpci_snk_emul_init( - struct tcpci_snk_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext); +struct tcpci_partner_extension * +tcpci_snk_emul_init(struct tcpci_snk_emul_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext); /** * @brief Clear the ping received flag. @@ -73,6 +75,13 @@ void tcpci_snk_emul_clear_ping_received(struct tcpci_snk_emul_data *sink_data); void tcpci_snk_emul_clear_alert_received(struct tcpci_snk_emul_data *sink_data); /** + * @brief Clear the last received 5V fixed source cap. + * + * @param sink_data + */ +void tcpci_snk_emul_clear_last_5v_cap(struct tcpci_snk_emul_data *sink_data); + +/** * @} */ diff --git a/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h b/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h index 00f592ae2f..e72d0e4135 100644 --- a/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h +++ b/zephyr/include/emul/tcpc/emul_tcpci_partner_src.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -95,10 +95,10 @@ enum check_pdos_res tcpci_src_emul_check_pdos(struct tcpci_src_emul_data *data); * * @return Pointer to USB-C source extension */ -struct tcpci_partner_extension *tcpci_src_emul_init( - struct tcpci_src_emul_data *data, - struct tcpci_partner_data *common_data, - struct tcpci_partner_extension *ext); +struct tcpci_partner_extension * +tcpci_src_emul_init(struct tcpci_src_emul_data *data, + struct tcpci_partner_data *common_data, + struct tcpci_partner_extension *ext); /** * @brief Send capability message constructed from source device emulator PDOs @@ -134,9 +134,7 @@ int tcpci_src_emul_send_capability_msg(struct tcpci_src_emul_data *data, */ int tcpci_src_emul_send_capability_msg_with_timer( struct tcpci_src_emul_data *data, - struct tcpci_partner_data *common_data, - uint64_t delay); - + struct tcpci_partner_data *common_data, uint64_t delay); /** * @brief Clear the alert received flag. diff --git a/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h b/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h index f26d3ac69f..418ae39d3a 100644 --- a/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h +++ b/zephyr/include/soc/ite_it8xxx2/reg_def_cros.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ diff --git a/zephyr/include/soc/microchip_xec/reg_def_cros.h b/zephyr/include/soc/microchip_xec/reg_def_cros.h index 4cc66be47d..b4b849a90d 100644 --- a/zephyr/include/soc/microchip_xec/reg_def_cros.h +++ b/zephyr/include/soc/microchip_xec/reg_def_cros.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -13,29 +13,29 @@ /* RTC register structure */ struct rtc_hw { -__IOM uint8_t SECV; /*!< (@ 0x0000) RTC seconds value */ -__IOM uint8_t SECA; /*!< (@ 0x0001) RTC seconds alarm */ -__IOM uint8_t MINV; /*!< (@ 0x0002) RTC minutes value */ -__IOM uint8_t MINA; /*!< (@ 0x0003) RTC minutes alarm */ -__IOM uint8_t HRSV; /*!< (@ 0x0004) RTC hours value, AM/PM indicator */ -__IOM uint8_t HRSA; /*!< (@ 0x0005) RTC hours alarm */ -__IOM uint8_t DOWV; /*!< (@ 0x0006) RTC day of week value */ -__IOM uint8_t DOMV; /*!< (@ 0x0007) RTC day of month value */ -__IOM uint8_t MONV; /*!< (@ 0x0008) RTC month value */ -__IOM uint8_t YEARV; /*!< (@ 0x0009) RTC Year value */ -__IOM uint8_t REGA; /*!< (@ 0x000A) RTC register A */ -__IOM uint8_t REGB; /*!< (@ 0x000B) RTC register B */ -__IOM uint8_t REGC; /*!< (@ 0x000C) RTC register C */ -__IOM uint8_t REGD; /*!< (@ 0x000D) RTC register D */ -__IM uint16_t RESERVED; -__IOM uint8_t CTRL; /*!< (@ 0x0010) RTC control */ -__IM uint8_t RESERVED1; -__IM uint16_t RESERVED2; -__IOM uint8_t WKA; /*!< (@ 0x0014) RTC week alarm */ -__IM uint8_t RESERVED3; -__IM uint16_t RESERVED4; -__IOM uint32_t DLSF; /*!< (@ 0x0018) RTC daylight savings forward */ -__IOM uint32_t DLSB; /*!< (@ 0x001C) RTC daylight savings backward */ + __IOM uint8_t SECV; /*!< (@ 0x0000) RTC seconds value */ + __IOM uint8_t SECA; /*!< (@ 0x0001) RTC seconds alarm */ + __IOM uint8_t MINV; /*!< (@ 0x0002) RTC minutes value */ + __IOM uint8_t MINA; /*!< (@ 0x0003) RTC minutes alarm */ + __IOM uint8_t HRSV; /*!< (@ 0x0004) RTC hours value, AM/PM indicator */ + __IOM uint8_t HRSA; /*!< (@ 0x0005) RTC hours alarm */ + __IOM uint8_t DOWV; /*!< (@ 0x0006) RTC day of week value */ + __IOM uint8_t DOMV; /*!< (@ 0x0007) RTC day of month value */ + __IOM uint8_t MONV; /*!< (@ 0x0008) RTC month value */ + __IOM uint8_t YEARV; /*!< (@ 0x0009) RTC Year value */ + __IOM uint8_t REGA; /*!< (@ 0x000A) RTC register A */ + __IOM uint8_t REGB; /*!< (@ 0x000B) RTC register B */ + __IOM uint8_t REGC; /*!< (@ 0x000C) RTC register C */ + __IOM uint8_t REGD; /*!< (@ 0x000D) RTC register D */ + __IM uint16_t RESERVED; + __IOM uint8_t CTRL; /*!< (@ 0x0010) RTC control */ + __IM uint8_t RESERVED1; + __IM uint16_t RESERVED2; + __IOM uint8_t WKA; /*!< (@ 0x0014) RTC week alarm */ + __IM uint8_t RESERVED3; + __IM uint16_t RESERVED4; + __IOM uint32_t DLSF; /*!< (@ 0x0018) RTC daylight savings forward */ + __IOM uint32_t DLSB; /*!< (@ 0x001C) RTC daylight savings backward */ }; #endif /* _MICROCHIP_XEC_REG_DEF_CROS_H */ diff --git a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h index c4d176851d..180c2e50a3 100644 --- a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h +++ b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h @@ -40,21 +40,21 @@ struct kbs_reg { }; /* KBS register fields */ -#define NPCX_KBSBUFINDX 0 -#define NPCX_KBSEVT_KBSDONE 0 -#define NPCX_KBSEVT_KBSERR 1 -#define NPCX_KBSCTL_START 0 -#define NPCX_KBSCTL_KBSMODE 1 -#define NPCX_KBSCTL_KBSIEN 2 -#define NPCX_KBSCTL_KBSINC 3 -#define NPCX_KBSCTL_KBHDRV_FIELD FIELD(6, 2) -#define NPCX_KBSCFGINDX 0 +#define NPCX_KBSBUFINDX 0 +#define NPCX_KBSEVT_KBSDONE 0 +#define NPCX_KBSEVT_KBSERR 1 +#define NPCX_KBSCTL_START 0 +#define NPCX_KBSCTL_KBSMODE 1 +#define NPCX_KBSCTL_KBSIEN 2 +#define NPCX_KBSCTL_KBSINC 3 +#define NPCX_KBSCTL_KBHDRV_FIELD FIELD(6, 2) +#define NPCX_KBSCFGINDX 0 /* Index of 'Automatic Scan' configuration register */ -#define KBS_CFG_INDX_DLY1 0 /* Keyboard Scan Delay T1 Byte */ -#define KBS_CFG_INDX_DLY2 1 /* Keyboard Scan Delay T2 Byte */ -#define KBS_CFG_INDX_RTYTO 2 /* Keyboard Scan Retry Timeout */ -#define KBS_CFG_INDX_CNUM 3 /* Keyboard Scan Columns Number */ -#define KBS_CFG_INDX_CDIV 4 /* Keyboard Scan Clock Divisor */ +#define KBS_CFG_INDX_DLY1 0 /* Keyboard Scan Delay T1 Byte */ +#define KBS_CFG_INDX_DLY2 1 /* Keyboard Scan Delay T2 Byte */ +#define KBS_CFG_INDX_RTYTO 2 /* Keyboard Scan Retry Timeout */ +#define KBS_CFG_INDX_CNUM 3 /* Keyboard Scan Columns Number */ +#define KBS_CFG_INDX_CDIV 4 /* Keyboard Scan Clock Divisor */ /* * Monotonic Counter (MTC) device registers @@ -67,8 +67,8 @@ struct mtc_reg { }; /* MTC register fields */ -#define NPCX_WTC_PTO 30 -#define NPCX_WTC_WIE 31 +#define NPCX_WTC_PTO 30 +#define NPCX_WTC_WIE 31 /* SHI (Serial Host Interface) registers */ struct shi_reg { @@ -109,48 +109,48 @@ struct shi_reg { }; /* SHI register fields */ -#define NPCX_SHICFG1_EN 0 -#define NPCX_SHICFG1_MODE 1 -#define NPCX_SHICFG1_WEN 2 -#define NPCX_SHICFG1_AUTIBF 3 -#define NPCX_SHICFG1_AUTOBE 4 -#define NPCX_SHICFG1_DAS 5 -#define NPCX_SHICFG1_CPOL 6 -#define NPCX_SHICFG1_IWRAP 7 -#define NPCX_SHICFG2_SIMUL 0 -#define NPCX_SHICFG2_BUSY 1 -#define NPCX_SHICFG2_ONESHOT 2 -#define NPCX_SHICFG2_SLWU 3 -#define NPCX_SHICFG2_REEN 4 -#define NPCX_SHICFG2_RESTART 5 -#define NPCX_SHICFG2_REEVEN 6 -#define NPCX_EVENABLE_OBEEN 0 -#define NPCX_EVENABLE_OBHEEN 1 -#define NPCX_EVENABLE_IBFEN 2 -#define NPCX_EVENABLE_IBHFEN 3 -#define NPCX_EVENABLE_EOREN 4 -#define NPCX_EVENABLE_EOWEN 5 -#define NPCX_EVENABLE_STSREN 6 -#define NPCX_EVENABLE_IBOREN 7 -#define NPCX_EVSTAT_OBE 0 -#define NPCX_EVSTAT_OBHE 1 -#define NPCX_EVSTAT_IBF 2 -#define NPCX_EVSTAT_IBHF 3 -#define NPCX_EVSTAT_EOR 4 -#define NPCX_EVSTAT_EOW 5 -#define NPCX_EVSTAT_STSR 6 -#define NPCX_EVSTAT_IBOR 7 -#define NPCX_STATUS_OBES 6 -#define NPCX_STATUS_IBFS 7 -#define NPCX_SHICFG3_OBUFLVLDIS 7 -#define NPCX_SHICFG4_IBUFLVLDIS 7 -#define NPCX_SHICFG5_IBUFLVL2 FIELD(0, 6) -#define NPCX_SHICFG5_IBUFLVL2DIS 7 -#define NPCX_EVSTAT2_IBHF2 0 -#define NPCX_EVSTAT2_CSNRE 1 -#define NPCX_EVSTAT2_CSNFE 2 -#define NPCX_EVENABLE2_IBHF2EN 0 -#define NPCX_EVENABLE2_CSNREEN 1 -#define NPCX_EVENABLE2_CSNFEEN 2 +#define NPCX_SHICFG1_EN 0 +#define NPCX_SHICFG1_MODE 1 +#define NPCX_SHICFG1_WEN 2 +#define NPCX_SHICFG1_AUTIBF 3 +#define NPCX_SHICFG1_AUTOBE 4 +#define NPCX_SHICFG1_DAS 5 +#define NPCX_SHICFG1_CPOL 6 +#define NPCX_SHICFG1_IWRAP 7 +#define NPCX_SHICFG2_SIMUL 0 +#define NPCX_SHICFG2_BUSY 1 +#define NPCX_SHICFG2_ONESHOT 2 +#define NPCX_SHICFG2_SLWU 3 +#define NPCX_SHICFG2_REEN 4 +#define NPCX_SHICFG2_RESTART 5 +#define NPCX_SHICFG2_REEVEN 6 +#define NPCX_EVENABLE_OBEEN 0 +#define NPCX_EVENABLE_OBHEEN 1 +#define NPCX_EVENABLE_IBFEN 2 +#define NPCX_EVENABLE_IBHFEN 3 +#define NPCX_EVENABLE_EOREN 4 +#define NPCX_EVENABLE_EOWEN 5 +#define NPCX_EVENABLE_STSREN 6 +#define NPCX_EVENABLE_IBOREN 7 +#define NPCX_EVSTAT_OBE 0 +#define NPCX_EVSTAT_OBHE 1 +#define NPCX_EVSTAT_IBF 2 +#define NPCX_EVSTAT_IBHF 3 +#define NPCX_EVSTAT_EOR 4 +#define NPCX_EVSTAT_EOW 5 +#define NPCX_EVSTAT_STSR 6 +#define NPCX_EVSTAT_IBOR 7 +#define NPCX_STATUS_OBES 6 +#define NPCX_STATUS_IBFS 7 +#define NPCX_SHICFG3_OBUFLVLDIS 7 +#define NPCX_SHICFG4_IBUFLVLDIS 7 +#define NPCX_SHICFG5_IBUFLVL2 FIELD(0, 6) +#define NPCX_SHICFG5_IBUFLVL2DIS 7 +#define NPCX_EVSTAT2_IBHF2 0 +#define NPCX_EVSTAT2_CSNRE 1 +#define NPCX_EVSTAT2_CSNFE 2 +#define NPCX_EVENABLE2_IBHF2EN 0 +#define NPCX_EVENABLE2_CSNREEN 1 +#define NPCX_EVENABLE2_CSNFEEN 2 #endif /* _NUVOTON_NPCX_REG_DEF_CROS_H */ |