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path: root/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts
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Diffstat (limited to 'zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts')
-rw-r--r--zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts162
1 files changed, 82 insertions, 80 deletions
diff --git a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts
index 49a40c6a54..77b4cf0573 100644
--- a/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts
+++ b/zephyr/projects/intelrvp/mtlrvp/mtlrvpp_npcx/gpio.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -20,7 +20,7 @@
enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD";
};
rsmrst_pwrgd: rsmrst-pwrgd {
- gpios = <&gpio6 6 GPIO_INPUT>; /* 1.8V */
+ gpios = <&gpio6 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
enum-name = "GPIO_PG_EC_RSMRST_ODL";
};
pch_slp_s0_n: pch-slp-s0-n-ec {
@@ -53,32 +53,33 @@
gpio_wp: wp-l {
gpios = <&gpiod 5 GPIO_INPUT>;
};
- std-adp-prsnt {
+ std_adp_prsnt: std-adp-prsnt {
gpios = <&gpioc 6 GPIO_INPUT>;
+ enum-name = "GPIO_DC_JACK_PRESENT";
};
bc_acok: bc-acok-ec {
gpios = <&gpio0 2 GPIO_INPUT>;
enum-name = "GPIO_AC_PRESENT";
};
- usbc-tcpc-alrt-p0 {
+ usbc_tcpc_alrt_p0: usbc-tcpc-alrt-p0 {
gpios = <&gpio4 0 GPIO_INPUT>;
};
/* NOTE: Netname is USBC_TCPC_PPC_ALRT_P0 */
- usb-c0-c1-tcpc-rst-odl {
+ usb_c0_c1_tcpc_rst_odl: usb-c0-c1-tcpc-rst-odl {
gpios = <&gpiod 0 GPIO_ODR_HIGH>;
};
/* NOTE: Netname is USBC_TCPC_ALRT_P1 */
- usbc-tcpc-ppc-alrt-p0 {
+ usbc_tcpc_ppc_alrt_p0: usbc-tcpc-ppc-alrt-p0 {
gpios = <&gpiod 1 GPIO_INPUT>;
};
- usbc-tcpc-ppc-alrt-p1 {
+ usbc_tcpc_ppc_alrt_p1: usbc-tcpc-ppc-alrt-p1 {
gpios = <&gpioe 4 GPIO_INPUT>;
};
- usbc-tcpc-alrt-p2 {
+ usbc_tcpc_alrt_p2: usbc-tcpc-alrt-p2 {
gpios = <&gpio9 1 GPIO_INPUT>;
};
/* NOTE: Netname is USBC_TCPC_PPC_ALRT_P3 */
- usbc-tcpc-ppc-alrt-p3 {
+ usbc_tcpc_alrt_p3: usbc-tcpc-alrt-p3 {
gpios = <&gpiof 3 GPIO_INPUT>;
};
gpio_ec_pch_wake_odl: pch-wake-n {
@@ -97,11 +98,11 @@
gpios = <&gpio6 0 GPIO_INPUT>;
enum-name = "GPIO_CPU_PROCHOT";
};
- sys-rst-odl-ec {
+ sys_rst_odl: sys-rst-odl-ec {
gpios = <&gpioc 5 GPIO_ODR_HIGH>;
enum-name = "GPIO_SYS_RESET_L";
};
- pm-rsmrst-r-n {
+ ec_pch_rsmrst_l: pm-rsmrst-r-n {
gpios = <&gpioa 4 GPIO_OUTPUT_LOW>; /* 1.8V */
enum-name = "GPIO_PCH_RSMRST_L";
};
@@ -112,11 +113,12 @@
ec_spi_oe_mecc: ec-spi-oe-mecc-r {
gpios = <&gpioa 7 GPIO_OUTPUT_LOW>; /* 1.8V */
};
- ec-ds3-r {
+ en_pp3300_a: ec-ds3-r {
gpios = <&gpioc 4 GPIO_OUTPUT_LOW>;
enum-name = "GPIO_EN_PP3300_A";
+ alias = "GPIO_TEMP_SENSOR_POWER";
};
- pch-pwrok-ec-r {
+ ec_pch_pwrok_od: pch-pwrok-ec-r {
gpios = <&gpiod 3 GPIO_ODR_LOW>;
enum-name = "GPIO_PCH_PWROK";
};
@@ -142,8 +144,9 @@
gpios = <&gpioc 0 GPIO_OUTPUT_LOW>;
};
/* NOTE: Netname is USBC_TCPC_ALRT_P3 */
- ccd-mode-odl {
+ ccd_mode_odl: ccd-mode-odl {
gpios = <&gpio9 2 GPIO_INPUT>;
+ enum-name = "GPIO_CCD_MODE_ODL";
};
smb-bs-clk {
gpios = <&gpiob 3 GPIO_INPUT>;
@@ -158,10 +161,10 @@
gpios = <&gpiob 4 GPIO_INPUT>;
};
usbc-tcpc-i2c-clk-aic2 {
- gpios = <&gpio9 0 GPIO_INPUT>;
+ gpios = <&gpio9 0 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
usbc-tcpc-i2c-data-aic2 {
- gpios = <&gpio8 7 GPIO_INPUT>;
+ gpios = <&gpio8 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
/* Unused 1.8V pins */
i3c-1-sda-r {
@@ -189,22 +192,22 @@
gpios = <&gpioa 6 GPIO_INPUT>;
};
sml1-clk-mecc {
- gpios = <&gpio3 3 GPIO_INPUT>;
+ gpios = <&gpio3 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
sml1-data-mecc {
- gpios = <&gpio3 6 GPIO_INPUT>;
+ gpios = <&gpio3 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
sml1-alert {
- gpios = <&gpioc 7 GPIO_INPUT>;
+ gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
smb-pch-alrt {
gpios = <&gpioa 3 GPIO_INPUT>;
};
smb-pch-data {
- gpios = <&gpioc 1 GPIO_INPUT>;
+ gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
smb-pch-clk {
- gpios = <&gpioc 2 GPIO_INPUT>;
+ gpios = <&gpioc 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>;
};
/* Unused 3.3V pins */
cpu-cat-err-mecc {
@@ -255,7 +258,7 @@
tp-gpiof1 {
gpios = <&gpiof 1 GPIO_INPUT>;
};
- usbc-tcpc-ppc-alrt-p2 {
+ usbc_tcpc_ppc_alrt_p2: usbc-tcpc-ppc-alrt-p2 {
gpios = <&gpiof 2 GPIO_INPUT>;
};
tp-gpiof4 {
@@ -285,80 +288,79 @@
};
/* USB C IOEX configuration */
- usb-c0-hbr-ls-en {
+ usb_c0_hb_retimer_ls_en: usb-c0-hbr-ls-en {
gpios = <&ioex_c0 2 GPIO_OUTPUT_LOW>;
+ enum-name = "IOEX_USB_C0_HBR_LS_EN";
+ no-auto-init;
};
- usb-c0-hbr-rst {
+ usb_c0_hb_retimer_rst: usb-c0-hbr-rst {
gpios = <&ioex_c0 3 GPIO_OUTPUT_LOW>;
+ enum-name = "IOEX_USB_C0_HBR_RST";
+ no-auto-init;
};
- usb-c1-hbr-ls-en {
+ usb_c1_hb_retimer_ls_en: usb-c1-hbr-ls-en {
gpios = <&ioex_c1 2 GPIO_OUTPUT_LOW>;
+ enum-name = "IOEX_USB_C1_HBR_LS_EN";
+ no-auto-init;
};
- usb-c1-hbr-rst {
+ usb_c1_hb_retimer_rst: usb-c1-hbr-rst {
gpios = <&ioex_c1 3 GPIO_OUTPUT_LOW>;
+ enum-name = "IOEX_USB_C1_HBR_RST";
+ no-auto-init;
};
usb-c0-mux-oe-n {
gpios = <&ioex_c0 4 GPIO_OUTPUT_LOW>;
+ no-auto-init;
};
usb-c0-mux-sbu-sel-0 {
gpios = <&ioex_c0 6 GPIO_OUTPUT_HIGH>;
+ enum-name = "IOEX_USB_C0_MUX_SBU_SEL_0";
+ no-auto-init;
};
usb-c0-mux-sbu-sel-1 {
gpios = <&ioex_c1 4 GPIO_OUTPUT_LOW>;
- };
- };
-
- def-lvol-io-list {
- compatible = "nuvoton,npcx-lvolctrl-def";
- lvol-io-pads = <
- &lvol_io66 /* RSMRET_PWRGD */
- &lvol_io90 /* I2C1_SCL0 */
- &lvol_io87 /* I2C1_SDA0 */
- &lvol_io33 /* SML1_CLK_MECC */
- &lvol_io36 /* SML1_DATA_MECC */
- &lvol_ioc7 /* SML1_ALERT */
- &lvol_ioc1 /* SMB_PCH_DATA */
- &lvol_ioc2 /* SMB_PCH_CLK */
- >;
- };
-};
-
-&i2c0_0 {
- nct38xx_C0:nct38xx_C0@70 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nuvoton,nct38xx-gpio";
- reg = <0x70>;
- label = "NCT38XX_C0";
-
- ioex_c0:gpio@0 {
- compatible = "nuvoton,nct38xx-gpio-port";
- reg = <0x0>;
- label = "NCT38XX_C0_GPIO0";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <8>;
- pin_mask = <0xff>;
- pinmux_mask = <0xf7>;
- };
- };
-
- nct38xx_C1:nct38xx_C1@70 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nuvoton,nct38xx-gpio";
- reg = <0x70>;
- label = "NCT38XX_C1";
-
- ioex_c1:gpio@0 {
- compatible = "nuvoton,nct38xx-gpio-port";
- reg = <0x0>;
- label = "NCT38XX_C1_GPIO0";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <8>;
- pin_mask = <0xff>;
- pinmux_mask = <0xf7>;
+ enum-name = "IOEX_USB_C0_MUX_SBU_SEL_1";
+ no-auto-init;
+ };
+ usb-c0-c1-prochot-n {
+ gpios = <&ioex_c1 6 GPIO_INPUT>;
+ no-auto-init;
+ };
+ dg-bssb-sbu-sel {
+ gpios = <&ioex_c2_port1 4 GPIO_INPUT>;
+ no-auto-init;
+ };
+ usb_c2_hb_retimer_rst: usb-c2-hbr-rst {
+ gpios = <&ioex_c2_port1 1 (GPIO_ODR_LOW | \
+ GPIO_VOLTAGE_1P8)>;
+ enum-name = "IOEX_USB_C2_HBR_RST";
+ no-auto-init;
+ };
+ usb_c2_hb_retimer_ls_en: usb-c2-hbr-ls-en {
+ gpios = <&ioex_c2_port2 0 (GPIO_ODR_LOW | \
+ GPIO_VOLTAGE_1P8)>;
+ enum-name = "IOEX_USB_C2_HBR_LS_EN";
+ no-auto-init;
+ };
+ usb_c3_hb_retimer_rst: usb-c3-hbr-rst {
+ gpios = <&ioex_c2_port1 3 (GPIO_ODR_LOW | \
+ GPIO_VOLTAGE_1P8)>;
+ enum-name = "IOEX_USB_C3_HBR_RST";
+ no-auto-init;
+ };
+ usb_c3_hb_retimer_ls_en: usb-c3-hbr-ls-en {
+ gpios = <&ioex_c2_port3 3 (GPIO_ODR_LOW | \
+ GPIO_VOLTAGE_1P8)>;
+ enum-name = "IOEX_USB_C3_HBR_LS_EN";
+ no-auto-init;
+ };
+ usb-c2-c3-prochot-n {
+ gpios = <&ioex_c2_port0 0 GPIO_INPUT>;
+ no-auto-init;
+ };
+ /* unimplemented GPIOs */
+ en-pp5000 {
+ enum-name = "GPIO_EN_PP5000";
};
};
};
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