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| author | Fred Reitberger <reitbergerfred@gmail.com> | 2023-05-12 12:18:12 -0400 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-05-14 12:49:22 +0000 |
| commit | 096e04c9352426dc6099c039a81b27531635a860 (patch) | |
| tree | 5b0387ebde50c246431b32c6c5e1e5c9064e16f8 | |
| parent | ece06dc2d1b6838c2c24daa6375586908144bef6 (diff) | |
| download | coreboot-096e04c9352426dc6099c039a81b27531635a860.tar.gz | |
mb/google/myst/Kconfig: Select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
When using a 32-MiB ROM chip, the ABL leaves the SPI flash in 4-byte
addressing mode, so ensure the driver exits that mode for regular
operation.
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I9a846be743a65ffe5b3ef94e20e0b5fc5e273961
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
| -rw-r--r-- | src/mainboard/google/myst/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/myst/Kconfig b/src/mainboard/google/myst/Kconfig index ae54f9cedf..dbce4d8417 100644 --- a/src/mainboard/google/myst/Kconfig +++ b/src/mainboard/google/myst/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_TPM2 select SOC_AMD_COMMON_BLOCK_USE_ESPI select SOC_AMD_PHOENIX + select SPI_FLASH_EXIT_4_BYTE_ADDR_MODE select SYSTEM_TYPE_LAPTOP select TPM_GOOGLE_TI50 |