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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-08 11:31:19 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-10-22 14:16:38 +0000
commit682613f0653064eeeba2b4d15f6d50e32a692bd3 (patch)
treef53d9721eab49251b9ffda596f2b6d62e239e31d /src/southbridge/intel/i82371eb
parentea6d12a0de8af000fb72a873b63364462f280643 (diff)
downloadcoreboot-682613f0653064eeeba2b4d15f6d50e32a692bd3.tar.gz
sb,soc/intel: Replace set_ioapic_id() with setup_ioapic()
This adds delivery of PIC/i8259 interrupts via ExtNMI on the affected platfoms. Change-Id: If99e321fd9b153101d71e1b995b43dba48d8763f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58406 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82371eb')
-rw-r--r--src/southbridge/intel/i82371eb/isa.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index 3d586bdf80..c2411f2b90 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -61,7 +61,7 @@ static void isa_init(struct device *dev)
pci_write_config16(dev, XBCS, reg16);
/* Set and verify the IOAPIC ID. */
- set_ioapic_id(VIO_APIC_VADDR, ioapic_id);
+ setup_ioapic(VIO_APIC_VADDR, ioapic_id);
if (ioapic_id != get_ioapic_id(VIO_APIC_VADDR))
die("IOAPIC error!\n");
}