AMD SB700 and later have an integrated microcontroller (IMC) which runs

from shared flash. The IMC will happily issue reads while we write,
issue writes while we read, and generally cause lots of havoc due to the
concurrent accesses it performs while flashrom is running.
A failing or corrupted read can be detected since r1145, and the worst
case is that the read aborts and the user has to retry.
A failing write is much more serious. It can be detected since r1145,
but if the SPI interface locks up, we can't continue writing nor can we
read the current chip contents.

If the IMC is inactive, there is no reason to worry. If the IMC is
active, flashrom will refuse to erase/write the chip with this patch.

The correct fix would be to stop the IMC during flashing, but apparently
the relevant registers are undocumented, so we take the safe route for
now until someone from AMD can give us more info.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Matthias Kretz <kretz@kde.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

0 files changed, 0 insertions, 0 deletions