diff options
author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-07-10 16:56:32 +0000 |
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committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2010-07-10 16:56:32 +0000 |
commit | edd2a4a5fb90140ce4ee969ad04e53d6777d0ea3 (patch) | |
tree | dc504608f4210643a4a0c5d3280fc7342530678e /internal.c | |
parent | 2d575412e30f8fe6c8e8ff7cde2d911c2b8d5b74 (diff) | |
download | flashrom-edd2a4a5fb90140ce4ee969ad04e53d6777d0ea3.tar.gz |
Autodetect the ITE IT8705 Super I/O and enable flash writes if it
performs LPC->Parallel translation.
Remove board enables which triggered the IT8705 write enable manually.
Change the IT87 SPI special case to cover IT87 LPC->SPI and
LPC->Parallel translation.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested on Syntax SV266A.
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested on Shuttle AK38N, all operations work fine.
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'internal.c')
-rw-r--r-- | internal.c | 6 |
1 files changed, 4 insertions, 2 deletions
@@ -229,8 +229,10 @@ int internal_init(void) } #if defined(__i386__) || defined(__x86_64__) - /* Probe for IT87* LPC->SPI translation unconditionally. */ - it87xx_probe_spi_flash(NULL); + /* Probe unconditionally for IT87* LPC->SPI translation and for + * IT87* Parallel write enable. + */ + init_superio_ite(); #endif board_flash_enable(lb_vendor, lb_part); |