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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-12-13 22:28:00 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-12-13 22:28:00 +0000
commit122c82201036a90f7440a0908f5dc22780ce1ef4 (patch)
treedf65fe458cd52070208d9e46e23418a015b16696 /spi.c
parent6e653bf747b63f5e650ee9ebbdd070860342fb3e (diff)
downloadflashrom-122c82201036a90f7440a0908f5dc22780ce1ef4.tar.gz
Internal (onboard) programming was the only feature which could not be
disabled. Make various pieces of code conditional on support for internal programming. Code shared between PCI device programmers and onboard programming is now conditional as well. It is now possible to build only with dummy support: make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no This allows building for a specific use case only, and it also facilitates porting to a new architecture because it is possible to focus on highlevel code only. Note: Either internal or dummy programmer needs to be compiled in due to the current behaviour of always picking a default programmer if -p is not specified. Picking an arbitrary external programmer as default wouldn't make sense. Build and runtime tested in all 1024 possible build combinations. The only failures are by design as mentioned above. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.c')
-rw-r--r--spi.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/spi.c b/spi.c
index 14beed7..a2b26c5 100644
--- a/spi.c
+++ b/spi.c
@@ -40,6 +40,7 @@ const struct spi_programmer spi_programmer[] = {
.write_256 = NULL,
},
+#if INTERNAL_SUPPORT == 1
{ /* SPI_CONTROLLER_ICH7 */
.command = ich_spi_send_command,
.multicommand = ich_spi_send_multicommand,
@@ -81,6 +82,7 @@ const struct spi_programmer spi_programmer[] = {
.read = wbsio_spi_read,
.write_256 = wbsio_spi_write_1,
},
+#endif
#if FT2232_SPI_SUPPORT == 1
{ /* SPI_CONTROLLER_FT2232 */
@@ -308,11 +310,13 @@ int probe_spi_rdid4(struct flashchip *flash)
{
/* only some SPI chipsets support 4 bytes commands */
switch (spi_controller) {
+#if INTERNAL_SUPPORT == 1
case SPI_CONTROLLER_ICH7:
case SPI_CONTROLLER_ICH9:
case SPI_CONTROLLER_VIA:
case SPI_CONTROLLER_SB600:
case SPI_CONTROLLER_WBSIO:
+#endif
#if FT2232_SPI_SUPPORT == 1
case SPI_CONTROLLER_FT2232:
#endif
@@ -1042,10 +1046,12 @@ int spi_aai_write(struct flashchip *flash, uint8_t *buf)
int result;
switch (spi_controller) {
+#if INTERNAL_SUPPORT == 1
case SPI_CONTROLLER_WBSIO:
fprintf(stderr, "%s: impossible with Winbond SPI masters,"
" degrading to byte program\n", __func__);
return spi_chip_write_1(flash, buf);
+#endif
default:
break;
}