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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-01-19 11:15:48 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-01-19 11:15:48 +0000
commit247b0f27db79f129596f1dcb05f9046888f295c2 (patch)
treef0c9704289953cb4c119ec42dfdac2150c322111 /spi.c
parent421479f0cd0b2cd605fe08baafa2b4092bf27f19 (diff)
downloadflashrom-247b0f27db79f129596f1dcb05f9046888f295c2.tar.gz
Dediprog SF100 support.
Reverse engineered from USB logs. I never touched that programmer nor did I ever see the associated software. Disabled by default until it is complete. The driver needs to be hooked up to the SPI core before it will do anything besides init and diagnostics. I successfully reverse engineered all commands, but some are still somewhat magic. Logs from "flashrom -p dediprog -V" are appreciated. Probe and read should work, erase/write is expected to explode. The programmer will set voltage to 0 on exit. Thanks a lot to Stefan Reinauer and Patrick Georgi for providing USB logs and for testing the result. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.c')
-rw-r--r--spi.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/spi.c b/spi.c
index 685c917..aaf7d88 100644
--- a/spi.c
+++ b/spi.c
@@ -111,6 +111,15 @@ const struct spi_programmer spi_programmer[] = {
},
#endif
+#if DEDIPROG_SUPPORT == 1
+ { /* SPI_CONTROLLER_DEDIPROG */
+ .command = dediprog_spi_send_command,
+ .multicommand = default_spi_send_multicommand,
+ .read = dediprog_spi_read,
+ .write_256 = spi_chip_write_1,
+ },
+#endif
+
{}, /* This entry corresponds to SPI_CONTROLLER_INVALID. */
};