Every SPI host controller implemented its own way to read flash chips.

This was partly due to a design problem in the abstraction layer.

There should be exactly two different functions for reading SPI chips:
- memory mapped reads
- SPI command reads.

Each of them should be contained in a separate function, optionally
taking parameters where needed.

This patch solves the problems mentioned above, shortens the code and
makes the code logic a lot more obvious.

Since open-coding the min() function leads to errors, include it in this
patch as well.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 27 insertions, 0 deletions

diff --git a/spi.c b/spi.c
index dc02300..3e3d76f 100644
--- a/spi.c
+++ b/spi.c
@@ -673,6 +673,33 @@ int spi_nbyte_read(int address, uint8_t *bytes, int len)
 	return spi_command(sizeof(cmd), len, cmd, bytes);
 }
 
+/*
+ * Read a complete flash chip.
+ * Each page is read separately in chunks with a maximum size of chunksize.
+ */
+int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int chunksize)
+{
+	int rc = 0;
+	int i, j;
+	int total_size = flash->total_size * 1024;
+	int page_size = flash->page_size;
+	int toread;
+
+	for (j = 0; j < total_size / page_size; j++) {
+		for (i = 0; i < page_size; i += chunksize) {
+			toread = min(chunksize, page_size - i);
+			rc = spi_nbyte_read(j * page_size + i,
+					    buf + j * page_size + i, toread);
+			if (rc)
+				break;
+		}
+		if (rc)
+			break;
+	}
+
+	return rc;
+}
+
 int spi_chip_read(struct flashchip *flash, uint8_t *buf)
 {
 	switch (spi_controller) {